STMicroelectronics TDA7575B Datasheet

TDA7575B

2 x 75W multifunction dual-bridge power amplifier with integrated digital diagnostics

Features

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Multipower bcd technology

MOSFET output power stage

DMOS power output

New high-efficiency (class AB)

Single-channel 1

 driving capability

High output power capability 2x28 W/4



@

14.4 V, 1 kHz, 10 % THD

Max. output power 2x75 W/2



1x150 W/1



Single-channel 1



driving capability

84 W undistorted power

Full I

2

C bus driving with 4 address possibilities:

– Standby

– Play/mute

– Gain 12/26 dB

– Full digital diagnostic (AC and DC loads)

Possibility to disable the I

2

C bus

Differential inputs

Full fault protection

DC offset detection

Two independent short circuit protections

Diagnostic on clipping detector with selectable threshold (2 % / 10 %)

Clipping detector as diagnostic pin when I

2

C bus is disabled

Standby/mute pins

ESD protection

Table 1.

Device summary

Order code

TDA7575B

TDA7575BPD

TDA7575BPDTR

Package

Flexiwatt27

PowerSO36 (slug up)

PowerSO36 (slug up)

PowerSO36

(slug up)

Flexiwatt27

Description

The TDA7575B is a new MOSFET dual bridge amplifier specially intended for car radio applications. Thanks to the DMOS output stage the TDA7575B has a very low distortion allowing a clear powerful sound.

Among the features, its superior efficiency performance coming from the internal exclusive structure, makes it the most suitable device to simplify the thermal management in high power sets.The dissipated output power under average listening condition is in fact reduced up to 50% when compared to the level provided by conventional class AB solutions.

This device is equipped with a full diagnostic array that communicates the status of each speaker through the I

2

C bus. The TDA7575B has also the possibility of driving loads down to 1



paralleling the outputs into a single channel. It is also possible to disable the I

2

C and control the

TDA7575B by means of the usual standby and mute pins.

Packing

Tube

Tube

Tape and reel

September 2013 Doc ID 14103 Rev 3 1/32 www.st.com

1

8

9

3

4

5

1

2

Contents

Contents

6

7

TDA7575B

Block and pins diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.1

Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.2

Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.3

Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.4

Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.5

1 W capability setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.6

I2C abilitation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.1

Examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Diagnostics functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.1

Turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.2

Permanent diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.3

Output DC offset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7.4

AC diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7.5

Multiple faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7.6

Faults availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

7.7

I2C programming/reading sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2/32 Doc ID 14103 Rev 3

TDA7575B

List of tables

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

IB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

IB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 9.

DB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 10.

Double fault table for turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 11.

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Doc ID 14103 Rev 3 3/32

List of figures

List of figures

TDA7575B

Figure 1.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2.

Pins connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3.

Quiescent drain current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 4.

Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5.

Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 6.

Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 7.

Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8.

Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 9.

Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10.

Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 11.

Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 12.

Distortion vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 13.

Distortion vs. output voltage (LD mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 14.

Cross talk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 15.

Cross talk vs. frequency (LD mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 16.

CMRRR vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 17.

Output attenuation vs. supply voltage (vs. dependent muting) . . . . . . . . . . . . . . . . . . . . . . 13

Figure 18.

Output attenuation vs. mute pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 19.

Power dissipation vs. output power (4



- SINE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 20.

Power dissipation vs. output power (2



- SINE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 21.

Power dissipation vs. average output power (Audio program simulation, 4



) . . . . . . . . . . 14

Figure 22.

Power dissipation vs. average output power (Audio program simulation, 2



) . . . . . . . . . . 14

Figure 23.

ITU R-ARM frequency response, weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 14

Figure 24.

Application circuit (TDA7575B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 25.

Application circuit (TDA7575BPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 26.

Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 27.

Timing diagram on the I2C bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 28.

Timing acknowledge clock pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 29.

Turn-on diagnostic: working principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30.

SVR and output behavior - case 1: without turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31.

SVR and output pin behavior - case 2: with turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . 24

Figure 32.

Short circuit detection thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33.

Load detection thresholds - high gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 34.

Load detection thresholds - high gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 35.

Restart timing without diagnostic enable (permanent) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 36.

Restart timing with diagnostic enable (permanent). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 37.

Current detection high: load impedance |Z| vs. output peak voltage . . . . . . . . . . . . . . . . . 27

Figure 38.

Current detection low: load impedance |Z| vs. output peak voltage . . . . . . . . . . . . . . . . . . 27

Figure 39.

PowerSO36 (slug up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 29

Figure 40.

Flexiwatt27 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 30

4/32 Doc ID 14103 Rev 3

TDA7575B

1 Block and pins diagrams

Block and pins diagrams

OUT1+

OUT1+

VCC

VCC

B

PWGND

PWGND

OUT1-

OUT1-

OUT2-

OUT2-

PWGND

PWGND

A

VCC

VCC

OUT2+

OUT2+

Figure 1.

Block diagram

ADDRESS

A B CLK DATA

V

S

VCC CD_OUT

I

2

CBUS

CLIP

DETECTOR

IN1+

IN1-

OUT1+

OUT1-

SHORT CIRCUIT

PROTECTION

IN2+ OUT2+

IN2OUT2-

SHORT CIRCUIT

PROTECTION

I

2

C EN

SVR ST-BY/HE S_GND PW_GND TAB 1

Ω

MUTE

D01AU1269

Figure 2.

Pins connection diagram (top view)

36

32

31

30

35

34

33

29

28

27

26

25

24

23

22

21

20

19

D01AU1270

PowerSO36 (slug up)

1

5

6

7

8

9

2

3

4

13

14

15

16

17

18

10

11

12

TAB

IN1+

IN1-

MUTE

ST_BY

SGND

DATA

CK

N.C.

N.C.

N.C.

N.C.

SVR

CD-OUT

1-OHM

I2C-EN

IN2-

IN2+

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

27

26

25

24

23

5

4

3

2

1

Flexiwatt27

TAB

PWGND

A

OUT2+

N.C.

OUT2-

V

CC

IN2+

IN2-

I2CEN

1 Ω

CD_OUT

SVR

CK

DATA

SGND

STT-BY

MUTE

IN1-

IN1+

V

CC

OUT1-

N.C.

OUT1+

B

PWGND

TAB

D03IN1512

Doc ID 14103 Rev 3 5/32

Electrical specifications TDA7575B

2.1 Absolute maximum ratings

Table 2.

Symbol

V op

V

S

V peak

V

CK

V

DATA

I

O

I

O

P tot

T stg

, T j

Absolute maximum ratings

Parameter

Operating supply voltage

DC supply voltage

Peak supply voltage (for t = 50 ms)

CK pin voltage

Data pin voltage

Output peak current (not repetitive t = 100 ms)

Output peak current (repetitive f > 10 Hz)

Power dissipation T case

= 70 °C

Storage and junction temperature

Value

6

8

6

18

28

50

6

86

-55 to 150

Unit

V

A

A

V

V

V

V

W

°C

Table 3.

Symbol

Thermal data

Parameter

R th j-case

Thermal resistance junction-to-case Max

PowerSO36

1

Flexiwatt 27

1

Unit

°C/W

Table 4.

Symbol

Power amplifier

V

S

I d

Supply voltage range

Total quiescent drain current

P o

V

S

= 14.4 V; f = 1 kHz; R

L

= 4



; T amb

= 25 °C unless otherwise specified.

Electrical characteristics

Parameter

Output power

Test condition

-

-

Max. power

(1)

THD = 10 %

THD = 1 %; BTL mode

R

L

= 2



; THD 10 %

R

L

R

L

= 2



; THD 1 %

= 2



; Max. power

(1)

Min. Typ.

Max.

8

50

35

25

45

70

-

130

40

28

22

50

37

75

18

200

-

-

-

Unit

W

V mA

W

W

6/32 Doc ID 14103 Rev 3

TDA7575B Electrical specifications

Table 4.

Symbol

Electrical characteristics (continued)

Parameter Test condition

P o

Output power

Single channel configuration

(1



pin > 2.5 V); R

L

= 1



;

THD 3 %

Max. power

(1)

THD Total harmonic distortion

-

P o

= 1-12 W; STD mode

HE mode; P o

= 1-2 W

HE mode; P o

= 4-8 W

P o

= 1-12 W, f = 10 kHz

R

L

= 2; HE mode; P o

= 3 W

-

Single channel configuration

(1



pin > 2.5 V); R

L

= 1;

P o

= 4-30 W

R g

= 600



P o

= 1 W C

T

R

IN

G

V1



G

V1

G

V2



G

V2

E

E



IN1

IN2

SVR

V

OS

Cross talk

Input impedance

Voltage gain 1 (default)

Voltage gain match 1

Voltage gain 2

Voltage gain match 2

Output noise voltage gain 1

Output noise voltage gain 2

Supply voltage rejection

-

-

-

R g

= 600



; G v

= 26 dB filter 20 to 22 kHz

R g

= 600



; G v

= 12d B filter 20 to 22 kHz f = 100 Hz to 10 kHz; V r

R g

= 600



= 1 Vpk;

(-3 dB) BW Power bandwidth

A

SB

I

SB

A

M

Standby attenuation -

Standby current consumption V

Mute attenuation st-by

= 0 V

V

OS

V

AM

V

MC

Offset voltage

Min. supply mute threshold

CMRR Input CMRR

Mute and play

-

V

CM

= 1 Vpk-pk; R g

= 0



Maximum common mode input level f = 1 kHz

SR Slew rate -

During mute on/off output offset voltage

During standby on/off output offset voltage

ITU R-ARM weighted

see Figure 23

Min. Typ.

Max.

Unit

-

60

60

25

-1

11

-1

-

80

140

-

-

-

84

150

0.03

0.03

0.5

0.15

0.03

-

0.1

0.1

0.02

75

100

26

0

12

0

40

-

130

27

1

13

1

60

0.5

0.5

0.1

15 25

W

%

60

-

100

2

90

0

7.5

60

-

4

-

-

50

100

90

-

80

-45

7

56

-

1.5

-10

-10

-

-

-

10

45

8

1

-

+10 dB

KHz dB



A dB mV

V dB

Vrms

V/

 s mV

+10 mV

%

%

% dB k

 dB dB dB dB



V



V

Doc ID 14103 Rev 3 7/32

Electrical specifications TDA7575B

Table 4.

Symbol

T

ON

T

OFF

V

OFF

V

SB

V

HE

I

O

V

1



V

1



I

1



I

1



La

Ha

V m

V m

I m

I m

V

I2C

V

I2C

I

2

C

I

2

C

Ia

Ia

Lb

Hb

Ib

Ib

T

W

T

PI

I

CDH

I

CDL

CD

Electrical characteristics (continued)

Parameter Test condition

Turn on delay

Turn off delay

Standby pin for standby

D2 (IB1) 0 to 1

-

D2 (IB1) 1 to 0

Standby pin for standard bridge -

Standby pin for high-efficiency -

Standby pin current

Standby pin current

Mute pin voltage for mute mode -

1.5 < V st-by/HE

< 18 V

V st-by

< 1.5 V

Mute pin voltage for play mode -

Mute pin current (standby) V mute

= 0 V, V st-by

< 1.5V

Mute pin current (operative)

I

2

C pin voltage for I

2

C disabled -

0 V < V mute

< 18 V, V st-by

> 3.5 V

I

2

C pin voltage for I

2

C enabled -

I

2

C pin current (standby) 0V < I

2

C EN < 18V, V stby

< 1.5V

I

2

C pin current (operative)

1



pin voltage for 2ch mode -

I

2

C EN <18V, V st-by

>3.5V

1



pin voltage for 1



mode -

1



pin current (standby)

1



pin current (operative)

0 V < 1



<18 V, V s-tby

< 1.5 V

1



< 18 V, V st-by

> 3.5 V

Low logic level

A pin voltage

High logic level

A pin current (standby)

A pin current (operative)

0V < A < 18V , V stby

< 1.5 V

A<18V, V st-by

> 3.5V

Low logic level

B pin voltage

High logic level

B pin current (standby)

B pin current (operative)

Thermal warning

Thermal protection intervention -

-

0 V < B < 18 V, V s-tby

< 1.5 V

B < 18 V, V st-by

> 3.5 V

Clip pin high leakage current

Clip pin low sink current

Clip detect THD level

CD off, 0 V < V

CD

< 5.5 V

CD on; V

CD

< 300 mV

D0 (IB1) = 0

D0 (IB1) = 1

Min. Typ.

Max.

-5

7

0

2.5

-5

7

0

2.5

-5

7

0

2.5

-

-

-15

1

0.8

5

0

3.5

-5

-

0

2.5

-5

7

3.5

7

7

-10

-

-

0

1.3

10

2.5

15

0

11

-

-

0

11

-

-

0

11

-

-

150

170

0

0

65

-

-

-

-

0

11

15

15

-

-

-

160

0

5

15

1.5

18

5

15

-

-

15

1.5

18

5

15

1.5

18

1.5

18

5

100

1.5

18

5

15

40

40

1.5

5

18

200

10

(*) Standby pin high enables I

2

C bus; Standby pin low puts the device in standby condition. (see “prog” for more details)

Unit

V



A



A

V

V



A



A

V

V



A



A

V

V

V



A



A

V

V



A



A

V ms ms

V mA

%

%

V



A



A

°C

°C



A

8/32 Doc ID 14103 Rev 3

TDA7575B Electrical specifications

Table 4.

Symbol

Electrical characteristics (continued)

Parameter Test condition

Turn-on diagnostics (Power amplifier mode)

Pgnd

Pvs

Short to GND det. (below this limit, the output is considered in short circuit to GND)

Power amplifier in standby condition

Short to Vs det. (above this limit, the output is considered in short circuit to VS)

-

Pnop

Pgnd

Pvs

Normal operation thresholds.(within these limits, the output is considered without faults).

-

Lsc Shorted load det.

Lop Open load det.

Lnop Normal load det.

Turn-on diagnostics (Line driver mode)

-

-

-

Short to GND det. (below this limit, the output is considered in short circuit to GND)

Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS)

Pnop

Normal operation thresholds.(within these limits, the output is considered without faults).

Lsc Shorted load det.

Lop Open load det.

Power amplifier in standby

Lnop Normal load det.

Permanent diagnostics (Power amplifier mode or line driver mode)

Pgnd

Pvs

Short to GND det. (below this limit, the output is considered in short circuit to GND)

Power amplifier in Mute or Play condition, one or more short circuits protection activated

Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS)

-

Pnop

Lsc

Normal operation thresholds.(Within these limits, the Output is considered without faults).

-

Shorted load det.

Pow. amp. mode

Line driver mode

Min. Typ.

Max.

Unit

-

V s

-0.9

-

1.8

-

130

1.5

-

V s

-0.9

-

1.8

-

400

4.5

-

V s

-

0.9

1.8

-

-

-

-

-

-

-

-

-

-

-

-

-

1.2

-

V s

-1.5

V

0.5

-

70

1.2

-

V s

-1.5

V

1.5

-

200

1.2

-

V s

-1.5

V

0.5

1.5

V

V







V

V







V

V





Doc ID 14103 Rev 3 9/32

Electrical specifications TDA7575B

Table 4.

Symbol

Electrical characteristics (continued)

Parameter Test condition

V

O

Offset detection

Power amplifier in play condition

AC input signals = 0

I

I

NLH

NLL

Normal load current detection V

O

< (V

S

- 5)pk IB2 (D0) = 0

Normal load current detection V

O

< (V

S

- 5)pk IB2 (D0) = 1

Open load current detection V

O

< (V

S

- 5)pk IB2 (D0) = 0 I

OLH

I

OLL

Open load current detection

I

2

C bus interface

V

O

< (V

S

- 5)pk IB2 (D0) =1 f

SCL

V

IL

V

IH

Clock frequency

Input low voltage

Input high voltage

1.

Saturated sqare wave output.

-

-

-

Min. Typ.

Max.

Unit

±1.5

500

250

-

-

±2

-

-

-

-

±2.5

-

-

250

125

V mA mA mA mA

-

-

2.3

-

-

-

400

1.5

kHz

V

V

10/32 Doc ID 14103 Rev 3

TDA7575B

3 Electrical characteristics curves

Electrical characteristics curves

Figure 3.

Quiescent drain current vs. supply voltage

Figure 4.

Output power vs. supply voltage

Figure 5.

Output power vs. supply voltage

10 11 12 13 14 15 16 17 18

Figure 6.

Output power vs. supply voltage

9 10 11 12 13 14 15 16 17 18

Figure 7.

Distortion vs. output power

10 11 12 13 14 15 16 17 18

Figure 8.

Distortion vs. output power

Doc ID 14103 Rev 3 11/32

Electrical characteristics curves

Figure 9.

Distortion vs. output power

TDA7575B

Figure 10. Distortion vs. output power

Figure 11. Distortion vs. output power Figure 12. Distortion vs. frequency

1

Ω

- 40W

2 Ω - 24W

4 Ω - 12W

Figure 13.

Distortion vs. output voltage

(LD mode)

Figure 14. Cross talk vs. frequency

12/32

0 1 2 3 4 5 6 7 8 9 10 11 12

Doc ID 14103 Rev 3

TDA7575B

Figure 15.

Cross talk vs. frequency

(LD mode)

Electrical characteristics curves

Figure 16. CMRRR vs. frequency

Figure 17. Output attenuation vs. supply voltage (vs. dependent muting)

Figure 18.

Output attenuation vs. mute pin voltage

Figure 19. Power dissipation vs. output power

(4



- SINE)

Figure 20.

Power dissipation vs. output power

(2



- SINE)

Doc ID 14103 Rev 3 13/32

Electrical characteristics curves TDA7575B

-10

-20

-30

-40

0

Figure 21. Power dissipation vs. average output power (Audio program simulation, 4



)

Ptot (W)

30

25

Vs=14 V

RL=2 x 4



GAUSSIAN NOISE

20

CLIP

START

15

STD

10

5 HI-EFF

0

0 1 2 3 4

Po (W)

Figure 23.

ITU R-ARM frequency response, weighting filter for transient pop

10

Output attenuation (dB)

5

-50

10 100 1000

Hz

10000 100000

AC00343

Figure 22.

Power dissipation vs. average output power (Audio program simulation,

2



)

14/32 Doc ID 14103 Rev 3

TDA7575B Application circuits

Figure 24.

Application circuit (TDA7575B)

A

I

2

B

C BUS

CLK DATA

V

S

CD_OUT

C7

0.1

μ

F

C8

2200

μ

F

R1 47K

Ω

V

3 14 13

VCC

7-21 25 16

IN1+

C1 0.22

μ

F

8

IN1-

C2 0.22

μ

F

9

4

6

OUT1+

OUT1-

IN2+

C3 0.22

μ F

IN2-

C4 0.22

μ

F

D05AU1615

20

19

C5

10

μ

F

15

OUT2+

24

22

OUT2-

11

ST-BY/HE

12

S_GND

2-26

PW_GND

1 17

TAB

C6

1 μ F

1

Ω

SETTING

18

10

R2 47K

Ω

I

2

C BUS

ENABLE

MUTE

Figure 25.

Application circuit (TDA7575BPD)

A

I

2

B

C BUS

CLK DATA

V

S

CD_OUT

C7

0.1

μ

F

C8

2200

μ

F

R1 47K

Ω

V

23 32 8 7

VCC

21-2-33-34 14

IN1+

C1 0.22

μ

F

2

IN1-

C2 0.22

μ

F

3

35-36

28-29

OUT1+

OUT1-

IN2+

C3 0.22

μ

F

IN2-

C4 0.22

μ

F

D05AU1616

18

17

C5

10

μ

F

13

OUT2+

19-20

26-29

OUT2-

5

ST-BY/HE

6 24-25-30-31

S_GND PW_GND

1 15

TAB

C6

1

μ

F

1

Ω

SETTING

16

4

R2 47K

Ω

I 2 C BUS

ENABLE

MUTE

Doc ID 14103 Rev 3 15/32

I2C bus interface

5 I

2

C bus interface

TDA7575B

Data transmission from microprocessor to the TDA7575B and vice versa takes place through the 2 wires I

2

C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).

5.2

As shown by

Figure 26 , the data on the SDA line must be stable during the high period of

the clock.

The high and low state of the data line can only change when the clock signal on the SCL line is low.

Start and stop conditions

As shown by

Figure 27

a start condition is a high to low transition of the SDA line while SCL is high.

The stop condItion Is A Low To High Transition of the SDA line while SCL is high.

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first.

5.4 Acknowledge

The transmitter

(*)

puts a resistive HIGH level on the SDA line during the acknowledge clock

pulse (see Figure 28 ). The receiver

(**)

the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.

(*) Transmitter

= master (



P) when it writes an address to the TDA7575B

= slave (TDA7575B) when the µP reads a data byte from TDA7575B

(**) Receiver

= slave (TDA7575B) when the µP writes an address to the TDA7575B

= master (



P) when it reads a data byte from TDA7575B

Figure 26.

Data validity on the I

2

C bus

SDA

SCL

DATA LINE

STABLE, DATA

VALID

CHANGE

DATA

ALLOWED D99AU1031

16/32 Doc ID 14103 Rev 3

TDA7575B

Figure 27.

Timing diagram on the I

2

C bus

SCL

SDA

D99AU1032

START

Figure 28.

Timing acknowledge clock pulse

SCL

1 2 3

SDA

MSB

START

D99AU1033

7

STOP

8 9

I2C bus interface

I

2

CBUS

ACKNOWLEDGMENT

FROM RECEIVER

It is possible to drive 1



load paralleling the outputs into a single channel.

●

●

In order to implement this feature, outputs are to be connected on the board as follows:

OUT1+ (pin 35 and pin 36) shorted to OUT2+ (pin 19 and pin 20)

OUT1- (pin 28 and pin 29) shorted to OUT2- (pin 26 and pin 27).

It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize THD distortion. It is also recommended to control the maximum mismatch impedance between V

CC

pins (pin 21/pin 22 respect to pin 33/pin 34) and between PWGND pins (pin 24/pin 25 respect to pin 30/pin 31), mismatch that must not exceed a value of

20 m



With 1



feature settled the active input is IN2 (pin 17 and pin 18), therefore IN1 pins should be let floating.

It is possible to set the load capability acting on 1



pin as follows:

1



pin (pin 15) < 1.5 V: two channels mode (for a minimum load of 2



)

1



pin (pin 15) > 2.5 V: one channel mode (for 1



load).

It is to remember that 1

Ohm

 function is a hardware selection.

Therefore it is recommended to leave 1



 pin floating or shorted to GND to set the two channels mode configuration, or to short 1



pin to V

CC

to set the one channel (1



) configuration.

Doc ID 14103 Rev 3 17/32

I2C bus interface TDA7575B

5.6 I

2

C abilitation setting

It is possible to disable the I

2

C interface by acting on I

2

C pin (pin 16) and control the

TDA7575B by means of the usual standby and mute pins. In order to activate or deactivate this feature, I

2

C pin must be set as follows:

●

●

I

2

C pin (pin 16) < 1.5V: I

2

C bus interface deactivated

I

2

C pin (pin 16) > 2.5V: I

2

C bus interface activated

It is also possible to let I

2

C pin floating to deactivate the I

2

C bus interface, or to short I

2

C pin to V

CC

to activate it.

In particular:

● I

2

C enabled: I

2

C pin (pin 16) > 2.5 V

– STD mode: V st-by

(pin 5) > 3.5 V, IB2(D1)=0

– HE mode: V st-by

(pin 5) > 3.5 V, IB2(D1)=1

– Play mode: V mute

(pin 4) >3.5 V, IB1 (D2) = 1

The amplifier can always be switched off by putting V st-by

to 0V , but with I

2

C enabled it can be turn on only through I

2

C (with V st-by

> 3.5 V).

● I

2

C disabled: I

2

C pin (pin 16) < 1.5 V

– STD mode: 3.5V < standby (pin 5) < 5

– HE mode: V stby

(pin 5) > 7 V

– Play mode: V mute

(pin 4) > 3.5 V

For both STD and HE mode the play/mute mode can be set acting on V mute

pin.

When I

2

C bus is disabled, when a fault is detected pin 14 (CD-OUT) is pulled down by the internal logic circuitry. The faults detected are the short circuit to ground, to V

CC the load (after an aver current detection).

and across

18/32 Doc ID 14103 Rev 3

TDA7575B Software specifications

All the functions of the TDA7575B are activated by I

2

C interface.

The bit 0 of the "Address Byte" defines if the next bytes are write instruction (from



P to

TDA7575B) or read instruction (from TDA7575B to µP).

Table 5.

Bit

A2

A1

A0

R/W

A6

A5

A4

A3

Address selection

Address

A

X

0

B

0

1

1

1

If R/W = 0, the



P sends 2 "instruction bytes": IB1 and IB2.

Table 6.

Bit

D7

D6

D5

D4

D3

D2

D1

D0

IB1

Instruction decoding bit

0

Diagnostic enable (D6 = 1)

Diagnostic defeat (D6 = 0)

Offset detection enable (D5 = 1)

Offset detection defeat (D5 = 0)

Gain = 26 dB (D4 = 0)

Gain = 12 dB (D4 = 1)

0

Mute (D2 = 0)

Unmute (D2 = 1)

0

CD 2% (D0 = 0)

CD 10% (D0 = 1)

Doc ID 14103 Rev 3 19/32

Software specifications TDA7575B

Table 7.

Bit

D7

D6

D5

D4

D3

D2

D1

D0

IB2

Instruction decoding bit

0

0

0

Standby on - Amplifier not working - (D4 = 0)

Standby off - Amplifier working - (D4 = 1)

Power amplifier mode diagnostic (D3 = 0);

Line driver mode diagnostic (D3 = 1)

Current detection diagnostic enabled (D2 = 1)

Current detection diagnostic defeat (D2 = 0)

Power amplifier working in standard mode (D1 = 0)

Power amplifier working in high efficiency mode (D1 = 1)

Current detection threshold high (D7 =0)

Current detection threshold low (D7 =1)

If R/W = 1, the TDA7575B sends 2 "Diagnostics Bytes" to



P: DB1 and DB2.

Table 8.

DB1

Bit Instruction decoding bit

D7 Thermal warming (if Tchip



150°C, D7 = 1)

D6

Diag. cycle not activated or not terminated (D6 = 0)

Diag. cycle terminated (D6 = 1)

D5

D4

D3

D2

D1

D0

Channel 1 current detection IB2 (D0) = 0

Output peak current < 250 mA - Open load (D5 = 1)

Output peak current > 500 mA - Normal load (D5 = 0)

Channel 1

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)

Channel 1

Normal load (D3 = 0)

Short load (D3 = 1)

Channel 1

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Offset diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

Channel 1

No short to V cc

(D1 = 0)

Short to V cc

(D1 = 1)

Channel 1

No short to GND (D1 = 0)

Short to GND (D1 = 1)

Channel LF current detection IB2 (D0) = 1

Output peak current < 125 mA - Open load (D5 = 1)

Output peak current > 250 mA - Normal load (D5 = 0)

20/32 Doc ID 14103 Rev 3

TDA7575B Software specifications

Table 9.

Bit

D7

D6

D5

D4

D3

D2

D1

D0

DB2

Instruction decoding bit

Offset detection not activated (D7 = 0)

Offset detection activated (D7 = 1)

Current sensor not activated (D6 = 0)

Current sensor activated (D6 = 1)

Channel LR

Current detection IB2 (D0) = 0

Output peak current < 250 mA - Open load (D5 = 1)

Output peak current > 500 mA - Normal load (D5 = 0)

Channel LR

Current detection IB2 (D0) = 1

Output peak current < TBD mA - Open load (D5 = 1)

Output peak current > TBD mA - Normal load (D5 = 0)

Channel 2

Turn-on diagnostic (D4 = 0)

Permanent diagnostic (D4 = 1)

Channel 2

Normal load (D3 = 0)

Short load (D3 = 1)

Channel 2

Turn-on diag.: No open load (D2 = 0)

Open load detection (D2 = 1)

Permanent diag.: No output offset (D2 = 0)

Output offset detection (D2 = 1)

Channel 2

No short to V cc

(D1 = 0)

Short to V cc

(D1 = 1)

Channel 2

No short to GND (D1 = 0)

Short to GND (D1 = 1)

Doc ID 14103 Rev 3 21/32

Software specifications

6.1

TDA7575B

Examples of bytes sequence

1 - Turn-on diagnostic - Write operation

Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP

L

2 - Turn-on diagnostic - Read operation

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP

The delay from 1 to 2 can be selected by software, starting from T.B.D. ms

3a - Turn-on of the power amplifier with mute on, diagnostic defeat.

Start Address byte with D0 = 0 ACK IB1 ACK IB2

X000XXXX XXX1XX1X

ACK STOP

3b - Turn-off of the power amplifier

Start Address byte with D0 = 0 ACK IB1

X0XXXXXX

ACK IB2

XXX0XXXX

ACK STOP

4 - Offset detection procedure enable

Start Address byte with D0 = 0 ACK IB1

XX1XX1XX

ACK IB2

XXX1XXXX

ACK STOP

5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4).

Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP

●

●

The purpose of this test is to check if a D.C. offset (2 V typ.) is present on the outputs, produced by input capacitor with anomalous leakage current or humidity between pins.

The delay from 4 to 5 can be selected by software, starting from T.B.D. ms

22/32 Doc ID 14103 Rev 3

TDA7575B

7

Diagnostics functional description

Diagnostics functional description

It is activated at the turn-on (stand-by out) under I

2

C bus request. Detectable output faults are:

– Short to GND

– Short TO Vs

– Short across the speaker

– Open speaker

To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (

Figure 29

) is internally generated, sent through the speaker(s) and sunk back. The

Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested (after a I

2

C reading).

If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse takes place first (power stage still in stand-by mode, low, outputs = high impedance).

Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state is kept until a short appears at the outputs.

Figure 29.

Turn-on diagnostic: working principle

Isource

Vs~5V I (mA)

Isource

Isink

CH+

CH-

Isink

~100mS

Measure time t (ms)

Fig. Figure 30

and

Figure 31

show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without Turn-on diagnostic.

Figure 30.

SVR and output behavior - case 1: without turn-on diagnostic

Vsvr

Out

Permanent diagnostic acquisition time (100mS Typ)

Bias (power amp turn-on)

I2CB DATA

Diagnostic Enable

(Permanent) FAULT event

Permanent Diagnostics data (output) permitted time

Read Data t

Doc ID 14103 Rev 3 23/32

Diagnostics functional description TDA7575B

Figure 31.

SVR and output pin behavior - case 2: with turn-on diagnostic

Vsvr

Out Turn-on diagnostic acquisition time (100mS Typ)

Permanent diagnostic acquisition time (100mS Typ)

24/32 t

Diagnostic Enable

(Turn-on)

Turn-on Diagnostics data (output) permitted time

Diagnostic Enable

(Permanent)

FAULT event

I2CB DATA

Bias (power amp turn-on) permitted time

Read Data

Permanent Diagnostics data (output) permitted time

The information related to the outputs status is read and memorized at the end of the current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for short to GND / Vs the fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:

Figure 32.

Short circuit detection thresholds

S.C. to GND x Normal Operation x S.C. to Vs

0V 1.2V

1.8V

V

S

-1.5V

V

S

-0.9V

D02AU1341

V

S

Concerning short across the speaker / open speaker, the threshold varies from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 26 dB gain are as follows:

Figure 33.

Load detection thresholds - high gain setting

S.C. across Load x Normal Operation x Open Load

0V 0.5

Ω 1.5

Ω 70 Ω 130 Ω

D01AU1254

Infinite

If the line-driver mode (Gv= 12 dB and line driver mode diagnostic = 1) is selected, the same thresholds will change as follows:

Figure 34.

Load detection thresholds - high gain setting

S.C. across Load x Normal Operation x Open Load

0

Ω

1.5

Ω

4.5

Ω

200

Ω

400

Ω

D01AU1252 infinite

Doc ID 14103 Rev 3

TDA7575B Diagnostics functional description

Detectable conventional faults are:

– Short to GND

– Short to Vs

– Short across the speaker

The following additional features are provided:

– Output offset detection

The TDA7575B has 2 operating statuses:

1.

RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is made every 1 ms (fig. 30).

Restart takes place when the overload is removed.

2. DIAGNOSTIC mode. It is enabled via I

2

C bus and self activates if an output overload

(such to cause the intervention of the short-circuit protection) occurs to the speakers outputs. Once activated, the diagnostics procedure develops as follows (fig. 31):

– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active.

– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started.

– After a diagnostic cycle, the audio channel interested by the fault is switched to

RESTART mode. The relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I

2

C reading. This is to ensure continuous diagnostics throughout the carradio operating time.

– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over than half a second is recommended).

Figure 35.

Restart timing without diagnostic enable (permanent) each 1ms time, a sampling of the fault is done

Out

1-2mS

1mS 1mS 1mS

1mS

Overcurrent and short

circuit protection intervention

(i.e. short circuit to GND) t

Short circuit removed

Figure 36.

Restart timing with diagnostic enable (permanent)

1mS 100mS 1mS 1mS

Overcurrent and short

circuit protection intervention

(i.e. short circuit to GND) t

Short circuit removed

Doc ID 14103 Rev 3 25/32

Diagnostics functional description

7.3

TDA7575B

Output DC offset detection

Any DC output offset exceeding ± 2 V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating.

This diagnostic has to be performed with low-level output AC signal (or Vin = 0).

●

●

The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):

Start = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1

Stop = Actual reading operation

Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.

It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence of capacitively (AC) coupled loads.

This diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend to increase towards high frequencies if the tweeter gets disconnected, because the remaining speaker (woofer) would be out of its operating range

(high impedance). The diagnostic decision is made according to peak output current thresholds, and it is enabled by setting (IB2-D2) = 1. Two different detection levels are available:

● HIgh current threshold IB2 (D7) = 0

– Iout > 500 mApk = normal status

– Iout < 250 mApk = open tweeter

● Low current threshold IB2 (D7) = 1

– Iout > 250 mApk = normal status

– Iout < 125 mApk = open tweeter

To correctly implement this feature, it is necessary to briefly provide a signal tone (with the amplifier in "play") whose frequency and magnitude are such to determine an output current higher than 500mApk with IB2(D7)=0 (higher than 250mApk with IB2(D7)=1) in normal conditions and lower than 250 mApk with IB2(D7)=0 (lower than 125 mApk with IB2(D7)=1) should the parallel tweeter be missing.

The test has to last for a minimum number of 3 sine cycles starting from the activation of the

AC diagnostic function IB2<D2>) up to the I

2

C reading of the results (measuring period). To confirm presence of tweeter, it is necessary to find at least 3 current pulses over the above threholds over all the measuring period, else an "open tweeter" message will be issued.

The frequency / magnitude setting of the test tone depends on the impedance characteristics of each specific speaker being used, with or without the tweeter connected

(to be calculated case by case). High-frequency tones (> 10 kHz) or even ultrasonic signals are recommended for their negligible acoustic impact and also to maximize the impedance module's ratio between with tweeter-on and tweeter-off.

26/32 Doc ID 14103 Rev 3

TDA7575B Diagnostics functional description

Figure 37

shows the load impedance as a function of the peak output voltage and the relevant diagnostic fields.

This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.

Figure 37. Current detection high: load impedance |Z| vs. output peak voltage

Load |z| (Ohm)

50

30

20

Low current detection area

(Open load)

D5 = 1 of the DBx byres

Iout (peak) <250mA

Iout (peak) >500mA

10

5

3

2

1

1 2 3

High current detection area

(Normal load)

D5 = 0 of the DBx bytes

4

Vout (Peak)

5 6 7 8

IB2(D0) = 0

Figure 38. Current detection low: load impedance |Z| vs. output peak voltage

Load |z| (Ohm)

50

30

20

Low current detection area

(Open load)

D5 = 1 of the DBx byres

Iout (peak) <125mA

Iout (peak) >250mA

10

5

3

2

1

0.5

1

High current detection area

(Normal load)

D5 = 0 of the DBx bytes

1.5

2

Vout (Peak)

2.5

3 3.5

4

IB2(D0) = 1

When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I

2

C reading and faults removal, provided that the diagnostic is enabled.

This is true for both kinds of diagnostic (turn-on and permanent).

The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit with the 4



speaker unconnected is considered as double fault.

Doc ID 14103 Rev 3 27/32

Diagnostics functional description TDA7575B

Table 10.

Double fault table for turn-on diagnostic

S. GND (sc) S. GND (sk) S. Vs

S. GND (sc)

S. GND (sk)

S. GND

/

S. GND

S. GND

S. Vs + S.

GND

S. Vs

S. Vs

S. Across L.

Open L.

/

/

/

/

/

/

S. Vs

/

/

S. Across L.

S. GND

S. GND

S. Vs

S. Across L.

/

Open L.

S. GND

Open L. (*)

S. Vs

N.A.

Open L. (*)

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, in both the channels SO = CH+, and SK = CH-.

In permanent diagnostic the table is the same, with only a difference concerning open load

(*), which is not among the recognizable faults. Should an open load be present during the device's normal working, it would be detected at a subsequent turn-on diagnostic cycle (i.e. at the successive car radio turn-on).

All the results coming from I

2

C bus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic (turn-on and permanent), for offset detector.

To guarantee always resident functions, every kind of diagnostic cycles (turn-on, permanent, offset) will be reactivate after any I

2

C reading operation. So, when the micro reads the I

2

C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e.

The device is in turn-on state, with a short to GND, then the short is removed and micro reads I

2

C. The short to GND is still present in bytes, because it is the result of the previous cycle. If another I

2

C reading operation occurs, the bytes do not show the short). In general to observe a change in diagnostic bytes, two I

2

C reading operations are necessary.

7.7 I

2

C programming/reading sequences

●

●

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection):

Turn-on: (Standby OUT + DIAG enable) --- 500 ms (min) --- muting OUT

Turn-off: Muting IN --- 20 ms --- (DIAG disable + standby IN)

Car radio installation: DIAG enable (write) --- 20 0ms --- I

2

C read (repeat until all faults disappear).

– Offset test: device in play (no signal)

– Offset enable - 30 ms - I

2

C reading

(repeat I

2

C reading until high-offset message disappears).

28/32 Doc ID 14103 Rev 3

TDA7575B Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

® specifications, grade definitions and product status are available at: www.st.com

.

ECOPACK

®

is an ST trademark.

Figure 39. PowerSO36 (slug up) mechanical data and package dimensions

H h

L

N s

E4 e e3

G

DIM.

c

D

D1

D2

A

A2

A4

A5 a1 b

0.230

15.800

9.400

-

E 13.900

E1 10.900

E2

E3

-

5.800

mm inch

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

3.270

3.100

-

-

3.410 0.1287

3.180 0.1220

-

-

0.1343

0.1252

0.800

-

0.030

0.220

-

0.200

-

-

1.000 0.0315

-

-0.040 0.0012

0.380 0.0087

-

0.0079

-

-

0.0394

-

-0.0016

0.0150

-

-

-

1.000

-

-

-

-

0.320 0.0091

16.000 0.6220

9.800 0.3701

-

2.900

-

14.500 0.5472

11.100 0.4291

-

6.200 0.2283

-

-

-

0.0394

-

-

-

-

0.0126

0.6299

0.3858

-

0.5709

0.4370

0.1142

0.2441

2.900

-

-

0

15.500

-

0.800

-

-

-

0.650

11.050

-

-

-

-

-

-

3.200 0.1142

-

-

0.075

-

0

-

0.0256

0.1260

-

0.4350

-

-

0.0031

15.900 0.6102

1.100

-

1.100 0.0315

10˚ -

8˚ -

-

-

-

-

-

0.6260

0.0433

0.0433

10˚

8˚

(1) “D and E1” do not include mold flash or protusions.

Mold flash or protusions shall not exceed 0.15mm (0.006”).

(2) No intrusion allowed inwards the leads.

OUTLINE AND

MECHANICAL DATA

PowerSO36 (SLUG UP)

Doc ID 14103 Rev 3

7183931 G

29/32

Package information

Figure 40.

Flexiwatt27 (vertical) mechanical data and package dimensions

DIM.

C

D

E

A

B

F (1)

G mm inch

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

4.45

4.50

4.65

0.175

0.177

0.183

1.80

1.90

2.00

0.070

0.074

0.079

1.40

0.055

0.75

0.90

1.05

0.029

0.035

0.041

0.37

0.39

0.42

0.014

0.015

0.016

0.57

0.022

0.80

1.00

1.20

0.031

0.040

0.047

G1 25.75

26.00

26.25

1.014

1.023

1.033

H (2) 28.90

29.23

29.30

1.139

1.150

1.153

H1

H2

17.00

12.80

0.669

0.503

H3 0.80

0.031

L (2) 22.07

22.47

22.87

0.869

0.884

0.904

L1 18.57

18.97

19.37

0.731

0.747

0.762

N

O

R

R1

R2

R3

L2 (2) 15.50

15.70

15.90

0.610

0.618

0.626

L3 7.70

7.85

7.95

0.303

0.309

0.313

L4 5 0.197

L5

M

M1

3.70

3.60

3.5

4.00

4.00

4.30

4.40

0.145

0.142

0.138

0.157

0.157

0.169

0.173

2.20

2

1.70

0.5

0.3

1.25

0.50

R4

V

V1

V2

V3

5˚ (Typ.)

3˚ (Typ.)

20˚ (Typ.)

45˚ (Typ.)

0.086

0.079

0.067

0.02

0.12

0.049

0.019

(1): dam-bar protusion not included

(2): molding protusion included

OUTLINE AND

MECHANICAL DATA

Flexiwatt27 (vertical)

TDA7575B

V

B

Pin 1

V3

G

H3

C

H

H1

G1

V

R3

H2

A

F

N

R4

R

R2

L L1

V1

V2

V1

R2

FLEX27ME

L5

R1

R1

M

R1

E

M1

D

7139011

30/32 Doc ID 14103 Rev 3

TDA7575B Revision history

Table 11.

Document revision history

Date Revision

30-Oct-2007

17-Dec-2009

17-Sep-2013

1

2

3

Changes

Initial release.

Updated

Figure 39: PowerSO36 (slug up) mechanical data and package dimensions on page 29 .

Updated Disclaimer.

Doc ID 14103 Rev 3 31/32

TDA7575B

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32/32 Doc ID 14103 Rev 3