STD86N3LH5
Automotive-grade N-channel 30 V, 0.0045
Ω
typ, 80 A STripFET H5
Power MOSFET in a DPAK package
Datasheet
-
production data
7$%
Features
Order code
STD86N3LH5
V
DSS
30 V
R
DS(on) max
< 0.005 Ω
I
D
80 A
• Designed for automotive applications and
AEC-Q101 qualified
• Low on-resistance R
DS(on)
• High avalanche ruggedness
• Low gate drive power losses
'3$.
Application
•
Switching applications
Figure 1. Internal schematic diagram
'7$%
Description
This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET™
H5 technology. The device has been optimized to achieve very low on-state resistance, contributing to a FoM that is among the best in its class.
*
6
Order code
STD86N3LH5
$0YB7DE
Table 1. Device summary
Marking Package
86N3LH5 DPAK
Packaging
Tape and reel
May 2015
This is information on a product in full production.
DocID15575 Rev 3 1/17 www.st.com
5
6
3
4
1
2
Contents
Contents
STD86N3LH5
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17 DocID15575 Rev 3
STD86N3LH5 Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
V
DS
V
DS
V
GS
I
D
(1)
I
D
I
DM
(2)
P
TOT
Drain-source voltage (V
GS
Drain-source voltage (V
GS
Gate-source voltage
= 0 V)
= 0 V) @ T
JMAX
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
C
C
= 25 °C
= 100 °C
Total dissipation at T
C
= 25 °C
Derating factor
E
AS
(3)
T stg
T j
Single pulse avalanche energy
Storage temperature
Max. operating junction temperature
1.
Limited by wire bonding
2.
Pulse width limited by safe operating area
3.
Starting Tj = 25°C, I
D
= 40 A, V
DD
= 25 V
Value
30
35
± 20
80
55
320
70
0.47
165
-55 to 175
175
Symbol
Table 3. Thermal resistance
Parameter
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case max
Thermal resistance junction-pcb max
1.
When mounted on 1 inch² FR-4 Oz Cu board
Value
2.14
50
Unit
A
W
W/°C mJ
°C
°C
V
A
A
V
V
Unit
°C/W
°C/W
DocID15575 Rev 3 3/17
17
Electrical characteristics STD86N3LH5
(T
CASE
= 25 °C unless otherwise specified)
Symbol Parameter
V
(BR)DSS
Drain-source breakdown
Voltage
V
I
I
DSS
GSS
GS(th)
Zero gate voltage drain current (V
GS
= 0 V)
Gate body leakage current
(V
DS
= 0 V)
Gate threshold voltage
R
DS(on)
Static drain-source on- resistance
Table 4. Static
Test conditions
I
D
= 250 µA, V
GS
= 0 V
V
DS
= 20 V
V
DS
= 20 V,Tc = 125 °C
V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 40 A
V
GS
= 5 V, I
D
= 40 A
Min.
Typ.
Max.
Unit
1
-
-
30
-
-
-
1
10
± 100 nA
V
µA
µA
-
1.8
2.5
V
0.0045
0.005
Ω
0.0055 0.0065
Ω
Symbol
C iss
C oss
C
Q g
Q gs
Q gd
Q
Q rss gs1 gs2
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Pre V th
gate-to-source charge
Post V th
gate-to-source charge
R
G
Gate input resistance
Table 5. Dynamic
V
V
V
DS
GS
DD
V
GS
Test conditions
= 25 V, f=1 MHz,
= 0 V
= 15 V, I
= 5 V
Figure 16
D
= 80 A
V
DD
= 15 V, I
D
= 80 A
V
GS
= 5 V
Figure 16
f = 1 MHz gate bias
Bias = 0 test signal level = 20 mV, open drain
-
-
-
-
Min.
Typ.
Max.
Unit
-
1850
380
-
pF pF
58 pF
14
6.8
4.7
2.3
-
-
-
nC nC nC nC
-
4.5
1.2
-
nC
Ω
4/17 DocID15575 Rev 3
STD86N3LH5 Electrical characteristics
Symbol t d(on) t r t d(off) t f
Table 6. Switching on/off (inductive load)
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 15 V, I
D
= 40 A,
R
G
= 4.7 Ω, V
GS
= 5 V
Figure 15
Min.
Typ.
Max.
Unit
-
-
-
-
6
14
23.6
10.8
-
-
-
ns ns ns ns
Symbol Parameter
Table 7. Source drain diode
Test conditions
I
SD
I
SDM
(1)
V
SD
(2)
I t
Q rr rr
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1.
Pulse width limited by safe operating area
2.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 40 A, V
GS
= 0
I
SD
= 80 A, di/dt = 100 A/µs,
V
DD
= 20 V
Figure 17
-
-
-
Min.
Typ.
Max.
Unit
-
80
320
1.1
31.8
26.1
A
A
V ns nC
1.6
A
DocID15575 Rev 3 5/17
17
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area
STD86N3LH5
Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized B
VDSS
vs temperature Figure 7. Static drain-source on resistance
AM03396v1
R
DS(on)
(m
Ω
)
6.5
6.0
V
GS
=5V
5.5
5.0
V
GS
=10V
4.5
4.0
3.5
3.0
0 10 20 30 40 50 60 70 80 I
D
(A)
6/17 DocID15575 Rev 3
STD86N3LH5
Figure 8. Gate charge vs gate-source voltage
Electrical characteristics
Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage vs temperature
Figure 11. Normalized on resistance vs temperature
Figure 12. Source-drain diode forward characteristics
DocID15575 Rev 3 7/17
17
Test circuit
3 Test circuit
STD86N3LH5
Figure 13. Switching times test circuit for resistive load
Figure 14. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
GS
V
D
R
G
R
L
D.U.T.
2200
μ
F
3.3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ F
I
G
=CONST
2.7k
Ω
100 Ω
D.U.T.
V
G
P
W
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
47k
Ω
P
W
1k
Ω
AM01469v1
Figure 16. Unclamped inductive load test circuit
25 Ω
G
D
A
D.U.T.
S
B
R
G
A
FAST
DIODE
A
B
B
G
D
S
L=100 μ H
3.3
μ F
1000
μ F
V
DD
V i
AM01470v1
Figure 17. Unclamped inductive waveform
V
D
V
(BR)DSS
V
D
I
D
L
2200
μ F
3.3
μ F
V
DD
D.U.T.
P w
AM01471v1
Figure 18. Switching time waveform t on td on t r t off td off t f
I
DM
90%
90%
10%
I
D 0
10% V
DS
V
DD
V
DD
90%
V
GS
AM01472v1
0
10%
AM01473v1
8/17 DocID15575 Rev 3
STD86N3LH5
Figure 19. Gate charge waveform
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2 Qgd
Test circuit
DocID15575 Rev 3 9/17
17
Package information STD86N3LH5
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
10/17 DocID15575 Rev 3
STD86N3LH5
Figure 20. DPAK (TO-252) type A2 outline
Package information
DocID15575 Rev 3
BW\SH$BUHY
11/17
17
Package information
Dim.
E1 e e1
H
L
L1
L2
L4
R
V2 b4 c c2
D
D1
E
A
A1
A2 b
STD86N3LH5
Table 8. DPAK (TO-252) type A2 mechanical data mm
Typ.
Min.
5.20
0.45
0.48
6.00
4.95
6.40
2.20
0.90
0.03
0.64
5.10
2.16
4.40
9.35
1.00
2.60
0.65
0.60
5.10
5.20
2.28
2.80
0.80
0.20
0°
Max.
5.40
0.60
0.60
6.20
5.25
6.60
2.40
1.10
0.23
0.90
5.30
2.40
4.60
10.10
1.50
3.00
0.95
1.00
8°
12/17 DocID15575 Rev 3
STD86N3LH5
Figure 21. DPAK (TO-252) footprint
(a)
Package information
)3BB5 a.
All dimensions are in millimeters
DocID15575 Rev 3 13/17
17
Packing information STD86N3LH5
T
Top cover tape
Figure 22. Tape for DPAK (TO-252)
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
F
E
W
User direction of feed
R
Bending radius
AM08852v1
14/17 DocID15575 Rev 3
STD86N3LH5
A
REEL DIMENSIONS
Figure 23. Reel for DPAK (TO-252)
40mm min.
Access hole
At sl ot location
B
D
C
Packing information
T
N
Dim.
R
T
W
K0
P0
P1
P2
D
D1
E
F
A0
B0
B1
Full radius Tape slot in core for tape start 25 mm min.
width
G measured at hub
AM08851v2
2.55
3.9
7.9
1.9
1.5
1.5
1.65
7.4
40
0.25
15.7
Min.
6.8
10.4
Table 9. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm mm
Dim.
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
Max.
330
13.2
18.4
22.4
2500
2500
DocID15575 Rev 3 15/17
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Revision history
Date
10-Apr-2009
22-Mar-2011
13-May-2015
Revision
Table 10. Document revision history
Changes
1
2
3
First release.
V
GS
value has been corrected in Table 2
and
Table 4 .
Updated title, features and description in cover page.
Updated Section 4: Package information
.
STD86N3LH5
16/17 DocID15575 Rev 3
STD86N3LH5
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DocID15575 Rev 3 17/17
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