STW26NM50
N-channel 500 V, 0.10 Ω , 30 A TO-247
MDmesh™ Power MOSFET
Features
Type
STW26NM50
V
DSS
500 V
R
DS(on) max
< 0.12 Ω
■
■
■
High dv/dt and avalanche capabilities
Improved ESD capability
Low input capacitance and gate charge
I
D
30 A
Application
■ Switching applications
Description
MDmesh™ technology applies the benefits of the multiple drain process to STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product offers low onresistance, high dv/dt capability and excellent avalanche characteristics.
TO-247
1
2
3
Figure 1.
Internal schematic diagram
$
'
3
!-V
Table 1.
Device summary
Order codes
STW26NM50
Marking
W26NM50
Package
TO-247
Packaging
Tube
October 2009 Doc ID 8291 Rev 11 1/12 www.st.com
12
3
4
5
1
2
Contents
Contents
STW26NM50
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 8291 Rev 11
STW26NM50 Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
V
I
DS
GS
D
I
D
I
DM
(1)
P
TOT
Drain-source voltage (V
GS
= 0)
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Derating factor
V
ESD(G-S) dv/dt
(2)
Gate source ESD (HBM-C=100 pF, R=1.5 k
Ω
)
Peak diode recovery voltage slope
T stg
T j
Storage temperature
Max. operating junction temperature
1.
Pulse width limited by safe operating area
2.
I
SD
≤ ≤
200 A/µs, V
DD
≤
V
(BR)DSS
, T
J
T
JMAX
Table 3.
Symbol
R thj-case
R thj-amb
T l
Thermal data
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Maximum lead temperature for soldering purpose
Table 4.
Symbol
I
AR
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by T j max
)
Single pulse avalanche energy
(starting T
J
=25 °C, I
D
=I
AR
, V
DD
=50 V)
Value
500
± 30
30
18.9
120
313
2.5
6000
15
-55 to 150
150
Value
0.4
62.5
300
Value
13
740
Unit
A mJ
Unit
°C/W
°C/W
°C
Unit
V
V
A
A
A
W
W/°C
V
V/ns
°C
°C
Doc ID 8291 Rev 11 3/12
Electrical characteristics STW26NM50
4/12
(T
CASE
= 25 °C unless otherwise specified)
Table 5.
Symbol
On/off states
Parameter
V
(BR)DSS
Drain-source breakdown voltage
V
I
I
DSS
GSS
GS(th)
Zero gate voltage drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
R
DS(on)
Static drain-source on resistance
Test conditions Min.
Typ.
Max.
Unit
I
D
= 250 µA, V
GS
= 0
V
DS
= Max rating
V
DS
= Max rating, T
C
=125 °C
500
V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 13 A
3 4
10
100
± 10
5
0.10
0.12
V
µA
µA
µA
V
Ω
Table 6.
Symbol
Dynamic
Parameter Test conditions g fs
C
C
C
(1) iss oss rss
Forward transconductance V
DS
=15 V, I
D
=13 A
Input capacitance
Output capacitance
Reverse transfer
Capacitance
V
V
DS
GS
= 25 V, f = 1 MHz,
= 0
C oss eq.
(2)
Equivalent output capacitance
V
GS
= 0, V
DS
= 0 to 400 V
Min.
-
-
-
Typ.
20
3000
700
50
300
Max.
-
-
-
Unit
S pF pF pF pF
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
V
GS
= 400 V, I
= 10 V,
D
(see Figure 15)
= 26 A,
-
76
20
36
-
1.
Pulsed: pulse duration=300 µs, duty cycle 1.5%
2.
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss increases from 0 to 80% V
DS
when V
DS nC nC nC
Table 7.
Symbol t d(on) t r t d(off) t f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
V
DD
= 250 V, I
D
= 13 A,
R
G
= 4.7
Ω
, V
GS
=10 V,
(see Figure 15)
Min.
Typ.
Max. Unit
-
28
15
13
19
ns ns ns ns
Doc ID 8291 Rev 11
STW26NM50 Electrical characteristics
Table 8.
Symbol
Source drain diode
Parameter Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
I
SD
= 26 A, V
GS
= 0
= 26 A, di/dt = 100 A/µs
V
DD
= 100 V
(see Figure 16)
1.
Pulse width limited by safe operating area
2.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 26 A, di/dt = 100 A/µs
V
DD
= 100 V, T j
= 150 °C
(see Figure 16)
Min Typ.
Max Unit
-
-
-
-
400
5.5
27.8
492
7
28.8
26
104
1.5
ns
µC
A ns
µC
A
A
A
V
Table 9.
Symbol
BV
GSO
Gate-source Zener diode
Parameter
Gate-source breakdown voltage
Test conditions
Igs=± 1 mA (open drain)
Min.
Typ.
Max. Unit
30 V
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.
Doc ID 8291 Rev 11 5/12
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STW26NM50
Figure 4.
Output characteristics Figure 5.
Transfer characteristics
Figure 6.
Transconductance Figure 7.
Static drain-source on resistance
6/12 Doc ID 8291 Rev 11
STW26NM50 Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
Figure 10.
Normalized gate threshold voltage vs temperature
Figure 11.
Normalized on resistance vs temperature
Figure 12.
Source-drain diode forward characteristics
Figure 13.
Normalized B
VDSS
vs temperature
AM0 3838 v1
BV
D SS
(norm)
1.0
8
I
D
= 1 mA
1.04
1.00
0.96
0.92
-75 -50 -25 0 25 50 75 100 125 T
J
(°C)
Doc ID 8291 Rev 11 7/12
Test circuits
3 Test circuits
STW26NM50
Figure 14.
Switching times test circuit for resistive load
Figure 15.
Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
G S
V
D
R
G
R
L
D.U.T.
2200
µ
F
3 .
3
µ
F
V
DD
V i
=20V=V
GMAX
2200
µ F
I
G
=CON S T
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 16.
Test circuit for inductive load switching and diode recovery times
Figure 17.
Unclamped inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 µ H
3 .
3
µ F
1000
µ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
µ F
3 .
3
µ F
V
DD
P w
AM01470v1
Figure 18.
Unclamped inductive waveform
V
(BR)D SS
V
D
Figure 19.
Switching time waveform t on t off t r td on td off t f
AM01471v1
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
8/12 Doc ID 8291 Rev 11
STW26NM50
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
Doc ID 8291 Rev 11 9/12
Package mechanical data
Dim.
L1
L2
øP
øR
E e c
D
L
S
A
A1 b b 1 b 2
STW26NM50
TO-247 mechanical data
mm.
Typ.
Min.
4.
8 5
2.20
1.0
2.0
3 .0
0.40
1 9 .
8 5
15.45
5.45
14.20
3 .70
1 8 .50
3 .55
4.50
5.50
14.
8 0
4.
3 0
3 .65
5.50
Max.
5.15
2.60
1.40
2.40
3 .40
0.
8 0
20.15
15.75
10/12 Doc ID 8291 Rev 11
STW26NM50 Revision history
Table 10.
Document revision history
Date Revision
24-Jun-2004
07-Feb-2005
02-Oct-2009
9
10
11
Changes
New stylesheet.
I
D
value changed
Modified: test condition of V
(BR)DSS in
Table 5
Doc ID 8291 Rev 11 11/12
STW26NM50
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12/12 Doc ID 8291 Rev 11
