STY80NM60N
N-channel 600 V, 0.030 Ω , 74 A, MDmesh™ II Power MOSFET
Max247
Features
Type
STY80NM60N
V
DSS
@
T
Jmax
650 V
R
DS(on) max
< 0.035 Ω
■
■
■
■
The worldwide best R
DS(on)
in Max247
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
I
D
74 A
Applications
■ Switching applications
Description
This device is an N-channel Power MOSFET developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters.
Max247
1
2
3
Figure 1.
Internal schematic diagram
Table 1.
Device summary
Order code
STY80NM60N
Marking
80NM60N
Package
Max247
Packaging
Tube
July 2011 Doc ID 14210 Rev 6 1/12 www.st.com
12
3
4
5
1
2
Contents
Contents
STY80NM60N
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 14210 Rev 6
STY80NM60N Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT dv/dt
(2)
Drain-source voltage (V
Gate- source voltage
GS
= 0)
Drain current (continuous) at T
C
Drain current (continuous) at T
C
Drain current (pulsed)
= 25 °C
= 100 °C
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
T stg
T j
Storage temperature
Max. operating junction temperature
1.
Pulse width limited by safe operating area
2.
I
SD
≤ 74 A, di/dt ≤
DSpeak
V
(BR)DSS,
V
DD
= 80% V
(BR)DSS
Value
600
±25
74
46
296
447
15
–55 to 150
150
Table 3.
Symbol
Thermal data
R thj-case
R thj-amb
T l
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Maximum lead temperature for soldering purpose
Value
0.28
30
300
Table 4.
Symbol
Avalanche characteristics
Parameter
I
AS
E
AS
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
Single pulse avalanche energy
(starting Tj = 25°C, I
D
= I
AS
, V
DD
= 50 V)
Value
25
2
Unit
°C/W
°C/W
°C
Unit
A
A
W
V/ns
V
V
A
°C
°C
Unit
A
J
Doc ID 14210 Rev 6 3/12
Electrical characteristics STY80NM60N
(T
CASE
=25 °C unless otherwise specified)
Table 5.
Symbol
On/off states
Parameter Test conditions Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source breakdown voltage (V
GS
= 0)
I
D
= 1 mA dv/dt
V
R
I
I
DSS
(1)
GSS
GS(th)
DS(on)
Drain source voltage slope
Zero gate voltage drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
Static drain-source on resistance
V
DD
= 480 V, I
D
= 74 A,
V
GS
= 10 V
V
V
V
V
DS
V
DS
GS
DS
GS
1.
Characteristic value at turn off on inductive load.
= max rating
= max rating, T
C
= ± 20 V
= V
GS
, I
= 10 V, I
D
D
= 37 A
=
= 250 µA
125 °C
600
2
48
3
10
100
100
4
V
V/ns
µA
µA nA
V
0.030 0.035
Ω
Table 6.
Symbol g fs
(1)
Dynamic
Parameter Test conditions
C
C
C oss
R iss rss g
Forward transconductance V
DS
=15 V
,
I
D
= 37 A
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
= 50 V, f = 1 MHz,
= 0
C oss eq.
(2)
Equivalent output capacitance
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
Gate input resistance
V
V
GS
DD
V
GS
= 0, V
DS
= 0 to 480 V
= 480 V, I
= 10 V,
D
(see Figure 15)
= 74 A, f=1 MHz Gate DC Bias=0
Test signal level = 20 mV open drain
Min.
Typ.
Max. Unit
12
10100
455
26
1300
360
85
160
2.0
1.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
2.
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss increases from 0 to 80% V
DS
when V
DS
S pF pF pF pF nC nC nC
Ω
4/12 Doc ID 14210 Rev 6
STY80NM60N
Table 7.
Symbol t d(on) t r t d(off) t f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Electrical characteristics
Test conditions
V
DD
= 300 V, I
D
= 37 A
R
G
= 4.7
Ω V
GS
(see Figure 14)
= 10 V
Min.
Typ.
Max. Unit
50
65
440
200 ns ns ns ns
Table 8.
Symbol
Source drain diode
Parameter Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
I
SD
= 74 A, V
GS
= 0
= 74 A, di/dt = 100 A/µs
V
DD
= 100 V, T j
= 25 °C
(see Figure 16)
1.
Pulse width limited by safe operating area .
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 74 A, di/dt = 100 A/µs
V
DD
= 100 V, T j
= 150 °C
(see Figure 16)
Min.
Typ.
Max.
Unit
700
25
65
840
30
69
74
296
1.5
ns
µC
A ns
µC
A
A
A
V
Doc ID 14210 Rev 6 5/12
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STY80NM60N
Figure 4.
Output characteristics Figure 5.
Transfer characteristics
Figure 6.
Transconductance Figure 7.
Static drain-source on resistance
6/12 Doc ID 14210 Rev 6
STY80NM60N Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
HV42900
HV42 8 90
V
G S
(V)
C(pF)
12
10
V
G S
=10V
V
DD
=4 8 0V
I
D
=74A
10000
Ci ss
1000
8 Co ss f=1MHz
V
G S
=0
6
100
Cr ss
4
10
2
0
0 100 200 3 00 400
Q g
(nC)
1
1 10 100
Figure 10.
Normalized gate threshold voltage vs temperature
Figure 11.
Normalized on resistance vs temperature
V
D S
(V)
Figure 12.
Source-drain diode forward characteristics
Figure 13.
Normalized BV
DSS
vs temperature
Doc ID 14210 Rev 6 7/12
Test circuits
3 Test circuits
Figure 14. Switching times test circuit for resistive load
Figure 15. Gate charge test circuit
STY80NM60N
Figure 16. Test circuit for inductive load switching and diode recovery times
Figure 17. Unclamped inductive load test circuit
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
8/12 Doc ID 14210 Rev 6
STY80NM60N
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Doc ID 14210 Rev 6 9/12
Package mechanical data
Table 9.
Max247 mechanical data
Dim.
b2 c
D e
A
A1 b b1
E
L
L1
Figure 20.
Max247 drawing
Min.
4.70
2.20
1.00
2.00
3.00
0.40
19.70
5.35
15.30
14.20
3.70
mm
Typ.
STY80NM60N
Max.
5.30
2.60
1.40
2.40
3.40
0.80
20.30
5.55
15.90
15.20
4.30
10/12
0094 33 0_Rev_D
Doc ID 14210 Rev 6
STY80NM60N Revision history
Table 10.
Document revision history
Date Revision
29-Nov-2007
04-Dec-2007
04-Aug-2008
14-Nov-2008
04-Feb-2009
06-Jul-2011
1
2
3
4
5
6
Changes
First release.
Header has been corrected.
Document status promoted: from preliminary data to datasheet.
Figure 13: Normalized BV
DSS
vs temperature
has been
corrected.
Figure 7: Static drain-source on resistance
has been corrected.
Modified I
DSS value in
Table 5: On/off states .
Doc ID 14210 Rev 6 11/12
STY80NM60N
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12/12 Doc ID 14210 Rev 6
