STFU18N65M2
Nchannel 650 V, 0.275 Ω typ., 12 A MDmesh™ M2
Power MOSFET in a TO-220FP ultra narrow leads package
Datasheet - production data
1
2
3
TO-220FP ultra narrow leads
Figure 1: Internal schematic diagram
D(2)
G(1)
Features
Order code V
DS
R
DS(on)
max I
D
STFU18N65M2 650 V 0.33 Ω 12 A
Extremely low gate charge
Excellent output capacitance (C oss
) profile
100% avalanche tested
Zener-protected
Applications
Switching applications
LLC converters, resonant converters
Description
This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters.
Order code
STFU18N65M2
S(3)
AM15572v1_no_tab
Table 1: Device summary
Marking Package
18N65M2
TO-220FP ultra narrow leads
Packaging
Tube
October 2015 DocID027562 Rev 2
This is information on a product in full production.
1/12 www.st.com
Contents
Contents
STFU18N65M2
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuit ....................................................................................... 8
4 Package mechanical data ............................................................... 9
4.1
TO-220FP unl package information .................................................. 9
5 Revision history ............................................................................ 11
2/12 DocID027562 Rev 2
STFU18N65M2
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
Electrical ratings
V
GS
Gate-source voltage
I
D
Drain current (continuous) at T
C
= 25 °C
I
D
Drain current (continuous) at T
C
= 100 °C
I
DM
(2)
Drain current (pulsed)
P
TOT
Total dissipation at T
C
= 25 °C
V
ISO
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T
C
= 25 °C)
dv/dt (3)
Peak diode recovery voltage slope
dv/dt (4)
MOSFET dv/dt ruggedness
T stg
T j
Storage temperature
Max. operating junction temperature
Value Unit
± 25
12 (1)
8 (1)
48 (1)
25
V
A
A
A
W
V 2500
15
50
- 55 to
150
V/ns
°C
Notes:
(1)
Limited by maximum junction temperature.
(2)
Pulse width limited by safe operating area.
(3)
I
SD
≤ 10 A, di/dt ≤ 400 A/µs; V
DSpeak
< V
(BR)DSS
, V
DD
= 400 V
(4)
V
DS
≤ 520 V
Symbol
Table 3: Thermal data
Parameter Value Unit
R thj-case
R thj-amb
Thermal resistance junction-case max
Thermal resistance junction-ambient max
5
62.5
Symbol
I
AR
E
AS
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (pulse width limited by T jmax
)
Single pulse avalanche energy (starting T j
= 25°C, I
D
= I
AR
; V
DD
= 50 V)
°C/W
°C/W
Value Unit
2 A
450 mJ
DocID027562 Rev 2 3/12
Electrical characteristics
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 5: On /off states
Test conditions
V
(BR)DSS
I
DSS
Drain-source breakdown voltage
Zero gate voltage drain current (V
GS
= 0)
I
GSS
Gate-body leakage current (V
DS
= 0)
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source on-resistance
I
D
= 1 mA, V
GS
= 0 V
V
DS
= 650 V
V
DS
= 650 V, T
C
= 125 °C
V
GS
= ± 25 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 6 A
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
Input capacitance
C oss
Output capacitance
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0 V
C rss
Reverse transfer capacitance
C
oss eq.
(1)
Equivalent output capacitance V
DS
= 0 to 520 V, V
GS
= 0 V
R
Q
Q
Q
G g gs gd
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge f = 1 MHz, I
D
= 0
V
DD
= 520 V, I
D
= 12 A,
V
GS
= 10 V ( see Figure 15:
"Test circuit for gate charge behavior" )
STFU18N65M2
Min. Typ. Max. Unit
650
2 3
V
1 µA
100 µA
±10 µA
4 V
0.275 0.33
Ω
Min. Typ. Max. Unit
-
-
-
-
-
-
-
-
770
35
1.2
175
6.1
20
3.6
8.5
-
-
-
-
-
-
-
- pF pF pF pF
Ω nC nC nC
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
Symbol Parameter
Table 7: Switching times
Test conditions Min. Typ. Max. Unit t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time t f
Fall time
V
DD
= 325 V, I
D
= 6 A, R
G
= 4.7 Ω,
V
GS
= 10 V ( see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform" )
-
-
-
-
11
7.5
46
12.5
-
-
-
- ns ns ns ns
4/12 DocID027562 Rev 2
STFU18N65M2
Symbol Parameter
I
SD
Source-drain current
I
SDM
(1)
Source-drain current
(pulsed)
V
SD
(2)
Forward on voltage t rr
Q rr
Reverse recovery time
Reverse recovery charge
I
I
RRM t
Q rr rr
RRM
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 8: Source drain diode
Test conditions
I
I
I
SD
SD
V
= 12 A, V
DD
GS
= 0 V
circuit for inductive load switching and diode recovery times"
SD
V
= 12 A, di/dt = 100 A/µs,
= 60 V ( see
)
Figure 16: "Test
= 12 A, di/dt = 100 A/µs,
DD
= 60 V, T j
= 150 °C, (see
Figure 16: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
- 12 A
- 48 A
-
- 331
1.6 V ns
- 3.4 µC
-
-
-
-
20.5
462
4.6
20
A ns
µC
A
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DocID027562 Rev 2 5/12
Electrical characteristics
2.1 Electrical characteristics (curves)
I
D
(A)
Figure 2: Safe operating area
GIPG070120151641FSR
STFU18N65M2
Figure 3: Thermal impedance
10
1
0.1
0.1
O pe ra tio n te d
Li mi in
t hi s are ma x
R a is
D
S
(o n) by
10 µs
100 µs
1 10
Tj=150°C
Tc=25°C
Single pulse
100
1ms
10 ms
V
DS
(V)
Figure 4: Output characteristics
I
D
(A)
GIPG161220141431ALS
V
GS
= 6,7,8,9,10 V
25
V
GS
= 5 V
20
15
10
5
V
GS
= 4 V
0
0 4 8 12 16 V
DS
(V)
Figure 6: Gate charge vs gate-source voltage
V
GS
(V)
GIPG161220141455ALS
V
DS
(V)
12 600
V
DS
I
D
= 520V
= 12 A
10 500
8
6
4
2
0
0 4 8 12 16
400
300
200
20
100
0
Qg(nC)
6/12 DocID027562 Rev 2
10
5
0
0
20
15
I
D
(A)
Figure 5: Transfer characteristics
GIPG161220141436ALS
25
V
DS
= 16 v
2 4 6 8 V
GS
(V)
Figure 7: Static drain-source on-resistance
R
DS(on)
(Ω)
GIPG161220141505ALS
0.290
0.285
0.280
V
GS
= 10 V
0.275
0.270
0.265
0 2 4 6 8 10 12 I
D
(A)
STFU18N65M2
C
(pF)
Figure 8: Capacitance variations
GIPG161220141520ALS
Electrical characteristics
Figure 9: Output capacitance stored energy
E
OSS
(µJ)
GIPG161220141616ALS
6
1000
C iss
5
4
100
3
C oss
2
10
1
1
0.1
1.1
1 10 100
Figure 10: Normalized gate threshold voltage vs temperature
V
GS(th)
(norm)
GIPG161220141528ALS
I
D
= 250 µ A
C rss
V
DS
(V)
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 11: Normalized on-resistance vs temperature
R
DS(on)
(norm)
GIPG161220141538ALS
2.2
1.0
1.8
0.9
1.4
V
GS
= 10 V
1.0
0.8
0.6
0.7
0.2
-75 -25 25 75 125 T
J
(°C)
0.6
-75 -25 25 75 125 T
J
(°C)
Figure 12: Source-drain diode forward characteristics
V
SD
(V)
GIPG121620141553ALS
Figure 13: Normalized V(BR)DSS vs temperature
V
(BR)DSS
(norm)
GIPG121620141601ALS
1.08
1.2
T
J
=-50°C 1.04
I
D
= 1 m A
1.0
1.00
0.8
T
J
=25°C
T
J
=150°C
0.96
0.6
0.4
0 2 4 6 8 10 12 I
SD
(A)
0.92
0.88
-75 -25 25 75 125 T
J
(°C)
DocID027562 Rev 2 7/12
Test circuit
3 Test circuit
Figure 14: Test circuit for resistive load switching times
STFU18N65M2
Figure 15: Test circuit for gate charge behavior
8/12
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
DocID027562 Rev 2
STFU18N65M2
4
4.1
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
TO-220FP unl package information
Figure 20: TO-220FP ultra narrow leads package outline
DocID027562 Rev 2
8576148_1
9/12
Package mechanical data
Table 9: TO-220FP ultra narrow leads mechanical data mm
Min. Typ.
10.00
15.10
28.50
10.20
2.50
15.60
9.00
4.40
2.50
2.50
0.45
0.65
-
4.95
2.40
3.20
-
3.00
2.54
STFU18N65M2
Max.
10.40
15.90
30.50
11.00
3.10
16.40
9.30
4.60
2.70
2.75
0.60
0.75
0.90
5.20
2.70
3.60
1.30
3.20
Dim.
H
L2
L3
L4
L5
L6
L7
F
F1
G
G1
A
B
D
E
L8
L9
Dia.
10/12 DocID027562 Rev 2
STFU18N65M2
5 Revision history
Date
05-Mar-2015
07-Oct-2015
Revision
1
2
Table 10: Document revision history
Changes
Revision history
Initial release
Document status promoted from preliminary to production data.
DocID027562 Rev 2 11/12
STFU18N65M2
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12/12 DocID027562 Rev 2
