STE48NM60
N-CHANNEL 650V @ Tjmax - 0.09
Ω
- 48A ISOTOP
MDmesh™ MOSFET
Table 1: General Features
TYPE V
DSS
(
@
Tjmax)
R
DS(on)
I
D
■
■
■
STE48NM60 650V < 0.11
Ω
48 A
TYPICAL R
DS
(on) = 0.09
Ω
HIGH dv/dt AND AVALANCHE CAPABILITIES
100% AVALANCHE TESTED
■
■
■
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products.
Figure 1: Package
ISOTOP
Figure 2: Internal Schematic Diagram
APPLICATIONS
The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies.
Obsolete Product(s) - Obsolete Product(s)
SALES TYPE
STE48NM60
MARKING
E48NM60
PACKAGE
ISOTOP
PACKAGING
TUBE
Rev. 2
1/9 March 2005
STE48NM60
Table 3: Absolute Maximum ratings
Symbol Parameter
V
GS
I
D
I
D
I
DM
( )
P
TOT
Gate- source Voltage
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope dv/dt (1)
V
ISO
T stg
Insulation Winthstand Voltage (AC-RMS)
Storage Temperature
T j
Max. Operating Junction Temperature
( ) Pulse width limited by safe operating area
(1) I
SD
≤
48A, di/dt
≤
400 A/µs, V
DD
≤
V
(BR)DSS
, T j
≤
T
JMAX.
Table 4: Thermal Data
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb Thermal Resistance Junction-ambient Max
T l
Maximum Lead Temperature For Soldering Purpose
(*) with conductive GREASE Applies
Table 5: Avalanche Characteristics
Symbol Parameter
I
AR
E
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j
max)
Single Pulse Avalanche Energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 35 V)
Value
±30
48
30
192
450
3.57
15
2500
–65 to 150
150
0.28
30
300
Max Value
15
850
Unit
V
A
A
A
W
W/°C
V/ns
V
°C
°C
°C/W
°C/W
°C
Unit
A mJ
ELECTRICAL CHARACTERISTICS (T
CASE
=25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Symbol Parameter Test Conditions Min.
Typ.
Max.
Unit
V
(BR)DSS
I
D
= 250 µA, V
GS
= 0 600 V
I
DSS
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125°C
10
100
µA
µA
V
GS(th)
DS
= 0)
V
GS
= ±30V
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250µA
±100 nA I
GSS
Gate-body Leakage
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3 4 5 V
Obsolete Product(s) - Obsolete Product(s)
Ω
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STE48NM60
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Symbol Parameter Test Conditions g fs
C
(1) iss
C oss
C rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
C oss eq.
(2) Equivalent Output
Capacitance
R
G
Gate Input Resistance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 24A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
V
GS
= 0V, V
DS
= 0V to 480V t d(on) t r t r(Voff) t f t c
Q g
Q gs
Q gd
Turn-on Delay Time
Rise Time
Off-voltage Rise Time
Fall Time
Cross-over Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
V
DD
= 250V, I
D
= 22.5A R
G
V
GS
= 10V
(see Figure 14)
= 4.7
Ω
V
DD
= 400V, I
D
= 45A, R
G
V
GS
= 10V
= 4.7
Ω,
V
DD
= 400V, I
D
= 45A,
V
GS
= 10V
(see Figure 18)
Min.
Typ.
20
3800
1250
80
Max.
Unit
S pF pF pF
340
1.4
30
20
16
23
40
96
31
43
134 pF
Ω ns ns ns ns ns nC nC nC
Table 8: Source Drain Diode
Symbol
I
SD
Parameter
Source-drain Current
Test Conditions Min.
Typ.
Max.
48
Unit
A
I
SDM
(2)
V
SD
(1) t rr
Q rr
I
RRM
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
I
SD
= 45A, V
GS
= 0
SD
= 45A, di/dt = 100A/µs,
V
DD
= 100 V, T
(see Figure 16)
j
= 25°C
508
10
40
192
1.5
A
V ns
µC
A t rr
Q rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 45A, di/dt = 100A/µs,
V
DD
= 100 V, T
(see Figure 16)
j
= 150°C
650
14
43 ns
µC
A
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS
increases from 0 to 80%
V
DSS
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STE48NM60
Figure 3: Safe Operating Area Figure 6: Thermal Impedance
Figure 4: Output Characteristics Figure 7: Transfer Characteristics
Figure 5: Transconductance Figure 8: Static Drain-source On Resistance
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Figure 9: Gate Charge vs Gate-source Voltage
STE48NM60
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
Figure 11: Source-Drain Diode Forward Characteristics
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STE48NM60
Figure 14: Unclamped Inductive Load Test Circuit
Figure 17: Unclamped Inductive Wafeform
Figure 15: Switching Times Test Circuit For
Resistive Load
Figure 18: Gate Charge Test Circuit
Figure 16: Test Circuit For Inductive Load
Switching and Diode Recovery Times
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STE48NM60
DIM.
G
H
J
E
F
C
D
A
B
M
N
K
L
O
MIN.
11.8
8.9
1.95
0.75
12.6
25.15
31.5
4
4.1
14.9
30.1
37.8
4
7.8
ISOTOP MECHANICAL DATA mm
TYP.
MAX.
12.2
9.1
2.05
0.85
12.8
25.5
31.7
4.3
15.1
30.3
38.2
8.2
MIN.
0.466
0.350
0.076
0.029
0.496
0.990
1.240
0.157
0.161
0.586
1.185
1.488
0.157
0.307
inch
TYP.
B
A
O
G
MAX.
0.480
0.358
0.080
0.033
0.503
1.003
1.248
0.169
0.594
1.193
1.503
0.322
N
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J Obsolete Product(s) - Obsolete Product(s)
L
M
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STE48NM60
Table 9: Revision History
Date
30/Mar/2005
Revision
2 Modified value in table 7
Description of Changes
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STE48NM60
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
The ST logo is a registered trademark of STMicroelectronics Obsolete Product(s) - Obsolete Product(s)
© 2005 STMicroelectronics - All Rights Reserved
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