STE70N60DM2
Nchannel 600 V, 0.037 Ω typ., 70 A MDmesh™ DM2
Power MOSFET in a ISOTOP™ package
Datasheet - target specification
Figure 1: Internal schematic diagram
D(3)
G(2)
Features
Order code V
DS
@T jmax
R
DS(on)
max
STE70N60DM2 650 V 0.042 Ω
Fast-recovery body diode
Extremely low gate charge and input
capacitance
Low on-resistance R
DS(on)
100% avalanche tested
Extremely high dv/dt and avalanche capabilities
Zener-protected
I
D
70 A
Applications
Switching applications
Description
This high voltage N-channel Power MOSFET is part of the MDmesh DM2 fast recovery diode series. It offers very low recovery charge and time (Q rr
, t rr
) combined with low R
DS(on)
, rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and
ZVS phase-shift converters.
Order code
STE70N60DM2
S(1, 4)
GIPD030420151535FSR
Table 1: Device summary
Marking Packages
70N60DM2 ISOTOP
Packaging
Tube
April 2015 DocID027703 Rev 1
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1/11 www.st.com
Contents
Contents
STE70N60DM2
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
3 Test circuits ..................................................................................... 6
4 Package information ....................................................................... 7
4.1
ISOTOP package information ........................................................... 8
5 Revision history ............................................................................ 10
2/11 DocID027703 Rev 1
STE70N60DM2
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
Gate- source voltage
I
D
Drain current (continuous) at T
C
= 25 °C
I
D
Drain current (continuous) at T
C
= 100 °C
I
DM
(1)
Drain current (pulsed)
P
TOT
Total dissipation at T
C
= 25 °C
I
AR
Max current during repetitive or single pulse avalanche (pulse width limited by T
JMAX
)
E
AS
Single pulse avalanche energy
(starting T j
= 25°C, I
D
= I
AR
, V
DD
= 50V)
dv/dt (2)
Peak diode recovery voltage slope
dv/dt (3)
MOSFET dv/dt ruggedness
V
T
ISO stg
T j
Isolation withstand voltage applied between each pin and heatsink plate (AC voltage, t = 60 s)
Storage temperature
Max. operating junction temperature
Notes:
(1)
Pulse width limited by safe operating area.
(2)
I
SD
≤ 68 A, di/dt = 400 A/µs, V
DD
= 400 V, V
DS (peak)
< V
(BR)DSS.
(3)
V
DS
≤ 480 V
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Electrical ratings
Value
0.253
30
Value
± 25
70
44
280
494
10
1500 mJ
40
50
V/ns
V/ns
2500 V
- 55 to 150 °C
150 °C
Unit
V
A
A
A
W
A
Unit
°C/W
°C/W
DocID027703 Rev 1 3/11
Electrical characteristics
2 Electrical characteristics
STE70N60DM2
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4: On /off states
Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source breakdown voltage I
D
= 1 mA, V
GS
= 0
V
DS
= 600 V
I
DSS
Zero gate voltage drain current (V
GS
= 0)
V
DS
= 600 V,
T
C
=125 °C
V
I
GSS
GS(th)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
V
GS
= ± 25 V
600
V
DS
= V
GS
, I
D
= 250 µA 3
R
DS(on)
Static drain-source on- resistance V
GS
= 10 V, I
D
= 34 A
Symbol Parameter
Table 5: Dynamic
Test conditions
10
V
µA
100 µA
±5 µA
4 5 V
0.037 0.042
Ω
Min. Typ. Max. Unit
-
-
5500
250
-
- pF pF
C
C
C
R oss
Q
Q
Q iss rss
G g gs gd
C
oss.eq
(1)
Input capacitance
Output capacitance V
DS
= 100 V, f = 1 MHz,
V
GS
= 0
Reverse transfer capacitance
Equivalent output capacitance
V
GS
= 0, V
DS
= 0 to 480 V
Intrinsic gate resistance f = 1 MHz open drain
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 480 V, I
V
GS
= 10 V
D
= 68 A,
See Figure 3: "Gate charge test circuit"
-
-
-
-
-
-
3
430
2
120
25
60
-
-
-
-
-
- pF pF
Ω nC nC nC
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
Symbol Parameter
Table 6: Switching times
Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 300 V, I
D
= 34 A,
R
G
= 4.7 Ω, V
GS
= 10 V
See Figure 2: "Switching times test circuit for resistive load"
-
-
-
-
17
16
86
10.5
-
-
-
- ns ns ns ns
4/11 DocID027703 Rev 1
STE70N60DM2
Symbol
I
I t t
SD
SDM
V
I
I
SD
Q
Q rr rr rr
(2)
rr
RRM
(1)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
Table 7: Source drain diode
Test conditions
= 70 A, V
GS
= 0
I
SD
= 68 A, di/dt = 100 A/µs
V
DD
= 100 V
See Figure 4: "Test circuit for inductive load switching and diode recovery times"
I
SD
= 68 A, di/dt = 100 A/µs
V
DD
= 100 V, T j
= 150 °C
See Figure 4: "Test circuit for inductive load switching and diode recovery times"
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
-
-
-
-
-
-
145
0.76
10.5
250
2.6
21
70
280
1.6
A
A
V ns
µC
A ns
µC
A
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID027703 Rev 1 5/11
Test circuits
3 Test circuits
Figure 2: Switching times test circuit for resistive load
STE70N60DM2
Figure 3: Gate charge test circuit
12 V 47 k Ω
100 nF
1 k
Ω
V
DD
V i
≤ V
GS
I
G
= CONST
100 Ω
D.U.T.
2.7 k Ω V
G
2200 μ F
47 k Ω
1 k
Ω
P
W
AM01469v 1
Figure 4: Test circuit for inductive load switching and diode recovery times
Figure 5: Unclamped inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FAST
DIODE
A
B
B
L=100 µH
G
D
D.U.T.
S
3.3
µF
1000
µF
V
DD
AM01470v1
Figure 6: Unclamped inductive waveform
V
(BR)DSS
V
D
V
DD
I
D
I
DM
V
DD
0
Figure 7: Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
10%
V
DS
V
GS
90%
6/11
AM01472v 1
0
DocID027703 Rev 1
10% AM01473v 1
STE70N60DM2
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DocID027703 Rev 1 7/11
Package information
4.1 ISOTOP package information
Figure 8: ISOTOP outline
STE70N60DM2
8/11 DocID027703 Rev 1
STE70N60DM2
Dim.
E1
E2
G
G1
G2
F
F1
C2
D
D1
E
A
A1
B
C
ØP
P1
S
14.90
12.60
3.50
4.10
4.60
4
4
30.10
Table 8: ISOTOP mechanical data mm
Min. Typ.
11.80
8.90
7.80
0.75
1.95
37.80
31.50
25.15
23.85
24.80
Package information
Max.
12.20
9.10
8.20
0.85
2.05
38.20
31.70
25.50
24.15
15.10
12.80
4.30
4.30
5
4.30
4.40
30.30
DocID027703 Rev 1 9/11
Revision history
5
STE70N60DM2
Revision history
Date
03-Apr-2015
Table 9: Document revision history
Revision
1
Changes
Initial release.
10/11 DocID027703 Rev 1
STE70N60DM2
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