STF10N60DM2
N-channel 600 V, 0.440
Ω typ., 8 A MDmesh™ DM2
Power MOSFET in a TO-220FP package
Datasheet - production data
TO-220FP
1
2
3
Features
Order code
V
DS
@
T
Jmax.
R
DS(on) max.
I
D
P
TOT
STF10N60DM2 650 V
0.530 Ω
8 A 25 W
Fast-recovery body diode
Extremely low gate charge and input capacitance
Low on-resistance
100% avalanche tested
Extremely high dv/dt ruggedness
Zener-protected
Figure 1: Internal schematic diagram
Order code
STF10N60DM2
Applications
Switching applications
Description
This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Q rr
) and time (t rr
) combined with low R
DS(on)
, rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and
ZVS phase-shift converters.
Table 1: Device summary
Marking Package Packing
10N60DM2 TO-220FP Tube
June 2016 DocID029381 Rev 1
This is information on a product in full production.
1/12 www.st.com
Contents
Contents
STF10N60DM2
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
TO-220FP package information ........................................................ 9
5 Revision history ............................................................................ 11
2/12 DocID029381 Rev 1
STF10N60DM2
1 Electrical ratings
Symbol
V
GS
I
D
I
DM
(1)
P
TOT
dv/dt (2) dv/dt (3)
V
ISO
(4)
T stg
T j
Table 2: Absolute maximum ratings
Parameter
Gate-source voltage
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
Drain current (pulsed)
Total dissipation at T case
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Insulation withstand voltage (RMS) from all three leads to external heat sink
Storage temperature range
Operating junction temperature range
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
I
SD
≤ 8 A, di/dt=900 A/μs; V
DS
peak < V
(BR)DSS
,V
DD
= 400 V
(3)
V
DS
≤ 480 V.
(4) t = 1 s; T
C
= 25 °C
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
(1)
E
AS
(2)
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
Single pulse avalanche energy
Notes:
(1)
pulse width limited by T jmax
(2)
starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V.
Electrical ratings
Value
±25
8
5
32
25
40
50
2.5
-55 to 150 °C
Unit
V
A
A
W
V/ns kV
Value
5
62.5
Unit
°C/W
Value
2
300
Unit
A mJ
DocID029381 Rev 1 3/12
Electrical characteristics
2 Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Symbol Parameter
Table 5: Static
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 600 V
Zero gate voltage drain current
I
GSS
Gate-body leakage current
V
DS
= 0 V, V
GS
= ±25 V
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
R
I
DSS
DS(on)
Static drain-source onresistance
V
GS
= 0 V, V
DS
= 600 V,
T case
= 125 °C (1)
V
GS
= 10 V, I
D
= 4 A
STF10N60DM2
Min. Typ. Max. Unit
600 V
1.5
µA
100
±10 µA
4 5 V
0.440 0.530
Ω
3
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
C oss
C rss
C
oss eq.
(1)
R
G
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
= 100 V, f = 1 MHz,
= 0 V
Equivalent output capacitance
V
DS
= 0 to 480 V, V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
GS
= 0 V
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 480 V, I
D
= 8 A, V
GS
= 10 V
(see Figure 15: "Test circuit for gate charge behavior" )
Min. Typ. Max. Unit
-
-
529
28
-
- pF
- 0.72 -
-
-
-
-
-
47
6.5
15
3.7
8
-
-
-
-
- pF
Ω nC
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7: Switching times
Test conditions
V
DD
= 300 V, I
D
= 4 A R
G
= 4.7
Ω,
V
GS
= 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform" )
Min. Typ. Max. Unit
-
-
-
-
11
5
28
11.5
-
-
-
- ns
4/12 DocID029381 Rev 1
STF10N60DM2
Symbol
I
SD
(1)
I
SDM
(2)
V
SD
(3)
t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 8: Source-drain diode
Test conditions
I
I
V
V
GS
SD
DD
= 0 V, I
SD
= 8 A
circuit for inductive load switching and diode recovery times"
SD
= 8 A, di/dt = 100 A/µs,
= 60 V (see
)
Figure 16: "Test
= 8 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C (see
Figure 16: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
- 8 A
- 32 A
- 1.6 V
- 90 ns
-
-
-
-
-
225
5
190
684
7.2
µC
A ns nC
A
Notes:
(1)
Limited by maximum junction temperature.
(2)
Pulse width is limited by safe operating area.
(3)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Symbol Parameter
Table 9: Gate-source Zener diode
Test conditions Min. Typ. Max. Unit
V
(BR)GSO
Gate-source breakdown voltage
I
GS
= ±250 µA, I
D
= 0 A ±30 - - V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
DocID029381 Rev 1 5/12
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STF10N60DM2
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/12 DocID029381 Rev 1
STF10N60DM2
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Output capacitance stored energy
Figure 13: Source-drain diode forward characteristics
DocID029381 Rev 1 7/12
Test circuits
3 Test circuits
Figure 14: Test circuit for resistive load switching times
STF10N60DM2
Figure 15: Test circuit for gate charge behavior
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform
8/12 DocID029381 Rev 1
STF10N60DM2
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
TO-220FP package information
Figure 20: TO-220FP package outline
DocID029381 Rev 1
7012510_Rev_K_B
9/12
Package information
Dim.
L4
L5
L6
L7
G1
H
L2
L3
Dia
F
F1
F2
G
A
B
D
E
Table 10: TO-220FP package mechanical data mm
Typ. Min.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
28.6
9.8
2.9
15.9
9
3
STF10N60DM2
Max.
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
30.6
10.6
3.6
16.4
9.3
3.2
10/12 DocID029381 Rev 1
STF10N60DM2
5
Revision history
Revision history
Date
17-Jun-2016
Table 11: Document revision history
Revision
1
Changes
First release.
DocID029381 Rev 1 11/12
STF10N60DM2
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12/12 DocID029381 Rev 1
