Advantech SQF-S10 630 SQFlash CFast 630 User Manual

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Advantech SQF-S10 630 SQFlash CFast 630 User Manual | Manualzz

CFast 630

Datasheet

(SQF-S10xx-xG-S9x)

SQFlash

CFast 630

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 1 of 26 Aug. 10, 2020

SQFlash

CFast 630

CONTENTS

1.

Overview ............................................................................................ 4

2.

Features ............................................................................................. 5

3.

Specification Table ............................................................................ 6

4.

General Description .......................................................................... 8

5.

Pin Assignment and Description ................................................... 11

5.1

CFast Interface Pin Assignments (Signal Segment) ...................................................... 11

5.2

CFast Interface Pin Assignments (Power Segment) ..................................................... 11

6.

Identify Device Data ........................................................................ 12

7.

ATA Command Set .......................................................................... 16

8.

System Power Consumption ......................................................... 22

8.1

Supply Voltage .............................................................................................................. 22

8.2

Power Consumption ...................................................................................................... 22

9.

Physical Dimension ........................................................................ 23

Appendix: Part Number Table ........................................................... 24

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 2 of 26 Aug. 10, 2020

SQFlash

CFast 630

Revision History

Rev.

0.1

0.2

0.3

0.4

1.0

1.1

Date

2014/4/3

2014/6/4

2015/12/18

2016/3/28

2016/4/1

2020/8/10

1. 1 st draft

1. Update performance data

1.

Correct ECC number on P.8

1.

Add 256G MLC, 128G Ultra MLC

1.

MLC / UMLC Update to 15nm

1. Add General Description

History

Advantech reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Advantech is believed to be accurate and reliable. However, Advantech does not assure any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.

Copyright © 1983-2020 Advantech Co., Ltd. All rights reserved.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 3 of 26 Aug. 10, 2020

SQFlash

CFast 630

1. Overview

Advantech SQFlash CFast TM combines the advantages of flash disk technology with the Serial ATA III interface, which electrically complies with the Serial ATA International Organization Standard. CFast TM , consisting of a SATAbased 7-pin standard interface for data segment and 17-pin for power and controller segment, is designed to operate at a maximum operating frequency of 300MHz with 40MHz external crystal. SQFlash CFast TM comes with a wide range of capacities from 1GB to 64GB for SLC, and 4GB to up to 128GB for MLC, and delivers the read / write performance up to 500MB/s and 150MB/s, respectively based on Toshiba 24nm toggle SLC Flash IC. Given the features of the low power consumption, small form factor, and high shock-resistance, CFast TM are deemed to be widely adopted storage device for embedded solutions, and will be an attractive solution to replace the conventional

[PATA-interfaced] CompactFlash card in industrial applications.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 4 of 26 Aug. 10, 2020

SQFlash

CFast 630

2. Features

Standard SATA interface

– Support SATA 1.5 Gbps, 3.0 Gbps, and 6.0 Gbps interface

– SATA Revision 3.0 compliant

– Power management supported

Operating Voltage

3.3V

Support 72 bit ECC correct per 1K Byte data

TRIM

AHCI supported

Temperature Ranges

– Commercial Temperature

● 0 ℃ to 70 ℃ for operating

● -40 ℃ to 85 ℃ for storage

– Industrial Temperature

● -40 ℃ to 85 ℃ for operating

● -40 ℃ to 85 ℃ for storage

Mechanical Specification

– Shock : 1,500G / 0.5ms

– Vibration : 20G / 80~2,000Hz

Humidty

– Humidity : 5% ~ 95% under 55 ℃

Endurance :

> 2,000,000 program/erase cycles

– This is a test result of the whole SQFlash drive. The test is to keep writing a fixed logical block address (LBA) and see if any bad blocks occur after 2M cycles. With wear-levelling mechanism, although the disk was kept writing the same LBA but the physical block changes per block writing. So this test also proves that wearleveling is really working, or the block would be wearout after its designated life cycles.

Data Retention

– 10 years

Acquired RoHS

WHQL

CE

FCC Certificate

Acoustic

0 dB

Dimension

42.8 mm x 36.4 mm x 3.3 mm

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 5 of 26 Aug. 10, 2020

SQFlash

CFast 630

3. Specification Table

Performance

SLC

1 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

Sequential Performance (MB/sec)

Read Write

33.83

67.44

68.66

286.40

523.00

503.70

509.50

21.16

41.19

52.41

86.94

153.00

148.00

152.20

Ultra

MLC

MLC

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

256 GB

121.90

243.70

321.50

260.80

523.40

523.90

526.40

119.40

236.90

302.70

250.70

511.30

506.60

506.20

57.17

113.50

185.00

157.90

187.30

193.20

179.50

56.74

113.10

178.40

151.40

185.30

193.60

187.50

* All performance above are tested with AHCI mode.

Random Performance (IOPS @4K)

Read Write

6,994

13,652

12,608

40,832

36,608

41,779

36,762

2,533

4,531

8,837

18,468

27,392

27,238

27,418

64,444

44,514

39,105

36,018

44,434

40,700

40,820

64,586

45,339

44,867

42,784

45,903

33,821

33,787

12,025

21,069

29,754

28,428

25,054

24,094

24,084

10,409

20,926

27,601

24,905

27,637

23,900

23,551

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 6 of 26 Aug. 10, 2020

SQFlash

CFast 630

Endurance

According to JEDEC subcommittee JC-64.8, the actual endurance of flash storage can be presented by

Terabyte Write (TBW), which is measured by NAND Flash physical endurance, Wear-leveling Efficiency

(WLE) and Write Amplification Factor (WAF) of specific capacities with following formula.

TBW = [(NAND Flash Physical Endurance) x Capacity x WLE] / WAF

 TBW of sequential writing

WLE WAF

SLC

TBW

Ultra MLC MLC

1 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

256 GB

 TBW of random writing

0.9130

0.9130

0.9130

0.9120

0.9120

0.9120

0.9110

0.9110

0.9100

1.1013

1.1017

1.1025

1.1026

1.1031

1.1029

1.1039

1.1039

1.1041

80

161

323

646

1291

2584

5157

--

--

--

32

64

129

258

516

1031

2060

--

--

--

9

19

38

77

154

309

600

1 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

256 GB

WLE

0.9130

0.9130

0.9130

0.9120

0.9120

0.9120

0.9110

0.9110

0.9100

WAF

1.2176

1.2837

1.3034

1.3278

2.2323

2.3535

2.4396

2.3141

2.2614

SLC

73

138

273

536

638

1210

2333

--

--

TBW

Ultra MLC

--

27

54

107

127

242

466

980

--

MLC

--

--

8

16

19

36

70

147

290

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 7 of 26 Aug. 10, 2020

SQFlash

CFast 630

4. General Description

Advanced NAND Flash Controller

Advantech SQFlash CFast TM includes Bad Block Management Algorithm, Wear Leveling Algorithm and Error

Detection / Correction Code (EDC/ECC) Algorithm.

Bad Block Management

Bad blocks are blocks that contain one or more invalid bits of which the reliability is not guaranteed. Bad blocks may be representing when flash is shipped and may developed during life time of the device.

Advantech SQFlash CFast TM implement an efficient bad block management algorithm to detect the factory produced bad blocks and manages any bad blocks that may develop over the life time of the device. This process is completely transparent to the user, user will not aware of the existence of the bad blocks during operation.

Wear Leveling

NAND Type flash have individually erasable blocks, each of which can be put through a finite number of erase cycles before becoming unreliable. It means after certain cycles for any given block, errors can be occurred in a much higher rate compared with typical situation. Unfortunately, in the most of cases, the flash media will not been used evenly. For certain area, like file system, the data gets updated much frequently than other area. Flash media will rapidly wear out in place without any rotation.

Wear leveling attempts to work around these limitations by arranging data so that erasures and re-writes are distributed evenly across the full medium. In this way, no single sector prematurely fails due to a high concentration of program/erase cycles.

Advantech SQFlash CFast TM provides advanced wear leveling algorithm, which can efficiently spread out the flash usage through the whole flash media area. By implement both dynamic and static wear leveling algorithms, the life expectancy of the flash media can be improved significantly.

Error Detection / Correction

Advantech SQFlash CFast TM utilizes BCH ECC Algorithm which offers one of the most powerful ECC algorithms in the industry. This algorithm can support 72 bit ECC correct per 1K Byte data.

Power Loss Protection: Flush Manager

Power Loss Protection is a mechanism to prevent data loss during unexpected power failure. DRAM is a volatile memory and frequently used as temporary cache or buffer between the controller and the NAND flash to improve the SSD performance. However, one major concern of the DRAM is that it is not able to keep data during power failure. Accordingly, SQFlash SSD applies the Flush Manager technology, only when the data is fully committed to the NAND flash will the controller send acknowledgement (ACK) to the host. Such implementation can prevent false-positive performance and the risk of power cycling issues.

In addition, it is critical for a controller to shorten the time the in-flight data stays in the controller internal cache.

Thus, SQFlash applies an algorithm to reduce the amount of data resides in the cache to provide a better performance. With Flush Manager, incoming data would only have a “pit stop” in the cache and then move to

NAND flash directly. Also, the onboard DDR will be treated as an “organizer” to consolidate incoming data into groups before written into the flash to improve write amplification.

TRIM

TRIM is a feature which helps improve the read/write performance and speed of solid-state drives (SSD). Unlike hard disk drives (HDD), SSDs are not able to overwrite existing data, so the available space gradually becomes smaller with each use. With the TRIM command, the operating system can inform the SSD which blocks of data are no longer in use and can be removed permanently. Thus, the SSD will perform the erase action, which prevents unused data from occupying blocks all the time

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 8 of 26 Aug. 10, 2020

SQFlash

CFast 630

Sophisticate Product Management Systems

Since industrial application require much more reliable devices compare with consumer product, a more sophisticated product management system become necessary for industrial customer requirement. The key to providing reliable devices is product traceability and failure analysis system. By implement such systems end customer can expect much more reliable product.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 9 of 26 Aug. 10, 2020

Block Diagram

LBA

Cylinders

Heads

Sectors value

Density

1 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

256 GB

LBA

1,974,672

3,928,176

7,835,184

15,649,200

31,277,232

62,533,296

125,045,424

250,069,680

500,118,192

SQFlash

CFast 630

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 10 of 26 Aug. 10, 2020

SQFlash

CFast 630

5. Pin Assignment and Description

5.1 CFast Interface Pin Assignments (Signal Segment)

Pin # Pin Def.

S1

S2

S3

S4

S5

S6

S7

GND

A+

A-

GND

B-

B+

GND

Description

Host Transmitter

Differential Signal Pair

Host Receiver

Differential Signal Pair

5.2 CFast Interface Pin Assignments (Power Segment)

Pin # Pin Def. Function

P1

P2

P3

P4

CDI

GND

DEVSLP

TBD

Card Detect in

DevSleep State Enable (optional)

P5

P6

P7

P8

P9

P10

TBD

TBD

GND

LED1

LED2

IO1

LED Output

LED Output

Reserved Input/Output

P11 IO2 Reserved Input/Output

P12 IFDet (GND) Card output, connect to PGND on card

P13

P14

P15

P16

P17

PWR

PWR

PGND

PGND

CDO

Device Power (3.3V)

Device Power (3.3V)

Device Ground

Device Ground

Card Detect Out

Mate Sequence

1 st

2 nd

2 nd

1 st

2 nd

2 nd

1 st

Mate Sequence

3 rd

1 st

2

2 nd nd

2

2

2

2

2

2

2

2 nd nd

1 st nd nd nd nd nd nd

2 nd

1 st

1 st

3 rd

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 11 of 26 Aug. 10, 2020

SQFlash

CFast 630

6. Identify Device Data

The Identity Device Data enables Host to receive parameter information from the device. The parameter words in the buffer have the arrangement and meanings defined in below table. All reserve bits or words are zero

Word

Address

Default

Value

Data Field Type Information

0

1

0400h

*1

General configuration

Obsolete – Number of logical cylinders

2

3

4-5

C837h

0010h

0000h

Specific configuration

Obsolete – Number of logical heads (16)

Retired

6 003Fh Obsolete – Number of logical sectors per logical track (63)

0000h

0000h

ASCII

0000h

0000h

ASCII

ASCII

8010h

4000h

2F00h

4000h

0000h

0007h

*1

0010h

003Fh

*2

0110h

*3

0000h

0407h

0003h

0078h

0078h

0078h

0078h

7-8

9

10-19

20-21

22

23-26

27-46

47

48

49

50

51-52

53

54

55

56

57-58

59

60-61

62

63

64

65

66

67

68

Reserved for assignment by the Compact Flash Association

Retired

Serial number (20 ASCII characters)

Retired

Obsolete

Firmware revision (8 ASCII characters)

Model number (40 ASCII characters)

READ/WRITE MULTIPLE commands function

Trusted Computing feature set options (not support)

Capabilities

Capabilities

Obsolete

Words 88 and 70:64 valid

Obsolete – Number of logical cylinders

Obsolete – Number of logical heads (16)

Obsolete – Number of logical sectors per track (63)

Obsolete – Current capacity in sectors

Number of sectors transferred per interrupt on MULTIPLE commands

Maximum number of sector (28bit LBA mode)

Obsolete

Multi-word DMA modes supported/selected

PIO modes supported

Minimum Multiword DMA transfer cycle time per word

Manufacturer’s recommended Multiword DMA transfer cycle time

Minimum PIO transfer cycle time without flow control

Minimum PIO transfer cycle time with IORDY flow control

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 12 of 26 Aug. 10, 2020

SQFlash

CFast 630

69

70

71-74

82

83

84

85

86

87

88

89

75

76

77

78

79

80

81

90

91

92

93

0100h

0000h

0000h

001Fh

670eh

0084h

014Ch

0040h

01F8h

0000h

346Bh

7D09h

6063h

3469h

BC01h

6063h

003Fh

001Eh

001Eh

0000h

FFFEh

0000h

Additional Supported (support download microcode DMA)

Reserved

Reserved for the IDENTIFY PACKET DEVICE command

Queue depth (NCQ)

Serial SATA capabilities

Reserved for future Serial ATA definition

Serial ATA features supported

Serial ATA features enabled

Major Version Number

Minor Version Number

Command set supported

Command set supported

Command set/feature supported extension

Command set/feature enabled

Command set/feature enabled

Command set/feature default

Ultra DMA Modes

Time required for security erase unit completion

Time required for Enhanced security erase completion

Current advanced power management value

Master Password Revision Code

Hardware reset result. The contents of the bits (12:0) of this word shall change only during the execution of s hardware reset.

94

95

96

97

98-99

100-103

104

105

106

107

0000h

0000h

0000h

0000h

0000h

*4

0000h

0008h

4000h

0000h

Vendor’s recommended and actual acoustic management value

Stream Minimum Request Size

Streaming Transfer Time – DMA

Streaming Access Latency – DMA and PIO

Streaming Performance Granularity

Maximum user LBA for 48 bit Address feature set

Streaming Transfer Time – PIO

Maximum number of 512-byte blocks per DATA SET MANAGEMENT command

Physical sector size / Logical sector size

Inter-seek delay for ISO-7779 acoustic testing in microseconds

108-111 0000h Unique ID

112-116

117-118

119

0000h

0000h

4014h

Reserved

Words per logical Sector

Supported settings

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 13 of 26 Aug. 10, 2020

SQFlash

CFast 630

120

121-126

127

128

129-140

141

142-159

160

161-167

168

4014h

0000h

0000h

0021h

0000h

0001h

0000h

0000h

0000h

0005h

Command set/Feature Enabled/Supported

Reserved

Removable Media Status Notification feature set support

Security status

Vendor specific

Vendor specific

Vendor specific

Compact Flash Association (CFA) power mode 1

Reserved for assignment by the CFA

Device Nominal Form Factor

169

170-173

174-175

176-205

206

207-208

209

210-211

212-213

214-216

217

218

219

220

221

222

223

224-229

230-233

234

235

236-254

0001h

0000h

0000h

0000h

0000h

0000h

4000h

0000h

0000h

0000h

0001h

0000h

0000h

0000h

0000h

107Fh

0000h

0000h

0000h

0001h

0080h

0000h

DATA SET MANAGEMENT command is supported

Additional Product Identifier

Reserve

Current media serial number

SCT Command Transport

Reserved

Alignment of logical blocks within a physical block

Write-Read-Verify Sector Count Mode 3 (not support)

Write-Read-Verify Sector Count Mode 2 (not support)

NV Cache relate (not support)

Non-rotating media device

Reserved

NV Cache relate (not support)

Write read verify feature set current mode

Reserved

Transport major version number

Transport minor version number

Reserved

Extend number of user addressable sectors

Minimum number of 512-byte data blocks per DOWNLOAD

MICROCODE command for mode 03h

Maximum number of 512-byte data blocks per DOWNLOAD

MICROCODE command for mode 03h

Reserved

255

XXA5h

XX is variable

Integrity word (Checksum and Signature)

Capacity (GB)

1

2

4

8

*1 (Word 1 / 54)

7A7h

F39h

1E5Dh

3CA5h

*2 (Word 57 - 58)

1E2190h

3BF070h

778E30h

EEC9B0h

*3 (Word 60 - 61)

1E2190h

3BF070h

778E30h

EEC9B0h

*4 (Word 100 – 103)

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 14 of 26

1E2190h

3BF070h

778E30h

EEC9B0h

Aug. 10, 2020

16

32

64

3FFFh

3FFFh

3FFFh

FBFC10h

FBFC10h

FBFC10h

1DD40B0h

3BA2EB0h

7740AB0h

SQFlash

CFast 630

1DD40B0h

3BA2EB0h

7740AB0h

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 15 of 26 Aug. 10, 2020

7. ATA Command Set

[Command Set List]

61h

70h

90h

91h

92h

B0h

C4h

C5h

37h

39h

3Dh

3Fh

40h

41h

42h

60h

C6h

C8h

C9h

CAh

E5h

E6h

E7h

E8h

EAh

ECh

EFh

F1h

CBh

CEh

E0h

E1h

E2h

E3h

E4h

Op-Code

06h

10h-1Fh

20h

21h

24h

25h

27h

29h

2Fh

30h

31h

34h

35h

Command Description

Data Set Management

Recalibrate

Read Sectors

Read Sectors without Retry

Read Sectors EXT

Read DMA EXT

Read Native Max Address EXT

Read Multiple EXT

Read Log EXT

Write Sectors

Write Sectors without Retry

Write Sectors EXT

Write DMA EXT

Set Native Max Address EXT

Write Multiple EXT

Write DMA FUA EXT

Write Long EXT

Read Verify Sectors

Read Verify Sectors without Retry

Read Verify Sectors EXT

Read FPDMA Queued

Write FPDMA Queued

Seek

Execute Device Diagnostic

Initialize Device Parameters

Download Microcode

SMART

Read Multiple

Write Multiple

Set Multiple Mode

Read DMA

Read DMA without Retry

Write DMA

Write DMA without Retry

Write Multiple FUA EXT

Standby Immediate

Idle Immediate

Standby

Idle

Read Buffer

Check Power Mode

Sleep

Flush Cache

Write Buffer

Flush Cache EXT

Identify Device

Set Features

Security Set Password

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 16 of 26

SQFlash

CFast 630

Aug. 10, 2020

SQFlash

CFast 630

F2h

F3h

F4h

F5h

F6h

F8h

F9h

Security Unlock

Security Erase Prepare

Security Erase Unit

Security Freeze Lock

Security Disable Password

Read Native Max Address

Set Max Address

[

Command Set Descriptions]

1. CHECK POWER MODE (code: E5h) ;

This command allow host to determine the current power mode of the device.

2. DOWNLOAD MICROCODE (code: 92h);

This command enable the host to alter the device’s microcode. The data transferred using the

DOWNLOAD MICROCODE command is vendor specific.

All transfers shall be an integer multiple of the sector size. The size of the data transfer is determined by the content of the LBA Low register and the Sector Count register.

This allows transfer sizes from 0 bytes to 33,553,920 bytes, in 512bytes increments.

3. EXECUTE DEVICE DIAGNOSTIC (code: 90h);

This command performs the internal diagnostic tests implemented by the module.

4. FLUSH CACHE (code: E7h);

This command used by the host to request the device to flush the write cache.

5. FLUSH CACHE EXT (code: EAh);

This command is used by the host to request the device to flush the write cache. If there is data in the write cache, that data shall be written to the media.

6. IDENTIFY DEVICE (code: ECh);

The IDENTIFY DEVICE command enables the host to receive parameter information from the module.

7. IDLE (code: 97h or E3h);

This command allows the host to place the module in the IDLE mode and also set the Standby timer.

INTRQ may be asserted even through the module may not have fully transitioned to IDLE mode. If the

Sector Count register is non-”0”, then the Standby timer shall be enabled. The value in the Sector Count register shall be used to determine the time programmed into the Standby timer. If the Sector Count register is “0” then the Standby timer is disabled.

8. IDLE IMMEDIATE (code: E1h);

This command causes the module to set BSY, enter the Idle (Read) mode, clear BSY and generate an interrupt.

9. INITIALIZE DEVICE PARAMETERS (code: 91h);

This command enables the host to set the number of sectors per track and the number of heads per cylinder.

10. NOP (code: 00h);

If this command is issued, the module respond with command aborted.

11. READ BUFFER (code: E4h);

This command enables the host to read the current contents of the module's sector buffer.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 17 of 26 Aug. 10, 2020

SQFlash

CFast 630

12. READ DMA (code: C8h or C9h);

This command reads from “1” to “256” sectors as specified in the Sector Count register using the DMA data transfer protocol. A sector count of “0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

13. READ DMA Ext (code: 25h);

This command allows the host to read data using the DMA data transfer protocol.

14. READ MULTIPLE (code: C4h);

This command performs similarly to the READ SECTORS command. Interrupts are not generated on each sector, but on the transfer of a block which contains the number of sector per block is defined by the content of word 59 in the IDENTIFY DEVICE response.

15. READ MULTIPLE EXT (code: 29h);

This command performs similarly to the READ SECTORS command. The number of sectors per block is defined by a successful SET MULTIPLE command. If no successful SET MULTIPLE command has been issued, the block is defined by the device’s default value for number of sectors per block as defined in bits (7:0) in word 47 in the IDENTIFY DEVICE information.

16. READ NATIVE MAX ADDRESS (code: F8h);

This command returns the native maximum address. The native maximum address is the highest address accepted by the device in the factory default condition.

17. READ NATIVE MAX ADDRESS EXT (code: 27h);

This command returns the native maximum address.

18. READ SECTOR(S) (code: 20h or 21h);

This command reads from “1” to “256” sectors as specified in the Sector Count register. A sector count of

“0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

19. READ SECTOR(S) EXT (code: 24h);

This command reads from “1” to “65536” sectors as specified in the Sector Count register. A sector count of “0” requests “65536” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

20. READ VERIFY SECTOR(S) (code: 40h or 41h);

This command is identical to the READ SECTORS command, except that DRQ is never set and no data is transferred to the host.

21. READ VERIFY SECTOR(S) EXT (code: 42h);

This command is identical to the READ SECTORS command, except that DRQ is never set and no data is transferred to the host.

22. RECALIBRATE (code: 1Xh);

This command return value is select address mode by the host request.

23. SECURITY DISABLE PASSWORD (code: F6h);

This command transfers 512 bytes of data from the host. Table defines the content of this information. If the password selected by word 0 match the password previously saved by the device, the device shall disable the Lock mode. This command shall not change the Master password. The Master password shall be reactivated when a User password is set.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 18 of 26 Aug. 10, 2020

SQFlash

CFast 630

24. SECURITY ERASE PREPARE (code: F3h);

This command shall be issued immediately before the SECURITY ERASE UNIT command to enable device eraseing and unlocking.

25. SECURITY ERASE UNIT (code: F4h);

This command transfer 512 bytes of data from the host. Table## defines the content of this information. If the password does not match the password previously saved by the device, the device shall reject the command with command aborted.

The SECURITY ERASE PREPARE command shall be completed immediately prior to the SECURITY

ERASE UNIT command.

26. SECURITY FREEZE LOCK (code: F5h);

This command shall set the device to frozen mode. After command completion any other commands that update the device Lock mode shall be command aborted. Frozen shall be disabled by power-off or hardware reset.

If SECURITY FREEZE LOCK is issued when the drive is in frozen mode, the drive executes the command and remains in frozen mode.

27. SECURITY SET PASSWORD (code: F1h);

This command transfer 512 bytes of data from the host. Table defines the content of this information. The data transferred controls the function of this command. Table defines the interaction of the identifier and security level bits.

28. SECURITY UNLOCK (code: F2h);

This command transfer 512 bytes of data from the host. Table (as Disable Password) defines the content of this information.

If the Identifier bit is set to Master and the device is in high security level, then the password supplied shall be compared with the stored Master password. If the device is in maximum security level then the unlock shall be rejected.

If the identifier bit is set to user then the device shall compare the supplied password with the stored User password.

If the password compare fails then the device shall return command aborted to the host and decrements the unlock counter. This counter shall be initially set to five and shall be decremented for each password mismatch when SECURITY UNLOCK is issued and the device is locked. When this counter reachs zero then SECURITY UNLOCK and SECURITY ERASE UNIT command shall be aborted unitl a power-on or a hardware reset.

29. SEEK (code: 7Xh);

This command performs address range check.

30. SET MAX ADDRESS (code: F9h);

After successful command completion, all read and write access attempts to address greater than specified by the successful SET MAX ADDRESS command shall be rejected with an IDNF error.

IDENTIFY DEVICE response words (61:60) shall reflect the maximum address set with this command.

31. SET MAX ADDRESS EXT (code: 37h);

After successful command completion, all read and write access attempts to address greater than specified by the successful SET MAX ADDRESS command shall be rejected with an IDNF error.

IDENTIFY DEVICE response words (61:60) shall reflect the maximum address set with this command.

32. SET FEATURE (code: EFh);

This command is used by the host to establish parameters that affect the execution of certain device features.

33. SET MULTIPLE MODE (code: C6h);

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 19 of 26 Aug. 10, 2020

SQFlash

CFast 630

This command enables the device to perform READ and Write Multiple operations and establishes the block count for these commands.

34. SLEEP (code: 99h or E6h);

This command causes the module to set BSY, enter the Sleep mode, clear BSY and generate an interrupt.

35. SMART READ DATA (code: B0h with Feature register value of D0h);

This command returns the Device SMART data structure to the host.

36. SMART ENABLE/DISABLE AUTO SAVE (code: B0h with Feature register value of D2h);

This command enables and disables the optional attribute autosave feature of the device.

37. SMART EXECUTE OFF_LINE (code: B0h with Feature register value of D4h);

This command cause the device to immediately initiate the optional set of activities that collect SMART data in an off-line mode and then save this data to the device’s non-volatile memory, or execute a selfdiagnostic test routine in either captive or off-line mode.

38. SMART READ LOG (code: B0h with Feature register value of D5h);

This command returns the specified log data to the host.

39. SMART ENABLE OPERATION (code: B0h with Feature register value of D8h);

This command enables access to all SMART capabilities within the device. Prior to receipt of this command SMART data are neither monitored nor saved by the device.

40. SMART DISABLE OPERATION (code: B0h with Feature register value of D9h);

This command disables all SMART capabilities within the device including any and all timer and event count functions related exclusively to this feature. After command acceptance the device shall disable all

SMART operations.

After receipt of this command by the device, all other SMART commands including SMART DISABLE

OPERATION commands, with exception of SMART ENABLE OPERATIONS, are disabled and invalid and shall be command aborted by the device.

41. SMART RETURN STATUS (code: B0h with Feature register value of DAh);

This command cause the device to communicate the reliability status of the device to the host.

42. STANDBY (code: E2h);

This command causes the module to set BSY, enter the Standby mode, clear BSY and return the interrupt immediately.

43. STANDBY IMMEDIATE (code: E0h);

This command causes the module to set BSY, enter the Standby mode, clear BSY and return the interrupt immediately.

44. WRITE BUFFER (code: E8h);

This command enables the host to overwrite contents of the module’s sector buffer with any data pattern desired.

45. WRITR DMA (code: CAh or CBh);

This command writes from “1” to “256” sectors as specified in the Sector Count register using the DMA data transfer protocol. A sector count of “0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

46. WRITR DMA EXT (code: 35h);

This command writes from “1” to “65536” sectors as specified in the Sector Count register using the DMA

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 20 of 26 Aug. 10, 2020

SQFlash

CFast 630 data transfer protocol. A sector count of “0” requests “65536” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

47. WRITE MULTIPLE (code: C5h);

This command is similar to the WRITE SECTORS command. Interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by Set Multiple command.

48. WRITE MULTIPLE EXT (code: 39h);

This command is similar to the WRITE SECTORS command. Interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by Set Multiple command.

49. WRITE SECTOR(S) (code: 30h);

This command writes from “1” to “256” sectors as specified in the Sector Count register. A sector count of

“0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

50. WRITE SECTOR(S) EXT (code: 34h);

This command writes from “1” to “65536” sectors as specified in the Sector Count register. A sector count of “0” requests “65536” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

51. WRITE SECTOR(S) W/O ERASE (code: 38h);

This command writes from “1” to “256” sectors as specified in the Sector Count register. A sector count of

“0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

52. WRITE VERIFY (code: 3Ch);

This command is similar to the WRITE SECTOR(S) command, except that each sector is verified before the command is completed.

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 21 of 26 Aug. 10, 2020

8. System Power Consumption

8.1 Supply Voltage

Parameter

Operating Voltage

8.2 Power Consumption

mA Read Write

Rating

3.3V +/- 5%

Idle

SLC

Ultra

MLC

MLC

1 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

2 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

4 GB

8 GB

16 GB

32 GB

64 GB

128 GB

256 GB

158.79

185.16

191.82

287.88

296.97

363.64

409.10

260.61

363.64

287.88

409.10

469.70

484.85

566.67

260.61

350.00

284.85

409.10

475.76

484.85

593.94

167.88

208.79

239.70

303.04

281.82

393.94

424.25

227.28

266.67

257.58

378.79

393.94

393.94

403.03

218.19

268.19

254.55

366.67

384.85

393.94

524.24

84.85

84.85

84.85

87.88

90.91

90.91

85.76

84.85

84.85

84.85

87.88

90.91

90.91

84.85

77.27

78.48

78.79

84.85

84.85

84.85

87.88

Slumber

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

10.00

SQFlash

CFast 630

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 22 of 26 Aug. 10, 2020

9. Physical Dimension

CFast (Unit: mm)

SQFlash

CFast 630

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 23 of 26 Aug. 10, 2020

Appendix: Part Number Table

SLC

Product

SQF CFast 630 1G SLC (0~70°C)

SQF CFast 630 2G SLC (0~70°C)

SQF CFast 630 4G SLC (0~70°C)

SQF CFast 630 8G SLC (0~70°C)

SQF CFast 630 16G SLC (0~70°C)

SQF CFast 630 32G SLC (0~70°C)

SQF CFast 630 64G SLC (0~70°C)

SQF CFast 630 1G SLC (-40~85°C)

SQF CFast 630 2G SLC (-40~85°C)

SQF CFast 630 4G SLC (-40~85°C)

SQF CFast 630 8G SLC (-40~85°C)

SQF CFast 630 16G SLC (-40~85°C)

SQF CFast 630 32G SLC (-40~85°C)

SQF CFast 630 64G SLC (-40~85°C)

SQFlash

CFast 630

Advantech PN

SQF-S10S1-1G-S9C

SQF-S10S2-2G-S9C

SQF-S10S2-4G-S9C

SQF-S10S2-8G-S9C

SQF-S10S4-16G-S9C

SQF-S10S4-32G-S9C

SQF-S10S4-64G-S9C

SQF-S10S1-1G-S9E

SQF-S10S2-2G-S9E

SQF-S10S2-4G-S9E

SQF-S10S2-8G-S9E

SQF-S10S4-16G-S9E

SQF-S10S4-32G-S9E

SQF-S10S4-64G-S9E

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 24 of 26 Aug. 10, 2020

Ultra MLC

Product

SQF CFast 630 2G U-MLC (0~70°C)

SQF CFast 630 4G U-MLC (0~70°C)

SQF CFast 630 8G U-MLC (0~70°C)

SQF CFast 630 16G U-MLC (0~70°C)

SQF CFast 630 32G U-MLC (0~70°C)

SQF CFast 630 64G U-MLC (0~70°C)

SQF CFast 630 128G U-MLC (0~70°C)

SQF CFast 630 2G U-MLC (-40~85°C)

SQF CFast 630 4G U-MLC (-40~85°C)

SQF CFast 630 8G U-MLC (-40~85°C)

SQF CFast 630 16G U-MLC (-40~85°C)

SQF CFast 630 32G U-MLC (-40~85°C)

SQF CFast 630 64G U-MLC (-40~85°C)

SQF CFast 630 128G U-MLC (-40~85°C)

SQFlash

CFast 630

Advantech PN

SQF-S10U1-2G-S9C

SQF-S10U2-4G-S9C

SQF-S10U2-8G-S9C

SQF-S10U2-16G-S9C

SQF-S10U2-32G-S9C

SQF-S10U2-64G-S9C

SQF-S10U2-128G-S9C

SQF-S10U1-2G-S9E

SQF-S10U2-4G-S9E

SQF-S10U2-8G-S9E

SQF-S10U2-16G-S9E

SQF-S10U2-32G-S9E

SQF-S10U2-64G-S9E

SQF-S10U2-128G-S9E

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 25 of 26 Aug. 10, 2020

MLC

Product

SQF CFast 630 4G MLC (0~70°C)

SQF CFast 630 8G MLC (0~70°C)

SQF CFast 630 16G MLC (0~70°C)

SQF CFast 630 32G MLC (0~70°C)

SQF CFast 630 64G MLC (0~70°C)

SQF CFast 630 128G MLC (0~70°C)

SQF CFast 630 256G MLC (0~70°C)

SQF CFast 630 4G MLC (-40~85°C)

SQF CFast 630 8G MLC (-40~85°C)

SQF CFast 630 16G MLC (-40~85°C)

SQF CFast 630 32G MLC (-40~85°C)

SQF CFast 630 64G MLC (-40~85°C)

SQF CFast 630 128G MLC (-40~85°C)

SQF CFast 630 256G MLC (-40~85°C)

SQFlash

CFast 630

Advantech PN

SQF-S10M1-4G-S9C

SQF-S10M2-8G-S9C

SQF-S10M2-16G-S9C

SQF-S10M2-32G-S9C

SQF-S10M2-64G-S9C

SQF-S10M2-128G-S9C

SQF-S10M2-256G-S9C

SQF-S10M1-4G-S9E

SQF-S10M2-8G-S9E

SQF-S10M2-16G-S9E

SQF-S10M2-32G-S9E

SQF-S10M2-64G-S9E

SQF-S10M2-128G-S9E

SQF-S10M2-256G-S9E

Specifications subject to change without notice, contact your sales representatives for the most update information.

REV 1.1 Page 26 of 26 Aug. 10, 2020

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Related manuals

Frequently Answers and Questions

What is the maximum operating frequency of the Advantech SQF-S10 630?
300MHz
What is the voltage range of the device?
3.3V
How many bits of ECC can the device correct per 1K Byte of data?
72 bits
What is the endurance of the device in Terabytes Written (TBW) for a 16GB SLC model with sequential writes?
1291 TBW
What is the endurance of the device in Terabytes Written (TBW) for a 64GB MLC model with random writes?
2333 TBW
What is the maximum sequential read speed of the 32GB SLC model?
503.70 MB/s
What is the maximum random read speed of the 128GB Ultra MLC model?
40,820 IOPS