STMicroelectronics STGIF5CH60S-X Datasheet
STMicroelectronics STGIF5CH60S-X is a compact, high-performance AC motor drive module that combines a 3-phase IGBT inverter bridge with control ICs and freewheeling diodes. It offers intelligent motor control with built-in protection features, making it suitable for applications such as industrial motor control, washing machines, dryers, fans, and pumps. The device features 3.3 V, 5 V TTL/CMOS inputs with hysteresis, internal bootstrap diode, undervoltage lockout of gate drivers, and a smart shutdown function.
Reklama
Reklama
STGIF5CH60S-X
Datasheet
SLLIMM - 2
nd
series IPM, 3-phase inverter, 8 A, 600 V, short
‑
circuit rugged IGBT
26
18
Marking area
1
17
1
26
SDIP2F-26L type X2
17
18
Product status link
STGIF5CH60S-X
Product summary
Order code STGIF5CH60S-X
Marking
Package
Packing
GIF5CH60S-X
SDIP2F-26L type X2
Tube
Features
• IPM 8 A, 600 V 3-phase IGBT inverter bridge including 2 control ICs for gate driving and freewheeling diodes
• 3.3 V, 5 V TTL/CMOS inputs with hysteresis
• Internal bootstrap diode
• Undervoltage lockout of gate drivers
• Smart shutdown function
• Short-circuit protection
• Shutdown input/fault output
• Separate open emitter outputs
• Built-in temperature sensor
• Comparator for fault protection
• Short-circuit rugged TFS IGBT
• Very fast, soft recovery diodes
• Fully isolated package
• Isolation ratings of 1600 Vrms/min.
• UL recognition: UL 1557, file E81734
Applications
• Industrial motor control
• Washing machines
• Dryer
• Fans
• Pumps and compressors
Description
This second series of SLLIMM (small low-loss intelligent molded module) provides a compact, high-performance AC motor drive in a simple, rugged design. It combines new ST proprietary control ICs (one LS and one HS driver) with an improved shortcircuit rugged trench gate field-stop (TFS) IGBT, making it ideal for motor drives operating up to 20 kHz in hard-switching circuitries.
DS13925 - Rev 1 - February 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
HinU(5)
HinV(6)
HinW(7)
VccH(8)
GND(9)
H-side
STGIF5CH60S-X
Internal schematic diagram and pin configuration
1
NC(1)
VbootU(2 )
VbootV(3 )
VbootW(4 )
Internal schematic diagram and pin configuration
Figure 1. Internal schematic diagram and pin configuration
(26)NC
(25)NC
(24)P
(23)U
(22)V
(21)W
LinU(10 )
LinV(11 )
LinW(12 )
(20)NU
VccL(13 )
(19)NV SD/OD(14 )
Cin(15)
GND(16)
TSO(17)
L-side
(18)NW
AMG171020161037SA
DS13925 - Rev 1 page 2/23
DS13925 - Rev 1
14
15
16
17
18
9
10
11
12
13
4
5
6
7
8
Pin
1
2
3
19
20
21
22
23
24
25
26
GND
LINu
LINv
LINw
VCCL
SD/OD
CIN
GND
TSO
NW
Symbol
NC
VBOOTu
VBOOTv
VBOOTw
HINu
HINv
HINw
VCCH
NV
NU
W
V
U
P
NC
NC
STGIF5CH60S-X
Internal schematic diagram and pin configuration
Table 1. Pin description
Description
-
Bootstrap voltage for U phase
Bootstrap voltage for V phase
Bootstrap voltage for W phase
High-side logic input for U phase
High-side logic input for V phase
High-side logic input for W phase
High-side low voltage power supply
Ground
Low-side logic input for U phase
Low-side logic input for V phase
Low-side logic input for W phase
Low-side low voltage power supply
Shutdown logic input (active low)/open-drain (comparator output)
Comparator input
Ground
Temperature sensor output
Negative DC input for W phase
Negative DC input for V phase
Negative DC input for U phase
W phase output
V phase output
U phase output
-
-
Positive DC input page 3/23
2
STGIF5CH60S-X
Absolute maximum ratings
Absolute maximum ratings
T
J
= 25 °C unless otherwise noted.
Symbol
V
PN
V
PN(surge)
V
CES
±I
C
±I
CP
P
TOT t
SCW
Table 2. Inverter parts
Parameter
Supply voltage applied between P -N
U
, -N
V
, -N
W
Supply voltage (surge) applied between P -N
U
, -N
V
, -N
W
Collector-emitter voltage each IGBT
Continuous collector current each IGBT (T
C
= 25 °C)
Continuous collector current each IGBT (T
C
= 80 °C)
Peak collector current each IGBT (less than 1 ms)
Total power dissipation at T
C
= 25 °C each IGBT
Short-circuit withstand time, V
CE
= 300 V, T
J
= 125 °C,
V
CC
= V boot
= 15 V, V
IN
= 0 to 5 V
8
5
16
30
Value
450
500
600
5
Symbol
V
CC
V
BOOT
V
OUT
V
CIN
V
IN
V
SD/OD
I
SD/OD
V
TSO
I
TSO
Table 3. Control parts
Parameter
Supply voltage applied between V
CCH
-GND, V
CCL
-GND
Bootstrap voltage
Output voltage applied between U, V, W and GND
Comparator input voltage
Logic input voltage applied between HINx, LINx and GND
Open drain voltage
Open drain sink current
Temperature sensor output voltage
Temperature sensor output current
Symbol
V
ISO
T
J
T
C
Table 4. Total system
Parameter
Isolation withstand voltage applied between each pin and heat sink plate
(AC voltage, t = 60 s)
Power chip operating junction temperature range
Operating case temperature range
Min.
- 0.3
- 0.3
619
V
BOOT
- 21 V
BOOT
+ 0.3
- 0.3
- 0.3
20
15
-0.3
Max.
20
-0.3
7
10
5.5
7 mA
V mA
V
V
V
Unit
V
V
V
Value
1600
-40 to 175
-40 to 125
Unit
Vrms
°C
°C
Unit
V
V
V
A
A
W
μs
DS13925 - Rev 1 page 4/23
2.1
Thermal data
Symbol
R thJC
Table 5. Thermal data
Parameter
Thermal resistance, junction-to-case single IGBT
Thermal resistance, junction-to-case single diode
STGIF5CH60S-X
Thermal data
Value
5
9
Unit
°C/W
DS13925 - Rev 1 page 5/23
3
3.1
STGIF5CH60S-X
Electrical characteristics
Electrical characteristics
T
J
= 25 °C unless otherwise specified.
Inverter parts
Table 6. Static
Symbol
V
I
CES
CE(sat)
V
F
Parameter
Collector cut-off current
Collector-emitter saturation voltage
Diode forward voltage
Test conditions
V
CE
= 600 V, V
CC
= V boot
= 15 V
V
CC
= V boot
= 15 V, V
IN
I
C
= 5 A
V
CC
= V boot
= 15 V, V
IN
I
C
= 8 A
V
IN
C
= 5 A
V
IN
C
= 8 A
1. Applied between HINx, LINx and GND for x = U, V, W.
Min.
Typ.
Max.
Unit
100 µA
1.5
1.95
V
1.7
-
2.1
2.4
2.7
V
V
Table 7. Inductive load switching time and energy
Symbol t on
t c(on)
t off
t c(off)
t rr
E on
E off
E rr t on
t c(on)
t off
t c(off)
t rr
E on
E off
E rr
Parameter
Turn-on time
Crossover time on
Turn-off time
Crossover time off
Reverse recovery time
Turn-on switching energy
Turn-off switching energy
Reverse recovery energy
Turn-on time
Crossover time on
Turn-off time
Crossover time off
Reverse recovery time
Turn-on switching energy
Turn-off switching energy
Reverse recovery energy
V
V
V
V
DD
IN
DD
IN
Test conditions
= 300 V, V
C
= 300 V, V
CC
CC
= V
= 5 A
= V
C boot boot
= 8 A
= 15 V,
= 15 V,
Min.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
265
110
305
92
100
90
60
5.6
282
126
295
90
100
163
86
9.2
Max.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit ns
µJ ns
µJ
1. t on
and t off
include the propagation delay time of the internal drive. t c(on) under the internally given gate driving conditions.
and t c(off)
are the switching times of the IGBT itself
2. Applied between HINx, LINx and GND for x = U, V, W.
DS13925 - Rev 1 page 6/23
DS13925 - Rev 1
STGIF5CH60S-X
Inverter parts
Vcc
5 V
0 V
Input
+5V
Rsd
Figure 2. Switching time test circuit
I c
VCC
HIN
GND
BOOT
HVG
OUT
VCC
LIN
SD
CIN
GND
LVG
+
Vce
-
L
C
+
-
Vdd
V
Figure 3. Switching time definition
100% I
C t rr
100% I
C
CE
I
C
I
C
V
CE
V
IN
V IN(ON) t
ON
10% I
C t
C(ON)
90% I
C
10% V
CE
(a) turn-on
V
IN t
OFF
V IN(OFF)
10% V
CE t
C(OFF)
10% I
C
(b) turn-off
AM09223V1 page 7/23
3.2
STGIF5CH60S-X
Control/protection parts
Control/protection parts
Table 8. High- and low-side drivers
Symbol Parameter Test condition
I
I
V il
V ih
INh
INl
Low logic level voltage
High logic level voltage
IN logic “1” input bias current
IN logic “0” input bias current
IN x
= 15 V
IN x
= 0 V
High-side
V
V
V
V
V
V
CC_hys
CCH_th(on)
CCH_th(off)
BS_hys
BS_th(on)
BS_th(off)
I
I
I
QBSU
QBS qccu
V
CC
UV hysteresis
V
CCH
UV turn-on threshold
V
CCH
UV turn-off threshold
V
BS
UV hysteresis
V
BS
UV turn-on threshold
V
BS
UV turn-off threshold
Under voltage V
BS
quiescent current
V
BS
quiescent current
Under voltage quiescent supply current
V
V
V
BS
CC
CC
= 9 V, HINx
= 9 V, HINx
I qcc
R
DS(on)
Quiescent current
BS driver ON resistance
V
CC
Low-side
V
CC_hys
V
CCL_th(on)
V
CCL_th(off)
V
CC
UV hysteresis
V
CCL
UV turn-on threshold
V
CCL
UV turn-off threshold
I
I qccu qcc
Under voltage quiescent supply current
Quiescent current
V
CC
= 10 V,
SD pulled to 5 V through R
SD
= 10 kΩ,
CIN = LINx
= 0 V
V
CC
= 15 V, SD= 5 V,
CIN = LINx
= 0 V
V
SSD
I
SDh
I
SDl
Smart SD unlatch threshold
SD logic “1” input bias current
SD logic “0” input bias current
SD = 5 V
SD = 0 V
1. Applied between HINx, LINx and GND for x = U, V, W.
Min.
Typ.
Max.
Unit
2
0.8
V
V
80 150 200
1
µA
µA
1.2
11
1.4
11.5
1.7
12
9.6
10.1
10.6
0.5
1 1.6
10.1
9.1
11
10
11.9
10.9
55 75
125 170
190 250
560 730
150
µA
µA
V
V
V
V
V
V
µA
µA
Ω
1.1
1.4
1.6
10.4
11.6
12.4
9.0
10.3
11
V
V
V
600 800 µA
0.5
25
700 900 µA
0.6
50
0.75
70
1
V
µA
µA
DS13925 - Rev 1 page 8/23
DS13925 - Rev 1
STGIF5CH60S-X
Control/protection parts
Symbol
V
TSO
I
TSO_SNK
I
TSO_SRC
Table 9. Temperature sensor output
Parameter
Temperature sensor output voltage
Temperature sensor sink current capability
Temperature sensor source current capability
T
J
= 25 °C
Test condition Min.
Typ.
Max.
Unit
0.974
1.16
1.345
V
0.1
4 mA mA
Symbol
I
CIN
V ref
V
OD t
CIN_SD
SR
SD
Table 10. Sense comparator (V
CC
= 15 V, unless otherwise is specified)
Test condition Parameter
CIN input bias current
Internal reference voltage
Open-drain low level output voltage
V
CIN
= 1 V
I od
= 5 mA
Min.
Typ.
Max.
Unit
-0.2
460 510
0.2
560
µA mV
500 mV
C
IN
comparator delay to SD
SD fall slew rate
SD pulled to 5 V through R
SD
= 10 kΩ; measured applying a voltage step 0-1 V to pin CIN;
50% CIN to 90% SD
SD pulled to 5 V through R
SD
= 10 kΩ;
C
L
= 1 nF through SD and ground;
90% SD to 10% SD
240 320 410
25 ns
V/µs
The comparator stays enabled even if V
CC
is in the UVLO condition but higher than 4 V.
page 9/23
4
STGIF5CH60S-X
Fault management
Fault management
The device integrates an open-drain output connected to the SD pin. As soon as a fault occurs, the open-drain is activated and the LVGx outputs are forced low. Two types of fault can be identified:
•
•
Undervoltage on supply voltage (V
CC
)
Each fault enables the SD open drain for a different time, as described in the following table.
Table 11. Fault timing
Symbol
OC
UVLO
Parameter
Over-current event
Under-voltage lockout event
1. Typical value (-40 °C ≤ T
J
≤ 125 °C).
2. Without contribution of the RC network on SD.
Event time
≤ 24 μs
> 24 µs
≤ 70 μs
> 70 µs until the VCC_LS exceeds the
VCC_LS UV turn ON threshold
SD open-drain enable time result (1) (2)
24 μs
OC time
70 µs
UVLO time
Actually, the device remains in a fault condition (SD at low logic level and LVGx outputs disabled) for a time also depending on the RC network connected to the SD pin. The network generates a time contribution that is added to the internal value.
Figure 4. Overcurrent timing (without contribution of the RC network on SD)
DS13925 - Rev 1
GIPG120520141638FSR page 10/23
STGIF5CH60S-X
Smart shutdown function
Figure 5. UVLO timing (without contribution of the RC network on SD)
4.1
GIPG120520141644FSR
Smart shutdown function
The device integrates a comparator committed to the fault sensing function. The comparator input can be connected to an external shunt resistor in order to implement a simple overcurrent detection function.
The output signal of the comparator is fed to an integrated MOSFET with the open drain output available on the
SD input. When the comparator triggers, the device is set in shutdown state and its outputs are all set to low level.
DS13925 - Rev 1 page 11/23
DS13925 - Rev 1
STGIF5CH60S-X
Smart shutdown function
Figure 6. Smart shutdown timing waveforms in case of overcurrent event comp
Vref
CIN
PROTECTION t
CIN_SD
LIN
LVG
SD l open-drain gate
(internal) t
1
Fast shutdown: the driver outputs are set in SD state immediately after comparator triggering even if the SD signal has not yet reached the lower input threshold
SHUTDOWN CIRCUIT
FROM / TO
CONTROLLER
V
BIAS
R
SD
SD
C
SD
R
PD_SD
R
ON_OD
SMART
SD
LOGIC t
OC real disable time t t where:
1
2 t
2
R
ON_OD
= V
OD
/5 mA, see
= 15 V, unless otherwise is specified) ;
R
PD_SD
(typ.) = 5 V/I
SDh page 12/23
STGIF5CH60S-X
Smart shutdown function
In common overcurrent protection designs, the comparator output is usually connected to the SD input and an RC network is connected to this SD line in order to provide a mono-stable circuit which implements a protection time that follows the fault condition.
As opposed to common fault detection systems, the device smart shutdown architecture allows the immediate turn-off of output gates driver in case of fault, by minimizing the propagation delay between the fault detection event and the actual switching off of the outputs. In fact, the time delay between the fault and the turning off of the outputs is no longer dependent on the RC value of the external network connected to the pin.
In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after the comparator triggering.
At the same time, the internal logic turns on the open-drain output and holds it on until the SD voltage goes below the V
SSD
threshold and the t oc
time is elapsed.
The driver outputs restart following the input pins as soon as the voltage at the SD pin reaches the higher threshold of the SD logic input.
The smart shutdown system provides the possibility to increase the time constant of the external RC network (i.e., the disable time after the fault event) up to very high values without increasing the delay time of the protection.
DS13925 - Rev 1 page 13/23
5
5.1
STGIF5CH60S-X
Temperature monitoring solutions
Temperature monitoring solutions
TSO output
The device integrates a temperature sensor. A voltage proportional to the die temperature is available on the TSO pin. When this function is not used, the pin can be left floating.
Figure 7. V
TSO
output characteristics vs LVIC temperature
V
TSO
(V)
IGBT110820161234TSO
2.8
Min
2.2
1.6
1.0
0.4
0
Max
Typ
25 50 75 100 T (°C)
DS13925 - Rev 1 page 14/23
6
Application circuit example
Figure 8. Application circuit example
STGIF5CH60S-X
Application circuit example
DS13925 - Rev 1
MICROCONTROLLER
Application designers are free to use a different scheme according to the device specifications.
AMG171020161050SA page 15/23
6.1
STGIF5CH60S-X
Guidelines
Guidelines
1.
Input signals HIN, LIN are active-high logic. A 100 kΩ (typ.) pull-down resistor is built-in for each input pin.
To prevent input signal oscillations, the wiring of each input should be as short as possible and the use of
RC filters (R
1
, C
1
) on each input signal is suggested. The filters should be with a time constant of about 100 ns and placed as close as possible to the IPM input pins.
2.
The use of a bypass capacitor C
VCC
(aluminum or tantalum) can reduce the transient circuit demand on the power supply. Besides, to reduce any high-frequency switching noise distributed on the power lines, a decoupling capacitor C
2
(100 to 220 nF, with low ESR and low ESL) should be placed as close as possible to each V
CC
pin and in parallel with the bypass capacitor.
3.
The use of an RC filter (R
SF
, C
SF
) prevents protection circuit malfunctions. The time constant (R
SF
x C
SF
) should be set to 1 µs and the filter must be placed as close as possible to the CIN pin.
4.
The SD is an input/output pin (open-drain type if it is used as output). It should be pulled up to a power supply (that is, MCU bias at 3.3/5 V) by a resistor value, which can keep the I od
no higher than 5 mA (V
OD
≤
500 mV when open-drain MOSFET is ON). The filter on SD should be sized to get a desired restarting time after a fault event and placed as close as possible to the SD pin.
5.
A decoupling capacitor C
TSO
(between 1 nF and 10 nF) placed close to the MCU can be used to increase the noise immunity of the TSO thermal sensor.
6.
The decoupling capacitor C
3
(100 to 220 nF with low ESR and low ESL) in parallel with each C boot
filters high-frequency disturbances. Both C boot
and C
3
(if present) should be placed as close as possible to the
U,V,W and V boot
pins. Bootstrap negative electrodes should be connected to the U,V,W terminals directly and separated from the main output wires.
7.
To prevent overvoltage on the V
CC
pin, a zener diode (Dz1) can be used. Similarly, on the V boot
pin, a zener diode (Dz2) can be placed in parallel with each C boot
.
8.
The use of the decoupling capacitor C
4
(100 to 220 nF, with low ESR and low ESL) in parallel with the electrolytic capacitor C
Vdc
prevents surge destruction. Both capacitors C
4
and C
Vdc
should be placed as close as possible to the IPM (C
4
has priority over C vdc
).
9.
By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an optocoupler is possible.
10. Low inductance shunt resistors should be used for phase leg current sensing.
11. In order to avoid malfunctions, the wiring on N pins, the shunt resistor and PWR_GND should be as short as possible.
12. The connection of the SGN_GND to the PWR_GND at one point only (close to the shunt resistor terminal) can reduce the impact of power ground fluctuation.
These guidelines ensure the device specifications for application designs. For further details, please refer to the relevant application note.
Symbol
V
PN
V
CC
V
BS t dead f
PWM
T
C
Table 12. Recommended operating conditions
Parameter
Supply voltage
Control supply voltage
High-side bias voltage
Test conditions
Applied among P-Nu, N
V
, N w
Applied to V
CC
-GND
Applied to V
BOOTi
-OUT i for i = U, V, W
Blanking time to prevent arm-short For each input signal
PWM input signal
-40 °C < T
C
< 100 °C
-40 °C < T
J
< 125 °C
Operating case temperature
Min.
13.5
13
1.0
Typ.
300
15
Max.
400
18
18
Unit
V
V
V
µs
20
100 kHz
°C
DS13925 - Rev 1 page 16/23
STGIF5CH60S-X
Electrical characteristics (curves)
7
I
C
(A)
12
Figure 9. Output characteristics
IGBT260620151408OC25
V
CC
= 18 V
15 V
13 V
8
4
0
0 0.5
1.0
1.5
2.0
V
CE
(V)
I
C
(A)
Figure 11. I
C
vs case temperature
GADG180220201241ICT
V
GE
≥ 15 V, T
J
≤ 175 °C
8
6
4
2
0
0 25 50 75 100 125 150 T
C
(°C)
Figure 13. E on
switching energy vs collector current
E
ON
(mJ)
0.7
IGBT260620151411SLC
V
DD
= 300 V, V
CC
= V boot
= 15 V
0.6
0.5
0.4
0.3
0.2
T
J
= 175 °C
T
J
= 25 °C
0.1
0.0
0 4 8 12 I
C
(A)
Electrical characteristics (curves)
Figure 10. V
CE(sat)
vs collector current
V
CE(sat)
(V)
IGBT260620151409VCEC
V
CC
= 15 V
2.4
T
J
= 175 °C
2.1
1.8
T
J
= 25 °C
1.5
1.2
0.9
0 4 8 12 I
C
(A)
2.5
2.0
1.5
1.0
Figure 12. Diode V
F
vs forward current
V
F
(V)
3.0
IGBT260620151410DVF
T
J
= 25 °C
T
J
= 150 °C
0.5
0.0
0 4 8 12 I
F
(A)
Figure 14. E off
switching energy vs collector current
E
OFF
(mJ)
0.30
IGBT260620151414SLC
V
DD
= 300 V, V
CC
= V boot
= 15 V
0.25
0.20
0.15
0.10
T
J
= 175 °C
T
J
= 25 °C
0.05
0.00
0 4 8 12 I
C
(A)
DS13925 - Rev 1 page 17/23
K
Figure 15. Thermal impedance
IGBT260620151422ZTH
10 -1
JC
10 -2
10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
STGIF5CH60S-X
Electrical characteristics (curves)
DS13925 - Rev 1 page 18/23
8
8.1
STGIF5CH60S-X
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
SDIP2F-26L type X2 package information
Figure 16. SDIP2F-26L type X2 package outline
DS13925 - Rev 1
8450803_5_type X2 page 19/23
DS13925 - Rev 1
Ref.
e3 e4
E2 f f1
C1
C2 e e1 e2
F
F1
R
T
V
B1
B2
B3 c
C
A
A1
A2
A3
B
STGIF5CH60S-X
SDIP2F-26L type X2 package information
Table 13. SDIP2F-26L type X2 package mechanical data
Min.
37.50
0.97
0.97
34.70
23.50
13.90
28.80
1.45
3.30
5.00
11.20
3.356
1.578
7.42
4.88
2.34
0.45
0.35
1.95
0.95
1.550
0.375
0°
Dimensions (mm)
Typ.
5.08
2.54
1.80
0.60
0.50
5.50
11.70
3.556
1.778
7.62
2.10
1.10
1.575
0.400
12.00
14.40
29.30
1.50
3.50
38.00
1.22
1.22
35.00
24.00
14.90
29.80
1.55
3.70
6.00
12.20
3.756
1.978
7.82
5.28
2.74
0.75
0.65
2.25
1.25
1.600
0.425
5°
Max.
38.50
1.47
1.47
35.30
24.50
page 20/23
Revision history
Date
14-Feb-2022
Revision
1
Table 14. Document revision history
Changes
First release.
STGIF5CH60S-X
DS13925 - Rev 1 page 21/23
STGIF5CH60S-X
Contents
Contents
DS13925 - Rev 1 page 22/23
STGIF5CH60S-X
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
DS13925 - Rev 1 page 23/23
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