advertisement
Evaluation Board User Guide
UG-200
One
Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD9467 16-Bit, 200 MSPS/250 MSPS ADC
FEATURES
Full featured evaluation board for the AD9467
SPI and alternate clock options
Internal and external reference options
VisualAnalog and SPI Controller software interfaces
DOCUMENTS NEEDED
AD9467 data sheet
HSC-ADC-EVALCZ data sheet, High Speed Converter
Evaluation Platform (FPGA-based data capture kit)
AN-905 Application Note, VisualAnalog Converter Evaluation
Tool Version 1.0 User Manual
AN-878 Application Note, High Speed ADC SPI Control Software
AN-877 Application Note, Interface to High Speed ADCs via SPI
EQUIPMENT NEEDED
Analog signal source and antialiasing filter
2 switching power supplies (6.0 V, 2.5 A) CUI EPS060250UH-
PHP-SZ, included
PC running Windows® 98 (2nd ed.), Windows 2000,
Windows ME, or Windows XP
USB 2.0 port, recommended (USB 1.1 compatible)
AD9467 evaluation board
HSC-ADC-EVALCZ FPGA-based data capture kit
SOFTWARE NEEDED
VisualAnalog
SPI Controller
GENERAL DESCRIPTION
This document describes the evaluation board for the AD9467, which provides all of the support circuitry required to operate the
AD9467 in its various configurations. The application software used to interface with the device is also described.
The AD9467 data sheet, available at www.analog.com
, which provides additional information, should be consulted when using the evaluation board. All documents and software tools are available at http://www.analog.com/fifo . For any questions, send an email to [email protected]
.
TYPICAL MEASUREMENT SETUP
Figure 1. AD9467-250EBZ Evaluation Board and HSC-ADC-EVALCZ Data Capture Board
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 28
UG-200
TABLE OF CONTENTS
Equipment Needed ........................................................................... 1
Documents Needed .......................................................................... 1
Software Needed ............................................................................... 1
General Description ......................................................................... 1
Typical Measurement Setup ............................................................ 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supplies .............................................................................. 3
REVISION HISTORY
10/10—Revision 0: Initial Version
Evaluation Board User Guide
Input Signals...................................................................................3
Output Signals ...............................................................................3
Default Operation and Jumper Selection Settings ....................5
Evaluation Board Software Quick Start Procedures .....................6
Configuring the Board .................................................................6
Using the Software for Testing .....................................................6
Evaluation Board Schematics and Artwork ................................ 10
Ordering Information .................................................................... 25
Bill of Materials ........................................................................... 25
Rev. 0 | Page 2 of 28
Evaluation Board User Guide
EVALUATION BOARD HARDWARE
The AD9467 evaluation board provides all of the support circuitry required to operate the AD9467 in its various modes
and configurations. Figure 2 shows the typical bench charac-
terization setup used to evaluate the performance of the AD9467.
It is critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance (see the AD9467 data sheet).
See the Evaluation Board Software Quick Start Procedures
section to get started and Figure 17 to Figure 31 for the
complete schematics and layout diagrams that demonstrate the routing and grounding techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching power supply that provides a 6 V, 2.5 A maximum output. Connect the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to 63 Hz. The other end is a 2.1 mm inner diameter jack that connects to the PCB at P700. Once on the PC board, the 6 V supply is fused and conditioned before connecting to low dropout linear regulators that supply the proper bias to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
E704, E705, E706, E707 can be removed to disconnect the switching power supply. This enables the user to bias each section of the board individually. Use P700 and P701 to connect a different supply for each section. At least one 1.8 V supply is needed with a 1 A current capability for 1.8 V AVDD1 and 1.8 V DRVDD;
UG-200
however, it is recommended that separate supplies be used for both analog and digital domains. An additional supply is also required to supply 3.3 V to the DUT, 3.3 V AVDD2. This should also have a 1 A current capability. To operate the evaluation board using the SPI and alternate clock and amplifier options, a separate
3.3 V analog supply is needed in addition to the other supplies.
The 3.3 V supply, or 3.3 V 3P3V_AVDD, should have a 1 A current capability.
INPUT SIGNALS
When connecting the ADC clock and analog source, use clean signal generators with low phase noise, such as Rohde & Schwarz
SMA or HP8644B signal generators or the equivalent. Use a 1 m shielded, RG-58, 50 Ω coaxial cable for making connections to the evaluation board. Enter the desired frequency and amplitude
(refer to the specifications in the AD9467 data sheet).
If a different or external ADC clock source is desired, follow the
instructions in the Clock Circuitry section or use the on-board
crystal oscillator, Y200. Typically, most Analog Devices, Inc., evaluation boards can accept ~2.8 V p-p or 13 dBm sine wave input for the clock. When connecting the analog input source, it is recommended to use a multipole, narrow-band band-pass filter with 50 Ω terminations. Analog Devices uses TTE and
K&L Microwave, Inc., band-pass filters. The filter should be connected directly to the evaluation board.
OUTPUT SIGNALS
The default setup uses the FIFO5 high speed, dual-channel
FIFO data capture board (HSC-ADC-EVALCZ). For more information on this board and its optional settings, visit http://www.analog.com/fifo.
Rev. 0 | Page 3 of 28
UG-200
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
SWITCHING
POWER
SUPPLY
Evaluation Board User Guide
ANALOG INPUT
SIGNAL
SYNTHESIZER
SIGNAL
SYNTHESIZER
CLOCK
INPUT
Figure 2. Evaluation Board Connection
PC
RUNNING ADC
ANALYZER
OR VisualAnalog
USER SOFTWARE
Rev. 0 | Page 4 of 28
Evaluation Board User Guide
DEFAULT OPERATION AND
JUMPER SELECTION SETTINGS
This section explains the default and optional settings or modes allowed on the evaluation board for the AD9467.
Power Circuitry
Connect the switching power supply that is supplied in the evaluation kit between a rated 100 V ac to 240 V ac wall outlet at 47 Hz to 63 Hz and P700.
Analog Input Front-End Circuit
The evaluation board is set up for single-ended analog input connection with an optimum 50 Ω impedance match of
350 MHz of bandwidth. For a different bandwidth response, the input network needs to be changed or modified.
XVREF
XVREF is set to 1.25 V. This causes the ADC to operate with the default internal reference in the 2.5 V p-p full-scale range.
A separate external reference option using the ADR130 is also included on the evaluation board. Populate R400 with a 0 Ω resistor. Note that ADC full-scale ranges from 2.0 V p-p to
2.5 V p-p are supported by the AD9467.
UG-200
Clock Circuitry
The default clock input circuitry is derived from a simple transformer-coupled circuit using a high bandwidth 1:1 impedance ratio transformer (T201) that adds a very low amount of jitter to the clock path. The clock input is 50 Ω terminated and ac-coupled to handle single-ended sine wave types of inputs.
The transformer converts the single-ended input to a differential signal that is clipped before entering the ADC clock inputs.
The evaluation board can be set up to be clocked from the crystal oscillator, Y200. This oscillator is a low phase noise oscillator from Vectron (VCC6-QCD-250M000). If this clock source is desired, install C205 and C206 and remove C202. Jumper
P200 is used to disable the oscillator from running.
A differential LVPECL or LVDS clock driver can also be used to clock the ADC input using the AD9517 (U300). Populate C304,
C305, C306, and C307 with 0.1 µF capacitors for one drive option or the other and remove C209 and C210 to disconnect the default clock path inputs. The AD9517 has many SPI-selectable options that are set to a default mode of operation. Consult the AD9517 data sheet for more information about these and other options.
Dx+, Dx−
If an alternative data capture method to the setup shown in
Figure 2 is used, optional receiver terminations, R500 to R509, can
be installed next to the high speed backplane connector, P502.
Rev. 0 | Page 5 of 28
UG-200 Evaluation Board User Guide
EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
This section provides quick start procedures for using the AD9467, either on the evaluation board or at the system level design.
Both the default and optional settings are described.
CONFIGURING THE BOARD
Before using the software for testing, configure the evaluation board as follows:
1. Connect the evaluation board and the HSC-ADC-EVALCZ
as shown in Figure 1 and Figure 2.
2. Connect one 6 V, 2.5 A switching power supply (such as the CUI, Inc., EPS060250UH-PHP-SZ included) to the evaluation board.
3. Connect one 6 V, 2.5 A switching power supply (such as the CUI EPS060250UH-PHP-SZ included) to the HSC-
ADC-EVALCZ board.
4. Connect the USB cable to J6 on the HSC-ADC-EVALCZ board to the PC.
5. On the evaluation board, place jumpers on all four pin pairs of P600 to connect the SPI bus.
6. On the evaluation board, ensure that P200 is jumpered to the off setting to use the on-board 250 MHz Vectron VCC6 oscillator.
7. On the evaluation board, use a clean signal generator with low phase noise to provide an input signal to the desired channel. Use a 1 m, shielded, RG-58, 50 Ω coaxial cable to connect the signal generator. For best results, use a narrow-band band-pass filter with 50 Ω terminations and an appropriate center frequency. (Analog Devices uses TTE, Allen Avionics, and K&L band-pass filters.)
Figure 3. VisualAnalog, New Canvas Dialog Box
2. After the template is selected, a message box opens, asking if the default configuration can be used to program the
FPGA (see Figure 4). Click Yes, and the window closes.
If a different program is desired, follow Step 3.
USING THE SOFTWARE FOR TESTING
Setting Up the ADC Data Capture
After configuring the evaluation board, set up the ADC data capture block using the following steps:
1. Open VisualAnalog® on a PC. AD9467 should be listed in the status bar of the New Canvas window. Select the template that corresponds to the type of testing to be
Figure 4. VisualAnalog, New Canvas Message Box
3. To view different channels or change features to settings other than the default settings, click the Expand Display button located on the top right corner of the VisualAnalog
window, as shown in Figure 5 and Figure 6.
This process is described in the AN-905 Application Note,
VisualAnalog Converter Evaluation Tool Version 1.0 User
Manual. Once you are finished, click the Collapse Display button.
EXPAND DISPLAY BUTTON
Figure 5. VisualAnalog Window Toolbar, Expand Display Button
Rev. 0 | Page 6 of 28
Evaluation Board User Guide
COLLAPSE DISPLAY BUTTON
UG-200
menu and select the appropriate configuration. Note that the CHIP ID(1) field should be filled to indicate whether the correct SPI Controller configuration file is loaded (see
Figure 6. VisualAnalog, Main Window Expanded Display
4. Program the FPGA of the HSC-ADC-EVALCZ board to a setting other than the default setting as described in Step 3.
Then expand the VisualAnalog display and click the Settings
button in the ADC Data Capture block (see Figure 6). The
ADC Data Capture Settings box opens (see Figure 7).
Figure 8. SPI Controller, CHIP ID(1) Box
2. Click the New DUT button in the SPI Controller (see
NEW DUT BUTTON
Figure 7. ADC Data Capture Settings, Capture Board Tab
5. Select the Capture Board tab and browse to the appropriate programming file. Next, click Program; the DONE LED, D6, in the HSC-ADC-EVALCZ board should then turn on.
6. Exit the ADC Data Capture Settings box by clicking OK.
Setting Up the SPI Controller
After the ADC data capture board setup has been completed, set up the SPI Controller:
1. Open the SPI Controller software by going to the Start menu or double-clicking the SPI Controller software desktop icon. If prompted for a configuration file, select the appropriate one. If not, check the title bar at the top of the SPI Controller window to determine which configuration is loaded. If necessary, choose Cfg Open from the File
Figure 9. SPI Controller, New DUT Button
3. Click the Run button in the VisualAnalog toolbar (see
RUN BUTTON
Figure 10. VisualAnalog Window Toolbar, Run Button
Rev. 0 | Page 7 of 28
UG-200
Applying Input Signal and Optimizing SFDR
Apply the input signal as follows:
1. Apply the input signal so that the fundamental is at the desired level (examine the Fund Power reading in the left
panel of the VisualAnalog FFT window). See Figure 11 and Figure 12.
Evaluation Board User Guide
Figure 11. VisualAnalog, FFT Graph, No Signal or Very Low Signal Applied
Figure 13. Typical FFT, AD9467 (No Buffer Current Optimization)
2. To optimize SFDR performance, use Register 36 and
Register 107 to change the buffer current setting. In the
ADCBase 0
tab of the SPI Controller, find the BUFFER(36)/
BUFFER(107)
box. Use the drop-down list box to select the best current, if necessary. See the AD9467 data sheet, the
AN-878 Application Note, and the AN-877 Application
Note for reference.
Figure 12. VisualAnalog, FFT Graph, Full-Scale Signal Applied
Figure 14. SPI Controller, BUFFER(36)/BUFFER(107)
Rev. 0 | Page 8 of 28
Evaluation Board User Guide UG-200
Figure 15. SPI Controller, SPI Controller, BUFFER(36)/BUFFER(107) Drop-
Down Setting
Figure 16. Typical FFT, AD9467 (With Buffer Current Optimized)
Rev. 0 | Page 9 of 28
UG-200
EVALUATION BOARD SCHEMATICS AND ARTWORK
Evaluation Board User Guide
09436-017
7 1 1 C
DNI
TBD0201
DNI
C116
TBD0201
DNI
8 1 1 C
TBD0201
0.1UF
10UF
P
C112
N
C108
7
8
5
6
0.1UF
C111
14
15
16
13
PAD
33
R111
33
R11 2
SEC
3
1
PRI
4
5
MABA-007159-000000
0.1UF
C104
Figure 17. DUT Analog Input Circuits
Rev. 0 | Page 10 of 28
Evaluation Board User Guide
09436-018
UG-200
0.1UF
C204
Figure 18. DUT Passive (Default) Clock Circuit
0.1UF
C201
10K
R200
10UF
P
C200
N
249
R204
249
R205
10K
R201
Rev. 0 | Page 11 of 28
UG-200 Evaluation Board User Guide
09436-019
24
25
30
31
36
37
43
45
10
3
21
40
Figure 19. DUT Active Clock Circuit
0
R314
100
R313
0
R312
1800PF
C308
1500PF
C310
DNI
0.1UF
C311
.033UF
C309
.22UF
DNI
C312
Rev. 0 | Page 12 of 28
Evaluation Board User Guide
SCLK_DUT
CSB_DUT
SDIO_DUT
OR_C
OR_T
46
45
48
47
42
43
41
44
38
37
39
40
50
51
49
52
53
54
SCLK
CSB
SDIO
DRVDD
DRGND
DVSS
DVDD
OR_C
OR_T
DVSS
DVDD
DVSS
DVDD
AVDD1
AVDD1
AVDD1
VDD3_SPI
VDD8_SPI
0.1UF
DNI
C436
DRVDD
DRGND
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVDD1
AVSS
DVSS
DVDD
AVSS
ENC_
ENC
15
14
16
17
18
11
10
12
13
4
5
3
8
9
7
6
1
2
CLK+
CLK-
DRVDD_DUT
09436-020
UG-200
Figure 20. DUT Circuitry
Rev. 0 | Page 13 of 28
UG-200
OPTIONAL TERMINATION
D C O _ T
D 0 / 1 _ T
D 2 / 3 _ T
D 4 / 5 _ T
D 6 / 7 _ T
D 8 / 9 _ T
D 1 0 / 1 1 _ T
D 1 2 / 1 3 _ T
D 1 4 / 1 5 _ T
O R _ T
R500
DNI
100
R501
DNI
100
R502 DNI
100
R503
DNI
100
R504 DNI
100
R505
DNI
100
R506 DNI
100
R507 DNI
100
R508
DNI
100
R509
100
DNI
D C O _ C
D 0 / 1 _ C
D 2 / 3 _ C
D 4 / 5 _ C
D 6 / 7 _ C
D 8 / 9 _ C
D 1 0 / 1 1 _ C
D 1 2 / 1 3 _ C
D 1 4 / 1 5 _ C
O R _ C
Evaluation Board User Guide
DCO_T
D0/1_T
D2/3_T
D4/5_T
D6/7_T
D8/9_T
D10/11_T
D12/13_T
D14/15_T
OR_T
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
P502 P502
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
DCO_C
AD9517_CSB
CSB_USB
FPGA_CSB
C5
C6
C7
C8
C9
C10
C1
C2
C3
C4
BG6
BG7
BG8
BG9
BG10
BG1
BG2
BG3
BG4
BG5
P502 P502
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG8
DG9
DG10
AGND
P502 P502
6469169-1
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
AGND
D0/1_C
D2/3_C
D4/5_C
D6/7_C
D8/9_C
D10/11_C
D12/13_C
D14/15_C
OR_C
Figure 21. Digital Output Interface
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
P501 P501
C5
C6
C7
C8
C9
C10
C1
C2
C3
C4
P501 P501
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
BG1
BG2
BG3
BG4
BG5
BG6
BG7
BG8
BG9
BG10
P501 P501
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG8
DG9
DG10
6469169-1
AGND
SDO_USB
SDI_USB
SCLK_USB
FPGA_SDIO
FPGA_SCLK
AGND
Rev. 0 | Page 14 of 28
Evaluation Board User Guide
SPI CIRCUITRY
P600
2
1
4
3
6
5
8
7
SDO_USB
SDI_USB
SCLK_USB
CSB_USB
TSW-104-08-G-D
AVDD_3P3V
R600
10K
SDIO
AVDD1_DUT
C600
0.1UF
AGND
AGND
U600
5
VCC
1
A1 Y1
6
3
A2 Y2
4
GND
2
AGND
AVDD1_DUT
R604
1.00K
NC7WZ07P6X
AVDD_3P3V
R605
1.00K
AVDD1_DUT
C601
AGND
U601
1
A1
0.1UF
5
VCC
Y1
6
SCLK
3
A2
GND
2
Y2 4
CSB
NC7WZ16P6X
AGND
Figure 22. SPI Interface Circuitry
CSB_DUT
SDIO_DUT
SCLK_DUT
R606
0
CSB
R607
0 DNI
FPGA_CSB
R608
0
SDIO
R609
0
DNI
FPGA_SDIO
R610
0
SCLK
R611
0 DNI
FPGA_SCLK
UG-200
Rev. 0 | Page 15 of 28
UG-200 Evaluation Board User Guide
09436-023
A C
CR702
10UF
P
C714
N
4.7UF
C709
4.7UF
C716
4.7UF
C708
4.7UF 45OHMS
C715
4.7UF
C713
C710
0.01UF
4.7UF
C717
4.7UF
C719
C718
0.01UF
4.7UF
C720
10UF
P
C707
N
0.1UF
C703
10UF
P
0.1UF
C705
N
C701
P
0.1UF
10UF
C704
N
C700
0.1UF
10UF
P
C706
N
C702
Figure 23. Power Supply Circuitry
Rev. 0 | Page 16 of 28
Evaluation Board User Guide UG-200
Figure 24. Top (Layer 1)
Rev. 0 | Page 17 of 28
UG-200 Evaluation Board User Guide
Figure 25. Ground (Layer 2)
Rev. 0 | Page 18 of 28
Evaluation Board User Guide UG-200
Figure 26. Power Plane (Layer 3)
Rev. 0 | Page 19 of 28
UG-200 Evaluation Board User Guide
Figure 27. Ground Plane (Layer 4)
Rev. 0 | Page 20 of 28
Evaluation Board User Guide UG-200
Figure 28. Ground Plane (Layer 5)
Rev. 0 | Page 21 of 28
UG-200 Evaluation Board User Guide
Figure 29. Power Plane (Layer 6)
Rev. 0 | Page 22 of 28
Evaluation Board User Guide UG-200
Figure 30. Ground Plane (Layer 7)
Rev. 0 | Page 23 of 28
UG-200 Evaluation Board User Guide
Figure 31. Bottom Side (Layer 8)
Rev. 0 | Page 24 of 28
8
9
10
11
12
5
6
7
Evaluation Board User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Item Qty Reference Designator
1
2
3
1 9467CE01A
38 C101, C102, C104, C105, C106, C107, C108,
C109, C110, C111, C201, C202, C204, C207,
C208, C209, C210, C302, C303, C313, C314,
C315, C316, C317, C318, C319, C320, C321,
C322, C323, C428, C431, C600, C601, C700,
C701, C702, C703
7 C112, C200, C704, C705, C706, C707, C714
4 1 C308
1 C309
1 C310
55 C400, C401, C402, C403, C404, C405, C406,
C407, C408, C409, C410, C411, C412, C413,
C414, C415, C416, C417, C418, C419, C420,
C421, C422, C423, C424, C425, C426, C427,
C429, C430, C432, C433, C434, C435, C437,
C438, C439, C440, C441, C442, C443, C444,
C445, C446, C447, C448, C449, C450, C451,
C452, C453, C454, C455, C456, C457
8
2
C708, C709, C710, C715, C716, C717, C718,
C720
C713, C719
1 C116
2
5
CR300, CR702
CR700, CR701, CR703, CR704, CR705
16
17
18
19
20
21
13
14
15
22
23
1
8
1
1
1
3
1
3
2
CR200
E700, E701, E702, E703, E704, E705, E706,
E707
F700
FL700
J100, J102, J201
J300, P600
J700
L105
P100, P200, P300
2 P501, P502
13 R107, R110, R123, R124, R125, R129, R310,
R312, R314, R315, R606, R608, R610
Description
PCB
Capacitor, 0.1 µF, 0402, X7R, ceramic
Manufacturer
Murata
Capacitor tantalum, 10 µF,
10 V, 10%, SMD
Capacitor, 1800 pF, 25 V, ceramic, 0402, SMD
Capacitor, ceramic, 0.033 µF,
10%, 16 V, X5R, 0402
Capacitor, 1500 pF, 0402,
25 V, ceramic, X7R
Capacitor, ceramic, 0.1 µF,
6.3 V, X5R, 0201
AVX
Panasonic
Panasonic
Panasonic
Murata
Capacitor, ceramic, 4.7 µF,
6.3 V, X5R, 0603
Capacitor, 10,000 pF, 0402,
16 V, ceramic, X7R
Murata
Panasonic
Capacitor, ceramic, 1.8 pF,
25 V, C0G 0201
LED green USS type 0603
Rectifier SIL 2A 50 V DO-
214AA
Murata
Panasonic
Micro
Commercial
Components
Corp
Diode Schottky dual series Avago
Bead core 3.2 × 2.5 × 1.6
SMD T/R, 45 Ω @ 100 MHz
Panasonic
Polyswitch 1.10 A reset fuse
SMD
Tyco/Raychem
EMI filter LC block choke coil Murata
SMA, end launch, COAX Samtec
CONN-PCB header 8-pin double row
Samtec
Power supply connector
Inductor SM, 10 nH
Conn-PCB BERG HDR ST male 3P
CONN_PCB 60-pin RA connector
Resistor, 0 Ω, 0402, 1/16 W,
1%
Switchcraft
Coilcraft
Samtec
Tyco
Panasonic
UG-200
Part Number
GRM155R71C104KA88D
TAJA106K010RNJ
ECJ-0EB1E182K
0402YD333KAT2A
ECJ-0EB1E152K
GRM033R60J104KE19D
GRM188R60J475KE19D
ECJ-0EB1C103K
GRM0335C1E1R8CD01D
LNJ314G8TRA
S2A-TP
HSMS-2812BLK
EXCCL3225U1
NANOSMDC110F-2
BNX016-01
SMA-J-P-H-ST-EM1
TSW-104-08-T-D
RAPC722X
0603CS-10NXJLW
TSW-103-08-G-S
6469169-1
ERJ-2GE0R00X
Rev. 0 | Page 25 of 28
37
38
39
40
41
42
43
33
34
35
36
29
30
31
32
26
27
28
UG-200
Item Qty Reference Designator
24 2 R117, R118
25 2 R119, R120
2
2
1
1
1
2
2
1
1
1
1
2
4
5
R206, R207
R105, R106, R111, R112
R200, R201, R600, R601, R602
2
6
R127, R128
R204, R205, R303, R307, R308, R700
10 R300, R304, R305, R306, R309, R603, R604,
R605, R701, R702
1 R704
R703
R301
R302
R316
R103, R130
R311, R313
T101, T104
T103, T200
T105
DUT1
U100
1
1
1
1
2
1
1
1
44
45
46
47
48
49
50
51
U300
U400
U600
U601
U700, U701
U702
U703
Y200
Evaluation Board User Guide
Description
Resistor, 5.60 Ω, 1/16 W, 1%,
0402, SMD
Resistor, 15 Ω, 1/20 W, 5%,
0201, SMD
Resistor, 33 Ω, 1/10 W, 5%,
0402, SMD
Resistor, 33 Ω, 1/10 W, 5%,
0402, SMD
Resistor, 10.0 kΩ, 0402,
1/16 W, 1%
Resistor, 0.0 Ω, 1/20 W, 0201,
SMD
Resistor, 249 Ω, 0402,
1/16 W, 1%
Manufacturer
Vishay/Dale
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Resistor, 1.00 kΩ, 0402,
1/16 W, 1%
Resistor, 750 Ω, 1/10 W, 5%,
0402, SMD
Resistor, 316 Ω, 0402,
1/16 W, 1%
Resistor, 4.12 kΩ, 0402,
1/10 W, 1%
Panasonic
Panasonic
Panasonic
Panasonic
Resistor, 5.1 kΩ, 0402,
1/16 W, 5%
Resistor, 200 Ω, 1/10 W, 1%,
0402, SMD
Resistor, 20 Ω, 1/20 W, 5%,
0201, SMD
Panasonic
Panasonic
Panasonic
Resistor, 100 Ω, 1/10 W, 5%,
0402, SMD
Panasonic
XFMR, 1:1 impedance ratio Minicircuits
Balun, 1:1 impedance ratio Macom
Balun, 1:1 impedance ratio Anaren
IC-ADI LFCSP 10 mm ×
10 mm plus EPAD
IC 2.6 GHz ultralow distortion differential IF/RF amplifier
IC-ADI 12-output CLK GEN with INT 1.6 GHZ VCO
Analog Devices
Analog Devices
Analog Devices
IC, voltage ref, precision series, SOT23_6
Analog Devices
IC tinylogic UHS dual buffer Fairchild
IC tinylogic UHS dual buffer Fairchild
Analog Devices IC, regulator 0.8 V to 5.0 V, low dropout CMOS, SO8
IC-ADI low dropout CMOS linear regulator
IC-ADI low dropout CMOS linear regulator
250 MHz, XTAL 3.3 V LVPECL
OSC
Analog Devices
Analog Devices
Vectron
AD9517-4BCPZ
ADR130AUJZ
NC7WZ07P6X
NC7WZ16P6X
ADP1708ARDZ-R7
ADP1706ARDZ-3.3-R7
ADP1706ARDZ-1.8-R7
VCC6-QCD-250M000
Part Number
CRCW04025R60FNED
ERJ-1GEJ150C
ERJ-2GEJ330X
ERJ-2GEJ330X
ERJ-2RKF1002X
ERJ-1GE0R00C
ERJ-2RKF2490X
ERJ-2RKF1001X
ERJ-2GEJ751X
ERJ-2RKF3160X
ERJ-2RKF4121X
ERJ-2GEJ512X
ERJ-2RKF2000X
ERJ-1GEJ200C
ERJ-2GEJ101X
ADT1-1WT+
MABA-007159-000000
BD0205F5050A00
AD9467BCPZ-250
ADL5562ACPZ-R7
Rev. 0 | Page 26 of 28
Evaluation Board User Guide
Item Qty Reference Designator
52 7 MP101, MP102, MP103, MP104, MP105,
MP106, MP107
53 4 MP111, MP112, MP113, MP114
Description
Part of assembly, 100 mil jumpers, place into P100
(Pin 2 to Pin 3), P200 (Pin 1 to Pin 2), J300 (Pin 3 to
Pin 4), P600 (Pin 1 to Pin 2,
Pin 3 to Pin 4, Pin 5 to Pin 6,
Pin 7 to Pin 8)
Part of assembly, insert/ snap into the large holes from the bottom side of board, 14 mm height, dual locking standoffs for circuit board support
Manufacturer
SAMTEC
RICHCO CBSB-14-01
UG-200
Part Number
SNT-100-BK-G-H
Rev. 0 | Page 27 of 28
UG-200
NOTES
Evaluation Board User Guide
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG09436-0-10/10(0)
Rev. 0 | Page 28 of 28
advertisement
Related manuals
advertisement
Table of contents
- 1 Features
- 1 Equipment Needed
- 1 Documents Needed
- 1 Software Needed
- 1 General Description
- 1 Typical Measurement Setup
- 2 Revision History
- 3 Evaluation Board Hardware
- 3 Power Supplies
- 3 Input Signals
- 3 Output Signals
- 5 Default Operation and Jumper Selection Settings
- 5 Power Circuitry
- 5 Analog Input Front-End Circuit
- 5 XVREF
- 5 Clock Circuitry
- 5 Dx+, Dx−
- 6 Evaluation Board Software Quick Start Procedures
- 6 Configuring the Board
- 6 Using the Software for Testing
- 6 Setting Up the ADC Data Capture
- 7 Setting Up the SPI Controller
- 8 Applying Input Signal and Optimizing SFDR
- 10 Evaluation Board Schematics and Artwork
- 25 Ordering Information
- 25 Bill of Materials