Schneider Electric Easergy MiCOM P54x User Guide

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Schneider Electric Easergy MiCOM P54x User Guide | Manualzz

Easergy MiCOM P54x

(P543, P544, P545 & P546)

Current Differential Protection Relay

P54x/EN M/Nd5

Software Version H4

Hardware Suffix M

Date 06/2016

Technical Manual

Note The technical manual for this device gives instructions for its installation, commissioning, and operation. However, the manual cannot cover all conceivable circumstances or include detailed information on all topics. In the event of questions or specific problems, do not take any action without proper authorization. Contact the appropriate Schneider Electric technical sales office and request the necessary information.

Any agreements, commitments, and legal relationships and any obligations on the part of

Schneider Electric including settlements of warranties, result solely from the applicable purchase contract, which is not affected by the contents of the technical manual.

This device MUST NOT be modified. If any modification is made without the express permission of Schneider Electric, it will invalidate the warranty, and may render the product unsafe.

Easergy, MiCOM and the Schneider Electric logo and any alternative version thereof are trademarks and service marks of Schneider Electric.

All trade names or trademarks mentioned herein whether registered or not, are the property of their owners.

This manual is provided for informational use only and is subject to change without notice.

© 2016, Schneider Electric. All rights reserved.

MiCOM P54x (P543, P544, P545 & P546)

CONTENTS

Chapter

Chapter 1

Chapter 2

Chapter 3

Chapter 4

Chapter 5

Chapter 6

Chapter 7

Chapter 8

Chapter 9

Chapter 10

Chapter 11

Chapter 12

Chapter 13

Chapter 14

Chapter 15

Chapter 16

Chapter 17

Chapter 18

Chapter 19

Chapter 20

Chapter 21

Chapter 22

Description

Safety Information

Introduction

Technical Data

Getting Started

Settings

Operation

Application Notes

Using the PSL Editor

Programmable Logic

Measurements and Recording

Product Design

Commissioning

Test and Setting Records

Maintenance

Troubleshooting

SCADA Communications

Installation

Connection Diagrams

Cyber Security

Dual Redundant Ethernet Board

Parallel Redundancy Protocol (PRP) Notes

High-availability Seamless Redundancy (HSR)

Firmware and Service Manual Version History

Symbols and Glossary

Contents

Document ID

Px4x/EN SI/I12

P54x/EN IT/Nd5

P54x/EN TD/Nd5

P54x/EN GS/Nd5

P54x/EN ST/Nd5

P54x/EN OP/Nd5

P54x/EN AP/Nd5

Px4x/EN SE/E22

P54x/EN PL/Nd5

P54x/EN MR/Nd5

P54x/EN PD/Nd5

P54x/EN CM/Nd5

P54x/EN RC/Nd5

Px4x/EN MT/H53

Px4x/EN TS/If7

P540d/EN SC/A01

Px4x/EN IN/A03

P54x/EN CD/Nd5

Px4x/EN CS/A14

Px4x/EN REB/F22

Px4x/EN PR/D22

Px4x/EN HS/B21

P54x/EN VH/Nd5

Px4x/EN SG/A09

P54x/EN M/Nd5 Page-1

Contents MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page-2 P54x/EN M/Nd5

MiCOM Px4x (SI) Safety Information

Px4x/EN SI/I12

SAFETY INFORMATION

CHAPTER SI

Page (SI)-1

(SI) Safety Information MiCOM Px4x

Date:

Products covered by this chapter:

Software Version:

07/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

All MiCOM Px4x products

Hardware Suffix: All MiCOM Px4x products

Connection Diagrams: P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x (P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (SI)-2 Px4x/EN SI/I12

Contents

CONTENTS

1 Introduction

2 Health and Safety

3 Symbols and Labels on the Equipment

3.1

3.2

Symbols

Labels

4 Installing, Commissioning and Servicing

5 De-commissioning and Disposal

6 Technical Specifications for Safety

6.1

6.2

6.3

6.4

Protective Fuse Rating

Protective Class

Installation Category

Environment

(SI) Safety Information

Page SI-

9

13

14

14

14

14

14

5

6

8

8

8

Px4x/EN SI/I12 Page (SI)-3

(SI) Safety Information

Notes:

Contents

Page (SI)-4 Px4x/EN SI/I12

Introduction

1

(SI) Safety Information

INTRODUCTION

This document and the relevant equipment documentation provide full information on safe handling, installation, testing, commissioning and operation of this equipment. This document also includes reference to typical equipment label markings.

Documentation for equipment ordered from Schneider Electric is dispatched separately from manufactured goods and may not be received at the same time as the equipment.

Therefore this guide is provided to ensure that printed information which may be present on the equipment is fully understood by the recipient.

The technical data in this document provides typical information and advice, which covers a variety of different products. You must also refer to the Technical Data section of the relevant product publication(s) as this includes additional information which is specific to particular equipment.

You also need to make reference to the external connection diagram(s) before the equipment is installed, commissioned or serviced.

Language-specific, self-adhesive User Interface labels are provided in a bag for some equipment.

The manuals within the MiCOM P40 range include notices, which contain safety-related information. These are ranked in terms of their importance (from high to low) as follows:

DANGER THIS INDICATES AN IMMINENTLY HAZARDOUS

SITUATION WHICH, IF NOT AVOIDED, WILL RESULT IN

DEATH OR SERIOUS INJURY.

WARNING This indicates an potentially hazardous situation which, if not avoided, can result in death or serious injury.

Caution This indicates an potentially hazardous situation which, if not avoided, can result in minor or moderate injury.

Important This indicates an potentially hazardous situation which, if not avoided, can result in equipment damage.

Note This indicates an explanation or gives information which is useful to know, but which is not directly concerned with any of the above.

These may appear with relevant Symbols (possibly electrical hazard, safety alert, disposal concern, etc) to denote the nature of the notice.

These notices appear at the relevant place in the remainder of this manual.

Px4x/EN SI/I12 Page (SI)-5

(SI) Safety Information

2

Health and Safety

HEALTH AND SAFETY

The information in this part of the equipment documentation is intended to ensure that equipment is properly installed and handled in order to maintain it in a safe condition.

People

Schneider Electric assume that everyone who will be associated with installing, testing, commissioning, operating or working on the equipment (and any system to which it may be connected) will be completely familiar with the contents of the Safety Information chapter and the Safety Guide. We also assume that everyone working with the equipment (and any connected systems) will have sufficient qualifications, knowledge and experience of electrical systems. We also assume that they will work with a complete understanding of the equipment they are working on and the health and safety issues of the location in which they are working. All people must be able to perform tasks in accordance with accepted safety engineering practices. They must also be suitably authorised to energize and de-energize equipment and to isolate, ground (earth) and label it. Given the risks of working on electrical systems and the environments in which they may be located, they must be trained in the care and use of safety apparatus in accordance with safety engineering practices; and they should be trained in emergency first aid procedures.

Receipt, Handling, Storage and Unpacking Relays

Although relays are of a robust construction, we recommend that you become familiar with the Installation chapter, as this describes important issues associated with receiving, handling, storage and unpacking relays.

Planning

We recommend that a detailed plan is developed before equipment is installed into a location, to make sure that all of the work can be done safely. Such a plan needs to determine how relevant equipment can be isolated from the electrical supply in such as way that there is no possibility of accidental contact with any electrical live equipment, wiring or busbars. It also needs to take into account the requirements for people to work with tools/equipment a safe distance away from any hazards. The plan also needs to be aware of the risk of falling devices; such as equipment being knocked over, units being accidentally dropped or protruding units being knocked out of rack-mounted cabinets.

Safety shoes are recommended, as well as other protective clothing such as safety hats and gloves.

Live and Stored Voltages

When electrical equipment is in operation, dangerous voltages will be present in certain parts of the equipment. Even if electrical power is no longer being supplied, some items of equipment may retain enough electrical energy inside them to pose a potentially serious risk of electrocution or damage to other equipment.

Important Remember that placing equipment in a “test” position does not normally isolate it from the power supply or discharge any stored electrical energy.

Warnings and Barricades

Everyone must observe all warning notices. This is because the incorrect use of equipment, or improper use may endanger personnel and equipment and also cause personal injury or physical damage.

Unauthorized entry should also be prevented with suitably marked fixed barricades which will notify people of any dangers and screen off work areas.

People should not enter electrical equipment cubicles or cable troughs until it has been confirmed that all equipment/cables have been isolated and de-energised.

Electrical Isolation

Before working in the terminal strip area, all equipment which has the potential to provide damaging or unsafe levels of electrical energy must be isolated. You will need to isolate and de-energize the specific item of equipment which is being worked on.

Page (SI)-6 Px4x/EN SI/I12

Health and Safety (SI) Safety Information

Depending on the location, you may also need to isolate and de-energize other items which are electrically connected to it as well as those which are close enough to pose a risk of electrocution in the event of accidental physical or electrical contact.

Remember too that, where necessary, both load and line sides should be de-energized.

Before you make contact with any equipment use an approved voltage detection device to reduce the risk of electric shock.

Risk of Accidental Contact or Arc Flash

Be aware of the risk of accidental contact with hands, long hair, tools or other equipment; and be aware of the possibility of the increased risk of arc flash from areas of high voltage.

Always wear appropriate shock and arc flash personal protective equipment while isolating and de-energizing electrical equipment and until a de-energized state is confirmed.

Temporary Protection

Consider the use of temporary protective Earthing Clamps. This is required to establish and maintain de-energization when electrical equipment operates at greater than 1000 volts or there is potential for back-feed at any voltage.

Temporary protective earthing can be accomplished by installing cables designed for that purpose or by the use of intrinsic earthing clamp equipment. Temporary protective earthing clamp equipment must be able to carry maximum fault current available and have an impedance low enough to cause the applicable protective device to operate.

Restoring Power

To reduce the risks, the work plan should have a check list of things which must be completed and checks made before electrical power can be restored.

Be aware of the risk that electrical systems may have power restored to them at a remote location (possibly by the customer or a utility company). You should consider the use of lockouts so that the electrical system can be restored only when you unlock it. In any event, you should be aware of and be part of the process which determines when electrical power can be restored; and that people working on the system have control over when power is restored.

Inspect and test the electrical equipment to ensure it has been restored to a “safe” condition prior re-energizing. Replace all devices, doors and covers before turning on the power to any device.

Qualified Personnel

Proper and safe operation of the equipment depends on appropriate shipping and handling, proper storage, installation and commissioning, and on careful operation, maintenance and servicing. For this reason only qualified personnel may work on or operate the equipment.

Qualified personnel are individuals who:

Are familiar with the installation, commissioning, and operation of the equipment

• and of the system to which it is being connected

Are able to safely perform switching operations in accordance with accepted safety engineering practices and are authorized to energize and de-energize equipment and to isolate, ground, and label it

Are trained in the care and use of safety apparatus in accordance with safety engineering practices

Are trained in emergency procedures (first aid)

Documentation

The equipment documentation gives instructions for its installation, commissioning, and operation. However, the manuals cannot cover all conceivable circumstances or include detailed information on all topics. In the event of questions or specific problems, do not take any action without proper authorization. Contact the appropriate Schneider Electric technical sales office and request the necessary information.

Px4x/EN SI/I12 Page (SI)-7

(SI) Safety Information

3

3.1

Symbols and Labels on the Equipment

SYMBOLS AND LABELS ON THE EQUIPMENT

For safety reasons the following symbols and external labels, which may be used on the equipment or referred to in the equipment documentation, should be understood before the equipment is installed or commissioned.

Symbols

3.2

Note

*CAUTION

This symbol may also be used for a Protective Conductor (Earth) Terminal if that terminal is part of a terminal block or sub-assembly e.g. power supply.

The term “Earth” used throughout this technical manual is the direct equivalent of the North American term

“Ground”.

Labels

See Safety Guide (SFTY/5L M) for typical equipment labeling information.

Page (SI)-8 Px4x/EN SI/I12

Installing, Commissioning and Servicing

4

(SI) Safety Information

INSTALLING, COMMISSIONING AND SERVICING

Px4x/EN SI/I12

Many injuries are caused by:

Lifting heavy objects

Lifting things incorrectly

Pushing or pulling heavy objects

Using the same muscles repetitively

Follow the Health and Safety at Work, etc Act 1974, and the Management of Health and

Safety at Work Regulations 1999.

The equipment documentation should be consulted before installing, commissioning, or servicing the equipment.

Terminals exposed during installation, commissioning and maintenance may present a hazardous voltage unless the equipment is electrically isolated.

The clamping screws of all terminal block connectors, for field wiring, using M4 screws shall be tightened to a nominal torque of 1.3 Nm.

Equipment intended for rack or panel mounting is for use on a flat surface of a Type 1 enclosure, as defined by Underwriters Laboratories (UL).

Any disassembly of the equipment may expose parts at hazardous voltage, also electronic parts may be damaged if suitable ElectroStatic voltage Discharge (ESD) precations are not taken.

If there is unlocked access to the rear of the equipment, care should be taken by all personnel to avoid electric shock or energy hazards.

Caution Voltage and current connections shall be made using insulated crimp terminations to ensure that terminal block insulation requirements are maintained for safety.

Watchdog (self-monitoring) contacts are provided in numerical relays to indicate the health of the device. Schneider Electric strongly recommends that these contacts are hardwired into the substation's automation system, for alarm purposes.

To ensure that wires are correctly terminated the correct crimp terminal and tool for the wire size should be used.

Page (SI)-9

(SI) Safety Information Installing, Commissioning and Servicing

The equipment must be connected in accordance with the appropriate connection diagram.

The protective conductor (earth) connection must not be removed since the protection against electric shock provided by the equipment would be lost.

When the protective (earth) conductor terminal (PCT) is also used to terminate cable screens, etc., it is essential that the integrity of the protective (earth) conductor is checked after the addition or removal of such functional earth connections. For M4 stud PCTs the integrity of the protective (earth) connections should be ensured by use of a locknut or similar.

The recommended minimum protective conductor (earth) wire size is 2.5 mm² (3.3 mm² for North America) unless otherwise stated in the technical data section of the equipment documentation, or otherwise required by local or country wiring regulations.

The protective conductor (earth) connection must be low-inductance and as short as possible.

All connections to the equipment must have a defined potential. Connections that are pre-wired, but not used, should preferably be grounded when binary inputs and output relays are isolated. When binary inputs and output relays are connected to common potential, the pre-wired but unused connections should be connected to the common potential of the grouped connections.

Voltage rating/polarity (rating label/equipment documentation)

CT circuit rating (rating label) and integrity of connections

Protective fuse rating

Integrity of the protective conductor (earth) connection (where applicable)

Voltage and current rating of external wiring, applicable to the application

Page (SI)-10 Px4x/EN SI/I12

Installing, Commissioning and Servicing (SI) Safety Information

For external protective fuses a UL or CSA Listed fuse shall be used. The Listed type shall be a Class J time delay fuse, with a maximum current rating of 15 A and a minimum d.c. rating of 250 Vd.c., for example type AJT15.

Where UL or CSA Listing of the equipment is not required, a high rupture capacity

(HRC) fuse type with a maximum current rating of 16 Amps and a minimum d.c. rating of

250 Vd.c. may be used, for example Red Spot type NIT or TIA.

For most equipment with ring-terminal connections, the threaded terminal block for current transformer termination has automatic CT shorting on removal of the module.

Therefore external shorting of the CTs may not be required, the equipment documentation should be checked to see if this applies.

For equipment with pin-terminal connections, the threaded terminal block for current transformer termination does NOT have automatic CT shorting on removal of the module.

Px4x/EN SI/I12 Page (SI)-11

(SI) Safety Information Installing, Commissioning and Servicing

*Note: When a MiCOM P992 Test Plug is inserted into the MiCOM

P991 Test Block, the secondaries of the line CTs are automatically shorted, making them safe.

Page (SI)-12 Px4x/EN SI/I12

De-commissioning and Disposal

5 DE-COMMISSIONING AND DISPOSAL

(SI) Safety Information

Disposal

It is recommended that incineration and disposal to water courses is avoided. The equipment should be disposed of in a safe manner. Any equipment containing batteries should have them removed before disposal, taking precautions to avoid short circuits.

Particular regulations within the country of operation, may apply to the disposal of the equipment.

Px4x/EN SI/I12 Page (SI)-13

(SI) Safety Information

6

6.1

Technical Specifications for Safety

TECHNICAL SPECIFICATIONS FOR SAFETY

Unless otherwise stated in the equipment technical manual, the following data is applicable.

Protective Fuse Rating

The recommended maximum rating of the external protective fuse for equipments is 16A,

High Rupture Capacity (HRC) Red Spot type NIT, or TIA, or equivalent. Unless otherwise stated in equipment technical manual, the following data is applicable. The protective fuse should be located as close to the unit as possible.

6.2

6.3

6.4

Protective Class

IEC 60255-27: 2005

EN 60255-27: 2006

Class I (unless otherwise specified in the equipment documentation).

This equipment requires a protective conductor (earth) connection to ensure user safety.

Installation Category

IEC 60255-27: 2013 Installation Category III (Overvoltage Category III)

EN 60255-27: 2014 Distribution level, fixed installation.

Equipment in this category is qualification tested at 5 kV peak, 1.2/50 µs, 500

, 0.5 J, between all supply circuits and earth and also between independent circuits.

Environment

The equipment is intended for indoor installation and use only. If it is required for use in an outdoor environment then it must be mounted in a specific cabinet of housing which will enable it to meet the requirements of IEC 60529 with the classification of degree of protection IP54 (dust and splashing water protected).

Pollution Degree Pollution Degree 2 Compliance is demonstrated by

Altitude reference to safety standards.

Operation up to 2000m

Page (SI)-14 Px4x/EN SI/I12

MiCOM P54x (P543, P544, P545 & P546) (IT) 1 Introduction

P54x/EN IT/Nd5

INTRODUCTION

CHAPTER 1

Page (IT) 1-1

(IT) 1 Introduction MiCOM P54x (P543, P544, P545 & P546)

Date: 06/2016

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

This chapter covers the specific versions of the MiCOM products listed below. This includes only

M

the following combinations of Software Version and Hardware Suffix.

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (IT) 1-2 P54x/EN IT/Nd5

Contents

CONTENTS

1

 

Documentation Structure

2

 

Introduction to MiCOM

3

 

Product Scope

3.1

 

3.2

 

3.3

 

3.3.1

 

3.3.2

 

3.3.3

 

3.3.4

 

Functional Overview

Application Overview

Ordering Options

MiCOM P543

MiCOM P544

MiCOM P545

MiCOM P546

FIGURES

Figure 1 - Functional diagram

TABLES

Table 1 - Functional overview

(IT) 1 Introduction

Page (IT) 1-

5

 

7

 

8

 

8  

11  

12  

13  

16  

19  

22  

Page (IT) 1-

11  

Page (IT) 1-

10  

P54x/EN IT/Nd5 Page (IT) 1-3

(IT) 1 Introduction

Notes:

Tables

Page (IT) 1-4 P54x/EN IT/Nd5

Documentation Structure (IT) 1 Introduction

This manual provides a functional and technical description of this MiCOM device, and gives a comprehensive set of instructions for it’s use and application. A summary of the different chapters of this manual is given here:

Description Chapter Code

Px4x/EN SI

A guide to the safe handling, commissioning and testing of equipment. This provides typical information and advice which covers a range of MiCOM Px4x products. It explains how to work with equipment safely.

1 Introduction

A guide to the MiCOM range of relays and the documentation structure. General safety aspects of handling Electronic Equipment are discussed with particular reference to relay safety symbols.

Also a general functional overview of the relay and brief application summary is given.

P54x/EN IT

P54x/EN TD

Technical data including setting ranges, accuracy limits, recommended operating conditions, ratings and performance data. Compliance with norms and international standards is quoted where appropriate.

P54x/EN GS

A guide to the different user interfaces of the IED describing how to start using it. This chapter provides detailed information regarding the communication interfaces of the IED, including a detailed description of how to access the settings database stored within the IED.

4 Settings

List of all relay settings, including ranges, step sizes and defaults, together with a brief explanation of each setting.

5 Operation

A comprehensive and detailed functional description of all protection and non-protection functions.

P54x/EN ST

P54x/EN OP

P54x/EN AP

This section includes a description of common power system applications of the relay, calculation of suitable settings, some typical worked examples, and how to apply the settings to the relay.

7 Using the PSL Editor

This provides a short introduction to using the PSL Editor application.

Px4x/EN SE

P54x/EN PL

Overview of the Programmable Scheme Logic (PSL) and a description of each logical node. This chapter includes the factory default and an explanation of typical applications.

9 Measurements and Recording

Detailed description of the relays recording and measurements functions including the configuration of the event and disturbance recorder and measurement functions.

P54x/EN MR

P54x/EN PD

Overview of the operation of the relay’s hardware and software. This chapter includes information on the self-checking features and diagnostics of the relay.

11 Commissioning

Instructions on how to commission the relay, comprising checks on the calibration and functionality of the relay.

12 Test and Setting Records

This is a list of the tests made and the settings stored on the MiCOM IED.

13 Maintenance

A general maintenance policy for the relay is outlined.

P54x/EN CM

P54x/EN RC

Px4x/EN MT

P54x/EN IT/Nd5 Page (IT) 1-5

(IT) 1 Introduction Documentation Structure

14 Troubleshooting

Description

Advice on how to recognize failure modes and the recommended course of action. Includes guidance on whom within Schneider Electric to contact for advice.

Chapter Code

Px4x/EN TS

P540d/EN SC

This chapter provides an overview regarding the SCADA communication interfaces of the relay.

Detailed protocol mappings, semantics, profiles and interoperability tables are not provided within this manual. Separate documents are available per protocol, available for download from our website.

16 Installation

Recommendations on unpacking, handling, inspection and storage of the relay. A guide to the mechanical and electrical installation of the relay is provided, incorporating earthing recommendations.

Px4x/EN IN

P54x/EN CD

A list of connection diagrams, which show the relevant wiring details for this relay.

Px4x/EN CS

An overview of cyber security protection (to secure communication and equipment within a substation environment). Relevant cyber security standards and implementation are described too.

19 Dual Redundant Ethernet Board

Information about how MiCOM products can be equi pped with Dual Redundant Ethernet Boards

(DREBs) and the different protocols which are avai labl e. Also covers how to configure and commission these types of boards.

20 Parallel Redundancy Protocol (PRP) Notes

Includes an introduction to Parallel Redundancy Protocols (PRP) and the different networks PRP can be used with. Also includes details of PRP and MiCOM functions.

21 High-availability Seamless Redundancy (HSR)

Introduction to the High-availability Seamless Redundancy (HSR); and how it is implemented on

MiCOM-based products manufactured by Schneider Electric.

22 Version History (of Firmware and Service Manual)

This is a history of all hardware and software releases for this product.

Symbols Glossary

Px4x/EN REB

Px4x/EN PR

Px4x/EN HS

P54x/EN VH

P54x/EN SG

List of common technical terms, abbreviations and symbols found in this documentation.

Some of these chapters are Specific to a particular MiCOM product. Others are Generic – meaning that they cover more than one MiCOM product. The generic chapters have a Chapter Code which starts with Px4x.

Page (IT) 1-6 P54x/EN IT/Nd5

Introduction to MiCOM (IT) 1 Introduction

About MiCOM Range

MiCOM is a comprehensive solution capable of meeting all electricity supply requirements. It comprises a range of components, systems and services from Schneider

Electric.

Central to the MiCOM concept is flexibility. MiCOM provides the ability to define an

 application solution and, through extensive communication capabilities, integrate it with your power supply control system.

The components within MiCOM are:

P range protection relays;

C range control products;

M range measurement products for accurate metering and monitoring;

S range versatile PC support and substation control packages.

MiCOM products include extensive facilities for recording information on the state and behaviour of the power system using disturbance and fault records. They can also provide measurements of the system at regular intervals to a control centre enabling remote monitoring and control to take place.

For up-to-date information, please see: www.schneider-electric.com

Note During 2011, the International Electrotechnical Commission classified the voltages into different levels (IEC 60038). The IEC defined LV, MV, HV and

EHV as follows: LV is up to 1000V. MV is from 1000V up to 35 kV. HV is from 110 kV or 230 kV. EHV is above 230 KV.

There is still ambiguity about where each band starts and ends. A voltage level defined as LV in one country or sector, may be described as MV in a different country or sector. Accordingly, LV, MV, HV and EHV suggests a possible range, rather than a fixed band. Please refer to your local

Schneider Electric office for more guidance.

P54x/EN IT/Nd5 Page (IT) 1-7

(IT) 1 Introduction Product Scope

All the P54x relays are designed for all overhead line and cable applications, as they interface readily with the longitudinal (end-end) communications channel between line terminals. They also include a high-speed

current

differential unit protection. They all have optional high-performance sub-c ycle distance protection including phasesegregated aided Directional Earth Fault (DEF).

Four P54x (P543, P544, P545 & P546) models are offered:

P543 and P545:

Features included only in the P543 and P545 models are: Differential for Plain and

T ransformer Feeders.

P543 in (60TE /12”) with 16 inputs and 14 standard outputs (or 7 standard and 4 high break outputs option).

P545 in (80TE /19”) with 24 inputs and 32 standard outputs (or 16 standard and 8 high break outputs option).

Note The distance option is independent of the hardware confi guration and is sp ecified by means of the software number (refer to the ordering options in the Ordering Options section).

P544 and P546:

Features included only in the P544 and P546 models are Differential for Mesh

Corner.

P544 in (60TE /12”) with 16 inputs and 14 standard outputs (or 7 standard and 4 high break outputs option)

P546 in (80TE /19”) with 24 inputs and 32 standard outputs (or 16 standard and 8 high break outputs, or 8 standard and 12 high break outputs options).

Note The distance option is independent of the hardware confi guration and is sp ecified by means of the software number (refer to the ordering options in

Ordering Options section).

The relay contains a wide variety of protection functions which are summarized below:

87

ANSI FEATURE

Optocoupled digital inputs:

Software Releases A0 and B0

Standard relay output contacts

Standard and high break output contacts

Dual rated 1A and 5A CT inputs

Tripping Mode - single or three pole

ABC and ACB phase rotation

Multiple password access control levels

Phase segregated current differential

2 and 3 terminal lines/cables

Feeders with in-zone transformers

Control of dual circuit breakers

Suitable for use with SDH/SONET networks (using P594)

InterMiCOM

64 teleprotection for direct relay-relay communication

















P543

128

14

Models

P544 P545

128

14

128

32

P546

128

32





Page (IT) 1-8 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

ANSI FEATURE

P543

Models

P544 P545 P546

21P/21G Distance zones, full-scheme protection

Phase elements

Characteristic

Ground elements

(5)

Load blinder

85

Easy setting mode

Mutual compensation

(for fault locator and distance zones)

Communication-aided schemes, PUTT, POTT, Blocking, Weak

Infeed





50/27

Accelerated tripping - loss of load and Z1 extension

Switch on to fault and trip on recluse - elements for fast fault clearance upon breaker closure





68

78

Power swing blocking

Out of step

67N Directional Earth Fault (DEF) unit protection

50/51/67

50N/51N/

67N

Phase overcurrent stages, with optional directionality

Earth/ground overcurrent stages, with optional directionality

51N/67N/SEF Sensitive Earth Fault (SEF)

High-impedance Restricted Earth Fault 64

67/46

46BC

49

27

Negative sequence overcurrent stages, with optional directionality

Broken conductor (open jumper), used to detect open circuit faults

Thermal overload protection

Undervoltage protection stages

4

4

4

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

2







4







59 Overvoltage stages

59 Remote Remote overvoltage protection stages

59N

81U/O/R

50BF

Residual voltage stages (neutral displacement)

A 4-stage underfrequency, 2-stage overfrequency and an advanced

4-stage rate of change of frequency element as well.

High speed breaker fail. Two-stage, suitable for re-tripping and backtripping





(5)

Mho and quadrilateral

4

4

4

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2

(5)

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4

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4

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

2



(5)

4

4

4

4

2

2 2 2 2

2 2 2 2

2 2 2 2

CTS

VTS

79

25

CT supervision (including differential CTS, patent pending)

Current and voltage transformer supervision

Auto-reclose - shots supported

Check synchronism, 2 stages

Check synchronism, 2 stages with additional split detection





4



4





4



4

25

FL Fault locator

SOE records

Disturbance recorder, samples per cycle. For waveform capture

Circuit breaker condition monitoring

Graphical Programmable Scheme Logic (PSL)

IRIG-B time synchronism

4 4 4 4

   

512 512 512 512

48







48



48







48



P54x/EN IT/Nd5 Page (IT) 1-9

(IT) 1 Introduction Product Scope

ANSI FEATURE

Second rear communication port

High speed, high break (HB) contacts

P543





Models

P544





P545





P546





Table 1 - Functional overview

The relay supports these relay management functions as well as the ones shown above.

Measurement of all instantaneous & integrated values

Circuit breaker, status & condition monitoring

Trip circuit and coil supervision (using PSL)

Alternative setting groups (model dependent)

Programmable function keys (model dependent)

Programmable allocation of digital inputs and outputs

Sequence of event recording

Comprehensive disturbance recording (waveform capture)

Fault

Fully customizable menu texts

Multi-level protection

Power-up diagnostics and continuous self-monitoring of relay

Commissioning test facilities

Real time clock/time s ynchronization - time sync hronization possible from IRIG-B input, opto input or communications

Page (IT) 1-10 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Figure 1 - Functional diagram

P54x/EN IT/Nd5 Page (IT) 1-11

(IT) 1 Introduction

Information Required with Order for these products:

MiCOM

MiCOM

MiCOM

MiCOM

For up-to-date information on the cortec, please visit the website: www.schneider-electric.com

Product Scope

Page (IT) 1-12 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form MiCOM P543

Ready-to-use configuration

Current differential - With distance backup, 1/3 pole autoreclose and check synchronising

Nominal auxiliary voltage

24 - 32 Vdc

48 - 110 Vdc

110 - 250 Vdc (100 - 240 Vac)

In/Vn rating

In = 1A/5A ; Vn = 100-120Vac

Hardware options

Standard - None

IRIG-B Only (Modulated)

Fibre Optic Converter Only

IRIG-B (Modulated) & Fibre Optic Converter

Ethernet (10Mbit/s)

Ethernet (100Mbit/s)

Second Rear Comms

IRIG-B (Modulated) + Second Rear Comms

InterMiCOM + Courier Rear Port

InterMiCOM + Courier Rear Port + IRIG-B modulated

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports +

Modulated IRIG-B

P543

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports + Unmodulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 2 LC ports + 1 RJ45 port +

Modulated/Un-modulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 3 RJ45 ports + Modulated/Unmodulated IRIG-B

Ethernet (100Mbit/s), 1 RH45 port + Modulated/Un-modulated IRIG-B

Product Options

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 16inputs & 14stn outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 16inputs & 14stn outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 16inputs & 14stn outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 16inputs & 14stn outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 16inputs & 14stn outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 16inputs & 14stn outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 16inputs & 14stn outputs

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 16inputs & 14stn outputs

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P54x/EN IT/Nd5 Page (IT) 1-13

(IT) 1 Introduction Product Scope

Order form MiCOM P543

Ready-to-use configuration

Current differential - With distance backup, 1/3 pole autoreclose and check synchronising

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 16inputs & 14stn outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode, 16inputs & 14stn outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode, 16inputs & 14stn outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 16inputs & 14stn outputs

Ch1=1550nm single-mode, Ch2=850nm multi-mode, 16inputs & 14stn outputs

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 16 inputs & 7stn+4hb outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 16 inputs & 7stn+4hb outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 16 inputs & 7stn+4hb outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 16 inputs & 7stn+4hb outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 16 inputs & 7stn+4hb outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 16 inputs & 7stn+4hb outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 16 inputs & 7stn+4hb outputs

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 16 inputs & 7stn+4hb outputs

P543

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 16 inputs & 7stn+4hb outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode, 16 inputs & 7stn+4hb outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode, 16 inputs & 7stn+4hb outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 16 inputs & 7stn+4hb outputs

Ch1=1550nm single-mode, Ch2=850nm multi-mode, 16 inputs & 7stn+4hb outputs

Protocol options

K-Bus with simple password management - CSL0

IEC 60870-5-103 (VDEW) with simple password management - CSL0

DNP3.0 with simple password management - CSL0

IEC61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with simple password management - CSL0

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with simple password management

- CSL0

DNP3 over Ethernet with Courier rear port K-Bus/RS485 protocol with simple password management - CSL0

IEC61850 Edition 1 / 2 and DNP3 serial with simple password management - CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and DNP3 serial with advanced Cyber Security - CSL1 - Security

Adminstration Tool (SAT) Required

Mounting

Flush / Panel mounting

Language

English, French, German, Spanish

English, French, German, Russian

Chinese, English or French via HMI, with English or French only via Communications port

Software version

Without Distance

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Page (IT) 1-14 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form MiCOM P543

Ready-to-use configuration

Current differential - With distance backup, 1/3 pole autoreclose and check synchronising

With Distance

Customer specific options

Standard version

Hardware version

XCPU2

Dual rated optos

P543 M

**

8

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P54x/EN IT/Nd5 Page (IT) 1-15

(IT) 1 Introduction Product Scope

Order form MiCOM P544

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

Nominal auxiliary voltage

24 - 32 Vdc

48 - 110 Vdc

110 - 250 Vdc (100 - 240 Vac)

In/Vn rating

In = 1A/5A ; Vn = 100-120Vac

Hardware options

Standard - None

IRIG-B Only (Modulated)

Fibre Optic Converter Only

IRIG-B (Modulated) & Fibre Optic Converter

Ethernet (10Mbit/s)

Ethernet (100Mbit/s)

Second Rear Comms

Ethernet (100Mbit/s) plus IRIG-B (De-modulated)

InterMiCOM + Courier Rear Port

InterMiCOM + Courier Rear Port + IRIG-B modulated

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports +

Modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports + Unmodulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 2 LC ports + 1 RJ45 port +

Modulated/Un-modulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 3 RJ45 ports + Modulated/Unmodulated IRIG-B

Ethernet (100Mbit/s), 1 RH45 port + Modulated/Un-modulated IRIG-B

Product Options

Ch1=850nm multi-mode, Ch2=850nm multi-mode

P544

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only)

Ch1=1300nm single-mode, Ch2=1300nm single-mode

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only)

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only)

Ch1=1550nm single-mode, Ch2=1550nm single-mode

Ch1=850nm multi-mode, Ch2=1300nm single-mode

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Page (IT) 1-16 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form MiCOM P544

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

Ch1=850nm multi-mode, Ch2=1300nm multi-mode

Ch1=850nm multi-mode, Ch2=1550nm single-mode

Ch1=1300nm single-mode, Ch2=850nm multi-mode

Ch1=1300nm multi-mode, Ch2=850nm multi-mode

Reserved for future single channel

Reserved for future single channel

Ch1 1550nm single-mode, Ch2 850nm multi-mode

Ch1=850nm multi-mode, Ch2=850nm multi-mode + High Break

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only) + High Break

Ch1=1300nm single-mode , Ch2=1300nm single-mode + High Break

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only) + High Break

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode + High Break

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only) + High Break

Reserved - was used for RWE special

Ch1=1550nm single-mode, Ch2=1550nm single-mode + High Break

Ch1=850nm multi-mode, Ch2=1300nm single-mode + High Break

Ch1=850nm multi-mode, Ch2=1300nm multi-mode + High Break

Ch1=850nm multi-mode, Ch2=1550nm single-mode + High Break

Ch1=1300nm single-mode, Ch2=850nm multi-mode + High Break

Ch1=1300nm multi-mode, Ch2=850nm multi-mode + High Break

Ch1 1550nm single-mode, Ch2 850nm multi-mode + High Break

Reserved for future single channel

Reserved for future single channel

Protocol options

K-Bus with simple password management - CSL0

IEC 60870-5-103 (VDEW) with simple password management - CSL0

DNP3.0 with simple password management - CSL0

IEC61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with simple password management - CSL0

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with simple password management

- CSL0

DNP3 over Ethernet with Courier rear port K-Bus/RS485 protocol with simple password management - CSL0

IEC61850 Edition 1 / 2 and DNP3 serial with simple password management - CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and DNP3 serial with advanced Cyber Security - CSL1 - Security

Adminstration Tool (SAT) Required

Mounting

Flush/Panel mounting

Language

P544 1 M

J

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P54x/EN IT/Nd5 Page (IT) 1-17

(IT) 1 Introduction Product Scope

Order form MiCOM P544

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

P544 1 M

English, French, German, Spanish 0

5 English, French, German, Russian

Chinese, English or French via HMI, with English or French only via Communications port C

Software version

Without Distance

With Distance

Customer specific options

**

**

Standard version

Customer version

Hardware version

XCPU2

8

Dual rated optos

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Page (IT) 1-18 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form MiCOM P545

Ready-to-use configuration

Current differential - With distance backup,

1/3 pole autoreclose and check synchronising, with 24 or 32 inputs, 32 outputs, GPS input.

Nominal auxiliary voltage

24 - 32 Vdc

48 - 110 Vdc

110 - 250 Vdc (100 - 240 Vac)

In/Vn rating

In = 1A/5A ; Vn = 100-120Vac

Hardware options

Standard - None

IRIG-B Only (Modulated)

Fibre Optic Converter Only

IRIG-B (Modulated) & Fibre Optic Converter

Ethernet (10Mbit/s)

Ethernet (100Mbit/s)

Ethernet (100Mbit/s) plus IRIG-B (Modulated)

Ethernet (100Mbit/s) plus IRIG-B (De-modulated)

InterMiCOM + Courier Rear Port

InterMiCOM + Courier Rear Port + IRIG-B modulated

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports +

Modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports + Unmodulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 2 LC ports + 1 RJ45 port +

Modulated/Un-modulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 3 RJ45 ports + Modulated/Unmodulated IRIG-B

Ethernet (100Mbit/s), 1 RH45 port + Modulated/Un-modulated IRIG-B

Product Options: Basic Configuration of

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 24inputs & 32stn outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 24inputs & 32stn outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 24inputs & 32stn outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 24inputs & 32stn outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 24inputs & 32stn outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 24inputs & 32stn outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 24inputs & 32stn outputs

P545 1

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P54x/EN IT/Nd5 Page (IT) 1-19

(IT) 1 Introduction Product Scope

Order form MiCOM P545

Ready-to-use configuration

Current differential - With distance backup,

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 24inputs & 32stn outputs

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 32inputs & 32stn outputs

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 24inputs & 32stn outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode, 24inputs & 32stn outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode, 24inputs & 32stn outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 24inputs & 32stn outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 32inputs & 32stn outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 32inputs & 32stn outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 32inputs & 32stn outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 32inputs & 32stn outputs

Ch1=1550nm single-mode, Ch2=850nm multi-mode, 24inputs & 32stn outputs

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 24inputs & 16stn+8hb outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 24inputs & 16stn+8hb outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 24inputs & 16stn+8hb outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 24inputs & 16stn+8hb outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 24inputs & 16stn+8hb outputs

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 24inputs & 16stn+8hb outputs

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode, 24inputs & 16stn+8hb outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=1550nm single-mode, Ch2=850nm multi-mode, 24inputs & 16stn+8hb outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 32inputs & 32stn outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 32inputs & 32stn outputs

Protocol options

K-Bus with simple password management - CSL0

IEC 60870-5-103 (VDEW) with simple password management - CSL0

DNP3.0 with simple password management - CSL0

IEC61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with simple password management - CSL0

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with simple password management

- CSL0

P545

DNP3 over Ethernet with Courier rear port K-Bus/RS485 protocol with simple password management - CSL0

IEC61850 Edition 1 / 2 and DNP3 serial with simple password management - CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and DNP3 serial with advanced Cyber Security - CSL1 - Security

Adminstration Tool (SAT) Required

Mounting

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Page (IT) 1-20 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form

Current differential - With distance backup,

Flush/panel mounting

Rack mounting

Language

English, French, German, Spanish

English, French, German, Russian

Chinese, English or French via HMI, with English or French only via Communications port

Software version

Without Distance

With Distance

Customer specific options

Standard version

Customer version

Hardware version

XCPU3

XCPU2

Dual rated optos

MiCOM P545

Ready-to-use configuration

P545 1

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P54x/EN IT/Nd5 Page (IT) 1-21

(IT) 1 Introduction Product Scope

Order form MiCOM P546

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

Nominal auxiliary voltage

24 - 32 Vdc

48 - 110 Vdc

110 - 250 Vdc (100 - 240 Vac)

In/Vn rating

In = 1A/5A ; Vn = 100-120Vac

Hardware options

Standard - None

IRIG-B Only (Modulated)

Fibre Optic Converter Only

IRIG-B (Modulated) & Fibre Optic Converter

Ethernet (10Mbit/s)

Ethernet (100Mbit/s)

Second Rear Comms

IRIG-B (Modulated) + Second Rear Comms

Ethernet (100Mbit/s) plus IRIG-B (Modulated)

Ethernet (100Mbit/s) plus IRIG-B (De-modulated)

InterMiCOM + Courier Rear Port

InterMiCOM + Courier Rear Port + IRIG-B modulated

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Self-Healing Ring, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode ST fibre ports + Un-modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports +

Modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode ST fibre ports + Unmodulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 2 LC ports + 1 RJ45 port +

Modulated/Un-modulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 3 RJ45 ports + Modulated/Unmodulated IRIG-B

Ethernet (100Mbit/s), 1 RH45 port + Modulated/Un-modulated IRIG-B

Product Options

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 24 Inputs 32 Standard Outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 24 Inputs & 32 Standard outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 24 inputs & 32 Standard Outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only), 24 Inputs & 32 Standard

Outputs

P546

9

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Page (IT) 1-22 P54x/EN IT/Nd5

Product Scope (IT) 1 Introduction

Order form MiCOM P546

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode 24 Inputs & 32 Standard Outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only) 24 Inputs & 32 Standard

Outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 24 Inputs & 32 Standard Outputs

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 24 Inputs & 32 Standard Outputs

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 24 Inputs & 8 Standard + 12 High Break

Outputs

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 24 Inputs and 32 Standard Outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode 24 Inputs & 32 Standard Outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode 24 Inputs & 32 Standard Outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 24 Inputs & 32 Standard Outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only) 24 Inputs & 8 Standard + 12

High Break Outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode + 24 Inputs & 8 Standard + 12 High

Break Outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only) + 24 Inputs & 8 Standard + 12

High Break Outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode + 24 Inputs & 8 Standard + 12 High

Break Outputs

Ch1=1550nm single-mode, Ch2=850nm multi-mode, 24 Inputs & 32 Standard Outputs

Ch1=850nm multi-mode, Ch2=850nm multi-mode, 24 Inputs & 16 Standard + 8 High Break

Outputs

Ch1=1300nm single-mode, Ch2=not fitted (2 Terminal only), 24 Inputs & 16 Standard + 8

High Break Outputs

Ch1=1300nm single-mode, Ch2=1300nm single-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=1300nm multi-mode, Ch2=not fitted (2 Terminal only) 24 Inputs & 16 Standard + 8

High Break Outputs

Ch1=1300nm multi-mode, Ch2=1300nm multi-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only) 24 Inputs & 16 Standard + 8

High Break Outputs

Reserved - was used for RWE special

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=850nm multi-mode, Ch2=1300nm single-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=850nm multi-mode, Ch2=1300nm multi-mode, 24 Inputs & 16 Standard + 8 High Break

Outputs

Ch1=850nm multi-mode, Ch2=1550nm single-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=1300nm single-mode, Ch2=850nm multi-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

Ch1=1300nm multi-mode, Ch2=850nm multi-mode, 24 Inputs & 16 Standard + 8 High Break

Outputs

Ch1 1550nm single-mode, Ch2 850nm multi-mode, 24 Inputs & 16 Standard + 8 High

Break Outputs

P546 1 M

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P54x/EN IT/Nd5 Page (IT) 1-23

(IT) 1 Introduction Product Scope

Order form MiCOM P546

Ready-to-use configuration

Current differential - With distance backup, suitable for 2 breaker configurations

Reserved for future single channel

Reserved for future single channel

Ch1=1550nm single-mode, Ch2=not fitted (2 Terminal only), 24 Inputs & 8 Standard + 12

High Break Outputs

Ch1=1550nm single-mode, Ch2=1550nm single-mode, 24 Inputs & 8 Standard + 12 High

Break Outputs

Protocol options

K-Bus with simple password management - CSL0

IEC 60870-5-103 (VDEW) with simple password management - CSL0

DNP3.0 with simple password management - CSL0

IEC61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with simple password management - CSL0

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with simple password management

- CSL0

DNP3 over Ethernet with Courier rear port K-Bus/RS485 protocol with simple password management - CSL0

IEC61850 Edition 1 / 2 and DNP3 serial with simple password management - CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 with advanced Cyber Security -

CSL1 - Security Adminstration Tool (SAT) Required

IEC 61850 Edition 1 / 2 and DNP3 serial with advanced Cyber Security - CSL1 - Security

Adminstration Tool (SAT) Required

Mounting

Flush / Panel mounting

Language

English, French, German, Spanish

English, French, German, Russian

Chinese, English or French via HMI, with English or French only via Communications port

Software version

Without Distance

With Distance

Customer specific options

Standard version

Customer version

Hardware version

XCPU3

XCPU2

Dual rated optos

P546 1 M

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MiCOM P54x (P543, P544, P545 & P546) (TD) 2 Technical Data

P54x/EN TD/Nd5

TECHNICAL DATA

CHAPTER 2

Page (TD) 2-1

(TD) 2 Technical Data MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (TD) 2-2 P54x/EN TD/Nd5

Contents (TD) 2 Technical Data

CONTENTS

1 Mechanical Specifications

1.1

1.2

1.3

Design

Enclosure Protection

Weight

2 Terminals

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.10.1

2.10.2

AC Current and Voltage Measuring inputs

General Input/Output Terminals

Case Protective Earth Connection

Front Port Serial PC Interface

Front Download/Monitor Port

Rear Communications Port

Optional Second Rear Communications Port

Optional Rear IRIG-B Interface Modulated or Un-modulated

Optional Rear Fiber Connection for SCADA/DCS

Optional Rear Ethernet Connection for IEC 61850

10BaseT/100BaseTX Communications

100 Base FX Interface

3 Ratings

3.1

3.2

3.3

AC Measuring Inputs

AC Current

AC Voltage

4 Power Supply

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

Auxiliary Voltage (Vx)

Operating Range

Nominal Burden

Power-Up Time

Power Supply Interruption

Battery Backup

Field Voltage Output

Digital (“Opto”) Inputs

5 Output Contacts

5.1

5.2

5.3

5.4

5.5

Standard Contacts

High Break Contacts (Option)

Watchdog Contacts

IRIG-B 12X Interface (Modulated)

IRIG-B 00X Interface (Un-modulated)

Page (TD) 2-

10

10

10

10

10

10

10

10

11

11

11

11

11

9

9

9

9

13

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13

14

13

13

13

13

12

12

12

12

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15

15

16

16

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P54x/EN TD/Nd5 Page (TD) 2-3

(TD) 2 Technical Data Contents

6 Environmental Conditions

6.1

6.2

6.3

Ambient Temperature Range

Ambient Humidity Range

Corrosive Environments

17

17

17

17

7 Type Tests

7.1

7.2

7.3

7.4

Insulation

Creepage Distances and Clearances

High Voltage (Dielectric) Withstand

Impulse Voltage Withstand Test

18

18

18

18

18

8 Electromagnetic Compatibility (EMC)

8.1

8.2

8.3

8.4

8.5

8.6

8.7

8.8

8.9

8.10

8.11

8.12

8.13

19

1 MHz Burst High Frequency Disturbance Test

100kHz Damped Oscillatory Test

Immunity to Electrostatic Discharge

Electrical Fast Transient or Burst Requirements

19

19

19

19

Surge Withstand Capability

Surge Immunity Test

19

19

20 Immunity to Radiated Electromagnetic Energy

Radiated Immunity from Digital Communications

Radiated Immunity from Digital Radio Telephones

20

20

Immunity to Conducted Disturbances Induced by Radio Frequency Fields20

Power Frequency Magnetic Field Immunity

Conducted Emissions

Radiated Emissions

20

20

20

9 EU Directives

9.1

9.2

9.3

EMC Compliance

Product Safety

ATEX Compliance

10 Mechanical Robustness

10.1

10.2

10.3

Vibration Test

Shock and Bump

Seismic Test

22

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21

21

21

11 Px40 Third Party Compliances

11.1

11.2

Underwriters Laboratory (UL)

Energy Networks Association (ENA)

12 Protection Functions

12.1

12.2

12.3

12.4

12.4.1

Phase Current Differential Protection

Distance Protection

Three-Phase Overcurrent Protection

Phase and Ground (Earth) Overcurrent

SEF

23

23

23

24

24

24

25

25

26

Page (TD) 2-4 P54x/EN TD/Nd5

Contents

12.4.2

12.4.3

12.5

12.6

12.6.1

12.6.2

12.6.3

12.6.4

12.6.5

Wattmetric SEF

Polarizing quantities

Inverse Time Characteristic

Earth Fault/Sensitive Earth Fault Protection

Earth Fault

Sensitive Earth Fault (SEF)

REF

Wattmetric SEF

Polarizing Quantities

12.7

12.8

12.9

12.10

Negative Sequence Overcurrent

Undervoltage

Overvoltage

Neutral Displacement/Residual Overvoltage

12.11

12.12

12.13

12.14

Thermal Overload

Voltage Transformer Supervision (VTS)

12.15

Current Transformer Supervision (CTS)

12.15.1

Standard CTS

12.15.2

Differential CTS

12.16

12.17

Circuit Breaker Fail and Undercurrent

Broken Conductor Logic

CB State Monitoring and Condition Monitoring

Programmable Scheme Logic (PSL)

12.18

12.19

12.22

Auto-Reclose and Check Synchronism

Measurements and Recording Facilities

12.20

12.21

IRIG-B and Real Time Clock

Enhanced Disturbance Records

12.21.1

For Software Release 47/57 and earlier

12.21.2

For Software Release A0 and later

Fault Locator

12.23

12.24

12.25

Event, Fault & Maintenance Records

Plant Supervision

InterMiCOM

64

Fiber Optic Teleprotection

12.26

Ethernet Data (where applicable)

12.26.1

100 Base FX Interface

13 Settings, Measurements and Records List

13.1

13.1.1

13.2

13.2.1

13.2.2

13.3

13.4

13.5

Settings List

Global Settings (System Data):

Circuit Breaker Control (CB Control):

P543 and P545 Specific CB Control Settings

P544 and P546 Specific CB Control Settings

Date and Time

Configuration

CT and VT Ratios

(TD) 2 Technical Data

34

34

34

34

34

34

35

35

36

31

31

32

32

32

32

30

30

30

30

30

31

31

31

28

29

29

29

29

29

29

28

28

28

28

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26

26

27

27

27

27

27

27

P54x/EN TD/Nd5 Page (TD) 2-5

(TD) 2 Technical Data Contents

13.16

13.17

13.18

13.19

13.20

13.21

13.22

13.23

13.5.1

13.5.2

13.6

13.7

13.7.1

13.7.2

P543 and P545 CT and VT ratio settings:

P544 and P546 CT and VT ratio settings:

Sequence of Event Recorder (Record Control)

Oscillography (Disturb Recorder)

For Software release 47/57 V/W/X and earlier

For Software Release A0/B0 and later

13.8

13.9

13.9.1

13.9.2

13.9.3

13.9.4

13.9.5

Measured Operating Data (Measure't Setup)

Communications

Courier Protocol

IEC870-5-103 Protocol

DNP3.0 Protocol: (EIA485)

DNP3.0 Protocol: (Ethernet)

IEC61850 Protocol: (Ethernet)

38

38

38

39

39

39

39

Optional Additional Second Rear Communication (Rear Port2 (RP2)) 39 13.10

13.11

13.12

Commission Tests

Circuit Breaker Condition Monitoring (CB Monitor Setup)

13.12.1

P543 and P545 CB Monitor Setup:

13.12.2

P544 and P546 CB Monitor Setup:

40

40

40

41

13.13

13.14

13.15

Optocoupled Binary Inputs (Opto Config.)

Control Inputs into PSL (Ctrl. I/P Config.)

PSL Signal Grouping Nodes

41

41

41

36

37

37

37

37

38

EIA(RS)232 Teleprotection (INTERMiCOM Comms.)

INTERMiCOM Conf.

Function Keys

IED Configurator

IEC 61850 GOOSE

Prot Comms/IM

64

Control Input User Labels (Ctrl. I/P Labels)

Settings in Multiple Groups

42

42

43

43

42

42

42

42

14 Protection Functions

14.1

14.2

14.3

14.4

14.5

14.6

14.7

14.8

14.8.1

14.8.2

14.8.3

14.8.4

14.8.5

Line Parameters

Distance Setup

Phase Distance

Ground Distance

Distance Elements - Phase Distance

Ground Distance Parameters

Phase Current Differential Protection

Scheme Logic

Basic Scheme

Aided Scheme 1

Aided Scheme 2

Trip On Close

Z1 Extension

44

45

46

47

48

48

49

49

49

49

44

44

44

44

Page (TD) 2-6 P54x/EN TD/Nd5

Contents (TD) 2 Technical Data

14.8.6

14.9

Loss Of Load

Phase Overcurrent (Overcurrent)

14.10

14.11

14.12

14.13

Negative Sequence Overcurrent (Neg Seq O/C)

Broken Conductor

Ground Overcurrent (Earth Fault)

Directional Aided Schemes - DEF Settings

14.14

Sensitive Earth Fault Protection/ Restricted Earth Fault Protection

14.14.1

Wattmetric SEF

14.14.2

REF

14.15

14.16

Neutral Voltage Displacement (Residual O/V NVD)

Thermal Overload

14.17

Power Swing/Out of Step

14.17.1

Power Swing

14.17.2

Out-Of-Step

14.18

14.19

14.20

14.21

14.22

14.23

Undervoltage Protection

Overvoltage Protection

Underfrequency Protection

Overfrequency Protection

Rate-of-Change of Frequency Protection (df/dt Protection)

Circuit Breaker Fail

15 Supervision Functions

15.1

15.1.1

15.1.2

Voltage Transformer Supervision (VTS)

Inrush Detection

Weak Infeed Blk

15.2

15.3

Current Transformer Supervision (CTS)

Trip Supervision (TS) or Fault Detector

15.4

15.4.1

Systems Check

System Checks for P543 and P545

15.4.2

System Checks for P544 and P546

15.4.2.1

Manual System Checks

15.5

15.5.1

Auto-Reclose

P543 and P545 Auto-Reclose:

15.5.2

P544 and P546 Auto-Reclose:

15.5.2.1

Auto-Reclose System Checks

16 Labels

16.1

16.2

16.3

16.4

16.5

16.1

Opto Input Labels

Output Labels

Digital Input Labels

Virtual Input Labels

Virtual Output Labels

SR/MR User Alarm Labels

17 Measurements List

57

57

57

57

57

57

58

58

58

59

59

59

60

61

49

50

51

51

52

52

53

53

53

53

54

54

54

54

54

55

55

55

55

56

62

62

62

62

62

62

62

63

P54x/EN TD/Nd5 Page (TD) 2-7

(TD) 2 Technical Data

17.1

17.2

17.3

17.4

17.5

17.6

Measurements 1

Measurements 2

Measurements 3

Measurements 4

Circuit Breaker Monitoring Statistics

Fault Record Proforma

FIGURES

Figure 1 - Operating Time v Reach % at 50 Hz

Figure 2 - Operating Time v Reach % at 60 Hz

TABLES

Table 1 - MOV protection: Max Voltage 330 V dc

Table 2 - Minimum and maximum transfer time for InterMiCOM

64

.

Table 3 - Transmitter optical characteristics

Table 4 - Receiver optical characteristics

Page (TD) 2-

24

25

Page (TD) 2-

16

32

32

33

Figures

63

64

64

65

66

66

Page (TD) 2-8 P54x/EN TD/Nd5

Mechanical Specifications

1

1.1

1.2

1.3

(TD) 2 Technical Data

MECHANICAL SPECIFICATIONS

Design

Modular MiCOM Px40 platform relay, available in two different case sizes:

P543 and P544: 60TE, front of panel flush mounting, or 19” rack mounted (ordering options).

P545 and P546: 80TE, front of panel flush mounting, or 19” rack mounted (ordering options).

Enclosure Protection

Per IEC 60529:

IP 52 Protection (front panel) against dust and dripping water.

IP 50 Protection for the rear and sides of the case against dust.

IP 10 Product safety protection for the rear due to live connections on the terminal block.

Weight

P543 approx.

P544 approx.

P545 approx.

P546 approx.

9.2 kg

11.5 kg

11 kg

13.1 kg

P54x/EN TD/Nd5 Page (TD) 2-9

(TD) 2 Technical Data

2

2.1

2.2

2.3

2.4

2.5

2.6

2.7

Terminals

TERMINALS

AC Current and Voltage Measuring inputs

Located on heavy duty (black) terminal block:

Threaded M4 terminals, for ring terminal connection.

CT inputs have integral safety shorting, upon removal of the terminal block.

General Input/Output Terminals

For power supply, opto inputs, output contacts and RP1, COM1 and optional COM2 rear communications.

Located on general purpose (grey) blocks:

Threaded M4 terminals, for ring lug/terminal connection.

Case Protective Earth Connection

Two rear stud connections, threaded M4.

Must be earthed (grounded) using the protective (earth) conductor for safety, minimum earth wire size 2.5mm

2

.

Front Port Serial PC Interface

EIA(RS)-232 DCE, 9 pin D-type female connector Socket SK1.

Courier protocol for interface to MiCOM S1 Studio software.

Isolation to SELV/ELV (Safety/Extra Low Voltage) level / PEB (Protective Equipotential

Bonded).

Maximum cable length 15m.

Front Download/Monitor Port

EIA(RS)-232, 25 pin D-type female connector Socket SK2.

For firmware and menu text downloads.

Isolation to SELV/PEB level.

Rear Communications Port

EIA(RS)-485 signal levels, two wire connections located on general purpose block, M4 screw.

For screened twisted pair cable, multidrop, 1000 m max.

For Courier (K-Bus), IEC-60870-5-103 (not for P746/P849), MODBUS (not for

P14x/P445/P44x/P54x/P547/P746/P841/P849) or DNP3.0 protocol (not for

P24x/P746/P849) (ordering options).

Isolation to SELV (Safety Extra Low Voltage) level. Ethernet (copper and fibre).

Optional Second Rear Communications Port

EIA(RS)-232, 9 pin D-type female connector, socket SK4.

Courier protocol: K-Bus, EIA(RS)-232, or EIA(RS)485 connection.

Isolation to SELV level.

Maximum cable length 15m.

Page (TD) 2-10 P54x/EN TD/Nd5

Terminals

2.8

2.9

2.10

2.10.1

2.10.2

(TD) 2 Technical Data

Optional Rear IRIG-B Interface Modulated or Un-modulated

BNC plug

Isolation to SELV level.

50 ohm coaxial cable.

Optional Rear Fiber Connection for SCADA/DCS

BFOC 2.5 -(ST)-interface for multi-mode glass fiber type 62.5, as for IEC 874-10.

850nm short-haul fibers, one Tx and one Rx. For Courier, IEC-60870-5-103, MODBUS or

DNP3.0 (but, see different ordering options for each model).

Optional Rear Ethernet Connection for IEC 61850

10BaseT/100BaseTX Communications

Interface in accordance with IEEE802.3 and IEC 61850

Isolation: 1.5 kV

Connector type:

Cable type:

RJ45

Screened Twisted Pair (STP)

Max. cable length: 100 m

100 Base FX Interface

Interface in accordance with IEEE802.3 and IEC 61850

Wavelength: 1310 nm

Fiber:

Connector type: multi-mode 50/125 µm or 62.5/125 µm

ST/LC Connector Optical Interface (depending on model)

P54x/EN TD/Nd5 Page (TD) 2-11

(TD) 2 Technical Data

3

3.1

3.2

3.3

Ratings

RATINGS

AC Measuring Inputs

From Software H0a, H1a, H3a, G4, H4 and J4:

Nominal frequency: 50 and 60 Hz (settable)

Operating range: 45 to 66.3 Hz

Phase rotation: ABC or ACB

Previous Software:

Nominal frequency: 50 and 60 Hz (settable)

Operating range: 45 to 66 Hz

Phase rotation: ABC or CBA

AC Current

Nominal current (In): 1 and 5 A dual rated. (1A and 5A inputs use different transformer tap Connections, check correct terminals are wired).

Nominal burden per phase: < 0.15 VA at In

Thermal withstand: continuous 4 In for 10 s: 30 In for 1 s; 100 In

Linear to 64 In (non-offset AC current).

AC Voltage

Nominal voltage (Vn): 100 to 120 V phase-phase.

Nominal burden per phase: < 0.02 VA at Vn.

Thermal withstand: continuous 2 Vn for 10 s: 2.6 Vn

Page (TD) 2-12 P54x/EN TD/Nd5

4.4

4.5

Power Supply

4

4.1

4.2

4.3

4.6

4.7

(TD) 2 Technical Data

POWER SUPPLY

Auxiliary Voltage (Vx)

Three ordering options:

(i) Vx:

(ii) Vx:

(iii) Vx:

24 to 32 Vdc

48 to 110 Vdc,

110 to 250 Vdc, and 100 to 240 Vac (rms).

Operating Range

19 to 65 V (dc only for this variant)

37 to 150 V (dc), 32 to 110 V (ac)

87 to 300 V (dc), 80 to 265 V (ac)

With a tolerable ac ripple of up to 12% for a dc supply, per IEC 60255-11: 1979.

Nominal Burden

Quiescent burden: 11 W. (Extra 1.25 W when fitted with second rear Courier)

Additions for energized binary inputs/outputs:

Per opto input: 0.09 W

0.12 W

(24 to 54 V)

(110/125 V)

0.19 W

Per energized output relay: 0.13 W

(220/120 V)

Power-Up Time

Time to power up < 11 s.

Power Supply Interruption

Per IEC 60255-11: 1979

The relay will withstand a 20 ms interruption in the DC auxiliary supply, without deenergizing.

Per IEC 61000-4-11: 1994

The relay will withstand a 20 ms interruption in an AC auxiliary supply, without deenergizing.

Battery Backup

Front panel mounted.

Type ½ AA, 3.6 V Lithium Thionyl Chloride (SAFT advanced battery reference LS14250).

Battery life (assuming relay energized for 90% time) >10 years.

Field Voltage Output

Regulated 48 Vdc

Current limited at 112 mA maximum output

P54x/EN TD/Nd5 Page (TD) 2-13

(TD) 2 Technical Data

4.8

Power Supply

Digital (“Opto”) Inputs

Universal opto inputs with programmable voltage thresholds (24/27, 30/34, 48/54,

110/125, 220/250 V). May be energized from the 48 V field voltage, or the external battery supply.

Rated nominal voltage:

Operating range:

24 to 250 Vdc

19 to 265 Vdc

Withstand: 300 Vdc, 300 Vrms.

Peak current of opto input when energized is 3.5 mA (0-300 V)

Nominal pick-up and reset thresholds:

Pick-up approx 70% of battery nominal set

Reset approx 66% of battery nominal set

Nominal battery 24/27:

(logic 0) <16.2

Nominal battery 24/27:

(logic 0) <12.0

Nominal battery 30/34:

(logic 0) <20.4

60 - 80% DO/PU

(logic 1) >19.2

50 - 70% DO/PU

(logic 1) >16.8

60 - 80% DO/PU

(logic 1) >24.0

Nominal battery 30/34:

(logic 0) <15.0

Nominal battery 48/54:

(logic 0) <32.4

50 - 70% DO/PU

(logic 1) >21.0

60 - 80% DO/PU

(logic 1) >38.4

Nominal battery 48/54:

(logic 0) <24.0

50 - 70% DO/PU

(logic 1) >33.6

Nominal battery 110/125: 60 - 80% DO/PU

(logic 0) <75.0 (logic 1) >88.0

Nominal battery 110/125: 50 - 70% DO/PU

(logic 0) <55.0 (logic 1) >77.0

Nominal battery 220/250: 60 - 80% DO/PU

(logic 0) <150.0

Nominal battery 220/250:

(logic 1) >176.0

50 - 70% DO/PU

(logic 0) <110 (logic 1) >154

Recognition time:

<2 ms with long filter removed.

<12 ms with half cycle ac immunity filter on.

Page (TD) 2-14 P54x/EN TD/Nd5

Output Contacts

5

5.1

5.2

(TD) 2 Technical Data

OUTPUT CONTACTS

Standard Contacts

General purpose relay outputs for signaling, tripping and alarming:

Continuous Carry Ratings (Not Switched):

Maximum continuous current:

Short duration withstand carry:

Rated voltage:

10 A (UL: 8 A)

30 A for 3 s or 250A for 30ms

300 V

Make & Break Capacity:

DC: 50 W resistive

DC: 62.5 W inductive

AC: 2500 VA resistive

AC: 2500 VA inductive

(L/R = 50 ms)

(cos

φ

= unity)

(cos

φ

= 0.7)

Make, Carry:

30 A for 3 secs, dc resistive, 10,000 operations (subject to the above limits of make/break capacity and rated voltage)

Make, Carry & Break:

30 A for 200 ms, ac resistive, 2,000 operations (subject to the above limits of make/break capacity & rated voltage)

4A for 1.5 secs, dc resistive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

0.5 A for 1 sec, dc inductive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

10 A for 1.5 secs, ac resistive/inductive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

Durability:

Loaded contact: 10 000 operations minimum

Unloaded contact: 100 000 operations minimum

Operate Time Less than 5 ms

Reset Time Less than 5 ms

High Break Contacts (Option)

Continuous Carry Ratings (Not Switched):

Maximum continuous current:

Short duration withstand carry:

Rated voltage:

10 A dc

30 A dc for 3 s

250A dc for 30ms

300 V

Make & Break Capacity:

DC: 7500 W resistive

DC: 2500 W inductive (L/R = 50 ms)

P54x/EN TD/Nd5 Page (TD) 2-15

(TD) 2 Technical Data

5.3

5.4

5.5

Output Contacts

Make, Carry:

30 A for 3 secs, dc resistive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

Make, Carry & Break:

30 A for 3 secs, dc resistive, 5,000 operations (subject to the above limits of make/break capacity & rated voltage)

30 A for 200 ms, dc resistive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

10 A (*), dc inductive, 10,000 operations (subject to the above limits of make/break capacity & rated voltage)

*Typical for repetitive shots - 2 minutes idle for thermal dissipation

Voltage Current

65 V

150 V

250 V

10 A

10 A

10 A

250 V 10 A

MOV protection: Max Voltage 330 V dc

40 ms

40 ms

40 ms

20 ms

L/R

5

4

2

4

No. of Shots in 1 sec

Table 1 - MOV protection: Max Voltage 330 V dc

Durability:

Loaded contact: 10 000 operations minimum

Unloaded contact: 100 000 operations minimum

Operate Time:

Reset Time:

Less than 0.2 ms

Less than 8 ms

Watchdog Contacts

Non-programmable contacts for relay healthy or relay fail indication:

Breaking capacity: DC: 30 W resistive

DC: 15 W inductive (L/R = 40 ms)

AC: 375 VA inductive (cos

φ

= 0.7)

IRIG-B 12X Interface (Modulated)

External clock synchronization to IRIG standard 200-98, format B12x

Input impedance 6 k

at 1000 Hz

Modulation ratio: 3:1 to 6:1

Input signal, peak-peak: 200 mV to 20 V

IRIG-B 00X Interface (Un-modulated)

External clock synchronization to IRIG standard 200-98, format B00X.

Input signal TTL level

Input impedance at dc 10 k

Page (TD) 2-16 P54x/EN TD/Nd5

Environmental Conditions

6

6.1

6.2

6.3

(TD) 2 Technical Data

ENVIRONMENTAL CONDITIONS

Ambient Temperature Range

Per IEC 60255-6: 1988

Operating temperature range:

Storage and transit:

-25°C to +55°C (or -13°F to +131°F).

-25°C to +70°C (or -13°F to +158°F).

Ambient Humidity Range

Per IEC 60068-2-78: 2001:

56 days at 93% relative humidity and +40°C

Per IEC 60068-2-30: 2005:

Damp heat cyclic, six (12 + 12) hour cycles, 93% RH, +25 to +55°C

Corrosive Environments

Per IEC 60068-2-60: 1995, Part 2, Test Ke, Method (class) 3

Industrial corrosive environment/poor environmental control, mixed gas flow test.

21 days at 75% relative humidity and +30°C

Exposure to elevated concentrations of H

2

S, NO

2

, Cl

2

and SO

2

.

P54x/EN TD/Nd5 Page (TD) 2-17

(TD) 2 Technical Data

7

7.1

7.2

7.3

7.4

Type Tests

TYPE TESTS

Insulation

As for IEC 60255-27: 2005 (incorporating corrigendum March 2007):

Insulation resistance > 100 M

at 500 Vdc

(Using only electronic/brushless insulation tester).

Creepage Distances and Clearances

Per IEC 60255-27: 2005 Pollution degree 3 overvoltage category III impulse test voltage 5 kV

High Voltage (Dielectric) Withstand

EIA(RS)232 ports excepted.

Per IEC 60255-27: 2005, 2 kV rms AC, 1 minute:

Between all case terminals connected together, and the case earth.

Also, between all terminals of independent circuits.

1 kV rms AC for 1 minute, across open watchdog contacts.

1 kV rms AC for 1 minute, across open contacts of changeover output relays.

Per ANSI/IEEE C37.90-1989 (reaffirmed 1994):

1.5 kV rms AC for 1 minute, across open contacts of changeover output relays.

Impulse Voltage Withstand Test

Per IEC 60255-27: 2005

Front time: 1.2 µs, Time to half-value: 50 µs,

Peak value: 5 kV, 0.5 J

Between all terminals, and all terminals and case earth.

Page (TD) 2-18 P54x/EN TD/Nd5

Electromagnetic Compatibility (EMC)

8

8.1

8.2

8.3

8.4

8.5

8.6

(TD) 2 Technical Data

ELECTROMAGNETIC COMPATIBILITY (EMC)

1 MHz Burst High Frequency Disturbance Test

As for EN / IEC 60255-22-1, Class III,

Common-mode test voltage:

Differential test voltage:

Test duration:

Source impedance:

(EIA(RS)-232 ports excepted).

2.5 kV,

1.0 kV,

2 s,

200

100kHz Damped Oscillatory Test

EN 61000-4-18: 2007:

Common mode test voltage:

Differential mode test voltage:

Level 3

2.5 kV

1 kV

Immunity to Electrostatic Discharge

Per IEC 60255-22-2: 1997, Class 4,

15kV discharge in air to user interface, display, and exposed metalwork.

Per IEC 60255-22-2: 1997, Class 3,

8kV discharge in air to all communication ports.

6kV point contact discharge to any part of the front of the product.

Electrical Fast Transient or Burst Requirements

Per IEC 60255-22-4: 2002.

Test severity:

Amplitude:

Amplitude:

Class III and IV:

2 kV, burst frequency 5 kHz (Class III),

4 kV, burst frequency 2.5 kHz (Class IV).

Applied directly to auxiliary supply, and applied to all other inputs. EIA(RS)232 ports excepted.

Surge Withstand Capability

IEEE/ANSI C37.90.1:2002:

4 kV fast transient and 2.5 kV oscillatory applied common mode and differential mode to opto inputs (filtered), output relays, CTs, VTs, power supply, field voltage.

4 kV fast transient and 2.5 kV oscillatory applied common mode to communications,

IRIG- B.

Surge Immunity Test

EIA(RS)232 ports excepted.

Per IEC 61000-4-5: 2005 Level 4.

Time to half-value: 1.2/50 µs.

Amplitude: 4 kV between all groups and protective (earth) conductor terminal.

Amplitude: 2 kV between terminals of each group.

P54x/EN TD/Nd5 Page (TD) 2-19

(TD) 2 Technical Data

8.7

8.8

8.9

8.10

8.11

8.12

8.13

Electromagnetic Compatibility (EMC)

Immunity to Radiated Electromagnetic Energy

IEC 60255-22-3: 2000, Class III:

Test field strength, frequency band 80 to 1000 MHz: 10 V/m,

Test using AM:

Spot tests at 80, 160, 450, 900 MHz

1 kHz / 80%,

IEEE/ANSI C37.90.2: 1995:

25 MHz to 1000 MHz, zero and 100% square wave modulated.

Field strength of 35 V/m.

Radiated Immunity from Digital Communications

EN61000-4-3: 2002, Level 4:

Test field strength, frequency band 800 to 960 MHz, and 1.4 to 2.0 GHz: 30 V/m,

Test using AM: 1 kHz / 80%.

Radiated Immunity from Digital Radio Telephones

ENV 50204: 1995 10 V/m, 900 MHz and 1.89 GHz.

Immunity to Conducted Disturbances Induced by Radio Frequency

Fields

IEC 61000-4-6: 1996, Level 3, Disturbing test voltage: 10 V

Power Frequency Magnetic Field Immunity

IEC 61000-4-8: 1994, Level 5:

IEC 61000-4-9: 1993, Level 5:

IEC 61000-4-10: 1993, Level 5:

100 A/m applied continuously,

1000 A/m applied for 3 s.

1000 A/m applied in all planes.

100 A/m applied in all planes at 100 kHz/1MHz with a burst duration of 2 s.

Conducted Emissions

EN 55022: 1998: Class A:

0.15 - 0.5 MHz, 79 dB

µ

V (quasi peak) 66 dB

µ

V (average)

0.5 – 30 MHz, 73 dB

µ

V (quasi peak) 60 dB

µ

V (average).

Radiated Emissions

EN 55022: 1998: Class A:

30 – 230 MHz, 40 dB

µ

V/m at 10 m measurement distance

230 – 1 GHz, 47 dB

µ

V/m at 10 m measurement distance.

Page (TD) 2-20 P54x/EN TD/Nd5

EU Directives

9

9.1

9.2

9.3

(TD) 2 Technical Data

EU DIRECTIVES

EMC Compliance

2004/30/EU:

Compliance to the European Commission Directive on EMC is claimed via the Technical

Construction File route. Product Specific Standards were used to establish conformity:

EN 60255-26

Product Safety

2014/35/EU:

Compliance to the European Commission Low Voltage Directive (LVD) is demonstrated using a Technical File. A product-specific standard was used to establish conformity.

EN 60255-27

ATEX Compliance

ATEX Potentially Explosive Atmospheres directive 2014/34/EU, for equipment.

The equipment is compliant with Article 1 of European directive

2014/34/EU.

It is approved for operation outside an ATEX hazardous area. It is however approved for connection to Increased Safety, “Ex e”, motors with rated ATEX protection, Equipment Category 2, to ensure their safe operation in gas Zones 1 and 2 hazardous areas.

II (2) G

Caution Equipment with this marking is not itself suitable for operation within a potentially explosive atmosphere.

Compliance demonstrated by Notified Body certificates of compliance.

P54x/EN TD/Nd5 Page (TD) 2-21

(TD) 2 Technical Data

10

10.1

10.2

10.3

MECHANICAL ROBUSTNESS

Vibration Test

Per EN / IEC 60255-21-1 Response Class 2

Endurance Class 2

Shock and Bump

Per EN / IEC 60255-21-2 Shock response Class 2

Shock withstand Class 1

Bump Class 1

Seismic Test

Per EN / IEC 60255-21-3: Class 2

Mechanical Robustness

Page (TD) 2-22 P54x/EN TD/Nd5

Px40 Third Party Compliances

11

11.1

PX40 THIRD PARTY COMPLIANCES

Underwriters Laboratory (UL)

(TD) 2 Technical Data

11.2 Energy Networks Association (ENA)

P54x/EN TD/Nd5 Page (TD) 2-23

(TD) 2 Technical Data

12

12.1

PROTECTION FUNCTIONS

Phase Current Differential Protection

Protection Functions

12.2 Distance Protection

50 Hz Operation

Page (TD) 2-24

Figure 1 - Operating Time v Reach % at 50 Hz

P54x/EN TD/Nd5

Protection Functions

60 Hz Operation

(TD) 2 Technical Data

12.3

12.4

Figure 2 - Operating Time v Reach % at 60 Hz

Three-Phase Overcurrent Protection

Phase and Ground (Earth) Overcurrent

P54x/EN TD/Nd5 Page (TD) 2-25

(TD) 2 Technical Data

12.4.1

12.4.2

12.4.3

12.5

Protection Functions

SEF

Pick-up: Setting

±

5%

Minimum IDMT Trip level: 1.05 x Setting

±

5%

Drop-off: 0.95 x Setting

±

5%

IDMT shape:

IEEE reset:

DT operation:

DT reset:

Repeatability:

±

5% or 40 ms whichever is greater *

±

17.5% or 60 ms whichever is greater

±

2% or 50 ms whichever is greater

±

5%

±

5%

* Reference conditions TMS = 1, TD = 1 and IN > setting of 100 mA, operating range 2-0 In

Wattmetric SEF

Pick-up P=0W:

Pick-up P>0W:

Drop-off P=0W:

Drop-off P>0W:

Boundary accuracy:

Repeatability:

ISEF>

±

5% or 5 mA

P>

±

5%

(0.95 x ISEF >)

±

5% or 5 mA

0.9 x P>

±

5%

±

5% with 1

°

hysteresis

1%

Polarizing quantities

VN> and V2> Level detectors:

I2> Level detector:

Pick-up:

±

10%

Resetting ratio: 0.9

Pick-up:

±

10%

Resetting ratio: 0.9

Inverse Time Characteristic

Accuracy

Pick-up:

Drop-off:

Minimum trip level for IDMT elements:

Inverse time stages:

Definite time stages:

Repeatability:

Directional boundary accuracy:

Setting

±

5%

0.95 x setting

±

5%

1.05 x Setting

±

5%

±

40 ms or 5%, whichever is greater

±

40 ms or 2%, whichever is greater

5%

±

2° with hysteresis <3°

Additional tolerance due to increasing X/R ratios:

±

5% over the X/R ratio from 1 to 90

Overshoot of overcurrent elements: <30 ms

Page (TD) 2-26 P54x/EN TD/Nd5

Protection Functions

12.6

12.6.1

12.6.2

12.6.3

12.6.4

12.6.5

(TD) 2 Technical Data

Earth Fault/Sensitive Earth Fault Protection

Earth Fault

DT Pick-up: Setting

±

5%

Minimum IDMT Trip level: 1.05 x Setting

±

5%

Drop-off: 0.95 x Setting

±

5%

IDMT shape:

IEEE reset:

DT operation:

±

5% or 40 ms whichever is greater

±

10% or 40 ms whichever is greater

±

2% or 50 ms whichever is greater

DT reset:

Repeatability:

±

2% or 50 ms whichever is greater

±

5%

Reference conditions TMS = 1, TD = 1 and IN1> setting of 1A, operating range 2-20 In

Sensitive Earth Fault (SEF)

Pick-up: Setting

±

5%

Minimum IDMT Trip level: 1.05 x Setting

±

5%

Drop-off:

IDMT shape:

IEEE reset:

0.95 x Setting

±

5%

±

5% or 40 ms whichever is greater *

±

17.5% or 60 ms whichever is greater

DT operation:

DT reset:

Repeatability:

±

2% or 50 ms whichever is greater

±

5%

±

5%

* Reference conditions TMS = 1, TD = 1 and IN > setting of 100 mA, operating range 2-0 In

REF

Pick-up:

Drop-off:

Setting formula

±

5%

0.80 x setting formula

±

5%

Operating time:

High pick up:

<60 ms

Setting

High operating time: <30 ms

±

5%

Repeatability: <15%

Wattmetric SEF

Pick-up P=0W:

Pick-up P>0W:

ISEF>

±

5% or 5 mA

P>

±

5%

(0.95 x ISEF >)

±

5% or 5 mA Drop-off P=0W:

Drop-off P>0W: 0.9 x P>

±

5%

Boundary accuracy:

±

5% with 1

°

hysteresis

Repeatability: 1%

Polarizing Quantities

VN> and V2> Level detectors:

I2> Level detector:

Pick-up:

±

10%

Resetting ratio: 0.9

Pick-up:

±

10%

Resetting ratio: 0.9

P54x/EN TD/Nd5 Page (TD) 2-27

(TD) 2 Technical Data

12.7

12.8

12.9

12.10

12.11

Protection Functions

Negative Sequence Overcurrent

Accuracy

Pick-up:

Drop-off:

Definite time operation:

Repeatability:

Directional boundary accuracy:

Reset:

Setting

±

5%

0.95 x setting

±

60 ms or 2%, whichever is greater

1%

±

2° with hysteresis <1°

<35 ms

Undervoltage

Accuracy

DT Pick-up:

IDMT Pick-up:

Drop-off:

Definite time operation:

Repeatability:

IDMT characteristic shape:

Reset:

Setting

±

2%

0.98 x setting

±

2%

1.02 x setting

±

2%

±

40 ms or 2%, whichever is greater

1%

±

40 ms or 2%, whichever is greater

<75 ms

Overvoltage

Accuracy

DT Pick-up:

IDMT Pick-up:

Drop-off:

Definite time operation:

Repeatability:

IDMT characteristic shape:

Reset:

Setting

±

1%

1.02 x setting

±

2%

0.98 x setting

±

2%

±

40 ms or 2%, whichever is greater

1%

±

40 ms or 2%, whichever is greater

<75 ms

Neutral Displacement/Residual Overvoltage

Accuracy

DT Pick-up:

IDMT Pick-up:

Drop-off:

Definite time operation:

Setting

±

5%

1.05 x setting

±

5%

0.95 x setting

±

5%

±

20 ms or 2%, whichever is greater

Instantaneous operation: <50 ms

Repeatability: 10%

IDMT characteristic shape:

±

60 ms or 5%, whichever is greater

Reset: <35 ms

Circuit Breaker Fail and Undercurrent

Accuracy

Pick-up:

Operating time:

Timers:

Reset:

±

10% or 0.025 In, whichever is greater

<12 ms

2 ms or 2%, whichever is greater

<15 ms

Page (TD) 2-28 P54x/EN TD/Nd5

Protection Functions

12.12

12.13

12.14

12.15

12.15.1

12.15.2

(TD) 2 Technical Data

Broken Conductor Logic

Accuracy

Pick-up:

Drop-off:

Definite time operation:

Reset:

Setting

±

2.5%

0.95 x setting

±

2.5%

±

50 ms or 2%, whichever is greater

<25 ms

Thermal Overload

Accuracy

Thermal alarm pick-up: Calculated trip time

±

10%

Thermal overload pick-up: Calculated trip time

±

10%

Cooling time accuracy

±

15% of theoretical

Repeatability:

*

<5%

Operating time measured with applied current of 20% above thermal setting.

Voltage Transformer Supervision (VTS)

Accuracy

Fast block operation:

Fast block reset:

Time delay:

<1 cycle

<1.5 cycles

±

20 ms or 2%, whichever is greater

Current Transformer Supervision (CTS)

Standard CTS

Accuracy

In> Pick-up:

VN< Pick-up:

In> Drop-off:

VN< Drop-off:

Time delay operation:

CTS block operation:

CTS reset:

Differential CTS

Accuracy

I1 Pick-up:

I1 Drop-off:

I2/I1> Pick-up:

I2/I1> Drop-off:

I2/I1>> Pick-up:

I2/I1>> Drop-off:

Time delay operation:

CTS block operation:

CTS block diff operation:

CTS reset:

Setting

±

5%

Setting

±

5%

0.9 x Setting

±

5%

(1.05 x Setting)

±

5% or 1 V whichever is greater

Setting

±

2% or 20 ms whichever is greater

<1 cycle

<35 ms

Setting 5%

(0.9 x setting) 5%

Setting 5%

(0.9 x setting) 5%

Setting 5%

(0.9 x setting) 5%

Setting 2% or 20 ms whichever is greater

<1 cycle

<1 cycle

<35 ms

P54x/EN TD/Nd5 Page (TD) 2-29

(TD) 2 Technical Data

12.16

12.17

12.18

12.19

12.20

Protection Functions

CB State Monitoring and Condition Monitoring

Accuracy

Timers:

Broken current accuracy:

±

2% or 20 ms whichever is greater

±

5%

Programmable Scheme Logic (PSL)

Output conditioner timer:

Dwell conditioner timer:

Pulse conditioner timer:

Setting

±

2% or 20 ms whichever is greater

Setting

±

2% or 20 ms whichever is greater

Setting

±

2% or 20 ms whichever is greater

Auto-Reclose and Check Synchronism

Accuracy

Timers: Setting

±

20 ms or 2%, whichever is greater

Measurements and Recording Facilities

Accuracy

Typically

±

1%, but

±

0.5% between 0.2 - 2 In/Vn

Current:

Accuracy:

Voltage:

Accuracy:

Power (W):

Accuracy:

Reactive Power (Vars):

Accuracy:

Apparent Power (VA):

Accuracy:

Energy (Wh):

Accuracy:

Energy (Varh):

Accuracy:

Phase accuracy:

Accuracy:

Frequency:

Accuracy:

0.05… 3 In

±

1.0% of reading

0.05…2 Vn

±

1.0% of reading

0.2…2 Vn 0.05…3 In

±

5.0% of reading at unity power factor

0.2…2 Vn, 0.05…3 In

±

5.0% of reading at zero power factor

0.2…2 Vn 0.05…3 In

±

5% of reading

0.2…2 Vn 0.2…3 In

±

5% of reading at zero power factor

0.2…2 Vn 0.2…3 In

±

5% of reading at zero power factor

0

°

…360

°

±

0.5

°

45…65 Hz

±

0.025 Hz

IRIG-B and Real Time Clock

Performance Accuracy

(for modulated and un-modulated versions)

Real time clock accuracy: <

±

2 seconds/day

Page (TD) 2-30 P54x/EN TD/Nd5

Protection Functions

12.21

12.21.1

12.21.2

12.22

12.23

(TD) 2 Technical Data

Enhanced Disturbance Records

For Software Release 47/57 and earlier

Maximum record duration: 50 seconds

No of records: minimum 5 at 10 second each, maximum 50 at 1 second each

(8 records of 3 seconds each via IEC60870-5-103 protocol)

Accuracy

Magnitude and relative phases:

Duration:

Trigger position:

±

5% of applied quantities

±

2%

±

2% (minimum Trigger 100 ms)

For Software Release A0 and later

Maximum record duration: 3 seconds

Maximum pre-trigger time 500 ms (see Note below)

Extracted over: CS103, IEC61850 and COURIER

For P54x, the Maximum pre-trigger time using CS103 on a 60Hz system is approximately

450 milliseconds.

Note As from Software Version H4, in DNP3 the maximum DR pre-trigger time is around 140 ms (50Hz) and 120 ms (60 Hz).

Accuracy

Magnitude and relative phases:

Duration:

Trigger position:

±

5% of applied quantities

±

2%

±

2% (minimum Trigger 100 ms)

Fault Locator

Accuracy

Fault location:

±

2% of line length (under reference conditions)*

* Reference conditions solid fault applied on line

Event, Fault & Maintenance Records

The most recent records are stored in battery-backed memory, and can be extracted via the communication port or be viewed on the front panel display.

No of Event Records: Up to 512 time tagged event records

No of Fault Records:

(1024 for software 41/51 and later).

Up to 15 (for software H4 and later)

No of Maintenance Records: Up to 10 (for software 41/51 and later)

P54x/EN TD/Nd5 Page (TD) 2-31

(TD) 2 Technical Data

12.24

12.25

12.26

12.26.1

Protection Functions

Plant Supervision

Accuracy

Timers:

Broken current accuracy:

Timer Accuracy

Timers:

Reset time:

Undercurrent Accuracy

Pick-up:

Operating time:

Reset:

±

2% or 20 ms whichever is greater

±

5%

±

2% or 40 ms whichever is greater

<30 ms

±

10% or 25 mA whichever is greater

<20 ms

<25 ms

InterMiCOM

64

Fiber Optic Teleprotection

End-end operation. The table below shows minimum and maximum transfer time for

InterMiCOM

64

(IM64).

The times are measured from opto initialization (with no opto filtering) to relay standard output and include a small propagation delay for back-back test (2.7 ms for 64 kbits/s and

3.2 ms for 56 kbits/s).

IDiff IM64 indicates InterMiCOM

64 signals working in conjunction with the differential protection fiber optic communications channel. IM64 indicates InterMiCOM

64

signals working as a standalone feature.

Configuration

IM64 at 64 k

IM64 at 56 k

Permissive op times (ms)

13 - 18

15 - 20

Direct op times (ms)

17 - 20

19 - 22

IDiff IM64 at 64 k

IDiff IM64 at 56 k

22 - 24

24 - 26

23 - 25

25 - 27

Table 2 - Minimum and maximum transfer time for InterMiCOM

64

.

Ethernet Data (where applicable)

100 Base FX Interface

Transmitter Optical Characteristics – 100 base FX interface

(T

A

= 0°C to 70°C, V

CC

= 4.75 V to 5.25 V)

Parameter

Output Optical Power BOL: 62.5/125 µm,

NA = 0.275 Fiber EOL

Output Optical Power BOL: 50/125 µm,

NA = 0.20 Fiber EOL

Optical Extinction Ratio

P

OUT

P

OUT

Sym

–19

–20

–22.5

–23.5

Min.

–16.8

Typ.

–20.3

Output Optical Power at Logic “0” State

P

OUT

(“0”)

BOL – Beginning of life EOL – End of life

Transmitter Optical Characteristics – 100 base FX interface

–14

Max

–14

10

–10

–45

Unit dBm avg. dBm avg.

% dB dBm avg.

Table 3 - Transmitter optical characteristics

Page (TD) 2-32 P54x/EN TD/Nd5

Protection Functions (TD) 2 Technical Data

Receiver Optical Characteristics – 100 base FX interface

(T

A

= 0°C to 70°C, V

CC

= 4.75 V to 5.25 V)

Parameter Sym

Input Optical Power Minimum at Window Edge P

IN

Min. (W)

Input Optical Power Minimum at Eye Center

Input Optical Power Maximum

P

IN

Min. (C)

P

IN

Max. –14

Min.

–33.5

–34.5

–11.8

Typ.

Receiver Optical Characteristics – 100 base FX interface

–31

–31.8

Max. Unit dBm avg. dBm avg. dBm avg.

Table 4 - Receiver optical characteristics

P54x/EN TD/Nd5 Page (TD) 2-33

(TD) 2 Technical Data

13

13.1

13.1.1

13.2

13.2.1

13.2.2

Settings, Measurements and Records List

SETTINGS, MEASUREMENTS AND RECORDS LIST

Settings List

Global Settings (System Data):

Global Settings (System Data)

Language:

Frequency:

English/French/German/Spanish

English/French/German/Russian

Chinese/English/French

50/60 Hz

Circuit Breaker Control (CB Control):

P543 and P545 Specific CB Control Settings

CB Control by:

Close pulse time:

Trip pulse time:

Disabled, Local, Remote, Local+remote, Opto, Opto+local,

Opto+Remote, Opto+Rem+Local

0.10…10.00s

0.10…5.00s

Man close t max:

Man close delay:

CB healthy time:

Check sync time:

0.01…9999.00s

0.01…600.00s

0.01…9999.00s

0.01…9999.00s

Reset lockout by: User interface/CB close

Man close RstDly: 0.10…600.00s

Single pole A/R: Disabled/Enabled

Three pole A/R:

CB Status Input:

Disabled/Enabled

None, 52A 3 pole, 52B 3 pole, 52A & 52B 3 pole, 52A 1 pole,

52B 1 pole, 52A & 52B 1 pole

P544 and P546 Specific CB Control Settings

CB Control by: Disabled, Local, Remote, Local+remote, Opto, Opto+local,

Opto+remote, Opto+rem+local

Man close delay:

CB healthy time:

Check sync time:

0.01…600.00s

0.01…9999.00s

0.01…9999.00s

Rst CB mon LO By: User Interface/CB Close

CB mon LO RstDly: 0.1…600s

CB1 Status Input: None, 52A 3 pole, 52B 3 pole, 52A & 52B 3 pole, 52A 1 pole,

52B 1 pole, 52A & 52B 1 pole

CB Status Time

CB2 Status Input:

0.1 ... 5s

None, 52A 3 pole, 52B 3 pole, 52A & 52B 3 pole, 52A 1 pole,

52B 1 pole, 52A & 52B 1 pole

Page (TD) 2-34 P54x/EN TD/Nd5

Settings, Measurements and Records List

13.3

13.4

(TD) 2 Technical Data

Res AROK by UI:

Res AROK by NoAR:

Res AROK by Ext:

Res AROK by TDly:

Res AROK by TDly:

Res LO by CB IS:

Res LO by UI:

Res LO by NoAR:

Res LO by ExtDDB:

Res LO by TDelay:

LO Reset Time:

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

1.0…9999 s

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

1…9999 s

Date and Time

IRIG-B Sync:

Battery Status:

Battery Alarm:

Disabled/Enabled data

Disabled/Enabled

LocalTime Enable: Disabled/Fixed/Flexible

LocalTime Offset: -720 min…720 min

DST Enable:

DST Offset:

Disabled/Enabled

30 min…60 min

DST Start:

DST Start Day:

DST Start Month:

DST Start Mins:

DST End:

DST End Day:

DST End Month:

DST End Mins:

RP1 Time Zone:

RP2 Time Zone:

First/Second/Third/Fourth/Last

Sun/Mon/Tues/Wed/Thurs/Fri/Sat

Jan/Feb/Mar/Apr/May/Jun/Jul/Aug/Sept/Oct/Nov/Dec

0 min…1425 min

First/Second/Third/Fourth/Last

Sun/Mon/Tues/Wed/Thurs/Fri/Sat

Jan/Feb/Mar/Apr/May/Jun/Jul/Aug/Sept/Oct/Nov/Dec

0 min…1425 min

UTC/Local

UTC/Local

Tunnel Time Zone: UTC/Local

DNPOE Time Zone: UTC or Local

Configuration

Setting Group:

Active Settings:

Setting Group 1:

Setting Group 2:

Setting Group 3:

Setting Group 4:

Distance:

Directional E/F:

Phase Diff:

Select via Menu or Select via Opto

Group 1/2/3/4

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

P54x/EN TD/Nd5 Page (TD) 2-35

(TD) 2 Technical Data

13.5

13.5.1

Settings, Measurements and Records List

Overcurrent: Disabled/Enabled

Neg Sequence O/C: Disabled/Enabled

Broken Conductor: Disabled/Enabled

Earth Fault: Disabled/Enabled

SEF/REF Prot’n: Disabled/Enabled

Residual O/V NVD: Disabled/Enabled

Thermal Overload: Disabled/Enabled

Power Swing Block: Disabled/Enabled (not P841)

Volt Protection:

Freq Protection: df/dt Protection:

CB Fail:

Supervision:

System Checks:

Auto-Reclose:

Input Labels:

Output Labels:

CT & VT Ratios:

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Disabled/Enabled

Invisible/Visible

Invisible/Visible

Invisible/Visible

Record Control

Disturb Recorder:

Measure’t Setup:

Invisible/Visible

Invisible/Visible

Invisible/Visible

Comms Settings: Invisible/Visible

Commission Tests: Invisible/Visible

Setting Values:

Control Inputs:

Primary/Secondary

Invisible/Visible

CLIO Inputs:

CLIO Outputs:

Ctrl I/P Config:

Ctrl I/P Labels:

Direct Access:

IEC GOOSE:

Function Keys:

LCD Contrast:

Disabled/Enabled (does not apply to P44y, P54x or P841)

Disabled/Enabled (does not apply to P44y, P54x or P841)

Invisible/Visible

Invisible/Visible

Disabled/Enabled/Hotkey

Invisible/Visible (does not apply to P44y, P54x or P841)

Invisible/Visible

0…31

CT and VT Ratios

P543 and P545 CT and VT ratio settings:

Main VT Primary: 100V...1MV

Main VT Sec'y:

C/S VT Primary:

80...140V

100V...1MV

C/S VT Secondary: 80...140V

Phase CT Primary: 1A…30kA

Phase CT Sec'y:

SEF CT Primary:

1A/5A

1A…30kA

SEF CT Sec'y: 1A/5A

MComp CT Primary: 1A…30kA

MComp CT Sec'y: 1A/5A

C/S Input: A-N, B-N, C-N, A-B, B-C, C-A, A-N/1.732, B-N/1.732, C-N/1.732

Main VT Location: Line/Bus

CT Polarity:

SEF CT Polarity:

M CT Polarity:

Standard /Inverted

Standard /Inverted

Standard /Inverted

VTs Connected: Yes/No

Page (TD) 2-36 P54x/EN TD/Nd5

Settings, Measurements and Records List

13.5.2

13.6

13.7

13.7.1

(TD) 2 Technical Data

P544 and P546 CT and VT ratio settings:

Note CB2 references apply to P44y and P841B only

Main VT Primary:

Main VT Sec’y:

CB1 CS VT Prim’y:

CB1 CS VT Sec’y:

CB2 CS VT Prim’y:

CB2 CS VT Sec’y:

Phase CT Primary:

Phase CT Sec’y:

Phase CT2 Primary:

Phase CT2 Sec’y:

SEF CT Primary:

SEF CT Secondary:

MComp CT Primary:

MComp CT Sec’y:

CS Input:

CT1 Polarity:

CT2 Polarity:

SEF CT Polarity:

M CT Polarity:

VTs Connected:

CB1 CS VT PhShft:

CB1 CS VT Mag:

CB2 CS VT PhShft:

CB2 CS VT Mag:

100 V…1000 kV

80…140 V

100 V…1000 kV

80…140 V

100 V…1000 kV

80…140 V

1A…30 kA

1…5 A

1A…30 kA (P44y/P54x on A0A onwards & P841B only)

1…5 A (P44y/P54x on A0A onwards & P841B only)

1 A…30 kA

1…5 A

1…30 k

1…5 A

A-N, B-N, C-N, A-B, B-C, C-A

Standard/Inverted

Standard/Inverted

Standard/Inverted

Standard/Inverted

Yes/No

-180…+180 deg

0.2…3

-180…+180 deg

0.2…3

Sequence of Event Recorder (Record Control)

Alarm Event:

Relay O/P Event:

Opto Input Event:

General Event:

Fault Rec Event:

Maint Rec Event:

No/Yes

No/Yes

No/Yes

No/Yes

No/Yes

No/Yes

Protection Event: No/Yes

Flt Rec Extended: Disabled/Enabled (where available)

DDB 31 - 0: (up to):

DDB 1791 - 1760: Binary function link strings, selecting which DDB signals will be stored as events, and which will be filtered out.

Oscillography (Disturb Recorder)

For Software release 47/57 V/W/X and earlier

Duration: 0.10…10.50s

Trigger Position:

Trigger Mode:

0.0…100.0%

Single/Extended

Analog Channel 1: (up to): Analog Channel 12:

Disturbance channels selected from:

IA, IB, IC, IN, IN Sensitive, VA, VB, VC, IM, V CheckSync (P443, P446, P543 and

P545) and IA2, IB2, IC2 and VCheckSync2 (P446, P544 and P546 only)

Digital Input 1: (up to): Digital Input 32:

Selected binary channel assignment from any DDB status point within the relay

(opto input, output contact, alarms, starts, trips, controls, logic…).

P54x/EN TD/Nd5 Page (TD) 2-37

(TD) 2 Technical Data

13.7.2

13.8

13.9

13.9.1

Settings, Measurements and Records List

Input 1 Trigger:

Input 32 Trigger:

(up to):

No Trigger/Trigger

For Software Release A0/B0 and later

Duration:

Trigger Position:

0.10…3.00s

0.0…16.7% (A0-A and B0-A and later versions)

Trigger Mode:

0.0…50.0% (A0-B and B0-B and later versions)

Single/Extended

Analog Channel 1 (up to) 20:

Disturbance channels selected from:

IA, IB, IC, IN, IN Sensitive, VA, VB, VC, V CheckSync, Idiff, Ibias, 2nd Harmonic.

Digital Input 1: (up to): Digital Input 128:

Selected binary channel assignment from any DDB status point within the relay

(opto input, output contact, alarms, starts, trips, controls, logic…).

Input 1 Trigger:

Input 32 Trigger:

(up to):

No Trigger/Trigger

Note The B0 software release introduces the Enhanced Disturbance Recorder

(DR) feature. This increases the number of digital channels to 128.

Measured Operating Data (Measure't Setup)

Default Display:

Access Level

3Ph + N Current / 3Ph Voltage / Power / Date and Time /

Description / Plant Reference / Frequency

Local Values:

Remote Values:

Primary/Secondary

Primary/Secondary

Measurement Ref: VA/VB/VC/IA/IB/IC

Measurement Mode: 0/1/2/3

Fix Dem. Period: 1…99 mins

Roll Sub Period: 1…99 mins

Num. Sub Periods: 1…15

Distance Unit: Miles/Kilometers

Fault Location:

Remote2 Values:

Distance Ohms % of Line

Primary/Secondary

Communications

RP1 Protocol: Courier

IEC870-5-103

DNP3.0

IEC61850

Courier Protocol

RP1 Address : 0…255

RP1 InactivTimer: 1…30 mins

RP1 PhysicalLink: Copper or Fiber Optic

RP1 Port Config: K Bus or EIA485 (RS485)

RP1 Comms Mode: IEC60870 FT1.2 Frame or IEC60870 10-Bit Frame

RP1 Baud Rate: 9600 bits/s or 19200 bits/s or 38400 bits/s

Page (TD) 2-38 P54x/EN TD/Nd5

Settings, Measurements and Records List

13.9.2

13.9.3

13.9.4

13.9.5

13.10

(TD) 2 Technical Data

IEC870-5-103 Protocol

RP1 Address : 0…255

RP1 InactivTimer: 1…30 mins

RP1 Baud Rate: 9600 bits/s or 19200 bits/s

RP1 Meas Period: 1…60 s

RP1 PhysicalLink: Copper or Fiber Optic

RP1 CS103 Blocking: Disabled or Monitor Blocking or Command Blocking

DNP3.0 Protocol: (EIA485)

RP1 Address : 0…65519

RP1 Baud Rate:

RP1 Parity:

1200 or 2400 or 4800 or 9600 or 19200 or 38400 bits/s

Odd/Even/None

RP1 PhysicalLink: Copper or Fiber Optic

RP1 Time Sync: Disabled/Enabled

Meas Scaling: Primary, Secondary or Normalized.

Message gap:

DNP Need time:

0…50ms

1...30 mins

DNP App Fragment: 100...2048

DNP App Timeout: 1...120 s

DNP SBO Timeout: 1...10 s

DNP Link Timeout: 0.1...60 s

DNP3.0 Protocol: (Ethernet)

DNP Time Sync:

Meas Scaling:

Disabled/Enabled

Primary, Secondary or Normalized.

NIC Tunl Timeout: 1...30 mins

NIC Link Report: Alarm, Event, None

NIC Link Timeout: 0.1...60 s

DNP Need time: 1...30 mins

DNP App Fragment: 100...2048

DNP App Timeout: 1...120 s

DNP SBO Timeout: 1...10 s

DNP Link Timeout: 0.1...60 s

IEC61850 Protocol: (Ethernet)

NIC Tunl Timeout:

NIC Link Report:

NIC Link Timeout:

1...30 mins

Alarm, Event, None

0.1...60 s

Optional Additional Second Rear Communication (Rear Port2 (RP2))

RP2 Protocol:

RP2 Port Config:

Courier (fixed)

Courier over EIA(RS)232 or Courier over EIA(RS)485 or K-Bus

RP2 Comms. Mode: IEC60870 FT1.2 Frame 10-Bit NoParity

RP2 Address: 0…255

RP2 InactivTimer: 1…30mins

RP2 Baud Rate: 9600 or 19200 or 38400 bits/s

P54x/EN TD/Nd5 Page (TD) 2-39

(TD) 2 Technical Data

13.11

13.12

13.12.1

Settings, Measurements and Records List

Commission Tests

Monitor bit 1:

(up to):

Monitor bit 8:

Binary function link strings, selecting which

DDB signals have their status visible in the

Commissioning menu, for test purposes

Test Mode:

Test Pattern:

Disabled Test Mode Blocked Contacts

Configuration of which output contacts are to be energized when the contact test is applied

Static Test Mode: Disabled/Enabled

Contact test:

Autoreclose test:

Red or Green LED status visible:

No operation/Apply test/Remove test/LEDs test

No operation/ 3-pole test/Pole A, B or C test

DDB31-0 to DDB 2047-2016 status visible.

Test Mode Disabled / Test Mode / Contacts Blocked

Contact Test: No Operation, Apply Test, Remove Test

Test LEDs: No Operation, Apply Test

Test Auto-reclose: No Operation, Trip 3 Pole, Trip Pole A, Trip Pole B, Trip Pole C

Loopback Mode: Disabled, External, Internal

IM64 TestPattern: Configuration of which InterMiCOM

64

commands are to be set high or low for a loopback test.

IM64 Test Mode Enabled/Disabled

Circuit Breaker Condition Monitoring (CB Monitor Setup)

P543 and P545 CB Monitor Setup:

Broken I^:

I^ Maintenance:

I^ Maintenance:

I^ Lockout:

I^ Lockout:

No. CB Ops Maint:

No. CB Ops Maint:

No. CB Ops Lock:

No. CB Ops Lock:

CB Time Maint:

CB Time Maint:

CB Time Lockout:

CB Time Lockout:

Fault Freq. Lock:

Fault Freq. Count:

Fault Freq. Time:

1.0…2.0

Alarm Disabled/Enabled

1…25000

Alarm Disabled/Enabled

1…25000

Alarm Disabled/Enabled

1…10000

Alarm Disabled/Enabled

1…10000

Alarm Disabled/Enabled

0.005…0.500s

Alarm Disabled/Enabled

0.005…0.500s

Alarm Disabled/Enabled

1…9999

0…9999s

Page (TD) 2-40 P54x/EN TD/Nd5

Settings, Measurements and Records List

13.12.2

13.13

13.14

13.15

(TD) 2 Technical Data

P544 and P546 CB Monitor Setup:

CB1 Broken

Ι

^:

CB1

Ι

^ Maintenance:

CB1

Ι

^ Maintenance:

CB1

Ι

^ Lockout:

CB1

Ι

^ Lockout:

1…2

Alarm Disabled/Alarm Enabled

1…25000

Ι n^

Alarm Disabled/Alarm Enabled

1…25000

Ι n^

No. CB1 Ops. Maint.:

No. CB1 Ops. Maint.:

No. CB1 Ops. Lock:

No. CB1 Ops. Lock:

CB1 Time Maint.:

CB1 Time Maint.:

CB1 Time Lockout:

CB1 Time Lockout:

CB1 Fault Freq. Lock:

CB1 Flt Freq. Count:

CB1 Flt Freq. Time:

CB2 Broken

Ι

^:

CB2 Flt Freq. Time:

Alarm Disabled/ Alarm Enabled

1…10000

Alarm Disabled/Alarm Enabled

1…10000

Alarm Disabled/Alarm Enabled

0.005…0.5 s

Alarm Disabled/Alarm Enabled

0.005…0.5 s

Alarm Disabled/Alarm Enabled

1…9999

0…9999 s

(up to)

All settings selected from the same ranges as per the first controlled circuit breaker, CB1.

Optocoupled Binary Inputs (Opto Config.)

Hotkey Enabled:

Control Input 1:

(up to):

Control Input 32:

Binary function link string, selecting which of the control inputs are driven from Hotkeys.

Latched/Pulsed

Ctrl Command 1:

(up to):

Ctrl Command 32:

ON/OFF / SET/RESET / IN/OUT / ENABLED/DISABLED

Control Inputs into PSL (Ctrl. I/P Config.)

Hotkey Enabled:

Control Input 1:

(up to):

Control Input 32:

Ctrl Command 1:

(up to):

Ctrl Command 32:

Binary function link string, selecting which of the control inputs are driven from Hotkeys.

Latched/Pulsed

ON/OFF / SET/RESET / IN/OUT / ENABLED/DISABLED

PSL Signal Grouping Nodes

PSL Signal Grouping Nodes

For Software Version D1a and later, these DDB “Group” Nodes can be mapped to individual or multiple DDBs in the PSL:

PSL Group Sig 1

PSL Group Sig 2

PSL Group Sig 3

PSL Group Sig 4

P54x/EN TD/Nd5 Page (TD) 2-41

(TD) 2 Technical Data

13.16

13.17

13.18

13.19

13.20

13.21

Settings, Measurements and Records List

EIA(RS)232 Teleprotection (INTERMiCOM Comms.)

Source Address: 1…10

Received Address: 1…10

Data Rate: 600 / 1200 / 2400 / 4800 / 9600 / 19200 baud

Loopback Mode:

Test Pattern:

Disabled/Internal/External

Configuration of which InterMiCOM signals are to be energized when the loopback test is applied.

INTERMiCOM Conf.

IM Msg Alarm Lvl: 0.1…100.0%

IM1 Cmd Type: (up to):

IM8 Cmd Type: Disabled/Direct/Blocking, Permissive

IM1 FallBackMode: (up to):

IM8 FallBackMode: Default/Latched

IM1 DefaultValue: (up to):

IM8 DefaultValue: 0/1

IM1 FrameSyncTim: (up to):

IM8 FrameSyncTim: 1ms…1.5 s

Function Keys

Fn. Key Status 1 (up to):

Fn. Key Status 10

Fn. Key 1 Mode (up to):

Fn. Key 10 Mode:

Fn. Key 1 Label (up to):

Fn. Key 10 Label:

Disable / Lock / Unlock / Enable

Toggled/Normal

User defined text string to describe the function of the particular function key

IED Configurator

Switch Conf. Bank: No Action / Switch Banks

IEC 61850 GOOSE

GoEna: Disabled/Enabled

Test Mode: Disabled/Pass Through/Forced

VOP Test Pattern: 0x00000000... 0xFFFFFFFF

Ignore Test Flag: No/Yes

Prot Comms/IM

64

Scheme Setup: 2 Terminal/Dual Redundant/3 Terminal

Comm Mode: Standard/IEEE C37.94

Baud Rate Ch 1:

Baud Rate Ch 2:

56kbits/s or 64kbits/s

56kbits/s or 64kbits/s

Clock Source Ch1: Internal or External

Clock Source Ch2: Internal or External

Ch1 N*64kbits/s:

Ch2 N*64kbits/s:

Auto, 1, 2, 3... 12

Auto, 1, 2, 3... 12

Page (TD) 2-42 P54x/EN TD/Nd5

Settings, Measurements and Records List

13.22

13.23

(TD) 2 Technical Data

Comm Delay Tol: 0.001 s...0.00005 s

Comm Fail Timer: 0.1 s...600 s

Comm Fail Mode: Ch 1 Failure/Ch 2 Failure/Ch 1 or Ch 2 Fail/Ch 1 and Ch 2 Fail

GPS Sync: GPS Disabled, GPS  Standard, GPS  Inhibit, GPS  Restrain

Char Mod Time:

Char Mod Ex :

0...30 s

Disabled or Enabled

Char Mod Ex Time: 0... 30 s

Prop Delay Equal: No operation/Restore CDiff

Re-Configuration: Three Ended/Two Ended (R1&R2)/

Two Ended (L&R2)/Two Ended (L&R1)

GPS Fail Timer: 0…9999 s

GPS Trans Fail: Disabled or Enabled

GPS Trans Count: 1…100 s

GPS Trans Timer: 0…9999 s

Alarm Level: 0%...100%

Prop Delay Stats: Disabled or Enabled

MaxCh 1 PropDelay: 1 m...50 ms

MaxCh 2 PropDelay: 1 m...50 ms

TxRx Delay Stats: Disabled or Enabled

MaxCh1 Tx-RxTime: 1 m...50 ms

MaxCh2 Tx-RxTime: 1 m...50 ms

GPS Fail Timer:

GPS Trans Fail:

0…9999 s

Disabled or Enabled

GPS Trans Count: 1…100 s

GPS Trans Timer: 0…9999 s

IM1 Cmd Type:

IM1 FallBackMode:

Direct or Permissive

Default or Latching

IMx(x=1 to 8) DefaultValue: 0 or 1

The IM1 – IM8 s setting are common to both Ch1 and Ch2 (i.e. if IM1 DefaultValue is set to 0, it will be 0 on Ch1 and on Ch2)

Control Input User Labels (Ctrl. I/P Labels)

Control Input 1:

(up to):

Control Input 32:

Settable Control Input 33:

(up to):

Settable Control Input 48:

User defined text string to describe the function of the particular control input.

User defined text string to describe the function of the particular settable control input.

Settings in Multiple Groups

Note All settings here onwards apply for setting groups # = 1 to 4.

P54x/EN TD/Nd5 Page (TD) 2-43

(TD) 2 Technical Data

14

14.1

14.2

14.3

14.4

Protection Functions

PROTECTION FUNCTIONS

Line Parameters

GROUP # (for # = 1 to 4)

Line Length (km): 0.30…1000.00 km

Line Length (miles): 0.20…625.00 mi

Line Impedance: 0.05…500.00/In

Line Angle: 20…90°

Residual Comp:

Residual Angle:

Mutual Comp:

KZm Mutual Set:

0.00…10.00

-180…90°

Disabled/Enabled

0.00…10.00

KZm Mutual Angle: -180…90°

Phase Sequence: Standard ABC or Reverse ACB

CB Tripping Mode: 3 Pole or 1 and 3 Pole

Line Charging Y: 0.00…10.00 ms

Distance Setup

Setting Mode: Simple/Advanced

Phase Distance

Phase Chars.:

Quad Resistance:

Fault Resistance:

Zone 1 Ph Status:

Zone 1 Ph Reach:

Zone 2 Ph Status:

Zone 2 Ph Reach:

Zone 3 Ph Status:

Zone 3 Ph Reach:

Zone 3 Ph Offset:

Zone 3 Ph Rev Reach:

Zone P Ph Status:

Zone P Ph Dir.:

Zone P Ph Reach:

Zone 4 Ph Status:

Zone 4 Ph Reach:

Zone Q Ph Status:

Zone Q Ph Reach:

Ground Distance

Ground Chars.:

Quad Resistance:

Fault Resistance:

Zone1 Gnd Status:

Zone1 Gnd Reach:

Mho/Quadrilateral

Common/Proportional

0.05…500.00/In

Disabled/Enabled

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

Forward/Reverse

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

0.05…500.00/In

(Version H4 and later)

(Version H4 and later)

Mho/Quadrilateral

Common/Proportional

0.05…500.00/In

Disabled/Enabled

10…1000% of line

Page (TD) 2-44 P54x/EN TD/Nd5

Protection Functions

14.5

(TD) 2 Technical Data

Zone2 Gnd Status:

Zone2 Gnd Reach:

Zone3 Gnd Status:

Zone3 Gnd Reach:

Zone3 Gnd Offset:

Z3Gnd Rev Reach:

ZoneP Gnd Status:

ZoneP Gnd Direction:

ZoneP Gnd Reach:

Zone4 Gnd Status:

Zone4 Gnd Reach:

Zone Q Ph Status:

Zone Q Ph Reach:

Digital Filter:

CVT Filters:

Disabled/Enabled

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

Forward/Reverse

10…1000% of line

Disabled/Enabled

10…1000% of line

Disabled/Enabled

0.05…500.00/In

(Version H4 and later)

(Version H4 and later)

Standard / Special Applics

Disabled / Passive / Active

SIR Setting: (for CVT):

Load Blinders:

Load/B Impedance:

Load/B Angle:

Load Blinder V<:

5…60

Disabled/Enabled

0.10…500.00/In

15…65°

1.0…70.0V (ph-g)

Distance Polarizing:

Delta Status

0.2…5.0

Disabled/Enabled

Delta Char Angle: 0°...90°

Delta V Fwd:

Delta V Rev:

Delta I Fwd:

Delta I Rev:

1.0…30.0 V

0.5…30.0 V

0.10…10.00 In

0.05…10.00 In

Distance Elements - Phase Distance

Z1 Ph. Reach:

Z1 Ph. Angle:

R1 Ph. Resistive:

0.05…500.00/In

20…90°

0.05…500.00/In

Z1 Tilt Top Line: -30…30°

Z1 Ph. Sensit. Iph>1: 0.050…2.000 In

Z2 Ph. Reach:

Z2 Ph. Angle:

Z2 Ph Resistive:

Z2 Tilt Top Line:

0.05…500.00/In

20…90°

0.05…500.00/In

-30…30°

Z2 Ph. Sensit. Iph>2: 0.050…2.000 In

Z3 Ph. Reach: 0.05…500.00/In

Z3 Ph. Angle: 20…90°

Z3' Ph Rev Reach: 0.05…500.00/In

R3 Ph Res. Fwd.: 0.05…500.00/In

R3' Ph Res. Rev.: 0.05…500.00/In

Z3 Tilt Top Line: -30…30°

Z3 Ph. Sensit. Iph>3: 0.050…2.000 In

P54x/EN TD/Nd5 Page (TD) 2-45

(TD) 2 Technical Data Protection Functions

ZP Ph. Reach:

ZP Ph. Angle:

ZP Ph Resistive:

ZP Tilt Top line:

0.05…500.00/In

20…90°

0.05…500.00/In

-30…30°

ZP Ph. Sensit. Iph>P: 0.050…2.000In

Z4 Ph. Reach:

Z4 Ph. Angle:

Z4 Ph Resistive:

Z4 Tilt Top line:

0.05…500.00/In

20…90°

0.05…500.00/In

-30…30°

Z4 Ph. Sensit. Iph>4: 0.050…2.000 In

Zone Q Ph Status:

Zone Q Ph Reach:

Disabled/Enabled

0.05…500.00/In

(Version H4 and later)

(Version H4 and later)

14.6 Ground Distance Parameters

Z1 Gnd. Reach:

Z1 Gnd. Angle:

Z1 Dynamic Tilt:

Z1 Tilt top line:

Z1 Sensit Ignd>1:

Z2 Gnd. Reach:

Z2 Gnd. Angle:

Z2 Dynamic Tilt:

Z2 Tilt top line:

0.05…500.00/In

20…90°

Disabled or Enabled

-30°...30° kZN1 Res. Comp.: 0.00…10.00 kZN1 Res. Angle: -180…90° kZm1 Mut. Comp.: 0.00…10.00 kZm1 Mut. Angle: -180…90°

R1 Gnd. Resistive: 0.05…500.00/In

0.050…2.000 In

0.05…500.00/In

20…90°

Disabled or Enabled

-30°...30° kZN2 Res. Comp.: 0.00…10.00 kZN2 Res. Angle: -180…90° kZm2 Mut. Comp: 0.00…10.00 kZm2 Mut. Angle: -180…90°

R2 Gnd Resistive: 0.05…500.00/In

Z2 Sensit Ignd>2: 0.050…2.000 In

Z3 Gnd. Reach:

Z3 Gnd. Angle:

0.05…500.00/In

20…90°

Z3 Dynamic Tilt: Disabled or Enabled

Z3 Tilt top line: -30°...30°

Z3' Gnd Rev Rch: 0.05…500.00/In

Ω kZN3 Res. Comp.: 0.00…10.00 kZN3 Res. Angle: -180…90° kZm3 Mut. Comp.: 0.00…10.00 kZm3 Mut. Angle: -180…90°

R3 Gnd Res. Fwd: 0.05…500.00/In

R3 Gnd Res. Rev: 0.05…500.00/In

Z3 Sensit Ignd>3: 0.050…2.000 In

Page (TD) 2-46 P54x/EN TD/Nd5

Protection Functions

14.7

(TD) 2 Technical Data

ZP Ground Reach: 0.05…500.00/In

ZP Ground Angle: 20…90°

ZP Dynamic Tilt: Disabled or Enabled

ZP Tilt top line: -30°...30° kZNP Res. Comp.: 0.00…10.00 kZNP Res. Angle: -180…90° kZmP Mut. Comp.: 0.00…10.00 kZmP Mut. Angle: -180…90°

RP Gnd Resistive: 0.05…500.00/In

ZP Sensit Ignd>P: 0.050…2.000 In

Z4 Gnd. Reach:

Z4 Gnd. Angle:

Z4 Dynamic Tilt:

Z4 Tilt top line:

0.05…500.00/In

20…90°

Disabled or Enabled

-30°...30° kZN4 Res. Comp.: 0.00…10.00 kZN4 Res. Angle: -180…90° kZm4 Mut. Comp.: 0.00…10.00 kZm4 Mut. Angle: -180…90°

R4 Gnd. Resistive: 0.05…500.00/In

Z4 Gnd Sensitivity: 0.050…2.000 In

Zone Q Ph Status:

Zone Q Ph Reach:

Disabled/Enabled

0.05…500.00/In

(Version H4 and later)

(Version H4 and later)

Phase Current Differential Protection

Phase Diff:

Phase Is1:

Phase Is2:

Phase k1:

Phase k2:

Enabled or Disabled

0.2 In...2 In

1 In...30 In

30%...150%

30%...150%

Phase Char: DT/IEC S Inverse/IEC V Inverse/IEC E Inverse/

UK LT Inverse/IEEE M Inverse/IEEE V Inverse/IEEE E Inverse/

US Inverse/US ST Inverse

Phase Time Delay: 0 s...100 s

Phase TMS:

Phase Time Dial:

0.025...1.2

0.01...100

PIT Time:

Ph CT Corr'tion:

Compensation:

Susceptance:

Inrush Restraint:

0 s...0.2 s

1...8

None/Cap Charging/Transformer

1E-8*In...10*In

Restraint/Blocking/Disabled

Ih(2) CrossBlock:

Ih(2) Multiplier:

Ih(2) %>:

Ih(5) CrossBlock:

Ih(5) Blocking:

Ih(5) %>:

Disabled/Enabled

1..20

5% ..50%

Disabled/Enabled

Disabled/Enabled

5% ..100%

P54x/EN TD/Nd5 Page (TD) 2-47

(TD) 2 Technical Data

14.8

14.8.1

Protection Functions

Highset Status:

Id High Set:

Vectorial Comp:

Phase Is1 CTS:

PIT I Selection:

Scheme Logic

Disabled/Enabled

4*ln...32*ln

Yy0 (0 deg)/Yd1 (-30 deg)/ Yy2 (-60 deg)/Yd3 (-90 deg)/

Yy4 (-120 deg)/ Yd5 (-150 deg)/Yy6 (180 deg)/Yd7 (+150 deg)/

Yy8 (+120 deg)/Yd9 (+90 deg)/Yy10 (+60 deg)/

Yd11 (+30 deg)/Ydy0 (0 deg)/Ydy6 (180 deg)

0.2*In...4*In

Local or Remote

Basic Scheme

Zone 1 Tripping: tZ1 Ph. Delay: tZ1 Gnd. Delay:

Zone 2 Tripping: tZ2 Ph. Delay: tZ2 Gnd. Delay:

Zone 3 Tripping: tZ3 Ph. Delay: tZ2 Gnd. Delay:

Zone P Tripping: tZP Ph. Delay: tZP Gnd. Delay:

Zone 4 Tripping: tZ4 Ph. Delay: tZ4 Gnd. Delay:

Zone Q Tripping: tZQ Ph. Delay: tZQ Gnd. Delay:

Disabled/Phase only/Ground only/Phase and Ground s...10s

0s...10s

Disabled/Phase only/Ground only/Phase and Ground s...10s

0s…10s

Disabled/Phase only/Ground only/Phase and Ground s...10s

0s...10s

Disabled/Phase only/Ground only/Phase and Ground

0s...10s

0s...10s

Disabled/Phase only/Ground only/Phase and Ground s...10s

0s...10s

Disabled/Phase only/Ground only/Phase and Ground

0s...10s

0s...10s

Page (TD) 2-48 P54x/EN TD/Nd5

Protection Functions

14.8.2

14.8.3

14.8.4

14.8.5

14.8.6

(TD) 2 Technical Data

Aided Scheme 1

Aid 1 Selection:

Aid 1 Distance:

Aid 1 Dist. Dly:

Disabled / PUR / PUR Unblocking / POR / POR Unblocking /

Blocking 1 / Blocking 2 / Prog Unblocking / Programmable

Disabled / Phase Only / Ground only / Phase and Ground

0s...1s

Unblocking Delay: 0s...0.1s

Aid 1 DEF: Disabled/Enabled

Aid 1 DEF Dly:

Aid 1 DEF Trip:

Aided 1 Delta:

0s...1s

1/3 Pole

Disabled/Enabled

Aided1 Delta dly:

Aided1 DeltaTrip:

0s...1s

1 / 3 Pole tREV Guard: 0s...0.15s

Unblocking Delay: 0s...0.1s

Send on Trip:

Weak Infeed:

WI Sngl Pole Trp:

WI V< Thresh:

Aided/Z1, Any Trip or None

Disabled / Echo / Echo and Trip

Disabled / Enabled

10V...70V

WI Trip Delay: 0s...1s

Custom Send Mask: Bit 0 = Z1 Gnd / Bit 1 = Z2 Gnd / Bit 2 = Z4 Gnd / Bit 3 = Z1 Ph /

Bit 4 = Z2 Ph / Bit 5 = Z4 Ph / Bit 6 = DEF Fwd /

Bit 7 = DEF Rev / Bit

Custom Time PU: 0s...1s

Custom Time DO: 0s...1s

Aided Scheme 2

(As per aided scheme 1)

Trip On Close

SOTF Status:

SOTF Delay:

SOTF Tripping:

TOR Status

Disabled/Enabled Pole Dead/Enabled ExtPulse/En Pdead + Pulse

0.2s...1000s

Bit 0 = Zone 1/Bit 1 = Zone 2/Bit 2 = Zone 3/Bit 3 = Zone P/

Bit 4 = Zone 4/Bit5=CNV/Bit 6=Zone Q

Disabled/Enabled

TOR Tripping: Bit 0 = Zone 1/Bit 1 = Zone 2/Bit 2 = Zone 3/Bit 3 = Zone P/

Bit 4 = Zone 4/Bit5=CNV/Bit 6=Zone Q

TOC Reset Delay: 0.1s...2s

TOC Delay 0.05s…0.2s

SOTF Pulse: 0.1s...10s

Z1 Extension

Z1 Ext Scheme:

Z1 Ext Ph:

Z1 Ext Gnd:

Disabled/Enabled/En. On Ch1 Fail/En. On Ch2 Fail/

En All Ch Fail/En. anyCh Fail

100%...200%

100%...200%

Loss Of Load

LOL Scheme:

LOL <I:

LOL Window:

Disabled/Enabled/En. On Ch1 Fail/En. On Ch2 Fail/

En All Ch Fail/En. Any Ch Fail

0.05 x In...1 x In

0.01s 0.1s Phase

P54x/EN TD/Nd5 Page (TD) 2-49

(TD) 2 Technical Data

14.9

Protection Functions

I>1 Status:

I>1 Function:

I>1 Directional:

I>1 Current Set:

I>1 Time Delay:

I>1 TMS:

I>1 Time Dial:

I>1 Reset Char:

I>1 tRESET:

I>2 Status

I>2 tRESET

I>3 Status:

I>3 Directional:

I>3 Current Set:

I>3 Time Delay:

I>4 Status

I>4 Time Delay

I> Char Angle:

I> Blocking:

Phase Overcurrent (Overcurrent)

Disabled / Enabled / Enabled VTS / Enabled Ch Fail /

En VTS or Ch Fail / En VTS and Ch Fail / Enabled CTS /

En VTSorCTS / En Ch FailorCTS / En VTSorCHForCTS /

En VTSandCTS / En Ch FailandCTS / En VTS CHF CTS

DT / IEC S Inverse/IEC V Inverse / IEC E Inverse/UK LT Inverse /

IEEE M Inverse/IEEE V Inverse/IEEE E Inverse/US Inverse /

US ST Inverse

Non-Directional/Directional Fwd /Directional Rev

0.08…4.00 In

0.00…100.00 s

0.025…1.200

0.01…100.00

DT/Inverse

0.00…100.00 s

(up to):

All settings and options chosen from the same ranges as per the first stage overcurrent, I>1

Disabled/Enabled/Enabled VTS/Enabled Ch Fail/En VTSor/

Ch Fail/En VTSandCh Fail

Non-Directional/Directional Fwd/Directional Rev

0.08…32.00 In

0.00…100.00 s

(up to):

All settings and options chosen from the same ranges as per the third stage overcurrent, I>3

-95…95°

Binary function link string, selecting which overcurrent elements

(stages 1 to 4) will be blocked if VTS detection of fuse failure occurs.

Page (TD) 2-50 P54x/EN TD/Nd5

Protection Functions

14.10

14.11

(TD) 2 Technical Data

Negative Sequence Overcurrent (Neg Seq O/C)

I2>1 Status: Enabled/Disabled

I2>1 Function:

I2>1 Direction:

Disabled / DT / IEC S Inverse / IEC V Inverse /

IEC E Inverse / UK LT Inverse / IEEE M Inverse /

IEEE V Inverse / IEEE E Inverse / US Inverse / US ST Inverse

Non-Directional / Directional Fwd / Directional Rev

I2>1 Current Set: 0.08…4.00 In

I2>1 Time Delay: 0.00…100.00 s

I2>1 TMS: 0.025…1.200

I2>1 Time Dial: 0.01…100.00

I2>1 Reset Char.: DT/Inverse

I2>1 tRESET: 0.00…100.00 s

I2>2 Status (up to):

I2>2 tRESET

I2>3 Status:

All settings and options chosen from the same ranges as per the first stage overcurrent, I2>1.

Disabled or Enabled

I2>3 Direction: Non-Directional / Directional Fwd / Directional Rev

I2>3 Current Set: 0.08…32.00 In

I2>3 Time Delay: 0.00…100.00 s

I2>4 Status (up to):

I2>4 Time Delay All settings and options chosen from the same ranges as per the third stage overcurrent, I2>3.

I2> VTS Blocking: Binary function link string, selecting which Neg. Seq. O/C

I2> Char Angle: elements (stages 1 to 4) will be blocked if VTS detection of fuse failure occurs

-95 ° …95 °

I2> V2pol Set: 0.5…25.0 (100 – 110 V)

Broken Conductor

Broken Conductor: Disabled/Enabled

I2/I1 Setting: 0.20…1.00

I2/I1 Time Delay: 0.0…100.0 s

P54x/EN TD/Nd5 Page (TD) 2-51

(TD) 2 Technical Data

14.12

14.13

Protection Functions

Ground Overcurrent (Earth Fault)

IN>1 Status:

IN>1 Function:

IN>1 Directional:

Disabled / Enabled/Enabled VTS/Enabled Ch Fail/

En VTS or Ch Fail /En VTS and Ch Fail

DT / IEC S Inverse/IEC V Inverse/IEC E Inverse/

UK LT Inverse/IEEE M Inverse/IEEE V Inverse/IEEE E Inverse/

US Inverse/US ST Inverse / IDG

Non-Directional/Directional Fwd/Directional Rev

IN>1 Current Set: 0.08…4.00 In

IN>1 IDG Is: 1...4

IN>1 IDG Time: 1…2

IN>1 Time Delay: 0.00…100.00 s

IN>1 TMS: 0.025…1.200

IN>1 Time Dial: 0.01…100.00

IN>1 Reset Char: DT/Inverse

IN>1 tRESET:

IN>2 Status

0.00…100.00 s

(up to):

IN>2 tRESET

IN>3 Status:

IN>3 Directional:

All settings and options chosen from the same ranges as per the first stage ground overcurrent, IN>1.

Disabled / Enabled/Enabled VTS/Enabled Ch Fail/

En VTS or Ch Fail /En VTSandCh Fail

Non-Directional/Directional Fwd /Directional Rev

IN>3 Current Set: 0.08…32.00 In

IN>3 Time Delay: 0.00…100.00 s

IN>4 Status

IN>4 Time Delay

(up to):

All settings and options chosen from the same ranges as per

IN> Blocking:

IN> DIRECTIONAL

IN> Char Angle:

IN> Polarization:

IN> VNpol Set:

IN> V2pol Set:

IN> I2pol Set: the third stage ground overcurrent, IN>3.

Binary function link string, selecting which ground overcurrent elements (stages 1 to 4) will be blocked if VTS detection of fuse failure occurs.

-95…95°

Zero or Neg Sequence

0.5…40.0 V

0.5…25.0 V

0.02…1.00 In

Directional Aided Schemes - DEF Settings

DEF Status:

DEF Polarizing:

DEF Char Angle:

DEF VNpol Set:

DEF V2pol Set:

DEF Fwd Set:

DEF Rev Set:

Disabled/Enabled

Zero Sequence (virtual current pol) or Neg Sequence

-95…95°

0.5…40.0V

0.5…25.0V

0.08…1.00 In

0.04…1.00 In

Page (TD) 2-52 P54x/EN TD/Nd5

Protection Functions

14.14

14.14.1

14.14.2

14.15

(TD) 2 Technical Data

Sensitive Earth Fault Protection/ Restricted Earth Fault Protection

SEF/REF Options: SEF Enabled / Wattmetric SEF, HI Z REF

SEF>1 Function: IDMT Curve Type / Disabled / DT / IEC S Inverse /

IEC V Inverse / IEC E Inverse / UK LT Inverse /

IEEE M Inverse / IEEE V Inverse / IEEE E Inverse

US Inverse / US ST Inverse / DG

ISEF>1 Directional: Non-Directional / Directional Fwd / Directional Rev

ISEF>1 Current Set: 0.005…0.1 In

SEF

ISEF>1 IDG Is: 1...4

I SEF>1 IDG Time: 1…2 s

ISEF>1 Time Delay: 0 s…..200 s

ISEF>1 TMS: 0.025…1.2

ISEF>1 Time Dial: 0.01…100

ISEF>1 Reset Char: DT/Inverse

ISEF>1 tRESET:

ISEF>2 as ISEF>1

0 s-100 s

ISEF>3 Status: Disabled / Enabled

ISEF>3 Directional: Non-Directional / Directional Fwd / Directional Rev

ISEF>3 Current Set: 0.05…0.8 In

SEF

ISEF>3 Time Delay: 0 s…200s

Enabled/Disabled ISEF>3 Intertrip:

ISEF>4 as ISEF>3

ISEFN> Blocking Bit 0 VTS Blks ISEF>1

Bit 1 VTS Blks ISEF>2

Bit 2 VTS Blks ISEF>3

Bit 3 VTS Blks ISEF>4

Bit 4 A/R Blks ISEF>3

Bit 5 A/R Blks ISEF>4

Bit 6 Not Used

Bit 7 Not Used

ISEF> Directional

ISEF> Char Angle: -95°…95° deg

ISEF> VNpol Set: 0.5…80 V

Wattmetric SEF

PN> Setting: 0...20 In

SEF

W

REF

IREF>Is: 0.05 In .. 1.0 In

Neutral Voltage Displacement (Residual O/V NVD)

VN>1 Function: Disabled / DT / IDMT

VN>1 Voltage Set: 1…80 V

VN>1 Time Delay: 0.00…100.00 s

VN>1 TMS:

VN>1 tReset:

VN>2 Status:

0.5…100.0

0.00…100.00 s

Disabled/Enabled

VN>2 Voltage Set: 1…80 V

VN>2 Time Delay: 0.00…100.00 s

P54x/EN TD/Nd5 Page (TD) 2-53

(TD) 2 Technical Data

14.16

14.17

14.17.1

14.17.2

14.18

Protection Functions

Thermal Overload

Characteristic:

Thermal Trip:

Thermal Alarm:

Time Constant 1:

Time Constant 2:

Disabled / Single / Dual

0.08…4.00 In

50…100%

1…200 mins

1…200 mins

Power Swing/Out of Step

Power Swing

Power Swing: Blocking, Indication

PSB Reset Delay: 0.05…2.00s

Zone 1 Ph PSB:

Zone 4 Ph PSB:

(up to):

Blocking/Allow Trip

Zone 1 Gnd PSB:

Zone 4 Gnd PSB:

(up to):

Blocking/Allow Trip

PSB Unblocking: Disabled/Enabled

PSB Unblock Delay: 0.1…20.0s

PSB Reset Delay: 0.5…2.0s

Out-Of-Step

OST (Out of Step Tripping) Mode: Disabled, Predictive and OST Trip,

Z5 Fwd Reach:

Z6 Fwd Reach:

Z5’ Rev Reach:

Z6’ Rev Reach:

R5 Res. Fwd:

R6 Res. Fwd:

R5’ Res. Rev:

OST Trip, Predictive OST

0.1…500.00/In

0.1…500.00/In

0.1…500.00/In

0.1…500.00/In

0.1…200.00/In

0.1…200.00/In

-0.1…-200.00/In

-0.1…-200.00/In

R6’ Res. Rev:

α Blinder Angle:

Delta t Time Setting:

20…90°

0.02s…1s

Tost Time Delay Setting: 0s…1s

Undervoltage Protection

V< Measur't Mode: V<1 & V<2 Ph-Ph / V<1 & V<2 Ph-N /

V<1Ph-Ph V<2Ph-N / V<1Ph-N V<2Ph-Ph

V< Operate Mode: V<1 & V<2 Any Ph / V<1 & V<2 3Phase /

V<1AnyPh V<2 3Ph / V<1 3Ph V<2AnyPh

V<1 Function:

V<1 Voltage Set:

V<1 Time Delay:

V<1 TMS:

Disabled / DT / IDMT

10…120 V

0.00…100.00 s

0.5…100.0

V<1 Poledead Inh: Disabled/Enabled

V<2 Status: Disabled/Enabled

V<2 Voltage Set:

V<2 Time Delay:

10…120 V

0.00…100.00 s

V<2 Poledead Inh: Disabled/Enabled

Page (TD) 2-54 P54x/EN TD/Nd5

Protection Functions

14.19

14.20

14.21

14.22

(TD) 2 Technical Data

Overvoltage Protection

V> Measur't Mode: V>1 & V>2 Ph-Ph / V>1 & V>2 Ph-N /

V>1Ph-Ph V>2Ph-N / V>1Ph-N V>2Ph-Ph

V> Operate Mode: V>1 & V>2 Any Ph / V>1 & V>2 3Phase /

V>1 Function:

V>1 Voltage Set:

V>1AnyPh V>2 3Ph / V>1 3Ph V>2AnyPh

Disabled / DT / IDMT

60…185 V

V>1 Time Delay:

V>1 TMS:

V>2 Status:

V>2 Voltage Set:

V>2 Time Delay:

0.00…100.00 s

0.5…100.0

Disabled/Enabled

60…185 V

0.00…100.00 s

V1>1 Cmp Funct: Disabled / DT / IDMT

V1>1 Cmp Vlt Set: 60…110 V

V1>1 Cmp Tim Dly: 0.00…100.00 s

V1>1 CmpTMS: 0.5…100.0

V1>2 Cmp Status: Disabled/Enabled

V1>2 Vlt Set: 60…110 V

V1>2 CmpTim Dly: 0.00…100.00 s

Underfrequency Protection

F<1 Status: Disabled/Enabled

F<1 Setting:

F<1 Time Delay:

45.00…65.00 Hz

0.00…100.00 s

F<2 Status (up to): F<4 Time Delay

All settings and options chosen from the same ranges as per the 1st stage.

F> Blocking: Binary function link string, selecting which frequency elements (stages 1 to 4) will be blocked by the pole-dead logic.

Overfrequency Protection

F>1 Status: Disabled/Enabled

F>1 Setting:

F>1 Time Delay:

45.00…65.00 Hz

0.00…100.00 s

F>2 Status (up to): All settings and options chosen from the same ranges

F>2 Time Delay as per the 1st stage.

Rate-of-Change of Frequency Protection (

∆ f/

∆ t Protection)

∆ f/

∆ t Avg. Cycles: 6…12

∆ f/

∆ t>1 Status:

∆ f/

∆ t>1 Setting:

∆ f/

Disabled/Enabled

0.1…10.0 Hz

∆ t>1 Dir’n.: Negative/Positive/Both

∆ f/

∆ t>1 Time: 0.00…100.00 s

∆ f/

∆ t>2 Status: (up to):

∆ f/

∆ t>4 Time All settings and options chosen from the same ranges as per the 1st stage.

P54x/EN TD/Nd5 Page (TD) 2-55

(TD) 2 Technical Data

14.23

Protection Functions

Circuit Breaker Fail

CB Fail 1 Status:

CB Fail 1 Timer:

CB Fail 2 Status:

CB Fail 2 Timer:

Volt Prot. Reset:

Ext Prot. Reset:

WI Prot Reset:

Disabled/Enabled

0.00…10.00 s

Disabled/Enabled

0.00…10.00 s

I< Only or CB Open & I< or Prot. Reset & I<

I< Only or CB Open & I< or Prot. Reset & I<

Disabled / Enabled / Undercurrent

I< Current Set: 0.02…3.20 In

ISEF< Current Set: 0.001…0.8 In

SEF

Poledead V<: 10…40 V

Page (TD) 2-56 P54x/EN TD/Nd5

Supervision Functions

15

15.1

15.1.1

15.1.2

15.2

15.3

(TD) 2 Technical Data

SUPERVISION FUNCTIONS

Voltage Transformer Supervision (VTS)

VTS Mode: Measured + MCB,

Measured Only or

MCB Only

VTS Status: Disabled / Blocking/Indication

VTS Reset Mode: Manual/Auto

VTS Time Delay:

VTS I> Inhibit:

VTS I2> Inhibit:

1 s...10 s

0.08....32 x In

0.05...0.5 x In

Inrush Detection

I> 2nd Harmonic: 10%...100%

Weak Infeed Blk

WI Inhibit:

I0/I2 Setting:

Disabled/Enabled

2...3

Current Transformer Supervision (CTS)

CTS Mode:

CTS Status:

CTS Reset Mode:

CTS Time Delay:

CTS VN< Inhibit:

CTS i1>:

CTS i2/i1>:

CTS i2/i1>>:

Disabled / Standard / I Diff / Idiff + Standard

Restrain / Indication

Manual / Auto

0...10 s

0.5 V...22 V

0.05*In...4.0*In

0.05...1

0.05...1

Trip Supervision (TS) or Fault Detector

Stage 1 Trip Supervision (TS)

Stage 1 TS

I>Threshold

I>TS Elements

IN>Threshold

IN>TS Elements

OCD>Threshold

OCD>TS Elements

Vpp<Threshold

Vpp<TS Elements

Vpn<Threshold

Vpn<TS Elements

UVD>Threshold

UVD>TS Elements

Enabled / Disabled

0.08ln... 4ln,

00000000~11111111

0.08ln... 4ln,

00000000~11111111

0.05ln... 0.2ln,

00000000~11111111

10... 120 V

00000000~11111111

10...120 V

00000000~11111111

1... 20 V

00000000~11111111

Stage 2 Trip Supervision (TS) same as Stage 1 TS

Stage 3 Trip Supervision (TS) same as Stage 1 TS

P54x/EN TD/Nd5 Page (TD) 2-57

(TD) 2 Technical Data

15.4

15.4.1

15.4.2

Supervision Functions

Systems Check

Bus-Line Synchronism and Voltage Checks (System Checks)

System Checks for P543 and P545

Voltage Monitors

Live Voltage:

Dead Voltage:

1.0…132.0V

1.0…132.0V

Synchrocheck (Check Synch)

CS1 Status: Disabled/Enabled

CS1 Phase Angle: 0…90°

CS1 Slip Control: None, Timer, Frequency, Both

CS1 Slip Freq:

CS1 Slip Timer:

CS2 Status

0.02…1.00Hz

0.0…99.0s

(up to):

CS2 Slip Timer

CS Undervoltage:

CS Overvoltage:

CS Diff Voltage:

All settings and options chosen from the same ranges as per the first stage CS1 element.

10.0…132.0V

60.0…185.0V

1.0…132.0V

CS Voltage Block: None, Undervoltage, Overvoltage, Differential, UV & OV,

UV & DiffV, OV & DiffV, UV, OV & DiffV

System Split

SS Status:

SS Phase Angle:

Disabled/Enabled

90…175°

SS Under V Block: Disabled/Enabled

SS Undervoltage:

SS Timer:

10.0…132.0V

0.0…99.0s

System Checks for P544 and P546

Voltage Monitors:

Live Line:

Dead Line:

Live Bus 1:

Dead Bus 1:

Live Bus 2:

Dead Bus 2:

CS UV:

CS OV:

5…132 V

5…132 V

5…132 V

5…132 V

5…132 V

5…132 V

5…120 V

60…200 V

System Checks

CB1:

CB1 CS Volt. Blk:

CB1 CS1: Status :

CB1 CS1 Angle:

Enabled/Disabled

V< / V> / Vdiff.> / V< and V> / V< and Vdiff> /

V> and Vdiff> / V< V> and Vdiff> / None

Enabled or Disabled

0…90°

CB1 CS1 Vdiff: 1…120 V

CB1 CS1 SlipCtrl: Enabled/Disabled

CB1 CS1 SlipFreq: 5 mHz…2 Hz

Page (TD) 2-58 P54x/EN TD/Nd5

Supervision Functions

15.4.2.1

15.5

15.5.1

(TD) 2 Technical Data

CB1 CS2: Status :

CB1 CS2 Angle:

Enabled/Disabled

0…90°

CB1 CS2 Vdiff: 1…120 V

CB1 CS2 SlipCtrl: Enabled/Disabled

CB1 CS2 SlipFreq: 5 mHz…2 Hz

CB1 CS2 Adaptive: Enabled/Disabled

CB1 Cl Time:

CB2: (up to):

10.0 ms…0.5 s

CB2 Cl Time: All settings and options chosen from the same ranges as per the first controlled circuit breaker, CB1.

Manual System Checks

Num CBs: CB1 Only, CB2 Only, CB1 & CB2.

CB1M SC required: Enabled/Disabled

CB1M SC CS1:

CB1M SC CS2:

CB1M SC DLLB:

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

CB1M SC LLDB:

CB1M SC DLDB:

Enabled/Disabled

Enabled/Disabled

CB2M SC required: (up to):

CB2M SC DLDB: All settings and options chosen from the same ranges as per the first controlled circuit breaker, CB1.

Auto-Reclose

P543 and P545 Auto-Reclose:

Single Pole Shot:

Three Pole Shot:

1/2/3/4

1/2/3/4

1 Pole Dead Time: 0.05…5.00s

Dead Time 1: 0.05…100.00s

Dead Time 2: 1…1800s

Dead Time 3:

Dead Time 4:

CB Healthy Time:

Reclaim Time:

1…3600s

1…3600s

1…3600s

1…600s

AR Inhibit Time: 0.01…600.00s

Check Sync Time: 0.01…9999.00s

Z2T AR: (up to):

Z4T AR: No Action, Initiate AR or Block AR

All time-delayed distance zones can be independently set not to act upon AR logic, to initiate a cycle, or to block.

DEF Aided AR: No Action or Initiate AR or Block AR

TOR: No Action or Initiate AR or Block AR

I>1 AR to I>4 AR: No action, Block AR, Initiate AR

All overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

IN>1 AR to IN>4 AR: No action, Block AR, Initiate AR

All ground/earth overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

ISEF>1 AR to ISEF>4 AR: No action, Block AR, Initiate AR

P54x/EN TD/Nd5 Page (TD) 2-59

(TD) 2 Technical Data

15.5.2

Supervision Functions

All ground/earth overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

Mult Phase AR:

Dead Time Start:

Discrim Time:

Allow Autoclose, BAR 2 and 3Ph or BAR 3 Phase

Protection Op or Protection Reset

0.10…5.00s

CheckSync1 Close: Disabled/Enabled

CheckSync2 Close: Disabled/Enabled

LiveLine/DeadBus: Disabled/Enabled

DeadLine/LiveBus: Disabled/Enabled

DeadLine/DeadBus: Disabled/Enabled

CS AR Immediate: Disabled/Enabled

SysChk on Shot 1: Disabled/Enabled

P544 and P546 Auto-Reclose:

Num CBs: CB1 only / CB2 only / Both CB1 & CB2

Lead/Foll AR Mode: L1P F1P / L1P F3P / L3P F3P / L1/3P F1/3P / L1/3P F3P / Opto

AR Mode: AR 1P / AR 1/3P / AR 3P / AR Opto

Leader Select By:

Select Leader:

BF if LFail Cls:

Dynamic F/L:

Leader by Menu / Leader by Opto / Leader by Ctrl

Sel Leader CB1 / Sel Leader CB2

Enabled / Disabled

Enabled / Disabled

AR Shots:

Multi Phase AR:

Discrim Time:

CB IS Time:

1…4

Allow Autoclose / BAR 2 and 3 ph / BAR 3 phase

20 ms…5 s

5…200 s

CB IS MemoryTime: 10 ms…1 s

DT Start by Prot: Protection Reset / Protection Op / Disabled

3PDTStart WhenLD: Enabled/Disabled

DTStart by CB Op: Enabled/Disabled

Dead Line Time: 1…9999 s

SP AR Dead Time: 0…10 s

3P AR DT Shot 1: 10 ms…300 s

3P AR DT Shot 2: 1…9999 s

3P AR DT Shot 3: 1…9999 s

3P AR DT Shot 4: 1…9999 s

Follower Time: 100 ms…300 s

SPAR ReclaimTime: 1…600 s

3PAR ReclaimTime: 1…600 s

AR CBHealthy Time: 0.01…9999 s

AR CheckSync Time: 0.01…9999 s

Z1 AR:

Diff AR:

Dist. Aided AR:

Z2T AR:

Initiate AR / Block AR

Initiate AR / Block AR

Initiate AR / Block AR

(up to):

Z4T AR: No Action / Initiate AR / Lock AR

All time-delayed distance zones can be independently set not to act upon AR logic, to initiate a cycle, or to block.

DEF Aided AR:

Dir. Comp AR:

Initiate AR, Block AR

Initiate AR, Block AR

TOR: Initiate AR, Block AR

I>1 AR to I>4 AR: No action, Block AR, Initiate AR

All ground/earth overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

Page (TD) 2-60 P54x/EN TD/Nd5

Supervision Functions

15.5.2.1

(TD) 2 Technical Data

IN>1 AR to IN>4 AR: No action, Block AR, Initiate AR

All ground/earth overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

ISEF>1 AR to ISEF>4 AR: No action, Block AR, Initiate AR

All ground/earth overcurrent stages can be independently set not to act upon AR logic, to initiate a cycle, or to block.

Auto-Reclose System Checks

CB1L SC All: Enabled/Disabled

CB1L SC Shot 1: Enabled/Disabled

CB1L SC ClsNoDly: Enabled/Disabled

CB1L SC CS1:

CB1L SC CS2:

Enabled/Disabled

Enabled/Disabled

CB1L SC DLLB:

CB1L SC LLDB:

CB1L SC DLDB:

CB2L SC all:

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

CB2L SC Shot 1: Enabled/Disabled

CB2L SC ClsNoDly: Enabled/Disabled

CB2L SC CS1:

CB2L SC CS2:

Enabled/Disabled

Enabled/Disabled

CB2L SC DLLB:

CB2L SC LLDB:

CB2L SC DLDB:

CB1F SC all:

CB1F SC Shot 1:

CB1F SC CS1:

CB1F SC CS2:

CB1F SC DLLB:

CB1F SC LLDB:

CB1F SC DLDB:

CB2F SC all:

CB2F SC Shot 1:

CB2F SC CS1:

CB2F SC CS2:

CB2F SC DLLB:

CB2F SC LLDB:

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

Enabled/Disabled

CB2F SC DLDB: Enabled/Disabled

Auto-Reclose Skip Shot 1 = Enabled/Disabled (using DDB No 1384)

P54x/EN TD/Nd5 Page (TD) 2-61

(TD) 2 Technical Data

16

16.1

16.2

16.3

16.4

16.5

16.1

Labels

LABELS

Opto Input Labels

Opto Input 1 to 32: Input L1 to Input L32

User-defined text string to describe the function of the particular opto input.

Output Labels

Relay 1 to 32: Output R1 to Output R32

User-defined text string to describe the function of the particular relay output contact.

Digital Input Labels

Digital Input 1: (up to): Digital Input 128

Setting to allow Digital Input 128 set/ reset.

Virtual Input Labels

Virtual Input 1: (up to): Virtual Input 32

Setting to allow Virtual Inputs xx set/ reset.

Virtual Output Labels

Virtual Output 1: (up to): Virtual Output 32

Setting to allow Virtual Outputs xx set/ reset.

SR/MR User Alarm Labels

SR User Alarm 1: (up to): SR User Alarm 4

MR User Alarm 5: (up to): MR User Alarm 8

Setting to allow SR/MR User Alarms to be set/ reset.

Page (TD) 2-62 P54x/EN TD/Nd5

Measurements List

17

17.1

(TD) 2 Technical Data

MEASUREMENTS LIST

Measurements 1

I

I ϕ

Magnitude ϕ

Phase Angle Per phase ( ϕ

= A, B, C)

Current Measurements

IN derived Mag

IN derived Angle

ISEF Mag

ISEF Angle

I1 Magnitude

I2 Magnitude

I ϕ

I0 Magnitude

RMS Per phase ( ϕ

= A, B, C)

RMS Current Measurements

IN RMS

V ϕ

ϕ

Magnitude

V ϕ

ϕ

Phase Angle

V ϕ

Magnitude

V ϕ

Phase Angle

V1 Magnitude

V2 Magnitude

V0 Magnitude

V ϕ

RMS

V ϕ

ϕ

RMS

All phase-phase and phase-neutral voltages (

All phase-phase and phase-neutral voltages ( ϕ ϕ

= A, B, C).

= A, B, C).

Frequency

CB1 CS Volt Mag

CB1 CS Voltage Ang

CB1 Bus-Line Ang

CB1 CS Slip Freq

IM Magnitude

I1 Magnitude

I2 Magnitude

I0 Magnitude

V1 Magnitude

V2 Magnitude

V0 Magnitude

IM Phase Angle

I1 Phase Angle

I2 Phase Angle

I0 Phase Angle

V1 Phase Angle

V2 Phase Angle

V0 Phase Angle

CB2 CS Voltage Mag

CB2 CS Voltage Ang

CB2 Bus-Line Ang

CB2 CS Slip Freq

(P446, P544, P546 and P841 only)

(P446, P544, P546 and P841 only)

(P446, P544, P546 and P841 only)

(P446, P544, P546 and P841 only)

V1 Rem Magnitude V1 Rem Phase Ang

IA CT1 Magnitude (P446, P544, P546 and P841B only)

IA CT1 Phase Ang (P446, P544, P546 and P841B only)

IB CT1 Magnitude (P446, P544, P546 and P841B only)

IB CT1 Phase Ang (P446, P544, P546 and P841B only)

IC CT1 Magnitude (P446, P544, P546 and P841B only)

IC CT1 Phase Ang (P446, P544, P546 and P841B only)

P54x/EN TD/Nd5 Page (TD) 2-63

(TD) 2 Technical Data

17.2

17.3

Measurements List

IA CT2 Magnitude (P446, P544, P546 and P841B only)

IA CT2 Phase Ang (P446, P544, P546 and P841B only)

IB CT2 Magnitude (P446, P544, P546 and P841B only)

IB CT2 Phase Ang (P446, P544, P546 and P841B only)

IC CT2 Magnitude (P446, P544, P546 and P841B only)

IC CT2 Phase Ang (P446, P544, P546 and P841B only)

Measurements 2 ϕ

Phase Watts ϕ

Phase VArs ϕ

Phase VA All phase segregated power measurements, real, reactive and apparent ( ϕ

= A, B, C).

3 Phase Watts

3 Phase VArs

3 Phase VA

Zero Seq Power

3Ph Power Factor ϕ

Ph Power Factor Independent power factor measurements for all three phases ( ϕ

= A, B, C).

3Ph WHours Fwd

3Ph WHours Rev

3Ph VArHours Fwd

3Ph VArHours Rev

3Ph W Fix Demand

3Ph VArs Fix Dem

I ϕ

Fixed Demand Maximum demand currents measured on a per phase basis ( ϕ

= A, B, C).

3Ph W Roll Dem

3Ph VArs Roll Dem

I ϕ

Roll Demand

3Ph W Peak Dem

3Ph VAr Peak Dem

I ϕ

Peak Demand

Thermal State

Maximum demand currents measured on a per phase basis ( ϕ

= A, B, C).

Maximum demand currents measured on a per phase basis ( ϕ

= A, B, C).

Measurements 3

IA Local

IB Local

IC Local

IA Remote 1

IB Remote 1

IC Remote 1

IA Remote 2

IB Remote 2

IC Remote 2

IA Differential

IA Bias

IA Angle Local

IB Angle Local

IC Angle Local

IA Ang Remote 1

IB Ang Remote 1

IC Ang Remote 1

IA Ang Remote 2

IB Ang Remote 2

IC Ang Remote 2

IB Differential

IB Bias

IC Differential

IC Bias

Page (TD) 2-64 P54x/EN TD/Nd5

Measurements List

17.4

(TD) 2 Technical Data

Measurements 4

Ch 1 Prop Delay

Ch1 Rx Prop Delay

Ch2 Rx Prop Delay

Channel 1 Status

Ch 2 Prop Delay

Ch1 Tx Prop Delay

Ch2 Tx Prop Delay

Channel 2 Status

Channel Status:

Bit 0= Rx

Bit 1= Tx

Bit 2= Local GPS

Bit 3= Remote GPS

Bit 4= Mux Clk F Error

Bit 5= Signal Lost

Bit 6= Path Yellow

Bit 7= Mismatch RxN

Bit 8= Timeout

Bit 9= Message Level

Bit 10= Passthrough

Bit 11= Hardware B to J model

Bit 12= Max Prop Delay

Bit 13= Max Tx-Rx Time

Binary function link strings denoting channel errors, and when self-healing has been initiated in 3-terminal applications.

IM64 Rx Status

Statistics

Last Reset on

Date/Time

Ch1 No. Vald Mess

Ch1 No. Err Mess

Ch1 No. Errored s

Ch1 No. Sev Err s

Ch1 No. Dgraded m

Ch2 No. Vald Mess

Ch2 No. Err Mess

Ch2 No. Errored s

Ch2 No. Sev Err s

Ch2 No. Dgraded m

Max Ch 1 Prop Delay

Max Ch1 TxRx Time

Clear Statistics

Max Ch 2 Prop Delay

Max Ch2 TxRx Time

P54x/EN TD/Nd5 Page (TD) 2-65

(TD) 2 Technical Data

17.5

17.6

Measurements List

Circuit Breaker Monitoring Statistics

CB Operations:

CB ϕ

Operations

Circuit breaker operation counters on a per phase basis ( ϕ

= A, B, C).

Total I ϕ

Broken

Cumulative breaker interruption duty on a per phase basis ( ϕ

= A, B, C).

CB Operate Time

For a second circuit breaker (P446, P544, P546 and P841 B only)

CB2 Operations:

CB2 ϕ

Operations

Circuit breaker operation counters on a per phase basis ( ϕ

= A, B, C).

CB2 I ϕ

Broken

Cumulative breaker interruption duty on a per phase basis ( ϕ

= A, B, C).

CB2 Operate Time

Fault Record Proforma

The following data is recorded for any relevant elements that operated during a fault, and can be viewed in each fault record.

Time & Date

Model Number:

Address:

Event Type:

Event Value

Fault record

Faulted Phase:

Start Elements

Trip Elements

Fault Alarms

Fault Time

Binary data strings for fast polling of which phase elements started or tripped for the fault recorded.

Binary data strings for fast polling of which protection elements started or tripped for the fault recorded.

Binary data strings for fast polling of alarms for the fault recorded.

Active Group: 1/2/3/4

System Frequency: Hz

Fault Duration: s

CB Operate Time: s

Relay Trip Time:

Fault Location: s km/miles/

/%

I

I ϕ

Pre Flt ϕ

Angle Pre Flt

IN Prefault Mag

IN Prefault Ang

IM Prefault Mag

IM Prefault Ang

Per phase record of the current magnitudes and phase angles stored before the fault inception.

V ϕ

Prefault Mag

V ϕ

Prefault Ang

VN Prefault Mag

VN Prefault Ang

Per phase record of the voltage magnitudes and phase angles stored before the fault inception.

Page (TD) 2-66 P54x/EN TD/Nd5

Measurements List (TD) 2 Technical Data

I ϕ

Fault Mag

I ϕ

Fault Ang

IN Fault Mag

IN Fault Ang

IM Fault Mag

IM Fault Ang

V ϕ

Fault Mag

V ϕ

Fault Ang

VN Fault Mag

VN Fault Ang

IA Local

IA Remote 1

IA Remote 2

IA Differential

IA Bias

Ch1 Prop Delay

Ch1 Rx Prop Delay

Ch2 Rx Prop Delay

V1 Rem Magnitude

Fault IA Local

Fault IA Rem 1

Fault IA Rem 2

Fault IA Diff

Fault IA Bias

Per phase record of the current magnitudes and phase angles during the fault.

Per phase record of the voltage magnitudes and phase angles during the fault.

IB Local

IB Remote 1

IB Remote 2

IB Differential

IB Bias

Fault IB Local

Fault IB Rem 1

Fault IB Rem 2

Fault IB Diff

Fault IB Bias

Ch 2 Prop Delay

Ch1 Tx Prop Delay

Ch2 Tx Prop Delay

V1 Rem Phase Ang

IC Local

IC Remote 1

IC Remote 2

IC Differential

IC Bias

Fault IC Local

Fault IC Rem 1

Fault IC Rem 2

Fault IC Diff

Fault IC Bias

P54x/EN TD/Nd5 Page (TD) 2-67

(TD) 2 Technical Data

Notes:

Measurements List

Page (TD) 2-68 P54x/EN TD/Nd5

MiCOM P54x (P543, P544, P545 & P546) (GS) 3 Getting Started

P54x/EN GS/Nd5

GETTING STARTED

CHAPTER 3

Page (GS) 3-1

(GS) 3 Getting Started MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (GS) 3-2 P54x/EN GS/Nd5

Contents (GS) 3 Getting Started

CONTENTS

1 Introduction to the Relay

1.1

1.2

1.3

1.3.1

1.3.2

1.4

1.5

User Interfaces and Menu Structure

Front Panel

LED Indications

Fixed Function

Programmable LEDs

Relay Rear Panel

Relay Connection and Power-Up

2 User Interfaces and Settings Options

3 Menu Structure

3.1

3.2

3.3

Protection Settings

Disturbance Recorder Settings

Control and Support Settings

4 Cyber Security

4.1

4.2

4.3

Cyber Security Settings

Role Based Access Control (RBAC)

User Roles and Rights

5 Relay Configuration

6 Front Panel User Interface (Keypad and LCD)

6.1

6.2

6.3

6.3.1

6.3.2

6.3.3

6.4

6.4.1

6.4.2

6.4.3

6.5

6.6

6.7

6.7.1

6.7.2

Default Display and Menu Time-Out

Navigating Menu and Browsing the Settings

Navigating the Hotkey Menu

Setting Group Selection

Control Inputs - User Assignable Functions

CB Control

How to Login

Local Default Access

Auto Login

Login with Prompt User List

Reading and Clearing of Alarm Messages and Fault Records

Setting Changes

How to Logout

How to Logout at the IED

How to Logout at MiCOM S1 Studio

7 Front Communication Port User Interface

7.1

Relay Front Port Settings

Page (GS) 3-

16

17

17

18

21

21

21

21

19

19

19

19

22

22

23

23

23

24

25

10

11

12

12

13

5

5

5

6

6

7

8

9

14

14

14

15

P54x/EN GS/Nd5 Page (GS) 3-3

(GS) 3 Getting Started Tables

7.2

Front Courier Port

8 Easergy Studio (MiCOM S1 Studio) Communications Basics

8.1

8.2

8.3

PC Requirements

Connecting to the Relay using Easergy Studio (MiCOM S1 Studio)

Off-Line Use of Easergy Studio (MiCOM S1 Studio)

TABLES

Table 1 - Default LED mappings for P543/P544/P545/P546

Table 2 - Nominal and Operative dc and ac Ranges

Table 3 – User interfaces and settings

Table 4 – Auto Login process

Table 5 - Front port DCE pin connections

Table 6 - DTE devices serial port pin connections

Table 7 - Communication settings

FIGURES

Page (GS) 3-

7

9

10

21

24

24

25

26

27

27

29

29

Figure 1 - Relay front view

Figure 2 - P543 relay rear view (60TE)

Figure 3 - Menu structure

Figure 4 - RBAC Role structure

Figure 5 - Front panel user interface

Figure 6 - Hotkey menu navigation for P54x (P543, P544, P545 & P546)

Figure 7 - Front port connection

Figure 8 - PC relay signal connection

Page (GS) 3-

17

20

24

25

5

8

11

14

Page (GS) 3-4 P54x/EN GS/Nd5

Introduction to the Relay

1

1.1

1.2

(GS) 3 Getting Started

INTRODUCTION TO THE RELAY

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/Safety Guide SFTY/5L M/L11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

User Interfaces and Menu Structure

The settings and functions of the MiCOM protection relay can be accessed both from the front panel keypad and LCD, and via the front and rear communication ports. Information on each of these methods is given in this section to describe how to start using the relay.

Front Panel

The following figure shows the front panel of the relay; the hinged covers at the top and bottom of the front panel are shown open. An optional transparent front cover physically protects the front panel. With the cover in place, access to the user interface is readonly. Removing the cover allows access to the relay settings and does not compromise the protection of the product from the environment.

When editing relay settings, full access to the relay keypad is needed. To remove the front cover:

1. Open the top and bottom covers, then unclip and remove the transparent cover. If the lower cover is secured with a wire seal, remove the seal.

2. Using the side flanges of the transparent cover, pull the bottom edge away from the relay front panel until it is clear of the seal tab.

3. Move the cover vertically down to release the two fixing lugs from their recesses in the front panel.

Serial No, Model No. & Ratings LCD Top Cover

Fixed

Function

LED’s

User

Programmable

Function LED’s

(tri-color)

User

Programmable

Function LED’s

(tri-color)

Hotkeys

Navigation

Keypad

Bottom Cover Battery

Compartment

Figure 1 - Relay front view

Front Comms.

Port

Download/

Monitor Port

Function

Keys

P0103ENe

P54x/EN GS/Nd5 Page (GS) 3-5

(GS) 3 Getting Started

1.3

1.3.1

Introduction to the Relay

The front panel of the relay includes the following, as shown in the previous figure:

• a 16-character by 3-line alphanumeric Liquid Crystal Display (LCD) a 19-key keypad comprising:

 4 arrow keys

(    and  ), an enter key (  ), a clear key (  ), a read key (  ), 2 hot keys (  ) and 10 (  −  ) programmable function keys

The relay front panel has control keys with programmable LEDs for local control.

Factory default settings associate specific relay functions with these 10 directaction keys and LEDs, e.g. Enable or Disable the auto-recloser function. Using programmable scheme logic, the user can change the default functions of the keys and LEDs to fit specific needs.

Hotkey functionality:

SCROLL

STOP stops scrolling the default display.

Control

starts scrolling through the various default displays.

of setting groups, control inputs and circuit breaker operation

LED indicators (normally either 22 or 12 LEDs depending on the model):

 four fixed function LEDs, programmable function LEDs on the left hand side of the front panel user programmable function LEDs on the right hand side associated with the function keys

Under the top hinged cover:

The relay serial number, and the relay’s current and voltage rating information

Under the bottom hinged cover:

Battery compartment to hold the 1/2 AA size battery which is used for memory back-up for the real time clock, event, fault and disturbance records

A 9-pin female D-type front port for communication with a PC locally to the relay

(up to 15m distance) via an EIA(RS)232 serial data connection

A 25-pin female D-type port providing internal signal monitoring and high speed local downloading of software and language text via a parallel data connection

LED Indications

Fixed Function

The Fixed Function LEDs on the left-hand side of the front panel show these conditions:

Trip (Red) indicates that the relay has issued a trip signal. It is reset when the associated fault record is cleared from the front display.

Alarm (Yellow) flashes when the relay has registered an alarm. This may be triggered by a fault, event or maintenance record. The LED will flash until the alarms have been accepted (read), after which the LED will change to constant illumination, and will extinguish, when the alarms have been cleared.

Out of Service (Yellow) is ON when the relay is not fully operational.

Healthy (Green) indicates that the relay is in correct working order, and should be on at all times. It will be extinguished if the relay’s self-test facilities show that there is an error with the relay’s hardware or software. The state of the healthy LED is reflected by the watchdog contact at the back of the relay.

To improve the visibility of the settings via the front panel, the LCD contrast can be adjusted using the “LCD Contrast” setting in the CONFIGURATION column. This should only be necessary in very hot or cold ambient temperatures.

Page (GS) 3-6 P54x/EN GS/Nd5

Introduction to the Relay (GS) 3 Getting Started

1.3.2 Programmable LEDs

All the programmable LEDs are tri-colour and can be programmed to show red, yellow or green depending on the requirements. The eight programmable LEDs on the left are suitable for programming alarm indications. The 10 programmable LEDs associated with the function keys, are used to show the status of the key’s function. The default behaviour and mappings for each of the programmable LEDs are as shown in this table:

Red

Green

Green

Green

Green

Amber

Red

Green

Amber

Amber

Amber

Green

Amber

Green

Amber

Default

Color

Red

Red

Red

Red

Red

Red

Amber

Green

Amber

8

8

F1

F2

6

6

7

7

1

2

3

4

5

LED

No

F3

F4

F5

F5

F5

F6

F7

F8

F8

F9

F9

P543 P544

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Diff Trip

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

AR in Progress

Not Used

AR Lockout

Not Used

Test Loopback

Not Used

Not Used

Not Used

F10 Not used Not Used Not Used

Table 1 - Default LED mappings for P543/P544/P545/P546

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Diff Trip

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

Not Used

Not Used

Not Used

Not Used

Test Loopback

Not Used

Not Used

Not Used

P545

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Diff Trip

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

AR in Progress

Not Used

AR Lockout

Not Used

Test Loopback

Not Used

Not Used

Not Used

P546

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Not Used

Diff Trip

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

Not Used

Not Used

Not Used

Not Used

Test Loopback

Not Used

Not Used

Not Used

P54x/EN GS/Nd5 Page (GS) 3-7

(GS) 3 Getting Started

1.4

Introduction to the Relay

Relay Rear Panel

All the programmable LEDs are tri-colour and can be programmed to show red, yellow or green depending on the requirements. The eight programmable LEDs on the left are suitable for programming alarm indications. The 10 programmable LEDs associated with the function keys, are used to show the status of the key’s function. The default behaviour and mappings for each of the programmable LEDs are as shown in this table:

Slot Description

Slot A:

Slot B:

Optional IRIG-B and ETHERNET - IEC 61850 - board

Fiber communication board for differential teleprotection including GPS sampling synchronization

Slot C: Analogue (CT& VT) Input Board

Slot D and F: Opto-isolated inputs boards

Slot G and H: Relay output contacts boards

Slot J: Power Supply/EIA(RS)485 Communications board

E

1

2

F

3

1

2

G

3

1

2

H

3

1

2

J

3

A B

1 2

C

3

IRIG-B12x

WindRiver

VxWorks

20148098

CH1

!

TX

RX

GPS

SK6

LINK

RX

AC/DC V

TX

!

TX

CH2

RX

16 17 18

21

22

23

24

19

!

1

20

2

D

3

16

18

17

17

16

18

17

16

18

17

16

18

17

16

18

P0104ENf

Figure 2 - P543 relay rear view (60TE)

Note This is one example of a case layout. The exact layout will vary depending on model configuration and case size. Refer to the wiring diagrams in the

Connection Diagrams chapter for complete connection details.

Page (GS) 3-8 P54x/EN GS/Nd5

Introduction to the Relay

1.5

(GS) 3 Getting Started

Relay Connection and Power-Up

Before powering-up the relay, confirm that the relay power supply voltage and nominal ac signal magnitudes are appropriate for your application. The relay serial number, and the relay’s current and voltage rating, power rating information can be viewed under the top hinged cover. The relay is available in the auxiliary voltage versions shown in this table:

Nominal Ranges Operative Ranges dc ac dc ac

24 – 32 V dc

48 – 110 V dc

-

-

110 – 250 V dc ** 100 – 240 V ac rms **

19 - 38 V dc

37 - 150 V dc

87 - 300 V dc

-

-

80 - 265 V ac

** rated for ac or dc operation

Table 2 - Nominal and Operative dc and ac Ranges

Please note that the label does not specify the logic input ratings. These relays are fitted with universal opto isolated logic inputs that can be programmed for the nominal battery voltage of the circuit of which they are a part. See ‘Universal Opto input’ in the Product

Design (Firmware) section for more information on logic input specifications.

Note The opto inputs have a maximum input voltage rating of 300V dc at any setting.

Once the ratings have been verified for the application, connect external power capable of delivering the power requirements specified on the label to perform the relay familiarization procedures. Previous diagrams show the location of the power supply terminals - please refer to the Installation and Connection Diagrams chapters for all the details, ensuring that the correct polarities are observed in the case of dc supply.

P54x/EN GS/Nd5 Page (GS) 3-9

(GS) 3 Getting Started User Interfaces and Settings Options

2 USER INTERFACES AND SETTINGS OPTIONS

The IED has three user interfaces:

The front panel using the LCD and keypad.

The front port which supports Courier communication.

The rear port which supports

 K-Bus or

DNP3.0 or

IEC 60870-5-103 or

IEC 61850 + Courier through the rear EIA(RS)485 port or

IEC 61850 + IEC 60870-5-103 through the rear EIA(RS)485 port.

The protocol for the rear port must be specified when the IED is ordered.

Display and modification of all settings

Digital I/O signal status

Display/extraction of measurements

Display/extraction of fault records

Extraction of disturbance records

Programmable scheme logic settings

Reset of fault and alarm records

Clear event and fault records

Time synchronization

Control commands

Table 3 – User interfaces and settings

Keypad / LCD Courier MODBUS IEC870-5-103 DNP3.0 IEC 61850

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Page (GS) 3-10 P54x/EN GS/Nd5

Menu Structure

3

(GS) 3 Getting Started

MENU STRUCTURE

The relay’s menu is arranged in a table. Each setting in the menu is referred to as a cell, and each cell in the menu may be accessed using a row and column address. The settings are arranged so that each column contains related settings, for example all the disturbance recorder settings are contained within the same column. As shown in the following diagram, the top row of each column contains the heading that describes the settings contained within that column. Movement between the columns of the menu can only be made at the column heading level.

For a complete list of all of the menu settings see the Settings chapter and the Menu

Database document.

Column Header Up to 4 protection setting groups

System data

View records

Overcurrent

Ground fault

Overcurrent

Ground fault

Column data settings

Control & Support Group 1 Group 2

Repeated for groups 2, 3 and 4

P0106ENa

Figure 3 - Menu structure

The settings in the menu fall into one of these categories:

Protection Settings

Disturbance Recorder settings

Control and Support (C&S) settings.

Different methods are used to change a setting depending on which category the setting falls into.

C&S settings are stored and used by the relay immediately after they are entered.

For either protection settings or disturbance recorder settings, the relay stores the new setting values in a temporary ‘scratchpad’. It activates all the new settings together, but only after it has been confirmed that the new settings are to be adopted. This technique is employed to provide extra security, and so that several setting changes that are made within a group of protection settings will all take effect at the same time.

Additional security settings can now be gained by using Cyber Security. This is now an option for Software Releases C0/D0/F0 and later.

P54x/EN GS/Nd5 Page (GS) 3-11

(GS) 3 Getting Started

3.1

3.2

Menu Structure

Protection Settings

The protection settings include the following items:

Protection element settings

Scheme logic settings

There are four groups of protection settings (only two groups for the P24x), with each group containing the same setting cells. One group of protection settings is selected as the active group, and is used by the protection elements.

Disturbance Recorder Settings

The Disturbance Recorder (DR) settings include the record duration and trigger position, selection of analogue and digital signals to record, and the signal sources that trigger the recording.

The number of digital channels varies depending on the product and the software version.

For Software Version numbers A0 and B0, the disturbance recorder was enhanced so that the maximum number of digital channels was increased to 128.

There are now four additional

DDB Group Sig x

Nodes that can be mapped to individual or multiple DDBs in the PSL. These can then be set to trigger the DR via the

DISTURBANCE RECORD menu.

These "Nodes" are general and can also be used to group signals together in the PSL for any other reason. These four nodes are available in each of the four PSL setting groups.

1. For a control input, the DR can be triggered directly by triggering directly from the

Individual Control Input (e.g. Low to High (L to H) change)

2. For an input that cannot be triggered directly, or where any one of a number of

DDBs are required to trigger a DR, map the DDBs to the new PSL Group sig n and then trigger the DR on this. e.g. in the PSL:

In the DR Settings:

Digital Input 1 is triggered by the PSL Group Sig 1 (L to H)

Digital Input 2 is triggered by Control Input 1 (L to H)

If triggering on both edges is required map another DR channel to the H/L as well

Digital Input 4 is triggered by the PSL Group Sig 1 (H to L)

Digital Input 5 is triggered by Control Input 1 (H to L)

Page (GS) 3-12 P54x/EN GS/Nd5

Menu Structure

3.3 Control and Support Settings

The control and support settings include:

IED configuration settings

VT ratio settings

Reset LEDs

Active setting group

Password & language settings

Communications settings

Measurement settings

Event and fault record settings

User interface settings

Commissioning settings

(GS) 3 Getting Started

P54x/EN GS/Nd5 Page (GS) 3-13

(GS) 3 Getting Started

4

4.1

4.2

Cyber Security

CYBER SECURITY

Cyber Security Settings

A detailed description of Schneider Electric Cyber Security features is provided in the

Cyber Security chapter.

Important We would strongly recommend that you understand the contents of the Cyber Security chapter before you use any cyber security features or make any changes to the settings.

Each MiCOM P40 IED includes a large number of possible settings. These settings are very important in determining how the device works.

A detailed description of the settings is given in the Cyber Security chapter.

Role Based Access Control (RBAC)

The Role Based Access Control (RBAC) is a method to restrict resource access to authorized users. RBAC is an alternative to traditional Mandatory Access Control (MAC) and Discretionary Access Control (DAC).

A key feature of RBAC model is that all access is through roles. A role is essentially a collection of permissions, and all users receive permissions only through the roles to which they are assigned, or through roles they inherit through the role hierarchy.

Figure 4 - RBAC Role structure

Roles are created for various job activities. The Permissions , to perform certain operations, are assigned to specific roles. Users are assigned particular roles, and through those role assignments acquire the computer permissions to perform particular computer-system functions. Since users are not assigned permissions directly, but only acquire them through their role (or roles), management of individual user rights becomes a matter of simply assigning appropriate roles to the user's account; this simplifies common operations, such as adding a user, or changing user's account.

Page (GS) 3-14 P54x/EN GS/Nd5

Cyber Security

4.3

(GS) 3 Getting Started

User Roles and Rights

Different named roles are associated with different access rights. Roles and Rights are setup in a pre-defined arrangement, according to the IEC62351 standard, but customized to the MiCOM Px4x equipment.

When the user tries to access an IED, they need to login using their own username and their own password. The username/password combination is then checked against the records stored on the IED. If they are allowed to login, a message appears which shows them what Role they have been assigned to. It is the role that defines their access to the relevant parts of the system.

In a similar way in which a set of pre-defined Roles have been created, a pre-defined set of Rights have been created.

These Rights give different permissions to look at what devices may be present, what those devices may contain, manage data within those devices (directly or by using files) and configure rights for other people.

P54x/EN GS/Nd5 Page (GS) 3-15

(GS) 3 Getting Started

5

Relay Configuration

RELAY CONFIGURATION

The relay is a multi-function device that supports numerous different protection, control and communication features. To simplify the setting of the relay, there is a configuration settings column which can be used to enable or disable many of the functions of the relay. The settings associated with any function that is disabled are made invisible, i.e. they are not shown in the menu. To disable a function change the relevant cell in the

‘ Configuration’ column from ‘ Enabled’ to ‘ Disabled’ .

The configuration column controls which of the protection settings groups is selected as active through the ‘ Active settings ’ cell. A protection setting group can also be disabled in the configuration column, provided it is not the present active group. Similarly, a disabled setting group cannot be set as the active group.

The column also allows all of the setting values in one group of protection settings to be copied to another group.

To do this firstly set the ‘Copy from’ cell to the protection setting group to be copied, then set the ‘Copy to’ cell to the protection group where the copy is to be placed. The copied settings are initially placed in the temporary scratchpad, and will only be used by the relay following confirmation.

To restore the default values to the settings in any protection settings group, set the

‘Restore defaults’ cell to the relevant group number. Alternatively it is possible to set the

‘Restore defaults’ cell to ‘All settings’ to restore the default values to all of the relay’s settings, not just the protection groups’ settings. The default settings will initially be placed in the scratchpad and will only be used by the relay after they have been confirmed. Note that restoring defaults to all settings includes the rear communication port settings, which may result in communication via the rear port being disrupted if the new (default) settings do not match those of the master station.

Page (GS) 3-16 P54x/EN GS/Nd5

Front Panel User Interface (Keypad and LCD)

6

6.1

(GS) 3 Getting Started

FRONT PANEL USER INTERFACE (KEYPAD AND LCD)

When the keypad is exposed it provides full access to the menu options of the relay, with the information displayed on the LCD.

The

 ,  , 

and

keys which are used for menu navigation and setting value changes include an auto-repeat function that comes into operation if any of these keys are held continually pressed. This can speed up both setting value changes and menu navigation; the longer the key is held depressed, the faster the rate of change or movement becomes.

Date and

Time

System

Frequency

 

Other default displays

 

3-phase

Voltage

Alarm messages

Column 1

System Data

Column 2

View Records

 

Other column headings

Column n

Group 4

Overcurrent

Data 1.1

Language

Data 1.2

Password

Other setting

 cells in

Column 1

Data 1.n

Password

Data 2.1

Last Record

Data 2.2

Time and

Date

Other setting cells in

Column 2

Note:

The  key will return to column header from any menu cell

Data 2.n

C-A Voltage

Data n.1

I>1 function

Data n.2

I>1 directional

Other setting cells in

Column n

Data n.n

I> Char Angle

P0105ENa

Figure 5 - Front panel user interface

Default Display and Menu Time-Out

The front panel menu has a default display. To change it, the Engineer Role will be required and the following items can be selected:

Date and time

Relay description (user defined)

Plant reference (user defined)

System frequency

3-phase voltage

3-phase and neutral current (P64x)

Power (P64x)

Access level

Check zone bias currents (A, B, C) (P741/P742/P743)

Check zone differential currents (A, B, C) (P741/P742/P743)

P54x/EN GS/Nd5 Page (GS) 3-17

(GS) 3 Getting Started Front Panel User Interface (Keypad and LCD)

From the default display, the user can switch the default display to other default display items using the  and  keys. The default display will be saved as the last viewed items automatically. If the user tries to change the default display, Engineer Role will be requested (if the current access role is not that of an Engineer).

When user is browsing the relay menu structure with default access right, if there is no keypad activity for the 15 minutes (i.e. the timeout period), the default display will revert from the last viewed menu structure (can be any location from the menu structure) and the LCD backlight will turn off.

When user is logged in with Engineer Role, the menu timeout time may be shorter than

15 minutes. This depends on the value of inactive timer (e.g. if the inactive timer is set to shorter than 15 minutes). If menu timeout happens, any setting changes that have not been confirmed will be lost and the original setting values maintained.

Whenever there is an uncleared alarm present in the relay (e.g. fault record, protection alarm, control alarm etc.) the default display will be replaced by:

Alarms/Faults

Present

Entry to the menu structure of the relay is made from the default display and is not affected if the display is showing the Alarms/Faults present message.

6.2 Navigating Menu and Browsing the Settings

Use the four arrow keys to browse the menu, following the menu structure shown above.

1. Starting at the default display, press the

key to show the first column heading.

2. Use the

and

keys to select the required column heading.

3. Use the

and

keys to view the setting data in the column.

4. To return to the column header, either hold the

key down or press the clear key

once. It is only possible to move across columns at the column heading level.

5. To return to the default display, press the

key or the clear key

from any of the column headings. If you use the auto-repeat function of the

key, you cannot go straight to the default display from one of the column cells because the auto-repeat stops at the column heading.

6. Press the

key again to go to the default display.

Page (GS) 3-18 P54x/EN GS/Nd5

Front Panel User Interface (Keypad and LCD)

6.3

6.3.1

6.3.2

6.3.3

(GS) 3 Getting Started

Navigating the Hotkey Menu

To access the hotkey menu from the default display:

1. Press the key directly below the HOTKEY text on the LCD.

2. Once in the hotkey menu, use the

and

keys to scroll between the available options, then use the hotkeys to control the function currently displayed.

If neither the

or

keys are pressed within 20 seconds of entering a hotkey sub menu, the relay reverts to the default display.

3. Press the clear key

to return to the default menu from any page of the hotkey menu.

The layout of a typical page of the hotkey menu is as follows:

The top line shows the contents of the previous and next cells for easy menu navigation

The center line shows the function

The bottom line shows the options assigned to the direct access keys

The functions available in the hotkey menu are listed in the following sections.

Setting Group Selection

The user can either scroll using <<NXT GRP>> through the available setting groups or

<<SELECT>> the setting group that is currently displayed.

When the SELECT button is pressed a screen confirming the current setting group is displayed for 2 seconds before the user is prompted with the <<NXT GRP>> or

<<SELECT>> options again. The user can exit the sub menu by using the left and right arrow keys.

For more information on setting group selection refer to “Setting group selection” section in the Operation chapter.

Control Inputs - User Assignable Functions

The number of control inputs (user assignable functions – USR ASS) represented in the hotkey menu is user configurable in the “CTRL I/P CONFIG” column. The chosen inputs can be SET/RESET using the hotkey menu.

For more information refer to the “Control Inputs” section in the Operation chapter.

CB Control

The CB control functionality varies from one Px40 relay to another. For a detailed description of the CB control via the hotkey menu refer to the “Circuit Breaker Control” section of the Setting chapter.

P54x/EN GS/Nd5 Page (GS) 3-19

(GS) 3 Getting Started Front Panel User Interface (Keypad and LCD)

Default Display

MiCOM

P54x or P547

HOTKEY CB CTRL

<USR ASSX STG GRP>

HOT KEY MENU

EXIT

(See CB Control in Application Notes)

<MENU USR ASS1>

SETTING GROUP 1

NXT GRP SELECT

<STG GRP

EXIT

USR ASS2>

CONTROL INPUT 1

ON

USR ASS1> USR ASSX>

CONTROL INPUT 2

EXIT ON

USR ASS2> MENU>

CONTROL INPUT 2

EXIT ON

<MENU USR ASS1>

SETTING GROUP 2

NXT GRP SELECT

<MENU USR ASS2>

CONTROL INPUT 1

Confirmation screen displayed for

2 seconds

ON

Confirmation screen displayed for

2 seconds

<MENU USR ASS1>

SETTING GROUP 2

SELECTED

<MENU USR ASS2>

CONTROL INPUT 1

OFF EXIT

NOTE:

<<EXIT>> Key returns the user to the Hotkey Menu Screen

Figure 6 - Hotkey menu navigation for P54x (P543, P544, P545 & P546) or P547

P1246ENl

Page (GS) 3-20 P54x/EN GS/Nd5

Front Panel User Interface (Keypad and LCD)

6.4

6.4.1

6.4.2

6.4.3

(GS) 3 Getting Started

How to Login

The password entry method varies slightly depending on whether the product includes cyber security features or not.

Local Default Access

If the Local Default Access is enabled, the user may login to the front panel with associated roles.

See Table 4 for the applied cases.

Auto Login

Auto login means the user will login the IED automatically and no need to select the user name and enter the password. In this case, the user will be authorized with relevant rights. The auto login will be applied in these cases:

CS

Version

Interface

RBAC/PW

Cases

Factory

RBAC

Login Process

Auto login with EngineerLevel

CSL1

Front panel Customized

RBAC

Local Default Access Enabled: Login with Local Default

Access

Local Default Access Disabled: Login with Prompt User

List

Courier

Interface

All cases Login with Prompt User List

Factory

RBAC

Auto login with EngineerLevel

EngineerLevel password is “AAAA” or is disabled/blank:

Auto login with EngineerLevel

OperatorLevel password is “AAAA” or is disabled/blank:

Auto login with OperatorLevel

EngineerLevel and OperatorLevel password changed:

Auto login with ViewerLevel Access

CSL0

Front panel Password changed

Factory

RBAC

Auto login with EngineerLevel

Courier

Interface Password changed

EngineerLevel password is “AAAA” or is disabled/blank:

Auto login with EngineerLevel

OperatorLevel password is “AAAA” or is disabled/blank:

Auto login with OperatorLevel

EngineerLevel and OperatorLevel password changed:

Login with Prompt User List

Table 4 – Auto Login process

For more details about the Factory RBAC, please refer to the Cyber Security chapter.

Login with Prompt User List

This login process will happen if:

The Auto login process is not applied.

Or high authorization is required for the current operation.

In this case, the IED will prompt the user list, and the user needs to select proper user name and enter the password to login.

P54x/EN GS/Nd5 Page (GS) 3-21

(GS) 3 Getting Started

6.5

6.6

Front Panel User Interface (Keypad and LCD)

Reading and Clearing of Alarm Messages and Fault Records

One or more alarm messages appear on the default display and the yellow alarm LED flashes. The alarm messages can either be self-resetting or latched, in which case they must be cleared manually.

1. To view the alarm messages, press the read key  . When all alarms have been viewed but not cleared, the alarm LED change from flashing to constantly ON and the latest fault record appears (if there is one).

2. Scroll through the pages of the latest fault record, using the  key. When all pages of the fault record have been viewed, the following prompt appears.

Press clear to reset alarms

3. To clear all alarm messages, press  . To return to the display showing alarms or faults present, and leave the alarms uncleared, press  .

4. Depending on the password configuration settings, you may need to enter a password before the alarm messages can be cleared. See the How to Access the

IED/Relay section.

5. When all alarms are cleared, the yellow alarm LED switches OFF; also the red trip

LED switches OFF if it was switched ON after a trip.

6. To speed up the procedure, enter the alarm viewer using the  key, then press the  key. This goes straight to the fault record display. Press  again to move straight to the alarm reset prompt, then press  again to clear all alarms.

Setting Changes

1. To change the value of a setting, go to the relevant cell in the menu, then press the enter key  to change the cell value. A flashing cursor on the LCD shows the value can be changed. If a password is required to edit the cell value, a password prompt appears.

2. To change the setting value, press the  or  keys. If the setting to be changed is a binary value or a text string, select the required bit or character to be changed using the  and  keys.

3. Press  to confirm the new setting value or the clear key  to discard it. The new setting is automatically discarded if it is not confirmed in 15 minutes.

4. For protection group settings and disturbance recorder settings, the changes must be confirmed before they are used by the relay.

5. To do this, when all required changes have been entered, return to the column heading level and press the  key. Before returning to the default display, the following prompt appears.

Update settings?

Enter or clear

6. Press  to accept the new settings or press  to discard the new settings.

Note If the menu time-out occurs before the setting changes have been confirmed, the setting values are also discarded.

Control and support settings are updated immediately after they are entered, without the

Update settings

?

prompt.

Page (GS) 3-22 P54x/EN GS/Nd5

Front Panel User Interface (Keypad and LCD)

6.7

6.7.1

6.7.2

How to Logout

(GS) 3 Getting Started

How to Logout at the IED

For security consideration, it would be better to “logout' the IED once the configuration done. You can do this by going up to the default display. W hen you are at the default display and you press the ‘Cancel’ button, you may be prompted to log out with the following display:

ENTER TO LOGOUT

CLEAR TO CANCEL

You will be asked this question if you are logged in.

If you confirm, the following message is displayed for 2 seconds:

LOGGED OUT

User Name

If you decide not to log out (i.e. you cancel), the following message is displayed for 2 seconds.

LOGOUT CANCELLED

User Name

Note The MiCOM IED runs a timer, which logs the user out after a period of inactivity. For more details, refer to the Inactivity Timer section.

How to Logout at MiCOM S1 Studio

Right-click on the device name and select Log Off.

In the Log Off confirmation dialog click Yes.

P54x/EN GS/Nd5 Page (GS) 3-23

(GS) 3 Getting Started

7

Front Communication Port User Interface

FRONT COMMUNICATION PORT USER INTERFACE

The front communication port is provided by a 9-pin female D-type connector located under the bottom hinged cover. It provides EIA(RS)232 serial data communication and is intended for use with a PC locally to the relay (up to 15m distance) as shown in the following diagram. This port supports the Courier communication protocol only. Courier is the communication language developed by Schneider Electric to allow communication with its range of protection relays. The front port is particularly designed for use with the relay settings program Easergy Studio (MiCOM S1 Studio) (Windows 2000, Windows XP or Windows Vista based software package).

Page (GS) 3-24

P0107ENe

Figure 7 - Front port connection

The IED is a Data Communication Equipment (DCE) device. The pin connections of the

9-pin front port are as follows:

2

3

5

Pin no. Description

Tx Transmit data

Rx Receive data

0V Zero volts common

Table 5 - Front port DCE pin connections

None of the other pins are connected in the relay. The relay should be connected to the serial port of a PC, usually called COM1 or COM2. PCs are normally Data Terminal

Equipment (DTE) devices which have a serial port pin connection as below (if in doubt check your PC manual):

Pin no. 2

Pin

3

25 Way

2

9 Way

Pin no. 3 2 3

Pin no. 5 7 5

Table 6 - DTE devices serial port pin connections

Description

Rx Receive data

Tx Transmit data

0V Zero volts common

P54x/EN GS/Nd5

Front Communication Port User Interface (GS) 3 Getting Started

For successful data communication, the Tx pin on the relay must be connected to the Rx pin on the PC, and the Rx pin on the relay must be connected to the Tx pin on the PC, as shown in the diagram. Therefore, providing that the PC is a DTE with pin connections as given above, a ‘straight through’ serial connector is required, i.e. one that connects pin 2 to pin 2, pin 3 to pin 3, and pin 5 to pin 5.

Note A common cause of difficulty with serial data communication is connecting

Tx to Tx and Rx to Rx. This could happen if a ‘cross-over’ serial connector is used, i.e. one that connects pin 2 to pin 3, and pin 3 to pin 2, or if the PC has the same pin configuration as the relay.

7.1

P0108ENd

Figure 8 - PC relay signal connection

Having made the physical connection from the relay to the PC, the PCs communication settings must be configured to match those of the relay. The relays communication settings for the front port are fixed as shown below:

Protocol Baud rate Courier address

Courier 19,200 bits/s 1

Table 7 - Communication settings

Message format

11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit

Relay Front Port Settings

The inactivity timer for the front port is set at 15 minutes. This controls how long the relay will maintain its password access on the front port. If no messages are received on the front port for 15 minutes then any password access that has been enabled will be revoked.

P54x/EN GS/Nd5 Page (GS) 3-25

(GS) 3 Getting Started

7.2

Front Communication Port User Interface

Front Courier Port

The front EIA(RS)232 9-pin port supports the Courier protocol for one to one communication.

Note The front port is actually compliant to EIA(RS)574; the 9-pin version of

EIA(RS)232, see www.tiaonline.org

.

The front port is designed for use during installation and commissioning/maintenance and is not suitable for permanent connection. Since this interface will not be used to link the relay to a substation communication system, some of the features of Courier are not implemented. These are as follows:

Automatic Extraction of Event Records:

 Courier Status byte does not support the Event flag

 Send Event/Accept Event commands are not implemented

Automatic Extraction of Disturbance Records:

 Courier Status byte does not support the Disturbance flag

Busy Response Layer: Courier Status byte does not support the Busy flag, the only response to a request will be the final data

Fixed Address: The address of the front courier port is always 1, the

Change Device address command is not supported.

Fixed Baud Rate: 19200 bps

Note Although automatic extraction of event and disturbance records is not supported, this data can be manually accessed using the front port.

Page (GS) 3-26 P54x/EN GS/Nd5

Easergy Studio (MiCOM S1 Studio) Communications Basics

8

8.1

(GS) 3 Getting Started

EASERGY STUDIO (MICOM S1 STUDIO)

COMMUNICATIONS BASICS

Note MiCOM S1 Studio has been renamed as Easergy Studio.

The EIA(RS)232 front communication port is particularly designed for use with the relay settings program Easergy Studio (MiCOM S1 Studio). Easergy Studio (MiCOM S1

Studio) is the universal MiCOM IED Support Software and provide users a direct and convenient access to all stored data in any MiCOM IED using the EIA(RS)232 front communication port.

Easergy Studio (MiCOM S1 Studio) provides full access to MiCOM Px10, Px20, Px30,

Px40 and Mx20 measurements units.

The Easergy Studio (MiCOM S1 Studio) product is updated periodically. These updates provide support for new features (such as allowing you to manage new MiCOM products, as well as using new software releases and hardware suffixes). The updates may also include fixes. Accordingly, we strongly advise customers to use the latest Schneider

Electric version of Easergy Studio (MiCOM S1 Studio).

PC Requirements

The minimum and recommended hardware requirements for Easergy Studio (MiCOM S1

Studio) (v7.0.0) are shown below. These include the Studio application and other tools which are included: UPCT, P746 RHMI, P74x Topology Tool:

Platform

Windows XP x86

Windows 7 x86

Windows 7 x64

Minimum requirements:

Processor

1 GHz

1 GHz

1 GHz

RAM

512 MB

1 GB

2 GB

HDD (Note 1 & 3)

900 MB

900 MB

900 MB

HDD (Note 2 & 3)

1.5 GB

1.9 GB

2.1 GB

Windows Server 2008 x86 Sp1 1 GHz 512 MB 900 MB

Recommended requirements:

Platform

1.7 GB

Processor RAM HDD (Note 1 & 3) HDD (Note 2 & 3)

Windows XP x86

Windows 7 x86

1 GHz

1 GHz

Windows 7 x64 1 GHz

Windows Server 2008 x86 Sp1 1 GHz

1 GB

2 GB

4 GB

4 GB

900 MB

900 MB

900 MB

900 MB

1.5 GB

1.9 GB

2.1 GB

1.7 GB

Note 1

Note 2

Note 3

Operating system with Windows Updates updated on 2015/05.

Operating system without Windows Updates installed.

Both configurations do not include Data Models HDD requirements. Data

Models typically need from 1 GB to 15 GB of hard disk space.

Screen resolution for minimum requirements: Super VGA (800 x 600).

Screen resolution for recommended requirements: XGA (1024x768) and higher.

Easergy Studio (MiCOM S1 Studio) must be started with Administrator privileges.

P54x/EN GS/Nd5 Page (GS) 3-27

(GS) 3 Getting Started Easergy Studio (MiCOM S1 Studio) Communications Basics

Easergy Studio (MiCOM S1 Studio) Additional components

The following components are required to run Easergy Studio (MiCOM S1 Studio) and are installed by its installation package.

Component Type

Package

Package

Package

Package

Package

Package

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Merge modules

Component

.NET Framework 2.0 SP 1 (x64)

.NET Framework 2.0 SP 1 (x86)

.NET Framework 4.0 Client (x64)

.NET Framework 4.0 Client (x86)

Visual C++ 2005 SP1 Redistributable Package (x86)

Visual C++ 2008 SP1 Redistributable Package (x86)

DAO 3.50

MFC 6.0

MFC Unicode 6.0

Microsoft C Runtime Library 6.0

Microsoft C++ Runtime Library 6.0

Microsoft Component Category Manager Library

Microsoft Data Access Components 2.8 (English)

Microsoft Jet Database Engine 3.51 (English)

Microsoft OLE 2.40 for Windows NT and Windows 95

Microsoft Visual Basic Virtual Machine 6.0

MSXML 4.0 - Windows 9x and later

MSXML 4.0 - Windows XP and later

Visual C++ 8.0 MFC (x86) WinSXS MSM

Visual C++ 8.0 MFC.Policy (x86) WinSXS MSM

Page (GS) 3-28 P54x/EN GS/Nd5

Easergy Studio (MiCOM S1 Studio) Communications Basics

8.2

8.3

(GS) 3 Getting Started

Connecting to the Relay using Easergy Studio (MiCOM S1 Studio)

This section is a quick start guide to using Easergy Studio (MiCOM S1 Studio) and assumes this is installed on your PC. See the Easergy Studio (MiCOM S1 Studio) program online help for more detailed information.

1. Make sure the EIA(RS)232 serial cable is properly connected between the port on the front panel of the relay and the PC.

2. To start MiCOM S1 Studio, select Programs > Schneider Electric > MiCOM S1

Studio > MiCOM S1 Studio .

3. Click the Quick Connect tab and select Create a New System .

4. Check the Path to System file is correct, then enter the name of the system in the

Name field. To add a description of the system, use the Comment field.

5. Click OK .

6. Select the device type.

7. Select the communications port, and open a connection with the device.

8. Once connected, select the language for the settings file, the device name, then click Finish . The configuration is updated.

9. In the Studio Explorer window, select Device > Supervise Device … to control the relay directly. (User Login necessary)

Off-Line Use of Easergy Studio (MiCOM S1 Studio)

Easergy Studio (MiCOM S1 Studio) can also be used as an off-line tool to prepare settings, without access to the relay.

1. If creating a new system, in the Studio Explorer, select create new system. Then right-click the new system and select New substation .

2. Right-click the new substation and select New voltage level .

3. Then right-click the new voltage level and select New bay .

4. Then right-click the new bay and select New device .

You can add a device at any level, whether it is a system, substation, voltage or bay.

5. Select a device type from the list, then enter the relay type. Click Next .

6. Enter the full model number and click Next .

7. Select the Language and Model , then click Next .

8. Enter a unique device name, then click Finish .

9. Right-click the Settings folder and select New File . A default file 000 is added.

10. Right-click file 000 and select click Open . You can then edit the settings. See the

MiCOM S1 Studio program online help for more information.

P54x/EN GS/Nd5 Page (GS) 3-29

(GS) 3 Getting Started

Notes:

Easergy Studio (MiCOM S1 Studio) Communications Basics

Page (GS) 3-30 P54x/EN GS/Nd5

MiCOM P54x (P543, P544, P545 & P546) (ST) 4 Settings

P54x/EN ST/Nd5

SETTINGS

CHAPTER 4

Page (ST) 4-1

(ST) 4 Settings MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (ST) 4-2 P54x/EN ST/Nd5

Contents (ST) 4 Settings

CONTENTS

Page (ST) 4-

1 Introduction

1.1

1.2

1.3

Making Changes to the Settings

Relay Settings

Default Settings Restore

2 Configuration Settings 8

3 Group Settings

3.1

3.2

3.3

3.4

3.5

Line Parameters

Distance Setup (only for Models with Distance Option)

Distance Elements (only for Models with Distance Option)

Phase Differential

Scheme Logic (Basic and Aided Scheme Logic). Only in Models with

Distance Option

3.14

3.15

3.16

3.17

3.18

3.19

3.6

3.7

3.8

3.9

3.10

3.11

3.12

3.13

Power Swing Blocking (Only in Models with Distance Option)

Phase Overcurrent Protection

Negative Sequence Overcurrent

Broken Conductor

Earth Fault

Aided DEF (only in Models with Distance Option)

Sensitive Earth Fault (SEF)

Residual Overvoltage (Neutral Voltage Displacement)

Thermal Overload

Voltage Protection

Frequency Protection

Independent Rate of Change of Frequency Protection

Circuit Breaker (CB) Fail and Pole Dead Detection Function

3.20

3.21

3.22

3.23

3.24

3.25

3.26

Supervision (VTS, CTS, Inrush Detection, Special Weak Infeed Blocking and Trip Supervision) 56

System Checks (Check Sync. Function)

Auto-Reclose Function

62

68

Input Labels

Output Labels

DR Chan Labels

EIA(RS)232 InterMiCOM Communications

79

80

82

88

EIA(RS)232 InterMiCOM Conf 56/64 kbit/s Fiber Teleprotection –

InterMiCOM 64 90

48

48

49

52

53

54

40

41

44

45

28

34

36

39

12

12

15

20

25

4 Control and Support Settings

4.1

System Data

7

7

7

7

93

93

P54x/EN ST/Nd5 Page (ST) 4-3

(ST) 4 Settings

4.13

4.14

4.15

4.16

4.17

4.18

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

4.10

4.11

4.12

Circuit Breaker Control

Date and Time

CT/VT Ratios

Record Control

Disturbance Recorder Settings (Oscillography)

Measurements

Communications Settings

Commissioning Tests

Circuit Breaker Condition Monitor Setup

Opto Configuration

Control Inputs

Control Input Configuration

Function Keys

IED Configurator (for IEC 61850 Configuration)

56/64 kbit/s Fiber Teleprotection - InterMiCOM

64

Control Input Labels

Direct Access (Breaker Control and Hotkeys)

TABLES

Table 1 - Configuration settings

Table 2 - Line parameters

Table 3 - Group x distance setup

Table 4 - Group x distance elements

Table 5 - Group x phase diff

Table 6 - Group x scheme logic

Table 7 - Group x power swing blk

Table 8 - Phase overcurrent protection

Table 9 - Negative sequence overcurrent

Table 10 - Broken conductor

Table 11 - Earth fault

Table 12 - Group x aided DEF

Table 13 - Sensitive earth fault

Table 14 - Residual overvoltage (neutral voltage displacement)

Table 15 - Thermal overload

Table 16 - Voltage protection

Table 17 - Frequency protection

Table 18 - DF/DT protection

Table 19 - Circuit breaker fail and pole dead detection function

Table 20 - Supervision

Page (ST) 4-4

Page (ST) 4-

49

51

53

54

56

62

44

45

47

48

36

38

40

41

11

15

20

25

28

34

P54x/EN ST/Nd5

140

144

147

148

154

157

96

100

102

104

110

121

122

126

131

134

137

Tables

Table 21 - System checks (check sync. function)

Table 22 - Auto-reclose function

Table 23 - Input labels

Table 24 - Output labels

Table 25 – DR Chan labels

Table 26 - InterMiCOM comms

Table 27 - INTERMiCOM conf

Table 28 - System data

Table 29 - Circuit breaker control

Table 30 - Date and time

Table 31 - CT/VT ratios

Table 32 - Record control

Table 33 - Disturbance recorder

Table 34 - Measurements

Table 35 - Communications settings

Table 36 - Commissioning tests

Table 37 - Circuit breaker condition monitor setup

Table 38 - Opto configuration

Table 39 - Control inputs

Table 40 - Control input configuration

Table 41 - Function keys

Table 42 - IED configurator (for IEC 61850 configuration)

Table 43 - Prot comms/IM64

Table 44 - Control input labels

Table 45 - Direct access (breaker control and “hotkeys”)

(ST) 4 Settings

110

111

122

126

131

134

137

140

144

146

148

154

154

157

82

90

92

96

68

78

80

82

100

102

104

P54x/EN ST/Nd5 Page (ST) 4-5

(ST) 4 Settings

Notes:

Introduction

Page (ST) 4-6 P54x/EN ST/Nd5

Introduction

1

1.1

1.2

1.3

(ST) 4 Settings

INTRODUCTION

Making Changes to the Settings

The relay is supplied with a factory-set configuration of default settings. Before being put into service, it must be configured to the system and the application by means of appropriate settings.

Because of the complex functionality of the device, it contains a large number of settings.

These settings are arranged in a menu structure to facilitate clarity of presentation. The ways in which individual settings can be changed is described in the Getting Started section of this manual.

When configuring the functionality to the system application, the structure of the settings can be considered in three parts:

Configuration Settings

Group Settings

Control and Support Settings

The sequence in which the settings are listed and described in this chapter reflects this structure.

Relay Settings

The IED is a multi-function device that supports numerous different control and communication features. The settings associated with any function that is disabled are made invisible; i.e. they are not shown in the menu. To disable a function change the relevant cell in the ‘ Configuration’ column from ‘ Enabled’ to ‘ Disabled’ .

To simplify the setting of the IED, there is a configuration settings column, used to enable or disable many of the IED functions. The aim of the configuration column is to allow general configuration from a single point in the menu.

The configuration column controls which of the four settings groups is selected as active through the ‘ Active settings ’ cell. A setting group can also be disabled in the configuration column, provided it is not the present active group. Similarly, a disabled setting group cannot be set as the active group.

The column also allows all of the setting values in one group of settings to be copied to another group.

To do this firstly set the ‘ Copy from ’ cell to the setting group to be copied, then set the

‘ Copy to ’ cell to the group where the copy is to be placed. The copied settings are initially placed in the temporary scratchpad, and will only be used by the IED following confirmation.

Default Settings Restore

To restore the default values to the settings in any protection settings group, set the

‘restore defaults’ cell to the relevant group number. Alternatively it is possible to set the

‘restore defaults’ cell to ‘all settings’ to restore the default values to all of the IEDs settings, not just the protection groups’ settings. The default settings will initially be placed in the scratchpad and will only be used by the IED after they have been confirmed.

Note Restoring defaults to all settings includes the rear communication port settings, which may result in communication via the rear port being disrupted if the new (default) settings do not match those of the master station.

P54x/EN ST/Nd5 Page (ST) 4-7

(ST) 4 Settings Configuration Settings

2 CONFIGURATION SETTINGS

MENU TEXT

To simplify the setting of the relay, there is a configuration settings column which is used to enable or disable many of the functions. If a function is disabled, the settings associated with that function are not shown in the menu. To disable a function, change the relevant cell in the Configuration column from Enabled to Disabled.

The Active settings cell of the configuration column controls which of the application setting groups is used by the relay.

The configuration column can also be used to copy the contents of one of the setting

Groups to that of another Group.

To do this, firstly set the Copy from cell to the protection setting group to be copied, then set the copy to cell to the protection group where the copy is to be placed. The copied settings are initially placed in the temporary scratchpad, and will only be used by the IED following confirmation.

The settings of the configuration column are detailed below.

Col Row Default Setting Available Setting

Description

CONFIGURATION 9 0 0

This column contains all the general configuration options

Restore Defaults 9 1 No Operation

0 = No Operation,

1 = All Settings,

2 = Setting Group 1,

3 = Setting Group 2,

4 = Setting Group 3,

5 = Setting Group 4

Setting to restore a setting group to factory default settings.

To restore the default values to the settings in any Group settings, set the ‘restore defaults’ cell to the relevant Group number.

Alternatively it is possible to set the ‘restore defaults’ cell to ‘all settings’ to restore the default values to all of the IED’s settings, not just the Group settings.

The default settings will initially be placed in the scratchpad and will only be used by the relay after they have been confirmed by the user.

Note: Restoring defaults to all settings includes the rear communication port settings, which may result in communication via the rear port being disrupted if the new (default) settings do not match those of the master station.

Setting Group 9 2 Select via Menu

Allows setting group changes to be initiated via Opto Input or via Menu

0 = Select via Menu or 1 = Select via PSL

Active Settings 9 3 Group 1

0 = Group 1,

1 = Group 2,

2 = Group 3,

3 = Group 4

Selects the active setting group.

Save Changes 9 4 No Operation 0 = No Operation, 1 = Save, 2 = Abort

Saves all relay settings.

Copy From 9 5 Group 1

0 = Group 1,

1 = Group 2,

2 = Group 3,

3 = Group 4

Allows displayed settings to be copied from a selected setting group

Copy To 9 6 No Operation

0 = No Operation, 1 = Group 1, 2 = Group 2,

3 = Group 3

Allows displayed settings to be copied to a selected setting group (ready to paste).

Setting Group 1 9 7 Enabled 0 = Disabled or 1 = Enabled

Page (ST) 4-8 P54x/EN ST/Nd5

Configuration Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Settings Group 1. If the setting group is disabled from the configuration, then all associated settings and signals are hidden, with the exception of this setting (paste).

Setting Group 2 9 8 Disabled 0 = Disabled or 1 = Enabled

Settings Group 2. If the setting group is disabled from the configuration, then all associated settings and signals are hidden, with the exception of this setting (paste).

Setting Group 3 9 9 Disabled 0 = Disabled or 1 = Enabled

Settings Group 3. If the setting group is disabled from the configuration, then all associated settings and signals are hidden, with the exception of this setting (paste).

Setting Group 4 9 0A Disabled 0 = Disabled or 1 = Enabled

Settings Group 4. If the setting group is disabled from the configuration, then all associated settings and signals are hidden, with the exception of this setting (paste).

Distance 9 0B Enabled 0 = Disabled or 1 = Enabled

Only in models with Distance option. To enable (activate) or disable (turn off) the Distance Protection: ANSI 21P/21G.

Directional E/F 9 0C Enabled 0 = Disabled or 1 = Enabled

Only in models with Distance option. To enable (activate) or disable (turn off) the Directional Earth Fault (DEF) Protection used in a pilot aided scheme: ANSI 67N.

This protection is independent from back up Earth fault protection described below.

Phase Diff 9 0F Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Differential Protection: ANSI 87.

To get the differential protection fully active, it is necessary also to enable the differential protection in the group. Note that

Phase Diff setting and InterMiCOM64 Fiber setting are mutually exclusive as with Phase Diff enabled, the digital message exchanged has the structure of the differential message (i.e. currents are sent to the remote end, etc) and with interMiCOM64

Fiber the digital message exchanged has the structure and properties of the InterMiCOM64 Fiber.

Overcurrent 9 10 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Phase Overcurrent Protection function. I> stages: ANSI 50/51/67P

Neg Sequence O/C 9 11 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Negative Sequence Overcurrent Protection function. I2> stages: ANSI 46/67

Broken Conductor 9 12 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Broken Conductor function. I2/I1> stage: ANSI 46BC

Earth Fault 9 13 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the back up Earth Fault Protection function. IN >stages: ANSI 50/51/67N

SEF/REF Prot'n 9 15 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Sensitive Earth Fault/Restricted Earth fault Protection function.

ISEF >stages: ANSI 50/51/67N. IREF>stage: ANSI 64.

Residual O/V NVD 9 16 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Residual Overvoltage Protection function. VN>stages: ANSI 59N

Thermal Overload 9 17 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Thermal Overload Protection function. ANSI 49.

PowerSwing Block 9 18 Enabled 0 = Disabled or 1 = Enabled

Only in models with Distance option. To enable (activate) or disable (turn off) the power swing blocking/out of step: ANSI 68/78.

Volt Protection 9 1D Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Voltage Protection (under/overvoltage) function. V<, V> stages: ANSI 27/59.

Freq Protection 9 1E Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Frequency Protection (under/over frequency) function. F<, F> stages: ANSI 81O/U. df/dt Protection 9 1F Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Rate of change of Frequency Protection function. df/dt> stages: ANSI 81R.

CB Fail 9 20 Disabled 0 = Disabled or 1 = Enabled

P54x/EN ST/Nd5 Page (ST) 4-9

(ST) 4 Settings Configuration Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

To enable (activate) or disable (turn off) the Circuit Breaker Fail Protection function. ANSI 50BF.

Supervision 9 21 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Supervision (VTS, CTS, Inrush detection, WI blocking and Trip Supervision) functions.

System Checks 9 23 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the System Checks (Check Sync. and Voltage Monitor) function: ANSI 25.

Auto-Reclose 9 24 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Auto-reclose function. ANSI 79.

Input Labels 9 25 Visible

Sets the Input Labels menu visible further on in the relay settings menu.

Output Labels 9 26 Visible

Sets the Output Labels menu visible further on in the relay settings menu.

CT & VT Ratios 9 28 Visible

0 = Invisible or 1 = Visible

0 = Invisible or 1 = Visible

0 = Invisible or 1 = Visible

Sets the Current & Voltage Transformer Ratios menu visible further on in the relay settings menu.

Record Control 9 29 Visible 0 = Invisible or 1 = Visible

Sets the Record Control menu visible further on in the relay settings menu.

Disturb Recorder 9 2A Visible 0 = Invisible or 1 = Visible

Sets the Disturbance Recorder menu visible further on in the relay settings menu.

Measure't Setup 9 2B Visible 0 = Invisible or 1 = Visible

Sets the Measurement Setup menu visible further on in the relay settings menu.

Comms Settings 9 2C Visible 0 = Invisible or 1 = Visible

Sets the Communications Settings menu visible further on in the relay settings menu. These are the settings associated with the 2nd rear communications ports.

Commission Tests 9 2D Visible 0 = Invisible or 1 = Visible

Sets the Commissioning Tests menu visible further on in the relay settings menu.

Setting Values 9 2E Primary 0 = Primary or 1 = Secondary

This affects all protection settings that are dependent upon CT and VT ratios. All subsequent settings input must be based in terms of this reference.

Control Inputs 9 2F Visible 0 = Invisible or 1 = Visible

Activates the Control Input status and operation menu further on in the relay setting menu.

Control I/P Config 9 35 Visible 0 = Invisible or 1 = Visible

Sets the Control Input Configuration menu visible further on in the relay setting menu.

Ctrl I/P Labels 9 36 Visible

Sets the Control Input Labels menu visible further on in the relay setting menu.

0 = Invisible or 1 = Visible

Direct Access 9 39 Enabled

0= Disabled, 1 = Enabled, 2 = Hotkey only, or

3 = CB Ctrl Only

Defines what CB control direct access is allowed. The front direct access keys that are used as a short cut function of the menu may be:

Disabled – No function visible on the LCD.

Enabled – All control functions mapped to the Hotkeys and Control Trip/Close are available.

Hotkey Only – Only control functions mapped to the Hotkeys are available on the LCD.

CB Ctrl Only – Only Control Trip/Control Close command will appear on the relay’s LCD.

InterMiCOM 64 9 41 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) InterMiCOM64 (integrated 56/64kbit/s teleprotection). Note that Phase Diff setting and

InterMiCOM64 Fiber setting are mutually exclusive as with Phase Diff enabled, the digital message exchanged has the structure of the differential message (i.e. currents are sent to the remote end, etc) and with InterMiCOM64 Fiber the digital message exchanged has the structure and properties of the InterMiCOM64 Fiber.

Page (ST) 4-10 P54x/EN ST/Nd5

Configuration Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Function Key 9 50 Visible

Sets the Function Key menu visible further on in the relay setting menu.

VIR I/P Labels 9 70 Visible

VIR I/P Labels Visible/Invisible

VIR O/P Labels 9 80

VIR O/P Labels Visible/Invisible

USR ALARM

LABELS

9 90

USR Alarm Labels Visible/Invisible

RP1 Read Only 9 FB

Visible

Visible

Disabled

To enable (activate) or disable (turn off) Read Only Mode of Rear Port 1.

RP2 Read Only 9 FC Disabled

To enable (activate) or disable (turn off) Read Only Mode of Rear Port 2.

Available Setting

0 = Invisible or 1 = Visible

0 = Invisible or 1 = Visible

0 = Invisible or 1 = Visible

0 = Invisible or 1 = Visible

0 = Disabled or 1 = Enabled

0 = Disabled or 1 = Enabled

NIC Read Only 9 FD Disabled 0 = Disabled or 1 = Enabled

Ethernet versions only. To enable (activate) or disable (turn off) Read Only Mode of Network Interface Card.

LCD Contrast 9

Sets the LCD contrast.

FF 11 0 to 31 step 1

Table 1 - Configuration settings

P54x/EN ST/Nd5 Page (ST) 4-11

(ST) 4 Settings Group Settings

3 GROUP SETTINGS

The relay has four application settings groups to enable adaptive behaviour to changing system conditions. The Group settings contain the settings associated with the main application functions and include the following items that become active once enabled in the configuration column of the relay menu database:

Protection element settings

Programmable Scheme Logic (PSL) settings

Auto-reclose and check synchronization settings

Fault locator settings.

Those setting cells that are enabled in the configuration column are visible in each Group setting. One group of settings is selected as the active group, and those Group settings are then used by the appropriate application elements.

The settings for group 1 are described below. The settings are discussed in the same order in which they are displayed in the menu.

3.1 Line Parameters

MENU TEXT

The column GROUP x LINE PARAMETERS is used to enter the characteristics of the protected line or cable. These settings are used by the fault locator as the base data for input to the distance to fault algorithm, and also as the reference for all distance zones when the Distance set up is preferred in the ‘ Simple ’ setting mode. It also accommodates the system phase rotation (phase sequence) and defines the single or three pole tripping mode.

Col Row Default Setting Available Setting

Description

GROUP 1 LINE

PARAMETERS

This column contains settings for Line Parameters

Line Length (km)

30

30

0

1

0

100 0.3 to 1000 step 0.010

Setting of the protected line/cable length in km. This setting is available if MEASURE’T SETUP column is selected as ‘Visible’ in the CONFIGURATION column and if ‘Distance unit’ in the MEASURE’T SETUP column is selected as ‘kilometers’.

Line Length (miles) 30 2 62.1 0.2 to 625 step 0.005

Setting of the protected line/cable length in miles. This setting is available if MEASURE’T SETUP column is selected as

‘Visible’ in the CONFIGURATION column and if ‘Distance unit’ in the MEASURE’T SETUP column is selected as ‘miles’. Dual step size is provided, for cables/short lines up to 10 miles the step size is 0.005 miles, 0.01 miles otherwise.

Line Impedance 30 3 10/In

0.05/In to 500/(In*% max. reach zone) step

0.01/In (Ohms)

Setting for protected line/cable positive sequence impedance in either primary or secondary terms, depending on the Setting

Values reference chosen in the CONFIGURATION column. The set value is used for Fault locator, and for all distance zone reaches calculation if ‘Simple’ setting mode under GROUP x DISTANCE SETUP is selected.

Line Angle 30 4 70

°

20

°

to 90

°

step 1

°

Setting of the line angle (line positive sequence impedance angle).

Residual Comp 30 5 1 0 to 10 step 0.01

Setting of the residual compensation factor magnitude, used to extend the ground loop reach by a multiplication factor of (1+ kZN), is calculated as ratio:

│kZN│ = (Z0 – Z1)/3Z1 where,

Z1 = positive sequence impedance for the protected line or cable.

Z0 = zero sequence impedance for the protected line or cable.

This setting is a used for Distance protection (when set to simple mode) . If Distance protection is set to Advanced mode, there are individual settings per Zone in the GROUP x DISTANCE ELEMENTS settings.

Page (ST) 4-12 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Residual Angle 30 6 0

°

-180

°

to 90

°

step 1

°

Setting of the residual compensation factor angle (in degrees) is calculated as:

∠ kZN =

(Z0 – Z1)/3Z1 where,

Z1 = positive sequence impedance for the protected line or cable.

Z0 = zero sequence impedance for the protected line or cable.

This setting is a used for Distance protection (when set to simple mode) . If Distance protection is set to Advanced mode, there are individual settings per Zone in the GROUP x DISTANCE ELEMENTS settings.

Mutual Comp 30 7 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Mutual compensation replica used in both, Distance and Fault locator ground fault loops.

KZm Mutual Set. 30 8 1 0 to 10 step 0.01

Setting of the mutual compensation factor kZm magnitude is calculated as a ratio:

|kZm| = ZM0/3Z1 where,

ZM0 = zero sequence mutual impedance for the protected line or cable.

Z1 = positive sequence impedance for the protected line or cable.

Setting kZm is visible if ‘Mutual Comp’ is enabled. This setting is a used for fault locator and Distance protection (when set to simple mode) . If Distance protection is set to Advanced mode, there are individual settings per Zone in the GROUP x

DISTANCE ELEMENTS settings.

KZm Mutual Angle 30 9 0

°

-180

°

to 90

°

step 1

°

Setting of the mutual compensation angle (in degrees) is calculated as:

∠ kZm =

ZM0/3Z1

Angle setting

∠ kZm is visible if ‘Mutual Comp’ is enabled. This setting is a used for fault locator and Distance protection (when set to simple mode) . If Distance protection is set to Advanced mode, there are individual settings per Zone in the GROUP x

DISTANCE ELEMENTS settings.

Mutual cut-off (k) 30 0A 0 0 to 2 step 0.1

Only in models with Distance option. Setting used to eliminate the mutual compensation replica in case when the ratio of neutral current of the parallel line to the neutral current of the protective line (IMUTUAL/IN) exceeds the setting. This setting is visible only if ‘Mutual Comp’ is enabled.

Phase Sequence 30 0B Standard ABC 0 = Standard ABC or 1 = Reverse ACB

This setting is used to select whether the 3 phase quantities (V and I) are rotating in the standard ABC sequence, or whether the rotation is in reverse ACB order. The appropriate selection is required to ensure that all derived sequence components and faulted phase flagging/targeting are correct.

Tripping Mode 30 0C 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB1Tripping Mode 30 0C 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2Tripping Mode 30 0E 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

Line Charging Y 30 10 0.002 (units are 1/Ohm) 0*I2 to 0.01*I2 step 0.0001

Setting for protected lines’ total susceptance in either primary or secondary terms, depending on the Setting Values reference chosen in the CONFIGURATION column. The set value is used to calculate the compensated overvoltage if ‘V1>1 Cmp Funct’ setting is enabled under GROUP x VOLT PROTECTION.

Z1 Tripping Mode 30 12 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone 1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

P54x/EN ST/Nd5 Page (ST) 4-13

(ST) 4 Settings Group Settings

MENU TEXT

CB1Z2 Trip Mode

Col

30

Row

13 3 Pole

Default Setting

Description

Available Setting

CB1Z1 Trip Mode 30 12 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone1 CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

Z2 Tripping Mode 30 13 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone 2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone2 CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

Z3 Tripping Mode 30 14 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone 2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB1Z3 Trip Mode 30 14 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone3 CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

Z4 Tripping Mode 30 15 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone 4. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB1Z4 Trip Mode 30 15 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone4 CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

ZP Tripping Mode 30 16 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone P. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB1ZP Trip Mode 30 16 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zoneP CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

ZQ Tripping Mode 30 17 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zoneQ. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB1ZQ Trip Mode 30 17 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zoneQ CB1. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2Z1 Trip Mode 30 20 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone1 CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2Z2 Trip Mode 30 21 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

Page (ST) 4-14 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

This setting is used to select the tripping mode for zone2 CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2Z3 Trip Mode 30 22 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone2 CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2Z4 Trip Mode 30 23 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone4 CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2ZP Trip Mode 30 24 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone P CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

CB2ZQ Trip Mode 30 25 3 Pole

0 = 3 Pole,

1 = 1 and 3 Pole

This setting is used to select the tripping mode for zone Q CB2. The selection 1 and 3 pole allows single pole tripping for single phase to ground faults, whilst selection 3 pole converts any trip command(s) to three pole tripping.

Table 2 - Line parameters

3.2 Distance Setup (only for Models with Distance Option)

MENU TEXT

The column GROUP x DISTANCE SETUP ” is used to:

Select the Distance setting mode (Simple or Advanced)

Select the operating characteristic (Mho or Quad) for phase and ground measuring loops independently

Enable or Disable each phase and ground zone independently

Define the reach (in Ohms) for each phase and ground zone independently by simply setting the percentage required reach with reference to the line impedance

(taken as the 100% reference basis)

Other settings related to application of the “Basic” distance scheme

Col Row Default Setting Available Setting

Description

GROUP 1 DISTANCE

SETUP

31 0 0

This column contains settings for Distance Setup

Setting Mode 31 0C Simple 0 = Simple or 1 = Advanced

P54x/EN ST/Nd5 Page (ST) 4-15

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting to select setting mode for Distance protection, depending on type of application and user preferences.

‘Simple’ mode:

‘Simple’ setting mode is the default setting mode, suitable for the majority of applications. Instead of entering distance zone impedance reaches in ohms, zone settings are simply entered in terms of percentage of the protected line data specified in the

‘GROUP x LINE PARAMETERS/Line Impedance’ setting. The setting assumes that the residual compensation factor is equal for all zones. The relay auto calculates the required reaches from the percentages. The calculated zone reaches are available for viewing but a user can not alter/change the value as long as ‘Simple’ mode setting remains active.

Advanced setting mode:

‘Advanced’ setting mode allows individual distance ohmic reaches and residual compensation factors to be entered for each zone. When ‘Advanced’ mode is selected, all ‘percentage’ settings that are associated to ‘Simple’ setting mode in the column

GROUP x DISTANCE SETUP will be hidden and the Distance zone settings need to be entered for each zone in the ‘GROUP x

DIST. ELEMENTS’ column.

Distance Setup 31 0D Zone Start 0 = Zone Start or 1 = Gen Start

Setting to control the zone timer starting. For 'Zone start' each zone dedicated timer will start individually with the apparent impedance measured inside the zone boundaries. This is default and the only setting before firmware H4. With 'Gen Start' all zone timers will be started together with the apparent impedance measured in the first one active zone.

PHASE DISTANCE 31 10 0

Phase Chars. 31 11 Mho 0 = Disabled, 1 = Mho, 2 = Quadrilateral

Setting to disable (turn off) phase distance protection or to set Mho or Quad operating characteristic: ANSI 21P.

The chosen setting is applicable to all phase distance zones.

Quad Resistance 31 12 Proportional 0 = Common or 1 = Proportional

Setting to define the mode of resistive reach coverage. If ‘Common’ mode is selected, all phase distance zones will have the equal resistive coverage. If ‘Proportional’ mode is selected, the zones will have resistive coverage according to the % reach set for the zone, multiplied by the ‘Fault Resistance’ RPH setting.

This setting is visible only when ‘Simple’ setting mode and quad characteristic are set.

Fault Resistance 31 13 10

Ω 0.1/In Ω to 500/In Ω step 0.01/In Ω

Setting used to specify the fault arc resistance that can be detected for faults between phases. The set value determines the right hand side of the quadrilaterals.

This setting is visible only when ‘Simple’ setting mode and quad characteristic are set.

Zone 1 Ph Status 31 20 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Z1 for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone 1 Ph Reach% 31 21 80% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone 1 reach in ohms.

Zone 2 Ph Status 31 30 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Z2 for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone 2 Ph Reach% 31 31 150%

Setting entry as percentage of the line impedance that sets Zone 2 reach in ohms.

10 to 1000 step 1

Zone 3 Ph Status 31 40 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Z3 for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone 3 Ph Reach% 31 41 250% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone 3 forward reach in ohms.

Zone 3 Ph Offset 31 42 Enabled 0 = Disabled or 1 = Enabled

Page (ST) 4-16 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 3 offset reach for phase faults.

By default, Z3 Mho phase characteristic is offset (partly reverse directional), thus not memory/cross polarized. ‘If Z3 Gnd Offset’ is disabled, Z3 Mho characteristic becomes memory/cross polarized like all other zones.

Z3Ph Rev Reach% 31 43 10% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone 3 reverse reach in ohms.

Zone P Ph Status 31 50 Disabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

ZP for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone P Ph Dir. 31 51 Forward

To directionalize Zone P forward or reverse.

0 = Forward or 1 = Reverse

Zone P Ph Reach% 31 52 200% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone P forward or reverse reach in ohms.

Zone 4 Ph Status 31 60 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Z4 for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone 4 Ph Reach% 31 61 150% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets reverse Zone 4 reach in ohms.

Zone Q Ph Status 31 65 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

ZQ for phase faults.

This setting is invisible if ‘Phase Char.’ is disabled.

Zone Q Ph Dir. 31 66 Reverse

To directionalize Zone Q forward or reverse.

0 = Forward or 1 = Reverse

Zone Q Ph Reach% 31 67 200% 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets reverse Zone Q reach in ohms.

GROUND DISTANCE 31

Ground Chars. 31

70

71 Mho 0 = Disabled, 1 = Mho, 2 = Quadrilateral

Setting to disable (turn off) ground distance protection or to set Mho or Quad operating characteristic: ANSI 21G.

The chosen setting is applicable to all ground distance zones.

Quad Resistance 31 72 Proportional 0 = Common or 1 = Proportional

Setting to define the mode of resistive reach coverage. If ‘Common’ mode is selected, all ground distance zones will have the equal resistive coverage. If ‘Proportional’ mode is selected, the zones will have resistive coverage according to the % reach set for the zone, multiplied by the ‘Fault Resistance’ RG setting.

This setting is visible only when ‘Simple’ setting mode and quad characteristic are set.

Fault Resistance 31 73 10

0.1/In Ω to 500/In Ω step 0.01/In Ω

Setting used to specify the fault arc resistance that can be detected for faults phase - ground. The set value determines the right hand side of the quadrilaterals.

This setting is visible only when ‘Simple’ setting mode and quad characteristic are set.

Dynamic Top Tilt 31 75 45 0

Maximum angle setting can reach to allow operation by tilting dynmically of phase - ground quadrelateral characterestic. This setting is visible only when ‘Simple’ setting mode and quad characteristic are set

Zone1 Gnd Status 31 80 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

P54x/EN ST/Nd5 Page (ST) 4-17

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 1 for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

Zone1 Gnd Reach 31 81 80

Setting entry as percentage of the line impedance that sets Zone 1 reach in ohms.

10 to 1000 step 1

Zone2 Gnd Status 31 90 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 2 for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

Zone2 Gnd Reach 31 91 150

Setting entry as percentage of the line impedance that sets Zone 2 reach in ohms.

10 to 1000 step 1

Zone3 Gnd Status 31 A0 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 3 for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

Zone3 Gnd Reach 31 A1 250 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone 3 forward reach in ohms.

Zone3 Gnd Offset 31 A2 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 3 offset reach for ground faults.

By default, Z3 Mho ground characteristic is offset (partly reverse directional), thus not memory/cross polarized. ‘If Z3 Gnd

Offset’ is disabled, Z3 Mho characteristic becomes memory/cross polarized like all other zones.

Z3Gnd Rev Reach 31 A3 10 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone 3 reverse reach in ohms.

ZoneP Gnd Status 31 B0 Disabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone P for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

ZoneP Gnd Direction 31 B1

To directionalize ZP forward or reverse.

Forward

ZoneP Gnd Reach 31 B2 200

0 = Forward or 1 = Reverse

10 to 1000 step 1

Setting entry as percentage of the line impedance that sets Zone P forward or reverse reach in ohms.

Zone4 Gnd Status 31 C0 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone 4 for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

Zone4 Gnd Reach 31 C1 150 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets reverse Zone 4 reach in ohms.

ZoneQ Gnd Status 31 C5 Enabled

0 = Disabled or 1 = Enabled, 2 = Enabled on

Ch Fail

To enable (activate) or disable (turn off) or enable (only in the case that differential protection communication channel is lost)

Zone Q for ground faults.

This setting is invisible if ‘Ground Char.’ is disabled.

ZoneQ Gnd Direction 31 C6 Reverse 0 = Forward or 1 = Reverse

To directionalize ZQ forward or reverse.

Page (ST) 4-18 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

ZoneQ Gnd Reach 31 C7 200 10 to 1000 step 1

Setting entry as percentage of the line impedance that sets reverse Zone Q reach in ohms.

Digital Filter 31 D0 Standard 0 = Standard or 1 = Special Applics.

Setting to enable (activate) ‘Standard’ or ‘Special Application’ filters. ‘Standard’ filters are the default setting and should be applied in the majority of applications. It is only the case when the fault currents and voltages may become very distorted by non-fundamental harmonics that extra filtering is necessary to avoid transient over-reach. In such system conditions the

‘Special Applications’ setting should be applied.

CVT Filters 31 D1 Disabled 0 = Disabled, 1 = Passive, 2 = Active

Setting that accommodates the type of voltage transformer being used to prevent transient over-reach and preserve sub-cycle operating time whenever possible.

In case of conventional wound VTs, the transients due to voltage collapse during faults are very small and no extra filtering is required, therefore the setting should be ‘Disabled’ as per default.

For a CVT with active Ferro resonance damping, the voltage distortions may be severe and risk transient over-reach. For that reason, the ‘CVT Filters’ should be set to ‘Active’. Trip times increase proportionally (subcycle up to SIR = 2, gradually lengthening for SIR up to 30).

For a CVT with passive Ferro resonance damping, the voltage distortions are generally small up to SIR of 30. For such applications, ‘CVT Filters’ should be set ‘Passive’. The relay calculates the SIR and will take marginally longer to trip if the infeed is weak (exceeds the relay’s SIR setting).

SIR Setting 31 D2 30 5 to 60 step 1

Setting that determines when extra filtering will be applied. If on fault inception the calculated SIR exceeds the ‘SIR Setting’ the relay will marginally slow down, as otherwise there would be a risk of over-reach.

This setting is visible only when ‘CVT Filters’ is set to ‘Passive’.

Load Blinders 31 D3 Disabled 0 = Disabled or 1 = Enabled

Setting used to activate (enable) or turn off (disable) load blinders.

Load blinders, when enabled, have two main purposes: to prevent tripping due to load encroachment under heavy load condition and detect very slow moving power swings.

Z< Blinder Imp 31 D4 15

Ω 0.1/In Ω to 500/In Ω step 0.01/In Ω

Setting of radius of under-impedance circle.

Load/B Angle 31 D5 45

°

15 to 65 step 1

Angle setting for the two blinder lines boundary with the gradient of the rise or fall with respect to the resistive axis.

Load Blinder V< 31 D6 15 V 1V to 70V step 0.5V

Load blinder phase to ground under-voltage setting that overrides the blinder if the measured voltage in the affected phase falls below setting. Also overrides blinding of phase-phase loops where the phase-phase voltage fall s below √3 x (V< setting).

Distance Polarising 31 D7 1 0.2 to 5 step 0.1

The setting defines the composition of polarizing voltage as a mixture of ‘Self’ and ‘Memory’ polarizing voltage. ‘Self’ polarized voltage is fixed to 1pu and could be mixed with ‘Memory’ polarizing voltage ranging from 0.2pu up to 5pu. The default setting of

1 means that half of the polarizing voltage is made up from ‘Self’ and the other half from clean ‘Memory’ voltage. Adding more

‘Memory’ voltage will enhance the resistive coverage of Mho characteristics, whose expansion is defined as:

Mho expansion = [(Dist. Polarizing)/ (Dist. Polarizing + 1)] x Zs

Where Zs is the source impedance.

DELTADIRECTION

0

31 E0 0

Delta Status 31 E1 Enabled 0 = Disabled or 1 = Enabled

Setting used to enable or disable Delta Direction (∆I/∆V).

To enable or disable the delta direction decision used by distance elements. If disabled, the relay uses conventional (non delta) directional lines.

Delta Char Angle 31 E3 60 0 to 90 step 1

Setting for the relay characteristic angle used for the delta directional decision.

Delta V Fwd 31 E4 5 1V to 30V step 0.1V

Setting for the minimum delta voltage change to permit the directional forward decision.

Delta V Rev 31 E5 4 0.5V to 30V step 0.1V

P54x/EN ST/Nd5 Page (ST) 4-19

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting for the minimum delta voltage change to permit the directional reverse decision.

Delta I Fwd 31 E6 0.1 0.1*In to 10*In step 0.01*In

Setting for the minimum delta current change to permit the directional forward decision.

Delta I Rev 31 E7 0.08 0.05*In to 0*In step 0.01*In

Setting for the minimum delta current change to permit the directional reverse decision.

Table 3 - Group x distance setup

3.3 Distance Elements (only for Models with Distance Option)

MENU TEXT

The column GROUP x DISTANCE ELEMENTS is used to individually set reaches, line angles, neutral compensation factors, minimum current operating levels and line tilting for resistive phase faults for each zone if the setting mode is set to ‘Advanced’. In ‘Simple’ setting mode, ‘Distance Elements’ setting can be viewed , but not edited here.

Col Row Default Setting Available Setting

Description

GROUP 1 DISTANCE

ELEMENTS

32 0 0

This column contains settings for Distance Elements

PHASE DISTANCE 32 1 0

0

Z1 Ph. Reach 32 2 8

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z1 reach.

Z1 Ph. Angle 32 3

Setting of line angle for zone 1.

70 20 to 90 step 1

R1 Ph. Resistive 32 7 8 0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z1 resistive reach. This setting is only visible if Quad is selected.

Z1 Tilt Top Line 32 8 -3 -30 to 30 step 1

Setting of Z1 top reactance line gradient to avoid over-reach for resistive phase faults under heavy load. Minus angle tilts the reactance line downwards.

Z1 Sensit. Iph>1 32 9 0.075 0.05*In to 2*In step 0.005*In

Current sensitivity setting for Z1 that must be exceeded in faulted phases if Z1 is to operate.

Z2 Ph. Reach 32 10 15

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z2 reach.

Z2 Ph. Angle 32 11

Setting of line angle for zone 2.

70 20 to 90 step 1

R2 Ph. Resistive 32

Setting for Z2 resistive reach.

15 15

0.05/In Ω to 500/In Ω step 0.01/In Ω

Z2 Tilt Top Line 32 16 -3 -30 to 30 step 1

Setting of Z2 top reactance line gradient.

Z2 Sensit. Iph>2 32 17 0.075

Zone 2 current sensitivity.

Z3 Ph. Reach 32 20 25

0.05*In to 2*In step 0.005*In

0.05/In Ω to 500/In Ω step 0.01/In Ω

Page (ST) 4-20 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting for Z3 reach.

Z3 Ph. Angle 32 21 70 20 to 90 step 1

Setting of line angle for zone 3.

Z3' Ph Rev Reach 32 22 1

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 offset (reverse) reach. This setting is only visible if ‘Z3 Offset’ is enabled in ‘GROUP x DISTANCE SETUP’.

R3 Ph. Res. Fwd. 32 25 25

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 resistive reach that defines Quad’s right hand line.

R3' Ph. Res. Rev 32 26 1

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 resistive reach that defines Quad’s left hand line. This is settable only if Phase Chars. is Quad and Z3 offset is enabled otherwise is fixed to 25% of the right hand blinder.

-30 to 30 step 1 Z3 Tilt Top Line 32 27 -3

Setting of Z3 top reactance line gradient.

Z3 Sensit. Iph>3 32 28 0.05 0.05*In to 2*In step 0.005*In

Zone 3 current sensitivity.

ZP Ph. Reach 32

Setting for ZP reach.

ZP Ph. Angle 32

30

31

20

70

0.05/In Ω to 500/In Ω step 0.01/In Ω

20 to 90 step 1

Setting of line angle for zone P.

RP Ph Resisitive 32 35

Setting for ZP resistive reach.

ZP Tilt Top Line 32 36

20

0.05/In Ω to 500/In Ω step 0.01/In Ω

-3 -30 to 30 step 1

Setting of ZP top reactance line gradient.

ZP Sensit. Iph>P 32 37 0.05 0.05*In to 2*In step 0.005*In

Zone P current sensitivity.

Z4 Ph. Reach 32 40 15

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z4 reach. This is a common setting for Z4 time delayed and Z4 high speed elements used in blocking schemes and for current reversal guard.

Z4 Ph. Angle 32 41 70 20 to 90 step 1

Setting of line angle for zone 4.

R4 Ph. Resistive 32 42

Setting for ZP resistive reach.

15

Z4 Tilt Top Line 32 45 -3

Setting of Z4 top reactance line gradient.

Z4 Sensit. Iph>4 32 46 0.05

Zone P current sensitivity.

ZQ Ph. Reach 32

Setting for ZQ reach.

ZQ Ph. Angle 32

49

4A

20

70

Setting of line angle for zone Q.

RQ Ph. Resistive 32 4B

Setting for ZQ resistive reach.

ZQ Tilt Top Line 32 4C

20

-3

Setting of ZQ top reactance line gradient.

ZQ Sensit. Iph>Q 32 4D 0.05

0.05/In Ω to 500/In Ω step 0.01/In Ω

-30 to 30 step 1

0.05*In to 2*In step 0.005*In

0.05/In Ω to 500/In Ω step 0.01/In Ω

20 to 90 step 1

0.05/In Ω to 500/In Ω step 0.01/In Ω

-30 to 30 step 1

0.05*In to 2*In step 0.005*In

P54x/EN ST/Nd5 Page (ST) 4-21

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Zone Q current sensitivity.

GROUND DISTANCE 32

Z1 Gnd. Reach

Setting for Z1 reach.

32

50

51 8

0.05/In Ω to 500/In Ω step 0.01/In Ω

Z1 Gnd. Angle 32 52 70

Setting of line angle (positive sequence) for zone 1.

20 to 90 step 1

Z1 Dynamic Tilt 32 53 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables zone 1 top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘Z1 Tilt top line’ angle setting – see the next cell. The zone 1 is allowed only to tilt down. If Dynamic tilting is disabled, the top line will be shifted by the

‘Z1 Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’.

Z1 Tilt Top Line 32 54 -3 -30 to 30 step 1

Setting of the zone 1 tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible.

0 to 10 step 0.01 kZN1 Res. Comp. 32 55 1

Setting of Z1 residual compensation magnitude. kZN1 Res. Angle 32 56 0 -180 to 90 step 0.1

Setting of Z1 residual compensation angle. kZm1 Mut. Comp. 32 57 1

Setting of Z1 mutual compensation magnitude. kZm1 Mut. Angle 32 58 0

0 to 10 step 0.01

-180 to 90 step 0.1

Setting of Z1 mutual compensation angle.

R1 Gnd Resistive 32 59 8

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z1 ground resistive reach. This setting is only visible if Quad is selected.

Z1 Sensit Ignd>1 32 5B 0.075 0.05*In to 2*In step 0.005*In

Current sensitivity setting for Z1 that must be exceeded in faulted phase and the neutral if Z1 is to operate.

Z2 Gnd. Reach 32 60 15

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z2 reach.

Z2 Gnd. Angle 32 61 70

Setting of line angle (positive sequence) for zone 2.

20 to 90 step 1

Z2 Dynamic Tilt 32 63 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables zone 2 top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘Z2 Tilt top line’ angle setting – see the next cell. The zone 2, as over-reaching zone, is allowed only to tilt up. If Dynamic tilting is disabled, the top line will be shifted by the ‘Z2 Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’.

Z2 Tilt Top Line 32 64 -3 -30 to 30 step 1

Setting of the zone 2 tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible.

0 to 10 step 0.01 kZN2 Res. Comp. 32 65 1

Setting of Z2 residual compensation magnitude. kZN2 Res. Angle 32 66 0 -180 to 90 step 0.1

Setting of Z2 residual compensation angle. kZm2 Mut. Comp. 32 67 1

Setting of Z2 mutual compensation magnitude.

0 to 10 step 0.01

Page (ST) 4-22 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting kZm2 Mut. Angle 32 68 0

Setting of Z2 mutual compensation angle.

R2 Gnd Resistive 32 69 15

-180 to 90 step 0.1

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z2 ground resistive reach.

Z2 Sensit Ignd>2 32 6B 0.075 0.05*In to 2*In step 0.005*In

Zone 2 current sensitivity.

Z3 Gnd. Reach 32 70 25

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 reach.

Z3 Gnd. Angle 32 71 70 20 to 90 step 1

Setting of line angle (positive sequence) for zone 3.

Z3' Gnd Rev Rch 32 72 1 0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 offset (reverse) reach. This setting is only visible if ‘Z3 Offset’ is enabled in ‘GROUP x DISTANCE SETUP’.

Z3 Dynamic Tilt 32 73 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables Z3 top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘Z3 Tilt top line’ angle setting – see the next cell. The ZP, as over-reaching zone, is allowed only to tilt up. If Dynamic tilting is disabled, the top line will be shifted by the ‘ZP Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’ and Z3 offset disabled.

Z3 Tilt Top Line 32 74 -3 -30 to 30 step 1

Setting of the Z3 tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible.

0 to 10 step 0.01 kZN3 Res. Comp. 32 75 1

Setting of Z3 residual compensation magnitude. kZN3 Res. Angle 32 76 0 -180 to 90 step 0.1

Setting of Z3 residual compensation angle. kZm3 Mut. Comp. 32 77 1

Setting of Z3 mutual compensation magnitude. kZm3 Mut. Angle 32 78 0 -180 to 90 step 0.1

Setting of Z3 mutual compensation angle.

R3 Gnd. Res. Fwd 32 79 25

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 resistive reach that defines Quad’s right hand line.

R3' Gnd Res. Rev 32 7A 1 0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z3 resistive reach that defines Quad’s left hand line. This is settable only if Ground Chars. is Quad and Z3 offset is enabled otherwise is fixed to 25% of the right hand blinder.

7C 0.05 0.05*In to 2*In step 0.005*In Z3 Sensit Ignd>3 32

Zone 3 current sensitivity.

ZP Gnd. Reach

Setting for ZP reach.

32 80 20

0 to 10 step 0.01

0.05/In Ω to 500/In Ω step 0.01/In Ω

ZP Gnd. Angle 32 81 70

Setting of line angle (positive sequence) for zone P.

20 to 90 step 1

ZP Dynamic Tilt 32 83 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables ZP top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘ZP Tilt top line’ angle setting – see the next cell. The ZP, as over-reaching zone, is allowed only to tilt up. If Dynamic tilting is disabled, the top line will be shifted by the ‘ZP Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’.

P54x/EN ST/Nd5 Page (ST) 4-23

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

ZP Tilt Top Line 32 84 -3 -30 to 30 step 1

Setting of the ZP tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible.

0 to 10 step 0.01 kZNP Res. Comp. 32 85 1

Setting of ZP residual compensation magnitude. kZNP Res. Angle 32 86 0

Setting of ZP residual compensation angle.

-180 to 90 step 0.1 kZmP Mut. Comp. 32 87 1

Setting of ZP mutual compensation magnitude. kZmP Mut. Angle 32 88 0

Setting of ZP mutual compensation angle.

RP Gnd Resistive 32 89 20

Setting for ZP ground resistive reach.

0 to 10 step 0.01

-180 to 90 step 0.1

0.05/In Ω to 500/In Ω step 0.01/In Ω

ZP Sensit Ignd>P

Z4 Gnd. Angle

32

32

8B

91

0.05

70

Setting of line angle (positive sequence) for zone 4.

0.05*In to 2*In step 0.005*In

Zone P current sensitivity.

Z4 Gnd. Reach 32 90 15

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z4 reach. This is a common setting for Z4 time delayed and Z4 high speed elements used in blocking schemes and for current reversal guard.

20 to 90 step 1

Z4 Dynamic Tilt 32 93 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables Z4 top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘Z4 Tilt top line’ angle setting – see the next cell. The Z4, as over-reaching zone, is allowed only to tilt up. If Dynamic tilting is disabled, the top line will be shifted by the ‘Z4 Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’.

Z4 Tilt Top Line 32 94 -3 -30 to 30 step 1

Setting of the Z4 tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible. kZN4 Res. Comp. 32 95 1 0 to 10 step 0.01

Setting of Z4 residual compensation magnitude. kZN4 Res. Angle 32 96 0

Setting of Z4 residual compensation angle. kZm4 Mut. Comp. 32 97 1

-180 to 90 step 0.1

0 to 10 step 0.01

Setting of Z4 mutual compensation magnitude. kZm4 Mut. Angle 32 98 0 -180 to 90 step 0.1

Setting of Z4 mutual compensation angle.

R4 Gnd Resistive 32 99 15 0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for Z4 ground resistive reach.

Z4 Sensit Ignd>4 32 9B 0.05 0.05*In to 2*In step 0.005*In

Zone 4 current sensitivity.

ZQ Gnd. Reach 32 A0 20

0.05/In Ω to 500/In Ω step 0.01/In Ω

Setting for ZQ reach. This is a common setting for ZQ time delayed and ZQ high speed elements used in blocking schemes and for current reversal guard.

ZQ Gnd. Angle 32 A1 70

Setting of line angle (positive sequence) for zone Q.

20 to 90 step 1

Page (ST) 4-24 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

ZQ Dynamic Tilt 32 A3 Enabled 0 = Disabled or 1 = Enabled

Setting that enables or disables ZQ top reactance line dynamic tilting. If set enabled, the top line angle will be automatically shifted by the angle difference between the fault current and negative sequence current, starting from the ‘ZQ Tilt top line’ angle setting – see the next cell. The ZQ, as over-reaching zone, is allowed only to tilt up. If Dynamic tilting is disabled, the top line will be shifted by the ‘ZQ Tilt top line’ setting (Predetermined tilting by fixed angle).

This setting is visible only when ground characteristic is set to ‘Quad’.

ZQ Tilt Top Line 32 A4 -3 -30 to 30 step 1

Setting of the ZQ tilt angle. Minus angle tilts the reactance line downwards This setting is visible only when the above setting is visible. kZNQ Res. Comp. 32 A5 1 0 to 10 step 0.01

Setting of ZQ residual compensation magnitude. kZNQ Res. Angle 32 A6 0

Setting of ZQ residual compensation angle. kZmQ Mut. Comp. 32 A7 1

Setting of ZQ mutual compensation magnitude. kZmQ Mut. Angle 32 A8 0

Setting of ZQ mutual compensation angle.

RQ Gnd Resistive 32 A9

Setting for ZQ ground resistive reach.

20

ZQ Sensit Ignd>Q 32

Zone Q current sensitivity.

AB 0.05

-180 to 90 step 0.1

0 to 10 step 0.01

-180 to 90 step 0.1

0.05/In Ω to 500/In Ω step 0.01/In Ω

0.05*In to 2*In step 0.005*In

Table 4 - Group x distance elements

3.4 Phase Differential

The column “GROUP x PHASE DIFF” is used to:

Select the settings of the phase differential characteristic

Define CT correction factors

Define type of compensation (Capacitive Charging current or phase shift compensation). If charging current is selected, to set the value of susceptance and if phase shift is chosen, to set the value of vector compensation (only models

P543, P544 (H1 software or later), P545 and P546 (H1 software or later))

Enable or Disable inrush restrain in the case of transformers in zone (only models

P543, P544 (H1 software or later), P545 and P546 (H1 software or later))

Set the amount of positive sequence current required for Differential current transformer supervision

The column “GROUP x PHASE DIFF” is invisible if disabled in ‘CONFIGURATION’ column.

Col Row Default Setting Available Setting MENU TEXT

Description

GROUP 1 PHASE

DIFF

33 0 0

This column contains settings for Current Differential

Phase Diff 33 1 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Differential protection function in the group.

P54x/EN ST/Nd5 Page (ST) 4-25

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Phase Is1 33 2 0.2*I1

Setting Visible when Scheme Setup is set to 3 Terminal.

Setting that defines the minimum pick-up level of the relay.

Available Setting

0.2*In to 2*In step 0.01*In

Phase Is2 33 3 2*I1 1*In to 30*In step 0.05*In

Setting Visible when Scheme Setup is set to 3 Terminal.

This setting defines the bias current threshold, above which the higher percentage bias k2 is used.

Phase k1 33 4 30 30 to 150 step 5

Setting Visible when Scheme Setup is set to 3 Terminal.

The lower percentage bias setting used when the bias current is below Is2. This provides stability for small CT mismatches, whilst ensuring good sensitivity to resistive faults under heavy load conditions.

Phase k2 33 5 100 30 to 150 step 5

Setting Visible when Scheme Setup is set to 3 Terminal.

The higher percentage bias setting used to improve relay stability under heavy through fault current conditions.

0.2*In to 2*In step 0.01*In Phase Is1 33 6 0.2*I1

Setting Visible when Scheme Setup is set to 2 Terminal or Dual Redundant.

Setting that defines the minimum pick-up level of the relay.

Phase Is2 33 7 2*I1 1*In to 30*In step 0.05*In

Setting Visible when Scheme Setup is set to 2 Terminal or Dual Redundant.

This setting defines the bias current threshold, above which the higher percentage bias k2 is used.

Phase k1 33 8 30 30 to 150 step 5

Setting Visible when Scheme Setup is set to 2 Terminal or Dual Redundant.

The lower percentage bias setting used when the bias current is below Is2. This provides stability for small CT mismatches, whilst ensuring good sensitivity to resistive faults under heavy load conditions.

Phase k2 33 9 150 30 to 150 step 5

Setting Visible when Scheme Setup is set to 2 Terminal or Dual Redundant.

The higher percentage bias setting used to improve relay stability under heavy through fault current conditions.

Phase Char 33 0A DT

0 = DT, 1 = IEC S Inverse, 2 = IEC V

Inverse, 3 = IEC E Inverse, 4 = UK LT

Inverse, 5 = IEEE M Inverse, 6 = IEEE V

Inverse, 7 = IEEE E Inverse, 8 = US Inverse or 9 = US ST Inverse

Setting for the tripping characteristic for differential protection element.

Phase Time Delay 33 0B 0 0s to 100s step 0.01s

Setting for the time-delay for the definite time setting if selected. The setting is visible only when DT function is selected.

Phase TMS 33 0C 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

Phase Time Dial 33 0D 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves. The Time Dial (TD) is a multiplier on the standard curve equation, in order to achieve the required tripping time. The reference curve is based on TD = 1.

Care: Certain manufacturer's use a mid-range value of TD = 5 or 7, so it may be necessary to divide by 5 or 7 to achieve parity.

PIT Time 33 0E 0.2 0s to 0.2s step 0.005s

This timer is initiated upon receipt of PIT flag in the message. Once this timer elapses, and as long as the current is above of

Is1 setting, the relay closes its three phase differential trip contacts.

Ph CT Corr'tion 33 0F 1 1 to 8 step 0.01

Setting used to compensate CT ratios mismatch between terminals.

Compensation 33 10 None 0 = None, 1 = Cap Charging, 2 = Transformer

Page (ST) 4-26 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting to define type of compensation.

If set to None, Susceptance, Inrush Restraint and Transformer are invisible.

If set to Cap Charging, Susceptance setting becomes visible and Inrush Restraint and Transformer are invisible.

If set to Transformer, Inrush Restraint and Vectorial Comp settings become visible while Susceptance setting is invisible.

Inrush Restraint, Id High Set and Vectorial Comp are only applicable only in relay models P543, P544 (H1 software or later),

P545 and P546 (H1 software or later).

Susceptance 33 11 1e-8*In (1/ Ω) 1e-8*In to 10*In step 1e-8*In

Visible when Compensation is set to Cap Charging. Setting to define the positive sequence susceptance value of the circuit for capacitive charging current compensation

Inrush Restraint

Ih(2) Multiplier

33

33

12

14

Disabled

4

Additional bias = Ih(2) Multiplier * √2 * Ih(2).

0 = Disabled, 1 = Restraint, 2 = Blocking

Only models P543, P544 (H1 sw or later), P545 and P546 (H1 sw or later) when Compensation is set to Transformer.

Setting Restraint (activate), Blocking (Inrush blocking) or Disable (turn off) the additional bias inrush restrain.

If set to Restraint, Ih(2) Multiplier setting becomes visible.

If set to Blocking, Ih(2) %>, Ih(2) CrossBlock and Ih(5) Blocking settings becomes visible and Ih(2) Multiplier setting becomes invisible.

Note: It must be ensure that this function is enabling at each end with the same value to avoid maloperation.

1 to 20 step 0.1

Vectorial Comp 33 15 Yy0 (0 deg)

0 = Yy0 (0°), 1 = Yd1 (-30°),

2 = Yy2 (-60°), 3 = Yd3 (-90°),

4 = Yy4 (-120°), 5 = Yd5 (-150°),

6 = Yy6 (180°), 7 = Yd7 (+150°),

8 = Yy8 (+120°), 9 = Yd9 (+90°),

10 = Yy10 (+60°), 11 = Yd11 (+30°),

12 = Ydy0 (0°), 13 = Ydy6 (180°)

Only in models P543 and P545 when Vectorial Comp is enable. To define the vector compensation to account for phase shift correction and zero sequence current filtering (for transformer applications)

Phase Is1 CTS 33 16 1.2*l1 0.2*In to 4*In step 0.05*In

Setting that defines the minimum pick-up level of the relay when a current transformer supervision CTS is declared

PIT I selection 33 17 Remote 0 = Remote or 1 = Local

Setting that defines the current to be used for the Permissive Intertrip

Ih(2)%> 33 20 15 5 to 50 step 1

If the % of 2nd harmonic in any phase is greater than Ih(2) %> setting, then inrush conditions shall be detected.

Ih(2) CrossBlocking 33 21 Disabled 0 = Disabled or 1 = Enabled

If Ih(2) CrossBlock is set Disabled then independent blocking is used. If enabled then Cross blocking is used.

Ih(5) Blocking 33 27 Disabled 0 = Disabled or 1 = Enabled

Setting to enable 5th harmonic Blocking element. This shall be used to detect overfluxing conditions.

Ih(5)%> 33 28 35 5 to 100 step 1

If the % of 5th harmonic in any phase is greater than Ih(5) %> setting, then overfluxing conditions shall be detected.

Ih(5) CrossBlocking 33 29 Disabled 0 = Disabled or 1 = Enabled

If Ih(5) CrossBlock is set Disabled then independent blocking is used. If enabled then Cross blocking is used.

High Set Status 33 30 Disabled 0 = Disabled or 1 = Enabled

Setting to enable highset differential element. HighSet Status models P543, P545, P544/P546 (Software version H1 or later) when Compensation is set to Transformer and Inrush Restraint is set to Restraint or Blocking.

Id High Set 33 31 4.0*ln 1*In to 32*In step 0.01*In

Only in models P543 and P545 when Inrush Restraint is set to Restrain or Blocking Pick-up setting for high set differential protection

Intertrip CH1 33 32 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Intertrip Channel 1 for sending intertrip signal.

P54x/EN ST/Nd5 Page (ST) 4-27

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Intertrip CH2 33 33 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Intertrip Channel 2 for sending intertrip signal.

O/C release status 33 34 Disabled 0 = Disabled or 1 = Enabled

Setting to enable the conditioning of overcurrent protection

I> release 33 35 1*In 0.08*In to 4*In step 0.01*In

Setting visible when O/C release status enabled. Shows the threshold value of overcurrent. Trip done only when current exceeds this threshold.

0 = Disabled or 1 = Enabled Diff CT Sat Stab 33 40 Disabled

Setting to enable Current Transformer Saturation Stabilisation

Max I load/Inom 33 41 1 1 to 2 step 0.05

Setting visible when Current Transformer Saturation Stabilisation enabled. This setting specifies the “Maximum load current” /

“nominal rated current”. The Current Transformer Saturation Stabilisation feature is active when the measured load current is twice this setting, i.e. 2.0 to 4.0 In.

Table 5 - Group x phase diff

3.5 Scheme Logic (Basic and Aided Scheme Logic).

Only in Models with Distance Option

The column GROUP x SCHEME LOGIC is used to:

Set operating mode and associated timers for each distance zone when distance operates in the Basic scheme

Select aided schemes via one or two available signaling channels

Define operating zones during Trip On Close (TOC)

MENU TEXT Col Row Default Setting

Description

GROUP 1 SCHEME

LOGIC

34 0 0

This column contains settings for Distance Scheme Logic

Available Setting

Zone 1 Tripping 34 8 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone 1 elements will be applied.

Zone 1 Ph Delay 34 9 0

Time delay for Z1 phase element.

Zone 1 Gnd Delay 34 0A 0

Time delay for Z1 ground element.

0s to 10s step 0.01s

0s to 10s step 0.01s

Zone 2 Tripping 34 10 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone 2 elements will be applied.

Zone 2 Ph Delay 34 11 0.2

Time delay for Z2 phase element.

Zone 2 Gnd Delay 34 12

Time delay for Z2 ground element.

0.2

0s to 10s step 0.01s

0s to 10s step 0.01s

Page (ST) 4-28 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Zone 3 Tripping 34 18 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone 3 elements will be applied.

Zone 3 Ph Delay 34 19

Time delay for Z3 phase element.

Zone 3 Gnd Delay 34 1A

Time delay for Z3 ground element.

0.6

0.6

0s to 10s step 0.01s

0s to 10s step 0.01s

Zone P Tripping 34 20 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone P elements will be applied.

Zone P Ph Delay 34 21 0.4

Time delay for ZP phase element.

Zone P Gnd Delay 34 22 0.4

Time delay for ZP ground element.

0s to 10s step 0.01s

0s to 10s step 0.01s

Zone 4 Tripping 34 28 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone 4 elements will be applied.

Zone 4 Ph Delay 34 29 1

Time delay for Z4 phase element.

Zone 4 Gnd Delay 34 2A

Time delay for Z4 ground element.

1

0s to 10s step 0.01s

0s to 10s step 0.01s

Zone Q Tripping 34 30 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select for which types of fault Zone Q elements will be applied.

Zone Q Ph Delay 34 31 1

Time delay for ZQ phase element.

Zone Q Gnd Delay 34 32

Time delay for ZQ ground element.

1

0s to 10s step 0.01s

0s to 10s step 0.01s

Dist tEnd Dir 34 35 Non Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

Setting to select the direction that directional end timer should elpase

ZDir tEnd 34 36 1

Time delay for distance directional end timer

ZNonDir tEnd 34 37 1

Time delay for distance non directional end timer

0s to 10s step 0.01s

0s to 10s step 0.01s

Aided 1 Selection 34 41 Disabled

0 = Disabled,1 = PUR,

2 = PUR Unblocking, 3 = POR,

4 = POR Unblocking, 5 = Blocking 1,

6 = Blocking 2, 7 = Prog. Unblocking,

8 = Programmable

Selection of the generic scheme type for aided channel 1.

Note: POR is equivalent to POTT (permissive overreach transfer trip), PUR is

equivalent to PUTT (permissive underreach transfer trip).

Aided 1 Distance 34 42 Phase And Ground

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select whether distance elements should key the scheme selected as per the previous setting. If set to Disabled, no distance zones interact with this aided scheme, and basic scheme tripping only applies.

P54x/EN ST/Nd5 Page (ST) 4-29

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Aided 1 Dist dly 34 43 0

Trip time delay for Aided 1 Distance schemes.

Aided 1 DEF 34 44 Disabled

0s to 1s step 0.002s

0 = Disabled or 1 = Enabled

Setting to select whether a DEF scheme should be mapped to Aided scheme 1.

(Not applicable where a Permissive Underreaching scheme selection has been made).

Aided 1 DEF dly 34 45

Time delay for Aided 1 DEF tripping.

0 0s to 1s step 0.002s

Aided 1 DEF Trip 34 46 3 Pole 0 = 3 Pole, 1 = 1 and 3 Pole

Setting that defines the tripping mode for Aided 1 DEF.

This setting is visible only if tripping mode under GROUP x LINE PARAMETERS/Trip Mode is set to 1 and 3 pole.

Aided 1 Delta 34 47 Disabled 0 = Disabled or 1 = Enabled

Setting to select whether a Delta directional comparison scheme should be mapped to Aided scheme 1.

(Not applicable where a Permissive Underreaching scheme selection has been made).

Aided1 Delta dly 34 48

Time delay for Aided 1 Delta tripping.

0 0s to 1s step 0.002s

Aided1 DeltaTrip 34 49 3 Pole 0 = 3 Pole, 1 = 1 and 3 Pole

Setting that defines tripping mode for Aided 1 Delta.

This setting is visible only if tripping mode under GROUP x LINE PARAMETERS/ Trip Mode is set to 1 and 3 pole. tReversal Guard 34 4A 0.02 0s to 0.15s step 0.002s

Setting for the current reversal guard timer. Intended to keep stability on a healthy line, whilst breakers open on a faulted parallel line to clear the fault.

This setting is visible only when over-reaching or Blocking schemes are selected.

Unblocking Delay 34 4B 0.05 0s to 0.1s step 0.002s

Time delay after Loss of Guard until unblocking occurs. After the set delay, the relay will respond as though an aided signal has been received from the remote end.

This setting is visible only when PUR Unblocking, POR Unblocking or Programmable Unblocking schemes are chosen.

Send on Trip 34 4C Aided / Z1 0 = Aided / Z1, 1 = Any Trip, 2 = None

Setting that defines the reinforced trip signal for POR Aided 1 scheme.

If selected to: None: No reinforced signal is issued

Aided/Z1: The reinforced signal is issued with aided trip or with Z1 if aided distance scheme is enabled

Any Trip: Signal is reinforced with Any trip (DDB 522)

Weak Infeed 34 50 Disabled 0 = Disabled, 1 = Echo, 2 = Echo and Trip

Setting that defines Aided 1 scheme operation in case of weak infeed conditions, where no protection elements detect the fault at the local end, but an aided channel has been received from the remote end. Setting “Echo” will allow the received signal to be returned to the remote relay, “Trip” will allow local end tripping after a set delay.

WI Single Pole Trip 34 51 Disabled 0 = Disabled or 1 = Enabled

Setting that defines the Weak Infeed tripping mode. When disabled, any WI trip will be converted to a 3 phase trip.

WI V< Threshold

WI Trip Delay

34

34

52

53

45

0.06

Setting for the weak infeed trip time delay.

10V to 70V step 5V

Setting of Weak Infeed level detector. If phase - ground voltage in any phase drops below the threshold and with insufficient phase current for the protection to operate, the end is declared as a weak infeed terminal.

0s to 1s step 0.002s

Custom Send Mask 34 58 1

0 = Z1 Gnd., 1 = Z2 Gnd.,

2 = Z4 Gnd., 3 = Z1 Ph.,

4 = Z2 Ph., 5 = Z4 Ph.,

6 = DEF Fwd., 7 = DEF Rev.,

8 = Dir Comp Fwd., 9 = Dir Comp Rev

Page (ST) 4-30 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col

AIDED SCHEME 2 34

0

Row Default Setting

Description

Available Setting

Logic Settings that determine the element or group of elements that are sending a permissive signal to the other line end. For the signal to be sent, the element must operate and a corresponding bit in the matrix must be set to 1 (High).

The above mapping is part of a custom made Aided 1 scheme, and unlike all other schemes that are factory tested, the customer must take the responsibility for testing and the operation of the scheme.

This setting is visible only if a Programmable or Prog. Unblocking scheme is selected.

Custom Time PU 34 59 0 0s to 1s step 0.002s

Pick up time delay of DDB signal ‘Aid1 CustomT in’, available in the PSL logic. Once the time delay elapses, the DDB signal

‘Aid1 CustomT out’ will become high.

Custom Time DO 34 5A 0 0s to 1s step 0.002s

Drop off time delay of DDB signal ‘Aid1 CustomT in’. Once the time delay elapses, the DDB signal ‘Aid1 CustomT out’ will become low.

Note: The timer is a combined hard coded PU/DO timer for Custom Aided scheme 1.

60 0

Aided 2 Selection 34 61 Disabled

0 = Disabled,1 = PUR,

2 = PUR Unblocking, 3 = POR,

4 = POR Unblocking, 5 = Blocking 1,

6 = Blocking 2, 7 = Prog. Unblocking,

8 = Programmable

Selection of the generic scheme type for aided channel 2.

Note: POR is equivalent to POTT (permissive overreach transfer trip), PUR is

equivalent to PUTT (permissive underreach transfer trip).

Aided 2 Distance 34 62 Disabled

0 = Disabled, 1 = Phase only, 2 = Ground only, 3 = Phase And Ground

Setting to select whether distance elements should key the scheme selected as per the previous setting. If set to Disabled, no distance zones interact with this aided scheme, and basic scheme tripping only applies.

Aided 2 Dist dly 34 63 0.02 0s to 1s step 0.002s

Trip time delay for Aided 2 Distance schemes.

Aided 2 DEF

Aided 2 DEF dly

34

34

64

65

Time delay for Aided 2 DEF tripping.

Enabled 0 = Disabled or 1 = Enabled

Setting to select whether a DEF scheme should be mapped to Aided scheme 2.

(Not applicable where a Permissive Underreaching scheme selection has been made).

0.02 0s to 1s step 0.002s

Aided 2 DEF Trip 34 66 3 Pole 0 = 3 Pole, 1 = 1 and 3 Pole

Setting that defines the tripping mode for Aided 2 DEF.

This setting is visible only if tripping mode under GROUP x LINE PARAMETERS/Trip Mode is set to 1 and 3 pole.

Aided 2 Delta 34 67 Enabled 0 = Disabled or 1 = Enabled

Setting to select whether a Delta directional comparison scheme should be mapped to Aided scheme 2.

(Not applicable where a Permissive Underreaching scheme selection has been made).

Aided2 Delta dly 34 68

Time delay for Aided 2 Delta tripping.

0.02

Aided2 DeltaTrip 34 69 3 Pole

0s to 1s step 0.002s

0 = 3 Pole, 1 = 1 and 3 Pole

Setting that defines tripping mode for Aided 2 Delta.

This setting is visible only if tripping mode under GROUP x LINE PARAMETERS/ Trip Mode is set to 1 and 3 pole. tReversal Guard 34 6A 0.02 0s to 0.15s step 0.002s

Setting for the current reversal guard timer. Intended to keep stability on a healthy line, whilst breakers open on a faulted parallel line to clear the fault.

This setting is visible only when over-reaching or Blocking schemes are selected.

Unblocking Delay 34 6B 0.05 0s to 0.1s step 0.002s

P54x/EN ST/Nd5 Page (ST) 4-31

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Time delay after Loss of Guard until unblocking occurs. After the set delay, the relay will respond as though an aided signal has been received from the remote end.

This setting is visible only when PUR Unblocking, POR Unblocking or Programmable Unblocking schemes are chosen.

Send on Trip 34 6C Aided / Z1 0 = Aided / Z1, 1 = Any Trip, 2 = None

Setting that defines the reinforced trip signal for POR Aided 2 scheme.

If selected to: None: No reinforced signal is issued

Aided/Z1: The reinforced signal is issued with aided trip or with Z1 if aided distance scheme is enabled

Any Trip: Signal is reinforced with Any trip (DDB 522)

Weak Infeed 34 70 Disabled 0 = Disabled, 1 = Echo, 2 = Echo and Trip

Setting that defines Aided 2 scheme operation in case of weak infeed conditions, where no protection elements detect the fault at the local end, but an aided channel has been received from the remote end. Setting “Echo” will allow the received signal to be returned to the remote relay, “Trip” will allow local end tripping after a set delay.

WI Single Pole Trip 34 71 Disabled 0 = Disabled or 1 = Enabled

Setting that defines the Weak Infeed tripping mode. When disabled, any WI trip will be converted to a 3 phase trip.

WI V< Threshold 34 72 45 10V to 70V step 5V

Setting of Weak Infeed level detector. If phase - ground voltage in any phase drops below the threshold and with insufficient phase current for the protection to operate, the end is declared as a weak infeed terminal.

WI Trip Delay 34 73 0.06 0s to 1s step 0.002s

Setting for the weak infeed trip time delay.

Custom Send Mask 34 78 1

0 = Z1 Gnd., 1 = Z2 Gnd., 2 = Z4 Gnd.,

3 = Z1 Ph., 4 = Z2 Ph., 5 = Z4 Ph.,

6 = DEF Fwd., 7 = DEF Rev.,

8 = Dir Comp Fwd., 9 = Dir Comp Rev

Logic Settings that determine the element or group of elements that are sending a permissive signal to the other line end. For the signal to be sent, the element must operate and a corresponding bit in the matrix must be set to 1 (High).

The above mapping is part of a custom made Aided 2 scheme, and unlike all other schemes that are factory tested, the customer must take the responsibility for testing and the operation of the scheme.

This setting is visible only if a Programmable or Prog. Unblocking scheme is selected.

Custom Time PU 34 79 0 0s to 1s step 0.002s

Pick up time delay of DDB signal ‘Aid2 CustomT in’, available in the PSL logic. Once the time delay elapses, the DDB signal

‘Aid2 CustomT out’ will become high.

Custom Time DO 34 7A 0 0s to 1s step 0.002s

Drop off time delay of DDB signal ‘Aid2 CustomT in’. Once the time delay elapses, the DDB signal ‘Aid2 CustomT out’ will become low.

Note: The timer is a combined hard coded PU/DO timer for Custom Aided scheme 2.

Trip on Close

0

34 80 0

SOTF Status 34 81 Enabled PoleDead

0 = Disabled,1 = Enabled PoleDead,

2 = Enabled ExtPulse,

3 = En Pdead + Pulse

Setting that enables note (turns on) or disables (turns off) a special protection logic which can apply upon line energization.

SOTF = Switch on to Fault.

Note: SOTF can be enabled in three different manners:

1. Enabled Pole Dead. By using pole dead logic detection logic

2. Enabled ExtPulse. By using an external pulse

3. En Pdead + Pulse. By using both

SOTF Delay 34 82 110 0.2s to 1000s step 0.2s

The SOTF Delay is a pick up time delay that starts after opening all 3 poles of a CB. If the CB is then closed after the set time delay has expired, SOTF protection will be active. SOTF provides enhanced protection for manual closure of the breaker (not for auto-reclosure).

This setting is visible only if Pole Dead or Pdead + Pulse are selected to enable SOTF.

Page (ST) 4-32 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

SOTF Tripping 34 83 1

0 = Zone 1, 1 = Zone 2, 2 = Zone 3, 3 = Zone

4, 4 = Zone 5 or 5 = CNV

Logic Settings that determine the Distance zones that are allowed to operate instantaneously upon line energization. If, for example, Bit 1 is set to 1 (High), Z2 will operate without waiting for the usual tZ2 time delay should a fault lie within Z2 upon CB closure. It also allows a user to map ‘Currents No Volt’ option for fast fault clearance upon line energization. SOTF tripping is 3 phase and auto-reclose will be blocked.

TOR Status 34 84 Enabled 0 = Disabled or 1 = Enabled

Setting that enables (turns on) or disables (turns off) special protection following auto-reclosure. When set Enabled, TOR will be activated after the ‘TOC Delay’ has expired, ready for application when an auto-reclose shot occurs. TOR = Trip on (auto)Reclose.

TOR Tripping 34 85 1

0 = Zone 1, 1 = Zone 2, 2 = Zone 3, 3 = Zone

4, 4 = Zone 5 or 5 = CNV

Logic Settings that determine the Distance zones that are allowed to operate instantaneously upon line energization. If, for example, Bit 1 is set to 1 (High), Z2 will operate without waiting for the usual tZ2 time delay should a fault lie within Z2 upon CB closure. It also allows a user to map ‘Currents No Volt’ option for fast fault clearance upon line reclosure on a permanent fault.

TOR tripping is 3 phase and auto-reclose will be blocked.

TOC Reset Delay 34 86 0.5 0.1s to 2s step 0.1s

The TOC Reset Delay is a user settable time window during which TOC protection is available. The time window starts timing upon CB closure and it is common for SOTF and TOR protection. Once this timer expires after a successful (re)closure, all protection reverts to normal.

SOTF Pulse 34 87 0.5 0.1s to 10s step 0.01s

The SOTF Pulse is a user settable time window during which the SOTF protection is available. This setting is visible only if

ExtPulse or Pdead + Pulse are selected to enable SOTF

TOC Delay 34 88 0.2 0.05s to 0.2s step 0.01s

The TOC Delay is a user settable time delay following the CB opening after which the TOR becomes active (enabled). The time must be set in conjunction with the Dead Time setting of the Auto-reclose so that the setting must not exceed the minimum

Dead Time setting since both timers start instantaneously.

Zone 1 Extension

0

34 B0 0

Zone 1Ext Status 34 B1 Disabled

0 = Disabled, 1 = Enabled,

2 = En. on Ch1 Fail, 3 = En. on Ch2 Fail,

4 = En. All Ch Fail, 5 = En. Any Ch Fail

Setting that enables (turns on) or disables (turns off) the Zone 1 Extension scheme. When Enabled, extended Zone 1 will apply unless the Reset Zone 1 Extension DDB signal is energized. Otherwise, it is possible to enable Z1X when aided scheme channel(s) fail.

Zone1 Ext Phs 34 B2 150 100 to 200 step 1

Extended Z1X phase reach as a percentage of the Z1 phase reach. (Phase resistive reach for Z1X is the same as for Zone 1.)

Zone1 Ext Gnd 34 B3 150 100 to 200 step 1

Extended Z1X ground reach as a percentage of Z1 ground reach. (Ground resistive reach and residual compensation for Z1X is the same as for Zone 1.)

Loss of Load

0

34 C0 0

LoL Mode Status 34 C1 Disabled

0 = Disabled, 1 = Enabled,

2 = En. on Ch1 Fail, 3 = En. on Ch2 Fail,

4 = En. All Ch Fail, 5 = En. Any Ch Fail

Setting that enables (turns on) or disables (turns off) the Loss of Load scheme. When Enabled, accelerated tripping can apply as the remote end opens (3-pole trip applications only). Otherwise, it is possible to enable Z1X when aided scheme channel(s) fail.

Lol I< 34 C3 0.5 0.05*In to 1*In step 0.05In

LOL undercurrent detector that indicates a loss of load condition on the unfaulted phases, indicating that the remote end has just opened.

P54x/EN ST/Nd5 Page (ST) 4-33

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

LoL Window 34 C4 0.04 0.01s to 0.1s step 0.01s

Length of LOL window - the time window in which Zone 2 accelerated tripping can occur following LOL undercurrent detector operation.

Table 6 - Group x scheme logic

3.6 Power Swing Blocking (Only in Models with Distance Option)

The column GROUP x POWER SWING Blk.

is used to set either blocking or indication for out of step conditions. If blocking mode is selected, a user can individually select for each zone to be either blocked or allow tripping.

The power swing detection is based on superimposed current, and is essentially “settings free”.

Col Row Default Setting Available Setting MENU TEXT

Description

GROUP 1 POWER

SWING

3D 0 0

This column contains settings for Power Swing Blocking/Out of Step Tripping

Power Swing 3D 1 Blocking 0 = Blocking or 1 = Indication

To enable (activate) Indication or Blocking mode. This setting is invisible if disabled in ‘CONFIGURATION’ column.

If Indication status is selected, the alarm will be issued but tripping by distance protection will be unaffected. When Blocking status is selected, the user is presented with further options as to which zones do/do not require blocking.

Zone 1 Ph PSB 3D 3 Blocking

0 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

Setting that defines the Z1 phase element operation should any swing impedance enter and remains inside the Z1 phase characteristic for more then ‘tZ1 Ph. Delay’.

If Blocking is selected, the Z1 phase element operation will be disabled for the duration of the swing.

If Unblocking is chosen, the Z1 phase element block will be removed after drop off timer ‘PSB Unblocking Dly’ has expired, even if the swing is still present. This allows system separation when swings fail to stabilize.

In ‘Allow trip’ mode, the Z1 phase element is unaffected by PSB detection.

Zone 2 Ph PSB 3D 5 Blocking

1 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone 3 Ph PSB 3D 7 Blocking

2 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone P Ph PSB 3D 9 Blocking

3 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone 4 Ph PSB 3D 0B Blocking

4 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone Q Ph PSB 3D 0C Blocking

4 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone 1 Gnd PSB 3D 0D Blocking

5 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

Page (ST) 4-34 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

See Zone 1 Ph PSB

Zone 2 Gnd PSB 3D 0F Blocking

6 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone 3 Gnd PSB 3D 11 Blocking

7 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone P Gnd PSB 3D 13 Blocking

8 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone 4 Gnd PSB 3D 15 Blocking

9 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Zone Q Gnd PSB 3D 17 Blocking

9 = Allow Trip, 1 = Blocking, 2 = Delayed

Unblock

See Zone 1 Ph PSB

Slow PSB 3D 1A Enabled 0 = Disabled or 1 = Enabled

0

PSB Unblocking 3D 20 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the PSB Unblocking delay timer.

This setting is common to all zones and it is visible if any distance zone is set to ‘PSB Unblocking Dly’. For swing durations longer than this setting, blocking can be selectively removed.

PSB Unblock dly 3D 21 0.1 0.1s to 20s step 0.1s

Unblock timer setting - on expiry, power swing blocking can optionally be removed.

PSB Reset Delay 3D 22 0.2 0.05s to 2s step 0.05s

Setting to maintain the power swing detection for a period after the delta current detection has reset. ΔI will naturally reset momentarily twice in each swing cycle, and a short setting ensures continued PSB pick-up, to ride through the gaps.

OST Mode 3D 23 OST Disabled

0 = OST Disabled, 1 = OST Predictive Trip, 2

= OST Trip

To enable (activate) or disable (turn off) Out of Step protection. This setting (and all related settings below) is invisible if

PowerSwing Block is disabled in ‘CONFIGURATION’ column.

If ‘OST Trip’ is selected, relay will operate after Tost time delay if the measured positive sequence impedance has passed the

Z6-Z5 region slower than 25 ms (@ 50 or 60 Hz) and if the polarity of the resistive component has changed between entering and exiting zone 5.

If ‘Predictive OST Trip’ is selected, relay will operate after Tost time delay if the positive sequence impedance has passed the

Z6-Z5 region faster than 25ms but slower than ‘Delta t’ set time.

If ‘Predictive & OST Trip’ is selected, it will operate if any of two above criteria is satisfied.

0.1 to 500 step 0.01 Z5 3D 24 30

Setting for Z5 forward reactance reach.

Z6 3D 25 32 0.1 to 500 step 0.01

Setting for Z6 forward reactance reach.

Z5' 3D 26 -30

Setting for Z5 reverse reactance reach.

Z6' 3D 27 -32

Setting for Z6 reverse reactance reach.

R5 3D 28 20

Setting for Z5 positive resistive reach.

R6 3D 29 22

-500 to -0.1 step 0.01

-500 to -0.1 step 0.01

0.1 to 200 step 0.01

0.1 to 200 step 0.01

P54x/EN ST/Nd5 Page (ST) 4-35

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Setting for Z6 positive resistive reach.

R5' 3D 2A -20

Setting for Z5 negative resistive reach.

R6' 3D 2B

Setting for Z6 negative resistive reach.

-22

Blinder Angle 3D 2C 80

Setting of blinder angle, common for both Z5 and Z6.

Available Setting

-0.1 to -200 step 0.01

-0.1 to -200 step 0.01

20 to 90 step 1 delta T 3D 2D 0.04 0.04s to 1s step 0.001s

Time setting that is compared with the measured time between positive sequence impedance entering Z6 and entering Z5.

Tost 3D 2E 0

Tripping time delay common for any OST setting option.

0s to 1s step 0.01s

Table 7 - Group x power swing blk

3.7 Phase Overcurrent Protection

The phase overcurrent protection included in the relay provides four-stage nondirectional/directional phase-segregated overcurrent protection with independent time delay characteristics. All overcurrent and directional settings apply to each phase but are independent for each of the four stages. To arrange a single pole tripping by overcurrent protection, the default PSL needs to be checked (and possibly modified).

MENU TEXT

The first two stages of overcurrent protection have time-delayed characteristics which are selectable between Inverse Definite Minimum Time (IDMT), or Definite Time (DT). The third and fourth stages have DT characteristics only.

Col Row Default Setting Available Setting

Description

GROUP 1 OVER

CURRENT

35 0 0

This column contains settings for Overcurrent

I>1 Status 35 1 Enabled

0 = Disabled, 1 = Enabled, 2 = Enabled VTS, 3 = Enabled Ch

Fail, 4 = En VTSorCh Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch FailorCTS, 9 = En VTSorCh

FailorCTS, 10 = En VTSandCTS, 11 = En Ch FailandCTS, 12 =

En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

I>1 Function 35 2 IEC S Inverse

0 = DT, 1 = IEC S Inverse, 2 = IEC V Inverse,

3 = IEC E Inverse, 4 = UK LT Inverse,

5 = IEEE M Inverse, 6 = IEEE V Inverse,

7 = IEEE E Inverse, 8 = US Inverse,

9 = US ST Inverse

Setting for the tripping characteristic for the first stage overcurrent element.

I>1 Directional 35 3 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for first stage element.

Page (ST) 4-36 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

0.08*In to 4*In step 0.01In I>1 Current Set 35 4 1

Pick-up setting for first stage overcurrent element.

I>1 Time Delay 35 5 1 0s to 100s step 0.01s

Setting for the time-delay for the definite time setting if selected for first stage element. The setting is visible only when DT function is selected.

I>1 TMS 35 6 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

I>1 Time Dial 35 7 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves. The Time Dial (TD) is a multiplier on the standard curve equation, in order to achieve the required tripping time. The reference curve is based on TD = 1.

Care: Certain manufacturer's use a mid-range value of TD = 5 or 7, so it may be necessary to divide by 5 or 7 to achieve parity.

I>1 Reset Char 35 8 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

I>1 tRESET 35 9 0 0s to 100s step 0.01s

Setting that determines the reset/release time for definite time reset characteristic

I>2 Status 35 10 Disabled

0 = Disabled, 1 = Enabled, 2 = Enabled VTS, 3 = Enabled Ch

Fail, 4 = En VTSorCh Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch FailorCTS, 9 = En VTSorCh

FailorCTS, 10 = En VTSandCTS, 11 = En Ch FailandCTS, 12 =

En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

I>2 Function 35 11 IEC S Inverse

0 = DT, 1 = IEC S Inverse, 2 = IEC V Inverse,

3 = IEC E Inverse, 4 = UK LT Inverse,

5 = IEEE M Inverse, 6 = IEEE V Inverse,

7 = IEEE E Inverse, 8 = US Inverse,

9 = US ST Inverse

Setting for the tripping characteristic for the second stage overcurrent element.

I>2 Directional 35 12 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for second stage element.

I>2 Current Set 35 13 1 0.08*In to 4*In step 0.01In

Pick-up setting for second stage overcurrent element.

I>2 Time Delay 35 14 1 0s to 100s step 0.01s

Setting for the time-delay for the definite time setting if selected for second stage element. The setting is visible only when DT function is selected.

I>2 TMS 35 15 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

I>2 Time Dial 35 16 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves. The Time Dial (TD) is a multiplier on the standard curve equation, in order to achieve the required tripping time. The reference curve is based on TD = 1.

Care: Certain manufacturer's use a mid-range value of TD = 5 or 7, so it may be necessary to divide by 5 or 7 to achieve parity.

I>2 Reset Char 35 17 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

I>2 tRESET 35 18 0 0s to 100s step 0.01s

Setting that determines the reset/release time for definite time reset characteristic

P54x/EN ST/Nd5 Page (ST) 4-37

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

I>3 Status

I>3 Current Set

35

35

20

22

Disabled

10

Pick-up setting for third stage overcurrent element.

0 = Disabled, 1 = Enabled, 2 = Enabled VTS, 3 = Enabled Ch

Fail, 4 = En VTSorCh Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch FailorCTS, 9 = En VTSorCh

FailorCTS, 10 = En VTSandCTS, 11 = En Ch FailandCTS, 12 =

En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

0.08*In to 32*In step 0.01In

I>3 Time Delay 35 23 0 0s to 100s step 0.01s

Setting for the operating time-delay for third stage overcurrent element.

I>3 CT Select 35 24 CT1+2 Magnitude 0 = CT1 Magnitude, 1 = CT2 Magnitude, 2 = CT1+2 Magnitude

Allows Selection of the measured CT for two CT models

I>4 Status 35 30 Disabled

0 = Disabled, 1 = Enabled, 2 = Enabled VTS, 3 = Enabled Ch

Fail, 4 = En VTSorCh Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch FailorCTS, 9 = En VTSorCh

FailorCTS, 10 = En VTSandCTS, 11 = En Ch FailandCTS, 12 =

En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

I>4 Directional 35 31 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for the fourth stage overcurrent element.

I>4 Current Set 35 32 10

Pick-up setting for fourth stage overcurrent element.

0.08*In to 32*In step 0.01In

I>4 Time Delay 35 33 0 0s to 100s step 0.01s

Setting for the operating time-delay for fourth stage overcurrent element.

I>4 CT Select 35 34 CT1+2 Magnitude 0 = CT1 Magnitude, 1 = CT2 Magnitude, 2 = CT1+2 Magnitude

Allows Selection of the measured CT for two CT models

I> Char Angle

I> Blocking

35

35

40

41

30

0xF

-95 to 95 step 1

Setting for the relay characteristic angle used for the directional decision. The setting is visible only when ‘Directional Fwd’ or

‘Directional Rev’ is set.

0 = VTS Blocks I>1,1 = VTS Blocks I>2,

2 = VTS Blocks I>3,3 = VTS Blocks I>4

Logic Settings that determine whether blocking signals from VT supervision affect certain overcurrent stages.

VTS Block – only affects directional overcurrent protection. With the relevant bit set to 1, operation of the Voltage Transformer

Supervision (VTS), will block the stage. When set to 0, the stage will revert to Non-directional upon operation of the VTS.

If I> Status is set ‘Enabled VTS’, no blocking should be selected in order to provide fault clearance by overcurrent protection during the VTS condition.

Table 8 - Phase overcurrent protection

Page (ST) 4-38 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

3.8 Negative Sequence Overcurrent

The negative sequence overcurrent protection included in the relay provides four-stage non-directional/directional phase segregated negative sequence overcurrent protection with independent time delay characteristics.

The first two stages of negative sequence overcurrent protection have time-delayed characteristics which are selectable between Inverse Definite Minimum Time (IDMT), or

Definite Time (DT). The third and fourth stages have DT characteristics only.

MENU TEXT Col Row Default Setting

Description

GROUP 1 NEG

SEQ O/C

36 0 0

This column contains settings for Negative Sequence overcurrent

Available Setting

I2>1 Status 36 10 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the first stage negative sequence element.

I2>1 Function 36 11 DT

0 = DT, 1 = IEC S Inverse, 2 = IEC V Inverse, 3 = IEC E Inverse,

4 = UK LT Inverse, 5 = IEEE M Inverse, 6 = IEEE V Inverse, 7 =

IEEE E Inverse, 8 = US Inverse or 9 = US ST Inverse

Setting for the tripping characteristic for the first stage negative sequence overcurrent element.

I2>1 Directional 36 12 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for this element.

I2>1 Current Set 36 15 0.2 0.08*In to 4*In step 0.01In

Pick-up setting for the first stage negative sequence overcurrent element.

I2>1 Time Delay 36 17 10 0s to 100s step 0.01s

Setting for the operating time-delay for the first stage negative sequence overcurrent element.

I2>1 TMS 36 18 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

I2>1 Time Dial 36 19 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves.

I2>1 Reset Char 36 1C DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

I2>1 tRESET 36 1D 0 0 to 100 step 0.01

Setting that determines the reset/release time for definite time reset characteristic.

I2>2 Status 36 20 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage negative sequence element.

I2>2 Function 36 21 DT

0 = DT, 1 = IEC S Inverse, 2 = IEC V Inverse, 3 = IEC E Inverse,

4 = UK LT Inverse, 5 = IEEE M Inverse, 6 = IEEE V Inverse, 7 =

IEEE E Inverse, 8 = US Inverse or 9 = US ST Inverse

Setting for the tripping characteristic for the second stage negative sequence overcurrent element.

I2>2 Directional 36 22 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for this element.

I2>2 Current Set 36 25 0.2 0.08*In to 4*In step 0.01In

Pick-up setting for the second stage negative sequence overcurrent element.

I2>2 Time Delay 36 27 10 0s to 100s step 0.01s

Setting for the operating time-delay for the second stage negative sequence overcurrent element.

I2>2 TMS 36 28 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

P54x/EN ST/Nd5 Page (ST) 4-39

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

I2>2 Time Dial 36 29 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves.

I2>2 Reset Char 36 2C DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

I2>2 tRESET 36 2D 0 0 to 100 step 0.01

Setting that determines the reset/release time for definite time reset characteristic.

I2>3 Status 36 30 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the third stage negative sequence element.

I2>3 Directional 36 32 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for this element.

I2>3 Current Set 36 35 0.2 0.08*I1 to 32*I1 step 0.01*I1

Pick-up setting for the third stage negative sequence overcurrent element.

I2>3 Time Delay 36 37 10 0s to 100s step 0.01s

Setting for the operating time-delay for the third stage negative sequence overcurrent element.

I2>4 Status 36 40 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the fourth stage negative sequence element.

I2>4 Directional 36 42 Non-Directional 0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev

This setting determines the direction of measurement for this element.

I2>4 Current Set 36 45 0.2 0.08*In to 32*In step 0.01In

Pick-up setting for the fourth stage negative sequence overcurrent element.

I2>4 Time Delay 36 47 10 0s to 100s step 0.01s

Setting for the operating time-delay for the fourth stage negative sequence overcurrent element.

I2> VTS Blocking 36 50 0x0F

0 = VTS Blocks I2>1,

1 = VTS Blocks I2>2,

2 = VTS Blocks I2>3,

3 = VTS Blocks I2>4

Logic settings that determine whether VT supervision blocks selected negative sequence overcurrent stages. Setting ‘0’ will permit continued non-directional operation.

I2> Char Angle 36 51 -60 -95 to 95 step 1

Setting for the relay characteristic angle used for the directional decision.

IN> V2pol Set 36 52 5 0.5V to 25V step 0.5V

Setting determines the minimum negative sequence voltage threshold that must be present to determine directionality.

Table 9 - Negative sequence overcurrent

3.9 Broken Conductor

MENU TEXT Col Row

GROUP 1 BROKEN

CONDUCTOR

37 0 0

This column contains settings for Broken Conductor

Broken Conductor 37 1 Disabled

Default Setting

Description

Available Setting

0 = Disabled or 1 = Enabled

Page (ST) 4-40 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Enables or disables the broken conductor function.

I2/I1 Setting 37 2 0.2 0.2 to 1 step 0.01

Setting to determine the pick- up level of the negative to positive sequence current ratio.

0s to 100s step 0.1s I2/I1 Time Delay 37 3 60

Setting for the function operating time delay.

Table 10 - Broken conductor

3.10 Earth Fault

The back-up earth fault overcurrent protection included in the relay provides four-stage non-directional/directional three-phase overcurrent protection with independent time delay characteristics. All earth fault overcurrent and directional settings apply to all three phases but are independent for each of the four stages.

The first two stages of earth fault overcurrent protection have time-delayed characteristics which are selectable between Inverse Definite Minimum Time (IDMT), or Definite Time

(DT). The third and fourth stages have DT characteristics only.

Col Row Default Setting Available Setting MENU TEXT

Description

GROUP 1 EARTH

FAULT

38 0 0

This column contains settings for Earth Fault

IN>1 Status 38 1 Enabled

0 = Disabled, 1 = Enabled, 2 = Enabled

VTS, 3 = Enabled Ch Fail, 4 = En VTSorCh

Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch

FailorCTS, 9 = En VTSorCh FailorCTS, 10 =

En VTSandCTS, 11 = En Ch FailandCTS, 12

= En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

IN>1 Function 38 25 IEC S Inverse

0 = DT, 1 = IEC S Inverse, 2 = IEC V

Inverse, 3 = IEC E Inverse, 4 = UK LT

Inverse, 5 = IEEE M Inverse, 6 = IEEE V

Inverse, 7 = IEEE E Inverse, 8 = US Inverse,

9 = US ST Inverse or 10 = IDG

Setting for the tripping characteristic for the first stage earth fault overcurrent element.

IN>1 Directional 38 26 Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for first stage element.

IN>1 Current Set 38 29 0.2

Pick-up setting for first stage overcurrent element

0.08*In to 4*In step 0.01In

IN1>1 IDG Is 38 2A 1.5 1 to 4 step 0.1

This setting is set as a multiple of “IN>” setting for the IDG curve (Scandinavian) and determines the actual relay current threshold at which the element starts.

P54x/EN ST/Nd5 Page (ST) 4-41

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

IN>1 Time Delay 38 2C 1 0s to 200s step 0.01s

Setting for the time-delay for the definite time setting if selected for first stage element. The setting is available only when DT function is selected.

IN>1 TMS 38 2D 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

IN>1 Time Dial 38 2E 1 0.01 to 100 step 0.01

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves. The Time Dial (TD) is a multiplier on the standard curve equation, in order to achieve the required tripping time. The reference curve is based on TD = 1.

Care: Certain manufacturer's use a mid-range value of TD = 5 or 7, so it may be necessary to divide by 5 or 7 to achieve parity.

IN1>1 IDG Time 38 30 1.2 1s to 2s step 0.01s

Setting for the IDG curve used to set the minimum operating time at high levels of fault current.

IN>1 Reset Char 38 32 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

IN>1 tRESET 38 33 0 0s to 100s step 0.01s

Setting that determines the reset/release time for definite time reset characteristic.

IN>2 Status 38 35 Disabled

0 = Disabled, 1 = Enabled, 2 = Enabled

VTS, 3 = Enabled Ch Fail, 4 = En VTSorCh

Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch

FailorCTS, 9 = En VTSorCh FailorCTS, 10 =

En VTSandCTS, 11 = En Ch FailandCTS, 12

= En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

IN>2 Function 38 36 IEC S Inverse

0 = DT, 1 = IEC S Inverse, 2 = IEC V

Inverse, 3 = IEC E Inverse, 4 = UK LT

Inverse, 5 = IEEE M Inverse, 6 = IEEE V

Inverse, 7 = IEEE E Inverse, 8 = US Inverse,

9 = US ST Inverse or 10 = IDG

Setting for the tripping characteristic for the second stage earth fault overcurrent element.

IN>2 Directional 38 37 Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for first stage element.

IN>2 Current Set 38 3A 0.2

Pick-up setting for second stage overcurrent element

0.08*In to 4*In step 0.01In

IN2>1 IDG Is 38 3B 1.5 1 to 4 step 0.1

This setting is set as a multiple of “IN>” setting for the IDG curve (Scandinavian) and determines the actual relay current threshold at which the element starts.

IN>2 Time Delay 38 3D 1 0s to 200s step 0.01s

Setting for the time-delay for the definite time setting if selected for second stage element. The setting is available only when

DT function is selected.

IN>2 TMS 38 3E 1 0.025 to 1.2 step 0.005

Setting for the time multiplier setting to adjust the operating time of the IEC IDMT characteristic.

IN>2 Time Dial 38 3F 1 0.01 to 100 step 0.01

Page (ST) 4-42 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting for the time multiplier setting to adjust the operating time of the IEEE/US IDMT curves. The Time Dial (TD) is a multiplier on the standard curve equation, in order to achieve the required tripping time. The reference curve is based on TD = 1.

Care: Certain manufacturer's use a mid-range value of TD = 5 or 7, so it may be necessary to divide by 5 or 7 to achieve parity.

IN2>1 IDG Time 38 41 1.2 1s to 2s step 0.01s

Setting for the IDG curve used to set the minimum operating time at high levels of fault current.

IN>2 Reset Char 38 43 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

IN>2 tRESET 38 44 0 0s to 100s step 0.01s

Setting that determines the reset/release time for definite time reset characteristic.

IN>3 Status 38 46 Disabled

0 = Disabled, 1 = Enabled, 2 = Enabled

VTS, 3 = Enabled Ch Fail, 4 = En VTSorCh

Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch

FailorCTS, 9 = En VTSorCh FailorCTS, 10 =

En VTSandCTS, 11 = En Ch FailandCTS, 12

= En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

IN>3 Directional 38 47 Directional Fwd

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for the earth fault overcurrent element.

IN>3 Current Set 38 4A 10

Pick-up setting for third stage earth fault overcurrent element.

0.08*In to 32*In step 0.01In

IN>3 Time Delay 38 4B 0 0s to 200s step 0.01s

Setting for the operating time-delay for third stage earth fault overcurrent element.

IN > 3 CT Select 38 4C CT1 + CT2 Magnitude

Allows selection of the measured CT for two CT models.

IN>4 Status 38 4D Disabled

0 = Disabled, 1 = Enabled, 2 = Enabled

VTS, 3 = Enabled Ch Fail, 4 = En VTSorCh

Fail, 5 = En VTSandCh Fail, 6 = Enabled

CTS, 7 = En VTSorCTS, 8 = En Ch

FailorCTS, 9 = En VTSorCh FailorCTS, 10 =

En VTSandCTS, 11 = En Ch FailandCTS, 12

= En VTSandCh FailandCTS

Setting that defines second stage overcurrent operating status. Depending of this setting, I>2 will be enabled permanently or in case of Voltage Transformer Supervision (fuse fail) operation, or in case of communication channel fail, or in case of Current

Transformer Supervision (fail) operation, or a combination 1 or 2, 1 or 3, 2 or 3, 1 or 2 or 3, 1 and 2, 1 and 3, 2 and 3, 1 and 2 and 3.

IN>4 Directional 38 4E Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for the earth fault overcurrent element.

IN>4 Current Set 38 51 10

Pick-up setting for fourth stage earth fault overcurrent element.

0.08*In to 32*In step 0.01In

IN>4 Time Delay 38 52 0 0s to 200s step 0.01s

Setting for the operating time-delay for fourth stage earth fault overcurrent element.

IN > 4 CT Select 38 53 CT1 + CT2 Magnitude

Allows selection of the measured CT for two CT models.

P54x/EN ST/Nd5 Page (ST) 4-43

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

IN> Blocking 38 54 0x00F

Bit 0 = VTS Blocks IN>1,

Bit 1 = VTS Blocks IN>2,

Bit 2 = VTS Blocks IN>3,

Bit 3 = VTS Blocks IN>4,

Bit 4 = Not used, Bit 5 = Not used,

Bit 6 = Not used, Bit 7 = Not Used

Logic Settings that determine whether blocking signals from VT supervision affect certain earth fault overcurrent stages.

VTS Block - only affects directional earth fault overcurrent protection. With the relevant bit set to 1, operation of the Voltage

Transformer Supervision (VTS), will block the stage. When set to 0, the stage will revert to Non-directional upon operation of the VTS.

If IN> Status is set ‘Enabled VTS’, no blocking should be selected in order to provide earth fault clearance by earth fault overcurrent protection during VTS condition.

IN> DIRECTIONAL 38 55 0

0

IN> Char Angle 38 56 -60 -95 to 95 step 1

Setting for the relay characteristic angle used for the directional decision. The setting is visible only when ‘Directional Fwd’ or

‘Directional Rev’ is set.

IN> Polarisation 38 57 Zero Sequence 0 = Zero Sequence or 1 = Neg Sequence

Setting that determines whether the directional function uses zero sequence or negative sequence voltage polarizing.

IN> VNpol Set 38 59 1 0.5V to 40V step 0.5V

Setting for the minimum zero sequence voltage polarizing quantity for directional decision. Setting is visible only when ‘Zero

Sequence’ polarization is set.

IN> V2pol Set 38 5A 1 0.5V to 25V step 0.5V

Setting for the minimum negative sequence voltage polarizing quantity for directional decision. Setting is visible only when

‘Negative Sequence’ polarization is set.

IN> I2pol Set 38 5B 0.08 0.08*In to 1*In step 0.01In

Setting for the minimum negative sequence current polarizing quantity for directional decision. Setting is visible only when

‘Negative Sequence’ polarization is set.

Table 11 - Earth fault

3.11 Aided DEF (only in Models with Distance Option)

The column GROUP x AIDED DEF is used to set all parameters for operation of DEF

(Directional Earth Fault aided scheme thresholds). As this configuration merely assigns pick up at the local end only, they need to be further configured to a selected Aided channel scheme under GROUP x SCHEME LOGIC to provide unit protection.

MENU TEXT Col Row Default Setting

Description

Available Setting

GROUP 1 AIDED

DEF

39 0 0

This column contains settings for Aided DEF

DEF Status 39 2 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the Directional Earth Fault element that is used in an aided scheme (= ground overcurrent pilot scheme). This setting is invisible if disabled in ‘CONFIGURATION’ column.

DEF Polarising 39 3 Zero Sequence 0 = Zero Sequence or 1 = Neg Sequence

Page (ST) 4-44 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that defines the method of DEF polarization. Either zero, or negative sequence voltage can be taken as the directional reference. When Zero Sequence is selected, this arms the Virtual Current Polarizing.

DEF Char Angle 39 4 -60 -95 to 95 step 1

Setting for the relay characteristic angle used for the directional decision.

DEF VNpol Set 39 5 1 0.5V to 40V step 0.5V

Setting that must be exceeded by generated neutral displacement voltage VN (= 3.Vo) in order for the DEF function to be operational.

As Virtual Current Polarizing will be in force when Zero sequence polarizing is used, this setting will normally have no relevance. If the relay phase selector (delta sensitivity typically 4% In) detects the faulted phase, this will artificially generate a large VNpol, typically equal to Vn (phase-ground). Only if the phase selector cannot phase select will this setting be relevant, as VNpol will then measure true VN.

The setting is invisible if ‘Neg. Sequence’ polarization is set.

DEF V2pol Set 39 6 1 0.5V to 25V step 0.5V

Setting that must be exceeded by generated negative sequence voltage V2 in order for the DEF function to be operational.

The setting is invisible if ‘Zero Sequence’ polarization is set.

0.05*In to 1*In step 0.01In DEF FWD Level 39 7 0.08

Setting the forward pickup current sensitivity for residual current (= 3.Io).

DEF REV Level 39 8 0.04 0.03*In to 1*In step 0.01In

Setting the reverse pickup current sensitivity for residual current (= 3.Io).

Table 12 - Group x aided DEF

3.12 Sensitive Earth Fault (SEF)

MENU TEXT

If a system is earthed through a high impedance, or is subject to high ground fault resistance, the earth fault level will be severely limited. Consequently, the applied earth fault protection requires both an appropriate characteristic and a suitably sensitive setting range in order to be effective. A separate four-stage sensitive earth fault element is provided within the relay for this purpose, which has a dedicated input.

Col Row Default Setting Available Setting

Description

GROUP 1 SEF/REF

PROT'N

3A 0 0

This column contains settings for SEF/REF

Sens E/F Options 3A 1 SEF Enabled

0 = SEF Enabled, 1 = Wattmetric SEF, 2 = Hi

Z REF

Setting to select the type of sensitive earth fault protection function and the type of high-impedance function to be used.

ISEF>1 Function 3A 2A DT

0 = Disabled, 1 = DT, 2 = IEC S Inverse, 3 =

IEC V Inverse, 4 = IEC E Inverse, 5 = UK LT

Inverse, 6 = IEEE M Inverse, 7 = IEEE V

Inverse, 8 = IEEE E Inverse, 9 = US Inverse,

10 = US ST Inverse or 11 = IDG

Setting for the tripping characteristic for the first stage sensitive earth fault element.

ISEF>1 Direction 3A 2B Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for the first stage sensitive earth fault element.

ISEF>1 Current 3A 2E 0.05 0.005*InSef to 0.1*InSef step 0.00025*InSef

P54x/EN ST/Nd5 Page (ST) 4-45

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Pick-up setting for the first stage sensitive earth fault element.

ISEF>1 IDG Is

ISEF>1 Delay

3A

3A

2F

31

1.5

1

Setting for the time delay for the first stage definite time element.

1 to 4 step 0.1

This setting is set as a multiple of ISEF> setting for the IDG curve (Scandinavian) and determines the actual relay current threshold at which the element starts.

0s to 200s step 0.01s

ISEF>1 TMS 3A 32 1 0.025 to 1.2 step 0.005

Setting for the time multiplier to adjust the operating time of the IEC IDMT characteristic.

ISEF>1 Time Dial 3A 33 1 0.01 to 100 step 0.01

Setting for the time multiplier to adjust the operating time of the IEEE/US IDMT curves.

ISEF>1 IDG Time 3A 34 1.2 1s to 2s step 0.01s

Setting for the IDG curve used to set the minimum operating time at high levels of fault current.

ISEF>1 Reset Chr 3A 36 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

ISEF>1 tRESET 3A 37 0 0s to 100s step 0.01s

Setting to determine the reset/release time for definite time reset characteristic.

ISEF>2 Function 3A 3A Disabled

0 = Disabled, 1 = DT, 2 = IEC S Inverse, 3 =

IEC V Inverse, 4 = IEC E Inverse, 5 = UK LT

Inverse, 6 = IEEE M Inverse, 7 = IEEE V

Inverse, 8 = IEEE E Inverse, 9 = US Inverse,

10 = US ST Inverse or 11 = IDG

Setting for the tripping characteristic for the second stage sensitive earth fault element.

ISEF>2 Direction 3A 3B Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for the second stage sensitive earth fault element.

ISEF>2 Current 3A 3E 0.05 0.005*InSef to 0.1*InSef step 0.00025*InSef

Pick-up setting for the second stage sensitive earth fault element.

ISEF>2 IDG Is 3A 3F 1.5 1 to 4 step 0.1

This setting is set as a multiple of ISEF> setting for the IDG curve (Scandinavian) and determines the actual relay current threshold at which the element starts.

ISEF>2 Delay 3A 41 1

Setting for the time delay for the second stage definite time element.

0s to 200s step 0.01s

ISEF>2 TMS 3A 42 1 0.025 to 1.2 step 0.005

Setting for the time multiplier to adjust the operating time of the IEC IDMT characteristic.

ISEF>2 Time Dial 3A 43 1 0.01 to 100 step 0.01

Setting for the time multiplier to adjust the operating time of the IEEE/US IDMT curves.

ISEF>2 IDG Time 3A 44 1.2 1s to 2s step 0.01s

Setting for the IDG curve used to set the minimum operating time at high levels of fault current.

ISEF>2 Reset Chr 3A 46 DT 0 = DT or 1 = Inverse

Setting to determine the type of reset/release characteristic of the IEEE/US curves.

ISEF>2 tRESET 3A 47 0 0s to 100s step 0.01s

Setting to determine the reset/release time for definite time reset characteristic.

ISEF>3 Status 3A 49 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the third stage definite time sensitive earth fault element.

ISEF>3 Direction 3A 4A Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

Page (ST) 4-46 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

This setting determines the direction of measurement for the third stage element.

ISEF>3 Current 3A 4D 0.4 0.005*InSef to 0.8*InSef step 0.001*InSef

Pick-up setting for the third stage sensitive earth fault element.

ISEF>3 Delay 3A 4E 0.5

Setting for the operating time delay for third stage sensitive earth fault element.

0s to 200s step 0.01s

ISEF>4 Status 3A 50 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the fourth stage definite time sensitive earth fault element.

ISEF>4 Direction 3A 51 Non-Directional

0 = Non-Directional, 1 = Directional Fwd, 2 =

Directional Rev

This setting determines the direction of measurement for the fourth stage element.

0.005*InSef to 0.8*InSef step 0.001*InSef ISEF>4 Current 3A 54 0.6

Pick-up setting for the fourth stage sensitive earth fault element.

ISEF>4 Delay 3A 55 0.25 0s to 200s step 0.01s

Setting for the operating time delay for fourth stage sensitive earth fault element.

ISEF> Blocking 3A 57 0x00F

Bit 0 = VTS Blks ISEF>1,

Bit 1 = VTS Blks ISEF>2,

Bit 2 = VTS Blks ISEF>3,

Bit 3 = VTS Blks ISEF>4,

Bit 4 = A/R Blks ISEF>3,

Bit 5 = A/R Blks ISEF>4,

Bit 6 = Not used, Bit 7 = Not Used

Logic Settings that determine whether blocking signals from VT supervision affect certain earth fault overcurrent stages.

VTS Block - only affects sensitive earth fault protection. With the relevant bit set to 1, operation of the Voltage Transformer

Supervision (VTS), will block the stage. When set to 0, the stage will revert to Non-directional upon operation of the VTS.

ISEF DIRECTIONAL 3A

0

58 0

ISEF> Char Angle 3A 59 90

Setting for the relay characteristic angle used for the directional decision.

-95 to 95 step 1

ISEF> VNpol Set 3A 5B 5 0.5V to 88V step 0.5V

Setting for the minimum zero sequence voltage polarizing quantity required for directional decision.

Wattmetric SEF

0

3A 5D 0

PN> Setting 3A 5E 9 0*InSef W to 20OnSef W step 0.05InSef W

Setting for the threshold for the wattmetric component of zero sequence power. The power calculation is as follows:

The PN> setting corresponds to:

Vres x Ires x

Cos (φ – φc) = 9 x Vo x Io x Cos (φ– φc)

Where; φ = Angle between the Polarizing Voltage (-Vres) and the Residual Current

φc = Relay Characteristic Angle (RCA) Setting (ISEF> Char Angle)

Vres = Residual Voltage

Ires = Residual Current

Vo = Zero Sequence Voltage

Io = Zero Sequence Current

RESTRICTED E/F 3A 60 0

0

IREF> Is 3A 65 0.2

Pick-up setting for the High Impedance restricted earth fault element.

0.05*InSef to 1*InSef step 0.01*InSef

Table 13 - Sensitive earth fault

P54x/EN ST/Nd5 Page (ST) 4-47

(ST) 4 Settings Group Settings

3.13 Residual Overvoltage (Neutral Voltage Displacement)

MENU TEXT

The Neutral Voltage Displacement (NVD) element within the relay is of two-stage design, each stage having separate voltage and time delay settings. Stage 1 may be set to operate on either an IDMT or DT characteristic, whilst stage 2 may be set to DT only.

Col Row Default Setting Available Setting

Description

VN Input 3B 1 Derived

Data cell indicating the VN Input is always derived from the 3 phase voltages

Derived

VN>1 Function 3B 2 DT 0 = Disabled, 1 = DT or 2 = IDMT

Setting for the tripping characteristic of the first stage residual overvoltage element.

VN>1 Voltage Set 3B 3 5 1V to 50V step 1V

Pick-up setting for the first stage residual overvoltage characteristic.

VN>1 Time Delay 3B 4 5 0s to 100s step 0.01s

Operating time delay setting for the first stage definite time residual overvoltage element.

VN>1 TMS 3B 5 1 0.5 to 100 step 0.5

Setting for the time multiplier setting to adjust the operating time of the IDMT characteristic.

The characteristic is defined as follows:

t = K / ( M – 1)

Where:

K = Time multiplier setting

t = Operating time in seconds

M = Derived residual voltage/relay setting voltage (VN> Voltage Set)

VN>1 tReset 3B 6 0 0s to 100s step 0.01s

Setting to determine the reset/release definite time for the first stage characteristic

VN>2 Status 3B 7 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage definite time residual overvoltage element.

VN>2 Voltage Set 3B 8 10 1V to 50V step 1V

Pick-up setting for the second stage residual overvoltage element.

VN>2 Time Delay 3B 9 10

Operating time delay for the second stage residual overvoltage element.

0s to 100s step 0.01s

Table 14 - Residual overvoltage (neutral voltage displacement)

3.14 Thermal Overload

The thermal overload function within the relay is capable of being selected as a single time constant or dual time constant characteristic, dependent on the type of plant to be protected.

MENU TEXT Col Row

GROUP 1 THERMAL

OVERLOAD

3C 0 0

This column contains settings for Thermal Overload

Default Setting

Description

Available Setting

Page (ST) 4-48 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Characteristic 3C 1 Single

Setting for the operating characteristic of the thermal overload element.

Available Setting

0 = Disabled, 1 = Single, 2 = Dual

Thermal Trip 3C 2 1 0.08*In to 4*In step 0.01In

Sets the maximum full load current allowed and the pick-up threshold of the thermal characteristic.

Thermal Alarm 3C 3 70 50 to 100 step 1

Setting for the thermal state threshold corresponding to a percentage of the trip threshold at which an alarm will be generated.

Time Constant 1 3C 4 10 1 to 200 step 1

Setting for the thermal time constant for a single time constant characteristic or the first time constant for the dual time constant characteristic.

Time Constant 2 3C 5 5 1 to 200 step 1

Setting for the second thermal time constant for the dual time constant characteristic.

Table 15 - Thermal overload

3.15 Voltage Protection

Under and overvoltage protection included within the relay consists of two independent stages. The measuring mode (ph-N or ph-ph) and operating mode (any phase or 3 phase) are configurable as a combination between Stage 1 and Stage 2, therefore allowing completely independent operation for each stage.

Stage 1 may be selected as IDMT, DT or Disabled, within the V<1 function cell.

Stage 2 is DT only and is enabled/disabled in the V<2 status cell.

Two stages are included to provide both alarm and trip stages, where required.

MENU TEXT Col Row

GROUP 1 VOLTAGE

PROTECTION

42 0 0

This column contains settings for Voltage protection

Default Setting

Description

Available Setting

UNDER VOLTAGE

0

V< Measur't Mode 42 2 V<1 & V<2 Ph-Ph

0 = V<1 & V<2 Ph-Ph,

1 = V<1 & V<2 Ph-N,

2 = V<1Ph-Ph V<2Ph-N,

3 = V<1Ph-N V<2Ph-Ph

Sets the combination of measured input voltage that will be used for the undervoltage elements.

Note: If any stage is disabled, the associated text in the setting menu cell setting will remain visible but will not affect the operation of the stage that is enabled.

V< Operate Mode

42

42

1

3

0

V<1 & V<2 Any Ph

0 = V<1 & V<2 Any Ph,

1 = V<1 & V<2 3Phase,

2 = V<1AnyPh V<2 3Ph,

3 = V<1 3Ph V<2AnyPh

P54x/EN ST/Nd5 Page (ST) 4-49

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that determines whether any phase or all three phases has to satisfy the undervoltage criteria before a decision is made.

Note: If any stage is disabled, the associated text in the setting menu cell setting will remain visible but will not affect the operation of the stage that is enabled.

V<1 Function 42 4 DT 0 = Disabled, 1 = DT or 2 = IDMT

Tripping characteristic for the first stage undervoltage function.

The IDMT characteristic available on the first stage is defined by the following formula:

t = K / (1 - M)

Where:

K = Time multiplier setting

t = Operating time in seconds

M = Measured voltage/relay setting voltage (V< Voltage Set)

V<1 Voltage Set 42 5 80 10V to 120V step 1V

Sets the pick-up setting for first stage undervoltage element.

V<1 Time Delay 42 6 10 0s to 100s step 0.01s

Setting for the operating time-delay for the first stage definite time undervoltage element.

V<1 TMS 42 7 1 0.5 to 100 step 0.5

Setting for the time multiplier setting to adjust the operating time of the IDMT characteristic.

V<1 Poledead Inh 42 8 Enabled 0 = Disabled or 1 = Enabled

If the cell is enabled, the relevant stage will become inhibited by the pole dead logic. This logic produces an output when it detects either an open circuit breaker via auxiliary contacts feeding the relay opto inputs or it detects a combination of both undercurrent and undervoltage on any one phase. It allows the undervoltage protection to reset when the circuit breaker opens to cater for line or bus side VT applications.

V<2 Status 42 9 Disabled

Setting to enable or disable the second stage undervoltage element.

0 = Disabled or 1 = Enabled

V<2 Voltage Set 42 0A 60 10V to 120V step 1V

This setting determines the pick-up setting for second stage undervoltage element.

V<2 Time Delay 42 0B 5 0s to 100s step 0.01s

Setting for the operating time-delay for the second stage definite time undervoltage element.

0 = Disabled or 1 = Enabled V<2 Poledead Inh 42 0C Enabled

Similar function to V<1 Poledead Inhibit.

OVERVOLTAGE

0

42 0D 0

V> Measur't Mode

V> Operate Mode

42

42

0E

0F

V>1 & V>2 Ph-Ph

V>1 & V>2 Any Ph

0 = V>1 & V>2 Ph-Ph,

1 = V>1 & V>2 Ph-N,

2 = V>1Ph-Ph V>2Ph-N,

3 = V>1Ph-N V>2Ph-Ph

Sets the combination of measured input voltage that will be used for the overvoltage elements.

Note: If any stage is disabled, the associated text in the setting menu cell setting will remain visible but will not affect the operation of the stage that is enabled.

0 = V>1 & V>2 Any Ph,

1 = V>1 & V>2 3Phase,

2 = V>1AnyPh V>2 3Ph,

3 = V>1 3Ph V>2AnyPh

Setting that determines whether any phase or all three phases has to satisfy the overvoltage criteria before a decision is made.

Note: If any stage is disabled, the associated text in the setting menu cell setting will remain visible but will not affect the operation of the stage that is enabled.

V>1 Function 42 10 DT 0 = Disabled, 1 = DT or 2 = IDMT

Page (ST) 4-50 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Tripping characteristic setting for the first stage overvoltage element.

The IDMT characteristic available on the first stage is defined by the following formula:

t = K/(M - 1)

Where:

K = Time multiplier setting

t = Operating time in seconds

M = Measured voltage/relay setting voltage (V<>Voltage Set)

V>1 Voltage Set 42 11 130

Sets the pick-up setting for first stage overvoltage element.

60V to 185V step 1V

V>1 Time Delay 42 12 10 0s to 100s step 0.01s

Setting for the operating time-delay for the first stage definite time overvoltage element.

V>1 TMS 42 13 1 0.5 to 100 step 0.5

Setting for the time multiplier setting to adjust the operating time of the IDMT characteristic.

V>2 Status 42 14 Disabled

Setting to enable or disable the second stage overvoltage element.

0 = Disabled or 1 = Enabled

V>2 Voltage Set 42 15 150 60V to 185V step 1V

This setting determines the pick-up setting for the second stage overvoltage element.

V>2 Time Delay 42 16 0.5 0s to 100s step 0.01s

Setting for the operating time-delay for the second stage definite time overvoltage element.

COMPENSATED OV 42 20 0

0

Cp V>1 Function 42 23 Disabled 0 = Disabled, 1 = DT or 2 = IDMT

Tripping characteristic setting for the first stage compensated overvoltage element.

The IDMT characteristic available on the first stage is defined by the following formula:

t = K/(M - 1)

Where:

K = Time multiplier setting

t = Operating time in seconds

M = Remote calculated voltage/relay setting voltage (V<>Voltage Set)

Cp V>1 Volt Set 42 24 75 60V to 110V step 1V

Sets the pick-up setting for first stage overvoltage element. This is set in terms of the phase to neutral voltage.

Cp V>1 Tim Delay 42 25 10 0s to 100s step 0.01s

Setting for the operating time-delay for the first stage definite time compensated overvoltage element.

Cp V>1 TMS 42 26 1 0.5 to 100 step 0.5

Setting for the time multiplier setting to adjust the operating time of the IDMT characteristic.

Cp V>2 Status 42 27 Disabled

Setting to enable or disable the second stage compensated overvoltage element.

0 = Disabled or 1 = Enabled

Cp V>2 Volt Set 42 28 85 60V to 110V step 1V

This setting determines the pick-up setting for the second stage overvoltage element.

Cp V>2 Tim Delay 42 29 0.5 0s to 100s step 0.01s

Setting for the operating time-delay for the second stage definite time compensated overvoltage element.

Table 16 - Voltage protection

P54x/EN ST/Nd5 Page (ST) 4-51

(ST) 4 Settings Group Settings

3.16 Frequency Protection

The relay includes four stages of underfrequency and two stages of overfrequency protection to facilitate load shedding and subsequent restoration. The underfrequency stages may be optionally blocked by a pole dead (CB Open) condition.

MENU TEXT Col Row Default Setting

Description

Available Setting

GROUP 1 FREQ

PROTECTION

43 0 0

This column contains settings for Frequency

UNDER FREQUENCY 43

0

1 0

F<1 Status 43 2 Enabled

Setting to enable or disable the first stage underfrequency element.

F<1 Setting 43 3 49.5

0 = Disabled or 1 = Enabled

45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the first stage underfrequency element.

F<1 Time Delay 43 4 4 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the first stage underfrequency element.

F<2 Status 43 5 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage underfrequency element.

F<2 Setting 43 6 49 45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the second stage underfrequency element.

F<2 Time Delay 43 7 3 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the second stage underfrequency element.

F<3 Status 43 8 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the third stage underfrequency element.

F<3 Setting 43 9 48.5 45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the third stage underfrequency element.

F<3 Time Delay 43 0A 2 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the third stage underfrequency element.

0 = Disabled or 1 = Enabled F<4 Status 43 0B Disabled

Setting to enable or disable the fourth stage underfrequency element.

F<4 Setting 43 0C 48 45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the fourth stage underfrequency element.

F<4 Time Delay 43 0D 1 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the fourth stage underfrequency element.

F< Function Link 43 0E 0x00 = 0000 0000

Bit 0 = F<1 U/V Block,

Bit 1 = F<2 U/V Block,

Bit 2 = F<3 U/V Block,

Bit 3 = F<4 U/V Block,

Bit 4 = Not used, Bit 5 = Not Used,

Bit 6 = Not used, Bit 7 = Not Used

Settings that determines whether undervoltage level (setting CB FAIL & P.DEAD/POLEDEAD VOLTAGE/V< ) signal block the underfrequency elements.

OVER FREQUENCY 43

0

0F 0

F>1 Status 43 10 Enabled 0 = Disabled or 1 = Enabled

Page (ST) 4-52 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting to enable or disable the first stage overfrequency element.

F>1 Setting 43 11 50.5 45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the first stage overfrequency element.

F>1 Time Delay 43 12 2 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the first stage overfrequency element.

F>2 Status 43 13 Disabled

Setting to enable or disable the second stage overfrequency element.

0 = Disabled or 1 = Enabled

F>2 Setting 43 14 51 45 to 66.3 step 0.01

Setting that determines the pick-up threshold for the second stage overfrequency element.

F>2 Time Delay 43 15 1 0s to 100s step 0.01s

Setting that determines the minimum operating time-delay for the second stage overfrequency element.

Table 17 - Frequency protection

3.17 Independent Rate of Change of Frequency Protection

The relay provides four independent stages of rate of change of frequency protection

(df/dt+t). Depending upon whether the rate of change of frequency setting is set positive or negative, the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero.

Col Row Default Setting Available Setting MENU TEXT

Description

GROUP 1 DF/DT

PROTECTION

44 0 0

This column contains settings for rate of change of Frequency df/dt Avg.Cycles 44 1 6 6 to 12 step 6

This setting is available for calculating the rate of change of frequency measurement over a fixed period of either 6 or 12 cycles.

0 = Disabled or 1 = Enabled df/dt>1 Status 44 4 Enabled

Setting to enable or disable the first stage df/dt element. df/dt>1 Setting 44 5 2

Pick-up setting for the first stage df/dt element.

0.1 to 10 step 0.1 df/dt>1 Dir'n 44 6 Negative 0 = Negative, 1 = Positive, 2 = Both

This setting determines whether the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero.

0s to 100s step 0.01s df/dt>1 Time 44 7 0.5

Minimum operating time-delay setting for the first stage df/dt element. df/dt>2 Status 44 0B Enabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage df/dt element. df/dt>2 Setting 44 0C 2

Pick-up setting for the second stage df/dt element. df/dt>2 Dir'n 44 0D Negative

0.1 to 10 step 0.1

0 = Negative, 1 = Positive, 2 = Both

P54x/EN ST/Nd5 Page (ST) 4-53

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

This setting determines whether the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero. df/dt>2 Time 44 0E 1 0s to 100s step 0.01s

Minimum operating time-delay setting for the second stage df/dt element. df/dt>3 Status 44 12 Enabled

Setting to enable or disable the third stage df/dt element. df/dt>3 Setting 44 13 2 df/dt>4 Status 44 19 Enabled

Setting to enable or disable the fourth stage df/dt element. df/dt>4 Setting 44 1A 2

Pick-up setting for the fourth stage df/dt element.

0 = Disabled or 1 = Enabled

0.1 to 10 step 0.1

Pick-up setting for the third stage df/dt element. df/dt>3 Dir'n df/dt>3 Time

44

44

14

15

Negative

2

Minimum operating time-delay setting for the third stage df/dt element.

0 = Negative, 1 = Positive, 2 = Both

This setting determines whether the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero.

0s to 100s step 0.01s

0 = Disabled or 1 = Enabled

0.1 to 10 step 0.1 df/dt>4 Dir'n df/dt>4 Time

44 1B Negative

44 1C 3

Minimum operating time-delay setting for the fourth stage df/dt element.

0 = Negative, 1 = Positive, 2 = Both

This setting determines whether the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero.

0s to 100s step 0.01s

Table 18 - DF/DT protection

3.18 Circuit Breaker (CB) Fail and Pole Dead Detection Function

CB Fail Function

This function consists of a two-stage Circuit Breaker (CB) fail function initiated by:

Current-based or Voltage-based protection elements

External protection elements.

For current-based protection, the reset condition is based on undercurrent operation to determine that the CB has opened. For the non-current based protection, the reset criteria may be selected by means of a setting for determining a CB Failure condition.

It is common practice to use low set undercurrent elements in protection relays to indicate that circuit breaker poles have interrupted the fault or load current, as required.

Pole Dead Function

The Pole Dead Detection consists of a two user-settable level detectors:

Undercurrent

Undervoltage

The undercurrent setting is shared with CB Fail protection. Both, undercurrent and undervoltage settings are also used for CNV (Current No Volt) function in TOC protection.

Page (ST) 4-54 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

CB1 BREAKER FAIL 45

CB Fail 1 Status 45

01

02

(Sub Heading)

Enabled

Setting to enable or disable the first stage of the circuit breaker function.

CB1 Fail 1 Status 45 02 Enabled

Available Setting

0 = Disabled or 1 = Enabled

0 = Disabled or 1 = Enabled

Setting to enable or disable the first stage of the circuit breaker function.

CB Fail 1 Timer 45 03 0.2 0s to 10s step 0.01s

Setting for the circuit breaker fail timer stage 1, during which breaker opening must be detected. There are timers per phase to cope with evolving faults, but the timer setting is common.

CB1 Fail 1 Timer 45 03 0.2 0s to 10s step 0.01s

Setting for the circuit breaker fail timer stage 1, during which breaker opening must be detected. There are timers per phase to cope with evolving faults, but the timer setting is common.

CB Fail 2 Status 45 04 Disabled

Setting to enable or disable the second stage of the circuit breaker function.

0 = Disabled or 1 = Enabled

CB1 Fail 2 Status 45 04 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage of the circuit breaker function.

CB Fail 2 Timer 45 05 0.4 0s to 10s step 0.01s

Setting for the circuit breaker fail timer stage 2, during which breaker opening must be detected.

CB1 Fail 2 Timer 45 05 0.4 0s to 10s step 0.01s

Setting for the circuit breaker fail timer stage 2, during which breaker opening must be detected.

Volt Prot Reset 45 06 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the circuit breaker fail time for voltage protection function initiated circuit breaker fail conditions.

CB1 Volt Prot Reset 45 06 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the circuit breaker fail time for voltage protection function initiated circuit breaker fail conditions.

Ext Prot Reset 45 07 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the circuit breaker fail time for external protection function initiated circuit breaker fail conditions.

CB1 Ext Prot Reset 45 07 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the circuit breaker fail time for external protection function initiated circuit breaker fail conditions.

WI Prot Reset 45 08 Disabled 0 = Disabled or 1 = Enabled

When Enabled, CB Fail timers will be reset by drop off of a weak infeed trip condition, providing that WI trip logic is activated.

UNDER CURRENT

0

45 0A 0

I< Current Set 45 0B 0.05 0.02*In to 3.2*In step 0.01*In

Setting that determines the circuit breaker fail timer reset current for overcurrent based protection circuit breaker fail initiation.

This setting is also used in the pole dead logic to determine the status of the pole (dead or live).

CB1 I< Current Set 45 0B 0.05 0.02*In to 3.2*In step 0.01*In

Setting that determines the circuit breaker fail timer reset current for overcurrent based protection circuit breaker fail initiation.

This setting is also used in the pole dead logic to determine the status of the pole (dead or live).

CB2 I< Current Set 45 0C 0.05 0.02*In to 3.2*In step 0.01*In

P54x/EN ST/Nd5 Page (ST) 4-55

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that determines the circuit breaker fail timer reset current for overcurrent based protection circuit breaker fail initiation.

This setting is also used in the pole dead logic to determine the status of the pole (dead or live).

ISEF< Current 45 0D 0.02 0.001*InSef to 0.8*InSef step 0.0005*InSef

Setting that determines the circuit breaker fail timer reset current for Sensitive earth fault (SEF) protection circuit breaker fail initiation.

POLEDEAD

VOLTAGE

45 0E

V< 45 10 38.1

Under voltage level detector for pole dead detection

10V to 40V step 0.1V

CB2 BREAKER FAIL 45

CB2 Fail 1 Status 45

21

22

(Sub-Heading)

Enabled

Setting to enable or disable the first stage of the 2nd circuit breaker function.

0 = Disabled or 1 = Enabled

CB2 Fail 1 Timer 45 23 0.2 s 0s to 10s step 0.01s

Setting for the 2nd circuit breaker fail timer stage 1, during which breaker opening must be detected. There are timers per phase to cope with evolving faults, but the timer setting is common

CB2 Fail 2 Status 45 24 Disabled 0 = Disabled or 1 = Enabled

Setting to enable or disable the second stage of the 2nd circuit breaker function

CB2 Fail 2 Timer 45 25 0.4 s 0s to 10s step 0.01s

Setting for the 2nd circuit breaker fail timer stage 2, during which breaker opening must be detected.

CB2 Volt Prot Reset 45 26 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the 2nd circuit breaker fail time for voltage protection function initiated circuit breaker fail conditions.

CB2 Ext Prot Reset 45 27 Prot Reset & I<

0 = I< Only, 1 = CB Open & I<, 2 = Prot Reset

& I<

Setting which determines the elements that will reset the 2nd circuit breaker fail time for external protection function initiated circuit breaker fail conditions.

Table 19 - Circuit breaker fail and pole dead detection function

3.19

MENU TEXT

GROUP 1

SUPERVISION

Supervision (VTS, CTS, Inrush Detection, Special Weak Infeed

Blocking and Trip Supervision)

The Trip Supervision feature is used to provide to the Differential and Distance protection functions a confirmation of the presence of a fault, based on overcurrent, undervoltage or/and delta current/delta voltage criteria.

The VTS feature within the relay operates on detection of Negative Phase Sequence

(NPS) voltage without the presence of NPS current.

The CT Supervision (CTS) feature operates on detection of derived zero sequence current, in the absence of corresponding derived zero sequence voltage that would normally accompany it.

The Special Weak Infeed Blocking is not normally applied, and is described in detail later in this service manual.

Col Row Default Setting Available Setting

Description

46 0 0

Page (ST) 4-56 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

This column contains settings for Voltage and Current Supervision

VTS Mode 46 1 Measured + MCB

0 = Measured + MCB,

1 = Measured Only, 2 = MCB Only

Setting that determines the method to be used to declare VT failure.

VTS Status 46 2 Blocking 0 = Disabled, 1 = Blocking, 2 = Indication

This setting determines whether the following operations will occur upon detection of VTS.

• VTS set to provide alarm indication only.

• Optional blocking of voltage dependent protection elements.

• Optional conversion of directional overcurrent elements to non-directional protection

(available when set to blocking mode only). These settings are found in the function links cell of the relevant protection element columns in the menu.

VTS Reset Mode 46 3 Auto 0 = Manual or 1 = Auto

The VTS block will be latched after a user settable time delay ‘VTS Time Delay’. Once the signal has latched then two methods of resetting are available. The first is manually via the front panel interface (or remote communications) and secondly, when in ‘Auto’ mode, provided the VTS condition has been removed and the 3 phase voltages have been restored above the phase level detector settings for more than 240 ms.

VTS Time Delay 46 4 5 1s to 10s step 0.1s

Setting that determines the operating time-delay of the element upon detection of a voltage supervision condition.

VTS I> Inhibit 46 5 10 0.08*In to 32*In step 0.01In

The setting is used to override a voltage supervision block in the event of a phase fault occurring on the system that could trigger the voltage supervision logic.

VTS I2> Inhibit 46 6 0.05 0.05*In to 0.5*In step 0.01*In

The setting is used to override a voltage supervision block in the event of a fault occurring on the system with negative sequence current above this setting which could trigger the voltage supervision logic.

Inrush Detection 46 0E Disabled 0 = Disabled or 1 = Enabled

This setting is to enable/disable the Inrush Detection used for the Distance protection.

Inrush Detection 46 0E Disabled 0 = Disabled or 1 = Enabled

This setting is to enable/disable the Inrush Detection used for the Distance protection if Phase Differential Protection is disabled or set Compensation is not set to Transformer.

I>2nd Harmonic 46 0F 20 10 to 100 step 5

If the level of second harmonic in any phase current or neutral current exceeds the setting, inrush conditions will be recognized by changing the status of four DDB signals from low to high in the Programmable Scheme Logic (PSL). The user then has a choice to use them further in the PSL in accordance with the application.

I>2nd Harmonic 46 0F 20 10 to 100 step 5

If the level of second harmonic in any phase current or neutral current exceeds the setting, inrush conditions will be recognized by changing the status of four DDB signals from low to high in the Programmable Scheme Logic (PSL). The user then has a choice to use them further in the PSL in accordance with the application.

WI Inhibit 46 11 Enabled 0 = Disabled or 1 = Enabled

This setting enables (turns on) or disables (turns off) a special feature to cover scenarios when there is a very weak positive or negative sequence source behind the relay, but the zero sequence infeed is large. Special to stub-end transformer feeding, where the stub end has no generation, but has solid earthing at a Yd transformer neutral.

I0/I2 Setting

CT SUPERVISION

0

46 12 3 2 to 3 step 0.2

If the ratio of zero sequence current to negative sequence current exceeds the setting, all protection elements such as

Distance, DEF and Delta that could potentially operate during a genuine weak infeed condition will be inhibited. This setting will be visible only if ‘WI Inhibit’ is enabled.

46 30 0

CTS Mode 46 31 Disabled

0 = Disabled, 1 = Standard / Enabled,

2 = I Diff, 3 = IDiff + Std

P54x/EN ST/Nd5 Page (ST) 4-57

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting to disable, enable the standard (voltage dependant) CTS or enable the Differential (current based, communication dependant) CTS or allow both CTS algorithms to work simultaneously

CTS Status 46 32 Restrain 0 = Restrain or 1 = Indication

This setting determines whether the following operations will occur upon detection of CTS.

• CTS set to provide alarm indication only.

• CTS set to restrain local protection

Note: The setting applies to both CTS algorithms. The settings are visible if CTS Mode is not disabled.

CTS Reset Mode 46 33 Manual 0 = Manual or 1 = Auto

The CTS block will be latched after a user settable time delay ‘CTS Time Delay’. Once the signal has latched then two methods of resetting are available. The first is manually via the front panel interface (or remote communications) and secondly, when in ‘Auto’ mode, provided the CTS condition has been removed. The setting is common for both CTS algorithms. The setting is visible if CTS Mode is not disabled.

CTS Time Delay 46 34 5 0s to 10s step 0.01s

Setting that determines the operating time-delay of the element upon detection of a current transformer supervision condition.

The setting is common for both CTS algorithms. The setting is visible if CTS Mode is not disabled

CTS VN< Inhibit 46 35 5 0.5V to 22V step 0.5V

This setting is used to inhibit the current transformer supervision element should the zero sequence voltage exceed this setting.

The setting is visible if ‘Standard’ or ‘Standard’ + ‘I Diff’ CTS Mode is chosen.

CTS IN> Set 46 36 0.1 0.08*In to 4*In step 0.01In

This setting determines the level of zero sequence current that must be present for a valid current transformer supervision condition. The setting is visible if ‘Standard’ or ‘Standard’ + ‘I Diff’ CTS Mode is chosen.

CTS i1 > 46 37 0.1 0.05*In to 4*In step 0.01In

Setting that determines if the circuit is loaded. If the positive sequence current calculated by the relay exceed this value, the relay declares load condition at relay end. The setting is visible if ‘I Diff’ or ‘Standard’ + ‘I Diff’ CTS Mode is set.

CTS i2/i1> 46 38 0.05 0.05 to 1 step 0.01

Setting above which an asymmetrical fault condition or a CT problem is declared. The setting is visible if ‘I Diff’ or ‘Standard’ +

‘I Diff’ CTS Mode is set

CTS i2/i1>> 46 39 0.4 0.05 to 1 step 0.01

Setting above which a CT failure is declared providing that CTS i2/i1> threshold at any other CT set connected to the differential zone relay has not been exceed. The setting is visible if ‘I Diff’ or ‘Standard’ + ‘I Diff’ CTS Mode is set.

Stage 1 TS 46 61 Disabled

Setting to enable/disable the first stage of supervision

0 = Disabled or 1 = Enabled

I> Threshold 46 62 1

Threshold of Over-current supervision element

0.08*In to 4*In step 0.01*In

I> TS Elements

IN> TS Elements

46

46

63

65

0x00

0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the current is above the threshold. If set to 0, the element will have no influence on the function

IN> Threshold 46 64 1

Threshold of Earth Fault over-current supervision element

0.08*In to 4*In step 0.01*In

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

Page (ST) 4-58 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the neutral current is above the threshold. If set to

0, the element will have no influence on the function

OCD> Threshold 46 66 1

Threshold for the delta over-current supervision element.

0.05*In to 0.2*In step 0.01*In

OCD> TS Elements 46 67 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta current is above the threshold. If set to 0, the element will have no influence on the function

Vpp< Threshold 46 68 1 10V to 120V step 1V

Threshold for the under phase-to-phase voltage supervision element.

Vpp< TS Elements 46 69 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-to-phase voltage is below the threshold. If set to 0, the element will have no influence on the function

Vpn< Threshold 46 6A 1 10V to 120V step 1V

Threshold for the under phase-neutral voltage supervision element.

Vpn< TS Elements 46 6B 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-neutral voltage is below the threshold.

If set to 0, the element will have no influence on the function

UVD> Threshold 46 6C 1

Threshold for the delta phase-neutral voltage supervision element.

I> TS Elements 46 72 0x00

1V to 20V step 1V

UVD> TS Elements 46 6D 0x00

I> Threshold 46 71 1

Threshold of Over-current supervision element

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta phase-neutral voltage is over the threshold. If set to 0, the element will have no influence on the function

Stage 2 TS 46 70 Disabled

Setting to enable/disable the second stage of supervision

0 = Disabled or 1 = Enabled

0.08*In to 4*In step 0.01*In

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

P54x/EN ST/Nd5 Page (ST) 4-59

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the current is above the threshold. If set to 0, the element will have no influence on the function

IN> Threshold 46 73 1

Threshold of Earth Fault over-current supervision element

0.08*In to 4*In step 0.01*In

IN> TS Elements 46 74 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the neutral current is above the threshold. If set to

0, the element will have no influence on the function

OCD> Threshold 46 75 1 0.05*In to 0.2*In step 0.01*In

Threshold for the delta over-current supervision element.

OCD> TS Elements 46 76 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta current is above the threshold. If set to 0, the element will have no influence on the function

Vpp< Threshold 46 77 1 10V to 120V step 1V

Threshold for the under phase-to-phase voltage supervision element.

Vpp< TS Elements 46 78 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-to-phase voltage is below the threshold. If set to 0, the element will have no influence on the function

Vpn< Threshold 46 79 1

Threshold for the under phase-neutral voltage supervision element.

10V to 120V step 1V

Vpn< TS Elements 46 7A 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-neutral voltage is below the threshold.

If set to 0, the element will have no influence on the function

UVD> Threshold 46 7B 1

Threshold for the delta phase-neutral voltage supervision element.

1V to 20V step 1V

UVD> TS Elements 46 7C 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta phase-neutral voltage is over the threshold. If set to 0, the element will have no influence on the function

Page (ST) 4-60 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Stage 3 TS 46 80 Disabled

Setting to enable/disable the third stage of supervision

I> Threshold 46 81 1

Available Setting

0 = Disabled or 1 = Enabled

0.08*In to 4*In step 0.01*In

Threshold of Over-current supervision element

I> TS Elements 46 82 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the current is above the threshold. If set to 0, the element will have no influence on the function

IN> Threshold 46 83 1 0.08*In to 4*In step 0.01*In

Threshold of Earth Fault over-current supervision element

IN> TS Elements 46 84 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the neutral current is above the threshold. If set to

0, the element will have no influence on the function

OCD> Threshold 46 85 1

Threshold for the delta over-current supervision element.

0.05*In to 0.2*In step 0.01*In

OCD> TS Elements

Vpp< TS Elements

46

46

86

88

0x00

0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta current is above the threshold. If set to 0, the element will have no influence on the function

Vpp< Threshold 46 87 1

Threshold for the under phase-to-phase voltage supervision element.

10V to 120V step 1V

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-to-phase voltage is below the threshold. If set to 0, the element will have no influence on the function

Vpn< Threshold 46 89 1

Threshold for the under phase-neutral voltage supervision element.

10V to 120V step 1V

Vpn< TS Elements 46 8A 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the phase-neutral voltage is below the threshold.

If set to 0, the element will have no influence on the function

P54x/EN ST/Nd5 Page (ST) 4-61

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

UVD> Threshold 46 8B 1

Threshold for the delta phase-neutral voltage supervision element.

Available Setting

1V to 20V step 1V

UVD> TS Elements 46 8C 0x00

Bit 0 = Zone 1, Bit 1 = Zone 2,

Bit 2 = Zone 3, Bit 3 = Zone 4,

Bit 4 = Zone P, Bit 5 = Zone Q,

Bit 6 = Current Diff,

Bit 7 = Aided Distance

A binary flag cell with bits for each of the distance zone functions, one bit for the Aided Scheme trip and one bit for Line

Differential function. If the flag is set to 1, the function will be allowed to trip if the delta phase-neutral voltage is over the threshold. If set to 0, the element will have no influence on the function

Table 20 - Supervision

3.20 System Checks (Check Sync. Function)

The relay has a two-stage Check Synchronization function that can be set independently.

System Checks (Check Sync. Function) for P543/P545

The MiCOM P543/P545 has a two stage Check Synchronization function that can be set independently.

System Checks (Check Sync. Function) for P544/P546

The MiCOM P544/P546 has a two-stage Check Synchronization function that can be set independently for each circuit breaker.

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

GROUP 1

SYSTEM

CHECKS

48 00

This column contains settings for System Checks

VOLTAGE

MONITORS

48 14

Live Line 48 85 32 5 to 132 step 0.5

Line is considered Live with voltage above this setting.

Dead Line 48 86 13 5 to 132 step 0.5

Line is considered Dead with voltage below this setting.

Live Bus 1 48 87 32 5 to 132 step 0.5

Bus 1 is considered Live with voltage above this setting.

Dead Bus 1 48 88 13 5 to 132 step 0.5

Bus 1 is considered Dead with voltage below this setting.

Live Bus 2 48 89 32 5 to 132 step 0.5

Bus 2 is considered Live with voltage above this setting.

Dead Bus 2 48 8A 13 5 to 132 step 0.5

Bus 2 is considered Dead with voltage below this setting.

CS UV 48 8B 54 5 to 120 step 0.5

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (ST) 4-62 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Check Synch Undervoltage setting decides that System Check Synchronism logic for CB1 will be blocked if V< is one of the selected options in setting CB1 CS Volt.Blk (48 8 E), and either line or bus voltage is below this setting.

System Check Synchronism for CB2 will be blocked if V< is one of the selected options in setting CB2 CS Volt. Blk (48 9 C), and either line or bus voltage is below this setting.

CS OV 48 8C 130 60 to 200 step 0.5 * * * *

Check Synch Overvoltage setting decides that System Check Synchronism logic for CB1 is blocked if V> is one of the selected options in setting CB1 CS Volt.Blk (48 8 E), and either line or bus voltage is above this setting.

System Check Synchronism for CB2 is blocked if V> is one of the selected options in setting CB2 CS Volt. Blk (48 9 C), and either line or bus voltage is above this setting.

System Checks 48 8D Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable both stages of system checks for reclosing.

If System Checks is set to Disabled, all other menu settings associated with synchronism checks become invisible, and a DDB

(880) signal SysChks Inactive is set.

Sys Checks

CB1

48 8D Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable both stages of system checks for reclosing CB1

If Sys Checks CB1 is set to Disabled, all other menu settings associated with synchronism checks for CB1 become invisible, and a DDB (880) signal SChksInactiveCB1 is set.

CS Voltage

Block

48 8E V<

0 = None,

1 = V<,

2 = V>,

3 = Vdiff>,

4 = V< and V>,

5 = V< and Vdiff>,

6 = V> and Vdiff>,

7 = V< V> and Vdiff>

* *

Setting to determine which, if any, conditions should block synchronism check (undervoltage V<, overvoltage V>, and/or voltage differential Vdiff etc) for the line and bus voltages.

CB1 CS Volt.

Blk

48 8E V<

0 = None,

1 = V<,

2 = V>,

3 = Vdiff>,

4 = V< and V>,

5 = V< and Vdiff>,

6 = V> and Vdiff>,

7 = V< V> and Vdiff>

* *

Setting to determine which, if any, conditions should block synchronism check for CB1 (undervoltage V<, overvoltage V>, and/or voltage differential Vdiff etc) for the line and bus voltages.

CS1 Status 48 8F Enabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable the stage 1 synchronism check elements for auto-reclosing and manual closing of CB.

CB1 CS1 Status 48 8F Enabled

0 = Disabled or 1 =

Enabled

*

Setting to enable or disable the stage 1 synchronism check elements for auto-reclosing and manual closing CB1.

CS1 Angle 48 90 20 0 to 90 step 1 * *

*

Maximum permitted phase angle between Line and Bus 1 voltages for first stage synchronism check element to reclose CB.

CB1 CS1 Angle 48 90 20 0 to 90 step 1 * *

Maximum permitted phase angle between Line and Bus 1 voltages for first stage synchronism check element to reclose CB1.

CS1 VDiff 48 91 6.5 1 to 120 step 0.5 * *

P54x/EN ST/Nd5 Page (ST) 4-63

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Check Synch Voltage differential setting decides that stage 1 System Check Synchronism logic is blocked if Vdiff> is one of the selected options in setting CS Voltage Block (48 8 E), and voltage magnitude difference between line and bus 1 voltage is above this setting.

CB1 CS1 VDiff 48 91 6.5 1 to 120 step 0.5 * *

Check Synch Voltage differential setting decides that stage 1 System Check Synchronism logic for CB1 is blocked if Vdiff> is one of the selected options in setting CB1 CS Volt. Blk (48 8 E), and voltage magnitude difference between line and bus 1 voltage is above this setting.

CS1 Slip Ctrl 48 92 Enabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable blocking of synchronism check stage 1 for reclosing CB by excessive frequency difference (slip) between line and bus voltages

(refer to setting CS1 Slip Freq).

CB1 CS1

SlipCtrl

48 92 Enabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable blocking of synchronism check stage 1 for reclosing CB1 by excessive frequency difference (slip) between line and bus voltages

(refer to setting CB1 CS1 SlipFreq).

CS1 Slip Freq 48 93 0.05

If CS1 Slip Ctrl is enabled, synchronism check stage 1 is blocked for reclosing CB if measured frequency difference between line and bus voltages is greater than this setting.

CB1 CS1

SlipFreq

48 93 0.05

0.005 to 2 step 0.005 *

0.005 to 2 step 0.005 *

*

*

If CB1 CS1 SlipCtrl is enabled, synchronism check stage 1 is blocked for reclosing CB1 if measured frequency difference between line and bus voltages is greater than this setting.

CS2 Status 48 94 Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable the stage 2 synchronism check elements for auto-reclosing and manual closing CB.

CB1 CS2 Status 48 94 Disabled

0 = Disabled or 1 =

Enabled

*

Setting to enable or disable the stage 2 synchronism check elements for auto-reclosing and manual closing CB1.

*

CS2 Angle 48 95 20 0 to 90 step 1 * *

Maximum permitted phase angle between Line and Bus 1 voltages for second stage synchronism check element to reclose CB

CB1 CS2 Angle 48 95 20 0 to 90 step 1 * *

Maximum permitted phase angle between Line and Bus 1 voltages for second stage synchronism check element to reclose

CB1

CS2 VDiff 48 96 6.5 1 to 120 step 0.5 * *

Check Synch Voltage differential setting decides that stage 2 System Check Synchronism logic is blocked if Vdiff> is one of the selected options in setting CS Voltage Block (48 8 E), and voltage magnitude difference between line and bus 1 voltage is above this setting.

CB1 CS2 VDiff 48 96 6.5 1 to 120 step 0.5 * *

Check Synch Voltage differential setting decides that stage 2 System Check Synchronism logic for CB1 is blocked if Vdiff> is one of the selected options in setting CB1 CS Volt.Blk (48 8 E), and voltage magnitude difference between line and bus 1 voltage is above this setting.

CS2 Slip Ctrl 48 97 Enabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable blocking of synchronism check stage 2 for reclosing CB by excessive frequency difference (slip) between line and bus voltages (refer to setting CS2 Slip Freq)

CB1 CS2

SlipCtrl

48 97 Enabled

0 = Disabled or 1 =

Enabled

* *

Page (ST) 4-64 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Setting to enable or disable blocking of synchronism check stage 2 for reclosing CB1 by excessive frequency difference (slip) between line and bus voltages (refer to setting CB1 CS2 SlipFreq)

CS2 Slip Freq 48 98 0.05 0.005 to 2 step 0.005 * *

If CS2 Slip Ctrl is enabled, synchronism check stage 2 is blocked for reclosing CB if measured frequency difference between line and bus voltages is greater than this setting.

CB1 CS2

SlipFreq

48 98 0.05 0.005 to 2 step 0.005 * *

If CB1 CS2 SlipCtrl is enabled, synchronism check stage 2 is blocked for reclosing CB1 if measured frequency difference between line and bus voltages is greater than this setting.

CS2 Adaptive 48 99 Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable Adaptive CB closing with System Check Synchronism stage 2 closing for CB: logic uses set CB CI

Time to issue CB close command at such a time that the predicted phase angle difference when CB main contacts touch is as close as possible to 0 degrees. If Adaptive closing is disabled, the logic issues CB close command as soon as phase angle comes within set limit at CB CS2 Angle .

CB1 CS2

Adaptive

48 99 Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable Adaptive CB closing with System Check Synchronism stage 2 closing for CB1: logic uses set CB1

CI Time to issue CB1 close command at such a time that the predicted phase angle difference when CB1 main contacts touch is as close as possible to 0 degrees. If Adaptive closing is disabled, the logic issues CB1 close command as soon as phase angle comes within set limit at CB1 CS2 Angle .

CB Cl Time 48 9A 0.05 0.01 to 0.5 step 0.001 * *

This sets CB closing time, from receipt of CB close command until main contacts touch.

CB1 Cl Time 48 9A 0.05 0.01 to 0.5 step 0.001

This sets CB1 closing time, from receipt of CB1 close command until main contacts touch.

* *

Sys Checks

CB2

48 9B Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable both stages of system checks for reclosing CB2.

If Sys Checks CB2 is set to Disabled, all other menu settings associated with synchronism checks for CB2 become invisible, and a DDB (1484) signal SChksInactiveCB2 is set.

CB2 CS Volt.

Blk

48 9C V<

0 = None,

1 = V<,

2 = V>,

3 = Vdiff>,

4 = V< and V>,

5 = V< and Vdiff>,

6 = V> and Vdiff>,

7 = V< V> and Vdiff>

* *

Setting to determine which, if any, conditions should block synchronism check for CB2 (undervoltage V<, overvoltage V>, and/or voltage differential Vdiff etc) for the line and bus voltages.

CB2 CS1 Status 48 9D Enabled

0 = Disabled or 1 =

Enabled

*

Setting to enable or disable the stage 1 synchronism check elements for auto-reclosing and manual closing CB2.

*

CB2 CS1 Angle 48 9E 20 0 to 90 step 1 * *

Maximum permitted phase angle between Line and Bus 2 voltages for first stage synchronism check element to reclose CB2.

CB2 CS1 VDiff 48 9F 6.5 1 to 120 step 0.5 * *

Check Synch Voltage differential setting decides that stage 1 System Check Synchronism logic for CB2 is blocked if Vdiff> is one of the selected options in setting CB2 CS Volt. Blk (48 9C), and voltage magnitude difference between line and bus 2 voltage is above this setting.

P54x/EN ST/Nd5 Page (ST) 4-65

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

CB2 CS1

SlipCtrl

48 A0 Enabled

Description

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable blocking of synchronism check stage 1 for reclosing CB2 by excessive frequency difference (slip) between line and bus voltages (refer to setting CB2 CS1 SlipFreq).

CB2 CS1

SlipFreq

48 A1 0.05 0.005 to 2 step 0.005 * *

If CB2 CS1 SlipCtrl is enabled, synchronism check stage 1 is blocked for reclosing CB2 if measured frequency difference between line and bus voltages is greater than this setting.

CB2 CS2 Status 48 A2 Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable the stage 2 synchronism check elements for auto-reclosing and manual closing CB2.

CB2 CS2 Angle 48 A3 20 0 to 90 step 1 * *

Maximum permitted phase angle between Line and Bus 2 voltages for second stage synchronism check element to reclose

CB2.

CB2 CS2 VDiff 48 A4 6.5 1 to 120 step 0.5 * *

Check Synch Voltage differential setting decides that stage 2 System Check Synchronism logic for CB2 is blocked if Vdiff> is one of the selected options in setting CB2 CS Volt. Blk (48 9C), and voltage magnitude difference between line and bus 2 voltage is above this setting.

CB2 CS2

SlipCtrl

48 A5 Enabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable blocking of synchronism check stage 2 for reclosing CB2 by excessive frequency difference (slip) between line and bus voltages (refer to setting CB2 CS2 SlipFreq)

CB2 CS2

SlipFreq

48 A6 0.05 0.005 to 2 step 0.005 * *

If CB2 CS2 SlipCtrl is enabled, synchronism check stage 2 is blocked for reclosing CB2 if measured frequency difference between line and bus voltages is greater than this setting.

CB2 CS2

Adaptive

48 A7 Disabled

0 = Disabled or 1 =

Enabled

* *

Setting to enable or disable Adaptive CB closing with System Check Synchronism stage 2 closing for CB2: logic uses set CB2

CI Time to issue CB2 close command at such a time that the predicted phase angle difference when CB2 main contacts touch is as close as possible to 0 degrees. If adaptive closing is disabled, the logic issues CB2 close command as soon as phase angle comes within set limit at CB2 CS2 Angle.

* CB2 Cl Time 48 A8 0.05 0.01 to 0.5 step 0.001

This sets CB2 closing time, from receipt of CB2 close command until main contacts touch

*

MAN SYS

CHECKS

48 B0 * * * *

Num CBs 48 B1 CB1 Only

0 = CB1 Only, 1 =

CB2 Only or 2 = Both

CB1 & CB2

* *

This setting is only visible if the CB Control by cell (Cell 0701 under CB CONTROL column) is ‘Enabled’.

If visible, the setting dictates which of the circuit breakers (CB1 only, CB2 only, or both CB1 & CB2) can be manually closed.

CBM SC required

48 B2 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any manual (operator-controlled) closure of CB. If Enabled, system check is required for closure. If Disabled, system check is not required.

CB1M SC required

48 B2 Disabled

0 = Disabled or 1 =

Enabled

* *

Page (ST) 4-66 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any manual (operator-controlled) closure of CB1. If Enabled, system check is required for closure. If Disabled, system check is not required.

CBM SC CS1 48 B3 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to close by manual control when the system satisfies all the System Check Synchronism Stage 1 conditions as listed under the setting CS1 Status in the SYSTEM CHECKS column.

CB1M SC CS1 48 B3 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the system satisfies all the System Check Synchronism Stage 1 conditions as listed under the setting CB1 CS1 Status in the SYSTEM CHECKS column.

CBM SC CS2 48 B4 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the system satisfies all the System Check Synchronism Stage 2 conditions as listed under the setting CS2 Status in the SYSTEM CHECKS column.

CB1M SC CS2 48 B4 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the system satisfies all the System Check Synchronism Stage 2 conditions as listed under the setting CB1 CS2 Status in the SYSTEM CHECKS column.

CBM SC DLLB 48 B5 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to close by manual control when the dead line & live bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB1M SC DLLB 48 B5 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the dead line & live bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CBM SC LLDB 48 B6 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to close by manual control when the live line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB1M SC LLDB 48 B6 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the live line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CBM SC DLDB 48 B7 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to close by manual control when the dead line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB1M SC DLDB 48 B7 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to close by manual control when the dead line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2M SC required

48

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any manual (operator-controlled) closure of CB2. If Enabled, system check is required for closure. If Disabled, system check is not required.

CB2M SC CS1 48

B8

B9

Disabled

Disabled

0 = Disabled or 1 =

Enabled

0 = Disabled or 1 =

Enabled

*

*

*

*

P54x/EN ST/Nd5 Page (ST) 4-67

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

This setting enables CB2 to close by manual control when system satisfies all the System Check Synchronism Stage 1 conditions as listed under the setting CB2 CS1 Status in the SYSTEM CHECKS column.

CB2M SC CS2 48 BA Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to close by manual control when the system satisfies all the System Check Synchronism Stage 2 conditions as listed under setting CB2 CS2 status in the SYSTEM CHECKS column.

CB2M SC DLLB 48 BB Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to close by manual control when the dead line & live bus2 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2M SC LLDB 48 BC Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to close by manual control when the live line & dead bus2 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2M SC DLDB 48 BD Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to close by manual control when the dead line & dead bus2 conditions are satisfied as set in the

SYSTEM CHECKS column.

Table 21 - System checks (check sync. function)

3.21 Auto-Reclose Function

The auto-reclose functionality differs between the P543/P545 and the P544/P546 since the P543/P545 can only control one circuit breaker, whereas the P544/P546 can control two. Accordingly, therefore, the settings are different for the two.

As from Software Version D1a, the Auto-Reclose can now be configured so that it skips the first shot. This means that the first AR cycle is skipped (missed), and so starts Dead

Time 2 at the first reclose attempt.

This is done by changing DDB No 1384 (Skip Shot 1 = Enabled/Disabled) as required.

This means that this signal can now be mapped from an opto to a comms input.

Auto-Reclose Function (P543/P545)

The MiCOM P543/P545 will initiate auto-reclose for fault clearances by any instantaneous trip allocated in the PSL to DDB Trip Inputs A,B or C (DDB 530,531 or 532 respectively). The default PSL includes differential trip, Zone 1 trip and aided trips. In addition, other distance zones, Aided DEF, Directional comparison, phase and earth overcurrent protection and Trip On Reclose (TOR) may be set to initiate auto-reclose, when required. This is done in the settings (shown here after). Protection such as voltage, frequency, thermal etc. will block auto-reclose.

The following shows the relay settings for the auto-reclose function, which must be set in conjunction with the Circuit Breaker Control settings under main Menu. The available setting ranges and factory defaults are shown.

Page (ST) 4-68 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

Auto-Reclose Function (P544/P546)

The MiCOM P544/P546 can be set to initiate auto-reclose for fault clearances by Zone 1 trips, phase differential trips, distance aided trips, other distance zones, Aided DEF,

Directional comparison, phase and earth overcurrent protection and Trip On Reclose

(TOR). This is configured in the settings (shown here after). Other protection functions such as voltage, frequency, thermal etc. will block auto-reclose.

The following shows the relay settings for the auto-reclose function, which must be set in conjunction with the Circuit Breaker Control settings under main Menu. The available setting ranges and factory defaults are shown.

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

GROUP 1

AUTORECLOSE

49 00 * * *

This column contains settings for Autoreclose

Num CBs 49 50 CB1 Only

0 = CB1 Only, 1 =

CB2 Only or 2 = CB1

& CB2

*

Setting defines which CB(s) are active for the specific installation: CB1 only, CB2 only or both CB1 & CB2.

*

*

AR Mode 49 51 AR 3P

0 = 1P, 1 = 1/3P, 2

= 3P or 3 = AR

Opto

* *

If the Num CBs setting (cell 4950 {above} in the AUTORECLOSE column) is set to CB1 Only, or CB2 Only, then this setting determines which auto-reclose modes are permitted for the circuit breaker : single phase (AR 1P) only, both single phase and three phase (AR 1/3P), three phase only (AR 3P), or the auto-reclosing mode is controlled by opto input signals (AR Opto) mapped via DDBs (1497) AR Mode 1P and (1498) AR Mode 3P.

AR Mode 49 51 AR 3P

0 = 1P, 1 = 1/3P, 2

= 3P or 3 = AR

Opto

* *

This setting determines which auto-reclose modes are permitted for the circuit breaker : single phase (AR 1P) only, both single phase and three phase (AR 1/3P), three phase only (AR 3P), or the auto-reclosing mode is controlled by opto input signals (AR

Opto) mapped via DDBs (1497) AR Mode 1P and (1498) AR Mode 3P.

Lead/Foll ARMode 49

Setting determines which auto-reclose modes are permitted for leader /follower circuit breakers.

The auto-reclose scheme provides single phase or three phase auto-reclosing of a feeder switched by two circuit breakers.

The two circuit breakers are normally arranged to reclose sequentially with one, designated the ‘Leader’ circuit breaker, reclosing after a set dead time followed, if the leader CB remains closed, by the second circuit breaker, designated the

‘Follower’ circuit breaker after a further delay (follower time).

L1P F1P : both leader and follower are configured for single phase auto-reclosing.

L1P F3P : the leader is configured for single phase auto-reclosing, whilst the follower is configured for three phase autoreclosing.

L3P F3P : both leader and follower are configured for three phase auto-reclosing.

L1/3P F1/3P : both leader and follower are configured for either single phase or three phase auto-reclosing.

L1/3P F3P : the leader is configured for single phase or three phase auto-reclosing, while the follower is configured for three phase auto-reclosing only.

AR Opto : the auto-reclosing mode of the leader and follower are controlled by opto input signals (Opto) mapped via DDBs

(1497) Lead AR 1P, (1498) Lead AR 3P, (1409) Follower AR 1P, and (1410) Follower AR 3P.

No BF if L No CS 49

53

54

L 3P, F 3P

Disabled

0 = L 1P, F 1P,

1 = L 1P, F 3P,

2 = L 3P, F 3P,

3 = L 1/3P, F 1/3P,

4 = L 1/3P, F 3P,

5 = AR Opto

0 = Disabled or 1 =

Enabled

*

*

*

*

P54x/EN ST/Nd5 Page (ST) 4-69

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

No BF if L No CS = No Block Follower reclose if Leader has No Check Sync conditions. This setting determines whether a follower CB should lock out without reclosing, or continue to reclose, if the leader CB can not reclose because check sync conditions are not met. If No BF if L No CS is set to Enable, follower CB can continue its reclose cycle, no matter if the leader

CB can not reclose due to check sync conditions not met. If No BF if L No CS is set to Disable, follower CB is locked out due to the fact that leader CB can not reclose due to Check Sync conditions not being met.

Leader Select By 49 55 Menu

0 = Menu, 1 = Opto,

2 = Control

* *

Setting which determines how the preferred leader CB is selected - can be by menu setting, HMI command or by designated opto input.

If Leader Select By: is set to Leader by Opto, then preferred leader CB is :-

• CB1 if input DDB(1408) CB2 Lead is low, or

• CB2 if input DDB (1408) CB2 Lead is high.

If Leader Select By: is set to Leader by Control, then user control setting CTRL CB2 Lead under CB CONTROL in the IED menu determines the preferred leader by applying set/reset commands (If Set then CB2 is leader ,If Reset then CB1 is leader).

Select Leader 49 56 CB1 0 = CB1 or 1 = CB2 * *

If Leader Select By is set to Leader by Menu in the previous cell, then setting Select Leader becomes visible, and determines which CB is the preferred leader.

BF if LFail Cls 49 57 Enabled

0 = Disabled or 1 =

Enabled

* *

BF if L Fail Cls = Block Follower reclose if Leader CB Fails to close. This setting determines whether a follower CB should lock out without reclosing, or continue to reclose, if the leader CB fails to reclose when the leader CB close command is given.

If BF if L Fail Cls is set to Enable, follower CB reclosing is locked out if the leader fails to close.

If BF if L Fail Cls is set to Disable, the follower CB can continue its reclose cycle if the leader CB fails to close. (See also setting Dynamic F/L).

Dynamic F/L 49 58 Disabled

0 = Disabled or 1 =

Enabled

* *

Dynamic F/L = Dynamic change from follower to leader status during an auto-reclose cycle if the leader CB fails to close.

If setting BF if Lfail Cls is set to Disabled, then setting Dynamic F/L becomes visible and determines whether the follower CB should assume leader status and reclose immediately if the leader CB should fail to close, or whether it should continue as follower and reclose after the Follower Time delay.

Dynamic F/L set to Enabled selects immediate follower reclose if the leader CB fails to close;

Dynamic F/L set to Disabled selects the follower to reclose after the Follower Time if leader CB fails to close.

AR Shots 49 59 1 1 to 4 step 1 * *

This setting determines how many reclose attempts (shots) are permitted for any single fault incident before it is treated as persistent and auto-reclosing is locked out. For example if AR Shots = 2, a second reclose attempt is initiated if the protection retrips during the reclaim time following one reclose attempt, but locks out if the protection retrips during the reclaim time after a second reclose attempt.

AR Shots 49 59 1 1 to 4 step 1 * *

This setting determines how many reclose attempts (shots) are permitted for any single fault incident before it is treated as persistent and auto-reclosing is locked out. For example if AR Shots = 2, a second reclose attempt is initiated if the protection retrips during the reclaim time following one reclose attempt, but locks out if the protection retrips during the reclaim time after a second reclose attempt.

AR Skip Shot 1 49 5A Disable

0 = Disabled or 1 =

Enabled

* *

AR Skip Shot 1 49 5A Disable

0 = Disabled or 1 =

Enabled

* *

Multi Phase AR 49 5C Allow AR

0 = Allow Autoclose,

1 = BAR 2 and 3Ph,

2 = BAR 3 Phase

*

This setting determines whether auto-reclosing is permitted or blocked for two phase or three phase faults.

*

Page (ST) 4-70 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Multi Phase AR 49 5C Allow AR

0 = Allow Autoclose,

1 = BAR 2 and 3Ph, *

2 = BAR 3 Phase

*

This setting determines whether auto-reclosing is permitted or blocked for two phase or three phase faults.

Discrim Time 49 5D 0.1

0.005s to 5s step

0.005s

* *

Discrim Time = Discriminating Time. This is a setting which determines whether a fault on another phase (evolving or developing fault) after single phase trip and auto-reclose has been initiated by a single phase fault stops the single phase cycle and starts a three phase auto-reclose cycle provided this second fault (evolving fault) occurs BEFORE the Discrimination Time elapsed. It forces a lockout if second fault

(evolving fault) occurs AFTER Discrimination Time has elapsed but before Single Phase Dead Time elapses.

Discrim Time 49 5D 0.1

0.005s to 5s step

0.005s

* *

Discrim Time = Discriminating Time. This is a setting which determines whether a fault on another phase (evolving or developing fault) after single phase trip and auto-reclose has been initiated by a single phase fault stops the single phase cycle and starts a three phase auto-reclose cycle provided this second fault (evolving fault) occurs BEFORE the Discrimination Time elapsed. It forces a lockout if second fault

(evolving fault) occurs AFTER Discrimination Time has elapsed but before Single Phase Dead Time elapses.

CB IS Time 49 60 5

0.1s to 200s step

0.1s

* * * *

CB IS Time = CB In Service Time. This is a timer setting for which a CB must remain closed (and optionally the line be live) before it is considered to be In Service.

CB IS

MemoryTime

49 61 0.5

0.01s to 1s step

0.01s

* * * *

CB IS Memory Time is a timer setting which allows a CB In Service state to be remembered for a short period following changeover of the CB auxiliary switch contacts to a CB Open state. This may occasionally be necessary for a few types of CB with exceptionally fast acting auxiliary switch contacts which allow the auto-reclose scheme logic to detect the CB opening before it detects an associated protection operation.

DT Start by Prot 49 62 Prot Res

0 = Prot Res, 1 =

Prot Op or 2 =

Disabled

* * * *

DT Start by Prot = Dead Time Start By Protection action. If DT Start by Prot is set to Disable, a dead time start is not directly affected by protection operation or reset, but is enabled by other conditions or events (see settings: 3PDTStart WhenLD and

DTStart by CB Op).

If DT Start by Prot is set to Protection Op, the dead time starting is enabled when the auto-reclose initiation signal is received from the protection. If DT Start by Prot is set to Protection Reset, the dead time starting is inhibited until the auto-reclose initiation signal from the protection resets.

3PDTStart

WhenLD

49

49

63

63

Disabled

Disabled

0 = Disabled or 1 =

Enabled

*

*

*

*

3PDTStart When LD = three phase auto-reclose dead time starts when the line has gone dead. If Enabled, the line is required to go dead before a 3 phase auto-reclose dead time can start. If Disabled, dead time can start when other selected conditions are satisfied, irrespective of line volts.

3PDTStart

WhenLD

0 = Disabled or 1 =

Enabled

3PDTStart When LD = three phase auto-reclose dead time starts when the line has gone dead. If Enabled, the line is required to go dead before a 3 phase auto-reclose dead time can start. If Disabled, dead time can start when other selected conditions are satisfied, irrespective of line volts.

DTStart by CB Op 49 64 Disabled

0 = Disabled or 1 =

Enabled

* * * *

If Enabled, a dead time start is permitted only when the CB has tripped. If Disabled, a dead time start is permitted when other selected conditions are satisfied, irrespective of the CB position.

Dead Line Time 49 66 5 1s to 9999s step 1s * *

P54x/EN ST/Nd5 Page (ST) 4-71

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

When 3PDTStart When LD is Enabled, and the line does not go dead within the set Dead Line Time period, then the logic will force the auto-reclose sequence to lockout after expiry of this time.

Dead Line Time 49 66 5 1s to 9999s step 1s * *

When 3PDTStart When LD is Enabled, and the line does not go dead within the set Dead Line Time period, then the logic will force the auto-reclose sequence to lockout after expiry of this time.

0s to 10s step 0.01s * * SP AR Dead Time 49 67 0.5

Dead time setting for single phase auto-reclose.

SP AR Dead Time 49 67 0.5

Dead time setting for single phase auto-reclose.

0s to 10s step 0.01s * *

3P AR DT Shot 1 49 68 0.3

0.01s to 300s step

0.01s

Dead time setting for three phase auto-reclose (first shot).

3P AR DT Shot 1 49 68 0.3

0.01s to 300s step

0.01s

Dead time setting for three phase auto-reclose (first shot).

*

3P AR DT Shot 2 49 69 60 1s to 9999s step 1s

Dead time setting for three phase auto-reclose (2nd shot).

3P AR DT Shot 2 49 69 60 1s to 9999s step 1s *

Dead time setting for three phase auto-reclose (2nd shot).

3P AR DT Shot 3 49 6A 60 1s to 9999s step 1s

Dead time setting for three phase auto-reclose (3rd shot).

3P AR DT Shot 3 49 6A 60 1s to 9999s step 1s *

Dead time setting for three phase auto-reclose (3rd shot).

3P AR DT Shot 4 49 6B 60 1s to 9999s step 1s

Dead time setting for three phase auto-reclose (4th shot).

3P AR DT Shot 4 49 6B 60 1s to 9999s step 1s *

Dead time setting for three phase auto-reclose (4th shot).

Follower Time 49 6C 5

0.1s to 300s step

0.01s

Time delay setting for follower CB reclosing after leader CB has reclosed.

SPAR

ReclaimTime

49 6D 60 1s to 600s step 1s

Reclaim time setting following single phase auto-reclosure.

SPAR

ReclaimTime

49 6D 60 1s to 600s step 1s

Reclaim time setting following single phase auto-reclosure.

*

3PAR

ReclaimTime

49 6E 180 1s to 600s step 1s

Reclaim time setting following three phase auto-reclosure.

3PAR

ReclaimTime

49 6E 180 1s to 600s step 1s

Reclaim time setting following three phase auto-reclosure.

*

AR

CBHealthyTime

49 6F 5

0.01s to 9999s step

0.01s

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (ST) 4-72 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Maximum waiting time to enable CB Closing by auto-reclose.

Input DDB (436) CB Healthy CB Close by auto-reclose.

If the set time runs out with the input DDB: CB Healthy low (= 0), alarm AR CB Unhealthy (DDB307) is set and the auto-reclose sequence is cancelled.

AR

CBHealthyTime

49 6F 5

0.01s to 9999s step

0.01s

* *

Maximum waiting time to enable CB Closing by auto-reclose.

Input DDBs (436/437) are used for CB1 Healthy & CB2 Healthy respectively to enable CB1 and CB2 Close by auto-reclose.

If the set time runs out with the input DDB: CBx Healthy low (= 0), alarm AR CBx Unhealthy (DDB307 or 329 for CB1 & CB2 respectively) is set and the CBx auto-reclose sequence is cancelled.

AR

CheckSyncTime

49 70 5

0.01s to 9999s step

0.01s

* *

Maximum waiting time for relevant signal CB SCOK from system check logic, to enable CB Close by auto-reclose.

If the set time runs out with the input signal CB SCOK low (= 0), System Check Synchronization fail alarm AR CB NO C/S

(DDB 308) is set and the auto-reclose sequence is cancelled.

AR

CheckSyncTime

49 70 5

0.01s to 9999s step

0.01s

* *

Maximum waiting time for relevant signals CB1L SCOK or CB1F SCOK from system check logic, to enable CB1 Close by autoreclose.

Same waiting time setting applies to input signals CB2L SCOK or CB2F SCOK to enable CB2 Close by auto-reclose.

If the set time runs out with the input signal CBx SCOK low (= 0), System Check Synchronization fail alarm AR CBx NO C/S

(DDB 308 or 330 for CB1 & CB2 respectively) is set and the CBx auto-reclose sequence is cancelled.

Z1 AR 49 72 Initiate AR

0 = Initiate AR or 1

= Block AR

Setting that determines impact of instantaneous zone 1 on AR operation.

(Only in models with distance option)

Dist Aided AR 49 74 Initiate AR

0 = Initiate AR or 1

= Block AR

Setting that determines impact of the aided distance schemes tripping on AR operation.

(Only in models with distance option)

*

*

Z2T AR 49 75 Block AR

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

*

Setting that determines impact of time delayed zone 2 on AR operation. Set Initiate AR if the trip should initiate a cycle, and

Block AR if a time delayed trip should cause lockout. Set No action if Zone 2 tripping should exert no specific logic control on the recloser.

(Only in models with distance option)

Z3T AR 49 76 Block AR

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

Similar application to Z3T AR. Selection for Zone 3 trips.

(Only in models with distance option)

ZPT AR 49 77 Block AR

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

Similar application to ZPT AR. Selection for Zone 3 trips.

(Only in models with distance option)

Z4T AR 49 78 Block AR

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

Similar application to Z4T AR. Selection for Zone 4 trips.

(Only in models with distance option)

*

*

*

P54x/EN ST/Nd5 Page (ST) 4-73

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

DEF Aided AR 49 79 Block AR

Description

0 = Initiate AR or 1

= Block AR

Setting that determines impact of aided Directional Earth Fault protection (DEF) on AR operation.

(Only in models with distance option)

Dir. Comp AR 49 7A Block AR

0 = Initiate AR or 1

= Block AR

Setting that determines impact of aided Directional Comparison protection (DEF) on AR operation.

(Only in models with distance option)

TOR AR 49 7B Block AR

0 = Initiate AR or 1

= Block AR

*

*

*

Setting that determines impact of Trip On Reclose (TOR) on AR operation.

(Only in models with distance option)

I>1 AR 49 7C No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the first stage overcurrent protection on AR operation.

I>2 AR 49 7D No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the second stage overcurrent protection on AR operation.

I>3 AR 49 7E No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

*

Setting that determines impact of the third stage overcurrent protection on AR operation.

*

I>4 AR 49 7F No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the fourth stage overcurrent protection on AR operation.

IN>1 AR 49 80 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the first stage earth fault overcurrent protection on AR operation.

IN>2 AR 49 81 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

*

*

*

*

*

*

Setting that determines impact of the second stage earth fault overcurrent protection on AR operation.

IN>3 AR 49 82 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the third stage earth fault overcurrent protection on AR operation.

*

IN>4 AR 49 83 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* *

Setting that determines impact of the fourth stage earth fault overcurrent protection on AR operation.

*

ISEF>1 AR 49 84 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* * *

Setting that determines impact of the first stage sensitive earth fault overcurrent protection on AR operation.

*

*

*

*

*

*

*

*

*

Page (ST) 4-74 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

ISEF>2 AR 49 85 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* * *

Setting that determines impact of the second stage sensitive earth fault overcurrent protection on AR operation.

ISEF>3 AR 49 86 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* * *

Setting that determines impact of the third stage sensitive earth fault overcurrent protection on AR operation.

ISEF>4 AR 49 87 No Action

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

* * *

Setting that determines impact of the fourth stage sensitive earth fault overcurrent protection on AR operation.

*

*

*

ZQT AR 49 88 Block AR

0 = No Action, 1 =

Initiate AR or 2 =

Block AR

*

Setting that determines impact of time delayed zone Q on AR operation. Set Initiate AR if the trip should initiate a cycle, and

Block AR if a time delayed trip should cause lockout. Set No action if Zone Q tripping should exert no specific logic control on the re-closer.

(Only in models with distance option)

AR SYS CHECKS 49 A5 * * * *

CB SC all 49 A6 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any auto-reclose of CB. If

Enabled, system check is required for some or all reclosures. If Disabled, system check is not required for any reclosures.

CB1L SC all 49 A6 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any auto-reclose of CB1 as leader.

If Enabled, system check is required for some or all reclosures. If Disabled, system check is not required for any reclosures.

CB SC Shot 1 49 A7 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for the first shot reclosure of CB. If

Enabled, system check is required for the first shot reclosure. If Disabled, system check is not required for the first shot reclosure.

CB1L SC Shot 1 49 A7 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for the first shot reclosure of CB1 as leader. If Enabled, system check is required for the first shot reclosure. If Disabled, system check is not required for the first shot reclosure.

CB SC ClsNoDly 49 A8 Disabled

0 = Disabled or 1 =

Enabled

* *

If CB SC ClsNoDly is Enabled, CB can reclose as leader as soon as the synchro check conditions are satisfied, without waiting for the dead time to elapse.

This option is sometimes required for the second line end to reclose onto a line with delayed auto-reclosing (typical cycle: first line end recloses after the dead time with live bus & dead line, then the second line end recloses immediately with live bus & live line in synchronism).

CB1L SC

ClsNoDly

49 A8 Disabled

0 = Disabled or 1 =

Enabled

* *

P54x/EN ST/Nd5 Page (ST) 4-75

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

If CB1L SC ClsNoDly is Enabled, CB1 can reclose as leader as soon as the synchro check conditions are satisfied, without waiting for the dead time to elapse.

This option is sometimes required for the second line end to reclose onto a line with delayed auto-reclosing (typical cycle: first line end recloses after the dead time with live bus & dead line, then the second line end recloses immediately with live bus & live line in synchronism).

CB SC CS1 49 A9 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 1 criteria as defined under CB CS1 Status settings in the SYSTEM CHECKS column.

CB1L SC CS1

This setting enables CB1 to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 1 criteria as defined under CB1 CS1 Status settings in the SYSTEM CHECKS column.

CB SC CS2 49 AA Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 2 criteria as defined under the setting CB CS2 Status in the SYSTEM CHECKS column.

CB1L SC CS2

49

49

A9

AA

Disabled

Disabled

0 = Disabled or 1 =

Enabled

0 = Disabled or 1 =

Enabled

*

*

*

*

This setting enables CB1 to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 2 criteria as defined under the setting CB1 CS2 status in the SYSTEM CHECKS column.

CB SC DLLB 49 AB Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to auto-reclose as leader when the dead line & live bus1 conditions are satisfied as set in the SYSTEM

CHECKS column.

CB1L SC DLLB 49 AB Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as leader when the dead line & live bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB SC LLDB 49 AC Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to auto-reclose as leader when the live line & dead bus1 conditions are satisfied as set in the SYSTEM

CHECKS column.

CB1L SC LLDB 49 AC Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as leader when the live line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB SC DLDB 49 AD Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB to auto-reclose as leader when the dead line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB1L SC DLDB 49 AD Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as leader when the dead line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2L SC all 49 AE Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as leader when the dead line & dead bus1 conditions are satisfied as set in the

SYSTEM CHECKS column.

Page (ST) 4-76 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

CB2L SC Shot 1 49 AF Disabled

Description

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for the first shot reclosure of CB2 as leader. If Enabled, system check is required for the first shot reclosure. If Disabled, system check is not required for the first shot reclosure.

CB2L SC

ClsNoDly

49 B0 Disabled

0 = Disabled or 1 =

Enabled

* *

If CB2L SC ClsNoDly is Enabled, CB2 can reclose as leader as soon as the synchro check conditions are satisfied, without waiting for the dead time to elapse.

This option is sometimes required for the second line end to reclose on a line with delayed auto-reclosing (typical cycle: the first line end recloses after the dead time with live bus & dead line, then the second line end recloses immediately with live bus & live line in synchronism).

CB2L SC CS1 49 B1 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 1 criteria as defined under CB2 CS1 Status settings in the SYSTEM CHECKS column.

CB2L SC CS2 49 B2 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as leader when the system satisfies all the System Check Synchronism Stage 2 criteria as defined under CB2 CS2 Status settings in the SYSTEM CHECKS column.

CB2L SC DLLB

This setting enables CB2 to auto-reclose as leader when the dead line & live bus 2 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2L SC LLDB

49

49

B3

B4

Disabled

Disabled

0 = Disabled or 1 =

Enabled

0 = Disabled or 1 =

Enabled

*

*

*

*

This setting enables CB2 to auto-reclose as leader when the live line & dead bus 2 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB2L SC DLDB 49 B5 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as leader when the dead line & dead bus 2 conditions are satisfied as set in the

SYSTEM CHECKS column.

CB1F SC all 49 B6 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any auto-reclose of CB1 as follower. If Enabled, system check is required for some or all reclosures. If Disabled, system check is not required for any reclosures.

CB1F SC Shot 1 49 B7 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for the first shot reclosure of CB1 as follower. If Enabled, system check is required for the first shot reclosure. If Disabled, system check is not required for the first shot reclosure.

CB1F SC CS1 49 B8 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as follower when the system satisfies all the System Check Synchronism Stage 1 conditions as listed under setting CB1 CS1 Status in the SYSTEM CHECKS column.

CB1F SC CS2 49 B9 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as follower when system satisfies all the System Check Synchronism Stage 2 conditions as listed under setting CB1 CS2 Status in the SYSTEM CHECKS settings.

P54x/EN ST/Nd5 Page (ST) 4-77

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

CB1F SC DLLB 49 BA Disabled

Description

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as follower when the dead line & live bus1 conditions are satisfied in the SYSTEM

CHECKS column.

CB1F SC LLDB 49 BB Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as follower when the live line & dead bus1 conditions are satisfied in the SYSTEM

CHECKS column.

CB1F SC DLDB 49 BC Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB1 to auto-reclose as follower when the “dead line” & “dead bus1” conditions are satisfied in the

SYSTEM CHECKS settings.

CB2F SC all 49 BD Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for any auto-reclose of CB2 as follower. If Enabled, system check is required for some or all reclosures. If Disabled, system check is not required for any reclosures.

CB2F SC Shot 1 49 BE Disabled

0 = Disabled or 1 =

Enabled

* *

This setting determines whether a system check (e.g. live bus / dead line etc) is required for the first shot reclosure of CB2 as follower. If Enabled, system check is required for the first shot reclosure. If Disabled, system check is not required for the first shot reclosure.

CB2F SC CS1 49 BF Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as follower when the system satisfies all the System Check Synchronism Stage 1 conditions as listed under setting CB2 CS1 Status in the SYSTEM CHECKS column.

CB2F SC CS2

This setting enables CB2 to auto-reclose as follower when system satisfies all the System Check Synchronism Stage 2 conditions as listed under setting CB2 CS2 Status in the SYSTEM CHECKS settings.

CB2F SC DLLB

49

49

C0

C1

Disabled

Disabled

0 = Disabled or 1 =

Enabled

0 = Disabled or 1 =

Enabled

*

*

*

*

This setting enables CB2 to auto-reclose as follower when the dead line & live bus 2 conditions are satisfied in the SYSTEM

CHECKS column.

CB2F SC LLDB 49 C2 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as follower when the live line & dead bus 2 conditions are satisfied in the SYSTEM

CHECKS column.

CB2F SC DLDB 49 C3 Disabled

0 = Disabled or 1 =

Enabled

* *

This setting enables CB2 to auto-reclose as follower when the dead line & dead bus 2 conditions are satisfied in the SYSTEM

CHECKS settings.

Table 22 - Auto-reclose function

Page (ST) 4-78 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

3.22 Input Labels

MENU TEXT

The column GROUP x INPUT LABELS is used to individually label each opto input that is available in the relay. The text is restricted to 16 characters and is available if ‘Input

Labels’ are set visible under CONFIGURATION column.

Col Row Default Setting

Description

Available Setting

GROUP 1 INPUT

LABELS

4A 0 0

This column contains settings for Input Labels

Opto Input 1

Label for Opto Input 1

4A 1 Input L1

2 Input L2 Opto Input 2

Label for Opto Input 2

4A

Opto Input 3 4A 3 Input L3

Label for Opto Input 3

Opto Input 4 4A

Label for Opto Input 4

Opto Input 5 4A

Label for Opto Input 5

Opto Input 6 4A

Label for Opto Input 6

Opto Input 7 4A

4

5

6

7

Input L4

Input L5

Input L6

Input L7

Label for Opto Input 7

Opto Input 8 4A

Label for Opto Input 8

Opto Input 9

Label for Opto Input 9

4A

Opto Input 10 4A

Label for Opto Input 10

Opto Input 11 4A

Label for Opto Input 11

Opto Input 12 4A

Label for Opto Input 12

Opto Input 13 4A

Label for Opto Input 13

Opto Input 14 4A

Label for Opto Input 14

Opto Input 15 4A

Label for Opto Input 15

Opto Input 16 4A

Label for Opto Input 16

Opto Input 17 4A

Label for Opto Input 17

Opto Input 18 4A

8

9

0A

0B

0C

0D

0E

0F

10

11

12

Input L8

Input L9

Input L0A

Input L0B

Input L0C

Input L0D

Input L0E

Input L0F

Input L10

Input L11

Input L12

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

P54x/EN ST/Nd5 Page (ST) 4-79

(ST) 4 Settings Group Settings

MENU TEXT Col Row

Label for Opto Input 18

Opto Input 19 4A

Label for Opto Input 19

Opto Input 20 4A

Label for Opto Input 20

Opto Input 21 4A

Label for Opto Input 21

Opto Input 22 4A

Label for Opto Input 22

Opto Input 23 4A

Label for Opto Input 23

Opto Input 24 4A

Label for Opto Input 24

Table 23 - Input labels

13

14

15

16

17

18

Input L13

Input L14

Input L15

Input L16

Input L17

Input L18

Default Setting

Description

Available Setting

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

3.23 Output Labels

The column GROUP x OUTPUT LABELS is used to individually label each output relay that is available in the relay. The text is restricted to 16 characters and is available if

‘Output Labels’ are set visible under CONFIGURATION column.

MENU TEXT Col Row

GROUP 1 OUTPUT

LABELS

4B 0 0

This column contains settings for Output Relay Labels

1 Output R1

Default Setting

Description

Relay 1 4B

Label for output relay 1

Relay 2 4B 2 Output R2

Label for output relay 2

Relay 3 4B

Label for output relay 3

Relay 4 4B

Label for output relay 4

Relay 5 4B

Label for output relay 5

Relay 6 4B

3

4

5

6

Output R3

Output R4

Output R5

Output R6

Label for output relay 6

Relay 7 4B

Label for output relay 7

Relay 8 4B

Label for output relay 8

7

8

Output R7

Output R8

Available Setting

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

Page (ST) 4-80 P54x/EN ST/Nd5

Group Settings

MENU TEXT

Relay 9 4B

Label for output relay 9

Relay 10 4B

Label for output relay 10

Relay 11 4B

Label for output relay 11

Relay 12 4B

Label for output relay 12

Relay 13 4B

Label for output relay 13

Relay 14 4B

Label for output relay 14

Relay 15 4B

Label for output relay 15

Relay 16 4B

Label for output relay 16

Relay 17 4B

Label for output relay 17

Relay 18 4B

Label for output relay 18

Relay 19 4B

Label for output relay 19

Relay 20 4B

Label for output relay 20

Relay 21 4B

Label for output relay 21

Relay 22 4B

Label for output relay 22

Relay 23 4B

Label for output relay 23

Relay 24 4B

Label for output relay 24

Relay 25 4B

Label for output relay 25

Relay 26 4B

Label for output relay 26

Relay 27 4B

Label for output relay 27

Relay 28 4B

Label for output relay 28

Relay 29 4B

Label for output relay 29

Relay 30 4B

Col Row

9 Output R9

Default Setting

Description

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

Output R0A

Output R0B

Output R0C

Output R0D

Output R0E

Output R0F

Output R10

Output R11

Output R12

Output R13

Output R14

Output R15

Output R16

Output R17

Output R18

Output R19

Output R1A

Output R1B

Output R1C

Output R1D

Output R1E

(ST) 4 Settings

Available Setting

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

16 character custom name

P54x/EN ST/Nd5 Page (ST) 4-81

(ST) 4 Settings

MENU TEXT Col Row

Label for output relay 30

Relay 31 4B

Label for output relay 31

Relay 32 4B

Label for output relay 32

Table 24 - Output labels

1F

20

Output R1F

Output R20

Default Setting

Description

3.24

MENU TEXT

DR CHAN LABELS 2A

0

Digital Input 1 2A

Label for DR Channel 1

Digital Input 2 2A

Label for DR Channel 2

Digital Input 3 2A

Label for DR Channel 3

Digital Input 4 2A

Label for DR Channel 4

Digital Input 5 2A

Label for DR Channel 5

Digital Input 6 2A

Label for DR Channel 6

Digital Input 7 2A

Label for DR Channel 7

Digital Input 8 2A

Label for DR Channel 8

Digital Input 9 2A

Label for DR Channel 9

Digital Input 10 2A

Label for DR Channel 10

Digital Input 11 2A

Label for DR Channel 11

Digital Input 12 2A

Label for DR Channel 12

Digital Input 13 2A

Label for DR Channel 13

Digital Input 14 2A

Label for DR Channel 14

DR Chan Labels

Col Row Default Setting

Description

0

1

2

3

4

5

6

7

8

9

0A

0B

0C

0D

0E

0

Label for DR Channel 1

Label for DR Channel 2

Label for DR Channel 3

Label for DR Channel 4

Label for DR Channel 5

Label for DR Channel 6

Label for DR Channel 7

Label for DR Channel 8

Label for DR Channel 9

Label for DR Channel 10

Label for DR Channel 11

Label for DR Channel 12

Label for DR Channel 13

Label for DR Channel 14

Page (ST) 4-82

Group Settings

Available Setting

16 character custom name

16 character custom name

Available Setting

0

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

P54x/EN ST/Nd5

Group Settings

MENU TEXT

Digital Input 15 2A

Label for DR Channel 15

Digital Input 16 2A

Label for DR Channel 16

Digital Input 17 2A

Label for DR Channel 17

Digital Input 18 2A

Col Row

0F

Default Setting

Description

Label for DR Channel 15

10

11

12

Label for DR Channel 16

Label for DR Channel 17

Label for DR Channel 18

Label for DR Channel 18

Digital Input 19 2A

Label for DR Channel 19

Digital Input 20 2A

Label for DR Channel 20

Digital Input 21 2A

Label for DR Channel 21

Digital Input 22 2A

Label for DR Channel 22

Digital Input 23 2A

Label for DR Channel 23

Digital Input 24 2A

Label for DR Channel 24

Digital Input 25 2A

Label for DR Channel 25

13

14

15

16

17

18

19

Label for DR Channel 19

Label for DR Channel 20

Label for DR Channel 21

Label for DR Channel 22

Label for DR Channel 23

Label for DR Channel 24

Label for DR Channel 25

1A Label for DR Channel 26 Digital Input 26 2A

Label for DR Channel 26

Digital Input 27 2A

Label for DR Channel 27

Digital Input 28 2A

Label for DR Channel 28

Digital Input 29 2A

Label for DR Channel 29

Digital Input 30 2A

Label for DR Channel 30

Digital Input 31 2A

Label for DR Channel 31

Digital Input 32 2A

Label for DR Channel 32

Digital Input 33 2A

Label for DR Channel 33

Digital Input 34 2A

Label for DR Channel 34

Digital Input 35 2A

Label for DR Channel 35

Digital Input 36 2A

1B

1C

1D

1E

1F

20

21

22

23

24

Label for DR Channel 27

Label for DR Channel 28

Label for DR Channel 29

Label for DR Channel 30

Label for DR Channel 31

Label for DR Channel 32

Label for DR Channel 33

Label for DR Channel 34

Label for DR Channel 35

Label for DR Channel 36

(ST) 4 Settings

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

P54x/EN ST/Nd5 Page (ST) 4-83

(ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Label for DR Channel 36

Digital Input 37 2A

Label for DR Channel 37

Digital Input 38 2A

Label for DR Channel 38

Digital Input 39 2A

Label for DR Channel 39

Digital Input 40 2A

Label for DR Channel 40

Digital Input 41 2A

Label for DR Channel 41

Digital Input 42 2A

Label for DR Channel 42

Digital Input 43 2A

Label for DR Channel 43

Digital Input 44 2A

Label for DR Channel 44

Digital Input 45 2A

Label for DR Channel 45

Digital Input 46 2A

Label for DR Channel 46

Digital Input 47 2A

Label for DR Channel 47

Digital Input 48 2A

Label for DR Channel 48

Digital Input 49 2A

Label for DR Channel 49

Digital Input 50 2A

Label for DR Channel 50

Digital Input 51 2A

Label for DR Channel 51

Digital Input 52 2A

Label for DR Channel 52

Digital Input 53 2A

Label for DR Channel 53

Digital Input 54 2A

Label for DR Channel 54

Digital Input 55 2A

Label for DR Channel 55

Digital Input 56 2A

Label for DR Channel 56

Digital Input 57 2A

Label for DR Channel 57

25

26

27

28

29

2A

2B

2C

2D

2E

2F

30

31

32

33

34

35

36

37

38

39

Label for DR Channel 37

Label for DR Channel 38

Label for DR Channel 39

Label for DR Channel 40

Label for DR Channel 41

Label for DR Channel 42

Label for DR Channel 43

Label for DR Channel 44

Label for DR Channel 45

Label for DR Channel 46

Label for DR Channel 47

Label for DR Channel 48

Label for DR Channel 49

Label for DR Channel 50

Label for DR Channel 51

Label for DR Channel 52

Label for DR Channel 53

Label for DR Channel 54

Label for DR Channel 55

Label for DR Channel 56

Label for DR Channel 57

Group Settings

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

Page (ST) 4-84 P54x/EN ST/Nd5

Group Settings

MENU TEXT

Digital Input 58 2A

Label for DR Channel 58

Digital Input 59 2A

Label for DR Channel 59

Digital Input 60 2A

Label for DR Channel 60

Digital Input 61 2A

Col Row

3A

Default Setting

Description

Label for DR Channel 58

3B

3C

3D

Label for DR Channel 59

Label for DR Channel 60

Label for DR Channel 61

Label for DR Channel 61

Digital Input 62 2A

Label for DR Channel 62

Digital Input 63 2A

Label for DR Channel 63

Digital Input 64 2A

Label for DR Channel 64

Digital Input 65 2A

Label for DR Channel 65

Digital Input 66 2A

Label for DR Channel 66

Digital Input 67 2A

Label for DR Channel 67

Digital Input 68 2A

Label for DR Channel 68

3E

3F

40

41

42

43

44

Label for DR Channel 62

Label for DR Channel 63

Label for DR Channel 64

Label for DR Channel 65

Label for DR Channel 66

Label for DR Channel 67

Label for DR Channel 68

45 Label for DR Channel 69 Digital Input 69 2A

Label for DR Channel 69

Digital Input 70 2A

Label for DR Channel 70

Digital Input 71 2A

Label for DR Channel 71

Digital Input 72 2A

Label for DR Channel 72

Digital Input 73 2A

Label for DR Channel 73

Digital Input 74 2A

Label for DR Channel 74

Digital Input 75 2A

Label for DR Channel 75

Digital Input 76 2A

Label for DR Channel 76

Digital Input 77 2A

Label for DR Channel 77

Digital Input 78 2A

Label for DR Channel 78

Digital Input 79 2A

46

47

48

49

4A

4B

4C

4D

4E

4F

Label for DR Channel 70

Label for DR Channel 71

Label for DR Channel 72

Label for DR Channel 73

Label for DR Channel 74

Label for DR Channel 75

Label for DR Channel 76

Label for DR Channel 77

Label for DR Channel 78

Label for DR Channel 79

(ST) 4 Settings

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

P54x/EN ST/Nd5 Page (ST) 4-85

(ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Label for DR Channel 79

Digital Input 80 2A

Label for DR Channel 80

Digital Input 81 2A

Label for DR Channel 81

Digital Input 82 2A

Label for DR Channel 82

Digital Input 83 2A

Label for DR Channel 83

Digital Input 84 2A

Label for DR Channel 84

Digital Input 85 2A

Label for DR Channel 85

Digital Input 86 2A

Label for DR Channel 86

Digital Input 87 2A

Label for DR Channel 87

Digital Input 88 2A

Label for DR Channel 88

Digital Input 89 2A

Label for DR Channel 89

Digital Input 90 2A

Label for DR Channel 90

Digital Input 91 2A

Label for DR Channel 91

Digital Input 92 2A

Label for DR Channel 92

Digital Input 93 2A

Label for DR Channel 93

Digital Input 94 2A

Label for DR Channel 94

Digital Input 95 2A

Label for DR Channel 95

Digital Input 96 2A

Label for DR Channel 96

Digital Input 97 2A

Label for DR Channel 97

Digital Input 98 2A

Label for DR Channel 98

Digital Input 99 2A

Label for DR Channel 99

Digital Input 100 2A

Label for DR Channel 100

50

51

52

53

54

55

56

57

58

59

5A

5B

5C

5D

5E

5F

60

61

62

63

64

Label for DR Channel 80

Label for DR Channel 81

Label for DR Channel 82

Label for DR Channel 83

Label for DR Channel 84

Label for DR Channel 85

Label for DR Channel 86

Label for DR Channel 87

Label for DR Channel 88

Label for DR Channel 89

Label for DR Channel 90

Label for DR Channel 91

Label for DR Channel 92

Label for DR Channel 93

Label for DR Channel 94

Label for DR Channel 95

Label for DR Channel 96

Label for DR Channel 97

Label for DR Channel 98

Label for DR Channel 99

Label for DR Channel 100

Group Settings

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

Page (ST) 4-86 P54x/EN ST/Nd5

Group Settings

MENU TEXT

Digital Input 101 2A

Label for DR Channel 101

Digital Input 102 2A

Label for DR Channel 102

Digital Input 103 2A

Label for DR Channel 103

Digital Input 104 2A

Col Row

65

Default Setting

Description

Label for DR Channel 101

66

67

68

Label for DR Channel 102

Label for DR Channel 103

Label for DR Channel 104

Label for DR Channel 104

Digital Input 105 2A

Label for DR Channel 105

Digital Input 106 2A

Label for DR Channel 106

Digital Input 107 2A

Label for DR Channel 107

Digital Input 108 2A

Label for DR Channel 108

Digital Input 109 2A

Label for DR Channel 109

Digital Input 110 2A

Label for DR Channel 110

Digital Input 111 2A

Label for DR Channel 111

69

6A

6B

6C

6D

6E

6F

Label for DR Channel 105

Label for DR Channel 106

Label for DR Channel 107

Label for DR Channel 108

Label for DR Channel 109

Label for DR Channel 110

Label for DR Channel 111

70 Label for DR Channel 112 Digital Input 112 2A

Label for DR Channel 112

Digital Input 113 2A

Label for DR Channel 113

Digital Input 114 2A

Label for DR Channel 114

Digital Input 115 2A

Label for DR Channel 115

Digital Input 116 2A

Label for DR Channel 116

Digital Input 117 2A

Label for DR Channel 117

Digital Input 118 2A

Label for DR Channel 118

Digital Input 119 2A

Label for DR Channel 119

Digital Input 120 2A

Label for DR Channel 120

Digital Input 121 2A

Label for DR Channel 121

Digital Input 122 2A

71

72

73

74

75

76

77

78

79

7A

Label for DR Channel 113

Label for DR Channel 114

Label for DR Channel 115

Label for DR Channel 116

Label for DR Channel 117

Label for DR Channel 118

Label for DR Channel 119

Label for DR Channel 120

Label for DR Channel 121

Label for DR Channel 122

(ST) 4 Settings

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

P54x/EN ST/Nd5 Page (ST) 4-87

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Label for DR Channel 122

Digital Input 123 2A

Label for DR Channel 123

Digital Input 124 2A

Label for DR Channel 124

Digital Input 125 2A

Label for DR Channel 125

Digital Input 126 2A

Label for DR Channel 126

Digital Input 127 2A

Label for DR Channel 127

7B

7C

7D

7E

7F

Digital Input 128 2A

Label for DR Channel 128

80

Table 25 – DR Chan labels

Label for DR Channel 123

Label for DR Channel 124

Label for DR Channel 125

Label for DR Channel 126

Label for DR Channel 127

Label for DR Channel 128

Available Setting

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

16 char. custom name

3.25 EIA(RS)232 InterMiCOM Communications

‘ InterMiCOM ’ operates via an EIA(RS)232 physical output on the back of the 2 nd

rear communication board. It provides 8 independently settable digital signals that can be conveyed between line ends. The InterMiCOM teleprotection is restricted to 2 ends.

InterMiCOM input and output mapping has to be done in the Programmable Scheme

Logic (PSL).

MENU TEXT

INTERMICOM COMMS

Col

15 0

Row

0

Default

Setting

Description

Available Setting

This column is only visible if the model number supports InterMiCOM and second rear comms board is fitted.

IM Output Status 15 1 Data

Displays the status of each InterMiCOM output signal.

IM Input Status 15 2 Data

Displays the status of each InterMiCOM input signal, with IM1 signal starting from the right. When loop back mode is set, all bits will display zero.

Source Address 15 10 1 0 to 10 step 1

Setting for the unique relay address that is encoded in the InterMiCOM sent message.

Received Address 15 11 2 0 to 10 step 1

The aim of setting addresses is to establish pairs of relays which will only communicate with each other. Should an inadvertent channel misrouting or spurious loopback occur, an error will be logged, and the erroneous received data will be rejected.

As an example, in a 2 ended scheme the following address setting would be correct:

Local relay: Source Address = 1, Receive Address = 2

Remote relay: Source Address = 2, Receive Address = 1

Baud Rate 15 12 9600

0 = 600, 1 = 1200, 2 = 2400, 3 = 4800, 4 = 9600 or 5 =

19200

Setting of the signalling speed in terms of number of bits per second. The speed will match the capability of the MODEM or other characteristics of the channel provided.

Page (ST) 4-88 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row

Default

Setting

Available Setting

Ch Statistics 15 20

Description

Invisible 0 = Invisible, 1 = Visible

Settings that makes visible or invisible Channel Statistics on the LCD. The statistic is reset by either relay’s powering down or using the ‘Reset Statistics’ cell.

Rx Direct Count 15 21 0

Displays the number of valid Direct Tripping messages since last counter reset.

Rx Perm Count 15 22 0

Displays the number of valid Permissive Tripping messages since last counter reset.

Rx Block Count 15 23 0

Displays the number of valid Blocking messages since last counter reset.

Rx NewDataCount 15 24 0

Displays the number of different messages (change events) since last counter reset.

Rx ErroredCount 15 25 0

Displays the number of invalid received messages since last counter reset.

Lost Messages 15 26 0

Displays the difference between the number of messages that were supposed to be received (based on set Baud Rate) and actual valid received messages since last reset.

Elapsed Time 15 30 0

Displays the time in seconds since last counter reset.

Reset Statistics 15 31 No 0 = No, 1 = Yes

Command that allows all Statistics and Channel Diagnostics to be reset.

Ch Diagnostics 15 40 Invisible 0 = Invisible, 1 = Visible

Setting that makes visible or invisible Channel Diagnostics on the LCD. The diagnostic is reset by either relay’s powering down or using the ‘Reset Statistics’ cell.

Data CD Status 15 41 0 0 = OK, 1 = Fail, 2 = SCC Absent

Indicates when the DCD line (pin 1 on EIA232 Connector) is energized.

OK = DCD is energized

FAIL = DCD is de-energized

Absent = 2nd Rear port board is not fitted

FrameSync Status 15 42 0 0 = OK, 1 = Fail, 2 = SCC Absent

Indicates when the message structure and synchronization is valid.

OK = Valid message structure and synchronization

FAIL = Synchronization has been lost

Absent = 2nd Rear port board is not fitted

Unavailable = Hardware error present

Message Status 15 43 0 0 = OK, 1 = Fail, 2 = SCC Absent

Indicates when the percentage of received valid messages has fallen below the ‘IM Msg Alarm Lvl’ setting within the alarm time period.

OK = Acceptable ratio of lost messages

FAIL = Unacceptable ratio of lost messages

Absent = 2nd Rear port board is not fitted

Unavailable = Hardware error present

0 = OK, 1 = Fail, 2 = SCC Absent Channel Status 15 44 0

Indicates the state of the InterMiCOM communication channel.

OK = Channel healthy

FAIL = Channel failure

Absent = 2nd Rear port board is not fitted

Unavailable = Hardware error present

IM H/W Status 15 45 0

0 = OK, 1 = Fail, 2 = SCC Absent, 3 = SCC Read Error, 4 =

SCC Write Error

P54x/EN ST/Nd5 Page (ST) 4-89

(ST) 4 Settings Group Settings

MENU TEXT Col Row

Default

Setting

Available Setting

Indicates the state of InterMiCOM hardware

OK = InterMiCOM hardware healthy

Read or Write Error = InterMiCOM failure

Absent = 2nd Rear port is not fitted or failed to initialize.

Loopback Mode 15 50

Description

Disabled 0 = Disabled, 1 = Internal or 2 = External

Setting to allow testing of the InterMiCOM channel. When ‘Internal’ is selected, only the local InterMiCOM software functionality is tested, whereby the relay will receive its own sent data. ‘External’ setting allows a hardware and software check, with an external link required to jumper the sent data onto the receive channel.

During normal service condition Loopback mode must be disabled.

Test Pattern 15 51 0xFF 8 bits

Allows specific bit statuses to be inserted directly into the InterMiCOM message, to substitute real data. This is used for testing purposes.

Loopback Status 15 52 0 0 = OK, 1 = Fail, 2 = SCC Absent

Indicates the status of the InterMiCOM loopback mode

OK = Loopback software (and hardware) is working correctly

FAIL = Loopback mode failure

Unavailable = Hardware error present.

Table 26 - InterMiCOM comms

3.26 EIA(RS)232 InterMiCOM Conf 56/64 kbit/s Fiber Teleprotection –

InterMiCOM 64

MENU TEXT Col Row Default Setting Available Setting

Description

INTERMICOM

CONF

16 0 0

This column is only visible if the model number supports InterMiCOM and second rear comms board is fitted.

IM Msg Alarm Lvl 16 1 25 0 to 100 step 0.1

Setting that is used to alarm for poor channel quality. If during the fixed 1.6s window the ratio of invalid messages to the total number of messages that should be received (based upon the ‘Baud Rate’ setting) exceeds the above threshold, a ‘Message

Fail’ alarm will be issued.

IM1 Cmd Type 16 10 Blocking 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_1 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM1 FallBackMode 16 11 Default 0 = Default or 1 = Latched

Setting that defines the status of IM1 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM1 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM1 status, pre-defined by the user in ‘IM1 DefaultValue’ cell will be set. A new valid message will replace

‘IM1 DefaultValue’, once the channel recovers.

IM1 DefaultValue 16 12 1

Setting that defines the IM1 fallback status.

0 to 1 step 1

IM1 FrameSyncTim 16 13 1.5 0.01s to 1s step 0.001s

Time delay after which ’IM1 DefaultValue’ is applied, providing that no valid message is received in the meantime.

IM2 Cmd Type 16 18 Blocking 0 = Disabled, 1 = Direct or 2 = Blocking

Page (ST) 4-90 P54x/EN ST/Nd5

Group Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that defines the operative mode of the InterMiCOM_2 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM2 FallBackMode 16 19 Default 0 = Default or 1 = Latched

Setting that defines the status of IM2 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM2 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM2 status, pre-defined by the user in ‘IM2 DefaultValue’ cell will be set. A new valid message will replace

‘IM2 DefaultValue’, once the channel recovers.

IM2 DefaultValue 16 1A 1

Setting that defines the IM2 fallback status.

0 to 1 step 1

IM2 FrameSyncTim 16 1B 1.5 0.01s to 1s step 0.001s

Time delay after which ’IM2 DefaultValue’ is applied, providing that no valid message is received in the meantime.

IM3 Cmd Type 16 20 Blocking 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_3 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM3 FallBackMode 16

IM3 DefaultValue 16

21 Default

22 1

Setting that defines the IM3 fallback status.

0 = Default or 1 = Latched

Setting that defines the status of IM3 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM3 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM3 status, pre-defined by the user in ‘IM3 DefaultValue’ cell will be set. A new valid message will replace

‘IM3 DefaultValue’, once the channel recovers.

0 to 1 step 1

IM3 FrameSyncTim 16 23 1.5 0.01s to 1s step 0.001s

Time delay after which ’IM3 DefaultValue’ is applied, providing that no valid message is received in the meantime.

IM4 Cmd Type 16 28 Blocking 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_4 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM4 FallBackMode 16 29 Default 0 = Default or 1 = Latched

Setting that defines the status of IM4 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM4 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM4 status, pre-defined by the user in ‘IM4 DefaultValue’ cell will be set. A new valid message will replace

‘IM4 DefaultValue’, once the channel recovers.

IM4 DefaultValue 16 2A 1 0 to 1 step 1

Setting that defines the IM4 fallback status.

IM4 FrameSyncTim 16 2B 1.5 0.01s to 1s step 0.001s

Time delay after which ’IM4 DefaultValue’ is applied, providing that no valid message is received in the meantime.

IM5 Cmd Type 16 30 Direct 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_5 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM5 FallBackMode 16 31 Default 0 = Default or 1 = Latched

Setting that defines the status of IM5 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM5 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM5 status, pre-defined by the user in ‘IM5 DefaultValue’ cell will be set. A new valid message will replace

‘IM5 DefaultValue’, once the channel recovers.

P54x/EN ST/Nd5 Page (ST) 4-91

(ST) 4 Settings Group Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

IM5 DefaultValue 16 32 0

Setting that defines the IM5 fallback status.

IM5 FrameSyncTim 16 33 1.5

0 to 1 step 1

0.01s to 1s step 0.001s

Time delay after which ‘IM5 DefaultValue’ is applied.

IM6 Cmd Type 16 38 Direct 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_6 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM6 FallBackMode 16 39 Default 0 = Default or 1 = Latched

Setting that defines the status of IM6 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM6 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM6 status, pre-defined by the user in ‘IM6 DefaultValue’ cell will be set. A new valid message will replace

‘IM6 DefaultValue’, once the channel recovers.

IM6 DefaultValue 16 3A 0

Setting that defines the IM6 fallback status.

0 to 1 step 1

IM6 FrameSyncTim 16 3B 1.5 0.01s to 1s step 0.001s

Time delay after which ‘IM6 DefaultValue’ is applied.

IM7 Cmd Type 16 40 Direct 0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_7 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM7 FallBackMode 16 41 Default 0 = Default or 1 = Latched

Setting that defines the status of IM7 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM7 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM7 status, pre-defined by the user in ‘IM7 DefaultValue’ cell will be set. A new valid message will replace

‘IM7 DefaultValue’, once the channel recovers.

IM7 DefaultValue 16 42 0 0 to 1 step 1

Setting that defines the IM7 fallback status.

IM7 FrameSyncTim 16 43 1.5

Time delay after which ‘IM7 DefaultValue’ is applied.

IM8 Cmd Type 16 48 Direct

0.01s to 1s step 0.001s

0 = Disabled, 1 = Direct or 2 = Blocking

Setting that defines the operative mode of the InterMiCOM_8 signal.

Selecting the channel response for this bit to Blocking allows fastest signalling, whereas setting to Direct offers higher security at the expense of speed.

Selecting the channel response for this bit to Permissive offers higher dependability

IM8 FallBackMode 16 49 Default 0 = Default or 1 = Latched

Setting that defines the status of IM8 signal in case of heavy noise and message synchronization being lost.

If set to ‘Latching’ the last valid IM8 status will be maintained until the new valid message is received.

If set to ‘Default’, the IM8 status, pre-defined by the user in ‘IM8 DefaultValue’ cell will be set. A new valid message will replace

‘IM8 DefaultValue’, once the channel recovers.

0 to 1 step 1 IM8 DefaultValue 16 4A 0

Setting that defines the IM8 fallback status.

IM8 FrameSyncTim 16 4B 1.5 0.01s to 1s step 0.001s

Time delay after which ‘IM8 DefaultValue’ is applied.

Table 27 - INTERMiCOM conf

Page (ST) 4-92 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

4 CONTROL AND SUPPORT SETTINGS

These settings exist outside the Group settings, and are used to configure the control and support features that do not need to adapt according to changing system conditions.

These settings are used to configure system data, date and time, CT/VT ratios, SCADA type communications interfaces, input conditioners, etc. They also used to control CB operation, measurements and recording functions.

The control and support settings are part of the main menu and are used to configure the global configuration for the relay. It includes submenu settings as shown here.

The control and support settings include:

Relay configuration settings

Open/close circuit breaker (may vary according to relay type or model)

CT & VT ratio settings

Reset LEDs

Active protection setting group

Password & language settings

Communications settings

Measurement settings

Event & fault record settings

User interface settings

Commissioning settings

Circuit breaker control & monitoring settings (may vary according to relay type or model)

4.1 System Data

This menu provides information for the device and general status of the relay.

MENU TEXT

SYSTEM DATA

Col

00

Row

00 0

Default Setting

Description

This column contains general system settings

Available Setting

Language 00 01 English 0 = English, 1 = Francais, 2 = Deutsch, 3 = Espanol

The default language used by the device. Selectable as English, French, German, Spanish.

Sys Fn Links 00 03 0

Bit 0 = Trip led self reset (1 = enable self reset), Bit 1 = Not

Used, Bit 2 = Not Used, Bit 3 = Not Used, Bit 4 = Not Used,

Bit 5 = Not Used, Bit 6 = Not Used or Bit 7 = Not Used

Setting to allow the fixed function trip LED to be self resetting (set to 1 to extinguish the LED after a period of healthy restoration of load current).

Description 00 04 MiCOM P54x 16 char. custom name

16 character relay description. Can be edited.

Plant Reference 00 05 MiCOM

Associated plant description and can be edited.

Model Number 00 06 Model Number

16 char. custom name

Relay model number. This display cannot be altered.

Serial Number 00 08 Serial Number

Relay model number. This display cannot be altered.

Frequency 00 09 50 50 to 60 step 10

P54x/EN ST/Nd5 Page (ST) 4-93

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Relay set frequency. Settable either 50 or 60 Hz

Comms Level 00 0A 1

Displays the conformance of the relay to the Courier Level 2 comms.

0 to 255 step 1 Relay Address 00 0B

Sets the first rear port relay address.

255

Plant Status 00 0C 0

Displays the circuit breaker plant status.

Available Setting

Control Status

Not used

00 0D

Active Group 00 0E

Displays the active settings group

0

0

CB Trip/Close 00 10 No Operation 0 = No Operation, 1 = Trip, 2 = Close

Supports trip and close commands if enabled in the Circuit Breaker Control menu.

CB Trip/Close 00 10 No Operation

0 = No Operation, 1 = Trip, 2 = Close, 3 = No Operation, 4 =

No Operation, 5 = No Operation, 6 = No Operation, 7 = No

Operation, 8 = No Operation, 9 = Trip CB2, 10 = Close CB2

Supports trip and close commands if enabled in the Circuit Breaker Control menu.

CB Trip/Close 00 10 No Operation 0 = No Operation, 1 = Trip, 2 = Close

Supports trip and close commands if enabled in the Circuit Breaker Control menu.

CB Trip/Close 00 10 No Operation

0 = No Operation, 1 = Trip, 2 = Close, 3 = No Operation, 4 =

No Operation, 5 = No Operation, 6 = No Operation, 7 = No

Operation, 8 = No Operation, 9 = Trip CB2, 10 = Close CB2

Supports trip and close commands if enabled in the Circuit Breaker Control menu.

Software Ref. 1 00 11 0

Displays the relay software version including protocol and relay model.

NIC Platform Ref 00 14 0

Platform reference of Ethernet card firmware

IEC61850 Edition 00 15 2

Set the IEC61850 version (edition 1 or edition 2)

Edition 1, Edition 2

Dual IP, PRP, HSR ETH COMM Mode 00

Set the FPGA type.

16 Dual IP

Opto I/P Status 00 20 0

Display the status of the available opto inputs fitted.

Relay O/P Status 00 21 0

Displays the status of all available output relays fitted.

Page (ST) 4-94 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Alarm Status 00 22 0

0=Setting Group via opto invalid, 1=Test Mode Enabled,

2=Static Test Mode, 3=Loop Back Test Enabled,

4=IM64 Test Enabled,

6=CTS Alarm,

5=VTS Indication,

7=CT2S Alarm,

8=Remote CTS Alarm,

10=BF Block AR,

12=CB Lockout Alarm ,

14=CB Failed to Trip,

9=Power Swing,

11=CB Monitor Alarm,

13=CB Status Alarm,

15=CB Failed to Close,

16=Control CB Unhealthy, 17=Control No Checksync,

18=Autoclose Lockout/RLY BAR, 19=No Healthy (AR),

20=No Check Sync / AR Fail, 21=System Split Alarm,

22=GPS Alarm, 23=Signaling failure alarm,

24=Signaling Propagation Delay Alarm,

25=Differential protection failure alarm,

26=IM64 Scheme Fail alarm,

27=IEEE C37.94 Communications Alarms,

28=Diff Protection inhibited,

29=Aid1 Channel Out, 30=Aid2 Channel Out,

31=Frequency out of range

Displays the status of the first 32 alarms as a binary string. Includes fixed and user settable alarms.

Alarm Status

(Copy of 0022)

00 50 0 Same as Alarm Status (0022)

32 bit field gives status of first 32 alarms. Includes fixed and user settable alarms.

Alarm Status 2 00 51 0

0=BF Block AR 2,

2=CB2 Lockout Alarm,

4=CB2 Failed to Trip,

6=Control CB2 Unhealthy,

1=CB2 Monitor Alarm,

3=CB2 Status Alarm,

5=CB2 Failed to Close,

7=Control No Checksync,

8=Autoclose Lockout/RLY BAR, 9=No Healthy (AR),

10=No Check Sync / AR Fail, 11=Invalid AR Mode,

12=Incompatible relays,

13=In Valid Message Format, 14=Copro Main Prot. Fail,

15=Configuration Error, 16=Re-Configuration Error,

17=C Diff Protection Comms Mode,

18=Max Prop Delay Alarm, 19=Unused, 20=Unused,

21=Unused, 22=Unused, 23=Unused,

24=SR User Alarm 1, 25=SR User Alarm 2,

26=SR User Alarm 3, 27=SR User Alarm 4,

28=MR User Alarm 5, 29=MR User Alarm 6,

30=MR User Alarm 7, 31=MR User Alarm 8

Displays the status of the next 32 alarms as a binary string.

Alarm Status 3 00 52 0

0=Battery Fail,

2=Rear Comm 2 Fail,

4=NIC Not Fitted,

6=NIC Fatal Error,

8=Bad TCP/IP Cfg.,

10=NIC Link Fail,

12=IP Addr Conflict,

14=IM Message Fail,

16=IM Channel Fail,

18 to 31= Unused

1=Field Volt Fail,

3=GOOSE IED Absent,

5=NIC No Response,

7=NIC Soft. Reload,

9=Bad OSI Config.,

11=NIC SW Mis-Match,

13=IM Loopback,

15=IM Data CD Fail,

17=Backup Setting,

Displays the status of the next 32 alarms as a binary string.

Access Level 00 D0 0

0 = Read Some, 1 = Read All, 2 = Read All + Write Some, 3 =

Read All + Write All xx character settable password

New Eng.Level PW 00 D3 0

Allows user to change password for EngineerLevel.

New Op.Level PW 00 D4 0

ASCII 33 to 122

ASCII 33 to 122

P54x/EN ST/Nd5 Page (ST) 4-95

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Allows user to change password for OperatorLevel.

Security Feature 00 DF 1

Displays the level of cyber security implemented, 1 = phase 1.

1

ASCII 33 to 122 Password 00 E1 0

Encrypted password entry cell. Not visbile via UI

Encryption Salt

0

00 E5 0 0

00 F1 0 0 Enter username

0

Number of users

0

New UI pwd

0

New password

00

00

00

F2

F3

F4

0

0

0

0

0

0

0

Table 28 - System data

Available Setting

4.2 Circuit Breaker Control

The System Checks functionality differs between the P543/P545 and the P544/P546 since the P543/P545 can only control one circuit breaker, whereas the P544/P546 can control two. Accordingly, therefore, the settings are different for the two.

Circuit Breaker Control (P543/P545)

The IED/relay includes the following options for control of a single circuit breaker:

Local tripping and closing, via the relay menu or hotkeys

Local tripping and closing, via relay opto-isolated inputs

Remote tripping and closing, using the relay communications

MENU TEXT

Circuit Breaker Control (P544/P546)

The IED/relay includes the following options for control of two circuit breakers:

Local tripping and closing, via the relay menu or hotkeys

Local tripping and closing, via relay opto-isolated inputs

Remote tripping and closing, using the relay communications

Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

CB CONTROL 07 00 *

This column controls the circuit Breaker Control configuration

CB Control by 07 01 Disabled

0 = Disabled, 1 =

Local, 2 = Remote, 3

= Local+Remote, 4 =

Opto, 5 = Opto+local,

6 = Opto+Remote, 7

= Opto+Rem+local

*

*

*

*

*

*

*

Page (ST) 4-96 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Selects the type of circuit breaker control to be used

Close Pulse Time 07 02 0.5

0.1s to 10s step

0.01s

*

Set period during which the CB should close when a CB close command is issued.

Trip Pulse Time 07 03 0.5 0.1s to 5s step 0.01s *

Set period during which the CB should trip when a CB trip command is issued.

*

*

*

*

*

*

Man Close Delay 07 05 10

0.01s to 600s step

0.01s

* * * *

Set delay after operator controlled CB close sequence is initiated, before a CB close output can be issued. (Allows operator to retire to a place of safety before the CB close command is issued).

CB Healthy Time

Maximum waiting time for input DDB: CB1 Healthy (= gas pressure OK, spring charged etc) to enable CB1 Close by manual control. Same setting applies to DDB: CB2 Healthy to enable CB2 Close by manual control. If set time runs out with input DDB:

CBx Healthy low (= 0), alarm Control CBx Unhealthy is set and CB close sequence is cancelled.

Check Sync Time

07

07

06

07

5

5

0.01s to 9999s step

0.01s

0.01s to 9999s step

0.01s

*

*

*

*

*

*

*

*

Maximum waiting time for input signal CB1MSCOK from system check logic, to enable CB1 Close by manual control. Same setting applies to input signal CB2MSCOK to enable CB2 Close by manual control. If set time runs out with input signal

CBxMSCOK low (= 0), alarm Control CBx NoChSync is set and CB close sequence is cancelled.

Lockout Reset 07 08 No 0 = No or 1 = Yes * *

Command to reset the Lockout Alarm

CB mon LO reset 07 08 No

Command to reset the CB monitoring Lockout Alarm

0 = No or 1 = Yes * *

Reset Lockout by 07 09 CB Close

0 = User Interface or

1 = CB Close

* *

Setting that determines if a lockout condition will be reset by a manual circuit breaker close command or via the user interface.

Rst CB mon LO by 07 09 CB Close

0 = User Interface or

1 = CB Close

* *

Setting that determines if a lockout condition caused by CB monitoring conditions will be reset by a manual circuit breaker close command or via the user interface.

Man Close RstDly 07 0A 5

0.1s to 600s step

0.01s

* *

If Reset Lockout by is set to CB close then Man Close RstDly timer allows reset of Lockout state after set time delay

CB mon LO RstDly 07 0A 5

0.1s to 600s step

0.01s

* *

If Rst CB mon LO by is set to CB close then CB mon LO RstDly timer allows reset of CB lockout state after set time delay

Autoreclose Mode 07 0B No Operation

0 = No Operation, 1 =

In Service, 2 = Out of

Service

* * * *

Command to changes state of Auto-Reclose

Single Pole A/R 07 0C Disabled

0 = Disabled or 1 =

Enabled

* *

Enable or disable AR for single phase fault types.

Care: This setting also applies when auto-reclose is configured in 3 pole tripping applications. Even though the trip mode may be 3 pole only, the fact that the initiation was a single phase fault type is memorized.

Three Pole A/R 07 0D Enabled

0 = Disabled or 1 =

Enabled

* *

P54x/EN ST/Nd5 Page (ST) 4-97

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

Enable or disable AR for multi-phase faults.

AR Status 07 0E

0 = Out of Service or

1 = In Service

* * * *

Auto Reclose - Inservice / Out of service

Total Reclosures 07 0F

Displays the number of successful re-closures.

* *

Reset Total A/R 07 10 No

Allows user to reset the auto-reclose counters.

0 = No or 1 = Yes * *

CB Status Input 07 11 52B 1 pole

0 = None

1 = 52A 3 pole

2 = 52B 3 pole

3 = 52A & 52B 3 pole

4 = 52A 1 pole

*

5 = 52B 1 pole

6 = 52A & 52B 1 pole

* * *

Setting to define the type of circuit breaker contacts that will be used for the circuit breaker control logic. Form A contacts match the status of the circuit breaker primary contacts, form B are opposite to the breaker status.

When 1 pole is selected, individual contacts must be assigned in the Programmable Scheme Logic for phase A, phase B, and phase C. Setting 3 pole means that only a single contact is used, common to all 3 poles.

CB Status Time 07 7F 5 0.1s to 5s step 0.01s * * * *

Under healthy conditions the circuit breaker auxiliary contacts will be in opposite states. Should both sets of contacts be open or closed, it indicates that either the contacts, or the wiring, or the circuit breaker are defective and an alarm will be issued after

CB Status Time delay. The time delay is set to avoid unwanted operation during normal switching duties.

CB2 Status Input 07 80 52B 1 pole

0 = None

1 = 52A 3 pole

2 = 52B 3 pole

3 = 52A & 52B 3 pole

4 = 52A 1 pole

5 = 52B 1 pole

6 = 52A & 52B 1 pole

* *

Setting to define the type of circuit breaker contacts that will be used for the circuit breaker control logic. Form A contacts match the status of the circuit breaker primary contacts, form B are opposite to the breaker status.

When 1 pole is selected, individual contacts must be assigned in the Programmable Scheme Logic for phase A, phase B, and phase C. Setting 3 pole means that only a single contact is used, common to all 3 poles.

CTRL CB2 Lead 07 81 Reset

0 = No Operation, 1 =

Set or 2 = Reset

* *

If Leader Select By is set to Control, this user control determines the preferred leader: Set / Reset (Reset = CB1 lead; Set =

CB2 lead). This command is NON VOLATILE

Reset AROK Ind 07 82 No 0 = No or 1 = Yes * *

If Res AROK by UI is set to Enabled, this command provides a pulse to reset the successful AR indication for both CB's

Reset CB1 LO 07 83 No 0 = No or 1 = Yes * *

If Res LO by UI is set to Enabled, this command provides a pulse to reset the lockout for CB1.

Note: This requires the condition that caused the lockout to have been cleared.

Reset CB2 LO 07 84 No 0 = No or 1 = Yes *

If Res LO by UI is set to Enabled, this command provides a pulse to reset the lockout for CB2.

Note: This requires the condition that caused the lockout to have been cleared.

* CB1 Total Shots 07 85

Indicates the total number of CB1 reclosures

CB1 SUCC SPAR 07 86 *

*

*

*

Page (ST) 4-98 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

Description

Indicates the total number of CB1 successful 1 pole reclosures

CB1SUCC3PARShot1 07 87

Indicates the total number of CB1 successful 3 pole reclosures at 1st shot

CB1SUCC3PARShot2 07 88

Indicates the total number of CB1 successful 3 pole reclosures at 2nd shot

CB1SUCC3PARShot3 07 89

Indicates the total number of CB1 successful 3 pole reclosures at 3rd shot

CB1SUCC3PARShot4 07 8A

Indicates the total number of CB1 successful 3 pole reclosures at 4th shot

CB1 Failed Shots 07 8B

Indicates the total number of CB1 failed reclose cycles

Reset CB1 Shots 07 8C No

This command resets all CB1 shots counters to zero

0 = No or 1 = Yes

CB2 Total Shots 07 8D

Indicates the total number of CB2 reclosures

CB2 SUCC SPAR 07 8E

Indicates the total number of CB2 successful 1 pole reclosures

CB2SUCC3PARShot1 07 8F

Indicates the total number of CB2 successful 3 pole reclosures at 1st shot

CB2SUCC3PARShot2 07 90

Indicates the total number of CB2 successful 3 pole reclosures at 2nd shot

CB2SUCC3PARShot3 07 91

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Indicates the total number of CB2 successful 3 pole reclosures at 3rd shot

CB2SUCC3PARShot4 07 92

Indicates the total number of CB2 successful 3 pole reclosures at 4th shot

CB2 Failed Shots 07 93

Indicates the total number of CB2 failed reclose cycles

Reset CB2 Shots 07 94 No 0 = No or 1 = Yes

This command resets all CB2 shots counters to zero

*

*

*

*

*

*

Res AROK by UI 07 96 Enabled

0 = Disabled or 1 =

Enabled

*

If Enabled, this allows the successful auto-reclose signal to be reset by user interface command Reset AROK Ind.

*

Res AROK by NoAR 07 97 Disabled

0 = Disabled or 1 =

Enabled

* if Enabled, allows "successful autoreclose" signal reset by selecting CB autoreclosing disabled

Res AROK by Ext 07 98 Disabled

0 = Disabled or 1 =

Enabled

*

*

*

If Enabled, allows "successful autoreclose" signal reset by external DDB input

Res AROK by TDly 07 99 Disabled

0 = Disabled or 1 =

Enabled if Enabled, allows "successful autoreclose" signal to reset after time AROK Reset Time

Res AROK by TDly 07 9A 1 1s to 9999s step 1s

Reset time for "successful autoreclose" signal if Res AROK by TDly is set to Enabled

*

*

*

*

P54x/EN ST/Nd5 Page (ST) 4-99

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Res LO by CB IS 07 9B Enabled

Description

0 = Disabled or 1 =

Enabled

* if Enabled, allows reset of CB lockout state when CB is "In Service" (= closed for t > CBIS Time)

Res LO by UI 07 9C Enabled

0 = Disabled or 1 =

Enabled

* if Enabled, allows reset of CB lockout state by UI command

Res LO by NoAR 07 9D Disabled

0 = Disabled or 1 =

Enabled

*

*

*

* if Enabled, allows reset of CB lockout state by selecting CB autoreclosing disabled

Res LO by ExtDDB 07 9E Disabled

0 = Disabled or 1 =

Enabled if Enabled, allows reset of CB lockout state by external DDB input

Res LO by TDelay 07 9F Disabled

0 = Disabled or 1 =

Enabled if Enabled, allows reset of CB lockout state after time LO Reset Time

LO Reset Time 07 A0 1 1s to 9999s step 1s

CB lockout reset time if Res LO by TDelay is set to Enabled

*

*

*

*

*

*

Table 29 - Circuit breaker control

4.3 Date and Time

Displays the date and time as well as the battery condition.

MENU TEXT

DATE and TIME 8 0 0

This column contains Date and Time stamp settings

Date/Time 8 1 0

Displays the relay’s current date and time.

8 N/A 0 Date/Time

Modbus only

Date 12/01/1998 8

Col Row

N/A 0

Default Setting

Description

Displays the date. Front Panel Menu only

Time 12:00 8 N/A 0

Displays the time. Front Panel Menu only

IRIG-B Sync 8 4 Disabled

Enable IRIG-B time synchronization.

Available Setting

0 = Disabled or 1 = Enabled

IRIG-B Status 8 5 0

0 = Card Not Fitted, 1 = Card Failed, 2 = Signal Healthy, 3 =

No Signal

Displays the status of IRIG-B

Battery Status 8 6 0

Displays whether the battery is healthy or not

0 = Dead or 1 = Healthy

Page (ST) 4-100 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Battery Alarm 8 7 Enabled 0 = Disabled or 1 = Enabled

Setting that determines whether an unhealthy relay battery condition is alarmed or not

SNTP Status 8 13 0

0 = Disabled, 1 = Trying server 1,

2 = Trying server 2, 3 = Server 1 OK,

4 = Server 2 OK, 5 = No response,

6 = No valid clock

IEC61850 or DNP3.0 over Ethernet versions only. Displays information about the SNTP time synchronization status: Disabled,

Trying Server 1, Trying Server 2, Server 1 OK, Server 2 OK, No response, or No valid clock.

LocalTime Enable 8 20 Flexible 0 = Disabled, 1 = Fixed or 2 = Flexible

Setting to turn on/off local time adjustments.

Disabled - No local time zone will be maintained. Time synchronization from any interface will be used to directly set the master clock and all displayed (or read) times on all interfaces will be based on the master clock with no adjustment.

Fixed - A local time zone adjustment can be defined using the LocalTime offset setting and all interfaces will use local time except SNTP time synchronization and IEC 61850 timestamps.

Flexible - A local time zone adjustment can be defined using the LocalTime offset setting and each interface can be assigned to the UTC zone or local time zone with the exception of the local interfaces which will always be in the local time zone and IEC

61850/SNTP which will always be in the UTC zone.

LocalTime Offset 8 21 0 -720 to 720 step 15

Setting to specify an offset of -12 to +12 hrs in 15 minute intervals for local time zone. This adjustment is applied to the time based on the master clock which is UTC/GMT

DST Enable 8 22 Enabled 0 = Disabled or 1 = Enabled

Setting to turn on/off daylight saving time adjustment to local time.

DST Offset 8 23 60 30 to 60 step 30

Setting to specify daylight saving offset which will be used for the time adjustment to local time.

DST Start 8 24 Last 0 = First, 1 = Second, 2 = Third, 3 = Fourth or 4 = Last

Setting to specify the week of the month in which daylight saving time adjustment starts

DST Start Day 8 25 Sunday

0 = Sunday, 1 = Monday, 2 = Tuesday, 3 = Wednesday, 4 =

Thursday, 5 = Friday or 6 = Saturday

Setting to specify the day of the week in which daylight saving time adjustment starts

DST Start Month 8 26 March

0 = January, 1 = February, 2 = March, 3 = April, 4 = May, 5 =

June, 6 = July, 7 = August, 8 = September, 9 = October, 10 =

November or 11 = December

Setting to specify the month in which daylight saving time adjustment starts

DST Start Mins 8 27 60 0 to 1425 step 15

Setting to specify the time of day in which daylight saving time adjustment starts. This is set relative to 00:00 hrs on the selected day when time adjustment is to start

DST End 8 28 Last 0 = First, 1 = Second, 2 = Third, 3 = Fourth or 4 = Last

Setting to specify the week of the month in which daylight saving time adjustment ends

DST End Day 8 29 Sunday

0 = Sunday, 1 = Monday, 2 = Tuesday, 3 = Wednesday, 4 =

Thursday, 5 = Friday or 6 = Saturday

Setting to specify the day of the week in which daylight saving time adjustment ends

DST End Month 8 2A October

0 = January, 1 = February, 2 = March, 3 = April, 4 = May, 5 =

June, 6 = July, 7 = August, 8 = September, 9 = October, 10 =

November or 11 = December

Setting to specify the month in which daylight saving time adjustment ends

DST End Mins 8 2B 60 0 to 1425 step 15

Setting to specify the time of day in which daylight saving time adjustment ends. This is set relative to 00:00 hrs on the selected day when time adjustment is to end

RP1 Time Zone 8 30 UTC 0 = UTC or 1 = Local

P54x/EN ST/Nd5 Page (ST) 4-101

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting for the rear port 1 interface to specify if time synchronization received will be local or universal time co-ordinated

RP2 Time Zone 8 31 UTC 0 = UTC or 1 = Local

Setting for the rear port 2 interface to specify if time synchronization received will be local or universal time co-ordinated

DNPOE Time Zone 8 32 UTC 0 = UTC or 1 = Local

DNP3.0 over Ethernet versions only. Setting to specify if time synchronisation received will be local or universal time co-ordinate.

Tunnel Time Zone 8 33 UTC 0 = UTC or 1 = Local

Ethernet versions only for tunnelled courier. Setting to specify if time synchronization received will be local or universal time coordinate

Table 30 - Date and time

4.4 CT/VT Ratios

MENU TEXT Col Row

The CT/VT ratio settings differ between the P543/P545 and the P544/P546 because of the different number of circuit breakers controlled.

Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

Description

CT and VT

RATIOS

0A 00

This column contains settings for Current and Voltage Transformer ratios

Main VT

Primary

0A 01 110

*

100 V to 1 MV step 1

V

*

Sets the main voltage transformer input primary voltage.

Main VT Sec'y 0A 02 110

80 V to 140 V step 1

V

*

Sets the main voltage transformer input secondary voltage.

CS VT Primary 0A 03 110

100 V to 1 MV step 1

V

*

Sets the check sync. voltage transformer input primary voltage.

CB1 CS VT

Prim'y

0A 03 110

100 V to 1 MV step 1

V

Sets the CB1 check sync. voltage transformer input primary voltage.

CS VT

Secondary

0A 04 110

80 V to 140 V step 1

V

Sets the check sync. voltage transformer input secondary voltage.

CB1 CS VT

Sec'y

0A 04 110

80 V to 140 V step 1

V

*

Sets the CB1 check sync. voltage transformer input secondary voltage.

CB2 CS VT

Prim'y

0A 05 110

100 V to 1 MV step 1

V

Sets the CB2 check sync. voltage transformer input primary voltage.

CB2 CS VT

Sec'y

0A 06 110

80 V to 140 V step 1

V

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (ST) 4-102 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting Available Setting

Description

Sets the CB2 check sync. voltage transformer input secondary voltage.

Phase CT

Primary

0A 07 1 1A to 30kA step 1A *

Sets the phase current transformer input primary current rating.

Phase CT Sec'y 0A 08 1 1A or 5A

Sets the phase current transformer input secondary current rating.

*

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

*

*

*

*

*

*

Phase CT2

Primary

Phase CT2

Sec'y

0A 09

0A 0A

1

1

1A to 30kA step 1A

1A or 5A

SEF CT

Primary

0A 0B 1 1A to 30kA step 1A

Sets the sensitive earth fault current transformer input primary current rating.

*

SEF CT

Secondary

0A 0C 1 1A or 5A *

*

*

*

*

*

*

*

*

*

*

Sets the sensitive earth fault current transformer input secondary current rating.

MComp CT

Primary

0A 0D 1 1A to 30kA step 1A *

Sets the mutual compensation current transformer input primary current rating.

MComp CT

Sec'y

0A 0E 1 1A or 5A *

Sets the mutual compensation current transformer input secondary current rating.

CS Input 0A 0F AN

0 = AN, 1 = BN,

2 = CN, 3 = AB,

4 = BC, 5 = CA

Selects the System Check Synchronism Input voltage measurement.

CS Input 0A 0F AN

0 = AN, 1 = BN,

2 = CN, 3 = AB,

4 = BC, 5 = CA,

6 = AN / 1.732,

7 = BN / 1.732,

8 = CN / 1.732

Selects the System Check Synchronism Input voltage measurement.

*

Main VT

Location

0A 10 Line

Selects the main voltage transformer location.

0 = Line or 1 = Bus *

CT Polarity 0A 11 Standard

0 = Standard or 1 =

Inverted

*

To invert polarity (180 °) of the CT

CT2 Polarity 0A 12 Standard

0 = Standard or 1 =

Inverted

To invert polarity (180 °) of the CT2

*

*

*

*

*

*

*

*

*

*

*

*

*

SEF CT Polarity 0A 13 Standard

0 = Standard or 1 =

Inverted

* * * *

To invert polarity (180 °) of the SEF CT

P54x/EN ST/Nd5 Page (ST) 4-103

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting Available Setting

P543/P545

No

Distance

P544/P546

No

Distance

P543/P545 with

Distance

P544/P546 with

Distance

M CT Polarity 0A 14 Standard

Description

0 = Standard or 1 =

Inverted

* * * *

To invert polarity (180 °) of the Mutual CT

CB1 CS VT

PhShft

0A 21 0 -180 to 180 step 5 * *

Phase angle difference between selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB1 CS" VT input voltage under healthy system conditions

CB CS VT

PhShft

0A 21 0 -180 to 180 step 5 * *

Phase angle difference between selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB CS" VT input voltage under healthy system conditions

CB1 CS VT

Mag

0A 22 1 0.2 to 3 step 0.01 * *

Ratio of voltage magnitudes of selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB CS" VT input voltage under healthy system conditions

CB CS VT Mag 0A 22 1 0.2 to 3 step 0.01 * *

Ratio of voltage magnitudes of selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB CS" VT input voltage under healthy system conditions

CB2 CS VT

PhShft

0A 23 0 -180 to 180 step 5 * *

Phase angle difference between selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB2 CS" VT input voltage under healthy system conditions

CB2 CS VT

Mag

0A 24 1 0.2 to 3 step 0.01 * *

Ratio of voltage magnitudes of selected phase ("C/S Input" 0A 0F) of Line VT input and applied "CB2 CS" VT input voltage under healthy system conditions

Table 31 - CT/VT ratios

4.5 Record Control

It is possible to disable the reporting of events from all interfaces that support setting changes. The settings that control the various types of events are in the Record Control column. The effect of setting each to disabled is as follows:

MENU TEXT Col

RECORD CONTROL 0B

Row

0 0

Default Setting

Description

This column contains settings for Record Controls

1 No 0 = No or 1 = Yes Clear Events

Clear Event records

Clear Faults

0B

0B

Clear Fault records

Clear Maint 0B

Clear Maintenance records

2

3

No

No

0 = No or 1 = Yes

0 = No or 1 = Yes

Available Setting

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MENU TEXT Col Row Default Setting

Description

Available Setting

Alarm Event 0B 4 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that all the occurrences that produce an alarm will result in no event being generated.

Relay O/P Event 0B 5 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any change in logic state.

Opto Input Event 0B 6 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any change in logic input state.

General Event 0B 7 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no General Events will be generated

Fault Rec Event 0B 8 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any fault that produces a fault record

Maint Rec Event 0B 9 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any occurrence that produces a maintenance record.

Protection Event 0B 0A Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that any operation of protection elements will not be logged as an event

Flt Rec Extended 0B 2F Disabled 0 = Disabled or 1 = Enabled

When this setting is disabled, the fault record contains a snap shot of the local, remote, differential and bias currents taken 1 cycle after the trip.

With this setting enabled an additional snap shot of local, remote, differential and bias currents taken at the time the differential trips is included in the fault record.

Clear Dist Recs 0B

Clear Disturbance records

30 No 0 = No or 1 = Yes

Security Event 0B 31 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that any operation of security elements will not be logged as an event

DDB 31 - 0 0B 40 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 63 - 32 0B 41 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 95 - 64 0B 42 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 127 - 96 0B 43 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 159 - 128 0B 44 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 191 - 160 0B 45 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

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(ST) 4 Settings Control and Support Settings

MENU TEXT

DDB 287 - 256

Col

0B

Row

48

Default Setting

Description

0xFFFFFFFF

Available Setting

DDB 223 - 192 0B 46 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 255 - 224 0B 47 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 319 - 288 0B 49 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 351 - 320 0B 4A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 383 - 352 0B 4B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 415 - 384 0B 4C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 447 - 416 0B 4D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 479 - 448 0B 4E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 511 - 480 0B 4F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 543 - 512 0B 50 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 575 - 544 0B 51 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 607 - 576 0B 52 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

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MENU TEXT Col Row Default Setting

Description

Available Setting

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 639 - 608 0B 53 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 671 - 640 0B 54 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 703 - 672 0B 55 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 735 - 704 0B 56 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 767 - 736 0B 57 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 799 - 768 0B 58 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 831 - 800 0B 59 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 863 - 832 0B 5A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 895 - 864 0B 5B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 927 - 896 0B 5C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 959 - 928 0B 5D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 991 - 960 0B 5E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

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(ST) 4 Settings Control and Support Settings

MENU TEXT

DDB 1087 - 1056

Col

0B

Row

61

Default Setting

Description

0xFFFFFFFF

Available Setting

DDB 1023 - 992 0B 5F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1055 - 1024 0B 60 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1119 - 1088 0B 62 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1151 - 1120 0B 63 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1183 - 1152 0B 64 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1215 - 1184 0B 65 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1247 - 1216 0B 66 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1279 - 1248 0B 67 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1311 - 1280 0B 68 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1343 - 1312 0B 69 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1375 - 1344 0B 6A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1407 - 1376 0B 6B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

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MENU TEXT Col Row Default Setting

Description

Available Setting

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1439 - 1408 0B 6C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1471 - 1440 0B 6D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1503 - 1472 0B 6E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1535 - 1504 0B 6F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1567 - 1536 0B 70 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1599 - 1568 0B 71 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1631 - 1600 0B 72 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1663 - 1632 0B 73 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1695 - 1664 0B 74 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1727 - 1696 0B 75 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1759 - 1728 0B 76 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1760 - 1791 0B 77 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

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(ST) 4 Settings Control and Support Settings

MENU TEXT

DDB 1856 - 1887

Col

0B

Row

7A

Default Setting

Description

0xFFFFFFFF

Available Setting

DDB 1792 - 1823 0B 78 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1824 - 1855 0B 79 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1888 - 1919 0B 7B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1920 - 1951 0B 7C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1952 - 1983 0B 7D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1984 - 2015 0B 7E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 2016 - 2047 0B 7F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

Table 32 - Record control

4.6 Disturbance Recorder Settings (Oscillography)

The disturbance recorder settings include the record duration and trigger position, selection of analog and digital signals to record, and the signal sources that trigger the recording.

The precise event recorder column (“Disturb. Recorder” menu) is visible when the

“Disturb recorder” setting (“Configuration” column) = “visible”.

Important In the following table there are rows which may appear to be duplicated. The convention here is that the:

- First line applies to single breaker variants (e.g. P443, P445,

P543, P544 and P841A).

- Second line applies to dual circuit breaker versions (e.g. P446,

P544, P546 and P841B).

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MENU TEXT Col Row Default Setting

Description

DISTURB

RECORDER

0C 0 0

This column contains settings for the Disturbance Recorder

Available Setting

Duration 0C 1

This sets the overall recording time.

Trigger Position 0C 2

1.5 0.1s to 10.5s step 0.01s

33.3 0 to 100 step 0.1

This sets the trigger point as a percentage of the duration. For example, the default settings show that the overall recording time is set to 1.5 s with the trigger point being at 33.3% of this, giving 0.5 s pre-fault and 1s post fault recording times.

Trigger Mode 0C 3 Single 0 = Single or 1 = Extended

If set to single mode, if a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger. However, if this has been set to Extended, the post trigger timer will be reset to zero, thereby extending the recording time.

Analog Channel 1 0C 4 VA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 1 0C 4 VA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 2 0C 5 VB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 2 0C 5 VB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 3 0C 6 VC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 3 0C 6 VC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 4 0C 7 IA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 4 0C 7 IA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 5 0C 8 IB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 5 0C 8 IB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 6 0C 9 IC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

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MENU TEXT Col Row Default Setting

Description

Available Setting

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 6 0C 9 IC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 7 0C 0A IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 7

Analog Channel 8

0C

0C

0A

0B

IN

IN Sensitive

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 8 0C 0B IN Sensitive

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Digital Input 1 0C 0C Relay 1 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 1 Trigger 0C 0D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 2 0C 0E Relay 2 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 2 Trigger 0C 0F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 3 0C 10 Relay 3 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 3 Trigger 0C 11 Trigger L/H 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 4 0C 12 Relay 4 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 4 Trigger 0C 13 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 5 0C 14 Relay 5 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 5 Trigger 0C 15 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 6 0C 16 Relay 6 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 6 Trigger 0C 17 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Page (ST) 4-112 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 7 0C 18 Relay 7 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 7 Trigger 0C 19 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 8 0C 1A Relay 8 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 8 Trigger 0C 1B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 9 0C 1C Relay 9 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 9 Trigger 0C 1D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 10 0C 1E Relay 10 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 10 Trigger 0C 1F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 11 0C 20 Relay 11 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 11 Trigger 0C 21 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 12 0C 22 Relay 12 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 12 Trigger 0C 23 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 13 0C 24 Relay 13 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 13 Trigger 0C 25 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 14 0C 26 Relay 14 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 14 Trigger 0C 27 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 15 0C 28 Opto Input 1 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 15 Trigger 0C 29 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

P54x/EN ST/Nd5 Page (ST) 4-113

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Digital Input 16 0C 2A Opto Input 2 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 16 Trigger 0C 2B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 17 0C 2C Opto Input 3 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 17 Trigger 0C 2D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 18 0C 2E Opto Input 4 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 18 Trigger 0C 2F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 19 0C 30 Opto Input 5 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 19 Trigger 0C 31 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 20 0C 32 Opto Input 6 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 20 Trigger 0C 33 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 21 0C 34 Opto Input 7 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 21 Trigger 0C 35 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 22 0C 36 Opto Input 8 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 22 Trigger 0C 37 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 23 0C 38 Opto Input 9 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 23 Trigger 0C 39 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 24 0C 3A Opto Input 10 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 24 Trigger 0C 3B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 25 0C 3C Opto Input 11 See Data Types - G32

Page (ST) 4-114 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 25 Trigger 0C 3D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 26 0C 3E Opto Input 12 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 26 Trigger 0C 3F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 27 0C 40 Opto Input 13 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 27 Trigger 0C 41 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 28 0C 42 Opto Input 14 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 28 Trigger 0C 43 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 29 0C 44 Opto Input 15 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 29 Trigger 0C 45 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 30 0C 46 Opto Input 16 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 30 Trigger 0C 47 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 31 0C 48 Not Used See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 31 Trigger 0C 49 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 32 0C 4A Not Used See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 32 Trigger 0C 4B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Analog Channel 9 0C 50 V Checksync

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 9 0C 50 V Checksync

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

P54x/EN ST/Nd5 Page (ST) 4-115

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Analog Channel 10 0C 51 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB,

7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 10

Analog Channel 11

0C

0C

51

52

IA2

IB2

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 11 0C 52 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB,

7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 12 0C 53 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 12 0C 53 IC2

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 =

VB, 7 = VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12

= IC2, 13 = IN2 or 14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

54 Unused 0 Analog Channel 13 0C

0

Analog Channel 13 0C

0

Analog Channel 14 0C

0

Analog Channel 14 0C

54

55

55

Unused

Unused

Unused

0

0

0

0

Analog Channel 15 0C

0

Analog Channel 15 0C

0

Analog Channel 16 0C

0

Analog Channel 16 0C

0

Analog Channel 17 0C

0

Analog Channel 17 0C

0

Analog Channel 18 0C

0

Analog Channel 18 0C

0

Analog Channel 19 0C

56

56

57

57

58

58

59

59

5A

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0

Page (ST) 4-116 P54x/EN ST/Nd5

Control and Support Settings

MENU TEXT Col Row Default Setting

Description

0

Digital Input 39

0

Digital Input 40

0

Digital Input 41

0

Digital Input 42

0

Digital Input 43

0

Digital Input 44

0

Digital Input 45

0

0

Analog Channel 19 0C

0

Analog Channel 20 0C

0

Analog Channel 20 0C

0

0C Digital Input 33

0

Digital Input 34

0

0C

0C Digital Input 35

0

Digital Input 36

0

Digital Input 37

0

Digital Input 38

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

Digital Input 46

0

Digital Input 47

0

Digital Input 48

0

Digital Input 49

0

Digital Input 50

0

0C

0C

0C

0C

0C

5A

5B

5B

70

71

72

73

74

75

76

77

78

79

7A

7B

7C

7D

7E

7F

80

81

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

P54x/EN ST/Nd5

Available Setting

(ST) 4 Settings

Page (ST) 4-117

(ST) 4 Settings

Digital Input 51

0

MENU TEXT

Digital Input 52

0

Digital Input 53

0

Digital Input 54

0

Digital Input 55

0

Digital Input 56

0

Digital Input 57

0

Digital Input 58

0

Digital Input 59

0

Digital Input 60

0

Digital Input 61

0

Digital Input 62

0

Digital Input 63

0

Digital Input 64

0

Digital Input 65

0

Digital Input 66

0

Digital Input 67

0

Digital Input 68

0

Digital Input 69

0

Digital Input 70

0

Digital Input 71

0

Digital Input 72

Col Row

0C 82

Default Setting

Description

Unused 0

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

83

84

85

86

87

88

89

8A

8B

8C

8D

8E

8F

90

91

92

93

94

95

96

97

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Page (ST) 4-118

Control and Support Settings

Available Setting

P54x/EN ST/Nd5

Control and Support Settings

MENU TEXT

0

Digital Input 73

0

Digital Input 74

0

Digital Input 75

0

Digital Input 76

0

Digital Input 77

0

Digital Input 78

0

Digital Input 79

0

Digital Input 80

0

Digital Input 81

0

Digital Input 82

0

Digital Input 83

0

Digital Input 84

0

Digital Input 85

0

Digital Input 86

0

Digital Input 87

0

Digital Input 88

0

Digital Input 89

0

Digital Input 90

0

Digital Input 91

0

Digital Input 92

0

Digital Input 93

0

Col Row Default Setting

0C 98 Unused

0C 99 Unused

0C 9A Unused

0C 9B Unused

0C 9C Unused

0C 9D Unused

0C 9E Unused

0C 9F Unused

0C A0 Unused

0C A1 Unused

0C A2 Unused

0C A3 Unused

0C A4 Unused

0C A5 Unused

0C A6 Unused

0C A7 Unused

0C A8 Unused

0C A9 Unused

0C AA Unused

0C AB Unused

0C AC Unused

Description

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

P54x/EN ST/Nd5

Available Setting

(ST) 4 Settings

Page (ST) 4-119

(ST) 4 Settings

Digital Input 94

0

MENU TEXT

Digital Input 95

0

Digital Input 96

0

Digital Input 97

0

Digital Input 98

0

Digital Input 99

0

Digital Input 100

0

Digital Input 101

0

Digital Input 102

0

Digital Input 103

0

Digital Input 104

0

Digital Input 105

0

Digital Input 106

0

Digital Input 107

0

Digital Input 108

0

Digital Input 109

0

Digital Input 110

0

Digital Input 111

0

Digital Input 112

0

Digital Input 113

0

Digital Input 114

0

Digital Input 115

Col Row

0C AD

Default Setting

Description

Unused 0

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

AE

AF

B0

B1

B2

B3

B4

B5

B6

B7

B8

B9

BA

BB

BC

BD

BE

BF

C0

C1

C2

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Page (ST) 4-120

Control and Support Settings

Available Setting

P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

0

Digital Input 116

0

Digital Input 117

0

Digital Input 118

0

Digital Input 119

0

Digital Input 120

0

Digital Input 121

0

Digital Input 122

0

Digital Input 123

0

Digital Input 124

0

Digital Input 125

0

Digital Input 126

0

Digital Input 127

0

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

C3

C4

C5

C6

C7

C8

C9

CA

CB

CC

CD

CE

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Digital Input 128

0

0C CF

Table 33 - Disturbance recorder

Unused

0

0

0

0

0

0

0

0

0

0

0

0

0

Available Setting

4.7 Measurements

MENU TEXT Col Row Default Setting

Description

Available Setting

MEASURE'T SETUP 0D 0 0

This column contains settings for the measurement setup

Default Display 0D 1 Description

0 = User Banner, 1 = 3Ph + N Current, 2 =

3Ph Voltage, 3 = Power, 4 = Date and Time,

5 = Description, 6 = Plant Reference, 7 =

Frequency, 8 = Access Level

This setting can be used to select the default display from a range of options, note that it is also possible to view the other default displays whilst at the default level using the 4 and 6 keys. However once the 15 minute timeout elapses the default display will revert to that selected by this setting.

P54x/EN ST/Nd5 Page (ST) 4-121

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Local Values 0D 2 Primary 0 = Primary or 1 = Secondary

This setting controls whether measured values via the front panel user interface and the front courier port are displayed as primary or secondary quantities.

Remote Values 0D 3 Primary 0 = Primary or 1 = Secondary

This setting controls whether measured values via the rear communication port are displayed as primary or secondary quantities.

Measurement Ref 0D 4 VA 0 = VA, 1 = VB, 2 = VC, 3 = IA, 4 = IB, 5 = IC

Using this setting the phase reference for all angular measurements by the relay can be selected. This reference is for

Measurements 1. Measurements 3 uses always IA local as a reference

Measurement Mode 0D 5 0 0 to 3 step 1

This setting is used to control the signing of the real and reactive power quantities; the signing convention used is defined in the

Measurements and Recording chapter (P54x/EN MR).

Fix Dem Period 0D 6 30

This setting defines the length of the fixed demand window

1 to 99 step 1

Roll Sub Period 0D 7 30 1 to 99 step 1

These two settings are used to set the length of the window used for the calculation of rolling demand quantities

Num Sub Periods 0D 8 1

This setting is used to set the resolution of the rolling sub window

1 to 15 step 1

Distance Unit 0D 9 Miles 0 = Kilometres or 1 = Miles

This setting is used to select the unit of distance for fault location purposes, note that the length of the line is preserved when converting from km to miles and vice versa

Fault Location 0D 0A Distance 0 = Distance, 1 = Ohms, 2 = % of Line

The calculated fault location can be displayed using one of several options selected using this setting

Remote 2 Values 0D 0B Primary 0 = Primary or 1 = Secondary

The setting defines whether the values measured via the 2nd Rear Communication port are displayed in primary or secondary terms.

Table 34 - Measurements

4.8 Communications Settings

MENU TEXT

The communications settings apply to the rear communications ports only and will depend upon the particular protocol being used. Further details are given in the SCADA

Communications chapter.

Depending on the values stored, the available settings may change too. The applicability of each setting is given in the description or available setting cell. These settings are available in the menu ‘ Communications’ column and are displayed.

These settings potentially cover a variety of different protocols and ports, including:

Col Row Default Setting Available Setting

Description

COMMUNICATIONS 0E 0 0

This column contains general communications settings

RP1 Protocol 0E 1 0

0 = Courier, 1 = IEC870-5-103, 2 = Modbus,

3 = DNP3.0

Indicates the communications protocol that will be used on the rear communications port.

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

RP1 Address 0E 2 255 0 to 255 step 1

Courier or IEC60870-5-103 versions only. This cell sets the unique address for the relay such that only one relay is accessed by master station software.

RP1 Address 0E 2 1 0 to 65519 step 1

DNP3.0 versions only. This cell sets the unique address for the relay such that only one relay is accessed by master station software.

RP1 InactivTimer 0E 3 15 1 to 30 step 1

This cell controls how long the relay will wait without receiving any messages on the rear port before it reverts to its default state, including resetting any password access that was enabled.

RP1 Baud Rate 0E 4 19200 bits/s 0 = 9600 bits/s or 1 = 19200 bits/s

IEC60870-5-103 versions only. This cell controls the communication speed between relay and master station. It is important that both relay and master station are set at the same speed setting.

RP1 Baud Rate 0E 4 19200 bits/s

0 = 1200 bits/s, 1 = 2400 bits/s, 2 = 4800 bits/s, 3 = 9600 bits/s, 4 = 19200 bits/s, 5 =

38400 bits/s

DNP3.0 versions only. This cell controls the communication speed between relay and master station. It is important that both relay and master station are set at the same speed setting.

RP1 Parity 0E 5 None 0 = Odd, 1 = Even, 2 = None

DNP3.0 versions only. This cell controls the parity format used in the data frames. It is important that both relay and master station are set with the same parity setting.

RP1 Meas Period 0E 6 10 1s to 60s step 1s

IEC60870-5-103 versions only. This cell controls the time interval that the relay will use between sending measurement data to the master station.

RP1 PhysicalLink 0E 7 Copper 0 = Copper or 1 = Fibre Optic

This cell defines whether an electrical EIA(RS) 485 or fiber optic connection is being used for communication between the master station and relay. If ‘Fiber Optic’ is selected, the optional fiber optic communications board will be required.

RP1 Time Sync 0E 8 Disabled 0 = Disabled or 1 = Enabled

DNP3.0 versions only. If set to Enabled the master station can be used to synchronize the time on the relay. If set to Disabled either the internal free running clock or IRIG-B input are used.

Function Type 0E 9 Differential 192 0 = Differential 192 or 1 = Distance 128

IEC60870-5-103 versions only. This cell defines the base Function type for IEC60870-5-103 protocol

RP1 CS103Blocking 0E 0A Disabled

0 = Disabled, 1 = Monitor Blocking or 2 =

Command Blocking

IEC60870-5-103 versions only. There are three settings associated with this cell:

Disabled - No blocking selected.

Monitor Blocking - When the monitor blocking DDB Signal is active high, either by energizing an opto input or control input, reading of the status information and disturbance records is not permitted. When in this mode the relay returns a “termination of general interrogation” message to the master station.

Command Blocking - When the command blocking DDB signal is active high, either by energizing an opto input or control input, all remote commands will be ignored (i.e. CB Trip/Close, change setting group etc.). When in this mode the relay returns a

“negative acknowledgement of command” message to the master station.

RP1 Card Status 0E 0B 0

0 = K Bus OK, 1 = EIA485 OK or 2 = Fibre

Optic OK

Displays the status of the card in RP1

RP1 Port Config 0E 0C K Bus 0 = K Bus or 1 = EIA485 (RS485)

Courier versions only. This cell defines whether an electrical KBus or EIA(RS)485 is being used for communication between the master station and relay.

RP1 Comms Mode 0E 0D IEC60870 FT1.2

0 = IEC60870 FT1.2 Frame or

1 = 10-bit no parity

Courier versions only. The choice is either IEC 60870 FT1.2 for normal operation with 11-bit modems, or 10-bit no parity.

P54x/EN ST/Nd5 Page (ST) 4-123

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

RP1 Baud Rate 0E 0E 19200 bits/s

0 = 9600 bits/s, 1 = 19200 bits/s, 2 = 38400 bits/s

Courier versions only. This cell controls the communication speed between relay and master station. It is important that both relay and master station are set at the same speed setting.

Meas Scaling 0E 0F Normalised 0 = Normalised, 1 = Primary, 2 = Secondary

DNP 3.0 versions only. Setting to report analogue values in terms of primary, secondary or normalized (with respect to the

CT/VT ratio setting) values.

Message Gap 0E 10 0 0 to 50 step 1

DNP 3.0 versions only. This setting allows the master station to have an interframe gap.

DNP Need Time 0E 11 10 1 to 30 step 1

DNP 3.0 versions only. The duration of time waited before requesting another time sync from the master.

DNP App Fragment 0E 12 2048 100 to 2048 step 1

DNP 3.0 versions only. The maximum message length (application fragment size) transmitted by the relay.

DNP App Timeout 0E 13 2 1s to 120s step 1s

DNP 3.0 versions only. Duration of time waited, after sending a message fragment and awaiting a confirmation from the master.

DNP SBO Timeout 0E 14 10 1s to 10s step 1s

DNP 3.0 versions only. Duration of time waited, after receiving a select command and awaiting an operate confirmation from the master.

DNP Link Timeout 0E 15 0 0s to 120s step 1s

DNP 3.0 versions only. Duration of time that the relay will wait for a Data Link Confirm from the master. A value of 0 means data link support disabled and 1 to 120 seconds is the timeout setting.

ETH Protocol 0E 1F IEC61850 IEC61850 or DNP3.0

IEC61850 versions only. Indicates that IEC 61850 will be used on the rear Ethernet port.

MAC Addr1 0E 22 0

IEC61850 versions only. Indicates the MAC address of the rear Ethernet port.

MAC Addr2 0E 23 0

IEC61850 versions only. Indicates the MAC address of the rear Ethernet port.

0

NIC Tunl Timeout 0E 64 15 1 to 30 step 1

IEC61850 versions only. Duration of time waited before an inactive tunnel to MiCOM S1 Studio is reset.

NIC Link Report 0E 6A Alarm 0 = Alarm, 1 = Event, 2 = None

IEC61850 versions only.

Configures how a failed/unfitted network link (copper or fiber) is reported:

Alarm - an alarm is raised for a failed link

Event - an event is logged for a failed link

None - nothing reported for a failed link

Redundancy Conf 0E 70 Sub-Heading

Visible when Model no. Hardware option (Field 7) = Q or R,Build=IEC61850

Sub-Heading

MAC Address 0E 71 NIOS MAC Addr MAC address (Ethernet)

Visible when Model no. Hardware option (Field 7) = Q or R,Protocol - "IEC61850".

IP Address 0E 72 0.0.0.0

Visible when Model no. Hardware option (Field 7) = Q or R,Protocol - "IEC61850".

<IP address of relay>

Subnet Mask 0E 73 0.0.0.0

Visible when Model no. Hardware option (Field 7) = Q or R,Protocol - "IEC61850".

<Subnet mask of relay>

Gateway 0E 74 0.0.0.0 <Gateway address>

Visible when Model no. Hardware option (Field 7) = Q or R,Protocol - "IEC61850".

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

REAR PORT2 (RP2)

RP2 versions only.

RP2 Protocol

0E

0E

80

81

0

Courier 0

RP2 versions only. Indicates the communications protocol that will be used on the rear communications port.

RP2 Card Status 0E 84 0

0 = Unsupported,

1 = Card Not Fitted,

2 = EIA232 OK,

3 = EIA485 OK,

4 = K Bus OK

RP2 versions only. Displays the status of the card in RP2

RP2 Port Config 0E 88 EIA232 (RS232)

0 = EIA232 (RS232),

1 = EIA485 (RS485),

2 = K-Bus

RP2 versions only. This cell defines whether an electrical EIA(RS)232, EIA(RS)485 or KBus is being used for communication.

RP2 Comms Mode 0E 8A IEC60870 FT1.2

0 = IEC60870 FT1.2 Frame or 1 = 10-bit no parity

RP2 versions only. The choice is either IEC 60870 FT1.2 for normal operation with 11-bit modems, or 10-bit no parity.

RP2 Address 0E 90 255 0 to 255 step 1

RP2 versions only. This cell sets the unique address for the relay such that only one relay is accessed by master station software.

RP2 InactivTimer 0E 92 15 1 to 30 step 1

RP2 versions only. This cell controls how long the relay will wait without receiving any messages on the rear port before it reverts to its default state, including resetting any password access that was enabled.

RP2 Baud Rate 0E 94 19200 bits/s

0 = 9600 bits/s, 1 = 19200 bits/s, 2 = 38400 bits/s

RP2 versions only. This cell controls the communication speed between relay and master station. It is important that both relay and master station are set at the same speed setting.

NIC Protocol 0E A0 DNP 3.0 IEC61850 or DNP3.0

DNP 3.0 over Ethernet versions only. Indicates that DNP 3.0 will be used on the rear Ethernet port.

IP Address 0E A1 0.0.0.0

DNP 3.0 over Ethernet versions only. Indicates the IP address of the relay

Subnet Mask 0E A2 0.0.0.0

DNP 3.0 over Ethernet versions only. Indicates the Subnet address

NIC MAC Address 0E A3 Ethernet MAC Address

DNP 3.0 over Ethernet versions only. Indicates the MAC address of the rear Ethernet port.

Gateway 0E A4 0.0.0.0

DNP 3.0 over Ethernet versions only. Indicates the Gateway address

DNP Time Sync 0E A5 Disabled 0 = Disabled or 1 = Enabled

DNP 3.0 over Ethernet versions only. If set to ‘Enabled’ the DNP3.0 master station can be used to synchronize the time on the relay. If set to ‘Disabled’ either the internal free running clock, or IRIG-B input are used.

Meas Scaling 0E A6 Normalised 0 = Normalised, 1 = Primary, 2 = Secondary

DNP 3.0 over Ethernet versions only. Setting to report analogue values in terms of primary, secondary or normalized (with respect to the CT/VT ratio setting) values.

NIC Tunl Timeout 0E A7 5 1 to 30 step 1

DNP 3.0 over Ethernet versions only. Duration of time waited before an inactive tunnel to MiCOM S1 Studio is reset.

NIC Link Report 0E A8 Alarm 0 = Alarm, 1 = Event, 2 = None

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(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

DNP 3.0 over Ethernet versions only.

Configures how a failed/unfitted network link (copper or fiber) is reported:

Alarm - an alarm is raised for a failed link

Event - an event is logged for a failed link

None - nothing reported for a failed link

SNTP PARAMETERS 0E AA

DNP 3.0 over Ethernet versions only

0

Available Setting

SNTP Server 1 0E AB 0.0.0.0

DNP 3.0 over Ethernet versions only. Indicates the SNTP Server 1 address.

SNTP Server 2 0E AC 0.0.0.0

DNP 3.0 over Ethernet versions only. Indicates the SNTP Server 2 address.

SNTP Poll Rate 0E AD 64

DNP 3.0 over Ethernet versions only. Duration of SNTP poll rate in seconds.

DNP Need Time 0E B1 10 1 to 30 step 1

DNP 3.0 versions only. The duration of time waited before requesting another time sync from the master.

DNP App Fragment 0E B2 2048 100 to 2048 step 1

DNP 3.0 versions only. The maximum message length (application fragment size) transmitted by the relay.

DNP App Timeout 0E B3 2 1s to 120s step 1s

DNP 3.0 versions only. Duration of time waited, after sending a message fragment and awaiting a confirmation from the master.

DNP SBO Timeout 0E B4 10 1s to 10s step 1s

DNP 3.0 versions only. Duration of time waited, after receiving a select command and awaiting an operate confirmation from the master.

Table 35 - Communications settings

4.9 Commissioning Tests

To help minimising the time required to test MiCOM relays the relay provides several test facilities under the ‘COMMISSION TESTS’ menu heading.

There are menu cells which allow the status of the opto-isolated inputs, output relay contacts, internal Digital Data Bus (DDB) signals and user-programmable LEDs to be monitored. Additionally there are cells to test the operation of the output contacts, userprogrammable LEDs.

This column is visible when the “Commission tests” setting (“Configuration” column) =

“visible”.

There are also cells to test the operation of, where available, the auto-reclose cycles.

Col Row Default Setting Available Setting MENU TEXT

Description

COMMISSION TESTS 0F 0 0

This column contains commissioning test settings

Opto I/P Status 0F 1 0

This menu cell displays the status of the available relay’s opto-isolated inputs as a binary string, a ‘1’ indicating an energized opto-isolated input and a ‘0’ a de-energized one.

Relay O/P Status 0F 2 0

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

This menu cell displays the status of the digital data bus (DDB) signals that result in energization of the available output relays as a binary string, a ‘1’ indicating an operated state and ‘0’ a non-operated state.

When the ‘Test Mode’ cell is set to ‘Enabled’ the ‘Relay O/P Status’ cell does not show the current status of the output relays and hence can not be used to confirm operation of the output relays. Therefore it will be necessary to monitor the state of each contact in turn.

Test Port Status 0F 3 0

This menu cell displays the status of the eight digital data bus (DDB) signals that have been allocated in the ‘Monitor Bit’ cells.

Monitor Bit 1 0F 5 1060 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 2 0F 6 1062 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 3 0F 7 1064 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 4 0F 8 1066 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 5 0F 9 1068 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 6 0F 0A 1070 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 7 0F 0B 1072 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Monitor Bit 8 0F 0C 1074 0 to 2047 step 1

The eight ‘Monitor Bit’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘Test Port

Status’ cell or via the monitor/download port.

Test Mode 0F 0D Disabled

0 = Disabled, 1 = Test Mode, 2 = Contacts

Blocked

The Test Mode menu cell is used to allow secondary injection testing to be performed on the relay without operation of the trip contacts. It also enables a facility to directly test the output contacts by applying menu controlled test signals. To select test mode the Test Mode menu cell should be set to ‘Test Mode’, which takes the relay out of service and blocks operation of output contacts and maintenance, counters. It also causes an alarm condition to be recorded and the yellow ‘Out of Service’ LED to illuminate and an alarm message ‘Prot’n. Disabled’ is given. This also freezes any information stored in the Circuit Breaker

Condition column and in IEC 60870-5-103 builds changes the Cause of Transmission, COT, to Test Mode. To enable testing of output contacts the Test Mode cell should be set to Contacts Blocked. This blocks the protection from operating the contacts and enables the test pattern and contact test functions which can be used to manually operate the output contacts. Once testing is complete the cell must be set back to ‘Disabled’ to restore the relay back to service.

Test Pattern 0F 0E 0x0 0=Not Operated or 1=Operated

This cell is used to select the output relay contacts that will be tested when the ‘Contact Test’ cell is set to ‘Apply Test’.

Contact Test 0F 0F No Operation

0 = No Operation, 1 = Apply Test, 2 =

Remove Test

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(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

When the ‘Apply Test’ command in this cell is issued the contacts set for operation (set to ‘1’) in the ‘Test Pattern’ cell change state. After the test has been applied the command text on the LCD will change to ‘No Operation’ and the contacts will remain in the Test State until reset issuing the ‘Remove Test’ command. The command text on the LCD will again revert to ‘No

Operation’ after the ‘Remove Test’ command has been issued.

Note: When the ‘Test Mode’ cell is set to ‘Enabled’ the ‘Relay O/P Status’ cell does not show the current status of the output relays and hence can not be used to confirm operation of the output relays. Therefore it will be necessary to monitor the state of each contact in turn.

Test LEDs 0F 10 No Operation 0 = No Operation or 1 = Apply Test

When the ‘Apply Test’ command in this cell is issued the eighteen user-programmable LEDs will illuminate for approximately 2 seconds before they extinguish and the command text on the LCD reverts to ‘No Operation’.

Test Autoreclose 0F 11 No Operation

0 = No Operation, 1 = Trip 3 Pole, 2 = Trip

Pole A, 3 = Trip Pole B, 4 = Trip Pole C

This is a command used to simulate a single pole or three phase tripping in order to test Auto-reclose cycle.

Static Test Mode 0F 12 Disabled 0 = Disabled or 1 = Enabled

When Static test is Enabled, delta phase selectors and the delta directional line are bypassed to allow the user to test the relay with older injection test sets that are incapable of simulating real dynamic step changes in current and voltage. Resulting trip times will be slower, as extra filtering of distance comparators is also switched-in.

0 = Disabled, 1 = External, 2 = Internal Loopback Mode 0F 13 Disabled

Setting that allows communication loopback testing.

IM64 TestPattern 0F 14 0 0 to 16 step 1

This cell is used to set the DDB signals included in the User Defined Inter-Relay Commands IM64 when the ‘IM64 Test Mode’ cell is set to ‘Enable’.

IM64 Test Mode 0F 15 Disabled 0 = Disabled or 1 = Enabled

When the Enable command in this cell is issued the DDB set for operation (set to ‘1’) in the ‘Test Pattern’ cell change state.

Red LED Status 0F 1A 0

This cell is an eighteen bit binary string that indicates which of the user-programmable LEDs on the relay are illuminated with the Red LED input active when accessing the relay from a remote location, a ‘1’ indicating a particular LED is lit and a ‘0’ not lit.

Green LED Status 0F 1B 0

This cell is an eighteen bit binary string that indicates which of the user-programmable LEDs on the relay are illuminated with the Green LED input active when accessing the relay from a remote location, a ‘1’ indicating a particular LED is lit and a ‘0’ not lit.

0 DDB 31 - 0 0F 20

Displays the status of DDB signals

DDB 63 - 32 0F 21

Displays the status of DDB signals

DDB 95 - 64 0F 22

Displays the status of DDB signals

DDB 127 - 96 0F 23

0

0

0

Displays the status of DDB signals

DDB 159 - 128 0F 24

Displays the status of DDB signals

DDB 191 - 160 0F 25

Displays the status of DDB signals

DDB 223 - 192 0F 26

Displays the status of DDB signals

DDB 255 - 224 0F 27

Displays the status of DDB signals

DDB 287 - 256 0F 28

0

0

0

0

0

Page (ST) 4-128 P54x/EN ST/Nd5

Control and Support Settings

MENU TEXT Col Row

Displays the status of DDB signals

DDB 319 - 288 0F 29

Displays the status of DDB signals

DDB 351 - 320 0F 2A

Displays the status of DDB signals

DDB 383 - 352 0F 2B

Displays the status of DDB signals

DDB 415 - 384 0F 2C

Displays the status of DDB signals

DDB 447 - 416 0F 2D

Displays the status of DDB signals

DDB 479 - 448 0F 2E

Displays the status of DDB signals

DDB 511 - 480 0F 2F

Displays the status of DDB signals

DDB 543 - 512 0F 30

Displays the status of DDB signals

DDB 575 - 544 0F 31

Displays the status of DDB signals

DDB 607 - 576 0F 32

Displays the status of DDB signals

DDB 639 - 608 0F 33

Displays the status of DDB signals

DDB 671 - 640 0F 34

Displays the status of DDB signals

DDB 703 - 672 0F 35

Displays the status of DDB signals

DDB 735 - 704 0F 36

Displays the status of DDB signals

DDB 767 - 736 0F 37

Displays the status of DDB signals

DDB 799 - 768 0F 38

Displays the status of DDB signals

DDB 831 - 800 0F 39

Displays the status of DDB signals

DDB 863 - 832 0F 3A

Displays the status of DDB signals

DDB 895 - 864 0F 3B

Displays the status of DDB signals

DDB 927 - 896 0F 3C

Displays the status of DDB signals

DDB 959 - 928 0F 3D

Displays the status of DDB signals

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Default Setting

Description

(ST) 4 Settings

Available Setting

P54x/EN ST/Nd5 Page (ST) 4-129

(ST) 4 Settings

MENU TEXT Col Row

DDB 991 - 960 0F 3E

Displays the status of DDB signals

DDB 1023 - 992 0F 3F

Displays the status of DDB signals

DDB 1055 - 1024 0F 40

Displays the status of DDB signals

DDB 1087 - 1056 0F 41

Displays the status of DDB signals

DDB 1119 - 1088 0F 42

Displays the status of DDB signals

DDB 1151 - 1120 0F 43

Displays the status of DDB signals

DDB 1183 - 1152 0F 44

Displays the status of DDB signals

DDB 1215 - 1184 0F 45

Displays the status of DDB signals

DDB 1247 - 1216 0F 46

Displays the status of DDB signals

DDB 1279 - 1248 0F 47

Displays the status of DDB signals

DDB 1311 - 1280 0F 48

Displays the status of DDB signals

DDB 1343 - 1312 0F 49

Displays the status of DDB signals

DDB 1375 - 1344 0F 4A

Displays the status of DDB signals

DDB 1407 - 1376 0F 4B

Displays the status of DDB signals

DDB 1439 - 1408 0F 4C

Displays the status of DDB signals

DDB 1471 - 1440 0F 4D

Displays the status of DDB signals

DDB 1503 - 1472 0F 4E

Displays the status of DDB signals

DDB 1535 - 1504 0F 4F

Displays the status of DDB signals

DDB 1567 - 1536 0F 50

Displays the status of DDB signals

DDB 1599 - 1568 0F 51

Displays the status of DDB signals

DDB 1631 - 1600 0F 52

Displays the status of DDB signals

DDB 1663 - 1632 0F 53

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Default Setting

Description

Control and Support Settings

Available Setting

Page (ST) 4-130 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Displays the status of DDB signals

DDB 1695 - 1664 0F 54

Displays the status of DDB signals

DDB 1727 - 1696 0F 55

Displays the status of DDB signals

DDB 1759 - 1728 0F 56

Displays the status of DDB signals

DDB 1791 - 1760 0F 57

Displays the status of DDB signals

Table 36 - Commissioning tests

0

0

0

0

4.10 Circuit Breaker Condition Monitor Setup

MENU TEXT

The following table, detailing the options available for the Circuit Breaker condition monitoring, is taken from the relay menu. It includes the setup of the current broken facility and those features that can be set to raise an alarm or Circuit Breaker lockout.

The following table, detailing the options available for the Circuit Breaker condition monitoring for the P543/P545, is taken from the relay menu. It includes the setup of the ruptured current facility and those features that can be set to raise an alarm, or lockout the CB.

For the P544/P546 there is a similar set of settings duplicated for the second circuit breaker controlled. Although the menu text differs slightly to reflect the monitoring of two circuit breakers (CB1 and CB2), in all other respects the settings are the same.

Col Row Default Setting

Description

Available Setting

CB MONITOR SETUP 10 0 0

This column contains Circuit Breaker monitoring parameters

Broken I^ 10 1 2 1 to 2 step 0.1

This sets the factor to be used for the cumulative I^ counter calculation that monitors the cumulative severity of the duty placed on the interrupter. This factor is set according to the type of Circuit Breaker used

CB1 Broken I^ 10 1 2 1 to 2 step 0.1

This sets the factor to be used for the cumulative I^ counter calculation that monitors the cumulative severity of the duty placed on the interrupter. This factor is set according to the type of Circuit Breaker used

I^ Maintenance 10 2 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting which determines if an alarm will be raised or not when the cumulative I^ maintenance counter threshold is exceeded.

CB1 I^ Maintenance 10 2 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting which determines if an alarm will be raised or not when the cumulative I^ maintenance counter threshold is exceeded.

I^ Maintenance 10 3 1000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ maintenance counter monitors.

CB1 I^ Maintenance 10 3 1000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ maintenance counter monitors.

I^ Lockout 10 4 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

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(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting which determines if an alarm will be raised or not when the cumulative I^lockout counter threshold is exceeded.

CB1 I^ Lockout 10 4 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting which determines if an alarm will be raised or not when the cumulative I^lockout counter threshold is exceeded.

I^ Lockout 10 5 2000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ lockout counter monitor. Set that should maintenance not be carried out, the relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

CB1 I^ Lockout 10 5 2000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ lockout counter monitor. Set that should maintenance not be carried out, the relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

0 = Alarm Disabled or 1 = Alarm Enabled No. CB Ops Maint 10 6 Alarm Disabled

Setting to activate the number of circuit breaker operations maintenance alarm.

No.CB1 Ops Maint 10 6 Alarm Disabled

Setting to activate the number of circuit breaker operations maintenance alarm.

0 = Alarm Disabled or 1 = Alarm Enabled

No. CB Ops Maint 10 7 10 1 to 10000 step 1

Sets the threshold for number of circuit breaker operations maintenance alarm, indicating when preventative maintenance is due.

No.CB1 Ops Maint 10 7 10 1 to 10000 step 1

Sets the threshold for number of circuit breaker operations maintenance alarm, indicating when preventative maintenance is due.

No. CB Ops Lock 10 8 Alarm Disabled

Setting to activate the number of circuit breaker operations lockout alarm.

No.CB1 Ops Lock 10 8 Alarm Disabled

0 = Alarm Disabled or 1 = Alarm Enabled

0 = Alarm Disabled or 1 = Alarm Enabled

Setting to activate the number of circuit breaker operations lockout alarm.

No. CB Ops Lock 10 9 20 1 to 10000 step 1

Sets the threshold for number of circuit breaker operations lockout. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

No.CB1 Ops Lock 10 9 20 1 to 10000 step 1

Sets the threshold for number of circuit breaker operations lockout. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

CB Time Maint 10 0A Alarm Disabled

Setting to activate the circuit breaker operating time maintenance alarm.

0 = Alarm Disabled or 1 = Alarm Enabled

CB1 Time Maint 10 0A Alarm Disabled

Setting to activate the circuit breaker operating time maintenance alarm.

CB Time Maint 10 0B 0.1

0 = Alarm Disabled or 1 = Alarm Enabled

0.005s to 0.5s step 0.001s

Setting for the circuit operating time threshold which is set in relation to the specified interrupting time of the circuit breaker.

CB1 Time Maint 10 0B 0.1 0.005s to 0.5s step 0.001s

Setting for the circuit operating time threshold which is set in relation to the specified interrupting time of the circuit breaker.

CB Time Lockout 10 0C Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting to activate the circuit breaker operating time lockout alarm.

CB1 Time Lockout 10 0C Alarm Disabled

Setting to activate the circuit breaker operating time lockout alarm.

CB Time Lockout 10 0D 0.2

0 = Alarm Disabled or 1 = Alarm Enabled

0.005s to 0.5s step 0.001s

Setting for the circuit breaker operating time threshold which is set in relation to the specified interrupting time of the circuit breaker. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

CB1 Time Lockout 10 0D 0.2 0.005s to 0.5s step 0.001s

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting for the circuit breaker operating time threshold which is set in relation to the specified interrupting time of the circuit breaker. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

Fault Freq Lock 10 0E Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Enables the excessive fault frequency alarm.

CB1FltFreqLock 10 0E Alarm Disabled

Enables the excessive fault frequency alarm.

Fault Freq Count 10 0F 10

0 = Alarm Disabled or 1 = Alarm Enabled

1 to 9999 step 1

Sets a circuit breaker frequent operations counter that monitors the number of operations over a set time period

CB1FltFreqCount 10 0F 10 1 to 9999 step 1

Sets a circuit breaker frequent operations counter that monitors the number of operations over a set time period

Fault Freq Time 10 10 3600 0s to 9999s step 1s

Sets the time period over which the circuit breaker operations are to be monitored. Should the set number of trip operations be accumulated within this time period, an alarm can be raised. Excessive fault frequency/trips can be used to indicate that the circuit may need maintenance attention (e.g. Tree-felling or insulator cleaning).

CB1FltFreqTime 10 10 3600 0s to 9999s step 1s

Sets the time period over which the circuit breaker operations are to be monitored. Should the set number of trip operations be accumulated within this time period, an alarm can be raised. Excessive fault frequency/trips can be used to indicate that the circuit may need maintenance attention (e.g. Tree-felling or insulator cleaning).

CB2 Broken I^ 2 10 21 2 1 to 2 step 0.1

This sets the factor to be used for the cumulative I^ counter calculation that monitors the cumulative severity of the duty placed on the interrupter. This factor is set according to the type of Circuit Breaker used

CB2 I^ Maint 10 22 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting which determines if an alarm will be raised or not when the cumulative I^ maintenance counter threshold is exceeded.

CB2 I^ Maint 10 23 1000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ maintenance counter monitors.

CB2 I^ Lockout 10 24 Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting which determines if an alarm will be raised or not when the cumulative I^lockout counter threshold is exceeded.

CB2 I^ Lockout 10 25 2000 1 to 25000 step 1

Setting that determines the threshold for the cumulative I^ lockout counter monitor. Set that should maintenance not be carried out, the relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

No.CB2 OPs Maint 10 26 Alarm Disabled

Setting to activate the number of circuit breaker operations maintenance alarm.

0 = Alarm Disabled or 1 = Alarm Enabled

No.CB2 OPs Maint

No.CB2 OPs Lock

10

10

27

28

10

Alarm Disabled

Setting to activate the number of circuit breaker operations lockout alarm.

1 to 10000 step 1

Sets the threshold for number of circuit breaker operations maintenance alarm, indicating when preventative maintenance is due.

0 = Alarm Disabled or 1 = Alarm Enabled

No.CB2 OPs Lock

CB2 Time Maint

10

10

29

2A

20

Alarm Disabled

Setting to activate the circuit breaker operating time maintenance alarm.

1 to 10000 step 1

Sets the threshold for number of circuit breaker operations lockout. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

0 = Alarm Disabled or 1 = Alarm Enabled

CB2 Time Maint 10 2B 0.1 0.005s to 0.5s step 0.001s

Setting for the circuit operating time threshold which is set in relation to the specified interrupting time of the circuit breaker.

CB2 Time Lockout 10 2C Alarm Disabled 0 = Alarm Disabled or 1 = Alarm Enabled

Setting to activate the circuit breaker operating time lockout alarm.

P54x/EN ST/Nd5 Page (ST) 4-133

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

CB2 Time Lockout 10 2D 0.2 0.005s to 0.5s step 0.001s

Setting for the circuit breaker operating time threshold which is set in relation to the specified interrupting time of the circuit breaker. The relay can be set to lockout the auto-reclose function on reaching a second operations threshold.

CB2FltFreqLock 10 2E Alarm Disabled

Enables the excessive fault frequency alarm.

0 = Alarm Disabled or 1 = Alarm Enabled

CB2FltFreqCount 10 2F 10 1 to 9999 step 1

Sets a circuit breaker frequent operations counter that monitors the number of operations over a set time period

CB2FltFreqTime 10 30 3600 0s to 9999s step 1s

Sets the time period over which the circuit breaker operations are to be monitored. Should the set number of trip operations be accumulated within this time period, an alarm can be raised. Excessive fault frequency/trips can be used to indicate that the circuit may need maintenance attention (e.g. Tree-felling or insulator cleaning).

Table 37 - Circuit breaker condition monitor setup

4.11 Opto Configuration

MENU TEXT Col Row Default Setting

Description

OPTO CONFIG 11 0 0

This column contains opto-input configuration settings

Available Setting

Global Nominal V 11 1 24/27V

0 = 24-27V, 1 = 30-34V, 2 = 48-54V, 3 =

110-125V, 4 = 220-250V or 5 = Custom

Sets the nominal battery voltage for all opto inputs by selecting one of the five standard ratings in the Global Nominal V settings. If Custom is selected then each opto input can individually be set to a nominal voltage value.

Opto Input 1 11 2 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting.

Opto Input 2

Opto Input 3

11

11

3

4

24/27V

24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 4 11 5 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 5 11 6 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 6 11 7 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

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Control and Support Settings (ST) 4 Settings

MENU TEXT

Opto Input 9

Col

11

Row

0A 24/27V

Default Setting

Description

Available Setting

Opto Input 7 11 8 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 8 11 9 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 10 11 0B 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 11 11 0C 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 12 11 0D 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 13 11 0E 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 14 11 0F 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 15 11 10 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 16 11 11 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 17 11 12 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 18 11 13 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 19 11 14 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

P54x/EN ST/Nd5 Page (ST) 4-135

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 20 11 15 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 21 11 16 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 22 11 17 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 23 11 18 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 24 11 19 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 25 11 1A 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 26 11 1B 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 27 11 1C 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 28 11 1D 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 29 11 1E 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 30 11 1F 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Input 31 11 20 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Opto Input 32 11 21 24/27V

0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 =

110/125V or 4 = 220/250V

Each opto input can individually be set to a nominal voltage value if custom is selected for the global setting. The number of inputs may be up to 32, depending on MiCOM P54x model and I/O configuration.

Opto Filter Cntl 11 60 0xFEB7FB 32-bit binary setting: 0 = Off, 1= Energized

Selects each input with a pre-set filter of ½ cycle that renders the input immune to induced noise on the wiring. The number of available bits may be 16, 24 or 32, depending on the I/O configuration.

Characteristic 11 80 Standard 60%-80%

0 = Standard 60% to 80% or

1 = 50% to 70%

Selects the pick-up and drop-off characteristics of the optos. Selecting the standard setting means they nominally provide a

Logic 1 or On value for Voltages ³80% of the set lower nominal voltage and a Logic 0 or Off value for the voltages £60% of the set higher nominal voltage.

Table 38 - Opto configuration

4.12 Control Inputs

MENU TEXT

The control inputs function as software switches that can be set or reset either locally or remotely. These inputs can be used to trigger any function that they are connected to as part of the PSL. They can also be set to perform a pre-defined control function. This is achieved by mapping in the Hotkey menu. The operating mode for each of the Control

Inputs can be set individually.

This column is visible when the “Control I/P Config” setting (“Configuration” column) =

“visible”.

Col Row Default Setting Available Setting

Description

CONTROL INPUTS 12 0 0

This column contains settings for the type of control input (32 in all)

Ctrl I/P Status 12 1 0

Binary Flag (32 bits) Indexed String (0 = Reset,

1 = Set)

Cell that is used to set (1) and reset (0) the selected Control Input by simply scrolling and changing the status of selected bits.

This command will be then recognized and executed in the PSL. Alternatively, each of the 32 Control input can also be set and reset using the individual menu setting cells as follows:

0 = No Operation, 1 = Set , 2 = Reset Control Input 1 12 2 No Operation

Setting to allow Control Inputs 1 set/ reset.

Control Input 2 12 3 No Operation

Setting to allow Control Inputs 2 set/ reset.

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset Control Input 3 12 4 No Operation

Setting to allow Control Inputs 3 set/ reset.

Control Input 4 12 5 No Operation

Setting to allow Control Inputs 4 set/ reset.

Control Input 5 12 6 No Operation

Setting to allow Control Inputs 5 set/ reset.

Control Input 6 12 7 No Operation

Setting to allow Control Inputs 6 set/ reset.

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

P54x/EN ST/Nd5 Page (ST) 4-137

(ST) 4 Settings

MENU TEXT Col Row

Control Input 7 12 8 No Operation

Setting to allow Control Inputs 7 set/ reset.

Control Input 8 12 9 No Operation

Default Setting

Description

Setting to allow Control Inputs 8 set/ reset.

Control Input 9 12 0A No Operation

Setting to allow Control Inputs 9 set/ reset.

Control Input 10 12 0B No Operation

Setting to allow Control Inputs 10 set/ reset.

Control Input 11 12 0C No Operation

Setting to allow Control Inputs 11 set/ reset.

Control Input 12 12 0D No Operation

Setting to allow Control Inputs 12 set/ reset.

Control Input 13 12 0E No Operation

Setting to allow Control Inputs 13 set/ reset.

Control Input 14 12 0F No Operation

Setting to allow Control Inputs 14 set/ reset.

Control Input 15 12 10 No Operation

Setting to allow Control Inputs 15 set/ reset.

Control Input 16 12 11 No Operation

Setting to allow Control Inputs 16 set/ reset.

Control Input 17 12 12 No Operation

Setting to allow Control Inputs 17 set/ reset.

Control Input 18 12 13 No Operation

Setting to allow Control Inputs 18 set/ reset.

Control Input 19 12 14 No Operation

Setting to allow Control Inputs 19 set/ reset.

Control Input 20 12 15 No Operation

Setting to allow Control Inputs 20 set/ reset.

Control Input 21 12 16 No Operation

Setting to allow Control Inputs 21 set/ reset.

Control Input 22 12 17 No Operation

Setting to allow Control Inputs 22 set/ reset.

Control Input 23 12 18 No Operation

Setting to allow Control Inputs 23 set/ reset.

Control Input 24 12 19 No Operation

Setting to allow Control Inputs 24 set/ reset.

Control Input 25 12 1A No Operation

Setting to allow Control Inputs 25 set/ reset.

Control Input 26 12 1B No Operation

Setting to allow Control Inputs 26 set/ reset.

Control Input 27 12 1C No Operation

Setting to allow Control Inputs 27 set/ reset.

Control Input 28 12 1D No Operation

Control and Support Settings

Available Setting

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

Page (ST) 4-138 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row

Setting to allow Control Inputs 28 set/ reset.

Control Input 29 12 1E No Operation

Setting to allow Control Inputs 29 set/ reset.

Default Setting

Description

Available Setting

0 = No Operation, 1 = Set , 2 = Reset

Control Input 30 12 1F No Operation

Setting to allow Control Inputs 30 set/ reset.

Control Input 31 12 20 No Operation

Setting to allow Control Inputs 31 set/ reset.

0 = No Operation, 1 = Set , 2 = Reset

0 = No Operation, 1 = Set , 2 = Reset

Control Input 32 12 21 No Operation

Setting to allow Control Inputs 32 set/ reset.

0 = No Operation, 1 = Set , 2 = Reset

Setting I/P Stat 12 22 0

Binary Flag (16 bits) Indexed String (0 = Reset,

1 = Set)

Cell that is used to set (1) and reset (0) the selected Setting Input by simply scrolling and changing the status of selected bits.

This command will be then recognized and executed in the PSL. Alternatively, each of the 32 Setting input can also be enabled and disabled using the individual menu setting cells as follows:

Setting Input 33 12 23 Disabled 0 = Disabled, 1 = Enabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 34 12 24 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 35 12 25 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 36 12 26 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 37 12 27 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 38 12 28 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 39 12 29 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 40 12 30 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 41 12 31 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 42 12 32 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 43 12 33 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 44 12 34 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 45 12 35 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 46 12 36 Disabled

Setting to allow Setting Input 33 enable/Disable.

Setting Input 47 12 37 Disabled

Setting to allow Setting Input 33 enable/Disable.

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

0 = Disabled, 1 = Enabled

P54x/EN ST/Nd5 Page (ST) 4-139

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row

Setting Input 48 12 38 Disabled

Setting to allow Setting Input 33 enable/Disable.

Table 39 - Control inputs

Default Setting

Description

Available Setting

0 = Disabled, 1 = Enabled

4.13 Control Input Configuration

MENU TEXT

The control inputs function as software switches that can be set or reset either locally or remotely. These inputs can be used to trigger any function that they are connected to as part of the PSL.

This column is visible when the “Control I/P Config” setting (“Configuration” column) =

“visible”.

Instead of operating the control inputs as described in the above section, they could also be set to perform a pre-defined control function. This is achieved by mapping in the

Hotkey menu. The operating mode for each of the 32 Control Inputs can be set individually.

Col Row Default Setting Available Setting

Description

CTRL I/P CONFIG 13 0 0

This column contains settings for the type of control input (32 in all)

Hotkey Enabled 13 1 0xFFFFFFFF 0xFFFFFFFF to 32 step 1

Setting to allow the control inputs to be individually assigned to the Hotkey menu by setting ‘1’ in the appropriate bit in the

Hotkey Enabled cell. The hotkey menu allows the control inputs to be set, reset or pulsed without the need to enter the

CONTROL INPUTS column.

Control Input 1 13 10 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’. A latched control input will remain in the set state until a reset command is given, either by the menu or the serial communications. A pulsed control input, however, will remain energized for

10 ms after the set command is given and will then reset automatically (i.e. no reset command required).

Ctrl Command 1 13 11 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 2 13 14 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 2 13 15 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 3 13 18 Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 3 13 19 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 4 13 1C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Page (ST) 4-140 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Ctrl Command 4 13 1D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 5 13 20 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 5 13 21 Set/Reset

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 6 13 24 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Ctrl Command 6 13 25 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 7 13 28 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 7 13 29 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 8 13 2C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 8 13 2D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 9 13 30 Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 9

Control Input 10

13

13

31

34

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 10

Control Input 11

13

13

35

38

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 11 13 39 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 12 13 3C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

P54x/EN ST/Nd5 Page (ST) 4-141

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Ctrl Command 12 13 3D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 13 13 40 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 13 13 41 Set/Reset

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 14 13 44 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Ctrl Command 14 13 45 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 15 13 48 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 15 13 49 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 16 13 4C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 16 13 4D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 17 13 50 Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 17

Control Input 18

13

13

51

54

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 18

Control Input 19

13

13

55

58

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 19 13 59 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 20 13 5C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Page (ST) 4-142 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Ctrl Command 20 13 5D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 21 13 60 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 21 13 61 Set/Reset

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 22 13 64 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Ctrl Command 22 13 65 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 23 13 68 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 23 13 69 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 24 13 6C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 24 13 6D Set/Reset

0 = On/Off or 1 = Set/Reset or 2 = In/Out or 3

= Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 25 13 70 Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 25

Control Input 26

13

13

71

74

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 26

Control Input 27

13

13

75

78

Set/Reset

Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

0 = Latched or 1 = Pulsed

Ctrl Command 27 13 79 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 28 13 7C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

P54x/EN ST/Nd5 Page (ST) 4-143

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Ctrl Command 28 13 7D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 29 13 80 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 29 13 81 Set/Reset

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 30 13 84 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Ctrl Command 30 13 85 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 31 13 88 Latched 0 = Latched or 1 = Pulsed

Configures the control inputs as either ‘latched’ or ‘pulsed’.

Ctrl Command 31 13 89 Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Control Input 32 13 8C Latched

Configures the control inputs as either ‘latched’ or ‘pulsed’.

0 = Latched or 1 = Pulsed

Ctrl Command 32 13 8D Set/Reset

0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 =

Enabled/Disabled

Allows the SET / RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as ON / OFF, IN / OUT etc.

Table 40 - Control input configuration

4.14 Function Keys

MENU TEXT Col Row Default Setting

Description

Available Setting

FUNCTION KEYS 17 0 0

This column contains the function key definitions

Fn Key Status 17 1 0

Displays the status of each function key.

Fn Key 1 17 2 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active state.

Fn Key 1 Mode 17 3 Normal 0 = Normal or 1 = Toggled

Page (ST) 4-144 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 1 Label 17 4 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 2 17 5 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 2 Mode 17 6 Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 2 Label 17 7 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 3 17 8 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 3 Mode 17 9 Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 3 Label 17 0A Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 4 17 0B Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 4 Mode 17 0C Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 4 Label 17 0D Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 5 17 0E Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 5 Mode 17 0F Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 5 Label 17 10 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 6 17 11 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

P54x/EN ST/Nd5 Page (ST) 4-145

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Fn Key 6 Mode 17 12 Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 6 Label 17 13 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 7 17 14 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 7 Mode 17 15 Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 7 Label 17 16 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 8 17 17 Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 8 Mode 17 18 Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 8 Label 17 19 Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 9 17 1A Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 9 Mode 17 1B Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 9 Label 17 1C Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Fn Key 10 17 1D Unlocked

0 = Disabled, 1 = Unlocked (Enabled), 2 =

Locked

Setting to activate function key. The ‘Lock’ setting allows a function key output that is set to toggle mode to be locked in its current active position.

Fn Key 10 Mode 17 1E Normal 0 = Normal or 1 = Toggled

Sets the function key in toggle or normal mode. In ‘Toggle’ mode, a single key press will set/latch the function key output as

‘high’ or ‘low’ in programmable scheme logic. This feature can be used to enable/disable relay functions. In the ‘Normal’ mode the function key output will remain ‘high’ as long as key is pressed.

Fn Key 10 Label 17 1F Function Key 1 32 to 163 step 1

Allows the text of the function key to be changed to something more suitable for the application.

Table 41 - Function keys

Page (ST) 4-146 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

4.15 IED Configurator (for IEC 61850 Configuration)

MENU TEXT

The contents of the IED CONFIGURATOR column (for IEC 61850 configuration) are mostly data cells, displayed for information but not editable. To edit the configuration, you need to use the IED (Intelligent Electronic Device) configurator tool within the Schneider

Electric MiCOM S1 Studio software.

Col Row Default Setting Available Setting

Description

IED

CONFIGURATOR

19

This column contains IED Configurator settings

Switch Conf.Bank 19

0

5

0

No Action 0 = No Action or 1 = Switch banks

Setting which allows the user to switch between the current configuration, held in the Active Memory Bank (and partly displayed below), to the configuration sent to and held in the Inactive Memory Bank.

Restore Conf.

0

19 0A No Action 0 = No Action or 1 = Restore MCL

Active Conf.Name 19 10 0

IEC61850 versions only. The name of the configuration in the Active Memory Bank, usually taken from the SCL file.

Active Conf.Rev 19 11 0

IEC61850 versions only. Configuration Revision number of the configuration in the Active Memory Bank, usually taken from the SCL file.

Inact.Conf.Name 19 20 0

IEC61850 versions only. The name of the configuration in the Inactive Memory Bank, usually taken from the SCL file.

Inact.Conf.Rev 19 21 0

IEC61850 versions only. Configuration Revision number of the configuration in the Inactive Memory Bank, usually taken from the SCL file.

IP PARAMETERS 19 30 0

IEC61850 versions only.

IP Address 1 19 31 0

IEC61850 versions only. Displays the unique network IP address that identifies the relay.

Subnet mask 1 19 32 0

IEC61850 versions only. Displays the sub-network the relay is connected to.

Gateway 1 19 33 0

IEC61850 versions only. Displays the IP address of the gateway (proxy) that the relay is connected to, if any.

0.0.0.0 Not Settable IP Address 2 19

2nd IP address for MPC8313

34

Subnet mask 2 19 35

2nd sub-network for MPC8313

0.0.0.0 Not Settable

Gateway 2 19

2nd Gateway for MPC8313

36

SNTP

PARAMETERS

19 40

IEC61850 versions only.

SNTP Server 1 19 41

0.0.0.0

0

Not Settable

0

IEC61850 versions only. Displays the IP address of the primary SNTP server.

SNTP Server 2 19 42 0

IEC61850 versions only. Displays the IP address of the secondary SNTP server.

P54x/EN ST/Nd5 Page (ST) 4-147

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

IEC61850 SCL 19 50

IEC61850 versions only.

IED Name 19 51

0

0

IEC61850 versions only. 8 character IED name, which is the unique name on the IEC 61850 network for the IED, usually taken from the SCL file.

IEC61850 GOOSE 19

IEC61850 versions only.

60 0

0 = Disabled or 1 = Enabled GoEna 19 70 0x00000000

IEC61850 versions only. Setting to enable GOOSE publisher settings.

Pub.simul.GOOSE 19 71 0x00000000 0 = Disabled, 1 = Test Mode

IEC61850 versions only. The Test Mode cell allows the test pattern to be sent in the GOOSE message, for example for testing or commissioning. When ‘Disabled’ is selected, the test flag is not set. When ‘Pass Through’ is selected, the test flag is set, but the data in the GOOSE message is sent as normal. When ‘Forced’ is selected, the test flag is set, and the data sent in the

GOOSE message is as per the ‘VOP Test Pattern’ setting below. Once testing is complete the cell must be set back to

‘Disabled’ to restore the GOOSE scheme back to normal service.

Sub.simul.GOOSE 19 73 No 0 = No or 1 = Yes

IEC61850 versions only. The Test Mode cell allows the test pattern to be sent in the GOOSE message, for example for testing or commissioning. When ‘Disabled’ is selected, the test flag is not set. When ‘Pass Through’ is selected, the test flag is set, but the data in the GOOSE message is sent as normal. When ‘Forced’ is selected, the test flag is set, and the data sent in the

GOOSE message is as per the ‘VOP Test Pattern’ setting below. Once testing is complete the cell must be set back to

‘Disabled’ to restore the GOOSE scheme back to normal service.

Table 42 - IED configurator (for IEC 61850 configuration)

4.16 56/64 kbit/s Fiber Teleprotection - InterMiCOM

64

The column PROT COMMS/ IM64 is used to set up all the differential protection communications parameters required by differential protection and also the parameters required for teleprotection when Differential function is disabled and the relay is working as a Distance relay using InterMiCOM

64

for teleprotection purposes.

InterMiCOM

64

is a fiber-optic based teleprotection scheme, described in detail in the

Operation and Application chapters of this manual. Only relays ordered with fiber ports support this feature. The communication uses 56 or 64 kbit/s channels.

In the settings listed here, Channel1 and Channel2 refer to the communications channels, and are associated with configuring the communications ports fitted to the co-processor board.

Each setting below that refers to Channel 2 is associated with the communications setting of the second communications channel (where fitted) and is visible only when 3 Terminal or Dual redundant teleprotection configuration is set.

Note InterMiCOM

64

provides 2 groups of 8 InterMiCOM

64

commands. These are referenced as Channel 1 and Channel 2. They have a subtly different meaning and should not be confused with communications channels 1 and

2.

InterMiCOM

64

input and output mapping has to be done in the Programmable Scheme

Logic (PSL).

Page (ST) 4-148 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

PROT COMMS/ IM64 20 00 0

This column contains settings for Current Differtial/IM64 Configuration

Scheme Setup 20 01 2 Terminal

0 = 3 Terminal, 1 = 2 Terminal,

2 = Dual Redundant

Settings to determine how many relay ends are connected in the differential zone or how many relays are connected to the teleprotection scheme for the protected line, with two or three ends possible.

For a plain two terminal line, there is an additional option to use dual communication channels, to implement redundancy (i.e. employ a parallel “hot-standby” path).

Address 20 02 0-0

0=0-0, 1=1-A, 2=2-A, 3=3-A, 4=4-A, 5=5-A, 6=6-A, 7=7-A, 8=8-A,

9=9-A, 10=10-A, 11=11-A, 12=12-A, 13=13-A, 14=14-A, 15=15-A,

16=16-A, 17=17-A, 18=18-A, 19=19-A, 20=20-A, 21=1-B, 22=2-B,

23=3-B, 24=4-B, 25=5-B, 26=6-B, 27=7-B, 28=8-B, 29=9-B,

30=10-B, 31=11-B, 32=12-B, 33=13-B, 34=14-B, 35=15-B, 36=16-

B, 37=17-B, 38=18-B, 39=19-B, 40=20-B, 41=1-C, 42=2-C, 43=3-

C, 44=4-C, 45=5-C, 46=6-C, 47=7-C, 48=8-C, 49=9-C, 50=10-C,

51=11-C, 52=12-C, 53=13-C, 54=14-C, 55=15-C, 56=16-C,

57=17-C, 58=18-C, 59=19-C, 60=20-C

2002 applies to 3 terminal schemes.

In 3 terminal schemes, communicating groups of three relays may be configured. See below.

Address 20 03 0-0

0=0-0, 1=1-A, 2=2-A, 3=3-A, 4=4-A, 5=5-A, 6=6-A, 7=7-A, 8=8-A,

9=9-A, 10=10-A, 11=11-A, 12=12-A, 13=13-A, 14=14-A, 15=15-A,

16=16-A, 17=17-A, 18=18-A, 19=19-A, 20=20-A, 21=1-B, 22=2-B,

23=3-B, 24=4-B, 25=5-B, 26=6-B, 27=7-B, 28=8-B, 29=9-B,

30=10-B, 31=11-B, 32=12-B, 33=13-B, 34=14-B, 35=15-B, 36=16-

B, 37=17-B, 38=18-B, 39=19-B, 40=20-B

2003 applies to 2 terminal and Dual Redundant schemes.

Setting for the unique relay address that is encoded in the Differential message and in the InterMiCOM64 sent message. The aim of setting the address is to establish pairs of relays which will only communicate with each other. Should an inadvertent fiber/MUX misrouting or spurious loopback occur, an error will be logged, and the erroneous received data will be rejected.

As an example, in a 2 ended scheme the following address setting would be correct:

Local relay: 1-A

Remote relay: 1-B

Address 0-0 is a universal address, whereby any relay will be free to communicate with any other (equivalent to disabling of the unique addressing). When PROT COMMS/IM64 is set to loop back mode, the address 0-0 will replace any existing address in the relay.

Comms Mode 20 10 Standard 0 = Standard or 1 = IEEE C37.94

Setting that defines the data format that will be transmitted on the fiber outputs from the relay.

If the Multiplexer accepts direct fiber inputs according to IEEE C37.94, the ‘IEEE C37.94’ setting is selected.

For a direct fiber link between relays, and where the MUX connection is in electrical format (G.703 or V.35 or X.21), the

‘Standard’ message format needs to be set.

For a setting change to take effect, rebooting of the relay will be required. The Comm Mode setting applies to both channels.

Baud Rate Ch1 20 11 64kbits/s 0 = 64kbits/s or 1 = 56kbits/s

Channel 1 data rate setting for signalling between ends. The setting will depend on the MUX electrical interface, set 64kbit/s for

G.703 and X.21, or generally 56kbit/s for V.35.

For direct fiber connection between relays, 64kbit/s will offer slightly faster data transmission.

The setting is invisible when IEEE C37.94 Comm Mode is selected.

Baud Rate Ch2 20 12 64kbits/s 0 = 64kbits/s or 1 = 56kbits/s

Channel 2 data rate setting for signalling between ends. The setting will depend on the MUX electrical interface, set 64kbit/s for

G.703 and X.21, or generally 56kbit/s for V.35.

For direct fiber connection between relays, 64kbit/s will offer slightly faster data transmission.

The setting is invisible when IEEE C37.94 Comm Mode is selected.

Clock Source Ch1 20 13 Internal 0 = Internal or 1 = External

P54x/EN ST/Nd5 Page (ST) 4-149

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that defines which clock source is used to synchronize data transmissions over channel 1. The setting will depend on communications configuration and external clock source availability. If relays are connected direct fiber over channel 1,

‘Internal’ setting should be selected. If channel 1 is routed via a multiplexer, either setting may be required (see Application

Notes).

Clock Source Ch2 20 14 Internal 0 = Internal or 1 = External

Setting that matches the clock source being used for data synchronization over channel 2.

Ch1 N*64kbits/s 20 15 1

0 = Auto, 1 = 1, 2 = 2, 3 = 3, 4 = 4, 5 = 5, 6 = 6, 7 = 7, 8 = 8, 9 = 9,

10 = 10, 11 = 11 or 12 = 12

Setting for channel 1 when connected to MUX. When set to ‘Auto’ P54x will configure itself to match the multiplexer.

The setting is visible only when IEEE C37.94 Comm Mode is selected.

Ch2 N*64kbits/s 20 16 1

0 = Auto, 1 = 1, 2 = 2, 3 = 3, 4 = 4, 5 = 5, 6 = 6, 7 = 7, 8 = 8, 9 = 9,

10 = 10, 11 = 11 or 12 = 12

Setting for channel 2 when connected to Mux.

The setting is visible only when IEEE C37.94 Comm Mode is selected.

Comm Delay Tol 20 17 0.35ms 0.25ms to 1ms step 0.05ms

If successive calculated propagation times exceed this time delay setting, the relay will initiate a change in relay setting for a short time period (“Char Mod Time” setting) and will raise a Comm Delay Alarm.

Comm Fail Timer 20 18 10 0.1s to 600s step 0.1s

Time delay after which the ‘Channel Fail Alarm’ will be issued providing that no messages were received during the ‘Channel

Timeout’ period or the ‘Alarm Level’ is exceeded.

Comm Fail Mode 20 19 Ch 1 or 2 Fail

0 = Ch 1 Failure

1 = Ch 2 Failure

2 = Ch 1 or 2 Fail

3 = Ch 1 and 2 Fail

Fail mode setting that triggers the ‘Channel Fail Alarm’, providing that the Dual Redundancy or 3 ended scheme is set.

Normally the alarm would be raised for any loss of an operational channel (logical OR combination). However, when relays in a

3 ended scheme are deliberately operated in Chain topology AND logic may be used, for indication when the scheme becomes finally inoperative, with no self-healing (signal rerouting) mode possible.

GPS Sync 20 1A GPS Disabled

0 = GPS Disabled, 1 = GPS Standard, 2 = GPS -> Inhibit, 3 = GPS

-> Restrain

Setting to define type of GPS Mode. Refer to Operating Guide for full explanation of settings.

If set to GPS Disabled, Char Mod Time and Char Mod Ex are visible. Prop Delay Equal is invisible.

If set to GPS Standard, Char Mod Time and Char Mod Ex are invisible. Prop Delay Equal is visible.

If set to GPS -> Inhibit, Char Mod Time and Char Mod Ex are invisible. Prop Delay Equal is visible.

If set to GPS -> Restrain, Char Mod Time, Char Mod Ex and Prop Delay Equal are visible.

Char Mod Time 20 1B 0.5 0s to 30s step 0.0001s

Time delay during which the setting characteristic k1 is increased to 200% after successive calculated propagation delay time exceed the time delay setting

Comm Delay Tol. This should be set to greater than the maximum switching delay expected.

Prop Delay Equal 20 1C No Operation 0 = No operation or 1 = Restore Cdiff

If a P54x relay working with GPS sample synchronization loses GPS and there is a further switch in the protection communications network, the relay becomes Inhibited. If GPS become active again, the relay will automatically reset. But if not, the user can remove the inhibited condition by using this setting. This should only be performed if it can be guaranteed that the communication receiver and transmitter path delays are equal.

The setting is invisible when GPS Sync mode is disabled.

Re-Configuration 20 1D Three Ended 0 = Three Ended, 1 = Two Ended, 2 = Two Ended, 3 = Two Ended

This setting is to change the scheme from three ended scheme to two ended scheme or vice versa. An in deep explanation of relay performance for each case is given in chapter P54x/EN OP.

The setting is invisible when 3 Terminal Scheme Setup is selected.

Channel Timeout 20 1E 0.1 0.1s to 10s step 0.1s

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

A rolling time window beyond which any of the 8 IM signals that are set to ‘Default’ will be replaced by the corresponding ‘IM_X

Default Value’ setting, providing that no valid message is received on that channel in the meantime. The ‘Chnl Fail Alarm’ timer will be also initiated.

If only one channel is used, each out of 16 IM signals available that is set to ‘Default’ will convert to corresponding ‘IM_X

Default Value’

If a Dual redundant or 3 ended scheme is selected, each out of 8 IM signals available that is set to ‘Default’ will convert to corresponding ‘IM_X Default Value’, but only for the affected channel.

IM Msg Alarm Lvl 20 1F 25 0 to 100 step 0.1

Setting that is used to alarm for poor channel quality. If during a fixed 100 ms rolling window the number of invalid messages divided by the total number of messages that should be received (based upon the ‘Baud Rate’ setting) increase above the threshold, a ‘Channel Fail Alarm’ timer will be initiated.

Prop Delay Stats 20 20 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the alarms of Maximum propagation delay time

MaxCh 1 PropDelay 20 21 0.015 0.001s to 0.05s step 0.001s

When the protection communications are enabled, the overall propagation delay divided by 2 is calculated and the maximum value is determined and displayed in Measurements 4 column. This value is displayed and compared against this setting. If the setting is exceeded, an alarm MaxCh1 PropDelay (DDB 1386) is raised.

MaxCh 2 PropDelay 20 22 0.015 0.001s to 0.05s step 0.001s

When the protection communications are enabled, the overall propagation delay divided by 2 is calculated and the maximum value is determined and displayed in Measurements 4 column. This value is displayed and compared against this setting. If the setting is exceeded, an alarm MaxCh2 PropDelay (DDB 1387) is raised.

TxRx Delay Stats 20 23 Enabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the alarms of absolute difference between the Transmission and Reception propagation delay. This setting is visible only in case that GPS Sync is Enabled.

MaxCh1 Tx-RxTime 20 24 0.015 0.001s to 0.05s step 0.001s

When the protection communications and GPS Sync are enabled, the absolute difference between the Transmission and

Reception propagation delay is calculated and the maximum value is determined and displayed in Measurements 4 column.

This value is displayed and compared against this setting. If the setting is exceeded, an alarm

MaxCh1 Tx-RxTime (DDB 1388) is raised.

MaxCh2 Tx-RxTime 20 25 0.015 0.001s to 0.05s step 0.001s

When the protection communications and GPS Sync are enabled, the absolute difference between the Transmission and

Reception propagation delay is calculated and the maximum value is determined and displayed in Measurements 4 column.

This value is displayed and compared against this setting. If the setting is exceeded, an alarm

MaxCh2 Tx-RxTime (DDB 1389) is raised.

GPS Fail Timer 20 26 0 0s to 9999s step 0.1s

Time delay setting after which the ‘GPS Alarm’ – DDB 310 is asserted following a loss of GPS signal or initiation by the GPS transient fail alarm function when active(see below).

GPS Trans Fail 20 27 Disabled 0 = Disabled or 1 = Enabled

To enable (activate) or disable (turn off) the transient GPS Fail alarm function.

GPS Trans Count 20 28 1 1 to 100 step 1

Sets the count for the number of failed GPS signals which must be exceeded in the set ‘GPS Trans Timer’ window after which the ‘GPS Fail Timer’ is initiated.

GPS Trans Timer 20 29 1 1s to 9999s step 0.1s

Sets the rolling time window in which the ‘GPS Trans Count’ must be exceeded after which the ‘GPS Fail Timer’ is initiated.

GPS Sync los Dly 20 2B 0 0s to 10.0s step 0.1s

Time delay setting after which the ‘GPS Alarm’ – DDB 310 is asserted following a loss of GPS signal or initiation by the GPS transient fail alarm function when active(see below).

IM1 Cmd Type 20 30 Permissive 0 = Direct or 1 = Permissive

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(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that defines the operative mode of the received InterMiCOM_1 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM1 FallBackMode 20 31 Default 0 = Default or 1 = Latched

Setting that defines the status of IM1 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM1 status will be maintained until the new valid message is received.

If set to Default, the IM1 status, pre-defined by the user in IM1 Default Value cell will be set. A new valid message will replace

IM1 Default Value, once the channel recovers.

IM1 DefaultValue 20 32 0

Setting that defines the IM1 fallback status.

0 to 1 step 1

IM2 Cmd Type 20 34 Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_2 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM2 FallBackMode 20 35 Default 0 = Default or 1 = Latched

Setting that defines the status of IM2 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM2 status will be maintained until the new valid message is received.

If set to Default, the IM2 status, pre-defined by the user in IM2 Default Value cell will be set. A new valid message will replace

IM2 Default Value, once the channel recovers.

IM2 DefaultValue 20 36 0 0 to 1 step 1

Setting that defines the IM2 fallback status.

IM3 Cmd Type 20 38 Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_3 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM3 FallBackMode

IM3 DefaultValue

20

20

39

3A

Default

0

Setting that defines the IM3 fallback status.

0 = Default or 1 = Latched

Setting that defines the status of IM3 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM3 status will be maintained until the new valid message is received.

If set to Default, the IM3 status, pre-defined by the user in IM3 Default Value cell will be set. A new valid message will replace

IM3 Default Value, once the channel recovers.

0 to 1 step 1

IM4 Cmd Type 20 3C Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_4 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM4 FallBackMode 20 3D Default 0 = Default or 1 = Latched

Setting that defines the status of IM4 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM4 status will be maintained until the new valid message is received.

If set to Default, the IM4 status, pre-defined by the user in IM4 Default Value cell will be set. A new valid message will replace

IM4 Default Value, once the channel recovers.

IM4 DefaultValue 20 3E 0

Setting that defines the IM4 fallback status.

0 to 1 step 1

IM5 Cmd Type 20 40 Permissive 0 = Direct or 1 = Permissive

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Control and Support Settings (ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting that defines the operative mode of the received InterMiCOM_5 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM5 FallBackMode 20 41 Default 0 = Default or 1 = Latched

Setting that defines the status of IM5 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM5 status will be maintained until the new valid message is received.

If set to Default, the IM5 status, pre-defined by the user in IM5 Default Value cell will be set. A new valid message will replace

IM5 Default Value, once the channel recovers.

IM5 DefaultValue 20 42 0

Setting that defines the IM5 fallback status.

0 to 1 step 1

IM6 Cmd Type 20 44 Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_6 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM6 FallBackMode 20 45 Default 0 = Default or 1 = Latched

Setting that defines the status of IM6 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM6 status will be maintained until the new valid message is received.

If set to Default, the IM6 status, pre-defined by the user in IM6 Default Value cell will be set. A new valid message will replace

IM6 Default Value, once the channel recovers.

IM6 DefaultValue 20 46 0 0 to 1 step 1

Setting that defines the IM6 fallback status.

IM7 Cmd Type 20 48 Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_7 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM7 FallBackMode

IM7 DefaultValue

20

20

49

4A

Default

0

Setting that defines the IM7 fallback status.

0 = Default or 1 = Latched

Setting that defines the status of IM7 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM7 status will be maintained until the new valid message is received.

If set to Default, the IM7 status, pre-defined by the user in IM7 Default Value cell will be set. A new valid message will replace

IM7 Default Value, once the channel recovers.

0 to 1 step 1

IM8 Cmd Type 20 4C Permissive 0 = Direct or 1 = Permissive

Setting that defines the operative mode of the received InterMiCOM_8 signal.

When ‘Direct’ tripping is chosen, for security reasons 2 consecutive valid messages have to be received before a change in the signal status will be acknowledged. That will impose an additional 1-2 ms delay comparing to ‘Permissive’ mode.

Set ‘Direct’ in Direct Transfer Tripping (Intertripping) applications.

Set ‘Permissive’ to accommodate any Permissive or Blocking scheme.

IM8 FallBackMode 20 4D Default 0 = Default or 1 = Latched

Setting that defines the status of IM8 signal in case of heavy noise and message synchronization being lost.

If set to Latching the last valid IM8 status will be maintained until the new valid message is received.

If set to Default, the IM8 status, pre-defined by the user in IM8 Default Value cell will be set. A new valid message will replace

IM8 Default Value, once the channel recovers.

IM8 DefaultValue 20 4E 0

Setting that defines the IM8 fallback status.

0 to 1 step 1

Char Mod Ex 20 60 Disabled 0 = Disabled or 1 = Enabled

P54x/EN ST/Nd5 Page (ST) 4-153

(ST) 4 Settings Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Available Setting

Setting to enable Char Mod Ex Time.

Char Mod Ex Time 20 61 0.5 0s to 30s step 0.0001s

If the Char Mod Time has started then the Char Mod Ex Timer runs. If at the end of this timer and until Char Mod Time has expired, the bias current is above 5% In, and differential current is below 10% of bias current on all phases, then the Char Mod

Time will reset and the characteristic will return to normal. If these conditions are not met, then the characteristic remains increased for the duration of the Char Mod Time. Char Mod Ex Timer should be set greater than the minimum switching delay expected, and less than Char Mod Time.

Table 43 - Prot comms/IM64

Note The IM1 – IM8 settings in the table above are applied the same to the 8

InterMiCOM

64

commands grouped as Channel 1 as to the 8 InterMiCOM

64 commands grouped as Channel 2. If IM1 Default Value is set to 0, then IM1

Channel 1, and IM1 Channel 2 will both default to 0.

4.17 Control Input Labels

MENU TEXT Col Row Default Setting

Description

CTRL I/P LABELS 29 0 0

This column contains settings for Control Input Labels

Control Input 1

Label for Ctrl Input 1.

29 1 Label for Ctrl Input 1

Label for Ctrl Input 2 Control Input 2

Label for Ctrl Input 2.

29 2

Control Input 3 29 3 Label for Ctrl Input 3

Label for Ctrl Input 3.

Control Input 4 29 4

Label for Ctrl Input 4.

Control Input 5 29 5

Label for Ctrl Input 5.

Control Input 6 29 6

Label for Ctrl Input 6.

Control Input 7 29 7

Label for Ctrl Input 4

Label for Ctrl Input 5

Label for Ctrl Input 6

Label for Ctrl Input 7

Label for Ctrl Input 7.

Control Input 8 29 8

Label for Ctrl Input 8.

Label for Ctrl Input 8

Control Input 9

Label for Ctrl Input 9.

29 9 Label for Ctrl Input 9

Control Input 10 29 0A Label for Ctrl Input 10

Label for Ctrl Input 10.

Control Input 11 29 0B Label for Ctrl Input 11

Label for Ctrl Input 11.

Control Input 12 29 0C Label for Ctrl Input 12

Label for Ctrl Input 12.

Available Setting

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

Page (ST) 4-154 P54x/EN ST/Nd5

Control and Support Settings

MENU TEXT Col Row Default Setting

Description

Control Input 13 29 0D Label for Ctrl Input 13

Label for Ctrl Input 13.

Control Input 14 29 0E Label for Ctrl Input 14

Label for Ctrl Input 14.

Control Input 15 29 0F Label for Ctrl Input 15

Label for Ctrl Input 15.

Control Input 16 29 10 Label for Ctrl Input 16

Label for Ctrl Input 16.

Control Input 17 29 11 Label for Ctrl Input 17

Label for Ctrl Input 17.

Control Input 18 29 12 Label for Ctrl Input 18

Label for Ctrl Input 18.

Control Input 19 29 13 Label for Ctrl Input 19

Label for Ctrl Input 19.

Control Input 20 29 14 Label for Ctrl Input 20

Label for Ctrl Input 20.

Control Input 21 29 15 Label for Ctrl Input 21

Label for Ctrl Input 21.

Control Input 22 29 16 Label for Ctrl Input 22

Label for Ctrl Input 22.

Control Input 23 29 17 Label for Ctrl Input 23

Label for Ctrl Input 23.

Control Input 24 29 18 Label for Ctrl Input 24

Label for Ctrl Input 24.

Control Input 25 29 19 Label for Ctrl Input 25

Label for Ctrl Input 25.

Control Input 26 29 1A Label for Ctrl Input 26

Label for Ctrl Input 26.

Control Input 27 29 1B Label for Ctrl Input 27

Label for Ctrl Input 27.

Control Input 28 29 1C Label for Ctrl Input 28

Label for Ctrl Input 28.

Control Input 29 29 1D Label for Ctrl Input 29

Label for Ctrl Input 29.

Control Input 30 29 1E Label for Ctrl Input 30

Label for Ctrl Input 30.

Control Input 31 29 1F Label for Ctrl Input 31

Label for Ctrl Input 31.

Control Input 32 29 20 Label for Ctrl Input 32

Label for Ctrl Input 32.

Control Input 33 29 21 Label for Ctrl Input 33

Label for Ctrl Input 33.

Control Input 34 29 22 Label for Ctrl Input 34

(ST) 4 Settings

Available Setting

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

P54x/EN ST/Nd5 Page (ST) 4-155

(ST) 4 Settings

MENU TEXT Col Row Default Setting

Description

Label for Ctrl Input 34.

Control Input 35 29 23 Label for Ctrl Input 35

Label for Ctrl Input 35.

Control Input 36 29 24 Label for Ctrl Input 36

Label for Ctrl Input 36.

Control Input 37 29 25 Label for Ctrl Input 37

Label for Ctrl Input 37.

Control Input 38 29 26 Label for Ctrl Input 38

Label for Ctrl Input 38.

Control Input 39 29 27 Label for Ctrl Input 39

Label for Ctrl Input 39.

Control Input 40 29 28 Label for Ctrl Input 40

Label for Ctrl Input 40.

Control Input 41 29 29 Label for Ctrl Input 41

Label for Ctrl Input 41.

Control Input 42 29 2A Label for Ctrl Input 42

Label for Ctrl Input 42.

Control Input 43 29 2B Label for Ctrl Input 43

Label for Ctrl Input 43.

Control Input 44 29 2C Label for Ctrl Input 44

Label for Ctrl Input 44.

Control Input 45 29 2D Label for Ctrl Input 45

Label for Ctrl Input 45.

Control Input 46 29 2E Label for Ctrl Input 46

Label for Ctrl Input 46.

Control Input 47 29 2F Label for Ctrl Input 47

Label for Ctrl Input 47.

Control Input 48 29 30 Label for Ctrl Input 48

Label for Ctrl Input 48.

Table 44 - Control input labels

Control and Support Settings

Available Setting

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

32 to 163 step 1

Page (ST) 4-156 P54x/EN ST/Nd5

Control and Support Settings (ST) 4 Settings

4.18 Direct Access (Breaker Control and Hotkeys)

MENU TEXT

The Direct Access keys are the 0 and 1 keys situated directly below the LCD display. The user may assign the function of these two keys, to signal direct commands into the PSL logic. Two modes of use exist:

Tripping and Closing commands to the circuit breaker

Hotkey functions, whereby a mini menu of frequently required commands and operations is accessed. Operators can then easily access the required command, without needing to navigate the full relay menu.

Col Row Default Setting Available Setting

Description

Direct Access 9 39 Enabled

0= Disabled, 1 = Enabled, 2 = Hotkey only, or

3 = CB Ctrl Only

Defines what CB control direct access is allowed. The front direct access keys that are used as a short cut function of the menu may be:

Disabled – No function visible on the LCD.

Enabled – All control functions mapped to the Hotkeys and Control Trip/Close are available.

Hotkey Only – Only control functions mapped to the Hotkeys are available on the LCD.

CB Ctrl Only – Only Control Trip/Control Close command will appear on the relay’s LCD.

Table 45 - Direct access (breaker control and “hotkeys”)

P54x/EN ST/Nd5 Page (ST) 4-157

(ST) 4 Settings

Notes:

Control and Support Settings

Page (ST) 4-158 P54x/EN ST/Nd5

MiCOM P54x (P543, P544, P545 & P546) (OP) 5 Operation

P54x/EN OP/Nd5

OPERATION

CHAPTER 5

Page (OP) 5-1

(OP) 5 Operation MiCOM P54x (P543, P544, P545 & P546)

Date (month/year):

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (OP) 5-2 P54x/EN OP/Nd5

Contents (OP) 5 Operation

CONTENTS

Page (OP) 5-

1. Operation of Individual Protection Functions

1.1 Phase Differential Characteristics

1.1.1 Time Alignment of Current Vectors

1.1.2 Capacitive Charging Current (all models)

1.1.3 CT Ratio Correction (all models)

1.1.4 Line Differential (87L) Conditioned to Overcurrent (OC)

1.2 Protection of Transformer Feeders (P543 and P545)

1.2.1 Transformer Magnetizing Inrush (P543/P545)

1.2.2 3 to 2 Terminal Reconfiguration

1.2.3 Mesh Corner and 1½ Breaker Switched Substations

1.2.4 Stub Bus Protection

1.2.5 The Minimum Operating Current

1.3 Disabling/Enabling Differential Protection

1.3.1 Enabling or Disabling Differential Protection for In-Zone Power Transformer

1.4 Differential Relay Compatibility with Previous Versions

1.5 Differential Relay without Voltage Connections

1.6 Line Parameters Settings

1.6.1 Phase Rotation (Phase Sequence)

1.6.2 Tripping Mode - Selection of Single or 3-Phase Tripping

1.6.1 Selectable Zone Tripping Mode

1.6.2 Pole Dead Logic

1.6.3 Residual Compensation for Earth/Ground Faults

1.6.4 Mutual Compensation for Parallel Lines

1.7 Optional Distance Protection

1.8 Phase Fault Distance Protection (Distance option only) (for Software Versions

BEFORE H3a)

1.9 Phase Fault Distance Protection (Distance option only) (for Software Version

H3a and later)

1.10 Earth Fault Distance Protection (Distance option only) (for Software Versions

BEFORE H3a)

1.11 Earth Fault Distance Protection (Distance option only) (for Software Version

H3a and later)

1.12 Distance Protection Tripping Decision (Distance option only)

1.13 Phase Selection (Distance option only)

1.13.1 Theory of Operation

1.14 Mho Element Polarization and Expansion (Distance option only)

1.14.1 Switch On To Fault Action for Zone 1 (Distance option only)

1.14.2 Offset Mho (Distance option only)

1.15 Quadrilateral Elements (Distance option only)

15

P54x/EN OP/Nd5 Page 5-3

(OP) 5 Operation Contents

1.15.1 Directional Quadrilateral (Distance option only)

1.15.2 Offset Quadrilateral (Distance option only)

1.15.3 Reactance Line - Top Line of Quadrilateral (Distance option only)

1.15.4 Right Hand Resistive Reach Line (Distance option only)

1.16 Quadrilateral Phase Resistive Reaches (Distance option only)

1.17 Quadrilateral Ground Resistive Reaches (Distance option only)

1.18 Advanced Distance Elements Zone Settings (Distance option only)

1.18.1 Phase Fault Zone Settings (Distance option only)

1.18.2 Ground Fault Zone Settings (Distance option only)

1.18.3 Distance Zone Sensitivities (Distance option only)

1.19 Conventional and Capacitor VT Applications (Distance option only)

1.19.1 CVTs with Passive Suppression of Ferroresonance (Distance option only)

1.19.2 CVTs with Active Suppression of Ferroresonance (Distance option only)

1.20 Load Blinding (Load Avoidance) (Distance option only)

1.21 Distance Elements Basic Scheme Setting (Distance option only)

1.22 Power Swing Detection, Alarming and Blocking (Distance option only)

1.22.1 Detection of Power Swings (Distance option only)

1.22.2 Actions upon Power Swing Detection (Distance option only)

1.22.3 Detection of a Fault during a Power Swing (Distance option only)

1.22.4 Actions Upon Detection of a Fault during a Power Swing (Distance option only)

1.22.5 Power Swing Settings (Distance option only)

1.23 Out-of-Step Detection and Tripping (Distance option only)

1.23.1 Out of Step Detection (Distance option only)

1.24 Switch On To Fault (SOTF) and Trip On Reclose (TOR) (Distance Option only)

1.24.1 Switch On To Fault (SOTF) Mode

1.24.2 Trip On Reclose (TOR) Mode (Distance option only)

1.24.3 Polarization During Circuit Energization (Distance option only)

1.25 Directional Function - Setup DEF and Directional Comparison Elements

(Distance Option only)

1.25.1 DEF Zero Sequence Polarization with “Virtual Current Polarizing” (Distance option only)

1.25.2 DEF Negative Sequence Polarization (Distance option only)

1.25.3 Delta Directional Comparison Principle and Setup (Distance option only)

1.25.4 Delta Directional Decision (Distance option only)

1.26 Channel Aided Schemes (Distance option only)

1.26.1 Distance Scheme PUR - Permissive Underreach Transfer Trip (Distance option only)

1.26.2 Distance Scheme POR - Permissive Overreach Transfer Trip (Distance option only)

1.26.3 Permissive Overreach Trip Reinforcement (Distance option only)

1.26.4 Permissive Overreach Scheme Weak Infeed Features (Distance option only)

1.26.5 Permissive Scheme Unblocking Logic - Loss of Guard (Distance option only)

Page 5-4 P54x/EN OP/Nd5

Contents (OP) 5 Operation

1.26.6 Distance Scheme Blocking (Distance option only)

1.26.7 Distance Schemes Current Reversal Guard Logic (Distance option only)

1.26.8 Permissive Overreach Schemes Current Reversal Guard (Distance option only)

1.26.9 Blocking Scheme 1 and 2 Current Reversal Guard (Distance option only)

1.26.10 Aided DEF Ground Fault Scheme - Permissive Overreach (Distance option only)

1.26.11 Aided DEF Ground Fault Scheme – Blocking (Distance option only)

1.26.12 Delta Scheme POR - Permissive Overreach Transfer Trip (Distance option only)

1.26.13 Delta Blocking Scheme (Distance option only)

1.27 Zone 1 Extension and Loss of Load Schemes (Distance option only)

1.27.1 Zone 1 Extension Scheme (Distance option only)

1.27.2 Loss of Load (LoL) Accelerated Tripping (Distance option only)

1.28 Phase Fault Overcurrent Protection

1.28.1 Reset Characteristics for Overcurrent Elements

1.28.2 Directional Overcurrent Protection

1.28.3 Overcurrent (50)Backup to Line Differential (87L)

1.29 Synchronous Polarization

1.30 Thermal Overload Protection

1.30.1 Single Time Constant Characteristic

1.30.2 Dual Time Constant Characteristic (typically not applied for P54x)

1.31 Earth Fault (Ground Overcurrent), Sensitive Earth Fault (SEF) and Restricted

Earth Fault (REF) Protection

1.31.1 IDG Curve

1.31.2 Restricted Earth Fault (REF) Protection

1.32 Directional Earth Fault (DEF) Protection

1.33 Residual Voltage Polarization

1.33.1 Negative Sequence Polarization (Not for SEF)

1.34 Negative Phase Sequence (NPS) Overcurrent Protection

1.34.1 Directionalizing the Negative Phase Sequence Overcurrent Element

1.35 Undervoltage Protection

1.36 Overvoltage Protection

1.36.1 Compensated Overvoltage

1.37 Residual Overvoltage (Neutral Displacement) Protection

1.38 Circuit Breaker Fail (CBF) Protection

1.38.1 Reset Mechanisms for Breaker Fail Timers

1.39 Broken Conductor Detection

1.40 Frequency Protection

1.41 Independent Rate of Change of Frequency Protection [81R]

1.41.1 Basic Functionality

1.42 Special Weak Infeed Logic for Stub End Transformer Terminals

2 Communications between Relays 131

P54x/EN OP/Nd5 Page 5-5

(OP) 5 Operation Contents

2.1 Communications Link Options

2.1.1 Direct Optical Fiber Link, 850 nm Multi-Mode Fiber

2.1.2 Direct Optical Fiber Link, 1300 nm Multi-Mode Fiber

2.1.3 Direct Optical Fiber Link, 1300 nm Single-Mode Fiber

2.1.4 Direct Optical Fiber Link, 1550 nm Single-Mode Fiber

2.1.5 IEEE C37.94 Interface to Multiplexer

2.1.6 Switched Communication Networks

2.1.7 Switched Communication Networks with Permanent or Semi-Permanent Split

Routing

2.1.8 P590 Series Optical Fiber to Electrical Interface Units

2.1.9 Multiplexer Link with G.703 Electrical Interface Using Auxiliary Optical Fibers and Type P591 Interface

2.1.10 Multiplexer Link with V.35 Electrical Interface Using Auxiliary Optical Fibers and Type P592 Interface

2.1.11 Multiplexer Link with X.21 Electrical Interface Using Auxiliary Optical Fibers and Type P593 Interface

2.1.12 Protection Communications Connection over Unconditioned Pilot Wires

2.1.13 Unconditioned 2 Wire Pilot Communications for Distances Greater than 1.2 km

2.1.14 Protection Communications Scheme Set-Up

2.1.15 Dual Redundant (“Hot Standby”)

2.1.16 Three Ended System

2.1.17 Protection Communications Address

2.1.18 Reconfiguration of Three-Ended System

2.1.19 User Reconfiguration

2.1.20 Energization Reconfiguration

2.2 InterMiCOM

2.2.1 Protection Signaling

2.2.2 InterMiCOM Variants

2.2.3 InterMiCOM Features

2.2.4 Definition of Teleprotection Commands

2.2.5 General Features & Implementation

2.2.6 Functional Assignment

2.3 MODEM InterMiCOM, EIA(RS)232 InterMiCOM or Copper InterMiCOM

2.3.1 Communications Media

2.3.2 General Features and Implementation

2.3.3 EIA(RS)232 Physical Connections

2.3.4 Direct Connection

2.3.5 EIA(RS)232 Modem Connection

2.3.6 RS422 Connection

2.3.7 Fiber Optic Connection

2.3.8 InterMiCOM Functional Assignment

2.4 InterMiCOM64 Statistics & Diagnostics

Page 5-6 P54x/EN OP/Nd5

Contents (OP) 5 Operation

2.4.1 InterMiCOM64 Scheme Setup - Application

2.4.2 Permissive Intertrip

2.4.3 Clock Source

2.4.4 Communication Alarm

2.4.5 Communication Error Statistics

2.4.6 Communications Delay Timer

2.4.7 Communications Fail Timer

2.4.8 Communications Fail Mode

2.4.9 MiCOM P594 Global Positioning System (GPS) Synchronizing Module

3 Operation of Non-Protection Functions 157

3.1 Voltage Transformer Supervision - Fuse Fail

3.1.1 Loss of One or Two-Phase Voltages

3.1.2 Loss of all Three Phase Voltages Under Load Conditions

3.1.3 Absence of Three Phase Voltages Upon Line Energization

3.1.4 VTS Logic

3.2 Current Transformer Supervision (CTS)

3.2.1 Differential CTS (no need of Local Voltage Measurements to Declare CTS)

3.2.2 Standard CTS (Voltage Dependant CTS no need of Communications to Declare

CTS

3.2.3 CTS Blocking

3.3 Transformer Magnetizing Inrush Detector

3.4 Function Keys

3.5 Setting Groups Selection

3.6 Control Inputs

3.7 Real Time Clock Synchronization via Opto-Inputs

3.8 Read Only Mode

3.8.1 Protocol/Port Implementation:

3.8.2 Courier Database Support

3.8.3 New DDB Signals

3.9 Fault Locator

3.9.1 Basic Theory for Ground Faults

3.9.2 Data Acquisition and Buffer Processing

3.9.3 Faulted Phase Selection

3.9.4 Fault Location Calculation

3.9.5 Obtaining the Vectors

3.9.6 Solving the Equation for the Fault Location

3.9.7 Mutual Compensation

4 Single CB Control: P543/P545 Operation

4.1 Single and Three Phase Auto-Reclosing

4.1.1 Time Delayed and High Speed Auto-Reclosing

4.1.2 Auto-Reclose Logic Inputs (P543/P545)

4.1.3 Internal Signals (P543/P545)

175

P54x/EN OP/Nd5 Page 5-7

(OP) 5 Operation

4.1.4 Auto-Reclose Logic Outputs (P543/P545)

4.1.5 Auto-Reclose Alarms (P543/P545)

4.1.6 Auto-Reclose Logic Operating Sequence (P543/P545)

4.1.7 Auto-Reclose: Main Operating Features (P543/P545)

4.1.8 Auto-Reclose Skip Shot 1 (P543/P545)

4.1.9 Auto-Reclose Logic Diagrams (P543/P545)

4.2 System Checks (including Check Synchronizer) (P543/P545)

4.2.1 Overview (P543/P545)

4.2.2 VT Selection (P543/P545)

4.2.3 Basic Functionality (P543/P545)

4.2.4 System Check Logic Outputs (P543/P545)

4.2.5 Check Sync 2 and System Split (P543/P545)

4.2.6 Synchronism Check (P543/P545)

4.2.7 Slip Control by Timer (P543/P545)

4.2.8 System Split (P543/P545)

4.3 Auto-Reclose/Check Synchronization Interface (P543/P545)

4.4 CB State Monitoring (P543/P545)

4.4.1 CB State Monitoring Features (P543/P545)

4.5 CB Condition Monitoring (P543/P545)

4.5.1 CB Condition Monitoring Features (P543/P545)

4.6 CB Control (P543/P545)

4.6.1 CB Control using Hotkeys (P543/P545)

4.6.2 CB Control using Function Keys (P543/P545)

5 Dual CB Control: P544/P546 Operation

5.1 Introduction

5.2 CB Scheme Designation (P544/P546)

5.3 Circuit Breaker Status (P544/P546)

5.4 Circuit Breaker Condition Monitoring (P544/P546)

5.4.1 Circuit Breaker Condition Monitoring Features (P544/P546)

5.5 Circuit Breaker Control (P544/P546)

5.5.1 CB Control using Hotkeys (P544/P546)

5.5.2 Circuit Breaker Control using Function Keys (P544/P546)

5.6 Single and Three Phase Auto-Reclosing (P544/P546)

5.6.1 Time Delayed and High Speed Auto-Reclosing (P544/P546)

5.6.2 Auto-Reclose Logic Inputs (P544/P546)

5.6.3 Internal Signals (P544/P546)

5.6.4 Auto-Reclose Logic Outputs (P544/P546)

5.6.5 Auto-Reclose Logic Operating Sequence (P544/P546)

5.6.6 Auto-Reclose: Main Operating Features (P544/P546)

5.7 Dual CB System Voltage Checks (P544/P546)

5.7.1 Dual CB System Checks Overview (P544/P546)

5.7.2 Dual CB System Voltage Checks Logic Diagrams (P544/P546)

Page 5-8

Contents

211

P54x/EN OP/Nd5

Figures (OP) 5 Operation

5.7.3 Dual CB System Voltage Checks VT Selection (P544/P546)

5.7.4 Dual CB System Voltage Synchronism Checks (P544/P546)

5.8 Synchronism Check Functions (P544/P546)

5.8.1 Overview

5.8.2 Synchronous Systems and Asynchronous Systems/System Split

5.8.3 Synchronism Check Functions Provided in the P544/P546

6 P544/P546 CB Control and AR Figures (AR Figures)

7 P544/P546 CB Control and AR Logic: Internal Signal Definitions

255

319

FIGURES

Figure 1 - Relay bias characteristic

Figure 2 - Differential logic diagram

Figure 3 - Propagation delay measurement

Figure 4 - Example of switched synchronous digital hierarchy

Figure 5 - Data transmission

Figure 6 - Capacitive charging current

Figure 7 - Transformer magnetizing characteristic

Figure 8 - Magnetizing inrush waveforms

Figure 9 - Second harmonic restraint and blocking logic

Figure 10 - Fifth harmonic blocking logic

Figure 11 - Highset element logic

Figure 12 - Need for zero-sequence current filtering

Figure 13 - Breaker and a half application

Figure 14 - Stub bus protection

Figure 15 - Trip conversion scheme logic

Figure 16 - Pole dead logic for P543/P545

Figure 17 - Pole dead logic for P544/P546

Figure 18 - Phase fault Mho characteristics (Distance option only)

Figure 19 - Earth fault quadrilateral characteristics (Distance option only)

Figure 20 - Phase to phase currents showing change for CN fault

Figure 21 - Expansion of zone 1 for the default polarizing setting Vpol=1 (Distance option only)

Figure 22 - Quadrilateral characteristics (directional line shown simplified) (Distance option only)

Figure 23 - Offset quadrilateral for zone 3 (Distance option only)

Figure 24 - Reactance line - top line of quadrilateral (Distance option only)

Figure 25 - Resistive reach line (load blinder) (Distance option only)

Figure 26 - Load blinder characteristics

Figure 27 - Basic scheme delayed trip (Distance option only)

Figure 28 - Power swing detected for 3 cycles continuous

P54x/EN OP/Nd5 Page 5-9

(OP) 5 Operation Figures

Figure 29 - Power swing blocking (Distance option only)

Figure 30 - Out-of-step detection characteristic (Distance option only)

Figure 31 - Out of step algorithm (Distance option only)

Figure 32 - Trip on close (Distance option only)

Figure 33 - Trip on close based on CNV level detectors (Distance option only)

Figure 34 - Sequence networks connection for an internal A-N fault (Distance option only)

Figure 35 - Aided scheme logic overview (Distance option only)

Figure 36 - Send logic (Distance option only)

Figure 37 - Receive logic (Distance option only)

Figure 38 - Aided tripping logic

Figure 39 - Permissive underreach transfer trip scheme (PUR) (Distance option only)

Figure 40 - PUR (Distance option only)

Figure 41 - Permissive overreach transfer trip scheme (POR) (Distance option only)

Figure 42 - POR Permissive OverReach

Figure 43 - Distance blocking scheme (BOP) (Distance option only)

Figure 44 - Example of fault current reverse of direction

Figure 45 - Blocking 1 (Distance option only)

Figure 46 - Blocking 2 (Distance option only)

Figure 47 - The DEF permissive scheme (Distance option only)

Figure 48 - Aided DEF (ground) permissive scheme logic (Distance option only)

Figure 49 - DEF blocking scheme (Distance option only)

Figure 50 - Aided DEF (ground) blocking scheme logic (Distance option only)

Figure 51 - Delta directional comparison POR scheme (Distance option only)

Figure 52 - Delta directional comparison BLOCKING scheme

Figure 53 - Zone 1 extension scheme

Figure 54 - Zone 1 extension

Figure 55 - Loss of load accelerated trip scheme (Distance option only)

Figure 56 - Loss of load (Distance option only)

Figure 57 - Directional overcurrent logic

Figure 58 - Thermal overload protection logic diagram

Figure 59 - IDG characteristic

Figure 60 - High impedance principle

Figure 61 - High impedance REF relay/CT connections

Figure 62 - Directional EF with neutral voltage polarization (single stage)

Figure 63 - Directional EF with negative sequence polarization (single stage)

Figure 64 - Negative sequence overcurrent non-directional operation

Figure 65 - Directionalizing the negative phase sequence overcurrent element

Figure 66 - Directionalizing the negative phase sequence overcurrent element

Figure 67 - Undervoltage - single and three-phase tripping mode (single stage)

Figure 68 - Overvoltage - single and three-phase tripping mode (single stage)

Figure 69 - Residual overvoltage logic (single stage)

Figure 70 - Decaying dc component

Page 5-10 P54x/EN OP/Nd5

Figures (OP) 5 Operation

Figure 71 - Calculating a Zero Cross Detection Point using sample values

Figure 72 - CB Fail CB1 logic part 1 after modification

Figure 73 - CB Failure CB1 logic changes part 2

Figure 74 - CB Failure CB1 logic changes part 1

Figure 75 - CB Failure CB1 logic changes part 2

Figure 76 - Broken conductor logic

Figure 77 - Underfrequency logic (single stage)

Figure 78 -Overfrequency logic (single stage)

Figure 79 -Rate of change of frequency protection

Figure 80 - Weak infeed configuration on stub-fed radial circuit (parallel line is out of service)

Figure 81 - P540 850nm optical fibre connections

Figure 82 - P540 1300nm optical fibre connections

Figure 83 - P540 1300nm optical fibre connections

Figure 84 - P540 1550nm optical fibre connections

Figure 85 - Switched communication network

Figure 86 - Transient bias characteristic

Figure 87 - P54x connection to P591

Figure 88 - P54x connection to P592

Figure 89 - P54x connection to P593

Figure 90 - 3-terminal system connection

Figure 91 - Pictorial comparison of operating modes

Figure 92 - Example assignment of signals within the PSL

Figure 93 - Direct connection within the local substation

Figure 94 - InterMiCOM teleprotection via a MODEM link

Figure 95 - MODEM InterMiCOM teleprotection via a RS422 protocol

Figure 96 - MODEM InterMiCOM teleprotection via fiber optic

Figure 97 - Example assignment of signals within the PSL

Figure 98 - Triangulated InterMiCOM64 application

Figure 99 - Permissive intertrip

Figure 100 - VTS logic

Figure 101 - Differential CTS

Figure 102 - Voltage dependant CTS principle scheme

Figure 103 - Standard CTS

Figure 104 - Two-machine equivalent circuit

Figure 105 - Fault locator selection of fault current zero

Figure 106 - Auto-reclose timing diagram - single fault

Figure 107 - Auto-reclose timing diagram - repeated fault inception

Figure 108 - Auto-reclose timing diagram - fault with system synchronism

Figure 109 - Auto-reclose timing diagram - lockout for no checksynch

Figure 110 - Auto-reclose enable logic

Figure 111 - Auto-reclose single/three pole tripping

Figure 112 - Auto-reclose inhibit sequence count (P543/P545)

P54x/EN OP/Nd5 Page 5-11

(OP) 5 Operation

Figure 113 - Auto-reclose cycles (P543/P545)

Figure 114 - Auto-reclose close

Figure 115 - Auto-reclose lockout logic (P543/P545)

Figure 116 - Auto-reclose force 3-pole trip (P543/P545)

Figure 117 - Auto-reclose close notify (P543/P545)

Figure 118 - Ddb pole discrepancy trip (P543/P545)

Figure 119 - Synchro check and synchro split functionality (P543/P545)

Figure 120 - Check sync (P543/P545)

Figure 121 - Auto-reclose/check sync interface (P543/P545)

Figure 122 - Circuit breaker condition monitoring - broken current (P543/P545)

Figure 123 - Circuit breaker condition monitoring - operation time (P543/P545)

Figure 124 - CB monitoring (P543/P545)

Figure 125 - Remote control of circuit breaker (P543/P545)

Figure 126 - Circuit breaker control (P543/P545)

Figure 127 - CB control hotkey menu

Figure 128 - CB control via function keys default PSL

Figure 129 - CB1 condition monitoring – broken current

Figure 130 - CB2 condition monitoring – broken current

Figure 131 - CB1 condition monitoring – operation time

Figure 132 - CB2 condition monitoring – operation time

Figure 133 - Circuit breaker 1 – monitoring

Figure 134 - Circuit breaker 2 – monitoring

Figure 135 - Remote control of circuit breaker

Figure 136 - Circuit breaker control via function keys default PSL

Figure 137 - Auto-reclose timing diagram – single breaker, single fault

Figure 138 - Auto-reclose timing diagram – repeated fault inception

Figure 139 - Auto-relose timing diagram leader/follower (1ph)

Figure 140 - Auto-relose timing diagram leader/follower (3ph)

Figure 141 - Synchro check functionality (P544/P546)

Figure AR-142 - Circuit breaker 1 - state monitor

Figure AR-143 - Circuit breaker 2 - state monitor

Figure AR-144 - CB1 & CB2 Open 1P, 2P, 2/3P, Any

Figure AR-145 - Circuit breaker in service

Figure AR-146 - Auto-reclose enable

Figure AR-147 - Lead & follower circuit breaker selection

Figure AR-148 - Leader/follower logic – 1 (for Software Versions BEFORE H1)

Figure AR-149 - Leader/follower logic – 1 (for Software Versions H1 and later)

Figure AR-150 - Leader/follower logic – 2

Figure AR-151 - Leader & follower AR modes enable

Figure AR-152 - Force three-phase trip

Figure AR-153 - Auto-reclose initiation

Figure AR-154 - Test trip & AR initiation

Figure AR-155 - CB1 1pole / 3-pole trip + AR initiation

Figures

Page 5-12 P54x/EN OP/Nd5

Figures (OP) 5 Operation

Figure AR-156 - CB2 1 pole / 3-pole trip + AR initiation

Figure AR-157 - 1Ph, 2Ph & 3Ph fault memory

Figure AR-158 - CB1 Auto-reclose in progress

Figure AR-159 - CB2 Auto-reclose in progress

Figure AR-160 - Sequence counter

Figure AR-161 - Single phase AR cycle selection

Figure AR-162 - Protection re-operation + evolving fault + persistent fault

Figure AR-163 - Three phase AR cycle selection

Figure AR-164 - Dead time start enable

Figure AR-165 - Single phase AR lead CB dead time

Figure AR-166 - Three phase AR lead CB dead time enable

Figure AR-167 - Three phase AR lead CB dead time

Figure AR-168 - Follower AR enable (for Software Versions BEFORE H1)

Figure AR-169 - Follower AR enable (for Software Versions H1 and later)

Figure AR-170 - Single phase follower time

Figure AR-171 - Three phase follower time

Figure AR-172 - CB Auto close

Figure AR-173 - CB2 Auto close

Figure AR-174 - Prepare reclaim initiation

Figure AR-175 - Reclaim time

Figure AR-176 - Successful auto-reclose signals

Figure AR-177 - Reset CB1 successful AR indication

Figure AR-178 - Reset CB2 successful AR indication

Figure AR-179 - CB healthy & system check timers

Figure AR-180 - CB2 healthy & system check timers

Figure AR-181 - AR shots counters

Figure AR-182 - CB2 AR shots counters

Figure AR-183 - CB1 circuit breaker control

Figure AR-184 - CB2 circuit breaker control

Figure AR-185 - CB1 lead 3PAR system check

Figure AR-186 - CB2 lead 3PAR system check

Figure AR-187 - CB1 follow 3PAR system check

Figure AR-188 - CB2 follow 3PAR system check

Figure AR-189 - CB1 man. close system check

Figure AR-190 - CB2 man. close system check

Figure AR-191 - CB1 trip time monitor

Figure AR-192 - CB2 trip time monitor

Figure AR-193 - Auto-reclose lockout – CB1 (for Software Versions BEFORE H1)

Figure AR-194 - Auto-reclose lockout – CB1 (for Software Versions H1 and later)

Figure AR-195 - Auto-reclose lockout – CB1

Figure AR-196 - Auto-reclose lockout – CB2 (for Software Versions BEFORE H1)

Figure AR-197 - Auto-reclose lockout – CB2 (for Software Versions H1 and later)

Figure AR-198 - Auto-reclose lockout – CB2

P54x/EN OP/Nd5 Page 5-13

(OP) 5 Operation

Figure AR-199 - Reset CB1 lockout

Figure AR-200 - Reset CB2 lockout

Figure AR-201 - System checks – voltage monitor

Figure AR-202 - CB1 synch check signals

Figure AR-203 - CB2 synch check signals

Figure AR-204 - Pole discrepancy (for P54x except P546)

Figure AR-205 – Pole discrepancy (for P546 only)

Figure AR-206 - CB trip conversion

TABLES

Table 1 - Basic scheme delayed trip (Distance option only)

Table 2 - Phase selector pickup and VNpol

Table 3 - Permissive scheme unblocking logic

Table 4 - Time delays associated with extended zone Z1X

Table 5 - IDMT curve descriptions, standards and constants

Table 6 - IDMT curve descriptions, standards and constants

Table 7 - Phases, operating currents and polarizing voltages

Table 8 - Functions, DDB numbers and descriptions

Table 9 - Initiation (menu selectable) and CB fail timer reset mechanism

Table 10 - Functions, DDB numbers and descriptions

Table 11 - Functions, DDB numbers and descriptions

Table 12 - X.21 circuits supported by P593 unit

Table 13 - Modems, Distances, Data Rates and Re-Train Times

Table 14 - Address groups for two different relays

Table 15 - Address groups for three different relays

Table 16 - Pins, Acronyms and InterMiCOM Usage

Table 17 - Setting group active on relevant DDB signals

Table 18 - Control Inputs settings

Table 19 - Ctrl I/P Config settings

Table 20 - Ctrl I/P Labels settings

Table 21 - Time of Sync Pulse and Corrected times

Table 22 - Record Control settings

Table 23 - Contact positions, CB states and actions

Table 24 - CB Condition Min/Max values

Table 25 - Auxiliary contact position, CB state detected and Action

Table 26 - Circuit Breaker Condition Min/Max values

Table 27 - Leader CB, Leader AR mode, Follower CB and Follower AR Mode

Table 28 - System check options and settings

Table 29 - System check options and settings

Tables

Page 5-14 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1

1.1

(OP) 5 Operation

OPERATION OF INDIVIDUAL PROTECTION FUNCTIONS

The MiCOM P54x is a line protection relay that includes phase differential protection on a per phase basis and optionally comprehensive full scheme distance protection. Each one of these protection functions can be configured to work separately or simultaneously.

The distance protection can also be set to operate upon failure of the relay protection communications. With the inclusion of Aided Directional Earth Fault (DEF) the MiCOM

P54x is a fully comprehensive and versatile line protection relay.

The following sections detail the individual protection functions.

Phase Differential Characteristics

MiCOM P54x calculates the difference between the currents entering and leaving a protected zone. The protection operates when this difference exceeds a set threshold.

Differential currents can also be generated during external fault conditions due to CT saturation. To provide stability for through fault conditions, the relay adopts a biasing technique. This method effectively raises the setting of the relay in proportion to the value of through fault current to prevent relay maloperation. The Relay bias characteristic diagram shows the operating characteristics of the P54x phase differential element.

The differential current “I_diff” is calculated as the vector summation of the currents entering the protected zone. The bias current “I_bias”is the average of the measured current at each line end.

It is found by the scalar sum of the currents at each terminal, divided by two.

Each of these calculations is done on a phase-by-phase basis. The level of bias used for each element is the highest of the three calculated for optimum stability.

I

1

I

2

I

3

I diff

= | I

1

+ I

2

+ I

3

|

P54x/EN OP/Nd5 slope k

2

Operate

Restrain slope k

1

I s1

I bias

=

| I

1

|+| I

2

|+| I

3

|

2

I s2

P1001ENe

Figure 1 - Relay bias characteristic

The characteristic is determined by four protection settings:

Is1 The basic differential current setting which determines the minimum pick-up level of the relay.

Page 5-15

(OP) 5 Operation Operation of Individual Protection Functions k1

Is2 k2

The lower percentage bias setting used when the bias current is below Is2.

This provides stability for small CT mismatches, whilst ensuring good sensitivity to resistive faults under heavy load conditions.

A bias current threshold setting, above which the higher percentage bias k2 is used.

The higher percentage bias setting used to improve relay stability under heavy through fault current conditions.

The tripping criteria can be formulated as:

1. For | Ibias| < Is2,

| Idiff| > k1.| Ibias| + Is1

2. For | Ibias| > Is2,

| Idiff| > k2.| Ibias| - (k2 - k1). Is2 + Is1

When a trip is issued by the differential element, in addition to tripping the local breaker, the relay will send a differential intertrip signal to the remote terminals. This will ensure tripping of all ends of the protected line, even for marginal fault conditions.

The differential protection can be time delayed using either a definite or inverse time characteristic.

The Id High Set element is an unrestrained element designed to provide high-speed operation in the event of CT saturation. Where transformer inrush restraint is used, the resultant second harmonic current produced from CT saturation may cause slow relay operation. The high set element will be automatically enabled when inrush restraint is enabled, otherwise it is not operational.

The logic diagram for Differential protection is shown in the following diagram:

Figure 2 - Differential logic diagram

Page 5-16 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.1.1

1.1.1.1

Time Alignment of Current Vectors

(OP) 5 Operation

Time Alignment of Current Vectors Without GPS (traditional technique)

This section relates to P54x relays when the GPS synchronization is not used.

To calculate differential current between line ends it is necessary that the current samples from each end are taken at the same moment in time. This can be achieved by time synchronizing the sampling, or alternatively, by the continuous calculation of the propagation delay between line ends. The P54x range of relays has adopted this second technique.

Consider a two-ended system shown in the Propagation delay measurement diagram.

Two identical relays, A and B are placed at the two ends of the line. Relay A samples its current signals at time tA1, tA2 etc., and relay B at time tB1, tB2 etc.

Note The sampling instants at the two ends will not, in general, be coincidental or of a fixed relationship, due to slight drifts in sampling frequencies.

A B

Digital communications link

End A End B

Measure sampling time tB3* = (tA – tp2) tA1 tp1

Current vec tors tA2 tA3 tB3* tA4 tp2 tA* tA5 tB3 tA1 td

Curren

Propagation delay time

Tp1 = tp2 = ½ (tA* - tA1 – td) tB1 tA1 tB1 tB* td t vecto rs tB3 tB4 tB5 tA1, tA2 tB1, tB2

Tp1

Tp2

Td tA* tB* tB3*

-

-

-

-

-

-

-

-

Sampling instants of Relay A.

Sampling instants of Relay B.

Propagation delay time from Relay A to B.

Propagation delay time from Relay B to A.

Time between the arrival of message tA1 at Relay B and despatch of message tB3.

Arrival time of message tB3 at Relay A.

Arrival time of message tA3 at Relay B.

The measured sampling time of tB3 by relay.

P1002ENa

Figure 3 - Propagation delay measurement

Assume that at time tA1, relay A sends a data message to relay B. The message contains a time tag, tA1, together with other timing and status information and the current vector values calculated at tA1. The message arrives at end B after a channel propagation delay time, tp1. Relay B registers the arrival time of the message as tB*.

P54x/EN OP/Nd5 Page 5-17

(OP) 5 Operation

1.1.1.2

Page 5-18

Operation of Individual Protection Functions

Since relays A and B are identical, relay B also sends out data messages to end A.

Assume relay B sends out a data message at tB3. The message therefore contains the time tag tB3. It also returns the last received time tag from relay A (i.e. tA1) and the delay time, td, between the arrival time of the received message, tB*, and the sampling time, tB3, i.e. td = (tB3 - tB*).

The message arrives at end A after a channel propagation delay time, tp2. Its arrival time is registered by relay A as tA*. From the returned time tag, tA1, relay A can measure the total elapsed time as (tA* - tA1). This equals the sum of the propagation delay times tp1, tp2 and the delay time td at end B.

Hence:

(tA* - tA1) = (td + tp1 + tp2)

The relay assumes that the transmit and receive channels follow the same path and so have the same propagation delay time. This time can therefore be calculated as: tp1 = tp2 = ½(tA* - tA1 - td)

Note The propagation delay time is measured for each received sample and this can be used to monitor any change on the communication link.

As the propagation delay time has now been deduced, the sampling instant of the received data from relay B (tB3*) can be calculated. As shown in the above Propagation delay measurement diagram, the sampling time tB3* is measured by relay A as: tB3* = (tA* - tp2)

In the Propagation delay measurement diagram, tB3* is between tA3 and tA4. To calculate the differential and bias currents, the vector samples at each line end must correspond to the same point in time. It is necessary therefore to time align the received tB3* data to tA3 and tA4. This can be achieved by rotating the received current vector by an angle corresponding to the time difference between tB3* and tA3 (and tA4). For example a time difference of 1ms would require a vector rotation of 1/20 * 360° = 18° for a 50 Hz system.

As two data samples can be compared with each data message, the process needs to be done only once every two samples, therefore reducing the communication bandwidth required.

Note The current vectors of the three-phases need to be time aligned separately.

Time Alignment of Current Vectors With GPS (all models)

The effect of the deployment of switched Synchronous Digital Hierarchy (SDH) networks on telecommunications circuits used in the application of numerical current differential protection to transmission lines.

Such telecommunications networks can be deployed in flexible, self-healing topologies.

Typically, ring network topologies are employed and these are characterized by the ability to self-heal in the event of a failure of an interconnection channel.

Consider a simple ring topology with 6 nodes, A - F, and consider two equipment situated at nodes B and C. Under healthy conditions equipment at B communicates with equipment at C directly between nodes B and C and equipment at C communicates with equipment at B directly between nodes C and B. In this condition the communications propagation time between nodes B and C will be the same as that between nodes C and

B and so the traditional technique described in could be used to apply numerical current differential protection (see the Example of switched synchronous digital hierarchy diagram).

P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

If the link fails in one direction, say between the transmitter at node B and the receiver at node C, the self-healing ring can continue to transfer signals from node B to node C via the standby route through nodes B, A, F, E, D and then C (obviously a longer path). In this case the communication propagation delay times between nodes B and C differ in the two directions, and if the difference is greater than 1ms the traditional time alignment technique described in the Time Alignment of Current Vectors Without GPS (Traditional

Technique) section is no longer adequate.

Figure 4 - Example of switched synchronous digital hierarchy

P54x make use of the timing information available from the GPS system to overcome the limitation of the traditional technique, and therefore allow application to communications that can provide a permanent or semi-permanent split path routing.

A 1 pulse per second output from a GPS receiver is used to ensure that the re-sampling of the currents at each relay occurs at the same instant in time. The technique is therefore not dependant on equal transmit and receive propagation delay times; changes in one or both of the propagation delay times also do not cause problems. These factors make it suitable for use with switched SDH networks.

The GPS technique is taken further, however, to overcome concerns about the reliability of the GPS system. Consider a similar two ended system to that shown in the

Propagation delay measurement diagram where the re-sampling instants (tAn, tBn) are synchronized using the GPS timing information. Here the re-sampling instants at the two ends will be coincidental as shown in the Data transmission diagram.

Note The Data transmission diagram demonstrates a case where the communications path propagation delay times are not the same.

P54x/EN OP/Nd5 Page 5-19

(OP) 5 Operation

Page 5-20

Operation of Individual Protection Functions ta tA1 tB1 tA2 tp1 tB2 tB3 tB* tc td tB3* tA3 tA4 tB4 tp2 tA* tA5 tA6 tB5 tB6

Relay A Relay B

P1004ENa

Figure 5 - Data transmission

Note Relay A can measure the total elapsed time = (tA* - tA1). This equals the sum of the propagation delay times tp1 and tp2, the delay in sending out the initial message ta, and the delay time tc + td at end B. Hence tp1 + tp2 = tA* - tA1 - ta - tc - td

However, because of the GPS synchronization of the re-sampling instants, tA3 is at the same instant as tB3 (therefore tB3* = tA3) we can use this knowledge to calculate the receive path delay tp2= tA* - tA3 – td

And, by the same process the relay can also calculate tp1.

In the event of the GPS synchronizing signal becoming unavailable, the synchronization of the re-sampling instants at the different ends will be lost and the sampling will become asynchronous. However, the behavior depends on which mode is selected. If GPS ->

Standard is selected, the time alignment of the current data will now be performed, by using the memorized value of propagation delay times prior to the GPS outage (tp2 in relay A and tp1 in relay B – (as shown in the Example of switched synchronous digital hierarchy diagram)). Each relay also keeps measuring the overall propagation delay, tp1+tp2. As long as the change in overall propagation delay does not exceed the setting value under PROT COMMS/IM64/Comm Delay Tol, it is considered that the communication path has not been switched, tp2 and tp1 at the two ends remains valid and the differential protection remains active. If the overall propagation delay exceeds the above mentioned setting, the differential protection will be inhibited. This patented

“fallback” strategy ensures protection continuity even in the event of antenna vandalism, maintenance error, extremely adverse atmospheric conditions etc – all of which could result in GPS outage.

P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.1.2

(OP) 5 Operation

Note tp1 and tp2 do not need to be equal for the fallback strategy to become operational.

If GPS -> Inhibit mode is selected and GPS synchronizing signal becomes unavailable and tp1 = tp2 then the time alignment is performed using the average loop delay. If at the time the GPS fails (tp1 not equal tp2, split path) then the time alignment can be performed using the memorized value of propagation delay prior to the GPS outage.

Each relay continues to measure the overall propagation delay, tp1+tp2. As long as the change in overall propagation delay does not exceed the Comm Delay Tol setting it is decided that the communication path has not been switched, tp1 and tp2 at the two ends remain valid and the protection remains active. If the change in overall propagation delay is greater than the Comm Delay Tol setting, the differential protection shall be inhibited.

If the GPS signal returns, continue in the GPS -> Standard mode of operation.

In GPS -> Restrain mode, behavior is similar to that of GPS -> Inhibit, except that when average loop delay is used, i.e. GPS Sync is lost, if the change in overall propagation delay is greater than the Comm Delay Tol setting, the differential protection shall be restrained by invoking the Char Mod Time functionality, and not inhibited.

Capacitive Charging Current (all models)

The charging current of a line or cable will be seen as differential current. If this current is of a sufficiently high magnitude, as is the case for cables and long feeders, then relay maloperation could occur. Two issues are apparent with charging current; the first being inrush during line energization and the second being steady state charging current.

Inrush charging current is predominately high order harmonics (9th and 11th for example). The Fourier filtering used by the P54x relays will remove these frequency components and hence provide stability.

Steady state charging current is nominally at fundamental frequency and hence may cause relay maloperation.

To overcome this problem the P54x relays include a feature to extract the charging current from the measured current before the differential quantity is calculated.

IL ZL IR

VL IchL IchR VR

P2057ENa

Figure 6 - Capacitive charging current

IL = Local end line current

Ir = Remote end line current

VL = Local end voltage

VR = Remote end voltage

ZL = Line impedance

IchL = Local end charging current

IchR = Remote end charging current

P54x/EN OP/Nd5 Page 5-21

(OP) 5 Operation

1.1.3

1.1.4

1.1.4.1

Operation of Individual Protection Functions

By considering the Capacitive charging current diagram it is evident that the line charging current at a particular location is equal to the voltage at that location multiplied by the line positive sequence susceptance. It is therefore possible for the relays at each line end to calculate the respective line charging currents and compensate accordingly.

The differential current (Id) can be calculated as follows:

Id = IL + IR - (jVLBS/2) - (jVRBS/2)

Id = {IL - (jVLBS/2)} + {IR - (jVRBS/2)}

Id = Local relay current + remote relay current

Where BS is the line positive sequence susceptance.

This feature can be selectively enabled or disabled. If selected, the normal phase current data in the protection message is replaced by {I - (jVBS/2)}.

When applying a three end scheme with ends local (L), remote 1 (R1) and remote 2 (R2), the differential current is calculated as follows:

Id = IL + IR1 + IR2 - (jVL Bs/3) - (jVR1 Bs/3) - (jV R2 Bs/3)

Id = {IL - (jVL Bs/3) } + {I R1 - (jV R1 Bs/3) }+ {I R2 - (jV R2 Bs/3) }

Id = Local relay current + remote 1 relay current + remote 2 relay current

Where Bs is the total teed line positive sequence susceptance i.e.:

Bs = Bs from L-Tee + Bs from R1 – Tee + Bs from R2 - Tee

The display of currents in the 'Measurements 3' column will be affected by this feature when selected.

CT Ratio Correction (all models)

To ensure correct operation of the differential element, it is important that under load and through fault conditions, the currents into the differential element of the relay balance.

There are many cases where CT ratios at each end of the differential protection are different. Ratio correction factors are therefore provided. The CT ratio correction factors are applied to ensure that the signals to the differential algorithm are correct.

Line Differential (87L) Conditioned to Overcurrent (OC)

Selectable Overcurrent Conditioning (as from Software Version D1a)

In P54x devices, there sometimes needs to be a sufficient level of line current before allowing the differential protection to trip the circuit breakers. This can be implemented via the PSL using the existing overcurrent protection stages or via this additional dedicated overcurrent stage within the Line Differential protection menu.

Two menu cells with name OC Rel Status and I> Release are part of the phase differential menu. These additional settings are available via the relay menu (“GROUP x

PHASE DIFF” menu Column).

Menu Text Default setting Setting Range

OC Rel Status Disabled Disabled or Enabled

I> Release 1.000A 0.08A to 4.0A, Step 0.01A

When “OC Rel Status” is set to Enabled, the differential protection will only issue a trip condition if the differential current is above the differential current tripping level and the line current is above the “I> Release” setting value.

Page 5-22 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

When “OC Rel Status” is set to Disabled, the differential protection will issue a trip condition if the differential current is above the differential current tripping level.

The following DDBs have been added:

DDB No Text

DDB 1816 Diff Blk IA<

DDB 1817 Diff Blk IB<

DDB 1818 Diff Blk IC<

Description

Overcurrent condition for phase differential trip blocking for phase

A active (Current is less than setting threshold)

Overcurrent condition for phase differential trip blocking for phase

B active (Current is less than setting threshold)

Overcurrent condition for phase differential trip blocking for phase

C active (Current is less than setting threshold)

1.2 Protection of Transformer Feeders

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

MiCOM P543/P545 relays can be applied when power transformers are located in the differential zone. In order to obtain the correct performance of the relay for this application, MiCOM P543/P545 is provided with:

Phase compensation to take into account any phase shift across the transformer, possible unbalance of signals from current transformers either side of windings, and the effects of the variety of earthing and winding arrangements. In P543 and

P545, software Interposing CTs (ICTs) are provided to give the required compensation.

Inrush blocking or restrain options to cater for high levels of magnetizing current during inrush conditions.

For conditions where it is possible to temporarily load the transformer with a voltage in excess of the nominal voltage, the overfluxing blocking prevents unwanted tripping. The fifth harmonic blocking feature does not require a voltage signal. A fifth harmonic signal is derived from the differential current waveform on each phase and blocking is on a per phase basis. The overfluxing protection should be used in such applications to protect the transformer accordingly.

CT ratio correction factor as mentioned in the CT Ratio Correction (All Models) section to match the transformer winding rated currents if needed.

On P543 or P545 relays where capacitive charging current compensation is available, there is a setting to select if capacitive charging current compensation is used or if interposing CTs are used.

P54x/EN OP/Nd5 Page 5-23

(OP) 5 Operation

1.2.1

Operation of Individual Protection Functions

Transformer Magnetizing Inrush

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

The magnetizing inrush current to a transformer appears as a large operating signal to the differential protection. Special measures are taken with the relay design to ensure that no maloperation occurs during inrush.

The Transformer magnetizing characteristic diagram shows a transformer magnetizing characteristic. To minimize material costs, weight and size, transformers are generally operated near to the ‘knee point’ of the magnetizing characteristic. Consequently, only a small increase in core flux above normal operating levels will result in a high magnetizing current.

Page 5-24

Figure 7 - Transformer magnetizing characteristic

Under normal steady state conditions, the magnetizing current associated with the operating flux level is relatively small (usually less than 1% of rated current). However, if a transformer winding is energized at a voltage zero, with no remnant flux, the flux level during the first voltage cycle (2 x normal max. flux) will result in core saturation and in a high, non-sinusoidal magnetizing current waveform. This current is commonly referred to as magnetizing inrush current and may persist for several cycles. The magnitude and duration of magnetizing inrush current waveforms are dependent upon a number of factors, such as transformer design, size, system fault level, point on wave of switching, number of banked transformers, etc. The Magnetizing inrush waveforms diagram shows typical transformer magnetizing currents for steady state and inrush conditions.

The magnetizing inrush current contains a high percentage of second harmonic. The

P543 and P545 relays filter out this component of the waveform and use it as an additional bias quantity. The total bias used by the relay will therefore be a combination of the average load current on the line plus a multiple of the second harmonic component of the current. The multiplying factor is used to ensure stability and is a factory pre-set value.

Where P543 and P545 relays are used and inrush restrain function is enable, it must be ensure that this function is enabled at each end to avoid possible maloperation.

P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

High set differential setting:

When inrush restrain is enabled, a high set differential protection becomes active.

This unrestrained instantaneous 'Id High Set ' is provided to ensure rapid clearance for heavy internal faults with saturated CTs. The high set is not restrained by magnetizing inrush. A setting range 4 In -32 In (RMS values) is provided on P543 and P545.

Figure 8 - Magnetizing inrush waveforms

The P543 and P545 relay provides a choice between harmonic restraint and blocking by setting option, both providing stability during transformer inrush conditions.

To select second harmonic Restraint or Blocking option, set the cell [3312: Inrush

Restraint] under the GROUP 1 PHASE DIFF menu heading to Restraint or

Blocking.Second harmonic restraints or blocking provide security during transformer energization.

P54x/EN OP/Nd5 Page 5-25

(OP) 5 Operation

1.2.1.1

1.2.1.2

Operation of Individual Protection Functions

Second Harmonic Restraint

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

The magnetizing inrush current contains a high percentage of second harmonic. The

P543 and P545 relays filter out this component of the waveform and use it as an additional bias quantity. The total bias used by the relay will therefore be a combination of the average load current on the line plus a multiple of the second harmonic component of the current. The multiplying factor which is used to ensure stability is controlled by the setting cell [3314: Ih(2) Multiplier] under the GROUP 1 PHASE DIFF menu heading provided the setting cell [ 3312: Inrush Restraint ] is set to Restraint .

This multiplier is used in additional bias calculation as per following formula:

IF Inrush Restraint setting is set to Restraint

Additional bias = Ih(2) Multiplier * 1.414 * largest 2nd harmonic current

ELSE

Additional bias = 0

In the above equation 2nd harmonic current is derived from Fourier filtering techniques.

Where P543 and P545 relays are used and inrush restrain function is enabled, it must be ensured that this function is enabled at each end to avoid possible maloperation.

Second Harmonic Blocking

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

To select second harmonic blocking option, set the cell [3312: Inrush Restraint] under the

GROUP 1 PHASE DIFF menu heading to Blocking.

Second harmonic blocking provides security during transformer energization.

For each phase, if the level of phase current is above 5% In, and if the ratio of second harmonic current, Ih(2) to fundamental in the line is above the settings at cell [3320: Ih(2)

>%] then inrush conditions shall be detected which sets the appropriate phase block, to block local and remote ends.

Users have choice to apply Cross blocking or independent blocking by choosing the appropriate setting at cell [3321: Ih(2) CrossBlock] under the GROUP 1 PHASE DIFF menu heading. If Ih(2) CrossBlock is set to Disabled then independent blocking is used.

If independent blocking is enabled only the affected phase is blocked at all ends.If cross blocking is enabled all phases are blocked at all ends.

The following logic diagram shows the inhibiting of the differential algorithm by magnetizing inrush conditions:

Page 5-26 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.2.1.3

(OP) 5 Operation

IA

2nd Harmonic

Lh (2) > Setting

&

DDB : lh(2) Local Blk A (1016)

Intsig : lh(2) Local Blk A

*

IB

2nd Harmonic

Lh (2) > Setting

Set 2nd

Harmonic

Set:

Cross

Blocking

IC

2nd Harmonic

Lh (2) > Setting

Disabled

Restraint

Blocking

Disabled

Enabled

&

&

1

DDB : lh(2) Local Blk B (1017)

Intsig : lh(2) Local Blk B

*

DDB : lh(2) Local Blk C (1018)

Intsig : lh(2) Local Blk C

*

* Intsig sent in message

* Intsig received in message

&

1

1

Intsig lh(2) Local Cross Blk *

Intsig lh(2) Block A

Intsig lh(2) Block B

1

Intsig lh(2) Block C

Intsig : lh(2) Rem 1 Cross Blk

Intsig : lh(2) Rem 2 Cross Blk

Intsig : lh(2) Rem 1 Blk A

Intsig : lh(2) Rem 2 Blk A

Intsig : lh(2) Rem 1 Blk B

Intsig : lh(2) Rem 2 Blk B

Intsig : lh(2) Rem 1 Blk C

Intsig : lh(2) Rem 2 Blk C

*

*

*

*

*

*

*

*

1

1

1

1

Figure 9 - Second harmonic restraint and blocking logic

DDB:lh(2) Rem Blk (A1021)

DDB:lh(2) Rem Blk (B1022)

DDB:lh(2) Rem Blk (C1023)

P4042ENa

Fifth Harmonic Blocking

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

For each phase, if the level of phase current is above 5% In, and if the ratio of fifth harmonic current ,Ih(5) to fundamental in the line is above the settings at cell [3328: Ih(5)

>%] then the overfluxing conditions shall be detected which sets the appropriate phase block, to block local and remote ends.

Users have choice to apply Cross blocking or independent blocking by choosing the appropriate setting at cell [3329: Ih(5) CrossBlock] under the GROUP 1 PHASE DIFF menu heading. If Ih(5) CrossBlock is set to Disabled then independent blocking is used.

If independent blocking is enabled only the affected phase is blocked at all ends.If cross blocking is enabled all phases are blocked at all ends.

The following logic diagram shows the inhibiting of the differential algorithm by overfluxing conditions:

P54x/EN OP/Nd5 Page 5-27

(OP) 5 Operation

IB

5 th

Harmonic

Ih(5 ) > Setting

5 th

IB

Harmonic

Ih(5 ) > Setting

Set: 5 th

Harmonic

5 th

IC

Harmonic

Ih(5 ) > Setting

Disabled

Blocking

&

&

&

Set: Cross Blocking Disabled

Enabled

*

*

Intsig sent in message

Intsig received in message

Intsig: Ih(5 ) Rem1 Cross Blk

*

Intsig: Ih(5 ) Rem2 Cross Blk *

Intsig: Ih(5 ) Rem1 Blk A *

Intsig: Ih(5 ) Rem2 Blk A *

Intsig: Ih(5 ) Rem1 Blk B *

Intsig: Ih(5 ) Rem2 Blk B *

Intsig: Ih(5 ) Rem1 Blk C *

Intsig : Ih(5 ) Rem2 Blk C *

1

1

1

1

Figure 10 - Fifth harmonic blocking logic

1

&

1

Operation of Individual Protection Functions

1

DDB: Ih(5 ) Local Blk A (1666)

Intsig: Ih(5 ) Local Blk A *

DDB: Ih(5 ) Local Blk B (1667)

Intsig: Ih(5 ) Local Blk B *

DDB: Ih(5 ) Local Blk C (1668)

Intsig: Ih(5 ) Local Blk C *

1

Intsig: Ih(5 ) Local Cross Blk *

Intsig: Ih(5 ) Block A

Intsig: Ih(5 ) Block B

Intsig: Ih(5 ) Block C

DDB: Ih(5 ) Rem Blk A (1669)

DDB: Ih(5 ) Rem Blk B (1670)

DDB: Ih(5 ) Rem Blk C (1671)

P4043ENa

Page 5-28 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

1.2.1.4 High Set Differential

A Phase Differential Comparator

Important These functions apply to the following products:

P543.

P544 using Software Version H1 or later.

P545.

P546 using Software Version H1 or later.

When Inrush Restraint is set to Restraint or Blocking a high set differential protection becomes active. This unrestrained instantaneous Id High Set is provided to ensure rapid clearance for heavy internal faults with saturated CTs. The high set is not restrained by magnetizing inrush. A setting range 4 In -32 In (RMS values) is provided on P543 and

P545.

DDB IDiff > Start A ( 738)

LowSet

Idiff>>

Diff InterTrip A

&

DT/ IDMT t

DDB Diff Trip A (583)

1

HighSet

Idiff>>

&

Intsig : Ih(2 ) Block A

1

DDB IDiff >> Start A ( 1438)

Intsig : Ih(5 ) Block A

B Phase Differential Comparator

LowSet

Idiff>>

&

DDB IDiff > Start B ( 739)

DT/ IDMT t

Diff InterTrip B

DDB Diff Trip B ( 584)

1

HighSet

Idiff>>

&

Intsig: Ih(2 ) Block B

Intsig : Ih(5 ) Block B

1

DDB IDiff >> Start B (1439)

C Phase Differential Comparator LowSet

Idiff>>

&

DDB IDiff > Start C (740)

DT/ IDMT t

Diff InterTrip C

DDB Diff Trip C ( 585)

1

HighSet

Idiff>>

&

Intsig : Ih(2 ) Block C

Intsig : Ih(5 ) Block C

1

DDB Inhibit C Diff (1145)

(Remote Relay Inhibit )

(From Remote relay)

DDB Inhibit C Diff ( 455)

(Local Relay Inhibit)

1

Figure 11 - Highset element logic

DDB IDiff >> Start C ( 1440)

Note, Intsig: Ih(2 ) Block x and Intsig: Ih( 5 )

Block x are detailed in sections 5.2. 1 and 5.2.2

P4044ENa

P54x/EN OP/Nd5 Page 5-29

(OP) 5 Operation

1.2.1.5

Operation of Individual Protection Functions

Phase Correction and Zero Sequence Current Filtering

To compensate for any phase shift between two windings of a transformer, it is necessary to provide phase correction. This was traditionally provided by the appropriate delta connection of main line CTs. Phase correction is provided in the P54x relays via software interposing CTs.

In addition to compensating for the phase shift of the protected transformer, it is also necessary to mimic the distribution of primary zero sequence current in the protection scheme.

The advantage of having replica interposing CTs is that it gives the P54x relays the flexibility to cater for line CTs connected in either star or delta, as well as being able to compensate for a variety of system earthing arrangements.

The Need for zero-sequence current filtering diagram shows the need for zero sequence current filtering for differential protection across a transformer. The power transformer delta winding acts as a ‘trap’ to zero sequence current. This current is therefore only seen on the star connection side of the transformer and hence as differential current.

The filtering of zero sequence current has traditionally been provided by appropriate delta connection of main line CT secondary windings. In the P54x relays, zero sequence current filtering is automatically implemented in software when a delta connection is set for a software interposing CT. Where a transformer winding can pass zero sequence current to an external earth fault, it is essential that some form of zero sequence current filtering is employed. This would also be applicable where in zone earthing transformers are used.

P54x P54x

1.2.2

P1008ENc

Figure 12 - Need for zero-sequence current filtering

3 to 2 Terminal Reconfiguration

The P54x relays can be configured for the protection of two or three terminal lines. This allows any of the relays to be applied to a two-ended line which may be converted to a three terminal line at a later date. Since only the ‘configuration’ setting needs to be changed to configure the relay for two or three terminal operation, no hardware changes are required when the third terminal is added, provided that 2 channels of fibre optics are already fitted.

Page 5-30 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.2.3

(OP) 5 Operation

For operational reasons, it may be necessary, under certain circumstances, to switch out one line end and its associated relay on a three terminal circuit. By altering the

‘Reconfiguration’ setting at any end of the line, an operator can command any pair of relays to work as a two terminal system. The ‘configured out’ relay can then be switched off, leaving the line to be protected by the other two relays. A restore command can be issued to reconfigure the system back to three terminal operation.

Four reconfiguration settings are available:

Three ended

Two ended local and remote 1 (L & R1)

Two ended local and remote 2 (L & R2)

Two ended remote 1 and remote 2 (R1 & R2)

Before a configuration command can be successfully initiated, it is necessary to energize the ‘reconfiguration interlock’ and ‘Inhibit Current Differential’ opto isolated inputs. The latter input will disable tripping via the current differential elements from all three relays to ensure that the scheme will remain stable during reconfiguration.

It must be ensured that the line end to be ‘configured out‘ is open before issuing a reconfiguration command. If this is not done, any current flowing in or out of the

‘configured out’ end will be seen as fault current and may cause the other relays to operate.

If the new configuration setting issued to the local relay is L & R1 or L & R2, the trip outputs of the two ‘2-ended’ relays will remain inhibited by the ‘Inhibit Current Differential’ input at the local relay. The ‘inhibit trip/alarm outputs’ opto should be de-energized to enable the trip outputs reconfigured scheme. If the new configuration setting is R1 & R2, the output contacts of the two remote relays will not be inhibited as they will ignore all commands from the local relay.

The scheme may be restored to a three terminal configuration by selecting ‘three ended‘ at any terminal. This will occur irrespective of the status of the opto inputs but is subject to a healthy communications channel being detected.

Mesh Corner and 1½ Breaker Switched Substations

If differential protection is applied in a mesh corner or 1½ breaker switched substation, a

P544 or P546 should be preferred to use it as they do have two independent CT inputs and therefore each one generates its own restrain. See also P54x/EN AP.

P54x/EN OP/Nd5 Page 5-31

(OP) 5 Operation Operation of Individual Protection Functions

Page 5-32

P4037ENb

Figure 13 - Breaker and a half application

As shown in the Breaker and a half application diagram, a P544 or P546 relay should be used at the End X as the line is fed from a breaker and a half substation configuration. At

End Y, a P543 or P545 should be installed.

Relay calculations for differential and bias currents are as follows for this case are as follows:

At End X

I diff =

ĪCTX1 + ĪCTX2 + ĪCTY

I bias = (

│ ICTX1 │ + │ ICTX2 │ + (Additional bias if non zero) or │ IREMOTE │)/2

In this case Additional bias is zero as the P54x at the remote end has one single CT

(P543 or P545).

Additional bias (to be sent to end Y) = is calculated on a per phase basis by scalar summing both local currents (ICTX1 and ICTX2) and selecting the largest of the three calculated. This current is included in the transmitted message.

At End Y

I diff =

ĪCTY + ĪCTX1 + ĪCTX2

I bias = (

│ ICTY │ + (Additional bias if non zero) or │ IREMOTE │)/2

In this case Additional bias is the one sent by End X (relay with two CT inputs; P544 -

P546).

P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.2.4

(OP) 5 Operation

Stub Bus Protection

The P54x relays include a facility to provide stub bus protection. When the line isolator is open, an auxiliary contact from the isolator can energize an input on the relay to enable this protection. When stub bus mode is enabled, all current values transmitted to the remote relays, and all those received from remote relays, are set to zero. The protection will now provide differential protection for the stub zone.

The local biased protection will operate as normal using the local currents with the exception that no differential, or permissive intertrips will be sent to the remote relay(s) and all such intertrips received will be ignored and also any trip will be 3-pole only. Direct

Intertrips still operate as normal. x

1.2.5

P54x/EN OP/Nd5

P54X P54X x

P4161ENa

Figure 14 - Stub bus protection

For an internal fault the relay will operate, tripping the two local circuit breakers. When in stub bus mode, the relay will not send a differential intertrip signal.

In P544 and P546 with 2 sets in Stub bus mode the currents from the two sets of CTs are used for differential protection.

However in P543 or P545 when in stub bus mode there is only 1 set of CT which effectively means if the current is above Is1 the relay will trip as there is no effective bias.

In stub bus mode if the communication fails then the differential protection is lost. A possible way to provide protection then would be to apply a high set overcurrent protection which can be enabled by settings when communication fails and in Stub bus mode.

The Minimum Operating Current

The minimum operating current is related, but not equal to, the Is1 setting.

Consider a single end fed fault with no load but fault current, I:

|Idiff| = I

|Ibias| = ½I

Assuming |Ibias| < Is2, then, using the equations from the Phase Differential

Characteristics section, the relay will operate if:

|Idiff| > k1.| Ibias| + Is1

I > k1.½I + Is1

I > Is1 / (1 - 0.5 k1) or or

The minimum operating current is therefore a function of the Is1 and k1 settings. With k1 set to 30% and Is1 set to 0.2 pu, the minimum operating current will be:

Imin = 1.176 Is1

Imin = 0.235 pu

Page 5-33

(OP) 5 Operation

1.3

1.3.1

1.4

1.5

Operation of Individual Protection Functions

Disabling/Enabling Differential Protection

The differential function can be globally enabled or disabled using the CONFIGURATION

/Phase Diff/Enabled-Disabled setting.

If the differential function is disabled globally (i.e. CONFIGURATION column), no current differential message is transmitted and no current differential measurements

(Measurements 3) and channel communication statistics (Measurements 4) are displayed. Therefore a remote connected relay, will display a signaling fail and C Diff failure alarm.

If the differential function is enabled globally (i.e. CONFIGURATION column) and disabled within a group (i.e. group x column), current differential message is exchanged, current differential measurements (Measurements 3) and channel communication statistics (Measurements 4) are displayed, local current differential protection cannot trip but relay can receive a differential inter-trip from the remote end.

Enabling or Disabling Differential Protection for In-Zone Power Transformer

Differential protection with an in-zone transformer can be enabled from the local control panel. Enabling can be done separately for each setting group. To enable the differential protection, set the cell [3310: Compensation] to Transformer under the GROUP 1

PHASE DIFF menu heading.

Differential Relay Compatibility with Previous Versions

Current differential protection in P54x relays is as follows:

P543-P546 models suffix M are compatible with each other

In non-GPS mode P543-P546 models suffix M are compatible with relay models

P543-P546 suffix B, G, J and K

In GPS mode P543-P546 models suffix M are compatible with relay models P543-

P546 suffix B, G, J and K

P543-P546 models suffix M are not compatible with suffix A models

If a relay suffix K or M is communicating with a relay suffix B, G or J, a monitor bit labeled

H/W B to J model in Measurement 4/Channel status will become 1.

Differential Current Transformer Supervision (Differential CTS) in P543-P546 models suffix K or M are only compatible with P543-P546 models suffix K or M.

Differential Relay without Voltage Connections

Differential protection does not need phase or neutral voltage connections as this protection relies entirely on the currents measured at each end of the line.

If there are no voltage connections to the P54x relay, the VTs Connected Yes/No setting under CT AND VT RATIOS should be set to No. Once set to No, this will cause the relay

VTS logic to set the VTS Slow Block and VTS Fast Block DDBs, but it will not raise any alarms. It will also override the VTS enabled setting should the user set it. The purpose of this is to stop the pole dead logic working incorrectly in the absence of voltage and current inputs.

Page 5-34 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.6

1.6.1

1.6.2

Line Parameters Settings

(OP) 5 Operation

Phase Rotation (Phase Sequence)

A setting is used to select whether the 3-phase voltage set is rotating in the standard

ABC sequence, or whether the rotation is in reverse ACB order. The appropriate selection is required to ensure that all sequence components and faulted phase flagging/targeting is correct.

Tripping Mode - Selection of Single or 3-Phase Tripping

This selects whether instantaneous trips are permitted as Single pole, or will always be 3 pole. Protection elements considered as “instantaneous” are those normally set to trip with no intentional time delay, i.e.: Differential, directional earth/ground DEF aided scheme and if fitted, Zone 1 distance and distance channel aided scheme. The selection

1 and 3 pole allows single pole tripping for single phase to ground faults. The selection 3 pole converts all trip outputs to close Trip A, Trip B and Trip C contacts simultaneously, for three pole tripping applications.

In the case of the P544/P546, the tripping mode can be set independently for the two circuit breakers controlled.

Logic is provided to convert any double phase fault, or any evolving fault during a single pole auto-reclose cycle into a three phase trip. Two phase tripping is never permitted.

This functionality is shown in the Trip conversion scheme logic diagram for P543/P545 and in AR Figure 63 (logic diagram supplement) for P544/P546 models.

Figure 15 - Trip conversion scheme logic

P54x/EN OP/Nd5 Page 5-35

(OP) 5 Operation

1.6.3

Operation of Individual Protection Functions

Selectable Zone Tripping Mode

In the previous implementation, it is possible to configure all distance protection zones to trip single and/or 3-pole.

As from Software Version D1a, a new feature has been added to allow tripping mode selection on an individual zone-by-zone basis for each circuit breaker.

Five new menu cells for single circuit breaker and 10 new menu cells for dual circuit breaker added to in GROUP x LINE PARAMETERS menu list. These new additional menu cells are only applicable to variants with Distance protection.

These additional settings are available via the relay menu (“GROUP x LINE

PARAMETERS” menu Column). The single circuit breaker variants (P543 and P545) menu cells are listed below and will only be visible if the “Tripping Mode” menu cell is set to “1 and 3 Pole”:

Menu Text

Z1 Tripping Mode

Z2 Tripping Mode

Default setting

3 Pole

3 Pole

Setting Options

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

ZP Tripping Mode

ZQ Tripping Mode

Z3 Tripping Mode

3 Pole

3 Pole

3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

Z4 Tripping Mode 3 Pole 3 Pole, 1 and 3 Pole

The dual circuit breaker variants (P544 and P546) menu cells are listed below, the CB1 cells will only be visible if the “CB1 Tripping Mode” menu cell is set to “1 and 3 Pole” and the CB2 cells will only be visible if the “CB2 Tripping Mode” menu cell is set to “1 and 3

Pole”.

Menu Text Default setting Setting Options

CB1Z1Trip Mode

CB1Z2Trip Mode

CB1ZPTrip Mode

CB1Z3Trip Mode

CB1Z4Trip Mode

CB2Z1Trip Mode

CB2Z2Trip Mode

CB2ZPTrip Mode

CB2Z3Trip Mode

CB2Z4Trip Mode

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

3 Pole, 1 and 3 Pole

Page 5-36 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

1.6.4

INTSIG Phase A

Undercurrent Operation

INTSIG Phase A

Undervoltage Operation

Pole Dead Logic

Pole dead logic is used by the relay to determine when the circuit breaker poles are open

(“pole dead”). This indication may be forced, by means of status indication from CB auxiliary contacts (52a or 52b), or internally determined by the relay. When no auxiliary contacts are available, the relay uses lack of phase current (Setting: CB FAIL &

I</UNDER CURRENT/I< Current Set), and an undervoltage level detector (pick up fixed at 38.1 V - drop off fixed at 43.8 V to declare a “pole dead”.

Note If the VT is connected at the busbar side, auxiliary contacts (52a or 52b) must be connected to the relay for a correct pole dead indication. The logic diagrams, (Pole dead logic for P543/P545) and (Pole dead logic for

P544/P546) below show the details:

&

20ms t

0

1

DDB Pole

Dead A (892)

DDB CB Open A ph (904)

&

INTSIG Phase B

Undercurrent Operation

INTSIG Phase B

Undervoltage Operation

&

20ms t

0

1

DDB Pole

Dead B (893)

DDB CB Open B ph (905)

&

INTSIG Phase C

Undercurrent Operation

INTSIG Phase C

Undervoltage Operation

&

20ms t

0

1

DDB Pole

Dead C (894)

DDB CB Open C ph (906)

&

DDB CB Open 3 ph (903)

INTSIG VTS Slow Block

Figure 16 - Pole dead logic for P543/P545

&

1

&

DDB Any Pole

Dead (891)

DDB All Poles

Dead (890)

P1112ENd

P54x/EN OP/Nd5 Page 5-37

(OP) 5 Operation Operation of Individual Protection Functions

INTSIG Phase A Undercurrent Operation

INTSIG Phase A Undervoltage Operation

& t

20ms

0

DDB Pole Dead A (892)

1

DDB CB1 Open A ph (904)

DDB CB2 Open A ph (912)

&

INTSIG Phase B Undercurrent Operation

INTSIG Phase B Undervoltage Operation

&

& t

20ms

0

DDB Pole Dead B (893)

1

DDB CB1 Open B ph (905)

DDB CB2 Open B ph (913)

&

INTSIG Phase C Undercurrent Operation

INTSIG Phase C Undervoltage Operation

&

& t

20ms

0

DDB Pole Dead C (894)

1

1

DDB Any Pole Dead (891)

DDB CB1 Open C ph (906)

DDB CB2 Open C ph (914)

DDB CB1 Open 3 ph (903)

DDB CB2 Open 3 ph (911)

&

&

&

&

DDB All Poles Dead (890)

&

INTSIG VTS Slow Block

Figure 17 - Pole dead logic for P544/P546

1.6.5

P1112ENc

Residual Compensation for Earth/Ground Faults

For earth faults, residual current (derived as the vector sum of phase current inputs

(Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. Therefore the earth loop reach of any zone must generally be extended by a multiplication factor of

(1 + kZN) compared to the positive sequence reach for the corresponding phase fault element.

Page 5-38 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.6.6

1.7

(OP) 5 Operation

Mutual Compensation for Parallel Lines

Analysis of a ground fault on one circuit of a parallel over-head line shows that a fault locator positioned at one end of the faulty line will tend to over-reach while that at the other end will tend to under-reach. In cases of long lines with high mutual inductance, mutual zero sequence compensation can be used to improve the fault locator accuracy.

The compensation is achieved by taking an input to the relay from the residual circuit of the current transformers in the parallel line.

The major disadvantage of standard mutual compensation is that faults on a parallel line can cause mal-operation of the healthy line protection. The MiCOM relay uses fast dynamic control of the mutual compensation, which prevents such mal-operations of the healthy line protection, while providing correct mutual compensation for faults inside the protected section. The dynamic control is achieved by effectively eliminating the mutual compensation above a set level of parallel line residual current (I MUTUAL) compared to the protected line residual current (IN).

If the ratio: I MUTUAL/IN is less than the ‘Mutual Cutoff’ setting, then full mutual compensation is applied to all distance zones, and the fault locator.

If the ratio: I MUTUAL/IN is greater than the ‘Mutual Cutoff’ setting, then no mutual compensation is applied.

Optional Distance Protection

The MiCOM IED has, by ordering option, a comprehensive integrated distance protection package. This consists of:

Phase fault distance protection

Earth/ground fault distance protection

Power sing detection, alarm, and blocking

Out-of-step detection and tripping

Switch On To Fault (SOTF) and Trip On Reclose (TOR)

Directional Schemes

Aided schemes

These are described in the following sections and are marked as being applicable to the distance option only. If the distance option is not specified, these will not be applicable, and additional protection will be in the form of overcurrent etc.

P54x/EN OP/Nd5 Page 5-39

(OP) 5 Operation

1.8

1.9

Operation of Individual Protection Functions

Phase Fault Distance Protection (Distance option only) (for Software

Versions BEFORE H3a)

The MiCOM relay has five zones of phase fault protection. It is possible to set all zones either with quadrilateral (polygon) characteristics, or with mho circles. Each zone can be set independently to be permanently disabled, permanently enabled or enabled in case of protection communication channel fail. The impedance plot (shown in the Earth fault quadrilateral characteristics (Distance option only) diagram) shows the characteristic when set for mho operation. The characteristic drawn for illustration is based on the default distance settings without dynamic expansion.

Z3

Zp

(forward)

Z2

Z1

Directional

(reverse)

Directional

(forward)

Z4

P1134ENh

Figure 18 - Phase fault Mho characteristics (Distance option only)

The protection elements are directionalized as follows:

Zones 1, 2 and 3 - Directional forward zones, as used in conventional three zone distance schemes. Note that Zone 1 can be extended to Zone 1X when required in zone 1 extension schemes.

Zone P - Programmable directionality. Selectable as a directional forward or reverse zone.

Zone 4 - Directional reverse zone.

Phase Fault Distance Protection (Distance option only) (for Software

Version H3a and later)

The Distance Protection function has been modified in Software Version H3a. For more details, please refere to the

Distance Protection Zone and Timer Start Enhancements

section in the Application Notes chapter.

Page 5-40 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.10

(OP) 5 Operation

Earth Fault Distance Protection (Distance option only) (for Software

Versions BEFORE H3a)

The MiCOM relay has 5 zones of earth (ground) fault protection. It is also possible to set all zones either with quadrilateral characteristics, or with mho circles. The choice of mho or quadrilateral is independent of the general characteristic selection for the phase fault elements. Each zone can be set independently to be permanently disabled, permanently enabled or enabled in case of protection communication channel fail.

All earth fault distance elements are directionalized as per the phase fault elements, and use residual compensation of the corresponding phase fault reach. The impedance plot shown in the Earth fault quadrilateral characteristics diagram adds the characteristics when set for quadrilateral operation.

X

Zp

Z1

Z2

Z3

R

Zq

Z4

Fixed forward

Forward with offset

Fixed backward

Flexible settable dir.

Figure 19 - Earth fault quadrilateral characteristics (Distance option only)

P1135ENh

P54x/EN OP/Nd5 Page 5-41

(OP) 5 Operation

1.11

Operation of Individual Protection Functions

Distance Protection Tripping Decision

For the MiCOM relay, five conditions would generally need to be satisfied in order for a correct relay trip to result. These are:

The phase selector needs to identify the faulted phases, and ensure that only the correct distance measuring zones may proceed to issue a trip. Possible phase selections are AN, BN, CN, AB, BC, CA, ABC. For double phase to ground faults, the selection is AB, BC or CA, with N (neutral) just for indication only.

The loop current for the selected phase-ground or phase-phase loop must exceed the minimum sensitivity for the tripping zone. By default, this sensitivity is 5%In for ground faults, and both of the faulted phases must exceed 5%In for phase-phase faults. The user may raise this minimum sensitivity if required, but this is not normally done.

The faulted phase impedance must appear within a tripping (measuring) zone, corresponding to the phase selection. Five independent zones of protection are provided. The tripping zones are mho circles or quadrilateral, and selected independently for phase, and ground faults. The ground fault distance elements require compensation for the return impedance, this residual compensation modifies the replica impedance for each zone. Under conditions were a parallel line is present the relay can compensate for the mutual coupling between the lines; this adjusts the replica impedance in the same way as the residual compensated based on the current in the parallel line. The reach setting Z for ground fault mho and quadrilateral elements is determined as follows:

Z = Z1 + [( Ires / IP ) x Zres ] + [( Imut / IP ) x Zmut ]

Where:

Z1

IP

Ires is the positive sequence reach setting is the current in the faulted phase is the residual current (= Ia + Ib + Ic)

Zres

Imut is the residual impedance (= (Z0-Z1)/3) = Kres x Z1 is the residual current in the parallel line

Zmut is the mutual compensating impedance

For directional zones within the relay (Zone 1, P, 2, 4 and Z3 if set directional), the delta directional line must be in agreement with the tripping zone. For example, zone 1 is a forward directional zone, and must not trip for reverse faults behind the relay location. A zone 1 trip will only be permitted if the directional line issues a

“forward” decision. The converse will be true for zone 4, which is reverse-looking and this needs a reverse decision by the directional line. If the delta directional cannot make a decision then conventional direction lines are used.

The set time delay for the measuring zone must expire, with the fault impedance measured inside the zone characteristic for the duration. In general, Zone 1 has no time delay (“instantaneous”), all other zones have time delays. Where channelaided distance schemes are used, the time delay tZ2 for overreaching Zone 2 may be bypassed under certain conditions.

In order to achieve fast, sub-cycle operation, the phase selection, measuring zones and directional line algorithms run in parallel, with their outputs gated in an AND configuration.

This avoids sequential measurement which would slow the operation of the relay.

From version H4 the operating times for off-angle faults have been improved to an average of 30-35ms in all zone 1 (for f = 50Hz). Faults at the zone boundary will be cleared in higher times (10-20% of zone 1 area). Sub cycle operation is maintained for faults close to the relay characteristic up to 75% of zone reach setting.

Page 5-42 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.12

(OP) 5 Operation

Distance Protection Starting

With Software H3 and later the zone timer starting is selectable either 'Zone Start'

(default) or 'General Start'. Before Software H3 only the 'Zone Start' behaviour is implemented. This section describes how both options will operate.

The MiCOM P44y/P54x distance protection provides several starting elements (with dedicated DDBs):

Zone 1 Ph starting

Zone 1 Gnd starting

Delta Directional starting

Zone Q Ph starting

Zone Q Gnd starting

Zone Start (Default)

In this operation mode the dedicated timers for each zone tZ1 ... tZQ are started individually with the measured impedance entering the zone and the correct phase selection (see also the Phase Selector section). This may result in different starting times for the zones and a longer tripping time in case the apparent impedance trajectory moves to smaller impedances. Each zone timer will stop individually if the measured impedance gets out of the zone reaches.

General Start

In this operation mode all zone timers tZ1 ... tZQ are started instantaneously with the first zone starting or delta starting as shown in the

General starting logic and end timers

diagram. The General Start signal will reset in case all zone and delta directional startings have reset.

In addition to the General Start signal two End Timers are available:

Directional End Timer (

ZDir tEnd

) with directional setting

Dist tEnd Dir

(Forward,

Reverse or Non-Directional)

Non-Directional End Timer (

ZNonDir tEnd

)

The end timers can be used for Distance protection backup tripping e. g. in combination with a high reach setting for the used zones.

P54x/EN OP/Nd5 Page 5-43

(OP) 5 Operation Operation of Individual Protection Functions

Z1 Gnd Start

Z2 Gnd Start

Z3 Gnd Start

Z4 Gnd Start

ZP Gnd Start

ZQ Gnd Start

Zone P Gnd Dir.

Forward

Reverse

Zone Q Gnd Dir.

Forward

Reverse

=1

&

&

&

Any Gnd Start

Any Ph Start

=1

Zx Gnd fwd

Zx Ph fwd

=1 t

ZNonDir tEnd t

ZDir tEnd

NonDir EndTimer

&

Dis Sch Gen Str

General Starting

Dir End Timer

=1

Zx Forward

Dist tEnd Dir

Directional Fwd

Directional Rev

Non-Directional

&

&

=1

=1

Zx Gnd rev

Zx Ph rev

=1

Zx Reverse same for Ph elements

&

Delta Dir fwd

Delta Dir rev

=1

Any Delta Start

Figure 20 – General starting logic and end timers

P0938ENa

Page 5-44 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.13

1.13.1

(OP) 5 Operation

Phase Selection (Distance option only)

Phase selection is the means by which the relay is able to identify exactly which phase are involved in the fault and allow the correct measuring zones to trip.

Operation of the distance elements, is controlled by the Superimposed Current Phase

Selector. Only elements associated with the fault type selected by the phase selector are allowed to operate during a period of two cycles following the phase selection. If no such element operates, all elements are enabled for the following 5 cycles, before the phase selector returns to its quiescent state.

Operation of an enabled distance element, during the two-cycle or 5-cycle period, causes the phase selector state to be maintained until the element resets. The one exception to this is when the phase selector decision changes while an element is operated. In this case, the selected elements are reset and the two-cycle period re-starts with the new selection.

Note Any existing trip decision is not reset under this condition. After the first cycle following a selection, the phase selector is only permitted to change to a selection involving additional phases.

On double phase-to-ground faults, only the appropriate phase-phase elements are enabled. The indication of the involvement of ground is by operation of a biased neutral current level detector.

Theory of Operation

Selection of the faulted phase(s) is performed by comparing the magnitudes of the threephase-to-phase superimposed currents. A single-phase-to-ground fault produces the same superimposed current on two of these signals and zero on the third. A phase-tophase or double phase-to-ground fault produces one signal which is larger than the other two. A three-phase fault produces three superimposed currents which are the same size.

Refer to the Phase-to-phase currents showing change for CN fault diagram to see how the change in current can be used to select the faulted phases for a CN fault.

No Change !

AB

Change !

BC

Change !

CA

1 Cycle Comparison 1 Cycle Comparison

Ground Fault,

Phase C

Figure 21 - Phase to phase currents showing change for CN fault

P1179ENa

P54x/EN OP/Nd5 Page 5-45

(OP) 5 Operation Operation of Individual Protection Functions

A superimposed current is deemed to be large enough to be included in the selection if it is greater than 80% of the largest superimposed current.

A controlled decay of the superimposed threshold ensures that the phase selector resets correctly on fault clearance.

Phase selection can only be made when any superimposed current exceeds 4% of nominal current (In) as a default value.

Under normal power system conditions, the superimposed currents are made by subtracting the phase-phase current sample taken 96 samples (2 cycles) earlier from the present sample.

When a fault is detected, resulting in a phase selection being made, the “previous” memorized sample used in the superimposed current calculation is taken from a recycled buffer of “previous” samples. This ensures that, if the fault develops to include other phases, the original selection is not lost. The re-cycling of the prefault buffers is continued until the phase selector resets, either because the fault is cleared or when the

5 cycle period has expired and no element has operated.

Under conditions on load with high levels of sub-synchronous frequencies, it is necessary to increase the

I phase selector threshold from its default (4% In) to prevent sporadic operation. This is automatically performed by the relay, which will self-adjust the threshold to prevent operation upon the noise signals, whilst still maintaining a high sensitivity to faults.

In order to facilitate testing of the Distance elements using test sets which do not provide a dynamic model to generate true fault delta conditions, a Static Test Mode setting is provided. This setting is found in the COMMISSIONING TESTS menu column. When set, this disables phase selector control and forces the relay to use a conventional (non-delta) directional line.

Page 5-46 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.14

(OP) 5 Operation

Mho Element Polarization and Expansion (Distance option only)

To ensure coverage for close-up faults, distance protection always includes a proportion of voltage memory. Therefore when each zone characteristic is determined, the phase comparator used in the zone decision will use a mix of vectors “V” (the directly measured phase/line voltage), “IZ” (a voltage constructed from the fault current and zone impedance reach setting) and “Vpol” (a polarizing voltage). The MiCOM relay allows the user to specify the composition of Vpol, deciding on how to mix the proportion of two voltage selections:

The amount of directly measured (“self”) polarizing in the mix

The amount of clean memory stored from before the fault inception

One of the additional benefits in adding memory into the polarizing mix is that mho characteristics will offer dynamic expansion in the event of a forward fault. This phenomenon is shown in the Expansion of zone 1 for the default polarizing setting Vpol=1

(Distance option only) diagram for the default setting Vpol=1, where a Zone 1 characteristic with reach Z will grow to cover 50% of Zs to cover more fault arc resistance. jx

Z

V/I-Z

V/I

R

Zs/2 Vpol/I

P1171ENb

Figure 22 - Expansion of zone 1 for the default polarizing setting Vpol=1 (Distance option only)

Key: Zs = Source impedance behind the relay location

The MiCOM relay does not allow the polarizing to be selected as entirely self polarized, or entirely memory polarized. Vpol always contains the directly measured self-polarized voltage, onto which a percentage of the pre-fault memory voltage can be added. The percentage memory addition is settable within the range 0.2 (20%) to 5 (500%).

Setting 20% means that the majority of the polarizing will be self-polarizing, with minimal mho circle expansion, and just enough memory to counteract any CVT transients. Setting

500% means that in the overall polarizing mix the ratio would be 1 part self polarizing to 5 parts memory. Such a high memory content would offer large dynamic expansion, covering 83% of the source impedance (Zs) behind the relay.

Mho expansion = [(Polarizing Setting)/(Setting + 1)] . Zs

P54x/EN OP/Nd5 Page 5-47

(OP) 5 Operation

1.14.1

1.14.2

Operation of Individual Protection Functions

This characteristic is used for Zones 1, P (optionally reversed), 2, 4 and Zone 3 if the offset is disabled.

The characteristic is generated by a phase comparison between V/ I-Z and the polarizing signal Vpol

Where:

V is the fault voltage

Vpol is a user selected mix of the fault voltage and prefault memory

I

Z is the fault current is the zone reach setting (including residual compensation

Zs for ground fault elements) is the source impedance (included in the show the position of the Vpol phasor)

Expansion of zone 1 for the default polarizing setting Vpol=1 (Distance option only) diagram to

The polarizing signal Vpol is a combination of the fault voltage and the stored vector taken from 2 cycles before the fault, which is a representation of the volts at the source.

Vpol = IZs + V

Vpol/I = Zs + V/I or

Operation occurs when the angle between the signals is greater than 90°, which is for faults inside the circle.

The validity of the voltage memory in the MiCOM relay extends to 16 cycles after loss of the VT input voltage. If no memory is available, the polarizing signal is substituted by cross polarizing from the unfaulted phase(s). For example if Vamem is unavailable, the voltages measured on phases B and C now are used, phase-shifted as necessary.

To produce the reversed zones (Zone 4 and, optionally, Zone P), the impedance Z is automatically set to a negative value.

Switch On To Fault Action for Zone 1 (Distance option only)

Operation of the distance elements is generally prevented if the polarizing signal magnitude is insufficient (less than 1V). The exception is for Zone 1, which following breaker closure is allowed to operate with a small (10%) reverse offset. This is to ensure operation when closing on to a close-up three-phase fault (Scenario: earthing/ground clamps inadvertently left in position).

In addition Z4 reverse operation is held if it operates in memory.

Other zones may have their zone time delays bypassed for SOTF/TOR, as detailed in the application notes.

Offset Mho (Distance option only)

If the Zone 3 offset is enabled then it uses no memory polarizing and has a fixed reverse offset from the origin of a distance polar diagram. Characteristic angle and residual compensation are as per the forward settings.

Page 5-48 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.15

1.15.1

1.15.2

(OP) 5 Operation

Quadrilateral Elements (Distance option only)

The quadrilateral elements are made from combinations of reactance lines, directional lines and load blinders.

A counter, similar to that used for the mho element, is incremented when all the relevant phase comparisons indicate operation. A fast up-count of 6 is issued when the fault is within 80% of the reach of the zone, and well within the resistive reach boundary.

Elsewhere, the increment is always 1 but a fast decrement (6) is used when the faulted phase current is less than half the minimum operating current setting. Therefore, an area of fast operation for faults near the characteristic angle is always available, whether mho or quadrilateral characteristics are applied.

Directional Quadrilateral (Distance option only)

This characteristic is used for Zones 1, P (optionally reversed), 2 and 4 (reversed).

It is formed from two parallel reactance lines, two parallel resistive reach blinders and controlled by the delta or conventional directional line. The bottom reactance line (not shown on in the following diagram) and the left hand reach blinder are automatically set to 25% of the reactance reach and the right hand blinder, respectively. The reactance line is arranged to operate for faults below the line, the blinders for faults within the resistive reach limits, and the delta directional line for forward faults. The counter increments when all of these conditions are satisfied. j X

Reactance

Z

Blinder

R

Directional

P1172ENb

Figure 23 - Quadrilateral characteristics (directional line shown simplified)

(Distance option only)

Offset Quadrilateral (Distance option only)

This characteristic is used for Zone 3 when the offset is enabled.

It is formed from two reactance lines and two resistive reach blinders. The upper reactance line is arranged to operate for faults below it and the lower for fault above it.

The right hand blinder is arranged to operate for faults to its left and the left hand blinder for faults to its right. The counter increments when all these conditions are satisfied.

P54x/EN OP/Nd5 Page 5-49

(OP) 5 Operation

Blinder

Operation of Individual Protection Functions

Reactance

Blinder

1.15.3

Page 5-50

Reactance

P1173ENa

Figure 24 - Offset quadrilateral for zone 3 (Distance option only)

Note When Zone 3 is set offset in simple setting mode, the left hand blinder and lower reactance line equal the offset percentage setting of the line impedance and fault resistance respectively. In the advanced setting mode, both lines can be set independently.

Reactance Line - Top Line of Quadrilateral (Distance option only)

The MiCOM relay provides a flexible user settable top reactance line tilting mode:

1. Dynamic (self adaptive) tilt angle - applicable to ground distance only

2. Fixed tilt angle - applicable to phase distance and ground distance if Dynamic tilting is disabled

V

I

- Z

Z

V

I

I

REF

I

P1174Na

Figure 25 - Reactance line - top line of quadrilateral (Distance option only)

A reactance line is formed by the phase comparison between an operating signal V/I - Z, which is the same as that used for the equivalent mho element, and a polarizing signal

Iref/I.

Where:

V

I is the fault voltage is the fault current (always presented at zero degree)

Z is the zone reach setting, including residual compensation

Iref is the negative sequence current for dynamic tilting or phase current for the fixed angle tilting that includes the initial tilt angle setting (set to -3° as default).

P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Dynamic Tilting:

When the Dynamic tilting is selected by a user, the top line of the ground distance quadrilateral characteristic will start tilting from the user settable angle

(default angle is -3°) and tilt further for the angle difference between the fault current and the negative sequence current so that an overall tilt angle with the reference to fault

(phase) current ‘I’ will be:

Tilt angle =

Iref/I = setting +

(Iph-I2)

Operation occurs when the operating signal lags the polarizing signal.

The default starting (initial) tilt angle of -3° is introduced to reduce the possibility of overreach caused by any small differences between the negative sequence source impedances, and general CT/VT angle tolerances.

Negative sequence current is used for ground fault Iref since it provides a better estimate of the current in the fault than either the faulted phase current or zero sequence current.

As a result the reactance line follows the fault resistance impedance and tilts up or down

(depending on the load direction) starting from the set initial tilt angle to avoid underreach or overreach.

These additional constraints also exist to ensure that the top line does not tilt too far:

The Zone 1 reactance (top) line can only stay at set initial tilt angle (-3° default) compared to the resistive axis, or can tilt down by

(Iph-I2) . The top line may never tilt up from set tilting angle, to ensure that Zone 1 does not overreach. This maintains grading/selectivity with downstream protection.

The Zone 2 reactance (top) line can only ever stay at set tilt angle (-3° default) compared to the resistive axis, or can tilt up by

(Iph-I2). The top line may never tilt down, to ensure that Zone 2 does not underreach. This is particularly important when Zone 2 is used to key channel-aided distance schemes.

The maximum permissible tilt is +/- 45° either side of the set initial tilt angle (-3° default)

When one circuit breaker pole is open, during a single pole reclose sequence, the polarizing signal is replaced by the fault current with a -7° phase shift, allowing the protection of the remaining phases, even though the negative sequence current is not available. The additional phase shift is provided to reduce the possibility of overreach caused by the faulted phase as the reference.

Predetermined (Fixed Angle) Tilting:

For the phase quadrilateral characteristics and ground quad characteristics in case when

Dynamic tilting is disabled, the fix angle setting settable by a user applies. Each zone has an independent tilt angle setting. The total tilting angle with the reference to fault current

‘I’ is equal to the set angle:

Tilt angle =

Iref/I = setting

Note A minus angle is used to set a downwards tilt gradient, and a positive angle to tilt upwards.

Operation occurs when the operating signal lags the polarizing signal. The setting range is +/- 30°.

P54x/EN OP/Nd5 Page 5-51

(OP) 5 Operation

1.15.4

Operation of Individual Protection Functions

Right Hand Resistive Reach Line (Distance option only)

Z

V

I

V

I

- R

R

1.16

P1175ENa

Figure 26 - Resistive reach line (load blinder) (Distance option only)

A load blinder is formed by the phase comparison between an operating signal V/ I - R and a polarizing signal Z

Where:

V is the fault voltage

I

R is the fault current is the resistive reach of the blinder

Z zone reach setting (including neutral compensation for ground distance)

Operation occurs when the operating signal leads the polarizing signal.

1.15.5 Quadrilateral Phase Resistive Reaches (Distance option only)

The resistive reach setting is used to select the resistive intercept of the quadrilaterals – the right-hand side of the zone.

Note The RPh setting applied defines the fault arc resistance that can be detected for a phase-phase fault. For such a fault, half of the fault resistance appears in the positive sequence network, and half in the negative sequence network. Therefore, as most injection test sets will plot impedance characteristics in positive sequence terms, the right-hand intercept will be found at half the setting applied (= Rph/2).

Quadrilateral Ground Resistive Reaches (Distance option only)

The resistive reach setting is used to select the resistive intercept of the quadrilaterals – the right-hand side of the zone. Note that the RG setting applied defines the fault arc resistance that can be detected for a single-phase-ground fault. For such a fault, the fault resistance appears in the out and return total fault loop, in which the line impedance is Z1 x (1 + kZN). Therefore, as most injection test sets will plot impedance characteristics in positive sequence terms, the right-hand intercept will be found at less than setting applied

( = RG/[1+kZN] ).

Page 5-52 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.17

1.17.1

1.17.2

(OP) 5 Operation

Advanced Distance Elements Zone Settings (Distance option only)

For most applications the user will configure the relay in “Simple” setting mode, whereby all zone reaches are based on the protected line impedance, scaled by a reach percentage. In such a case there is then no need to set the individual zone ohmic reaches and compensation factors, because the automatic calculation will already have determined these settings. Therefore with Simple settings, the menu column GROUP x

DISTANCE ELEMENTS will merely be a list of what settings have been automatically calculated and applied. This list is useful as a reference when commissioning and periodic injection testing.

Using the Advanced setting mode, the user has decided to set all the zones him/herself, and must complete all the reach and residual/mutual compensation settings on a per zone basis.

Note Distance zones are directionalized (where applicable) by a delta directional decision. The characteristic angle for this decision is set along with the

Delta Directional configuration, in the GROUP x DISTANCE SETUP menu column. The default setting is 60 o

.

Phase Fault Zone Settings (Distance option only)

Each zone has two additional settings that are not accessible in the Simple set mode.

These settings are:

A tilt angle on the top line of any quadrilateral set for phase faults

A minimum current sensitivity setting

By factory defaults, the Top Line of quadrilateral characteristics is not fixed as a horizontal reactance line. To account for phase angle tolerances in the line CT, VT and relay itself, the line is tilted downwards, at a “ droop ” of -3 o

. This tilt down helps to prevent zone 1 overreach.

In “ Advanced ” setting mode, the Top line tilt is settable.

The current Sensitivity setting for each zone is used to set the minimum current that must be flowing in each of the faulted phases before a trip can occur. If for example a phase

A-B line fault is present, the relay must measure both currents Ia and Ib above the minimum set sensitivity. The default setting is 7.5% In for Zones 1 and 2, 5% In for other zones, ensuring that distance element operation is not constrained, right through to an

SIR ratio of 60.

Ground Fault Zone Settings (Distance option only)

It should be noted that the Ground reach settings (Reach and Angle) are set according to the positive sequence line impedance , and so will generally be identical to the Phase reach settings.

The Top Line of ground quadrilateral characteristics is not fixed as a horizontal reactance line. To account for phase angle tolerances in the line CT, VT and relay itself, the line is tilted downwards, at a “droop” of -3 ° . This tilt down helps to prevent zone 1 overreach.

However, to further improve performance this line incorporates an additional dynamic tilt, which will change according to the phase angle between the faulted phase current and the negative sequence current:

P54x/EN OP/Nd5 Page 5-53

(OP) 5 Operation

1.17.3

Operation of Individual Protection Functions

Zone 1 is allowed to tilt down to avoid overreaching for prefault power export

Zones 2 and 3 are allowed to tilt up to avoid underreaching for prefault power import

As the tilt is dynamic, this is why ground fault elements do not have a setting for the angle.

The current Sensitivity setting for each zone is used to set the minimum current that must be flowing in the faulted phase and the neutral before a trip can occur. If for example an

A-ground fault is present, the relay must measure both currents Ia and Iresidual above the minimum set sensitivity.

The default setting is 7.5% In for Zones 1 and 2, 5% In for other zones, ensuring that distance element operation is not constrained, right through to an SIR ratio of 60.

Distance Zone Sensitivities (Distance option only)

When the Simple setting mode is selected, the minimum current sensitivity still applies, but the value is automatically calculated and applied based on the data entered into the simple settings fields. The criteria used to calculate the setting value is required to satisfy a minimum value of current flowing in the faulted loop and a requirement on the Zone reach point voltage. For Zones 3, P, and 4, the requirements are that the minimum current must be greater than 5% of rated current, and that the minimum voltage at the

Zone reach point is 0.25 V. The current equating to the reach point criteria can be expressed as 0.25/Zone reach, and the sensitivity can be expressed as:

Sensitivity (Z3, ZP, Z4) = max (5%In, (0.25/Zone reach))

For Zones 1 and 2, the sensitivity is further qualified to ensure that they are set less sensitive that the reverse Zone 4. This is designed to ensure stability of the relay where applied with either an overreaching, or a blocking scheme. For Zones 1 and 2, the same criteria as for Zones 3, P, and 4 are applied, but in addition a minimum sensitivity criterion dependent upon the Zone 4 sensitivity is applied: the sensitivity must also exceed 1.5 x

Zone 4 sensitivity. The sensitivity can be expressed as:

Sensitivity (Z1, Z2) = max (5%In, (0.25/Zone reach), (1.5 x Zone 4 sensitivity))

OR

Sensitivity (Z1, Z2) = max (5%In, (0.25/Zone reach), (1.5 x (0.25/Zone 4 reach)))

Note 1 The dependency on the Zone 4 element always applies, even if Zone 4 is disabled.

Note 2 The default reach setting for Zones 1, 2, and 4 are 80%, 120%, and 150% respectively and for these settings, the “Zone dependent” terms can be reduced to:

0.25/Zone 1 reach = 0.25/(0.8 x line impedance)

0.25/Zone 2 reach = 0.25/(1.2 x line impedance)

1.5 x (0.25/Zone 4 reach) = 0.25/line impedance

In such cases, for Zone 1, the dominant Zone reach term will be that of Zone 1 and the equation can be reduced to:

Sensitivity (Z1) = max (5%In, (0.25/(0.8 x line impedance)))

Page 5-54 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.18

1.18.1

(OP) 5 Operation

And it can be shown that for lines with an impedance less than 6.25 Ω the Zone 1 reach term will dominate and the sensitivity will be greater than 5% In. Above this line impedance the sensitivity will be 5% In.

Similarly, for Zone 2, the dominant Zone reach term will be that of Zone 4 and the equation can be reduced to:

Sensitivity (Z2) = max (5%In, (0.25/line impedance))

And it can be seen that for lines with an impedance less than 5 Ω the Zone reach term will dominate and the sensitivity will be greater than 5% In. Above this line impedance the sensitivity will be 5% In.

In Advanced mode the same restrictions as minimum sensitivity should be applied to ensure distance element accuracy.

Conventional and Capacitor VT Applications (Distance option only)

The MiCOM relay achieves fast trip times due an optimized counting strategy. For faults on angle and up to 80% of the set reach of the zone, a counter increments quickly to reach the level at which a trip is issued. Near the characteristic boundary, the count increments slower to avoid transient overreach, and to ensure boundary accuracy. This strategy is entirely sufficient where conventional wound voltage transformers are used.

Thus, where Capacitor-coupled Voltage Transformers (CVT) are not employed, the setting “ CVT Filters ” can be set to Disabled.

Where capacitor-coupled voltage transformers are employed, then for a close-up fault the transient component can be very large in relation to the fundamental component of fault voltage. The relay has setting options available to allow additional filtering to be switched-in when required, and the filter options to use depend on the likely severity of the CVT transient. The two filtering methods are explained below.

CVTs with Passive Suppression of Ferroresonance (Distance option only)

Passive suppression employs an anti-resonance design, and the resulting transient/distortion is fairly small. Sometimes such suppression is classed as a “ type 2 ”

CVT. In passive CVT applications, the affect on characteristic accuracy is generally negligible for source to line impedance ratios of less than 30 (SIR < 30). However, at high SIRs it is advisable to use the slower count strategy. This is achieved by setting

“ CVT Filters ” to “ Passive ”.

It is important to note that by enabling this filter, the relay will not be slowed unless the

SIR is above that set. If the line terminal has an SIR below the setting, the relay can still trip subcycle. It is only if the SIR is estimated higher than the setting that the instantaneous operating time will be increased by about a quarter of a power frequency cycle. The relay estimates the SIR as the ratio of nominal rated voltage Vn to the size of the comparator vector IZ (in volts):

SIR = Vn/IZ

Where:

Vn =

I =

Z =

Nominal phase to neutral voltage

Fault current

Reach setting for the zone concerned

Thus for slower counting “ I ” would need to be low, as restricted by a relatively weak infeed, and “ Z ” would need to be small as per a short line.

P54x/EN OP/Nd5 Page 5-55

(OP) 5 Operation

1.18.2

1.19

Operation of Individual Protection Functions

CVTs with Active Suppression of Ferroresonance (Distance option only)

Active suppression employs a tuned L-C circuit within the CVT. The damping of transients is not as efficient as for the passive designs, and such suppression is often termed as being a Type 1 CVT. In active CVT applications, to ensure reach point accuracy the setting CVT Filters is set to Active . The relay then varies the count strategy according to the calculated SIR (= Vn / IZ). Subcycle tripping is maintained for lower

SIRs, up to a ratio of 2, with the instantaneous operating time increasing by about a quarter of a power frequency cycle at higher SIRs.

Transients caused by voltage dips, however severe, will not have an impact on the relay’s directional measurement as the MiCOM relay uses voltage memory.

Load Blinding (Load Avoidance) (Distance option only)

Load blinders are provided for both phase and ground fault distance elements, to prevent misoperation (mal-tripping) for heavy load flow. The purpose is to configure a blinder envelope which surrounds the expected worst case load limits, and to block tripping for any impedance measured within the blinded region. Only a fault impedance which is outside of the load area will be allowed to cause a trip. The blinder characteristics are shown in the Load blinder characteristics diagram.

In the diagram:

Z denotes the Load/B Impedance setting. This sets the radius of the

• underimpedance circle.

β

denotes the Load/B Angle setting. This sets the angle of the two blinder boundary lines - the gradient of the rise or fall with respect to the resistive axis.

X

Operate

Blind

Radius

Z

Load

Blind

Blind

R

Operate

Blind

P1232ENa

Figure 27 - Load blinder characteristics

Page 5-56 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

The MiCOM relay has a facility to allow the load blinder to be bypassed any time the measured voltage for the phase in question falls below an undervoltage V< setting. Under such circumstances, the low voltage could not be explained by normal voltage excursion tolerances on-load. A fault is definitely present on the phase in question, and it is acceptable to override the blinder action and allow the distance zones to trip according to the entire zone shape. The benefit is that the resistive coverage for faults near to the relay location can be higher.

P54x/EN OP/Nd5 Page 5-57

(OP) 5 Operation

1.20

Operation of Individual Protection Functions

Distance Elements Basic Scheme Setting (Distance option only)

Configuration of which zones will trip, and the zone time delays is set in the menu column

GROUP x SCHEME LOGIC (where x is the setting group). Phase and ground elements may have different time delays if required. Operation of distance zones according to their set time delays is termed the Basic Scheme , and is shown in the Basic scheme delayed trip diagram. The basic scheme always runs, regardless of any channel-aided acceleration schemes which may be enabled (see later).

Ground Elements

DDB Zone x Gnd Scheme Block

SET Zone x Gnd Scheme Enabled

DDB Zone x Trip

DDB Zone x Trip A

1

DDB Zone x Trip B

DDB Zone x AN

&

DDB Zone x BN &

1

DDB Zone x Trip C

DDB Zone x CN

DDB Zone x Trip N

&

DDB Zone x Start A

1

DDB Zone x Start B

Phase Elements

DDB Zone x Phs Scheme Block

SET Zone x Phs Scheme Enabled

1

1

1

DDB Zone x Start C

DDB Zone x Start N

DDB Zone x AB

DDB Zone x BC

DDB Zone x CA

&

&

&

P1539ENa

Figure 28 - Basic scheme delayed trip (Distance option only)

Signal

Zone x Ground Block

Zone x Phase Block

Zone x AN

Zone x BN

Zone x CN

Zone x AB

Zone x BC

Zone x CA

Zone x Trip

Zone x Trip A

Zone x Trip B

Zone x Trip C

Zone x Trip N

Zone x Start A

Zone x Start B

Zone x Start C

Zone x Start N

612

741

742

743

744

962

963

964

965

608

609

610

611

Zone 1

384

385

960

961

617

745

746

747

748

968

969

970

971

613

614

615

616

Zone 2

386

387

966

967

622

749

750

751

752

974

975

976

977

618

619

620

621

Zone 3

388

389

972

973

627

753

754

755

756

980

981

982

983

623

624

625

626

Zone P

390

391

978

979

632

757

758

759

760

986

987

988

989

628

629

630

631

Zone 4

392

393

984

985

Page 5-58 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.21

1.21.1

(OP) 5 Operation

Note The numbers in the table represent the DDB signals available in the PSL.

Table 1 - Basic scheme delayed trip (Distance option only)

Power Swing Detection, Alarming and Blocking (Distance option only)

Detection of Power Swings (Distance option only)

A power swing may cause the impedance presented to a distance relay to move away from the normal load area and into one or more of its tripping characteristics. In the case of a stable power swing it is important that the relay should not trip. The relay should also not trip during loss of stability since there may be a utility strategy for controlled system break up during such an event.

The power swing detection in the MiCOM relay is an advanced technique that uses superimposed current (

I) detector similar to the phase selection principle described above. However for the power swing detector the current is always compared to that 2 cycles previous. For a fault condition this power swing detector (PSD) will reset after 2 cycles as no superimposed current is detected.

For a power swing, PSD will measure superimposed current for longer than 2 cycles, and it is the length of time for which the superimposed current persists that is used to distinguish between a fault and a power swing. A power swing is deemed to be in progress if a three-phase selection, or a phase to phase selection when one pole is open, produced in this way is retained for more than 3 cycles, as shown in the following diagram. At this point the required distance zones can be blocked, to avoid tripping should the swing impedances cross into a tripping zone.

Power swing

Fault

3 cycles

PH1

PSB active & minimum threshold increased

PSB removed including

3ph faults

PH2

P1181ENa

Figure 29 - Power swing detected for 3 cycles continuous

I (Distance option only)

P54x/EN OP/Nd5 Page 5-59

(OP) 5 Operation

1.21.2

1.21.3

1.21.4

Operation of Individual Protection Functions

To detect slow power swings, when the superimposed current remains below the minimum threshold (5%In), a complementary method of detection could be used. This method requires zone 5 to be set. For the zone 5 setting, no system study is required, it is only necessary to set the R5 and R5’ reach below the minimum possible load impedance, as explained in the Application Notes chapter. If the fault impedance remains within a zone 5 for at least 1 cycle without phase selection operation, the slow swing is declared.

This complementary method works in parallel to the automatic, setting free technique explained above.

Note Zone 5 has a dual purpose: OST protection and slow swing detection.

There is no conflict in zone 5 settings, i.e. zone 5 settings for OST protection (if applied) perfectly suit slow swing detection.

Actions upon Power Swing Detection (Distance option only)

Once a power swing is detected, the following actions occur:

Distance elements are blocked on selected zones providing blocking is enabled

All zones are switched to self polarized mho characteristics for maximum stability during the swing

A power swing block alarm is issued when the swing impedance enters a distance zone. The condition of entering an impedance zone avoids alarming for low current momentary swings that settle quickly

When a power swing is in progress, the minimum threshold used by the phase selector is increased to twice the maximum superimposed current prevailing in the swing. Therefore, the phase selector resets once a power swing is detected. It can then be used to detect a fault during a power swing.

Detection of a Fault during a Power Swing (Distance option only)

A fault is detected during a swing when the phase selector operates, based on its increased threshold. Therefore, any operation of the phase selector will cause PSB unblocking, and allow a trip. Example scenarios are:

A fault causes the delta current measured to increase above twice that stored during the swing (a step change in delta I rather than the expected gradual transition in a power swing).

Actions Upon Detection of a Fault during a Power Swing (Distance option only)

The block signal is only removed from zones that start within 2 cycles of a fault being detected. This improves stability for external faults during power swings. Any measuring zone that was detecting an impedance within its characteristic before The phase selector detected the fault will remain blocked. This minimizes the risk of tripping for a swing impedance that may naturally be passing through Zone 1, and could otherwise cause a spurious trip if all zones were unblocked on fault inception. Any measuring zone that picks up beyond the two cycle window will remain blocked. This minimizes the risk of tripping for a continued swing that may pass through Zone 1, and could otherwise cause a spurious trip if all zones were allowed to unblock together.

Page 5-60 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.21.5

(OP) 5 Operation

Power Swing Settings (Distance option only)

The power swing detection is setting free aided with slow swing detection that uses zone

5 and does not require any system study. The only setting available to a user, apart from zone 5, is to decide whether a zone should be blocked or allowed to trip after a power swing is detected. Zone by zone, it is possible to select one mode from the following:

Allow Trip should a power swing locus remain within a trip zone characteristic for a duration equal to the zone time delay, the trip will be allowed to happen

Blocking to keep stability for that zone, even if a power swing locus should enter it

Delayed Unblock maintains the block for a set duration. If the swing is still present after the PSB Timeout Set window has expired, tripping is allowed as normal

Other setting possibilities are:

Selection of PSB as “Indication” only will raise an alarm, without blocking any zones

The PSB Unblock Dly function allows for any power swing block to be removed

• after a set period of time. For a persistent swing that does not stabilize, any blocked zones will be made free to trip once the timer has elapsed. In setting which relays will unblock, the user should consider which relay locations are natural split points for islanding the power system.

The PSB Reset Delay is a time delay on drop-off timer, which maintains the PSB detection even after the swing has apparently stabilized. It is used to ensure that where the swing current passes through a natural minimum and delta I detection might reset, that the detection does not drop out/chatter. It can therefore be used to ensure a continual Power Swing indication when pole slipping (an unstable out of step condition) is in progress.

The following is a simplified logic diagram showing operation of the power swing blocking.

I Pickup

Any Distance

Start

&

3 Cycles t

0

0

PSB

Reset

Delay t

PSB Timeout t

0

&

Blocking of selected distance zones

Fault during swing logic

P1654ENa

Figure 30 - Power swing blocking (Distance option only)

P54x/EN OP/Nd5 Page 5-61

(OP) 5 Operation

1.22

1.22.1

1.22.1.1

Operation of Individual Protection Functions

Out-of-Step Detection and Tripping (Distance option only)

Out of Step protection is used to split the power system into possibly stable areas of generation and load balance during unstable power oscillations. The points at which the system should be split are determined by detailed system stability studies.

The Out-of-Step function has four different setting options:

Option 1 - Disabled

Option 2 - Predictive OST

Option 3 - OST

Option 4 - Predictive OST or OST

When set ‘ Disabled ’, Out of Step function is not operational. The MiCOM relay also provides an option to split the system in advance by selecting the ‘ Predictive OST ’

(sometimes called an early OST) in order to minimize the angle shift between two ends and aid stability in the split areas. The third setting option is to split the system on detection of the out of step condition i.e. when a pole slip occurs. The fourth option is a combination of the two.

Out of Step Detection (Distance option only)

The Out of Step detection is based on the well proven

∆Z/∆t principle associated with two concentric polygon characteristic, as presented in the Out of step detection characteristic diagram.

Characteristic (Distance option only)

Both polygon characteristics are independent and have independent settings for their respective reactance and resistive reaches.

+jX

Z6

Z5

Predictive Out of step trip

ZL

Out of step trip

R6' R5'

α

R5 R6

Recoverable swing

R

Page 5-62

Z5'

Z6'

Figure 31 - Out-of-step detection characteristic (Distance option only)

P1978ENa

P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.22.1.2

(OP) 5 Operation

Note Both the inner (Zone 5) and outer (Zone 6) characteristics, as shown above, are settable in positive sequence impedance terms to ensure correct Out of

Step detection during open pole swing conditions. Hence, there is only one

Z5 and Z6 positive sequence impedance polygon characteristic instead of six characteristics for each measured loop.

The measured positive sequence impedance is calculated as:

Z1 = V1/I1

Where V1 and I1 are positive sequence voltage and current derived from the measured phase quantities.

Note During symmetrical power oscillations, there is no difference between phase impedance loops and positive sequence impedance loop, whilst for the open pole oscillations the phase and positive sequence impedances are different. This fact must be taken into account during testing/commissioning.

All four resistive blinders are parallel, using the common angle setting ‘

α

’ that corresponds to the angle of the total system impedance ZT (= ZS + ZL + ZR), where ZS and ZR are equivalent positive sequence impedances at the sending and receiving ends and ZL positive sequence line impedance. Tilting of the reactance line and residual compensation is not implemented.

In the Out of step detection characteristic diagram, the solid impedance trajectory represents the locus for the non-recoverable power oscillation, also known as pole slip or out of step condition. The dotted impedance trajectory on the other hand represents a recoverable power oscillation, usually called swings.

Operating Principle (Distance option only)

The Out-of-Step detection algorithm is based on measuring the speed of positive sequence impedance passing through the set

∆Z region. As soon as measured positive sequence impedance touches the outer polygon, a timer is started.

If the disturbance takes less than 25ms from entering zone 6 to entering zone 5, the relay will consider this to be a power system fault and not an out of step trip condition. The timer of 25ms is a fixed timer in the logic and not user accessible. During a power system fault, the speed of impedance change from a load to a fault is fast, but the relay may operate slower for marginal faults close to a zone boundary, particularly for high resistive faults inside the zone operating characteristic and close to the Z5 boundary. Therefore, the fixed time of 25ms is implemented to provide sufficient time for a distance element to operate and therefore to distinguish between a fault and an extremely fast power system oscillation.

If the disturbance takes more than 25ms but less than DeltaT set time from entering Zone

6 to entering Zone 5, this will be seen as a very fast oscillation. Therefore, the relay will trip if setting option 2 or 4 was selected. The minimum DeltaT setting is 30ms, allowing

5ms margin to the fixed 25ms timer.

If the disturbance takes longer than the DeltaT setting time to enter Zone 5 after entering

Zone 6 then it is considered as a slow power oscillation. Upon entering Z5, the relay will record the polarity of the resistive part of the positive sequence impedance. Two scenarios are possible:

If the resistive part of the positive sequence impedance leaves Z5 with the same polarity as previously recorded on entering Zone 5, it is deemed a recoverable swing. No tripping will be issued.

P54x/EN OP/Nd5 Page 5-63

(OP) 5 Operation Operation of Individual Protection Functions

Z-5 start

Z-6 start

&

&

If the resistive part of the positive sequence impedance has the opposite polarity when exiting Zone 5 to that of the recorded polarity on Zone 5 entering, an Out of

Step condition is recognized, followed by the tripping if setting option 3 or 4 was selected. It should be noted that in the case when the DeltaT timer did not expire and setting option 3 is selected, the Out of Step condition will also be detected, followed by OST operation.

As the tripping mode for the detected Out of Step condition is always 3ph trip, the

‘ Predictive OST ’ and OST DDB signals are mapped to the 3ph tripping in the default

PSL. Also, Out of Step operation will block auto-reclose function. The Out of Step tripping time delay TOST is also available to delay the OST tripping command until the angle between internal voltages between two ends are at 240 deg closing towards 360 deg. This is to limit the voltage stress across the circuit breaker. In the case of a fault occurring during the swing condition, the out of step tripping function will be blocked.

The Out of Step algorithm is completely independent from the distance elements and setting free power swing detection function. The load blinder does not have any effect on the OST characteristics. For the Out of Step operation, the minimum positive sequence current of 5%In must be present.

The Out of Step algorithm is given in this diagram.

Fault detected

&

Fault timer

25ms

O

Delta timer t

O

&

&

Predictive OST

(DDB 551)

>1 t tost

O

Out of step setting

Disabled

Predictive

OST

OST or

Predictive OST

>1

>1

OST

&

&

Record R1

Polarity

Z-6 start

Note: R1 is measured resistive component of positive sequence impedance

Figure 32 - Out of step algorithm (Distance option only)

&

R1 polarity reversed

&

>1

OST

(DDB 553)

&

Reset times

& DDB’s

P1660ENb

Page 5-64 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.23

(OP) 5 Operation

Switch On To Fault (SOTF) and Trip On Reclose (TOR) (Distance

Option only)

The settings for SOTF and TOR are included in the menu column “ TRIP ON CLOSE ”

(TOC) within the MiCOM relay. The settings are designed to deal with two different scenarios.

SOTF is designed to provide instantaneous operation of selected elements for a fault present on manual closure of the circuit breaker

TOR is designed to provide instantaneous operation of selected elements for a persistent fault present on auto-reclosing of the circuit breaker

The SOTF and TOR functions are communally termed “ Trip on Close ” logic. The operation of these features is split into two Figures for clarity:

The Trip on close diagram shows Trip On Close function in relation with the Distance zones whilst the Trip on close based on CNV level detectors diagram presents Trip On

Close driven by ‘ Current No Volt ’ level detectors. Both methods operate in parallel if mapped to the SOTF and TOR Tripping matrix in the setting file.

The ’ Current No Volt ’ (CNV) level detectors are user settable in the ‘ GROUP X CB FAIL

& P. Dead ’ column. The same setting is used for pole dead logic detection - see Settings

Section for more details. The 20ms time delay in the Trip on close based on CNV level detectors diagram is to avoid a possible race between very fast overvoltage and undercurrent level detectors.

P54x/EN OP/Nd5 Page 5-65

(OP) 5 Operation

SET: TOR_En

DDB: TOR Inhibit (485)

DDB: Any PD (891)

Operation of Individual Protection Functions

Pick-up =

TOC Delay

Drop-off = tTOC

Reset Dly

DDB: TOR_Active (878)

DDB: TOR_Active (877)

DDB: SOTF Inhibit (486)

DDB: All PD (890)

Pick-up = tSOFT

Enable Dly

DDB: SOTF_Active (879)

SET: SOTF:En

SET: SOTF (488)

DDB: TOR Active (878)

DDB: Zone 1 (960 to 965)

SET: TOR_Z1_En

DDB: Zone 2 (966 to 971)

SET: TOR_Z2_En

DDB: Zone 3 (972 to 977)

SET: TOR_Z3_En

DDB: Zone 4 (984 to 989)

SET: TOR_Z4_En

DDB: Zone P (978 to 983)

SET: TOR_ZP_En

DDB: SOTF_Active (879)

DDB: Zone 1 (960 to 965)

SET: SOTF_Z1_En

DDB: Zone 2 (966 to 971)

SET: SOTF_Z2_En

DDB: Zone 3 (972 to 977)

SET: SOTF_Z3_En

DDB: Zone 4 (984 to 989)

SET: SOTF Z4 En

DDB: ZoneP (978 to 983)

SET: SOTF_ZP_En

Figure 33 - Trip on close (Distance option only)

Pulse = tSOTF TIME

DDB: Trip_TOR_Z1 (704)

DDB: Trip_TOR_Z2 (705)

DDB: Trip_TOR_Z3 (706)

DDB: Trip_TOR_Z4 (707)

DDB: Trip_TOR_ZP (708)

DDB: Trip_SOTF_Z1 (709)

DDB: Trip_SOTF_Z2 (710)

DDB: Trip_SOTF_Z3 (711)

DDB: Trip_SOTF_Z4 (712)

DDB: Trip_SOTF_Z5 (713)

P4039ENb

Page 5-66 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.23.1

(OP) 5 Operation

DDB:QuarterCycleOV PhA (559)

DDB:Phase_A_Undercurrent (864)

DDB:QuarterCycleOV PhB (560)

DDB:Phase_B_Undercurrent (865)

DDB:Phase_C_Undercurrent (866)

DDB:QuarterCycleOV PhC (561)

&

&

&

|

20ms

0

DDB:CNV Active(556)

DDB:CNV Active (556)

DDB:TOR Active (878)

SET:TOR Tripping - >

Current No Volts

& DDB:CNV TOR Trip (557)

DDB:CNV Active (556)

DDB:SOTF Active (879)

&

DDB:CNV SOTF Trip (558)

SET:SOTF Tripping - >

Current No Volts P2046ENc

Figure 34 - Trip on close based on CNV level detectors (Distance option only)

Switch On To Fault (SOTF) Mode

The settings applied are as follows:

SOTF Status SOTF can be activated in three different manners:

1. Enabled by using pole dead logic detection logic. A ‘SOTF Delay’ timer starts if “all pole dead” condition is detected. Once this timer expires, SOTF becomes enabled and remains active during the period set on “TOC Reset Delay” setting.

2. Enabled by an external pulse. SOTF becomes enabled after an external pulse (as a circuit breaker close command for example) linked to DDB “Set SOTF” (DDB

488) is ON. The function remains active for the duration of the “SOTF Pulse” setting.

3. Enabled by using the two previous methods.

With this feature Enabled , the relay operates in Switch on to Fault mode. Three pole instantaneous tripping (and auto-reclose blocking) occurs for any fault detected by the selected zones or/and ‘ Current No Volt ’ level detectors when in

Switch on to Fault mode. Whether this feature is enabled or disabled, the normal time delayed elements or aided channel scheme continues to function and can operate to trip the circuit.

TOC Reset Delay The SOTF (when enabled by pole dead detection logic) and TOR features remain in-service for the duration of the TOC reset delay once the circuit is energized.

SOTF Tripping Link While the Switch on to Fault Mode is active. The MiCOM relay will trip instantaneously for pick up of any zone selected in these links.

To operate for faults on the entire circuit length it is recommended that at least Zone 1 and Zone 2 are selected. If no elements are selected then the normal time delayed elements and aided scheme provide the protection.

P54x/EN OP/Nd5 Page 5-67

(OP) 5 Operation

1.23.2

1.23.3

Operation of Individual Protection Functions

Trip On Reclose (TOR) Mode (Distance option only)

The settings applied are as follows:

TOR Status With this feature Enabled, for a period following circuit breaker closure, the relay operates in Trip on Re-close mode. Three pole instantaneous tripping occurs for any fault detected by the selected zones or/and ‘ Current No

Volt ’ level detectors. Whether this feature is enabled or disabled, the normal time delayed elements or aided channel scheme continue to unction and can operate to trip the circuit.

TOC Reset Delay The SOTF and TOR features remain in-service for the duration of the TOC reset delay once the circuit is energized.

TOC Delay Is a user settable time delay that starts upon opening the CB after which the ‘ TOR ’ becomes active (enabled). The time delay must not exceed the minimum Dead Time setting as both times start simultaneously and TOR protection must be ready by the time of CB closing on potentially persistent faults.

TOR Tripping Links While the Trip on Re-close Mode is active, the MiCOM relay will trip instantaneously for pick up of or/and ‘ Current No Volt ’ level detectors any zone selected in these links. To operate for faults on the entire circuit length it is recommended that at least Zone 1 and

Zone 2 are selected. If no elements are selected then the normal time delayed elements and aided scheme provide the protection.

Polarization During Circuit Energization (Distance option only)

While the Switch on to Fault and Trip on Re-close modes are active, the directionalized distance elements are partially cross polarized from other phases. The same proportion of healthy phase to faulted phase voltage as given by the Distance Polarizing setting in the DISTANCE SETUP menu is used.

Partial cross polarization is thus used in substitute for the normal memory polarizing, for the duration of the TOC window. If insufficient polarizing voltage is available, a slight reverse offset (10% of the forward reach) is included in the zone 1 characteristic to enable fast clearance of close up three phase faults.

Therefore, the mapping of CNV function to the SOTF tripping matrix is not essential.

Page 5-68 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

1.24

1.24.1

P54x/EN OP/Nd5

Directional Function - Setup DEF and Directional Comparison

Elements (Distance Option only)

The MiCOM P54x with distance option installed has one additional aided channel (“pilot”) scheme that can be used to supplement differential and distance protection.

DEF Directional earth (ground) fault protection

Delta

I and

V based directional comparison scheme

Both schemes are configured as unit protection, with a communication channel connected between the remote line ends.

In order to make use of these schemes, base setting data must be made in the GROUP x

DISTANCE SETUP (for Delta comparison scheme) and GROUP x/ AIDED DEF (For

Directional earth fault protection)

DEF Zero Sequence Polarization with “Virtual Current Polarizing” (Distance option only)

With earth fault protection, the polarizing (directional reference) signal requires to be representative of the earth fault condition. As residual voltage is generated during earth fault conditions, this quantity is commonly used to polarize the directional decision of DEF elements. The relay internally derives this voltage from the 3-phase voltage input which must be supplied from either a 5-limb or three single-phase VTs. These types of VT design allow the passage of residual flux and consequently permit the relay to derive the required residual voltage. In addition, the primary star point of the VT must be earthed. A three-limb VT has no path for residual flux and, is therefore unsuitable to supply the relay.

It is possible that small levels of residual voltage will be present under normal system conditions due to system imbalances, VT inaccuracies, relay tolerances etc. Hence, the relay includes a user settable threshold (DEF VNPol Set) which must be exceeded in order for the DEF function to be operational. Note that residual voltage is nominally 180

° out of phase with residual current. Consequently, the DEF relays are polarized from the

'-Vres' quantity. This 180

°

phase shift is automatically introduced within the relay.

A distinct advantage is that the MiCOM relay can trip by this method of polarizing, even if

VNpol is less than the set threshold. Provided that the superimposed current phase selector has identified the faulted phase (suppose phase A), it will remove that phase from the residual calculation Va + Vb + Vc, leaving only Vb + Vc. The resultant polarizing voltage will have a large magnitude, and will be in the same direction as –Vres. This allows the relay to be applied even where very solid earthing behind the relay prevents residual voltage from being developed.

This technique of subtracting the faulted phase is given the description “virtual current polarizing” as it removes the need to use current polarizing from a CT in a transformer star (wye)-ground connection behind the relay. This would have been necessary with traditional relays.

The directional criteria with zero sequence (virtual current) polarization are given below:

Directional forward -90

°

< (angle(IN) - angle(VNpol+180

°

) - RCA) < 90

°

Directional reverse -90

°

> (angle(IN) - angle(VNpol+180

°

) - RCA) > 90

°

Where VNpol is as per the table below:

Phase selector pickup VNpol

A Phase Fault

B Phase Fault

C Phase Fault

No Selection

VB + VC

VA + VC

VA + VB

VN = VA + VB + VC

Page 5-69

(OP) 5 Operation

1.24.2

1.24.3

Operation of Individual Protection Functions

Table 2 - Phase selector pickup and VNpol

DEF Negative Sequence Polarization (Distance option only)

In certain applications, the use of residual voltage polarization of DEF may either be not possible to achieve, or problematic. An example of the former case would be where a suitable type of VT was unavailable, for example if only a three-limb VT was fitted. An example of the latter case would be an HV/EHV parallel line application where problems with zero sequence mutual coupling may exist.

In either of these situations, the problem may be solved by the use of Negative Phase

Sequence (NPS) quantities for polarization. This method determines the fault direction by comparison of NPS voltage with NPS current. The operate quantity, however, is still residual current. It requires a suitable voltage and current threshold to be set in cells DEF

V2pol Set and DEF I2pol Set , respectively.

The directional criteria with negative sequence polarization are given below:

Directional forward -90 o

< (angle(I2) - angle(V2+180 o

) - RCA) < 90 o

Directional reverse -90 o

> (angle(I2) - angle(V2+180 o

) - RCA) > 90 o

Delta Directional Comparison Principle and Setup (Distance option only)

Delta directional comparison looks at the relative phase angle of the superimposed current

I compared to the superimposed voltage

V, at the instant of fault inception. The delta is only present when a fault occurs and a step change from the prefault steady-state load is generated by the fault itself. The element will issue a forward or reverse decision, which can be used to input into an aided channel unit protection scheme.

Under healthy network conditions, the system voltage will be close to Vn nominal, and load current will be flowing. Under such steady-state conditions, if the voltage measured on each phase now is compared with a stored memory from exactly two power system cycles previously (equal to 96 samples), the difference between them will be zero. Zero change equals zero “delta” (

V = 0). The same will be generally true for the current

(

I = 0), except when there are changes in load current etc.

When a fault occurs on the system, the delta changes measured will be:

V =

I = fault voltage (time “t”) prefault healthy voltage (t-96 samples) fault current (time “t”) prefault load current (t-96 samples)

The delta measurements are a vector difference, resulting in a delta magnitude and angle. Under healthy system conditions, the prefault values will be those measured 2 cycles earlier, but when a fault is detected, the prefault values will be retained for the duration of the fault.

The changes in magnitude are used to detect the presence of the fault, and the angles are used to determine whether the fault is in the Forward or Reverse direction.

Consider a single-phase to ground fault as shown in the Sequence networks connection for an internal A-N fault diagram below.

Page 5-70 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

P54x/EN OP/Nd5

Figure 35 - Sequence networks connection for an internal A-N fault (Distance option only)

The fault is shown near to the busbar at end R of the line, and results in a connection of the positive, negative, and zero sequence networks in series. Drawing the delta diagram, it is seen that any fault is effectively a generator of

, connected at the location of fault inception. The characteristics are:

1. The

I generated by the fault is equal to the total fault arc current;

2. The

I will split into parallel paths, with part contribution from source “S”, and part from remote end “R” of the line. Therefore, each relay will measure a lower proportion of delta I;

3. The

V generated by the fault is equal to the fault arc voltage minus the prefault voltage (and so will be in antiphase with the prefault voltage);

4. The

V will generally be smaller as measured at the relay location, due to the voltage collapse being smaller near to the source than at the fault itself. The delta

V measured by a relay is effectively the voltage drop across the source impedance behind the relay location.

If a fault were to occur at any point on the protected line, the resulting

I and

V as measured at the relay location must be greater than the Delta I Fwd and Delta V Fwd settings, in order that the fault can be detected. (Scenarios (2) and (4) above must be verified for all fault types: Ph-G, Ph-Ph, Ph-Ph-G, and 3-phase).

Page 5-71

(OP) 5 Operation

1.24.4

Operation of Individual Protection Functions

Delta Directional Decision (Distance option only)

On fault inception, delta quantities are generated, and it is then simple for the relay to determine the direction of the fault:

Forward fault Delta V is a decrease in voltage, and so is in the negative sense; whereas delta I is a forward current flow and so is in the positive sense. Where delta I and delta V are approximately in antiphase, the fault is forward.

The exact angle relationship for the forward fault is:

V /

I = - (Source impedance, Zs)

Reverse fault Delta V is a decrease in voltage, and so is in the negative sense; delta I is an outfeed flowing in the reverse direction, so that too is in the negative sense. Where delta I and delta V are approximately in phase, the fault is reverse.

The exact angle relationship for the reverse fault is:

V /

I = (Remote Source impedance Zs’ + ZL)

Where ZL is protected line impedance and Zs’ source impedance behind the relay.

An RCA angle setting in the relay allows the user to set the center of the directional characteristic, according to the amount the current will nominally lag the reference delta voltage. The characteristic boundary will then be

±

90 degrees either side of the set center.

The directional criteria for delta directional decisions are given below:

Directional forward -90 o

< (angle(

I) – angle(

V+180 o

) – RCA) < 90 o

Directional reverse -90 o

> (angle(

I) – angle(

V+180 o

) – RCA) > 90 o

In order to facilitate testing of the Distance elements using test sets which do not provide a dynamic model to generate true fault delta conditions, a Static Test Mode setting is provided. This setting is found in the COMMISSIONING TESTS menu column. When set, this disables phase selector control and forces the relay to use a conventional (non-delta) directional line.

Page 5-72 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.25

(OP) 5 Operation

Channel Aided Schemes (Distance option only)

The MiCOM relay offers two sets of aided channel (“pilot”) schemes, which may be operated in parallel.

Aided Scheme 1

Aided Scheme 2

May be keyed by distance and/or DEF and/or delta directional comparison

May be keyed by distance and/or DEF and/or delta directional comparison

The provision of two discrete channel selections would allow the following to be implemented, as an example:

Distance POR with DEF POR scheme operating over a common shared channel…

Select both in AIDED SCHEME 1 only, with AIDED SCHEME 2 Disabled.

Distance PUR with DEF BLOCKING operating over separate channels due to the dissimilar scheme types. Assign Distance to AIDED SCHEME 1, and DEF to

AIDED SCHEME 2.

Directional Comparison BLOCKING scheme with a second channel for a distance with DEF BLOCKING scheme operating in unison… Assign Delta to AIDED

SCHEME 1, and both Distance/DEF to AIDED SCHEME 2.

Note Where schemes share a common channel, the signal send and signal receive logic operates in a logical “OR” mode.

Aided Scheme 1 and Aided Scheme 2 are two instances of the same logic. Each of these schemes provides the same options and can be independently applied. The scheme logic is split into three sections defined in the following diagram: send logic, receive logic, and aided tripping logic, as shown in the Aided scheme logic overview diagram. Detailed scheme descriptions follow later. As there are two instances of the aided scheme, any internal logic signals which are specific to the instance of the scheme are shown in the diagrams with two DDB numbers relating to the first and second instance, respectively.

P54x/EN OP/Nd5

Figure 36 - Aided scheme logic overview (Distance option only)

Page 5-73

(OP) 5 Operation Operation of Individual Protection Functions

The full Logic Diagrams of the Send, Receive and Aided Trip Logic are now attached here, for reference. It is not necessary to understand the entire logic in order to apply any scheme, as in later sections abbreviated scheme diagrams are available.

Figure 37 - Send logic (Distance option only)

Page 5-74 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Figure 38 - Receive logic (Distance option only)

Figure 39 - Aided tripping logic

P54x/EN OP/Nd5 Page 5-75

(OP) 5 Operation

1.25.1

Operation of Individual Protection Functions

Distance Scheme PUR - Permissive Underreach Transfer Trip (Distance option only)

To provide fast fault clearance for all faults, both transient and permanent, along the length of the protected circuit, it is necessary to use a signal aided tripping scheme. The simplest of these is the Permissive UnderReach (PUR) protection scheme. The channel for a PUR scheme is keyed by operation of the underreaching zone 1 elements of the relay. If the remote relay has detected a forward fault upon receipt of this signal, the relay will operate with no additional delay. Faults in the last 20% (Note 1) of the protected line are therefore cleared with no intentional time delay.

Note 1 Assuming a 20% typical “end-zone” when Zone 1 is set to 80% of the protected line.

Some of the main features/requirements for a permissive underreaching scheme are:

Only a simplex signaling channel is required

The scheme has a high degree of security since the signaling channel is only keyed for faults within the protected line

If the remote terminal of a line is open then faults in the remote 20% of the line will be cleared via the zone 2 time delay of the local relay

If there is a weak or zero infeed from the remote line end, (i.e. current below the relay sensitivity), then faults in the remote 20% of the line will be cleared via the zone 2 time delay of the local relay

If the signaling channel fails, Basic distance scheme tripping will be available

The Permissive underreach transfer trip scheme (PUR) diagram shows the simplified scheme logic.

Send logic: Zone 1

Permissive trip logic: Zone 2 plus Channel Received

Page 5-76 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Zone 3

Zone 2

A

Zone 1

Z

Z

Zone 1

B

Zone 2

Zone 3

CRx

CTx

CRx

CTx

Z1

&

TZ1

&

TZ1

Z1

1

Trip A

Trip B

1

Zp

Z2

TZp

TZ2

TZp

TZ2

TZ3

Zp

Z2

Z3

Z4

TZ3

Z3

Z4

TZ4

TZ4

Optional features of scheme

P1145ENb

Figure 40 - Permissive underreach transfer trip scheme (PUR) (Distance option only)

Detailed logic is shown in in the following PUR (Distance option only) diagram:

DDB: CRx (494,508) DDB: Aided Trip En (501,517)

&

100ms

SET: PUR Selected

P1586ENb

Figure 41 - PUR (Distance option only)

P54x/EN OP/Nd5 Page 5-77

(OP) 5 Operation

1.25.2

Operation of Individual Protection Functions

Distance Scheme POR - Permissive Overreach Transfer Trip (Distance option only)

The channel for a POR scheme is keyed by operation of the overreaching zone 2 elements of the relay. If the remote relay has detected a forward fault upon receipt of this signal, the relay will operate with no additional delay. Faults in the last 20% (Note 1) of the protected line are therefore cleared with no intentional time delay.

Note 1 Assuming a 20% typical “end-zone” when Zone 1 is set to 80% of the protected line.

Listed below are some of the main features/requirements for a permissive overreaching scheme:

The scheme requires a duplex signaling channel to prevent possible relay maloperation due to spurious keying of the signaling equipment. This is necessary due to the fact that the signaling channel is keyed for faults external to the protected line.

The POR scheme may be more advantageous than permissive underreach schemes for the protection of short transmission lines, since the resistive coverage of the Zone 2 elements may be greater than that of the Zone 1 elements.

Current reversal guard logic is used to prevent healthy line protection maloperation for the high speed current reversals experienced in double circuit lines, caused by sequential opening of circuit breakers.

If the signaling channel fails, Basic distance scheme tripping will be available.

Note The POR scheme also uses the reverse looking zone 4 of the relay as a reverse fault detector. This is used in the current reversal logic and in the optional weak infeed echo feature, shown dotted in the Permissive

overreach transfer trip scheme (POR) diagram.

Send logic: Zone 2

Permissive trip logic: Zone 2 plus Channel Received

Page 5-78 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

P54x/EN OP/Nd5

Figure 42 - Permissive overreach transfer trip scheme (POR) (Distance option only)

Detailed logic is shown in the following POR Permissive OverReach diagram:

Note The DDB Any Trip (522) feeds into a 100 ms delay on drop-off timer, which in turn leads to signal sending. This is a principle similar to the logic which results in a signal send for weak infeed and breaker open echoing.

Page 5-79

(OP) 5 Operation Operation of Individual Protection Functions

Figure 43 - POR Permissive OverReach

Page 5-80 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.25.3

1.25.4

(OP) 5 Operation

Permissive Overreach Trip Reinforcement (Distance option only)

The send logic in the POR scheme is done in such a way that for any trip command at the local end, the relay sends a channel signal to the remote end(s) in order to maximize the chances for the fault to be isolated at all ends. It should be noted that the send signal that is generated by the ‘Any trip’ command is sent on both channels, Ch1 and Ch2, if more then one channel is in use. This feature is termed permissive trip reinforcement, and is a deliberate attempt to ensure that synchronous tripping occurs at all line ends.

Permissive Overreach Scheme Weak Infeed Features (Distance option only)

Weak infeed logic can be enabled to run in parallel with the POR schemes. Two options are available: WI Echo, and WI Tripping.

Note Special stub-end transformer Weak Infeed is covered in the Frequency

Protection section.

Weak Infeed Echo For permissive schemes, a signal would only be sent if the required signal send zone were to detect a fault. However, the fault current infeed at one line end may be so low as to be insufficient to operate any distance zones, and risks a failure to send the signal.

Also, if one circuit breaker had already been left open, the current infeed would be zero. These are termed weak infeed conditions, and may result in slow fault clearance at the strong infeed line end

(tripping after time tZ2). To avoid this slow tripping, the weak infeed relay can be set to “echo” back any channel received to the strong infeed relay (i.e. to immediately send a signal once a signal has been received). This allows the strong infeed relay to trip instantaneously in its permissive trip zone.

The additional signal send logic is:

Echo Send No Distance Zone Operation, plus Channel Received.

Weak Infeed Tripping Weak infeed echo logic ensures an aided trip at the strong infeed terminal but not at the weak infeed. The MiCOM P54x also has a setting option to allow tripping of the weak infeed circuit breaker of a faulted line. Three undervoltage elements, Va<, Vb< and Vc< are used to detect the line fault at the weak infeed terminal. This voltage check prevents tripping during spurious operations of the channel or during channel testing.

The additional weak infeed trip logic is:

Weak Infeed Trip No Distance Zone Operation, plus V<, plus Channel Received.

Weak infeed tripping is time delayed according to the WI Trip Delay value. Due to the use of phase segregated undervoltage elements, single pole tripping can be enabled for WI trips if required. If single pole tripping is disabled a three pole trip will result after the time delay.

P54x/EN OP/Nd5 Page 5-81

(OP) 5 Operation

1.25.5

1.25.6

Operation of Individual Protection Functions

Permissive Scheme Unblocking Logic - Loss of Guard (Distance option only)

This mode is designed for use with Frequency Shift Keyed (FSK) Power Line Carrier

(PLC) communications. When the protected line is healthy a guard frequency is sent between line ends, to verify that the channel is in service. However, when a line fault occurs and a permissive trip signal must be sent over the line, the power line carrier frequency is shifted to a new (trip) frequency. Therefore, distance relays should receive either the guard, or trip frequency, but not both together. With any permissive scheme, the PLC communications are transmitted over the power line which may contain a fault.

So, for certain fault types the line fault can attenuate the PLC signals, so that the permissive signal is lost and not received at the other line end. To overcome this problem, when the guard is lost and no “trip” frequency is received, the relay opens a window of time during which the permissive scheme logic acts as though a “trip” signal had been received. Two opto inputs to the relay need to be assigned, one is the Channel

Receive opto, the second is designated Loss of Guard (the inverse function to guard received). The function logic is summarized in the table below.

System condition

Permissive channel received

Loss of guard

Permissive trip allowed

Alarm generated

Healthy Line No No No No

Internal Line Fault Yes

Unblock No

Signaling Anomaly Yes

Yes

Yes

No

Yes

Yes, during a 150 ms window

No

No

Yes, delayed on pickup by 150 ms

Yes, delayed on pickup by 150 ms

Table 3 - Permissive scheme unblocking logic

The window of time during which the unblocking logic is enabled starts 10 ms after the guard signal is lost, and continues for 150 ms. The 10 ms delay gives time for the signaling equipment to change frequency as in normal operation. For the duration of any alarm condition, zone 1 extension logic will be invoked if the option Z1 Ext on Chan. Fail has been Enabled.

Distance Scheme Blocking (Distance option only)

The signaling channel is keyed from operation of the reverse zone 4 elements of the relay. If the remote relay has picked up in zone 2, then it will operate after the trip delay if no block is received. Listed below are some of the main features/requirements for a

Blocking scheme:

Blocking schemes require only a simplex signaling channel

Reverse looking Zone 4 is used to send a blocking signal to the remote end to prevent unwanted tripping

When a simplex channel is used, a Blocking scheme can easily be applied to a multi-terminal line provided that outfeed does not occur for any internal faults

The blocking signal is transmitted over a healthy line, and so there are no problems associated with power line carrier signaling equipment

Blocking schemes provides similar resistive coverage to the permissive overreach schemes

Page 5-82 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Fast tripping will occur at a strong source line end, for faults along the protected line section, even if there is weak or zero infeed at the other end of the protected line

If a line terminal is open, fast tripping will still occur for faults along the whole of the protected line length

If the signaling channel fails to send a blocking signal during a fault, fast tripping will occur for faults along the whole of the protected line, but also for some faults within the next line section

If the signaling channel is taken out of service, the relay will operate in the conventional basic mode

A current reversal guard timer is included in the signal send logic to prevent unwanted trips of the relay on the healthy circuit, during current reversal situations on a parallel circuit

The Distance blocking scheme (BOP) diagram shows the simplified scheme logic.

Send logic: Reverse Zone 4

Trip logic: Zone 2, plus Channel NOT Received, delayed by Tp

P54x/EN OP/Nd5 Page 5-83

(OP) 5 Operation Operation of Individual Protection Functions

1.25.7

Figure 44 - Distance blocking scheme (BOP) (Distance option only)

Distance Schemes Current Reversal Guard Logic (Distance option only)

For double circuit lines, the fault current direction can change in one circuit when circuit breakers open sequentially to clear the fault on the parallel circuit. The change in current direction causes the overreaching distance elements to see the fault in the opposite direction to the direction in which the fault was initially detected (settings of these elements exceed 150% of the line impedance at each terminal). The race between operation and resetting of the overreaching distance elements at each line terminal can cause the Permissive Overreach, and Blocking schemes to trip the healthy line. A system configuration that could result in current reversals is shown in the Example of fault current reverse of direction diagram. For a fault on line L1 close to circuit breaker B, as circuit breaker B trips it causes the direction of current flow in line L2 to reverse.

Page 5-84 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Figure 45 - Example of fault current reverse of direction

1.25.8

1.25.9

Permissive Overreach Schemes Current Reversal Guard (Distance option only)

The current reversal guard incorporated in the POR scheme logic is initiated when the reverse looking Zone 4 elements operate on a healthy line. Once the reverse looking

Zone 4 elements have operated, the relay’s permissive trip logic and signal send logic are inhibited at substation D. The reset of the current reversal guard timer is initiated when the reverse looking Zone 4 resets. A time delay tREVERSAL GUARD is required in case the overreaching trip element at end D operates before the signal send from the relay at end C has reset. Otherwise this would cause the relay at D to over trip. Permissive tripping for the relays at D and C substations is enabled again, once the faulted line is isolated and the current reversal guard time has expired.

Blocking Scheme 1 and 2 Current Reversal Guard (Distance option only)

The current reversal guard incorporated in the Blocking scheme logic is initiated when a blocking element picks-up to inhibit the channel-aided trip. When the current reverses and the reverse looking Zone 4 elements reset, the blocking signal is maintained by the timer tREVERSAL GUARD. Therefore, the relays in the healthy line are prevented from over tripping due to the sequential opening of the circuit breakers in the faulted line. After the faulted line is isolated, the reverse-looking Zone 4 elements at substation C and the forward looking elements at substation D will reset.

Two variants of Blocking scheme exist, Blocking 1, and Blocking 2. The only difference in functionality is:

Blocking 1 - The Reversal Guard is applied to the Signal Send

Blocking 2 - The Reversal Guard is applied to the Signal Receive

The difference in the receive logic is shown in the Logic Diagrams, Blocking 1 (Distance option only) and Blocking 1 (Distance option only) below:

DDB: CTx (498,514)

DDB: CRx Int (494,508)

DDB: Aided Trip EN (501,517)

DDB: COS/LGS Alarm (492,506)

P1584ENc

Figure 46 - Blocking 1 (Distance option only)

P54x/EN OP/Nd5 Page 5-85

(OP) 5 Operation

1.25.10

Operation of Individual Protection Functions

SET: Reversal

Guard

DDB: CTx (498,514)

DDB: CRx Int (494,508) t

RGD

DDB: Aided Trip EN (501,517)

DDB: COS/LGS Alarm (492,506)

P1585ENc

Figure 47 - Blocking 2 (Distance option only)

The relative merits of Blocking 1 and Blocking 2 are discussed in the Application Notes chapter.

Aided DEF Ground Fault Scheme - Permissive Overreach (Distance option only)

The DEF permissive scheme diagram shows the element reaches, and the Aided DEF

(ground) permissive scheme logic diagram the simplified scheme logic. The signaling channel is keyed from operation of the forward IN> DEF element of the relay. If the remote relay has also detected a forward fault, then it will operate with no additional delay upon receipt of this signal.

Send logic: IN> Forward pickup

Permissive trip logic: IN> Forward plus Channel Received

IN> Fwd (A)

ZL

A

B

IN> Fwd (B)

P1306ENa

Figure 48 - The DEF permissive scheme (Distance option only)

The scheme has the same features/requirements as the corresponding distance scheme and provides sensitive protection for high resistance earth faults.

Page 5-86 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

1.25.11

Figure 49 - Aided DEF (ground) permissive scheme logic (Distance option only)

Aided DEF Ground Fault Scheme – Blocking (Distance option only)

The DEF blocking scheme diagram shows the element reaches, and Aided DEF (ground) blocking scheme logic diagram the simplified scheme logic. The signaling channel is keyed from operation of the reverse DEF element of the relay. If the remote relay forward

IN> element has picked up, then it will operate after the set Time Delay if no block is received.

Send logic: DEF Reverse

Trip logic: IN> Forward, plus Channel NOT Received, with small set delay

P54x/EN OP/Nd5

Figure 50 - DEF blocking scheme (Distance option only)

The scheme has the same features/requirements as the corresponding distance scheme and provides sensitive protection for high resistance earth faults.

Page 5-87

(OP) 5 Operation Operation of Individual Protection Functions

Where t is shown in the diagram this signifies the time delay associated with an element.

To allow time for a blocking signal to arrive, a short time delay on aided tripping must be used.

1.25.12

Page 5-88

Figure 51 - Aided DEF (ground) blocking scheme logic (Distance option only)

Delta Scheme POR - Permissive Overreach Transfer Trip (Distance option only)

The channel for a directional comparison POR scheme is keyed by operation of the overreaching Delta Forward elements of the relay. If the remote relay has also detected a forward fault upon receipt of this signal, the relay will operate. Listed below are some of the main features/requirements for a permissive overreaching scheme:

Permissive overreach schemes tend to be more secure than blocking schemes because forward directional decisions must be made at both ends of the line before tripping is allowed. Failure of the signaling channel will not result in unwanted tripping.

If the infeed source at either end of the line is weak, the POR scheme must be supplemented with Weak Infeed logic.

The scheme requires a duplex signaling channel to prevent possible relay maloperation due to spurious keying of the signaling equipment. This is necessary due to the fact that the signaling channel is keyed for faults external to the

• protected line.

Current reversal guard logic is used to prevent healthy line protection maloperation for the high speed current reversals experienced in double circuit lines, caused by sequential opening of circuit breakers.

If the signaling channel fails, Basic distance scheme tripping will be available.

This scheme is similar to that used in the LFDC relay, and is shown in the Delta directional comparison POR scheme diagram:

Send logic:

Fault Forward

Permissive trip logic:

Fault Forward plus Channel Received.

P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

1.25.13

Figure 52 - Delta directional comparison POR scheme (Distance option only)

Delta Blocking Scheme (Distance option only)

The signaling channel is keyed from operation of the Delta Reverse elements of the relay.

If the remote relay has detected Delta Forward, then it will operate after the trip delay if no block is received. Listed below are some of the main features/requirements for a permissive overreaching scheme:

Blocking schemes require only a simplex signaling channel.

The blocking signal is transmitted over a healthy line, and so there are no problems associated with power line carrier signaling equipment.

Delta blocking schemes tend to be less secure than permissive schemes because failure of the signaling channel could result in an unwanted tripping later. Therefore blocking schemes are best supervised by use of a Channel out of Service indication.

Fast tripping will occur at a strong source line end, for faults along the protected line section, even if there is weak or zero infeed at the other end of the protected line.

If a line terminal is open, fast tripping will still occur for faults along the whole of the protected line length.

P54x/EN OP/Nd5 Page 5-89

(OP) 5 Operation Operation of Individual Protection Functions

A current reversal guard timer is included in the signal send logic to prevent unwanted trips of the relay on the healthy circuit, during current reversal situations on a parallel circuit.

To allow time for a blocking signal to arrive, a short time delay on aided tripping,

Delta dly, must be used.

This scheme is similar to that used in the relay, and is shown in the Delta directional comparison BLOCKING scheme diagram.

Send logic:

Fault Reverse

Trip logic:

Fault Forward, plus Channel NOT Recieved, delayed by Tp.

Page 5-90

Figure 53 - Delta directional comparison BLOCKING scheme

P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.26

1.26.1

(OP) 5 Operation

Zone 1 Extension and Loss of Load Schemes (Distance option only)

The MiCOM relay offers additional non-channel distance schemes, notably Zone 1 extension, and loss of load.

Zone 1 Extension Scheme (Distance option only)

Auto-reclosure is widely used on radial overhead line circuits to re-establish supply following a transient fault. A Zone 1 extension scheme may therefore be applied to a radial overhead feeder to provide high speed protection for transient faults along the whole of the protected line. The Zone 1 extension scheme diagram shows the alternative reach selections for zone 1: Z1 or the extended reach Z1X.

Z1 Extension (A)

ZL

A Z1A B

Z1 Extension (B)

P1308ENa

Figure 54 - Zone 1 extension scheme

In this scheme, Zone 1X is enabled and set to overreach the protected line. A fault on the line, including one in the end 20% not covered by zone 1, will now result in instantaneous tripping followed by auto-reclosure. Zone 1X has resistive reaches and residual compensation similar to Zone 1. The auto-recloser in the relay is used to inhibit tripping from zone 1X such that upon reclosure the relay will operate with Basic scheme logic only, to co-ordinate with downstream protection for permanent faults. Thus, transient faults on the line will be cleared instantaneously, which will reduce the probability of a transient fault becoming permanent. The scheme can, however, operate for some faults on an adjacent line, although this will be followed by auto-reclosure with correct protection discrimination. Increased circuit breaker operations would occur, together with transient loss of supply to a substation.

The time delays associated with extended zone Z1X are shown in the table below:

Scenario Z1X Time Delay

First fault trip

Fault trip for persistent fault on auto-reclose

= tZ1

= tZ2

Table 4 - Time delays associated with extended zone Z1X

The Zone 1X reach is set as a percentage of the Zone 1 reach, i.e. as a reach multiplier.

Note The Zone 1 extension scheme can be “Disabled”, permanently “Enabled” or just brought into service when the distance communication channel fails and the aided scheme would be inoperative. A selection of which out of the two channels available in The MiCOM relay is monitored, is provided, with selections from Channel 1 and Channel 2 in any combination.

The Logic Diagram is attached as the Zone 1 extension diagram:

P54x/EN OP/Nd5 Page 5-91

(OP) 5 Operation

1.26.2

Operation of Individual Protection Functions

DDB Reset Z1 Extension (490)

SET Z1X Enabled

SET Z1X on Ch 1 Fail

1

&

DDB Zone 1

Extension Active

(878)

&

SET Z1X on Ch 2 Fail

&

SET Z1X on Ch 1 or 2 Fail

&

SET Z1X on Ch 1 or 2 Fail

&

DDB Channel 1 Fail (317)

DDB Channel 2 Fail (318)

1

P1548ENb

Figure 55 - Zone 1 extension

Loss of Load (LoL) Accelerated Tripping (Distance option only)

The loss of load accelerated trip logic is shown in abbreviated form in the Loss of load accelerated trip scheme diagram. The loss of load logic provides fast fault clearance for faults over the whole of a double end fed protected circuit for all types of fault, except three phase. The scheme has the advantage of not requiring a signaling channel.

Alternatively, the logic can be chosen to be enabled when the channel associated with an aided scheme has failed. This failure is detected by permissive scheme unblocking logic, or a Channel Out of Service (COS) opto input. A selection of which out of the two channels available in the MiCOM relay is monitored, is provided, with selections from

Channel 1 and Channel 2 in any combination.

Any fault located within the reach of Zone 1 will result in fast tripping of the local circuit breaker. For an end zone fault with remote infeed, the remote breaker will be tripped in

Zone 1 by the remote relay and the local relay can recognize this by detecting the loss of load current in the healthy phases. This, coupled with operation of a Zone 2 comparator causes tripping of the local circuit breaker.

Before an accelerated trip can occur, load current must have been detected prior to the fault. The loss of load current opens a window during which time a trip will occur if a Zone

2 comparator operates. A typical setting for this window is 40 ms as shown in the Loss of load diagram, although this can be altered in the menu LoL Window cell. The accelerated trip is delayed by 18 ms to prevent initiation of a loss of load trip due to circuit breaker pole discrepancy occurring for clearance of an external fault. The local fault clearance time can be deduced as follows: t = Z1d + 2CB + LDr + 18ms

Where:

Z1d =

CB =

LDr =

Maximum downstream zone 1 trip time

Breaker operating time

Upstream level detector (LoL: I<) reset time

Page 5-92 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

P54x/EN OP/Nd5

Figure 56 - Loss of load accelerated trip scheme (Distance option only)

For circuits with load tapped off the protected line, care must be taken in setting the loss of load feature to ensure that the I< level detector setting is above the tapped load current. When selected, the loss of load feature operates in conjunction with the main distance scheme that is selected. In this way it provides high speed clearance for end zone faults when the Basic scheme is selected or, with permissive signal aided tripping schemes, it provides high speed back-up clearance for end zone faults if the channel fails.

Note Loss of load tripping is only available where 3 pole tripping is used. The detailed logic follows in the Loss of load diagram.

Page 5-93

(OP) 5 Operation Operation of Individual Protection Functions

Figure 57 - Loss of load (Distance option only)

Page 5-94 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.27

(OP) 5 Operation

Phase Fault Overcurrent Protection

Phase fault overcurrent protection is a form of back-up protection that can be:

Permanently disabled

Permanently enabled

Enabled only in case of VT fuse/MCB failure

Enabled only in case of protection communication channel failure

Enabled if VT fuse/MCB or protection communication channel fail

Enabled if VT fuse/MCB and protection communication channel fail

In addition, each stage may be disabled by a

DDB (463,464,465 or 466) Inhibit I > x (x = 1, 2, 3 or 4)

It should be noted that phase overcurrent protection is phase segregated, but the operation of any phase is mapped to 3-phase tripping in the default PSL.

The VTS element of the relay can be selected to either block the directional element or simply remove the directional control.

The first two stages can be set either inverse time or definite time only. The third and fourth stages have a DT characteristic only. Each stage can be configured to be directional forward, directional reverse or non-directional.

For the IDMT characteristics the following options are available.

The IEC/UK IDMT curves conform to this formula: t = T x

( I / I

β

s) –1

The IEEE/US IDMT curves conform to this formula: t = TD x t

β

I

=

=

=

Is =

α

=

L =

T =

TD =

β

( I/Is) –1

+ L

Operation time

Constant

Measured current

Current threshold setting

Constant

ANSI/IEEE constant (zero for IEC curves)

Time multiplier setting for IEC/UK curves

Time multiplier setting for IEEE/US curves

IDMT Curve description

Standard Inverse

Very Inverse

Extremely Inverse

Long Time Inverse

Moderately Inverse

Very Inverse

Standard

IEC

IEC

IEC

UK

IEEE

IEEE

β

Constant

0.14

13.5

80

120

0.0515

19.61

α

Constant

0.02

1

2

1

0.02

2

Extremely Inverse

Inverse

IEEE

US-C08

28.2

5.95

2

2

Short Time Inverse US 0.16758 0.02

Table 5 - IDMT curve descriptions, standards and constants

L Constant

0

0

0

0

0.114

0.491

0.1217

0.18

0.11858

P54x/EN OP/Nd5 Page 5-95

(OP) 5 Operation

1.27.1

1.27.2

Operation of Individual Protection Functions

Note: The IEEE and US curves are set differently to the IEC/UK curves, with regard to the time setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC curves, whereas a time dial setting is employed for the IEEE/US curves. The menu is arranged such that if an

IEC/UK curve is selected, the ‘ I> Time Dial’ cell is not visible and vice versa for the TMS setting.

Reset Characteristics for Overcurrent Elements

The IEC/UK inverse characteristics can be used with a definite time reset characteristic, however, the IEEE/US curves may have an inverse or definite time reset characteristic.

The following equation can used to calculate the inverse reset time for IEEE/US curves:

TD x S tRESET =

(1 - M2)

in seconds

Where:

TD =

S

M

=

=

Time dial setting for IEEE curves

Constant

I/ Is

Curve description

Moderately Inverse

Very Inverse

IEEE

IEEE

Standard

4.85

21.6

Extremely Inverse

Inverse

IEEE

US

29.1

5.95

Short Time Inverse US 2.261

Table 6 - IDMT curve descriptions, standards and constants

S constant

Directional Overcurrent Protection

The phase fault elements of the MiCOM P44y/P445/P54x/P841 relays are internally polarized by the quadrature phase-phase voltages, as shown in following Phase,

Operating Current and Polarizing Voltages table.

Phase of Protection Operate Current Polarizing Voltage

A Phase

B Phase

IA

IB

VBC

VCA

C Phase IC VAB

Table 7 - Phases, operating currents and polarizing voltages

Under system fault conditions, the fault current vector will lag its nominal phase voltage by an angle dependent upon the system X/R ratio. It is therefore a requirement that the relay operates with maximum sensitivity for currents lying in this region. This is achieved by means of the relay characteristic angle (RCA) setting; this defines the angle by which the current applied to the relay must be displaced from the voltage applied to the relay to obtain maximum relay sensitivity. This is set in cell " I>Char Angle " in the overcurrent menu. On the relays, it is possible to set characteristic angles anywhere in the range –95° to +95°.

Page 5-96 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.27.3

(OP) 5 Operation

The functional logic block diagram for directional overcurrent is shown in the following

Directional overcurrent logic diagram.

The overcurrent block is a level detector that detects that the current magnitude is above the threshold and together with the respective polarizing voltage, a directional check is performed based on the following criteria:

Directional forward

Directional reverse

-90° < (angle(I) - angle(V) - RCA) < 90°

-90° > (angle(I) - angle(V) - RCA) > 90°

A Phase Start

A Phase

Overcurrent

VBC Polarizing

Voltage

1

&

Directional

Check & IDMT/DT

A Phase Trip

VBC Polarizing

Memory

B Phase

Overcurrent

VCA Polarizing

Voltage

1

&

Directional

Check &

IDMT/DT

B Phase Start

B Phase Trip

VCA Polarizing

Memory

C Phase Start

C Phase

Overcurrent

VAB Polarizing

Voltage

VAB Polarizing

Memory

1

&

Directional

Check &

IDMT/DT

C Phase Trip

Fast VTS Block

AR Timer Block

(3 rd and 4 th stages only)

Phase Overcurrent Timer Block

(independent for each stage)

P1628ENb

Figure 58 - Directional overcurrent logic

Any of the four overcurrent stages may be configured to be directional noting that IDMT characteristics are only selectable on the first two stages. When the element is selected as directional, a VTS Block option is available. When the relevant bit is set to 1, operation of the Voltage Transformer Supervision (VTS), will block the stage if directionalized.

When set to 0, the stage will revert to non-directional upon operation of the VTS.

Overcurrent (50)Backup to Line Differential (87L)

As from Software Version D1, the Phase Overcurrent (Overcurrent) feature has now been modified

The CTS Block now has new setting options for enabling different combinations of the

VTS, CTS and Channel Failure.

These new settings options are shown below.

In addition, modified DDBs (311, 313, 316, 319, 332, 455, 929, 1145 and 1146), affect how the different signals can alter the operation of the system.

An explanation of how the DDBs operate together is also shown below.

This feature includes the CTS Block DDB and now includes these setting option(s):

P54x/EN OP/Nd5 Page 5-97

(OP) 5 Operation Operation of Individual Protection Functions

Existing Enable/Disable:

Disabled

Enabled

Enabled VTS

Enabled Ch Fail

En VTSorCh Fail

En VTSandCh Fail

Additions:

Enabled CTS

En VTSorCTS

En Ch FailorCTS

En VTSorCHForCTS

En VTSandCTS

En Ch FailandCTS

En VTS CHF CTS

Explanation of how the DDBs operate together

The following DDBs are required: DDB 311, 313, 316 and 929.

Currently when Overcurrent is enabled as backup for Line Diff channel failure the following conditions are included.

1146 - DDB_BACKUP_IN (Backup Enabled) - is all of the following OR’d together

 313 - DDB_PROTECTION_FAILURE (C Diff Failure) - It indicates that differential protection communications are completely lost and therefore C diff does not work

OR

 319 - DDB_FREQ_ALARM (F out of Range)

OR

 332 - DDB_IN_COMPATABLE_RELAYS (Incompatible Rly)

OR

 455 - DDB_INHIBIT_CURRENT_DIFF_OPTO (Inhibit C Diff) - When linked to an opto input, inhibits differential relay at the local end and send an inhibit command to the remote end.

1145 - DDB_INHIBIT_CURRENT_DIFF (Inhibit C Diff)

The DDB_SIGNALLING_FAILURE (311) is effectively included in the

DDB_PROTECTION_FAILURE (313) signal (as detailed below).

The DDB_SIGNALLING_FAILURE (316) is effectively included (it consists of DDB 455

OR 319 OR 1145) signal (as detailed below).

A summary of the DDB operation is given below:

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Operation of Individual Protection Functions

1.28

(OP) 5 Operation

Internally, the "Cdiff inhibited" signal is derived as follows:

DDB_INHIBIT_CD_PROTECTION (316 - C Diff Inhibited)

Consists of any of the following:

DDB_INHIBIT_CURRENT_DIFF_OPTO (455 - Inhibit C Diff)

DDB_INHIBIT_CURRENT_DIFF (1145 - Inhibit C Diff)

DDB_FREQ_ALARM (319 - F out of Range)

Inhibit C Diff (1145) is Set when:

The Loop propagation delay changes when NO GPS Pulse is present (or GPS is disabled).

The relay (auxiliary supply) is power cycled in GPS mode with no GPS Input present.

An inhibit is received from the remote relay (via the protection comms). This may be due to the following:

The remote relay Inhibit opto being active.

The remote relay frequency alarm is present.

The remote relay has inhibited for any other reason (Loop prop delay change or auxiliary power cycle etc.).

Inhibit C Diff (1145) is removed when:

GPS Synch is re-established

Prop Delay Equal Command is Executed (Local Relay Menu)

Prop Delay Equal Command is Executed (Remote Relay Menu via Protection

Comms)

Internally, the "Cdiff failure" signal derived as follows and why is current diff still able to trip when the "Cdiff failure".

This DDB (313 - Differential protection failure alarm) has a fixed 220ms drop-off timer, so the relay can operate while this is present. This DDB is based on

DDB_SIGNALLING_FAILURE (311 - Signalling Fail), which is set if <75% (default) messages are received over a 100ms period. Also, the intertrip function is not inhibited

(except by the local Opto Inhibit / Frequency Alarm). It is also possible that the protection can operate if the signalling fail alarm is present and messages are being received e.g. <

75% valid message (but operation will be slow).

Voltage Memory / Synchronous Polarization

For a close up three-phase fault, all three voltages will collapse to zero and no healthy phase voltages will be present. For this reason, the MiCOM relays include a synchronous polarization feature that stores the pre-fault voltage information and continues to apply it to the directional overcurrent elements for a time period of 3.2 seconds. This ensures that either instantaneous or time delayed directional overcurrent elements will be allowed to operate, even with a three-phase voltage collapse.

P54x/EN OP/Nd5 Page 5-99

(OP) 5 Operation

1.29

1.29.1

Operation of Individual Protection Functions

Thermal Overload Protection

The relay incorporates a current based thermal replica, using rms load current to model heating and cooling of the protected plant. The element can be set with both alarm and trip stages.

The heat generated within an item of plant, such as a cable or a transformer, is the resistive loss (I

2

R x t). Thus, heating is directly proportional to current squared. The thermal time characteristic used in the relay is therefore based on current squared, integrated over time. The relay automatically uses the largest phase current for input to the thermal model.

Equipment is designed to operate continuously at a temperature corresponding to its full load rating, where heat generated is balanced with heat dissipated by radiation etc.

Over-temperature conditions therefore occur when currents in excess of rating are allowed to flow for a period of time. It can be shown that temperatures during heating follow exponential time constants and a similar exponential decrease of temperature occurs during cooling.

The relay provides two characteristics that may be selected according to the application.

Thermal overload protection may be disabled by DDB 478 Inhibit Thermal > .

Single Time Constant Characteristic

This characteristic is used to protect cables, dry type transformers (e.g. type AN), and capacitor banks.

The thermal time characteristic is given by: t = -

τ log e

I

2

- (K.I

FLC

)

2

(I

2

- I p

2

)

Where: t = Time to trip, following application of the overload current, I

τ

= Heating and cooling time constant of the protected plant

I = Largest phase current

I

FLC

= Full load current rating (relay setting ‘Thermal Trip’) k = 1.05 constant, allows continuous operation up to <1.05 I

FLC

I

P

= Steady state pre-loading before application of the overload

The time to trip varies depending on the load current carried before application of the overload, i.e. whether the overload was applied from ' hot ” or “ cold ”.

The thermal time constant characteristic may be rewritten as: e

(-t/

τ

)

=

θ

-

θ

θ

- 1 p

Where:

θ

= I 2 /k 2 I

FLC

2 and

θ

p = Ip 2 /k 2 I

FLC

2

Page 5-100 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.29.2

(OP) 5 Operation

Where

θ

is the thermal state and is

θ p

the pre-fault thermal state.

Note A current of 105%Is (kI

FLC

) has to be applied for several time constants to cause a thermal state measurement of 100%

Dual Time Constant Characteristic (typically not applied for P54x)

This characteristic is used to protect oil-filled transformers with natural air cooling (e.g. type ONAN). The thermal model is similar to that with the single time constant, except that two timer constants must be set.

For marginal overloading, heat will flow from the windings into the bulk of the insulating oil. Thus, at low current, the replica curve is dominated by the long time constant for the oil. This provides protection against a general rise in oil temperature.

For severe overloading, heat accumulates in the transformer windings, with little opportunity for dissipation into the surrounding insulating oil. Thus, at high current, the replica curve is dominated by the short time constant for the windings. This provides protection against hot spots developing within the transformer windings.

Overall, the dual time constant characteristic provided within the relay serves to protect the winding insulation from ageing, and to minimize gas production by overheated oil.

Note, however, that the thermal model does not compensate for the effects of ambient temperature change.

The thermal curve is defined as:

0.4e

(-t/

τ

)

+ 0.6e

(-t/

τ

)

=

Ι 2

- (k.

Ι

FLC)

2

Ι 2

-

Ι p

2

Where:

τ

1 =

τ

2

=

Heating and cooling time constant of the transformer windings

Heating and cooling time constant for the insulating oil

In practice, it is difficult to solve this equation to give the operating time (t), therefore a

Ι graphical solution, using a spreadsheet package, is recommended. The spreadsheet can be arranged to calculate the current that will give a chosen operating time. The equation to calculate the current is defined as:

=

0.4

Ι p2.e

(-t/

τ

0.4 e

1)

+ 0.6

Ι p2.e

(-t/

τ

1)

+ 0.6 e

(-t/

τ

2)

(-t/

τ

2)

-k2.

Ι

FLC

-1

2

Equation 1

Current I A

Current I B

Current I C

1

Thermal

Trip

Start

Thermal

Characteristic

Thermal State

Measurement

Thermal Alarm

Thermal Trip

Reset Thermal State Measurement

Figure 59 - Thermal overload protection logic diagram

P1629ENa

P54x/EN OP/Nd5 Page 5-101

(OP) 5 Operation

1.30

Operation of Individual Protection Functions

The functional block diagram for the thermal overload protection is shown in the above diagram.

The magnitudes of the three phase input currents are compared and the largest magnitude taken as the input to the thermal overload function. If this current exceeds the thermal trip threshold setting a start condition is asserted.

Earth Fault (Ground Overcurrent), Sensitive Earth Fault (SEF) and

Restricted Earth Fault (REF) Protection

The MiCOM P44y/P54x/P841 relays include backup earth fault protection. Two elements are available; a derived earth fault element (where the residual current to operate the element is derived from the addition of the three line CT currents) and a sensitive earth fault element where low current settings are required. The sensitive earth fault element has a separate CT input and would normally be connected to a core balance CT. The derived and sensitive earth fault elements both have four stages of protection. The first two stages can be set either inverse time or definite time only. The third and fourth stages have a DT characteristic only. Each stage can be configured to be directional forward, directional reverse or non-directional.

Note The input CT which is designed specifically to operate at low current magnitudes is common to both the Sensitive Earth Fault (SEF) and high impedance Restricted Earth Fault (REF) protection, so these features are treated as mutually exclusive within the relay menu.

A feature also exists whereby the protection can be enabled upon failure of the differential protection communication channel (not applicable to SEF and REF Functions).

Earth fault Overcurrent IN> can be set to:

Permanently disabled

Permanently enabled

Enabled only in case of VT fuse/MCB failure

Enabled only in case of protection communication channel failure

Enabled if VT fuse/MCB or protection communication channel fail

Enabled if VT fuse/MCB and protection communication channel fail

In addition, each stage (not for SEF/REF) may be disabled by a DDB (467,468,469 and

470) Inhibit IN > x (x = 1, 2, 3 or 4).

The VTS element of the relay can be selected to either block the directional element or simply remove the directional control.

The IN> and ISEF> Function Links settings have the following effect:

VTS Block - When the relevant is set to 1, operation of the Voltage Transformer

Supervision (VTS) will block the stage if it directionalized. When set to 0 the stage will revert to non-directional upon operation of the VTS.

The inverse time characteristics available for the earth fault protection are the same as those for the phase overcurrent elements, but with the addition of an IDG curve characteristic.

Details of the IDG curve are provided below:

Page 5-102 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.30.1

(OP) 5 Operation

7

6

5

4

9

8

IDG Curve

The IDG curve is commonly used for time delayed earth fault protection in the Swedish market. This curve is available in stages 1 and 2 of Earth Fault 1, Earth Fault 2 and

Sensitive Earth Fault protections.

The IDG curve is represented by the following equation: t = 5.8 - 1.35 loge



Ι

Ι

N > Setting 

in seconds

Where:

I =

IN>Setting =

Measured current

An adjustable setting which defines the start point of the characteristic

Although the start point of the characteristic is defined by the “ IN> ” setting, the actual relay current threshold is a different setting called “ IDG Is ”. The “ IDG Is ” setting is set as a multiple of “ IN> ”.

An additional setting “ IDG Time ” is also used to set the minimum operating time at high levels of fault current.

The following IDG characteristic diagram shows how the IDG characteristic is implemented.

10

IDG Is Setting Range

3

2

1

0

1 10

I/IN>

IDG Time Setting Range

100

P2242ENa

Figure 60 - IDG characteristic

P54x/EN OP/Nd5 Page 5-103

(OP) 5 Operation

1.30.2

Operation of Individual Protection Functions

Restricted Earth Fault (REF) Protection

The REF protection in the MiCOM P44y/P54x/P841 relays is a high impedance element which shares the same CT input as the SEF protection. Hence, only one of these elements may be selected.

The setting options are available under the GROUP 1 SEF/REF PROT’N menu.

The high impedance principle is best explained by considering a differential scheme where one CT is saturated for an external fault, as shown in the following High impedance principle diagram.

Protected circuit

Zm

A - G

Page 5-104

P0115ENc

Figure 61 - High impedance principle

If the relay circuit is considered to be a very high impedance, the secondary current produced by the healthy CT will flow through the saturated CT. If CT magnetizing impedance of the saturated CT is considered to be negligible, the maximum voltage across the relay circuit will be equal to the secondary fault current multiplied by the connected impedance, (R

L3

+ R

L4

+ R

CT2

).

P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

The relay can be made stable for this maximum applied voltage by increasing the overall impedance of the relay circuit, such that the resulting current through the relay is less than its current setting. As the impedance of the relay input alone is relatively low, a series connected external resistor is required. The value of this resistor, R

ST

, is calculated by the formula shown in the Fifth harmonic blocking logic diagram. An additional non-linear, metrosil, may be required to limit the peak secondary circuit voltage during internal fault conditions.

To ensure that the protection will operate quickly during an internal fault, the CT’s used to operate the protection must have a kneepoint voltage of at least 4 Vs.

The necessary relay connections for high impedance REF are shown in the High impedance REF relay/CT connections diagram.

1.31

Figure 62 - High impedance REF relay/CT connections

Directional Earth Fault (DEF) Protection

As stated in the previous sections, each of the four stages of earth fault protection may be set to directional if required. Consequently, as with the application of directional overcurrent protection, a suitable voltage supply is required by the relay to provide the necessary polarization. Two options are available for polarization: Residual Voltage or

Negative Sequence.

P54x/EN OP/Nd5 Page 5-105

(OP) 5 Operation

1.32

Operation of Individual Protection Functions

Residual Voltage Polarization

With earth fault protection, the polarizing signal requires to be representative of the earth fault condition. As residual voltage is generated during earth fault conditions, this quantity is commonly used to polarize DEF elements. The relay internally derives this voltage from the 3-phase voltage input which must be supplied from either a 5-limb or three singlephase VTs. These types of VT design allow the passage of residual flux and consequently permit the relay to derive the required residual voltage. In addition, the primary star point of the VT must be earthed. A three-limb VT has no path for residual flux and is therefore unsuitable to supply the relay.

Note Residual voltage is nominally 180° out of phase with residual current.

Consequently, the DEF elements are polarized from the "-Vres" quantity.

This 180° phase shift is automatically introduced within the P14x relay.

The directional criteria with zero sequence (residual voltage) polarization are given below:

Directional forward -90 o

< (angle(IN) - angle(VN+180 o

) - RCA) < 90 o

Directional reverse -90 o

> (angle(IN) - angle(VN+180 o

) - RCA) > 90 o

The virtual current polarizing feature is not available for use with the backup earth fault elements - that is used exclusively in DEF aided schemes only.

The logic diagram for directional earth fault overcurrent with neutral voltage polarization is shown below.

CTS Block

IN> Protection Inhibit

&

IN Derived/Measured >

Setting

EF Start

VN Polarizing

Voltage VN Pol>

&

Directional

Check

& IDMT/DT EF Trip

Slow VTS Block

EF Timer Block

Figure 63 - Directional EF with neutral voltage polarization (single stage)

P1633ENb

Page 5-106 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.32.1

(OP) 5 Operation

Negative Sequence Polarization (Not for SEF)

In certain applications, the use of residual voltage polarization of DEF may either be not possible to achieve, or problematic. An example of the former case would be where a suitable type of VT was unavailable, for example if only a three limb VT was fitted. An example of the latter case would be an HV/EHV parallel line application where problems with zero sequence mutual coupling may exist.

In either of these situations, the problem may be solved by the use of Negative Phase

Sequence (NPS) quantities for polarization. This method determines the fault direction by comparison of NPS voltage with NPS current. The operate quantity, however, is still residual current.

This is available for selection on both the derived and measured standard earth fault elements (EF1 and EF2) but not on the SEF protection. It requires a suitable voltage and current threshold to be set in cells " IN>V2pol set " and " IN>I2pol set ", respectively.

Negative sequence polarizing is not recommended for impedance earthed systems regardless of the type of VT feeding the relay. This is due to the reduced earth fault current limiting the voltage drop across the negative sequence source impedance (V2pol) to negligible levels. If this voltage is less than 0.5 volts the relay will cease to provide

DEF.

The logic diagram for directional earth fault overcurrent with negative sequence polarization is shown in the following diagram.

CTS Block

IN> Protection Inhibit

IN Derived/Measured >

Setting

&

EF Start

NPS Polarizing

Current I2>

Directional

Check

& & IDMT/DT EF Trip

NPS Polarizing

Voltage V2>

&

Slow VTS Block

EF Timer Block P1630ENb

Figure 64 - Directional EF with negative sequence polarization (single stage)

The directional criteria with negative sequence polarization is given below:

Directional forward -90° < (angle(I2) - angle(V2 + 180°) - RCA) < 90°

Directional reverse -90° > (angle(I2) - angle(V2 + 180°) - RCA) > 90°

P54x/EN OP/Nd5 Page 5-107

(OP) 5 Operation

1.33

Operation of Individual Protection Functions

Negative Phase Sequence (NPS) Overcurrent Protection

The Negative Phase Sequence (NPS) overcurrent protection included in the

P445/P54x/P841 relays provides four-stage non-directional/directional overcurrent protection with independent time delay characteristics. The first two stages of overcurrent protection have time-delayed characteristics which are selectable between Inverse

Definite Minimum Time (IDMT), or Definite Time (DT). The third and fourth stages have definite time characteristics only. The inverse time delayed characteristics support both

IEC and IEEE curves and please refer to the Phase Fault Overcurrent Protection section for a detailed description. The user may choose to directionalize operation of the elements, for either forward or reverse fault protection for which a suitable relay characteristic angle may be set. Alternatively, the elements may be set as nondirectional.

For the NPS directional elements to operate, the relay must detect a polarizing voltage above a minimum threshold, " I2> V2pol Set ". When the element is selected as directional, a VTS Block option is available. When the relevant bit is set to 1, operation of the Voltage Transformer Supervision (VTS), will block the stage if directionalized. When set to 0, the stage will revert to non-directional upon operation of the VTS.

When enabled, the following signals are set by the negative sequence O/C logic according to the status of the monitored function.

Function

I2> Inhibit

I2>1 Tmr. Block

I2>2 Tmr. Block

I2>3 Tmr. Block

I2>4 Tmr. Block

I2>1 Start

I2>2 Start

I2>3 Start

I2>4 Start

I2>1 Trip

DDB

(DDB 562)

(DDB 563)

(DDB 564)

(DDB 565)

(DDB 566)

(DDB 567)

(DDB 568)

(DDB 569)

(DDB 570)

(DDB 571)

Description

Inhibit all 4 stages when high

Block timer on 1st stage when high

Block timer on 1st stage when high

Block timer on 1st stage when high

Block timer on 1st stage when high

1st stage started when high

2nd stage started when high

3rd stage started when high

4th stage started when high

1st stage tripped when high

I2>2 Trip

I3>3 Trip

(DDB 572)

(DDB 573)

2nd stage tripped when high

3rd stage tripped when high

I4>4 Trip (DDB 574) 4th stage tripped when high

Table 8 - Functions, DDB numbers and descriptions

All the above signals are available as DDB signals for mapping in Programmable Scheme

Logic (PSL). In addition the negative sequence overcurrent protection trips 1/2/3/4 are mapped internally to the block auto-reclose logic.

Negative sequence overcurrent protection starts 1/2/3/4 are mapped internally to the ANY

START DDB signal – DDB 736.

The non-directional and directional operation is shown in these diagrams:

Negative sequence overcurrent non-directional operation

Directionalizing the negative phase sequence overcurrent element

Page 5-108 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.33.1

(OP) 5 Operation

CTS Block n = 1, 2, 3, 4

I2 > Protection Inhibit

&

I2>n Start

Current Above I2>n Setting

& DT-n

0

I2>n Timer Block

Figure 65 - Negative sequence overcurrent non-directional operation

I2>n Trip

P1604ENa

CTS Block

I2> Protection Inhibit &

Current Above I2> Setting

Directional

Check

I2> Start

Polarising Voltage Above V2> Setting

&

Slow VTS Block

& DT

0

I2> Trip

I2> Timer Block

P1605ENb

Figure 66 - Directionalizing the negative phase sequence overcurrent element

Directionalizing the Negative Phase Sequence Overcurrent Element

Directionality is achieved by comparison of the angle between the negative phase sequence voltage and the negative phase sequence current. It may be selected to operate in either the forward or reverse direction.

A suitable relay characteristic angle setting ( I2> Char Angle ) is chosen to provide optimum performance. This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (- V

2

), in order to be at the centre of the directional characteristic.

For the negative phase sequence directional elements to operate, the relay must detect a polarizing voltage above a minimum threshold, I2> V2pol Set. The logic diagram for negative sequence overcurrent protection (shown with directional operation) is attached as the Directionalizing the negative phase sequence overcurrent element diagram below.

CTS Block

I2> Protection Inhibit &

Current Above I2> Setting

Directional

Check

I2> Start

Polarising Voltage Above V2> Setting

&

Slow VTS Block

& DT

0

I2> Trip

I2> Timer Block

P1605ENb

Figure 67 - Directionalizing the negative phase sequence overcurrent element

P54x/EN OP/Nd5 Page 5-109

(OP) 5 Operation

1.34

Operation of Individual Protection Functions

Undervoltage Protection

Both the under and overvoltage protection functions can be found in the relay menu Volt

Protection . The measuring mode (ph-N or ph-ph) and operating mode (single phase or

3 phase) for both stages are independently settable.

Stage 1 may be selected as either IDMT, DT or Disabled, within the V<1 function cell.

Stage 2 is DT only and is enabled/disabled in the V<2 status cell.

Two stages are included to provide both alarm and trip stages, where required.

Alternatively, different time settings may be required depending upon the severity of the voltage dip.

Outputs are available for single or three phase conditions via the V<Operate Mode cell.

When the protected feeder is de-energized, or the circuit breaker is opened, an undervoltage condition would be detected. Therefore, the V<Polehead Inh cell is included for each of the two stages to block the undervoltage protection from operating for this condition. If the cell is enabled, the relevant stage will become inhibited by the inbuilt pole dead logic within the relay. This logic produces an output when it detects either an open circuit breaker via auxiliary contacts feeding the relay opto inputs or it detects a combination of both undercurrent and undervoltage on any one phase.

The IDMT characteristic available on the first stage is defined by the formula: t = K/(1 - M)

Where:

K = t =

M =

Time multiplier setting

Operating time in seconds

Measured voltage/relay setting voltage (V< Voltage Set)

The logic diagram for the first stage undervoltage function is shown in the following

Undervoltage - single and three-phase tripping mode (single stage) diagram.

Page 5-110 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

SET :

V> Measurement

Mode

V>1 & V>2 Ph-Ph

V>1 & V>2 Ph-N

V>1Ph-Ph V>2Ph-N

V>1Ph-N V>2Ph-Ph

VA

VAB

VB

VBC

V> Voltage Set

V> Voltage Set

VC

VCA

Overvoltage Timer

Block (Single Stage)

V> Voltage Set

&

&

&

(IDMT/DT)

(IDMT/DT)

(IDMT/DT)

DDB V>1 A/AB START (797) or

DDB V>2 A/AB START (801)

DDB V>1 A/AB TRIP (692) or

DDB V>2 A/AB TRIP (696)

DDB V>1 B/BC START (798) or

DDB V>2 B/BC START (802)

DDB V>1 B/BC TRIP (693) or

DDB V>2 B/BC TRIP (697)

DDB V>1 C/CA START (799) or

DDB V>2 C/CA START (803)

DDB V>1 C/CA TRIP (694) or

DDB V>2 C/CA TRIP (698)

1

SET :

V> Operate

Mode

V>1 & V>2 Any Ph

V>1 & V>2 3Phase

V>1AnyPh V>2 3Ph

V>1 3Ph V>2AnyPh

1

1

&

&

1

DDB V>1 TRIP (691) or

DDB V>2 TRIP (695)

&

This logic represents Stage 1 only. Stage 2

DDB’s are shown for reference only. To convert to stage 2, also need to change the connections for V> Operate Mode to look at stage 2 settings.

1

&

&

&

1

DDB V>1 START (796) or

DDB V>2 START (800)

P1637ENg

Figure 68 - Undervoltage - single and three-phase tripping mode (single stage)

Note Undervoltage protection is phase segregated, but the operation of any phase is mapped to 3-phase tripping in the default PSL.

Each stage of Undervoltage protection may be disabled by a

DDB (471 or 472) Inhibit Vx<.

P54x/EN OP/Nd5 Page 5-111

(OP) 5 Operation

1.35

Operation of Individual Protection Functions

VA

VAB

VB

VBC

VC

VCA

All Poles Dead

VTS Fast Block

Overvoltage

Timer Block

(Single Stage)

Overvoltage Protection

Both the over and undervoltage protection functions can be found in the relay menu Volt

Protection. The measuring mode (ph-N or ph-ph) and operating mode (single phase or 3 phase) for both stages are independently settable.

The IDMT characteristic available on the first stage is defined by the following formula: t = K/(M - 1)

Where:

K t

=

=

M =

Time Multiplier Setting (TMS)

Operating Time in seconds

Measured voltage / relay setting voltage (V> Voltage Set)

The logic diagram of the first stage overvoltage function is shown in this diagram.

SET :

V< Measurement

Mode

V<1 & V<2 Ph-Ph

V<1 & V<2 Ph-N

V<1Ph-Ph V<2Ph-N

V<1Ph-N V<2Ph-Ph

V< Voltage Set

V< Voltage Set

V< Voltage Set

&

&

&

&

&

&

(IDMT/DT)

(IDMT/DT)

(IDMT/DT)

DDB V<1 A/AB START (789) or

DDB V<2 A/AB START (793)

DDB V<1 A/AB TRIP (684) or

DDB V<2 A/AB TRIP (688)

DDB V<1 B/BC START (790) or

DDB V<2 B/BC START (794)

DDB V<1 B/BC TRIP (685) or

DDB V<2 B/BC TRIP (689)

DDB V<1 C/CA START (791) or

DDB V<2 C/CA START (795)

DDB V<1 C/CA TRIP (686) or

DDB V<2 C/CA TRIP (690)

1

&

SET :

V< Operate

Mode

V<1 & V<2 Any Ph

V<1 & V<2 3Phase

V<1AnyPh V<2 3Ph

V<1 3Ph V<2AnyPh

1

1

&

&

1

DDB V<1 TRIP (683) or

DDB V<2 TRIP (687)

This logic represents Stage 1 only. Stage 2

DDB’s are shown for reference only. To convert to stage 2, also need to change the connections for V< Operate Mode to look at stage 2 settings.

1

&

1

DDB V<1 START (788) or

DDB V<2 START (792)

&

&

Figure 69 - Overvoltage - single and three-phase tripping mode (single stage)

P1636ENg

Page 5-112 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.35.1 Compensated Overvoltage

(OP) 5 Operation

P54x/EN OP/Nd5 Page 5-113

(OP) 5 Operation

1.36

Operation of Individual Protection Functions t = K/(1 - M)

Where:

K = Time multiplier setting t = Operating time in seconds

M = Remote Calculated voltage / relay setting voltage (PH-)

Residual Overvoltage (Neutral Displacement) Protection

The NVD element within the MiCOM P445/P44y/P54x/P841 is of two stage design, each stage having separate voltage and time delay settings. Stage 1 may be set to operate on either an IDMT or DT characteristic, whilst stage 2 may be set to DT only. Two stages are included for the NVD protection to account for applications which require both alarm and trip stages.

The relay internally derives the NVD voltage from the 3 input phases which must be supplied from either a 5-limb or three single-phase VT’s. These types of VT design allow the passage of residual flux and consequently permit the relay to derive the required residual voltage. In addition, the primary star point of the VT must be earthed. A three limb VT has no path for residual flux and is therefore unsuitable to supply the relay.

The IDMT characteristic available on the first stage is defined by the formula: t = K/(M - 1)

Where:

K = t =

M =

Time multiplier setting

Operating time in seconds

Derived residual voltage/relay setting voltage (VN> Voltage Set)

The functional block diagram of the first stage residual overvoltage is shown below:

1 st Stage V

N

> Start

V

N

>

&

&

(IDMT/

DT)

1 st Stage V

N

> Trip

VTS Block

V

N

> x Timer Block

P1635ENa

Figure 70 - Residual overvoltage logic (single stage)

Each stage of Residual Overvoltage protection may be disabled by a DDB (475 or 476)

Inhibit VN>x (x = 1, 2).

Page 5-114 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.37 Circuit Breaker Fail (CBF) Protection

(OP) 5 Operation

P54x/EN OP/Nd5

Figure 71 - Decaying dc component

Page 5-115

(OP) 5 Operation

1.37.1

Operation of Individual Protection Functions

In this software release, we have introduced a Zero Cross Detector (ZCD) to shorten the reset time. In some cases, it is preferable to record measured sample values of a variable waveform. However, we have found it acceptable to record the magnitude of the waveform. For example, see the Calculating a Zero Cross Detection Point using sample values diagram below.

1.00

0.90

0.80

0.70

0.60

0.50

0.40

0.30

0.20

0.10

0.00

-0.10

Waveform

Sample Values

Calculated

Zero Cross

Detection

Point

-0.20

P4967ENa

Figure 72 - Calculating a Zero Cross Detection Point using sample values

We have modified the CB Fail logic to incorporate the addition of ZCD signals with a time delayed drop off of 1/2 a cycle for each phase current and the SEF current. These are logically combined with the output of the breaker fail timers to determine breaker fail trip operation.

The objective of this software release is to improve the reset performance of the CB Fail.

The target reset time is ¾ cycle (i.e. 15ms for a 50Hz signal).

The CBF timer settings have the same setting range as the existing design but the step size has been reduced from 10ms to 1ms.

Reset Mechanisms for Breaker Fail Timers

The operation of this function depends on the Software Version which is used by the relay. The relevant software is as follows:

Prior to Software D1

Software Version D1 and later

Page 5-116 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Prior to Software Version D1

It is common practice to use low set undercurrent elements in protection relays to indicate that Circuit Breaker (CB) poles have interrupted the fault or load current, as required. This covers the following situations:

Where CB auxiliary contacts are defective, or cannot be relied on to definitely indicate that the CB has tripped.

Where a CB has started to open but has become jammed. This may result in continued arcing at the primary contacts, with an additional arcing resistance in the fault current path. Should this resistance severely limit fault current, the initiating protection element may reset. Therefore reset of the element may not give a reliable indication that the CB has opened fully.

For any protection function requiring current to operate, the relay uses operation of undercurrent elements (I<) to detect that the necessary circuit breaker poles have tripped and reset the CB fail timers. However, the undercurrent elements may not be reliable methods of resetting circuit breaker fail in all applications. For example:

Where non-current operated protection, such as under/overvoltage derives measurements from a line connected voltage transformer. Here, I< only gives a reliable reset method if the protected circuit would always have load current flowing. Detecting drop-off of the initiating protection element might be a more reliable method.

Similarly, where the distance scheme includes Weak Infeed (“WI”) trip logic, the reset of the WI trip condition should be used in addition to the undercurrent check.

Set: WI Prot Rese’ = Enabled.

Where non-current operated protection, such as under/overvoltage derives measurements from a busbar connected voltage transformer. Again using I< would rely upon the feeder normally being loaded. Also, tripping the circuit breaker may not remove the initiating condition from the busbar, and hence drop-off of the protection element may not occur. In such cases, the position of the circuit breaker auxiliary contacts may give the best reset method.

Resetting of the CBF is possible from a breaker open indication (from the relay’s pole dead logic) or from a protection reset. In these cases, resetting is only allowed provided the undercurrent elements have also reset. The resetting options are summarized in the

Initiation (menu selectable) and CB fail timer reset mechanism table.

Initiation (menu selectable) CB fail timer reset mechanism

Current based protection

(e.g. 50/51/46/21/67)

Non-current based protection

(e.g. 27/59)

External protection

The resetting mechanism is fixed

[ΙA< operates] &

[ΙB< operates] &

[ΙC< operates] &

[ΙN< operates]

Three options are available. The user can Select from the following options:

[All Ι< and ΙN< elements operate]

[Protection element reset] AND

[All Ι< and N< elements operate]

CB open (all 3 poles) AND

[All I< and ΙN< elements operate]

Three options are available: The user can select any or all of the options.

[All Ι< and ΙN< elements operate]

[External trip reset] AND

[All Ι< and ΙN< elements operate]

CB open (all 3 poles) AND

[All Ι< and ΙN< elements operate]

Table 9 - Initiation (menu selectable) and CB fail timer reset mechanism

P54x/EN OP/Nd5 Page 5-117

(OP) 5 Operation Operation of Individual Protection Functions

The complete breaker fail logic is shown in these diagrams:

CB Fail CB1 logic part 1 after modification

CB Failure CB1 logic changes part 2

Page 5-118 P54x/EN OP/Nd5

Operation of Individual Protection Functions

INTSIG Current Prot SEF Trip

INTSIG ISEF < Fast Undercurrent

WI Prot Reset = Enable

DDB Aid1 WI Trip 3Ph (642)

DDB Aid2 WI Trip 3Ph (652)

DDB Aided 1 WI Trip A (637)

DDB Aided 2 WI Trip A (647)

DDB Aided 1 WI Trip B (638)

DDB Aided 2 WI Trip B (648)

DDB Aided 1 WI Trip C (639)

DDB Aided 2 WI Trip C (649)

DDB CB1 External Trip A (535)

DDB Pole Dead A (892)

INTSIG IA<Fast Undercurrent CB1

Setting CB1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

INTSIG Any Trip Phase A CB1

INTSIG IA<Fast Undercurrent CB1

INTSIG Any Trip Phase B CB1

INTSIG IB<Fast Undercurrent CB1

INTSIG Any Trip Phase C CB1

INTSIG IC<Fast Undercurrent CB1

‘0’

DDB CB1 External Trip B (536)

DDB Pole Dead B (893)

INTSIG IB<Fast Undercurrent CB1

Setting CB1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

DDB CB1 External Trip C (537)

DDB Pole Dead C (894)

INTSIG IC<Fast Undercurrent CB1

‘0’

‘0’

Setting CB1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

DDB CB1 External Trip 3 ph (534)

INTSIG IA<Fast Undercurrent CB1

INTSIG IB<Fast Undercurrent CB1

INTSIG IC<Fast Undercurrent CB1

DDB All Poles Dead (890)

DDB Pole Dead A (892)

DDB Pole Dead B (893)

DDB Pole Dead C (894)

DDB Any Trip (522)

Any Voltage Trip ( NON_I_Prot)

INTSIG IA<Fast Undercurrent CB1

INTSIG IB<Fast Undercurrent CB1

INTSIG IC<Fast Undercurrent CB1

DDB All Poles Dead (890)

DDB Pole Dead A (892)

DDB Pole Dead B (893)

DDB Pole Dead C (894)

Figure 73 - CB Fail CB1 logic part 1 after modification

P54x/EN OP/Nd5

(OP) 5 Operation

INTSIG TripStateSEF

INTSIG WI INFEED A

INTSIG WI INFEED B

INTSIG WI INFEED C

INTSIG

TripStateA

INTSIG

TripStateB

INTSIG

TripStateC

INTSIG Latch ATrip

Reset Incomp

INTSIG Latch BTrip

Reset Incomp

INTSIG Latch CTrip

Reset Incomp

‘0’

Setting CB1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

INTSIG Latch 3phTrip

Reset Incomp

‘0’

Setting CB1

Non_I_ Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

INTSIG Latch

NonITrip Reset Incomp

P4987ENa

Page 5-119

(OP) 5 Operation

INTSIG Latch ATrip Reset Incomp

INTSIG Latch BTrip Reset Incomp

INTSIG Latch CTrip Reset Incomp

INTSIG Latch 3phTrip Reset Incomp

INTSIG Latch NonITrip Reset Incomp

SET:

CB1 Fail 1 Status

Enable

Disable

SET:

CB1 Fail 2

Status

Enable

Disable

INTSIG CB1 ZCD State A

INTSIG WI INFEED A

INTSIG TripStateA

INTSIG CB1 ZCD State B

INTSIG WI INFEED B

INTSIG TripStateB

INTSIG CB1 ZCD State C

INTSIG WI INFEED C

INTSIG TripStateC

SET:CB Fail 2 Timer t

0

INTSIG ZCDStateSEF

INTSIG TripStateSEF

SET:CB Fail 1 Timer t

0

Figure 74 - CB Failure CB1 logic changes part 2

SET:CB Fail 2 Timer t

0

SET:CB Fail 1 Timer t

0

SET:CB Fail 2 Timer t

0

SET:CB Fail 1 Timer t

0

SET:CB Fail 2 Timer t

0

SET:CB Fail 1 Timer t

0

Operation of Individual Protection Functions

DDB CB1 Fail1

Trip (834)

DDB CB1

Fail Alarm

(298)

DDB CB1 Fail2

Trip (835)

DDB CB1 Fail1

Trip A (1672)

DDB CB1 Fail2

Trip A (1675)

DDB CB1 Fail1

Trip B (1673)

DDB CB1 Fail2

Trip B (1676)

DDB CB1 Fail1

Trip C (1674)

DDB CB1 Fail2

Trip C (1677)

P4988ENa

Page 5-120 P54x/EN OP/Nd5

Operation of Individual Protection Functions (OP) 5 Operation

Software Version D1 and Later

Introduction

Circuit Breaker Failure (CBF) protection monitors whether the Circuit Breaker (CB) has opened in an acceptable time period after the protection devices have issued trip commands in response to a system fault condition. This is required to prevent further damage in the power system and isolate the fault in transmission or sub-transmission systems. The feature provides the facility to reset the CB failure condition via an external source (e.g. via an opto status input etc).

CB Fail External Reset

The CB Fail external reset functionality has been modified as follows:

New DDB signals have been added to reset the individual CB phase failure logic triggers, a separate DDB for all (i.e. three) phase triggers and a separate DDB for sensitive earth fault conditions. An additional four signals have been added for second circuit breaker for dual CB relay variants.

To achieve desired functionality, individual external reset signals are now connected via an OR gate together with the corresponding phase undercurrent signal at each stage of the logic in CB failure logic. After modification, the resultant CB failure logic looks like the ones shown in these figures:

CB Failure CB1 logic changes part 1

CB Failure CB1 logic changes part 2

The figures show failure logic for CB1 only, but the same logic also applies to CB2 functionality.

P54x/EN OP/Nd5 Page 5-121

(OP) 5 Operation Operation of Individual Protection Functions

INTSIG Current Prot SEF Trip

INTSIG ISEF < Fast Undercurrent

DDB Ext Rst CBF SEF (1719)

WI Prot Reset = Enable

DDB Aid1 WI Trip 3 Ph (642)

DDB Aid2 WI Trip 3 Ph (652)

DDB Aided 1 WI Trip A (637)

DDB Aided 2 WI Trip A (647)

DDB Aided 1 WI Trip B (638)

DDB Aided 2 WI Trip B (648)

DDB Aided 1 WI Trip C (639)

DDB Aided 2 WI Trip C (649)

DDB CB1 External Trip A (535)

DDB Pole Dead A (892)

INTSIG IA<Fast Undercurrent CB1

DDB Ext Rst CBF A (1716)

1

1

1

1

1

1

S

R

D

Q

&

&

&

&

&

&

2

1

0

1

1

1

S

Q

R

D

Setting CB 1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

DDB CB1 External Trip B (536)

DDB Pole Dead B (893)

INTSIG IB<Fast Undercurrent CB1

DDB Ext Rst CBF B (1717) 1

&

&

&

&

‘0’

&

‘0’

&

&

2

1

0

2

1

0

2

1

0

2

1

0

S

Q

R

D

Setting CB 1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

DDB CB1 External Trip C (537)

DDB Pole Dead C (894)

INTSIG IC<Fast Undercurrent CB1

DDB Ext Rst CBF C (1718) 1

&

S

Q

R

D

Setting CB 1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

&

&

2

1

0

‘0’

DDB CB1 External Trip 3 ph (534)

DDB Ext Rst CBF 3ph (1715)

INTSIG IA<Fast Undercurrent CB1

DDB Ext Rst CBF A (1716)

INTSIG IB<Fast Undercurrent CB1

DDB Ext Rst CBF B (1717)

INTSIG IC<Fast Undercurrent CB1

DDB Ext Rst CBF C (1718)

DDB All Poles Dead (890)

DDB Pole Dead A (892)

DDB Pole Dead B (893)

DDB Pole Dead C (894)

DDB Any Trip (522)

Any Voltage Trip (NON_I_Prot)

DDB Ext Rst CBF 3ph (1715)

INTSIG IA<Fast Undercurrent CB1

DDB Ext Rst CBF A (1716)

INTSIG IB<Fast Undercurrent CB1

DDB Ext Rst CBF B (1717)

INTSIG IC<Fast Undercurrent CB1

DDB Ext Rst CBF C (1718)

DDB All Poles Dead (890)

DDB Pole Dead A (892)

DDB Pole Dead B (893)

DDB Pole Dead C (894)

1

1

1

&

1

1

1

&

&

&

&

1

1

1

1

&

&

&

&

Figure 75 - CB Failure CB1 logic changes part 1

&

&

2

1

0

2

1

0

‘0’

&

&

0

2

1

2

1

0

‘0’

INTSIG Any Trip Phase A CB1

INTSIG IA < Fast Undercurrent CB1

DDB Ext Rst CBF A (1716) 1

INTSIG Any Trip Phase B CB1

INTSIG IB < Fast Undercurrent CB1

DDB Ext Rst CBF B (1717) 1

INTSIG Any Trip Phase C CB1

INTSIG IC < Fast Undercurrent CB1

DDB Ext Rst CBF C (1718) 1

S

R

D

Q

S

R

D

Q

S

R

D

Q

S

R

D

Q

Setting CB 1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

S

R

D

Setting CB 1

Ext Trip Reset

0 I < Only

1 CB Open & I <

2 Prot Reset & I <

Q

1

1

INTSIG TripStateSEF

INTSIG WI INFEED A

INTSIG WI INFEED B

INTSIG WI INFEED C

IntSig TripStateA

1

IntSig TripStateB

1

IntSig TripStateC

INTSIG Latch A Trip Reset Incomp

INTSIG Latch B Trip Reset Incomp

INTSIG Latch C Trip Reset Incomp

INTSIG Latch 3ph Reset Incomp

INTSIG Latch NonITrip Reset Incomp

P0647ENb

Page 5-122 P54x/EN OP/Nd5

Operation of Individual Protection Functions

INTSIG Latch ATrip Reset Incomp

1

INTSIG Latch BTrip Reset Incomp

1

INTSIG Latch CTrip Reset Incomp

INTSIG Latch 3phTrip Reset Incomp

INTSIG Latch NonITrip Reset Incomp

SET:

CB1 Fail 1 Status

Enable

Disable

SET:

CB1 Fail 2 Status

Enable

Disable

INTSIG CB1 ZCD State A

INTSIG IA<Fast Undercurrent CB1

DDB Ext Rst CBF A (1716)

1

1

&

&

INTSIG WI INFEED A

INTSIG TripStateA

&

&

1

SET:CB Fail 1 Timer t

0

1

SET:CB Fail 2 Timer t

0

&

&

DDB Ext Rst CBF 3PH (1715)

INTSIG CB1 ZCD State B

INTSIG IB<Fast Undercurrent CB1

DDB Ext Rst CBF B (1717)

INTSIG WI INFEED B

INTSIG TripStateB

1

1

&

SET:CB Fail 1 Timer t

0

&

&

SET:CB Fail 2 Timer t

0

INTSIG CB1 ZCD State C

INTSIG IC<Fast Undercurrent CB1

DDB Ext Rst CBF C (1718)

INTSIG WI INFEED C

INTSIG TripStateC

1

&

SET:CB Fail 1 Timer t

0

INTSIG ZCDStateSEF

INTSIG TripStateSEF

&

&

SET:CB Fail 2 Timer t

0

1

SET:CB Fail 1 Timer t

0

1

&

SET:CB Fail 2 Timer t

0

Figure 76 - CB Failure CB1 logic changes part 2

1

1

&

&

&

&

&

P54x/EN OP/Nd5

(OP) 5 Operation

1

1

DDB CB1 Fail1 Trip (834)

1 DDB CB1 Fail Alarm(298)

DDB CB1 Fail2 Trip (835)

1

DDB CB1 Fail1 Trip A (1672)

DDB CB1 Fail2 Trip A (1675)

DDB CB1 Fail1 Trip B (1673)

DDB CB1 Fail2 Trip B (1676)

DDB CB1 Fail1 Trip C (1674)

DDB CB1 Fail2 Trip C (1677)

P0648ENa

Page 5-123

(OP) 5 Operation

1.38

Operation of Individual Protection Functions

The Following DDB signals have been added (Single CB Variants).

DDB No.

1715

1716

1717

1718

1719

English Text

Ext Rst CBF

Ext Rst CBF A

Ext Rst CBF B

Ext Rst CBF C

Ext Rst SEF CBF

Source

PSL

PSL

PSL

PSL

PSL

Description

External Reset for CB 3 phase fail.

External Reset for CB A phase fail.

External Reset for CB B phase fail.

External Reset for CB C phase fail.

External Reset for SEF CB phase fail.

The Following DDB signals have been added (Dual CB Variants).

DDB No.

1715

1716

1717

1718

1719

1720

1721

1722

1723

English Text

Ext Rst CB1F

Ext Rst CB1F A

Ext Rst CB1F B

Ext Rst CB1F C

Ext Rst SEF CBF

Ext Rst CB2F

Ext Rst CB2F A

Ext Rst CB2F B

Ext Rst CB2F C

Source

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Description

External Reset for CB1 3 phase fail.

External Reset for CB1 A phase fail.

External Reset for CB1 B phase fail.

External Reset for CB1 C phase fail.

External Reset for SEF CB phase fail.

External Reset for CB2 3 phase fail.

External Reset for CB2 A phase fail.

External Reset for CB2 B phase fail.

External Reset for CB2 C phase fail.

The above DDBs are available to the PSL and can be mapped to (e.g.) opto status inputs, function keys, control inputs etc. as required by the specific application.

Broken Conductor Detection

The relay incorporates an element which measures the ratio of negative to positive phase sequence current (I

2

/I

1

). This will be affected to a lesser extent than the measurement of negative sequence current alone, since the ratio is approximately constant with variations in load current. Hence, a more sensitive setting may be achieved.

The Broken conductor logic diagram is as shown below. The ratio of I2/I1 is calculated and is compared with the threshold and if the threshold is exceeded then the delay timer is initiated. The CTS block signal is used to block the operation of the delay timer.

I1

I2

I2/I1 Above

Threshold

&

CTS Block

Figure 77 - Broken conductor logic

Delay Timer Broken Conductor Trip

P1639ENa

Page 5-124 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.39

(OP) 5 Operation

Frequency Protection

The P445/P44y/P54x/P841 feeder relay includes 4 stages of underfrequency and 2 stages of overfrequency protection to facilitate load shedding and subsequent restoration.

The underfrequency stages may be optionally blocked by a pole dead (CB Open) condition. All the stages may be enabled/disabled in the " F<n Status " or " F>n Status " cell depending on which element is selected.

The logic diagram for the underfrequency logic is as shown in the following

Underfrequency logic (single stage) diagram. Only a single stage is shown. The other three stages are identical in functionality.

If the frequency is below the setting and not blocked the DT timer is started. Blocking may come from the All_Poledead signal (selectively enabled for each stage) or the underfrequency timer block.

If the frequency cannot be determined, the function is also blocked.

1

Underfrequency

Start

Underfrequency

&

& DT Underfrequency Trip

All Pole Dead

1

Freq. Not Found

Underfrequency Timer Block P1640ENa

Figure 78 - Underfrequency logic (single stage)

The functional logic for the overfrequency function as shown in the Overfrequency logic

(single stage) diagram. Only a single stage is shown as the other stages are functionally identical. If the frequency is above the setting and not blocked the DT timer is started and after this has timed out the trip is produced. Blocking may come from the

All_Poledead signal (selectively enabled for each stage) or the overfrequency timer block.

1

Overfrequency

Start

Overfrequency

&

& DT

Overfrequency

Trip

All Pole Dead

1

Freq. Not Found

Overfrequency Timer Block

P1641ENa

Figure 79 -Overfrequency logic (single stage)

When enabled, the following signals are set by the under/overfrequency logic according to the status of the monitored functions.

P54x/EN OP/Nd5 Page 5-125

(OP) 5 Operation Operation of Individual Protection Functions

Function DDb Description Function

F<1 Timer Block (DDB 1149) Block Underfrequency Stage 1 Timer F<1 Trip

F<2 Timer Block (DDB 1150) Block Underfrequency Stage 2 Timer F<2 Trip

F<3 Timer Block (DDB 1151) Block Underfrequency Stage 3 Timer F<3 Trip

F<4 Timer Block (DDB 1152) Block Underfrequency Stage 4 Timer F<4 Trip

F>1 Timer Block (DDB 1153) Block Overfrequency Stage 1 Timer F>1 Trip

F>2 Timer Block (DDB 1154) Block Overfrequency Stage 2 Timer F>2 Trip

F<1 Start (DDB 1155) Underfrequency Stage 1 Start Inhibit F<1

F<2 Start

F<3 Start

F<4 Start

F>1 Start

F>2 Start

(DDB 1156) Underfrequency Stage 2 Start

(DDB 1157) Underfrequency Stage 3 Start

(DDB 1158) Underfrequency Stage 4 Start

(DDB 1159) Overfrequency Stage 1 Start

(DDB 1160) Overfrequency Stage 2 Start Inhibit F>2

Table 10 - Functions, DDB numbers and descriptions

Inhibit F<2

Inhibit F<3

Inhibit F<4

Inhibit F>1

DDb Description

(DDB 1161) Underfrequency Stage 1 Trip

(DDB 1162) Underfrequency Stage 2 Trip

(DDB 1163) Underfrequency Stage 3 Trip

(DDB 1164) Underfrequency Stage 4 Trip

(DDB 1165) Overfrequency Stage 1 Trip

(DDB 1166) Overfrequency Stage 2 Trip

(DDB 1167)

(DDB 1168)

(DDB 1169)

(DDB 1170)

(DDB 1171)

(DDB 1172)

Inhibit stage 1 Under frequency protection

Inhibit stage 2 Under frequency protection

Inhibit stage 3 Under frequency protection

Inhibit stage 4 Under frequency protection

Inhibit stage 1 Over frequency protection

Inhibit stage 2 Over frequency protection

Page 5-126 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.40

(OP) 5 Operation

Independent Rate of Change of Frequency Protection [81R]

In the load shedding scheme below, it is assumed under falling frequency conditions that by shedding a stage of load, the system can be stabilized at frequency f2. For slow rates of decay, this can be achieved using the underfrequency protection element set at frequency f1 with a suitable time delay. However, if the generation deficit is substantial, the frequency will rapidly decrease and it is possible that the time delay imposed by the underfrequency protection will not allow for frequency stabilization. In this case, the chance of system recovery will be enhanced by disconnecting the load stage based upon a measurement of rate of change of frequency and bypassing the time delay.

This element is a plain rate of change of frequency monitoring element, and is not supervised by a frequency setting as per the “f+df/dt” element. However, a timer is included to provide a time delayed operation. The element can be utilized to provide extra flexibility to a load shedding scheme in dealing with severe load to generation imbalances.

Since the rate of change monitoring is independent of frequency, the element can identify frequency variations occurring close to nominal frequency and therefore provide early warning to the operator on a developing frequency problem. Additionally, the element could also be used as an alarm to warn operators of unusually high system frequency variations.

Frequency fn

1.40.1

P54x/EN OP/Nd5 f

1

Slow decay f

2

Rapid decay

Time

P4008ENc

Figure 80 -Rate of change of frequency protection

Basic Functionality

The relay provides four independent stages of rate of change of frequency protection

(df/dt+t). Depending upon whether the rate of change of frequency setting is set positive or negative, the element will react to rising or falling frequency conditions respectively, with an incorrect setting being indicated if the threshold is set to zero. The output of the element would normally be given a user-selectable time delay, although it is possible to set this to zero and create an instantaneous element.

An Independent setting is available for calculating the rate of change of frequency measurement, df/dt Avg. Cycles over a fixed period of either 6 or 12 cycles. This provides the ability to de-sensitize the frequency based protection element against oscillations in the power system frequency. The 12-cycle averaging window setting improves measurement accuracy, but slows down the protection start time following fault inception.

The maximum fault detection start time following fault inception can be approximated as:

Fault Detection Delay Time (cycles) = 2 X M + 1

Page 5-127

(OP) 5 Operation Operation of Individual Protection Functions

Where M = No. of frequency averaging cycles df/dt.Av. Cycles

When enabled, the following signals are set by the df/dt logic according to the status of the monitored function.

Function df/dt> Inhibit df/dt>1 Tmr. Block df/dt>2 Tmr. Block df/dt>3 Tmr. Block df/dt>4 Tmr. Block df/dt>1 Start df/dt>2 Start df/dt>3 Start df/dt>4 Start df/dt>1 Trip df/dt>2 Trip

DDB

(DDB 592)

(DDB 593)

(DDB 594)

(DDB 595)

(DDB 596)

(DDB 597)

(DDB 598)

(DDB 599)

(DDB 600)

(DDB 601)

(DDB 602)

Description

Inhibit all 4 stages when high

Block timer on 1st stage when high

Block timer on 2nd stage when high

Block timer on 3rd stage when high

Block timer on 4th stage when high

1st stage started when high

2nd stage started when high

3rd stage started when high

4th stage started when high

1st stage tripped when high

2nd stage tripped when high df/dt>3 Trip (DDB 603) 3rd stage tripped when high df/dt>4 Trip (DDB 604) 4th stage tripped when high

Table 11 - Functions, DDB numbers and descriptions

All the above signals are available as DDB signals for mapping in Programmable Scheme

Logic (PSL).

Page 5-128 P54x/EN OP/Nd5

Operation of Individual Protection Functions

1.41

(OP) 5 Operation

Special Weak Infeed Logic for Stub End Transformer Terminals

The true weak infeed condition is when no current based protection element is sensitive enough to operate. This is the case when zero or minimal generation is connected at that terminal, and the prospective level of fault current flowing through the CT is insufficient for any forward/reverse protection operation. In such cases, the fault will be cleared using either POR or Blocking schemes and enabling WI Echo + Trip.

However, there could be a specific configuration as shown in the Weak infeed configuration on stub-fed radial circuit (parallel line is out of service) diagram that may not be detected by relay as a weak infeed condition, even if there is no generation at that end

(left side - relay R2).

Zs

F2

G

R2 F1

R1

P4095ENa

Figure 81 - Weak infeed configuration on stub-fed radial circuit (parallel line is out of service)

The reason is a star earthed transformer which, in case of phase to ground and double phase to ground faults, imposes a very low zero sequence impedance and almost infinite positive and negative sequence impedance, i.e. behaving as a source of zero sequence current only. In such a case, the zero sequence current Io will dominate over I1 and I2 at the weak end, where all three-phase currents will approximately equal Io (all in phase and equal in magnitude). This is true for F1 earth faults at R2, and for F2 earth faults at R1 and R2. The phase currents will be sufficient to pickup current level detectors in the

MiCOM P44/P44y/P54x, and a true weak infeed condition will not be seen as such by the relay.

In such a stub-end feeding case, relay R2 may experience some overreach in the case of double-phase to ground faults. This is caused by the unusual current distribution making the MiCOM P445/P44y/P54x detect a single-phase fault condition (and potential single pole tripping only in single pole tripping applications).

For this unusual feeding arrangement, the MiCOM P445/P44y/P54x makes available a

Zero sequence stabilizing feature, that measures the dominance of zero sequence current over negative sequence current (Io/ I2). It promotes stability by forcing the relay to recognize the above configuration as a WI condition. It then blocks all distance elements, once the measured Io/ I2 ratio exceeds the setting.

P54x/EN OP/Nd5 Page 5-129

(OP) 5 Operation

Notes:

Operation of Individual Protection Functions

Page 5-130 P54x/EN OP/Nd5

Communications between Relays

2

2.1

2.1.1

2.1.2

COMMUNICATIONS BETWEEN RELAYS

(OP) 5 Operation

Communications Link Options

A number of communications options are available, for the communication channels between P54x system ends. The various connection options are shown below. Choosing between each of these options will depend on the type of communications equipment that is available.

Where existing suitable multiplexer communication equipment is installed for other communication between substations, the 850 nm option together with an appropriate ITU-

T compatible electrical interface (P590 series unit) should be selected to match the existing multiplexer equipment. For further information on the P590 optical fibre to electrical interface units, refer to the P590 Series Optical Fiber to Electrical Interface Units section.

Where an IEEE C37.94 compatible multiplexer is installed the 850 nm option should be configured to interface directly to the multiplexer, refer to the IEEE C37.94 Interface to

Multiplexer section.

Where no multiplexer is installed, the direct optical fibre connection can be used, refer to these sections:

Direct Optical Fiber Link, 850 nm Multi-Mode Fiber

Direct Optical Fiber Link, 1300 nm Multi-Mode Fiber

Direct Optical Fiber Link, 1300 nm Single-Mode Fiber

Direct Optical Fiber Link, 1550 nm Single-Mode Fiber

The type of fibre used (multi-mode or single-mode and wavelength) will be determined by the distance between the ends of the P54x relay system, refer to optical budgets in the

Application Notes chapter.

In any configuration, except the IEEE C37.94, the data rate may be selected as either

64kbit/sec or 56kbit/sec.

Direct Optical Fiber Link, 850 nm Multi-Mode Fiber

The relays are connected directly using two 850 nm multi-mode optical fibres for each signaling channel. Multi-mode fibre type 50/125

µ m or 62.5/125

µ m is suitable. BFOC/2.5 type fibre optic connectors are used. These are commonly known as “ST” connectors.

This is typically suitable for connection up to 1km.

P540

850nm

Optical fibre

P540

850nm

P2401ENa

Figure 82 - P540 850nm optical fibre connections

Direct Optical Fiber Link, 1300 nm Multi-Mode Fiber

The relays are connected directly using two 1300 nm multi-mode fibres for each signaling channel. Multi-mode fibre type 50/125

µ m or 62.5/125

µ m is suitable. BFOC/2.5 type fibre optic connectors are used.

This is typically suitable for connection up to approximately 50 km (from April 2008).

Pre-April 2008 relays were suitable for connection up to approximately 30 km.

P54x/EN OP/Nd5 Page 5-131

(OP) 5 Operation

2.1.3

2.1.4

2.1.5

Page 5-132

Communications between Relays

P540

1300nm

Optical fibre

P540

1300nm

P2402ENa

Figure 83 - P540 1300nm optical fibre connections

Direct Optical Fiber Link, 1300 nm Single-Mode Fiber

The relays are connected directly using two 1300 nm single-mode fibers, type 9/125

µ m for each signaling channel. BFOC/2.5 type fibre optic connectors are used.

This is typically suitable for connection up to approximately 100 km (from April 2008).

Pre-April 2008 relays were suitable for connection up to approximately 60 km.

P540

1300nm

Optical fibre

P540

1300nm

P2402ENa

Figure 84 - P540 1300nm optical fibre connections

Direct Optical Fiber Link, 1550 nm Single-Mode Fiber

The relays are connected directly using two 1550 nm single-mode fibers, type 9/125

µ m for each signaling channel. BFOC/2.5 type fibre optic connectors are used.

This is typically suitable for connection up to approximately 130 km (from April 2008).

Pre-April 2008 relays were suitable for connection up to approximately 80 km.

P540

1550nm

Optical fibre

P540

1550nm

P2403ENa

Figure 85 - P540 1550nm optical fibre connections

The list of all available fibre channel options is:

820 nm dual channel

1300 nm single-mode/single channel

1300 nm single-mode/dual channel

1300 nm multi-mode/single channel

1300 nm multi-mode/dual channel

1550 nm single-mode/single channel

1550 nm single-mode/dual channel

Ch 1 850nm multi-mode + Ch 2 1300nm single-mode

Ch 1 850nm multi-mode + Ch 2 1550nm single-mode

Ch 1 1300nm single-mode + Ch 2 850nm multi-mode

Ch 1 1300nm multi-mode + Ch 2 850nm multi-mode

Ch 1 1550nm single-mode + Ch 2 850nm multi-mode

IEEE C37.94 Interface to Multiplexer

A P54x relay with 850 nm short haul optical interface is connected directly to the multiplexer by 850 nm multi-mode optical fiber. Multi-mode fibre type 50/125

µ m or

62.5/125

µ m is suitable. BFOC/2.5 type fibre optic connectors are used.

The setting Comms Mode should be set to IEEE C37.94.

P54x/EN OP/Nd5

Communications between Relays (OP) 5 Operation

2.1.6

P54x/EN OP/Nd5

Note The relay must be powered off and on before this setting change becomes effective.

The IEEE C37.94 standard defines an N*64kbits/s standard where N can be 1 – 12. N can be selected on the P54x or alternatively set to Auto in which case the relay will configure itself to match the multiplexer.

Switched Communication Networks

The P54x relays make use of digital communication signaling channels for the differential protection. For correct operation of this protection element, it is essential that the integrity of this link is continuously checked. For P54x relays, when GPS is not used it is also a requirement of this link that ‘go’ (tp1) and ‘return’ (tp2) times are similar (a difference of up to 1 ms can be tolerated). Times greater than this can result in relay instability.

Where switched communications networks are used, it is possible that during switching, a transient time period may exist with different ‘go’ and ‘return’ times. All P54x relays include a facility to ensure protection stability during this transient period.

One of the checks performed on the communications link is a check on the calculated propagation delay for each data message. During normal operation the difference in calculated time should be minimal (possible delays being introduced by multiplexers or other intermediary communication equipment). If successive calculated propagation delay times exceed a user settable value (250 – 1000

µ s). The P54x raise a comm delay alarm and initiate a change in relay setting for a short time period (Char Mod Time setting) to overcome any switching delay. This change in setting is shown in the P54x connection to P591 diagram whereby the relay bias setting, k1, is increased to 200%.

This characteristic provides stability for all load conditions and will still allow tripping for most internal fault conditions.

The Switched communication network diagram shows a possible scenario for a switched network. Initially the P54x relays are communicating via path 1. The go and return times for this path are 2 ms and hence the calculated propagation delay is (2 + 2)/2 = 2 ms.

When the channel is switched to path 2, a small time period exists where the P54x’s could be sending messages via path 1 and returning via path 2.

The calculated propagation delay will now be (2 + 5)/2 = 3.5 ms. The resultant 1.5 ms error at each line end may cause the relay to maloperate due to incorrect time alignment of current vectors (see the Time Alignment of Current Vectors Without GPS (traditional technique) section). After a short delay, both ‘go’ and ‘return’ paths will follow route 2 and the calculated propagation delay will be (5 + 5)/2 = 5 ms. The relay will now be stable, as correct current vector time alignment exists at each line end.

The Char Mod timer is started when a change in propagation delay is detected. Any subsequent change during this period will cause the timer to restart. In the above example the timer will start for the first change (2 to 3.5 ms). The second change (3.5 ms to 5 ms) will cause the timer to restart, therefore allowing for multiple switching between communication paths.

A change in propagation delay may result in a temporary failure of the protection communications channel. If this occurs, the propagation delay change may not be detected by the relay. To overcome this problem, the Char Mod Timer is re-started when the channel recovers from a protection communications channel failure if the Char Mod

Timer was running when the channel failure occurred.

When Char Mod Ex is enabled and if the Char Mod Time has started then the Char

Mod Ex Timer runs. If at the end of this timer and until Char Mod Time has expired, the bias current is above 5% In, and differential current is below 10% of bias current on all phases, then the Char Mod Time will reset and the characteristic will return to normal. If these conditions are not met, then the characteristic remains increased for the duration of the Char Mod Time . Char Mod Ex Timer should be set greater than the minimum switching delay expected, and less than Char Mod Time .

Page 5-133

(OP) 5 Operation Communications between Relays

Page 5-134

Figure 86 - Switched communication network

I

1

I

2

I diff

= | I

1

+ I

2

+ I

3

|

I

3

Operate

Transient bias slope k

2

Restrain slope k

1

I s1 Normal bias

I s2

Figure 87 - Transient bias characteristic

I bias

=

| I

1

|+| I

2

|+| I

3

|

2

P1032ENb

P54x/EN OP/Nd5

Communications between Relays

2.1.7

2.1.8

2.1.9

(OP) 5 Operation

Switched Communication Networks with Permanent or Semi-Permanent

Split Routings

P54x relays, using timing information from the GPS system, are suitable for use on switched communication signaling channels for the differential protection. For correct operation of this protection element, it is essential that the integrity of this link is continuously checked. It is not, however, a requirement that ‘go’ (tp1) and ‘return’ (tp2) times are similar if the GPS synchronization feature is used.

P590 Series Optical Fiber to Electrical Interface Units

In order to connect the P54x relays via a Pulse Code Modulation (PCM) multiplexer network or digital communication channel, Type P590 type interface units are required.

The following interface units are available:

P591 interface to multiplexing equipment supporting ITU-T (formerly CCITT)

Recommendation G.703 co-directional electrical interface

P592 interface to multiplexing equipment supporting ITU-T Recommendation V.35 electrical interface

P593 interface to multiplexing or ISDN equipment supporting ITU-T

Recommendation X.21 electrical interface

The data rate for each unit can be 56 kbit/sec or 64 kbit/sec as required for the data communications link.

One P590 unit is required per relay data channel (i.e. for each transmit and receive signal pair). It provides optical to electrical and electrical to optical signal conversion between the P54x relay and the multiplexer. The interface unit should be located as close to the

PCM multiplexer as possible, to minimize any effects on the data of electromagnetic noise or interference.

The units are housed in a 20TE MiCOM case.

Fibre optic connections to the unit are made through BFOC/2.5 type connectors, more commonly known as ‘ST’ connectors.

The optical characteristics are similar to the P54x 850 nm multi-mode fibre optic interface

(refer to optical budgets in the Application Notes chapter).

Multiplexer Link with G.703 Electrical Interface Using Auxiliary Optical

Fibers and Type P591 Interface

A P54x relay with 850 nm short haul optical interface is connected to a P591 unit by

850 nm multi-mode optical fiber. Multi-mode fibre type 50/125

µ m or 62.5/125

µ m is suitable. BFOC/2.5 type fibre optic connectors are used. The P591 unit converts the data between optical fibre and ITU-T compatible G.703 co-directional electrical interface. The

G.703 output must be connected to an ITU-T compatible G.703 co-directional channel on the multiplexer.

P540

850nm

O/F

P591

G703

M

U

X

M

U

X

G703

P591

O/F

P540

850nm

P2404ENa

Figure 88 - P54x connection to P591

The P591 unit supports the ITU-T Recommendation G.703 co-directional interface. The

G.703 signals are isolated by pulse transformers to 1 kV.

P54x/EN OP/Nd5 Page 5-135

(OP) 5 Operation

2.1.10

Communications between Relays

Since the G.703 signals are only of ±1 V magnitude, the cable connecting the P591 unit and the multiplexer must be properly screened against electromagnetic noise and interference. The interface cable should consist of twisted pairs of 24 AWG, overall shielded, and have a characteristic impedance of about 120

. It is generally recommended that the interface cable shield should be connected to the multiplexer frame ground only. The choice of grounding depends however on local codes and practices.

Electrical connections to the P591 unit are made via a standard 28-way Midos connector.

Please refer to Installation chapter for the external connection diagram.

The P54x must be set with Clock Source as ‘External’, refer to the Clock Source section.

Multiplexer Link with V.35 Electrical Interface Using Auxiliary Optical Fibers and Type P592 Interface

A P54x relay with 850 nm short haul optical interface is connected to a P592 unit by

850nm multi-mode optical fiber. Multi-mode fibre type 50/125

µ m or 62.5/125

µ m is suitable. BFOC/2.5 type fibre optic connectors are used. The P592 unit converts the data between optical fibre and ITU-T compatible V.35 electrical interface. The V.35 output must be connected to an ITU-T compatible V.35 channel on the multiplexer.

P540

850nm

O/F

P592

V35

M

U

X

M

U

X

V35

P592

O/F

P540

850nm

P2405ENa

Figure 89 - P54x connection to P592

The P592 unit supports the ITU-T Recommendation V.35 interface.

Connections of V.35 signals to the P592 unit are made via a standard female 34 pin ‘M’ block connector. Since the V.35 signals are either of ±0.55 V or ±12 V magnitude, the cable connecting the unit to the multiplexer must be properly screened against electromagnetic noise and interference. The interface cable should consist of twisted pairs of wires which are shielded, and have a characteristic impedance of about 100

. It is generally recommended that the interface cable shield is connected to the multiplexer frame ground. The choice of grounding depends however on local codes and practices.

The P592 front panel consists of five indicating LEDs and six Dual-In-Line (DIL) switches.

The switch labeled ‘Clockswitch’ is provided to invert the V.35 transmit timing clock signal if required.

The switch labeled ‘Fiber-optic Loopback’ is provided to allow a test loopback of the communication signal across the fibre optic terminals. When switched on, the red LED labeled 'Fiber-optic Loopback' is illuminated.

The switch labeled ‘V.35 Loopback’ is provided to allow a test loopback of the communication signal across the X.21 terminals. It loops the incoming V.35 ‘Rx’ data lines internally back to the outgoing V.35 ‘Tx’ data lines. When switched on, the red LED labeled ‘V.35 Loopback’ is illuminated.

The switch labeled ‘DSR’ is provided to select/ignore the DSR (Data Set Ready) handshaking control signal. The red LED labeled DSR Off is extinguished either when

DSR is asserted or when overridden by setting the DSR switch On.

The switch labeled ‘CTS’ is provided to select/ignore the CTS (Clear To Send) handshaking control signal. The red LED labeled CTS Off is extinguished either when

CTS is asserted or when overridden by setting the CTS switch On.

The switch labeled ‘Data Rate’ is provided to allow the selection of 56 or 64k bits/s data rate, as required by the PCM multiplexing equipment.

Page 5-136 P54x/EN OP/Nd5

Communications between Relays

2.1.11

(OP) 5 Operation

The LED labeled ‘Supply Healthy’ is green and provides indication that the unit is correctly powered.

Please refer to Installation chapter for the external connection diagram.

The P54x may be set either with Clock Source as ‘External’ for a multiplexer network which is supplying a master clock signal, or with Clock Source as ‘Internal’ for a multiplexer network recovering signal timing from the equipment. Refer to the Clock

Source section.

Multiplexer Link with X.21 Electrical Interface Using Auxiliary Optical Fibers and Type P593 Interface

The P593 unit supports the ITU-T Recommendation X.21 interface. It is approved as line interface equipment by the British Approvals Board for Telecommunications (BABT) for connection to the services described in this section; License Certificate Number

NS/1423/1/T/605362.

A P54x relay with 850 nm short haul optical interface is connected to a P593 unit by 850 nm multi-mode optical fiber. Multi-mode fibre type 50/125

µ m or 62.5/125

µ m is suitable.

BFOC/2.5 type fibre optic connectors are used. The P593 unit converts the data between optical fibre and ITU-T compatible X.21 electrical interface. The X.21 output must be connected to an ITU-T compatible X.21 channel on the multiplexer or ISDN digital data transmission link.

O/F O/F

X.21

P540

850nm

P593 P593

P540

850nm

T

T

R

R

S

S

P2406ENa

Figure 90 - P54x connection to P593

The P54x relays require a permanently open communications channel. Consequently, no communications handshaking is required, and it is not supported in the P593 unit. The signals supported are shown in the following table.

ITU-T Recommendation X.21 is closely associated with EIA specifications RS422 and

RS449. The P593 can be used with RS422 or RS449 communications channels which require only the signals shown overleaf.

ITU-T designation Direction

-

G

Description

Case earth

Common return

1

Connector pin

8

-

-

Transmit data A

Transmit data B

Receive data A

Receive data B

Signal element timing A

Signal element timing B

2

9

4

11

6

13

From P593

From P593

To P593

To P593

To P593

To P593

Table 12 - X.21 circuits supported by P593 unit

Connections of X.21 signals to the P593 unit are made via a standard male 15 way Dtype connector, wired as a DTE device. The interface cable should consist of twisted pairs of 24 AWG, overall shielded, and have a characteristic impedance of about 100

. It is generally recommended that the interface cable shield is connected to the multiplexer frame ground. The choice of grounding depends however on local codes and practices.

Please refer to Connection Diagrams chapter for the external wiring diagrams.

P54x/EN OP/Nd5 Page 5-137

(OP) 5 Operation

2.1.12

2.1.13

Communications between Relays

The P54x must be set with Clock Source as ‘External’, refer to the Clock Source section.

The P593 front panel consists of four indicating LEDs and two switches.

The LED labeled ‘Supply healthy’ is green and provides indication that the unit is correctly powered.

The LED labeled ‘Clock’ is green and provides indication that an appropriate X.21 signal element timing signal is presented to the unit.

One of the switches is labeled ‘Fiber Optic Loopback’. This is provided to allow a test loopback of the communication signal across the fibre optic terminals. When switched on, the red LED labeled ‘Fiber Optic Loopback’ is illuminated.

The second switch is labeled ‘X.21 Loopback’. This is provided to allow a test loopback of the communication signal across the X.21 terminals. It loops the incoming X.21 ‘Rx’ data lines internally back to the outgoing X.21 ‘Tx’ data lines, and also loops the incoming fibre optic ‘Rx’ data line (via the X.21 signal conversion circuitry) back to the outgoing fibre optic ‘Tx’ data line. When switched on, the red LED labeled ‘X.21 Loopback’ is illuminated.

Protection Communications Connection over Unconditioned Pilot Wires

It is possible to deploy P54x on certain circuits where unconditioned 2-wire or 4-wire pilots are available for communication. To achieve this requires a combination of P590 series optical fibre to electrical interface units together with third-party baseband modems. The application will be restricted by the length and quality of the pilots, with maximum pilot lengths restricted to less than 20 km.

When considering applying a scheme based on P54x and P590 in conjunction with baseband modems, the impact of the modem retrain time on the application needs to be understood before making the decision. Unconditioned 2-wire and 4-wire pilots are generally routed in proximity to the electrical power transmission and distribution feeders that they are helping to protect. As such, they are partial to electro-magnetic interference during switching or fault conditions on the power system. The induced interference on the pilots can cause disruption of the communications signals, and if this is sufficient to cause the synchronization of the communications to be lost, then the modems will have to resynchronize, or retrain.

Note If communications breaks of up to 10 seconds during switching or fault conditions on the power system cannot be tolerated by the P54x application, a decision to implement a scheme using pilot wire circuits should be reviewed.

Unconditioned 2 Wire Pilot Communications for Distances Greater than 1.2 km

When communicating via a pair of unconditioned pilots for distances greater than 1.2 km, a leased line or baseband modem can be used. For maximum security and performance it is strongly recommended that a screened twisted pair of 0.5 mm (or greater) conductors are used. When choosing between leased line or baseband modems the following aspects should be considered:

Leased line modems have a maximum transmission speed of 19.2 kbit/sec., whereas baseband modems can transmit at 64 kbit/sec.

Baseband modems have longer re-training times, typically between 10 to 60 s. If the connection between is temporarily lost, the protection communications will be interrupted until the re-training period has elapsed.

Since baseband modems use synchronous communication protocols, there is typically a 20% performance gain over leased line modems that use asynchronous protocols.

Page 5-138 P54x/EN OP/Nd5

Communications between Relays

2.1.14

2.1.15

2.1.16

2.1.17

(OP) 5 Operation

Modems tested:

Keymile LineRunner DTM modem with G703 interface.

Type Max distance (km)

Recommended data rate (kbit/sec)

“Campus” 1092A

(Obsolete)

LineRunner DTM

17.2

19.8

64

64

10

44

Typical re-train time

(seconds)

Table 13 - Modems, Distances, Data Rates and Re-Train Times

Protection Communications Scheme Set-Up

The Scheme Set-up setting selects the connection between the system ends. A two ended system may have a single communication channel between the ends (2 Terminal option) or two independent communication channels to achieve dual redundancy (Dual

Redundant option). A three ended system is selected by the option 3 Terminal.

Dual Redundant (“Hot Standby”)

If one of the channels has failed, the communication between the relays can still be maintained by the other healthy channel.

The dual redundant model provides redundancy for communication channels by transmitting and receiving messages over both channels. Each channel is monitored continuously by the relay. The messages from both channels are used to perform the relay functions. If only one channel is available, the messages from this healthy channel are used to perform the relay functions.

The messages are transmitted over the 2 channels alternately. Every message received is validated and processed, so that both channels are continuously monitored.

Three Ended System

In the event of a failure of a communication link between two line ends, the correct differential protection will be maintained as long as one relay (master relay) continues to communicate successfully with the other two relays (slave relays). In this degraded mode, the differential protection is performed by the master relay which can intertrip the slaves in the event of a fault being detected.

Protection Communications Address

The protection communication messages include an address field to ensure correct scheme connection.

There are twenty one options for groups of addresses. Each group is applied to one protection system, two ended or three ended, so there are two or three addresses within a group respectively.

All the address patterns are carefully chosen so as to provide optimum noise immunity against bit corruption. There is no preference as to which address group is better than the other.

The groups of addresses available when 2 Terminal or Dual Redundant scheme is selected are as follows:

P54x/EN OP/Nd5 Page 5-139

(OP) 5 Operation Communications between Relays

Address Relay A Relay B

Universal Address 0-0

Address Group 1 1-A

Address Group 2 2-A

Address Group 3 3-A

Address Group 4 4-A

0-0

1-B

2-B

3-B

4-B

Address Group 5 5-A

Address Group 6 6-A

Address Group 7 7-A

Address Group 8 8-A

Address Group 9 9-A

Address Group 10 10-A

5-B

6-B

7-B

8-B

9-B

10-B

Address

Address Group 11

Address Group 12

Address Group 13

Address Group 14

Address Group 15

Address Group 16

Address Group 17

Address Group 18

Address Group 19

Address Group 20

15-A

16-A

17-A

18-A

19-A

20-A

Relay A Relay B

11-A

12-A

13-A

14-A

11-B

12-B

13-B

14-B

15-B

16-B

17-B

18-B

19-B

20-B

Address

Address Group 1

Address Group 2

Address Group 3

Address Group 4

Address Group 5

Address Group 6

Address Group 7

Address Group 8

Address Group 9

Address Group 10

1-A

2-A

3-A

4-A

5-A

6-A

7-A

8-A

9-A

10-A

Table 14 - Address groups for two different relays

For two relays to communicate with one another, their addresses have to be in the same address group. One relay should be assigned with address A and the other with address

B. For example, if the group 1 address is used, the one relay should be given the address

1-A, and the other relay should be given the address 1-B.

The relay with address 1-A will only accept messages with the 1-A address and will send out messages carrying address 1-B. The relay assigned with address 1-B will only accept messages with address 1-B and will send out messages carrying address 1-A.

The groups of addresses available when 3 Terminal scheme is selected are as follows:

Relay A Relay B Relay C Address Relay A Relay B Relay C

1-B

2-B

3-B

4-B

5-B

6-B

7-B

8-B

9-B

10-B

1-C

2-C

3-C

4-C

5-C

6-C

7-C

8-C

9-C

10-C

Address Group 11 11-A

Address Group 12 12-A

Address Group 13 13-A

Address Group 14 14-A

Address Group 15 15-A

Address Group 16 16-A

Address Group 17 17-A

Address Group 18 18-A

Address Group 19 19-A

Address Group 20 20-A

11-B

12-B

13-B

14-B

15-B

16-B

17-B

18-B

19-B

20-B

11-C

12-C

13-C

14-C

15-C

16-C

17-C

18-C

19-C

20-C

Table 15 - Address groups for three different relays

For three relays to work together as a protection system, their addresses must be in the same group and they should be assigned separately with addresses A, B and C.

They must also have a fixed connection configuration, as shown in the 3-terminal system connection diagram, in which channel 1 of one relay is connected to channel 2 of another relay.

For example, if the group 1 address is used, addresses 1-A, 1-B and 1-C should be assigned to relays A, B and C respectively. Relay A will only accept messages with address 1-A and will send messages carrying addresses 1-B and 1-C to channel 1 and channel 2 respectively. Relay B will only accept messages with address 1-B and will send messages carrying addresses 1-C and 1-A to channel 1 and to channel 2 respectively.

Similarly relay C will only accept messages with address 1-C and will send messages carrying addresses 1-A and 1-B to channel 1 and to channel 2 respectively.

Page 5-140 P54x/EN OP/Nd5

Communications between Relays

2.1.18

(OP) 5 Operation

Relay A

Channel 1

Channel 2

Channel 2

Channel 1 Relay B

Channel 1 Channel 2

Relay C

P1033ENa

Figure 91 - 3-terminal system connection

Reconfiguration of Three-Ended System

This function only applies to relays which are set-up for 3 Terminal operation. The operation depends on the status of the communication channels, the relays in the scheme and various time periods. There are two general areas of operation, these being the change in configuration by a user and that generated by an energization of a relay.

The various considerations applying to each of these cases are given below.

Four settings are provided as follows:

Three Ended

Two Ended Local and Remote

Two Ended Local and Remote

Two Ended Remote 1 and Remote

1 (L & R1)

2 (L & R2)

2 (R1 & R2)

Remote 1 and Remote 2 relate to protection signaling channel 1 and 2 respectively.

The operation of the reconfiguration is described in these sections:

User Reconfiguration

Energization Reconfiguration

P54x/EN OP/Nd5 Page 5-141

(OP) 5 Operation

2.1.19

Communications between Relays

User Reconfiguration

This covers the normal set-up of the relays into a 2-ended or 3-ended scheme depending on the state of the protected line and the relays. The facilities provided allow the user to initially use two relays to protect a two ended line and later to upgrade the scheme to three ended using a further relay. It also allows one end of a three ended scheme to be isolated and the other two ends to operate as a two ended scheme. This allows tests to be performed on the end that has been isolated and also allows for that relay to be removed altogether.

The change in configuration is enabled by two external interlocks and by the current state of the relay and its communications. If the scheme is changed from 3-ended to 2-ended, it is considered to be a reconfigure command. If the scheme is changed from 2-ended to

3-ended, it is considered to be a restore command. The checks performed for a reconfiguration are slightly different to those for a restore.

The operation of the change configuration logic is as follows:

1. The configuration setting is changed

2. The relay detects the change in setting and attempts to implement the new setting

3. If the relay configuration is 2-ended and the new setting is also 2-ended then the relay will block the change and issue a configuration error alarm

If the relay configuration is 2-ended and the new setting is 3-ended then the relay will check that all the communications are healthy and send out the restore command to the other relays. It will then check that the scheme has stabilized at 3-ended after one second.

If any of the communications in the scheme were failed or if the scheme has not stabilized at 3-ended then the relay will return to its original 2-ended setting and issue a configuration error alarm.

If the scheme did stabilize at 3-ended then the Re-configuration setting will be updated.

If the relay configuration is 3-ended and the new setting is 2-ended L & R1 then the relay will first check that the two interlock opto-inputs, Inhibit Diff and Interlock” are energized

(note that the Inhibit Diff opto-input will inhibit the differential tripping, but the backup protection can still operate the trip outputs). These inputs are allocated to opto-inputs L3 and L4 in the default programmable scheme logic. The relay then checks that the communication with Remote 1 relay is healthy and sends out the command to the remote relays. It will then check that the scheme has stabilized at 2-ended L & R1after one second.

If the interlocks are not energized or the communication with Remote 1 relay has failed or the scheme does not stabilize at 2-ended L & R1 then the relay will return to 3-ended and will issue a configuration error alarm.

If the scheme did stabilize at 2-ended L & R1 then the Re-configuration setting will be updated.

If the relay configuration is 3-ended and the new setting is 2-ended L & R2 then the relay reacts similarly to a 2-ended L & R1 reconfiguration.

If the relay configuration is 3-ended and the new setting is 2-ended R1 & R2 then the relay reacts similarly to a 2-ended L & R1 reconfiguration.

Page 5-142 P54x/EN OP/Nd5

Communications between Relays

2.1.20

(OP) 5 Operation

Energization Reconfiguration

This type of configuration occurs when a relay is energized and the relay attempts to go into a configuration compatible with the other relays in the scheme. As far as possible the scheme will go to that which the user set up. There are, however, certain conditions which may prevent this from occurring.

The configuration that the relay takes up at power on is governed by the following factors:

1. The scheme currently configured on the remote relays

2. The status of the communication links

3. The configuration stored in non volatile memory before power down

Upon energization of a relay, the following events occur:

1. The relay checks whether any messages are arriving. If so then the configuration command in the first messages to arrive will be used as the relay configuration.

This is subject to certain conditions. If the relay has a choice of 2-ended and 3ended, it will assume the 2-ended scheme unless both incoming commands are 3ended. If all three relays are 3-ended then they will remain so.

2. If no messages arrive from either end then after one second the relay will change to the configuration that was last selected, i.e. the configuration before power down. Once messages begin to arrive again, the relay will check them for validity against the current scheme. If one relay is 3-ended and the other is 2-ended then the configuration will change to 2-ended. If both are 3-ended or the same 2-ended scheme then that will become the configuration. If two relays have different 2ended configurations then they are unable to determine which one to use and will each generate a configuration error alarm and each relay will remain in its current configuration. This condition can be cleared by restoring the relays or by removing the supply to the relay with the incorrect configuration.

3. If all the relays in a scheme are energized simultaneously then the configuration will revert to 3-ended if all the communication channels are healthy. This occurs because all the relays are waiting to be told their configuration and all default to 3ended. This is a very unlikely event in normal use.

4. In cases where a communication channel has only half failed i.e. the receive channel has failed but not the transmit channel, then there may be configuration errors on power up due to the fact that the relays are not communicating correctly.

If the status is available via the third relay and healthy communications via its two channels then the scheme will stabilize correctly.

P54x/EN OP/Nd5 Page 5-143

(OP) 5 Operation

2.2

2.2.1

2.2.2

Communications between Relays

InterMiCOM

Eight digital signals from local relay to the remote relay can be sent by using

Programmable InterMiCOM

64

(IM

64

) teleprotection available in MiCOM P54x/P841. This teleprotection uses the protection communication channel described in the

Communications Link Options section.

In this scheme the signaling channel is used to convey simple ON/OFF data (from a local protection device) thereby providing some additional information to a remote device which can be used to accelerate in-zone fault clearance and/or prevent out-of-zone tripping.

Protection Signaling

To achieve fast fault clearance and correct discrimination for faults anywhere in a high voltage power network, it is necessary to signal between the points at which protection relays are connected. The following two distinct types of protection signaling can be identified.

Unit protection schemes:

In these schemes the signaling channel is used to convey analog data representative of the power system between relays. Typically current magnitude and/or phase information is communicated between line ends to enable a unit protection scheme to be implemented. These unit protection schemes are not covered by InterMiCOM or InterMiCOM

64

. Instead, the MiCOM P44y, P52x, P54x and P841 range of current differential and phase comparison relays are available for unit applications.

Teleprotection - channel aided schemes

In channel-aided schemes the signaling channel is used to convey simple ON/OFF commands from a local protection device to a remote device to provide some additional information to be used in the protection scheme operation. The commands can be used to accelerate in-zone fault clearance or to prevent out-ofzone tripping, or both.

The InterMiCOM application is an effective replacement to the traditional hardwired logic and communication schemes used by protection relays for such teleprotection signaling.

The MiCOM Px4x series products have a grouping of internal digital signals known as the digital data bus, DDB, that are used to implement the protection scheme logic. A number of these DDB signals are reserved as inputs and outputs for the InterMiCOM application.

These are mapped using the Programmable Scheme Logic (PSL) support tool. The

InterMiCOM application provides a means of transferring the status of these mapped

DDB signals between the protection relays using dedicated full-duplex communications channels.

InterMiCOM Variants

There are two different types of integrated InterMiCOM teleprotection available in the

MiCOM relays:

An optical fiber implementation, InterMiCOM

64

- designed, primarily, to work over fiber optic and multiplexed digital communications channels with data rates of

56/64kbit/s. A total of 16 InterMiCOM

64

commands (16 inputs and 16 outputs) are available in the P443/P445/P446/P54x. These are arranged as two groups of 8 bits each, and are referred to as Channel 1 and Channel 2. Three InterMiCOM

64 scheme arrangements are possible:

Two-terminal with a single communications link

Page 5-144 P54x/EN OP/Nd5

Communications between Relays

2.2.3

2.2.4

(OP) 5 Operation

Two-terminal with a dual redundant communications link (sometimes referred to as

‘ hot standby ’)

Three terminal (or triangulated) scheme

An electrical implementation of InterMiCOM, realised over an EIA(RS)232 medium typically for MODEM applications and referred to as MODEM InterMiCOM for ease of differentiation with InterMiCOM

64

. MODEM InterMiCOM supports two-terminal applications with a single communications channel. Eight MODEM InterMiCOM commands can be transmitted between the line ends.

Provided the correct hardware options have been specified, it is possible to configure the

P443/P445/P446/P54x to operate using either InterMiCOM

64

or MODEM InterMiCOM, or both. The selection is made under the CONFIGURATION column of the menu software.

InterMiCOM Features

The different requirements of applications that use teleprotection signaling for direct acting, permissive, or blocking schemes are all catered for by InterMiCOM.

Communications are supervised and alarms and signal defaults can be defined to give controlled actions in the event of communications signals being distorted or unavailable.

Communications statistics and loopback features are available to help with commissioning and testing purposes.

Both, InterMiCOM

64

and MODEM InterMiCOM teleprotection provide the ideal means to configure the schemes in the MiCOM relay. The selection between the two will generally depend on communications media availability, system configuration, distances, cost issues and utility practice.

Definition of Teleprotection Commands

Three generic types of teleprotection command can be defined. These are Intertripping,

Permissive signaling, and Blocking. All teleprotection signals are initiated in a transmitting relay but, according to the application, the receiving relay may condition the signal according to the scheme requirements:

P54x/EN OP/Nd5 Page 5-145

(OP) 5 Operation Communications between Relays

The decision to send a command is made by a local protective relay operation, and three generic types of InterMiCOM signal are available:

Intertripping In intertripping (direct or transfer tripping applications), the command is not supervised at the receiving end by any protection relay and simply causes

CB operation. Since no checking of the received signal by another protection device is performed, it is absolutely essential that any noise on the signaling channel isn’t seen as being a valid signal. In other words, an intertripping channel must be very secure.

Permissive In permissive applications, tripping is only permitted when the command coincides with a protection operation at the receiving end. Since this applies a second, independent check before tripping, the signaling channel for permissive schemes do not have to be as secure as for intertripping channels.

Blocking In blocking applications, tripping is only permitted when no signal is received but a protection operation has occurred. In other words, when a command is transmitted, the receiving end device is blocked from operating even if a protection operation occurs. Since the signal is used to prevent tripping, it is imperative that a signal is received whenever possible and as quickly as possible. In other words, a blocking channel must be fast and dependable.

The requirements for the three channel types are shown in the Pictorial comparison of operating modes diagram. This diagram shows that a blocking signal should be fast and dependable; a direct intertrip signal should be very secure and a permissive signal is an intermediate compromise of speed, security and dependability. In MODEM applications, all three modes can be applied to selected signaling bits within each message.

Speed

Permissive faster

Blocking slower low high

Security Direct Intertrip Dependability

P1342ENa

Figure 92 - Pictorial comparison of operating modes

In MODEM InterMiCOM applications, selected signaling bits within each message can be conditioned to provide optimal characteristics for each of the three teleprotection command types.

In InterMiCOM

64

applications, the framing and error checking of a single command message is sufficient to meet the security of a permissive application, while the speed is sufficiently fast to meet the needs of a blocking scheme. Accordingly in InterMiCOM

64 applications, there is no differentiation between blocking commands or permissive commands, so that only signals being used for direct intertripping with higher security requirements need to be differentiated from those in permissive (or blocking) schemes.

Page 5-146 P54x/EN OP/Nd5

Communications between Relays

2.2.5

2.2.6

(OP) 5 Operation

General Features & Implementation

InterMiCOM

64

provides a direct fibre output from the relay’s co-processor board that can be connected either directly to the protection at the opposite end(s) or through a MUX device as describe in the Communications Link Options section.

InterMiCOM

64

can work:

With Differential protection (in this case differential protection is enabled) or

Standalone (in this case differential protection is disabled and InterMiCOM

64 enabled)

is

The number of available teleprotection commands is 8. In Dual redundant schemes 8 commands per channel are transmitted to and received from the remote end. In 3 ended configurations, 8 commands are transmitted bidirectional between each and every pair of relays. Unique relay addressing is available to prevent any spurious operation should a multiplexer inadvertently fall out of step and misroute messages.

Functional Assignment

The settings to control the mode of the intertrip signals are made using the relay’s menu software. In addition to this, it is necessary to assign InterMiCOM input and output signals in the relay Programmable Scheme Logic (PSL) editor. Two icons are provided on the

PSL editor of MiCOM S1 (S1 Studio) for Integral tripping In and Integral tripping out which can be used to assign the eight intertripping commands. The example shown below in the

Example assignment of signals within the PSL diagram shows a Control Input_1 connected to the Intertrip O/P1 signal which would then be transmitted to the remote end.

At the remote end, the Intertrip I/P1 signal would then be assigned within the PSL. In this example, we can see that when intertrip signal 1 is received from the remote relay, the local end relay would operate an output contact, R1.

P54x/EN OP/Nd5

Figure 93 - Example assignment of signals within the PSL

Note When an InterMiCOM signal is sent from the local relay, only the remote end relay will react to this command. The local end relay will only react to

InterMiCOM commands initiated at the remote end and received locally, and vice-versa. InterMiCOM can, therefore, be described as a duplex teleprotection system.

Page 5-147

(OP) 5 Operation

2.3

2.3.1

2.3.2

Communications between Relays

MODEM InterMiCOM, EIA(RS)232 InterMiCOM or Copper InterMiCOM

Communications Media

InterMiCOM can transfer up to eight commands over one communication channel. Due to recent expansions in communication networks, most signaling channels are now digital schemes using multiplexed fiber optics. For this reason, InterMiCOM provides a standard

EIA(RS)232 output using digital signaling techniques. This digital signal can be converted using suitable devices to any communications media as required. The

EIA(RS)232 output may alternatively be connected to a MODEM link.

Regardless of whether analogue or digital systems are being used, all the requirements of teleprotection commands are governed by an international standard IEC60834-1:1999 and InterMiCOM is compliant with the essential requirements of this standard. This standard governs the speed requirements of the commands as well as the probability of unwanted commands being received (security) and the probability of missing commands

(dependability).

General Features and Implementation

InterMiCOM provides eight commands over a single communications link, with the mode of operation of each command being individually selectable within the IM# Cmd Type cell. Blocking mode provides the fastest signaling speed (available on commands 1 - 4),

Direct Intertrip mode provides the most secure signaling (available on commands 1 - 8) and Permissive mode provides the most dependable signaling (available on commands

5 - 8). Each command can also be disabled so that it has no effect in the logic of the relay.

Since many applications will involve the commands being sent over a multiplexed communications channel, it is necessary to ensure that only data from the correct relay is used. Both relays in the scheme must be programmed with a unique pair of addresses that correspond with each other in the Source Address and Receive Address cells. For example, at the local end relay if we set the Source Address to 1, the Receive Address at the remote end relay must also be set to 1. Similarly, if the remote end relay has a

Source Address set to 2, the Receive Address at the local end must also be set to 2.

All four addresses must not be set identical in any given relay scheme if the possibility of incorrect signaling is to be avoided.

In particular, the two pairs of addresses should be set to be different in any scheme to avoid the possibility of incorrect operation during inadvertent loopback connections, and any schemes sharing the same communications services should be set to have different address pairs in order to avoid any problems caused by inadvertent cross-channel connections.

Noise in the communications channel should not be interpreted as valid messages by the relay. For this reason, InterMiCOM uses a combination of unique pair addressing described above, basic signal format checking and for Direct Intertrip commands an 8bit Cyclic Redundancy Check (CRC) is also performed. This CRC calculation is performed at both the sending and receiving end relay for each message and then compared in order to maximize the security of the Direct Intertrip commands.

Page 5-148 P54x/EN OP/Nd5

Communications between Relays

2.3.3

2.3.4

(OP) 5 Operation

An alarm is provided if noise on the communications channel becomes excessive.

During periods of excessive noise, it is possible that the synchronization of the message structure will be lost and accurate decoding of the messages may not be possible.

Predictable operation of InterMiCOM is assured during such noisy periods by means of the IM# FallBackMode cell. The status of the last received valid command can be maintained until a new valid message is received by setting the IM# FallBackMode cell to Latched . Alternatively, a known fallback state can be assigned to the command by setting the IM# FallBackMode cell to Default . In this latter case, the time period between communication disruption and the default state being restored will need to be set in the IM# FrameSynTim cell and the default value will need to be set in

IM# DefaultValue cell. Upon subsequent receipt of a valid message, all the timer periods will be reset and the new valid command states will be used.

If there is a total communications failure, the relay will use the fallback (failsafe) strategy as described above. Total failure of the channel is considered when no message data is received for four power system cycles or if there is a loss of the DCD line.

EIA(RS)232 Physical Connections

InterMiCOM on the Px40 relays is implemented using a 9-pin ‘ D ’ type female connector

(labeled SK5) located at the bottom of the 2nd Rear communication board. This connector on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as shown in the EIA(RS)232 Physical Connections table:

Pin Acronym

1

2

3

4

5

6

7

8

9

DCD

RxD

TxD

DTR

GND

Not used

RTS

Not used

Not used

InterMiCOM Usage

-

-

“Data Carrier Detect” is only used when connecting to modems otherwise this should be tied high by connecting to terminal 4.

“Receive Data”

“Transmit Data”

“Data Terminal Ready” is permanently tied high by the hardware since

InterMiCOM requires a permanently open communication channel.

“Signal Ground”

-

“Ready To Send” is permanently tied high by the hardware since

InterMiCOM requires a permanently open communication channel.

Table 16 - Pins, Acronyms and InterMiCOM Usage

Depending upon whether a direct or modem connection between the two relays in the scheme is being used, the required pin connections are described below.

Direct Connection

The EIA(RS)232 protocol only allows for short transmission distances due to the signalling levels used and therefore the connection shown below is limited to less than

15m. However, this may be extended by introducing suitable EIA(RS)232 to fiber optic convertors, such as the CILI 204. Depending upon the type of convertor and fiber used, direct communication over a few kilometres can easily be achieved.

This type of connection should also be used when connecting to multiplexers that have no ability to control the DCD line.

P54x/EN OP/Nd5 Page 5-149

(OP) 5 Operation

2.3.5

Communications between Relays

Px40 Relay with InterMiCOM Px40 Relay with InterMiCOM

DCD –

RxD –

TxD –

DTR -

GND –

RTS –

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

- DCD

- RxD

- TxD

- DTR

- GND

- RTS

P1150ENa

Figure 94 - Direct connection within the local substation

EIA(RS)232 Modem Connection

For long distance communication, modems may be used in which the case the following connections should be made.

This type of connection should also be used when connecting to multiplexers that have the ability to control the DCD line. With this type of connection it should be noted that the maximum distance between the Px40 relay and the modem should be 15m, and that a baud rate suitable for the communications path used should be selected.

2.3.6

Figure 95 - InterMiCOM teleprotection via a MODEM link

RS422 Connection

RS232 to RS422 converter such as Schneider Electric CK212 may also be used for a longer distance application; it can be formed as shown in the InterMiCOM teleprotection via a RS422 protocol diagram:

With this type of connection, the maximum distance between the Px40 relay and the converter should be 15m.

Up to 1.2km length can be achieved with this type of protocol, depending on the converter performance.

Page 5-150 P54x/EN OP/Nd5

Communications between Relays

Px4x Relay with

InterMiCOM

RS 232

( SK 5)

(6 )- ( 9)

Rx ( 2)

Tx ( 3 )

GND ( 5)

5 v ( 4)

DCD ( 1)

CK212

RS 232 /

RS 422

X 5

( 6 )- ( 9)

(2 ) Rx

( 3 ) Tx

( 5 ) GND

Connectors

D 1 +( 5)

D 1- ( 4)

D 2- ( 6)

+5 v GND

D 2 +( 3)

( 1 ) ( 2 )

2.3.7

RS422 InterMiCOM

(similar to RS485)

(OP) 5 Operation

CK212

RS 232 /

RS 422

X 5

( 6) - (9 )

Rx ( 2 )

Tx ( 3 )

GND ( 5)

Connectors

(3 ) D2 +

(6 ) D2 -

(4 ) D1 -

(5 ) D1 +

+ 5 v GND

(1 ) ( 2 )

Px4x Relay with

InterMiCOM

RS 232

( SK 5 )

( 6) -( 9 )

(2 ) Rx

( 3 ) Tx

( 5 ) GND

( 4 ) 5 v

(1 ) DCD

GND

+ 5 v GND

DC Power Supply

+ 5 v GND

DC Power Supply

GND

P4332ENa

Figure 96 - MODEM InterMiCOM teleprotection via a RS422 protocol

Fiber Optic Connection

For long distance communication, a fiber optic converter may be used connected as shown in the InterMiCOM teleprotection via fiber optic diagram.

With this type of connection, the maximum distance between the Px40 relay and the converter should be 15m.

The length that can be achieved is depending on the converter performance.

CILI 204 CILI 204

Px4x Relay with

InterMiCOM

RS232

(SK5)

Rx (2)

Tx (3)

GND (5)

5v (4)

DCD (1)

RS232/FO

(2) Rx

(3) Tx

(7) GND

Fiber Optic InterMiCOM

RS232/FO

Rx (2)

Tx (3)

GND (7)

Px4x Relay with

InterMiCOM

RS232

(SK5)

(2) Rx

(3) Tx

(5) GND

(4) 5v

(1) DCD

Switch

ABC4

5 v (11)

Switch

ABC4

(11) 5 v

GND

+5 v GND +5 v GND

DC Power Supply DC Power Supply

Figure 97 - MODEM InterMiCOM teleprotection via fiber optic

GND

P4333ENa

P54x/EN OP/Nd5 Page 5-151

(OP) 5 Operation

2.3.8

Communications between Relays

InterMiCOM Functional Assignment

Even though settings are made on the relay to control the mode of the intertrip signals, it is necessary to assign InterMiCOM input and output signals in the relay Programmable

Scheme Logic (PSL) if InterMiCOM is to be successfully implemented. Two icons are provided on the PSL editor of MiCOM S1 for “ Integral tripping In ” and “ Integral tripping out ” which can be used to assign the 8 intertripping commands. The example shown in the Example assignment of signals within the PSL diagram shows a “ Control Input_1 ” connected to the “ Intertrip O/P1 ” signal which would then be transmitted to the remote end. At the remote end, the “ Intertrip I/P1 ” signal could then be assigned within the PSL.

In this example, we can see that when intertrip signal 1 is received from the remote relay, the local end relay would operate an output contact, R1.

P2525ENa

Figure 98 - Example assignment of signals within the PSL

It should be noted that when an InterMiCOM signal is sent from the local relay, only the remote end relay will react to this command. The local end relay will only react to

InterMiCOM commands initiated at the remote end. InterMiCOM is thus suitable for teleprotection schemes requiring Duplex signaling.

Page 5-152 P54x/EN OP/Nd5

Communications between Relays

2.4

2.4.1

2.4.1.1

2.4.1.2

(OP) 5 Operation

InterMiCOM64 Statistics & Diagnostics

It is possible to hide the channel diagnostics and statistics from view by setting the “ Ch

Statistics ” and/or “ Ch Diagnostics ” cells to “ Invisible ”. All channel statistics are reset when the relay is powered up, or by user selection using the “ Reset Statistics ” cell.

InterMiCOM

64

Scheme Setup - Application

InterMiCOM64 can be applied to either 2 or 3 ended configurations. By simply mapping the Tx and Rx signals using the Programmable Scheme Logic (PSL). For mapping of the

InterMiCOM64 commands in the PSL please refer to the Functional Assignment section.

For security reasons, two MiCOM P54x relays may be connected in a Dual Redundant scheme, in which case both channels will be in use. This scheme is also known as a ‘Hot

Standby’ scheme but it should be noted that Channel 1 has no priority over Channel 2 - the data that arrives first will be stored in the buffer and used in the PSL, whilst the same data received via the slower channel will simply be discarded.

The InterMiCOM

64

connection for a 3-ended application is shown below.

Rx CH1 CH2 Tx

Tx

CH2

Rx

Tx End B Rx

Tx

End C

Tx

End A

Rx

Rx Tx

Rx

P1735ENc

Figure 99 - Triangulated InterMiCOM64 application

If InterMiCOM

64

is working as standalone feature (i.e. Differential protection is disabled and InterMiCOM

64

is enabled), a pass-through feature allows the scheme to remain in service in case of one channel outage. It should be noted that in the case when one leg of the communication triangle fails, i.e. channel A-C becomes unavailable, the

InterMiCOM

64

will continue to provide the full teleprotection scheme between all 3 ends.

In this new ‘Chain’ topology, relays A and C will receive and transmit teleprotection commands via relay B, which means that the original ‘Triangle’ topology is not necessary.

The retransmitting done by relay B (A-B-C and C-B-A) provides the self-healing for the lost links A-C and C-A).

Some users may apply Chain topology also as a means to save cost (two legs may be cheaper to install than full triangulation).

Teleprotection Communications Address

The protection communication messages include an address field to ensure correct scheme connection. There are twenty one options for groups of addresses. The description of them is exactly the same as per differential protection addresses described in the Protection Communications Address section.

IMx Fallback Mode

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(OP) 5 Operation

2.4.1.3

2.4.2

Communications between Relays

In case the received message is corrupted due to ether channel failure or lost synchronization, the user can pre-define the status of each command individually as

Latched or Default. The new status will take effect after the ‘Channel Timeout’ user settable time has elapsed. The “Default” mode allows a failsafe logic status to be applied.

InterMiCOM64 and Differential Communications

The Differential function can be globally enabled or disabled using the CONFIGURATION

/Phase Diff/ Enabled-Disabled setting.

If the Differential function is enabled, communication messages between the relays will have the complete differential format including currents and additional bias. In addition, the GROUP X/PHASE DIFF/Enabled-Disabled setting will be displayed allowing the differential functionality to be enabled or disabled on a per group basis.

If the Differential function is disabled in Configuration column, a

CONFIGURATION/InterMiCOM64/Enabled-Disabled setting will be displayed. The

InterMiCOM

64

function could be enabled and the communication messages between the relays will have a different format compared with those of the differential function. The message format will include digital signals only and will be shorter and faster.

If differential protection in group is disabled, the InterMiCOM

64

function can work with the differential message format or with an inherent stand-alone format where only digital signals are transmitted. The stand-alone message format has a pass though feature and is slightly faster than using the InterMiCOM

64

function with the differential message format.

Permissive Intertrip

The P54x relays include a facility to send a permissive intertrip command over the protection communication channel, as shown below.

Page 5-154

Figure 100 - Permissive intertrip

An opto input can be assigned for this purpose. When the associated opto input is energized at END B, the PIT flag is set in the communication message. Upon receipt of this message, the relay at END A initiates the PIT timer which times out and trips the circuit breaker, providing that the Remote or Local current (according to setting PIT I selection/ Remote or Local ) remains above its basic current threshold setting ( Is1), times out, the relay closes it’s three-phase differential trip contacts. The remote relay provides indication of the permissive intertrip.

The permissive intertrip timer is settable between 0 and 200 ms. This time should be set to provide discrimination with other protection. For example, in the Permissive intertrip diagram, the time delay should be set to allow the busbar protection to clear the fault in the event of a genuine busbar fault. A typical setting may be 100 - 150 ms.

P54x/EN OP/Nd5

Communications between Relays

2.4.3

2.4.4

2.4.5

2.4.6

(OP) 5 Operation

Clock Source

A clock source is required to synchronize data transmissions between the system ends.

This may be provided either by the P54x relays (internal) or may be a function of the telecommunications equipment (external). The P54x relays have a setting for each of

Channel 1 and Channel 2 to set the Clock Source to either “Internal” or “External” according to the communications system configuration.

This setting is not applicable if IEEE C37.94 mode selected.

Communication Alarm

A communication alarm is raised by the relay if the message error rate exceeds the setting value under PROT COMMS/IM64/ Alarm Level (default = 25%) and persists over a defined period of time (refer to the Switched Communication Networks section). This is equivalent to a Bit Error Rate (BER) of 1.5 x 10

–3

.

A communication alarm is also raised if the received message indicates failure of the signaling channel at the remote end.

Communication Error Statistics

To aid the bit error evaluation of the communication link, communication error statistics are kept by the relay. These give the number of Errored messages detected, the number of Lost Messages, and the number of Valid Messages received for each of the two channels. The number of errored messages detected complies with ITU-T G8.21 and is as follows:

Number of errored seconds Number of seconds containing 1 or more errored or lost messages

Number of severely errored seconds Number of seconds containing 31 or more errored or lost messages

Number of degraded minutes Number of minutes containing 2 or more errored or lost messages

Note Any severely errored seconds are ignored when working out the minute intervals

The number of lost messages recorded is intended as an indicator for noises under normal communication conditions and not for recording long communication breaks. The lost message count is accumulated by incrementing a counter when a message is rejected by the Error code check, message length check and the sequential time tag check.

The error statistics are automatically cleared on power-up. They can also be cleared using the Clear Statistics setting in Measurements column of the menu.

Communications Delay Timer

The communications delay timer is the maximum difference in the measured channel propagation delay time between consecutive messages that the relay will tolerate before switching the settings, as described in the Switched Communication Networks section.

This setting is factory set to 350

µ s. It should be increased to a suitable value if the propagation delay time is expected to vary considerably such as in the case of a microwave link with multiple repeaters.

P54x/EN OP/Nd5 Page 5-155

(OP) 5 Operation

2.4.7

2.4.8

2.4.9

Communications between Relays

Communications Fail Timer

The communication fail timer is the time during which communication errors must be continuously detected before the channel is declared failed. This governs the implementation of the communication alarm and the ‘Protection Scheme Inoperative’ alarm. The setting is normally set to the maximum of 10 seconds so that the two alarms will not be affected by short bursts of noises or interruptions. The communication fail time setting however may be set to a lower value of say 200 or 300 ms if the alarm contacts are to be used for enabling standby protection, or to signal a change-over to reserve communication facilities should the communication link become noisy or fail completely.

Communications Fail Mode

The Communications Fail Mode is used to select the channel(s) responsible for raising the communication alarm when configured for dual redundant communications. Three options are available: ‘Ch 1 Failure’, ‘Ch 2 Failure’, Ch1 or Ch 2 Fail’ and Ch1 and Ch 2

Fail’. If ‘Ch 1 Failure’ is selected, the communication alarm will only be raised if channel 1 has failed. If ‘Ch 2 Failure’ is selected, the communication alarm will only be raised if channel 2 has failed. If ‘Ch 1 or Ch 2 Fail’ is selected, the communication alarm will be raised if either channel has failed.

MiCOM P594 Global Positioning System (GPS) Synchronizing Module

MiCOM P54x Current Differential relays can use a satellite-derived one pulse per second synchronizing signal via a MiCOM P594 GPS Module.

A separate P594 Technical Guide is available in support of this device, and should be consulted for operational details.

Page 5-156 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3

3.1

(OP) 5 Operation

OPERATION OF NON-PROTECTION FUNCTIONS

The protection functionality of the P543, P544, P545, and P546 are very similar, and a common operational description can be applied. For the non-protection functions, some of the functionality is the same and, similarly, a common operational description can be applied. The principal difference between different models is that:

The P543 and P545 can control only a single circuit breaker

The P544 and P546 can control two circuit breakers

For this reason, the circuit breaker monitoring and control software differs between the

P543/P545 and the P544/P546, and a common operational description cannot be applied.

This section describes the operation of the non-protection functions common to all models and that are not associated with circuit breaker monitoring and control.

Separate sections are assigned to describe the P543/P545 operational control of a single circuit breaker, and the P544/P546 operational control of dual circuit breakers.

Voltage Transformer Supervision - Fuse Fail

The Voltage Transformer Supervision (VTS) feature is used to detect failure of the ac voltage inputs to the relay. This may be caused by internal voltage transformer faults, overloading, or faults on the interconnecting wiring to relays. This usually results in one or more VT fuses blowing. Following a failure of the ac voltage input there would be a misrepresentation of the phase voltages on the power system, as measured by the relay, which may result in maloperation.

The VTS logic in the relay is designed to detect the voltage failure, and automatically adjust the configuration of protection elements whose stability would otherwise be compromised. A time-delayed alarm output is also available.

A setting VTs Connected Yes/No (Voltage transformers connected to the relay) under

CT AND VT RATIOS will:

When set to yes this setting will have no effect.

When set to No it causes the VTS logic to set the VTS Slow Block and VTS Fast

Block DDBs, but not raise any alarms. It will also override the VTS enabled setting should the user set it. The effect of this is to stop the pole dead logic working incorrectly with the presence of no voltage and no current but not the CB open part of the logic and also block the distance, under voltage and other voltage dependant functions.

VTS can be declared by a Miniature Circuit Breaker (MCB) status input, by an internal logic using relay measurement or both. A setting VTS Mode (Measured + MCB

/Measured Only/MCB Only) is available to select the method to declare VT failure.

For the measured method, there are three main aspects to consider regarding the failure of the VT supply. These are defined below:

Loss of one or two-phase voltages

Loss of all three-phase voltages under load conditions

Absence of three-phase voltages upon line energization

P54x/EN OP/Nd5 Page 5-157

(OP) 5 Operation

3.1.1

3.1.2

3.1.3

Operation of Non-Protection Functions

Loss of One or Two-Phase Voltages

The VTS feature within the relay operates on detection of Negative Phase Sequence

(NPS) voltage without the presence of NPS current. This gives operation for the loss of one or two phase voltages. Stability of the VTS function is assured during system fault conditions, by the presence of NPS current. The use of negative sequence quantities ensures correct operation even where three-limb or ‘V’ connected (open delta) VTs are used.

Negative Sequence VTS Element:

The negative sequence thresholds used by the element are V2 = 10

V and Ι2 =

0.05 to 0.5

Ιn settable (defaulted to 0.05 Ιn).

Loss of all Three Phase Voltages Under Load Conditions

Under the loss of all three phase voltages to the relay, there will be no negative phase sequence quantities present to operate the VTS function. However, under such circumstances, a collapse of the three phase voltages will occur. If this is detected without a corresponding change in any of the phase current signals (which would be indicative of a fault), a VTS condition will be raised. In practice, the relay detects the presence of superimposed current signals, which are changes in the current applied to the relay. These signals are generated by comparison of the present value of the current with that exactly one cycle previously. Under normal load conditions, the value of superimposed current should therefore be zero. Under a fault condition a superimposed current signal will be generated which will prevent operation of the VTS.

The phase voltage level detectors are fixed and will drop off at 10 V and pickup at 30 V.

The sensitivity of the superimposed current elements is fixed at 0.1

Ιn.

Absence of Three Phase Voltages Upon Line Energization

If a VT were inadvertently left isolated prior to line energization, incorrect operation of voltage dependent elements could result. The previous VTS element detected 3-phase

VT failure by absence of all 3-phase voltages with no corresponding change in current.

On line energization there will, however, be a change in current (as a result of load or line charging current for example). An alternative method of detecting 3-phase VT failure is therefore required on-line energization.

The absence of voltage measurements on all three phases with line energized can result of two conditions:

A 3 phase VT failure

A close up three phase fault

The first condition would require blocking of the voltage dependent function and the second would require tripping.

To differentiate between these two conditions, an overcurrent level detector (“VTS

Ιmax>

Inh”) will prevent a VTS block from being issued if it operates. This element should be set in excess of any non-fault based currents on line energization (load, line charging current, transformer inrush current if applicable), but below the level of current produced by a close up three phase fault. If the line is now closed where a three phase VT failure is present, the overcurrent detector will not operate and a VTS block will be applied. Closing onto a three phase fault will result in operation of the overcurrent detector and prevent a

VTS block being applied.

Page 5-158 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.1.4

(OP) 5 Operation

This logic will only be enabled during a live line condition (as indicated by the relay’s pole dead logic) to prevent operation under dead system conditions, where no voltage will be present and the

VTS Ι> Inhibit

overcurrent element will not be picked up.

Note VTS I> Inhibit logic is equally applicable for the situation where loss of all three-phase voltages occurs under load conditions (refer the Loss of all

Three Phase Voltages Under Load Conditions section).If the setting of

VTS I> Inhibit is less than the load current and if three-phase VT fails during normal load, VTS block will not be applied. Hence it is important that the VTS I> Inhibit is always set above the expected load current.

VTS Logic

The relay may respond as follows, on operation of any VTS element:

VTS set to provide alarm indication only;

Optional blocking of voltage dependent protection elements;

Optional conversion of directional overcurrent elements to non-directional protection (available when set to Blocking mode only). These settings are found in the Function Links cell of the relevant protection element columns in the menu.

The VTS I> Inhibit or VTS I2> Inhibit elements are used to override a VTS block in event of a fault occurring on the system which could trigger the VTS logic. Once the VTS block has been established, however, then it would be undesirable for subsequent system faults to override the block. The VTS block will therefore be latched after a user settable time delay ‘VTS Time Delay’. Once the signal has latched then two methods of resetting are available. The first is manually via the front panel interface (or remote communications) provided the VTS condition has been removed and secondly, when in

‘Auto’ mode, by the restoration of the 3-phase voltages above the phase level detector settings mentioned previously.

A VTS indication will be given after the VTS Time Delay has expired. In the case where the VTS is set to indicate only the relay may potentially maloperate, depending on which protection elements are enabled. In this case the VTS indication will be given prior to the

VTS time delay expiring if a trip signal is given.

P54x/EN OP/Nd5 Page 5-159

(OP) 5 Operation Operation of Non-Protection Functions

DDB All Poles Dead (890)

SET VTS1>

IA>

IB>

IC>

1

LD VA>

LD VB>

LD VC>

V2>

SET: VTS I2>

1

DDB Any Pole Dead (891)

LD ? IA>

LD ? IB>

LD ? IC>

1

SET: VTS Reset Mode Manual

SET: VTS Reset Mode Auto

DDB MCB/VTS (438)

SET: VTS Status Blocking

240ms

1

&

40ms

&

&

1

1

S

R

&

&

Q

SET: VTS Time Delay t

S

0

R

Q

1

1

&

&

DDB VTS Slow Block

(833)

DDB VTS Fast Block

(832)

&

1

Indication VT

Fail Alarm

INTSIG Any Voltage

Dependent Function

&

S

R

Q

1 S

R

Q

&

20ms

0

INTSIG Accelerate Ind

&

5 cycle

1.5

cycle

DDB VTS Fast Block (832)

½

cycle

1 Block Distance DDB 1404

&

DDB All Poles Dead (890)

½

cycle

Note: INTSIG Accelerate Ind = Signal from a fast tripping voltage dependent function

Figure 101 - VTS logic

P1111ENd

This scheme is also able to correctly operate under very low load or even no load conditions, by the combination of time delayed signals derived from the DDB signals

VTS Fast block and all Poles Dead , to generate the Block Distance DDB.

Note All non-distance elements are blocked by the “VTS Fast Block” DDB.

Where a Miniature Circuit Breaker (MCB) is used to protect the voltage transformer ac output circuits, it is common to use MCB auxiliary contacts to indicate a three-phase output disconnection. As previously described, it is possible for the VTS logic to operate correctly without this input. However, this facility has been provided for compatibility with various utilities current practices. Energizing an opto-isolated input assigned to

DDB: MCB/VTS on the relay will therefore provide the necessary block.

Page 5-160 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.2

3.2.1

(OP) 5 Operation

Current Transformer Supervision (CTS)

The Current Transformer Supervision (CTS) feature is used to detect failure of one or more of the ac phase current inputs to the relay. Failure of a phase CT or an open circuit of the interconnecting wiring can result in incorrect operation of any current operated element. Additionally, interruption in the ac current circuits risks dangerous CT secondary voltages being generated.

MiCOM P54x has two methods to achieve CTS feature:

The first method called differential (I diff) method uses the ratio between positive and negative sequence currents to determine CT failure. Is non voltage dependant and relies on channel communications to declare a CTS condition.

The second method called standard method relies on local measurements of zero sequence currents and voltages to declare CTS. The user should select what method to use according to the application.

Both methods could be applied in parallel. The setting options per each setting group are:

CTS Disabled/ Idiff CTS/ Standard CTS/ (Idiff+Standard). It should be noted that the ‘CTS

Status’ (Restrain/Indication), ‘CTS Reset Mode’ (Manual/Auto) and ‘CTS Time Delay’ are common for both algorithms.

Differential CTS (no need of Local Voltage Measurements to Declare CTS)

Differential CT supervision scheme is based upon measurement of the ratio of I2 to I1 at all line ends. When this ratio is small (theoretically zero), one of four conditions is present:

The system is unloaded - both I2 and I1 are zero

The system is loaded but balanced - I2 is zero

The system has a three-phase fault present - I2 is zero

There is a genuine 3-phase CT problem - unlikely, would probably develop from a single or two phase condition

If the ratio is non-zero, we can assume one of two conditions are present:

The system has an asymmetric fault - both I2 and I1 are non-zero

There is a 1 or 2 phase CT problem - both I2 and I1 are non-zero

Any measurement at a single end doesn’t provide any more information than this, but if the ratio is calculated at all ends and compared, the MiCOM P54x assumes:

If the ratio is non-zero at more than two ends, it is almost certainly a genuine fault condition and so the CT supervision is prevented from operating.

If the ratio is non-zero at one end, there is a chance of either a CT problem or a single-end fed fault condition.

A second criteria looks to see whether the differential system is loaded or not. For this purpose MiCOM P54x looks at the positive sequence current I1. If load current is detected at one-end only, MiCOM P54x assumes that this is an internal fault condition and prevents CTS operation, but if load current is detected at two or more ends, CTS operation is permitted.

There are two modes of operation, Indication and Restrain. In Indication mode, a CTS alarm is raised but no effect on tripping. In Restrain mode, the differential protection is blocked during 20 ms after CT failure detection and then the setting for the Current

Differential is raised to above load current. The CTS covers 2 sets of CTs in P544 and

P546 as well as one set of CTs on P543 and P545.

In order to achieve correct operation of the scheme, it is necessary that differential CTS is enabled at each end of the protected zone.

Differential current transformer supervision (Differential CTS) in P543 - P546 models suffix K are only compatible with P543 - P546 models suffix K.

P54x/EN OP/Nd5 Page 5-161

(OP) 5 Operation Operation of Non-Protection Functions

DDB CT1 L i1> (931 )

DDB CT2 L i1> (932 )

DDB CT1 R1 i1> (933)

DDB CT2 R1 i1> (934)

DDB CT1 R2 i1> (935)

DDB CT2 R2 i1> (936)

DDB Disable CTS (487 )

DDB Any Trip (522)

DDB CT1 L i2/i1 >> (943)

DDB CT1 L i 2/i1> (937 )

DDB CT2 L i 2/i1> (938 )

DDB CT1 R1 i2/i1 > (939)

DDB CT2 R1 i2/i1 > (940)

DDB CT1 R2 i2/i1 > (941)

DDB CT2 R2 i2/i1 > (942)

>

=

2

DDB CT2 L i2/i1 >> (944)

1

&

&

DDB Inhibit CTS (483)

&

Timers set to setting in restrain mode or 20 ms in Indication mode t

Pickup

0

Auto Reset

Manual Reset

1

&

S

R

Q

CT Fail

From

Fig 87

1

DDB CT Fail alarm (294 )

1

Restrain Mode

&

CT Block

From

Fig 87

1

DDB CT Block (928)

CT2 Fail

From

Fig 87

1 DDB CT2 Fail alarm (295)

DDB CT1 R i2/i1 >> (945 ) t

Pickup

0

Auto Reset

Manual Reset

1

&

S

R

Q

&

DDB CT2 R1 i2/i1 >> (946)

1

Restrain Mode

&

20 ms

Pickup

0

&

DDB CTS Restrain (930 )

DDB CTS Block diff (929 )

&

DDB CT1 R2 i2/i1 >> (947)

&

1 t

Pickup

0

Auto Reset

Manual Reset 1

&

S

Q

R

DDB Remote CT Alarm (296)

Key : L = Local

RI = Remote 1

R 2 = Remote 2

DDB CT2 R2 i2/i1 >> (948)

&

P 4038ENb

Figure 102 - Differential CTS

3.2.2 Standard CTS (Voltage Dependant CTS no need of Communications to

Declare CTS)

The standard CT Supervision (CTS) feature operates on detection of derived zero sequence current, in the absence of a corresponding derived zero sequence voltage that would normally accompany it. The voltage transformer connection used must be able to refer zero sequence voltages from the primary to the secondary side. Therefore, this element should only be enabled where the VT is of five limb construction, or comprises three single-phase units, and has the primary star point earthed.

Page 5-162 P54x/EN OP/Nd5

Operation of Non-Protection Functions (OP) 5 Operation

INct1>

VN<

DDB Inhibit

CTS (483)

DDB Disable

CTS (487)

INct2>

VN<

DDB Inhibit

CTS (483)

DDB Disable

CTS (487)

1

1

CTS Block

I

N

>

& Time delay t CTS Alarm

V

N

<

P2130ENa

Figure 103 - Voltage dependant CTS principle scheme

Operation of the element will produce a time-delayed alarm visible on the LCD, an event record and a DDB 294: CT Fail Alarm, with an instantaneous block (DDB 928: CTS

Block) for inhibition of protection elements see the above Voltage dependant CTS principle scheme diagram.

&

Timers set to setting in restrain mode or 20 ms in Indication mode t

Pickup

0

Auto Reset

Manual Reset

1

&

S

R

Q CT1 Fail

1

&

CT Block

& t

Restrain

Mode

Pickup

S

R

Q

0

CT2 Fail

Auto Reset

Manual Reset

1

&

P4040ENb

Figure 104 - Standard CTS

3.2.3 CTS Blocking

The standard and differential methods will always block protection elements operating from derived quantities: Broken Conductor, Earth Fault and Neg Seq O/C. The differential method will also restrain the differential protection. Other protection functions such as

DEF can be selectively blocked by customizing the PSL, gating DDB 928: CTS Block

(originated by either method) or DDB 929 CTS Block Diff with the protection function logic.

P54x/EN OP/Nd5 Page 5-163

(OP) 5 Operation

3.3

Operation of Non-Protection Functions

Transformer Magnetizing Inrush Detector

In the Transformer Magnetizing Inrush (P443/P543/P545) and the High set differential setting section it is described how inrush is taken into account by the differential protection. As this inrush restrain technique is only valid for differential protection, there is a need of a separate inrush detector in order to prevent operation of other functions if needed.

The MiCOM P443/P445/P54x distance protection has been designed as a fast protection relay. It is therefore not desirable that distance zones should be slowed by forcing them to wait for a detection/no detection of transformer inrush current (in general applications).

For this reason, the relay has no second harmonic blocking of the distance elements in the standard protection algorithms.

However should a user wish to employ, for example, a long Zone 1 reach through a transformer, it is possible to implement harmonic blocking for magnetizing inrush current.

Provided that the Inrush Detection is Enabled , the user can then pick up the output of the

I(2)/I(1) detectors in the Programmable Scheme Logic. The user can then assign blocking functions in the PSL as necessary, because as stated above this detector does not directly route into the relay’s fixed logic.

Page 5-164 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.4

(OP) 5 Operation

Function Keys

The relay offers users 10 function keys for programming any operator control functionality via PSL. Each function key has an associated programmable tri-colour LED that can be programmed to give the desired indication on function key activation.

These function keys can be used to trigger any function that they are connected to as part of the PSL. The function key commands can be found in the ‘Function Keys’ menu

(see the Settings chapter). In the ‘Fn. Key Status’ menu cell there is a 10-bit word which represent the 10 function key commands and their status can be read from this 10-bit word.

In the programmable scheme logic editor 10 function key signals, which can be set to a logic 1 or On state, as described above, are available to perform control functions defined by the user.

Note The 10 function key signals use DDB 1096 - 1105.

The “Function Keys” column has ‘Fn. Key n Mode’ cell which allows the user to configure the function key as either ‘Toggled’ or ‘Normal’. In the ‘Toggle’ mode the function key

DDB signal output will remain in the set state until a reset command is given, by activating the function key on the next key press. In the ‘Normal’ mode, the function key

DDB signal will remain energized for as long as the function key is pressed and will then reset automatically.

A minimum pulse duration can be programmed for a function key by adding a minimum pulse timer to the function key DDB output signal.

The “Fn. Key n Status” cell is used to enable/unlock or disable the function key signals in

PSL. The ‘Lock’ setting has been specifically provided to allow the locking of a function key thus preventing further activation of the key on consequent key presses. This allows function keys that are set to ‘Toggled’ mode and their DDB signal active ‘high’, to be locked in their active state thus preventing any further key presses from deactivating the associated function. Locking a function key that is set to the “Normal” mode causes the associated DDB signals to be permanently off. This safety feature prevents any inadvertent function key presses from activating or deactivating critical relay functions.

The “Fn. Key Labels” cell makes it possible to change the text associated with each individual function key. This text will be displayed when a function key is accessed in the function key menu, or it can be displayed in the PSL.

The status of the function keys is stored in battery backed memory. In the event that the auxiliary supply is interrupted the status of all the function keys will be recorded.

Following the restoration of the auxiliary supply the status of the function keys, prior to supply failure, will be reinstated. If the battery is missing or flat the function key DDB signals will set to logic 0 once the auxiliary supply is restored.

Note The relay will only recognize a single function key press at a time and that a minimum key press duration of approximately 200msec. is required before the key press is recognized in PSL. This deglitching feature avoids accidental double presses.

P54x/EN OP/Nd5 Page 5-165

(OP) 5 Operation

3.5

Operation of Non-Protection Functions

Setting Groups Selection

0

1

0

1

The setting groups can be changed either via opto inputs, via a menu selection, via the hotkey menu or via function keys. In the Configuration column if 'Setting Group - select via optos' is selected then any opto input or function key can be programmed in PSL to select the setting group as shown in the table below. If 'Setting Group - select via menu' is selected then in the Configuration column the 'Active Settings - Group1/2/3/4' can be used to select the setting group.

The setting group can be changed via the hotkey menu providing ‘Setting Group select via menu’ is chosen.

Two DDB signals are available in PSL for selecting a setting group via an opto input or function key selection. The following table illustrates the setting group that is active on activation of the relevant DDB signals.

DDB 542 SG select x1 DDB 543 SG select 1x Selected setting group

0

0

1

1

1

2

3

4

Note Each setting group has its own PSL. Once a PSL has been designed it can be sent to any one of 4 setting groups within the relay. When downloading a PSL to the relay the user will be prompted to enter the desired setting group to which it will be sent. This is also the case when extracting a PSL from the relay.

Table 17 - Setting group active on relevant DDB signals

Page 5-166 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.6

(OP) 5 Operation

Control Inputs

As from Software Versions C1/D1/F1/G4/H4/J4, there are now 32 standard Control Inputs and 16 additional Settable control Inputs available. These are settable via the “CONTROL

INPUTS” folder and are located after the standard “Control Input” labels in the relevant settings file.

The control inputs function as software switches that can be set or reset either locally or remotely. These inputs can be used to trigger any function that they are connected to as part of the PSL. There are three setting columns associated with the control inputs that are: “CONTROL INPUTS”, “CTRL. I/P CONFIG.” and “CTRL. I/P LABELS”. The function of these columns is described below:

Menu Text Step Size

Ctrl I/P Status

Default Setting Setting Range

CONTROL INPUTS

00000000000000000000000000000000

Control Input 1 No Operation No Operation, Set, Reset

Control Input 2 to 32 No Operation No Operation, Set, Reset

Table 18 – Control Inputs settings

The Control Input commands can be found in the ‘Control Input’ menu. In the ‘Ctrl.

Ι

/P status’ menu cell there is a 32 bit word which represent the 32 control input commands.

The status of the 32 control inputs can be read from this 32-bit word. The 32 control inputs can also be set and reset from this cell by setting a 1 to set or 0 to reset a particular control input. Alternatively, each of the 32 Control Inputs can be set and reset using the individual menu setting cells ‘Control Input 1, 2, 3’ etc. The Control Inputs are available through the relay menu as described above and also via the rear communications.

In the programmable scheme logic editor 32 Control Input signals which can be set to a logic 1 or On state, as described above, are available to perform control functions defined by the user.

In the PSL editor 32 Control Input signals, use DDB 191 – 223.

Menu Text Default Setting Setting Range Step Size

Hotkey Enabled

Control Input 1

CTRL. I/P CONFIG.

11111111111111111111111111111111

Latched Latched, Pulsed

Ctrl Command 1 Set/Reset

Control Input 2 to 32 Latched

Ctrl Command 2 to 32 Set/Reset

Set/Reset, In/Out, Enabled/Disabled, On/Off

Latched, Pulsed

Set/Reset, In/Out, Enabled/Disabled, On/Off

Table 19 – Ctrl I/P Config settings

Menu Text

Control Input 1

Control Input 2 to 32

Default Setting Setting Range

CTRL. I/P LABELS

Control Input 1 16 character text

Control Input 2 to 32 16 character text

Table 20 – Ctrl I/P Labels settings

Step Size

P54x/EN OP/Nd5 Page 5-167

(OP) 5 Operation Operation of Non-Protection Functions

The “CTRL. I/P CONFIG.” column has several functions one of which allows the user to configure the control inputs as either ‘latched’ or ‘pulsed’. A latched control input will remain in the set state until a reset command is given, either by the menu or the serial communications. A pulsed control input, however, will remain energized for 10ms after the set command is given and will then reset automatically (i.e. no reset command required).

In addition to the latched/pulsed option this column also allows the control inputs to be individually assigned to the “Hotkey” menu by setting ‘1’ in the appropriate bit in the

“Hotkey Enabled” cell. The hotkey menu allows the control inputs to be set, reset or pulsed without the need to enter the “CONTROL INPUTS” column. The “Ctrl. Command” cell also allows the SET/RESET text, displayed in the hotkey menu, to be changed to something more suitable for the application of an individual control input, such as

“ON/OFF”, “IN/OUT” etc.

The “CTRL. I/P LABELS” column makes it possible to change the text associated with each individual control input. This text will be displayed when a control input is accessed by the hotkey menu, or it can be displayed in the PSL.

Note With the exception of pulsed operation, the status of the control inputs is stored in battery backed memory. In the event that the auxiliary supply is interrupted the status of all the inputs will be recorded. Following the restoration of the auxiliary supply the status of the control inputs, prior to supply failure, will be reinstated. If the battery is missing or flat the control inputs will set to logic 0 once the auxiliary supply is restored.

Page 5-168 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.7

(OP) 5 Operation

Real Time Clock Synchronization via Opto-Inputs

In modern protective schemes it is often desirable to synchronize the relays real time clock so that events from different relays can be placed in chronological order. This can be done using the IRIG-B input, if fitted, or via the communication interface connected to the substation control system. In addition to these methods, the relay offers the facility to synchronize via an opto-input by routing it in PSL to DDB xxx (Time Sync.) (xxx=116 for

P24x or xxx=400 for P445/P44y/P54x/P841). Pulsing this input will result in the real time clock snapping to the nearest minute if the pulse input is ± 3 s of the relay clock time. If the real time clock is within 3 s of the pulse the relay clock will crawl (the clock will slow down or get faster over a short period) to the correct time. The recommended pulse duration is 20 ms to be repeated no more than once per minute. An example of the time sync function is shown below:

Time of “Sync. Pulse” Corrected time

19:47:00 to 19:47:29 19:47:00 This assumes a time format of hh:mm:ss

19:47:30 to 19:47:59 19:48:00

Table 21 – Time of Sync Pulse and Corrected times

To avoid the event buffer from being filled with unnecessary time sync. events, it is possible to ignore any event that generated by the time sync. opto input. This can be done by applying the following settings:

Menu text Value

RECORD CONTROL

Opto Input Event

Protection Event

DDB 062 - 032 (Opto Inputs)

Enabled

Enabled

Set “Time Sync.” associated opto to 0

Table 22 – Record Control settings

To improve the recognition time of the time sync. opto input by approximately 10 ms, the opto input filtering could be disabled. This is achieved by setting the appropriate bit to 0 in the Opto Filter Cntl cell in the OPTO CONFIG column.

Disabling the filtering may make the opto input more susceptible to induced noise.

Fortunately the effects of induced noise can be minimized by using the methods described in the Product Design chapter.

P54x/EN OP/Nd5 Page 5-169

(OP) 5 Operation

3.8

3.8.1

3.8.1.1

3.8.1.2

Operation of Non-Protection Functions

Read Only Mode

With IEC 61850 and Ethernet / Internet communication capabilities, security has become a pressing issue. The Px40 relay provides a facility to allow the user to enable or disable the change in configuration remotely. This feature is available only in relays with Courier,

Courier with IEC 60870-5-103, Courier with IEC 61850 and Courier with IEC 60870-5-103 and IEC 61850 protocol options. It has to be noted that in IEC 60870-5-103 protocol,

Read Only Mode function is different from the existing Command block feature.

Protocol/Port Implementation:

IEC 60870-5-103 Protocol on Rear Port 1:

The protocol does not support settings but the indications, measurands and disturbance records commands are available at the interface.

Allowed:

Poll Class 1 (read spontaneous events)

Poll Class 2 (read measurands)

GI sequence (ASDU7 'Start GI', Poll Class 1)

Transmission of Disturbance Records sequence (ASDU24, ASDU25, Poll Class 1)

Time Synchronization (ASDU6)

General Commands (ASDU20), namely:

INF23 activate characteristic 1

INF24 activate characteristic 2

INF25 activate characteristic 3

INF26 activate characteristic 4

Blocked:

Write parameter (=change setting) (private ASDUs)

General Commands (ASDU20), namely:

INF16 auto-recloser on/off

INF19 LED reset

Private INFs (e.g CB open/close, Control Inputs)

Courier Protocol on Rear Port 1/2 and Ethernet

Allowed:

Read settings, statuses, measurands

Read records (event, fault, disturbance)

Time Synchronization command

Change active setting group command

Page 5-170 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.8.1.3

3.8.2

3.8.3

(OP) 5 Operation

(2) Courier Protocol

Blocked:

All setting changes

Reset Indication (Trip LED) command

Operate Control Input commands

CB operation commands

Auto-reclose operation commands

Reset demands / thermal etc... command

Clear event / fault / maintenance / disturbance record commands

Test LEDs & contacts commands

IEC 61850

Allowed:

Read statuses, measurands

Generate Reports

Extract Disturbance Records

Time Synchronization

Change active setting group

Blocked:

All controls, including:

Enable / Disable protection

Operate Control Inputs

CB operations (Close / Trip, Lock)

Reset LEDs

Courier Database Support

Three new settings, one for each remote communications port at the back of the relay are created to support the enabling and disabling of the read only mode at each port.

The NIC Read Only setting will apply to all the communications protocols (including the

Tunnelled Courier) that are transmitted via the Ethernet Port. Their default values are

‘Disabled’.

Depending on the product options, the Modbus and DNP3 communications interfaces that do not support the feature will ignore these settings.

New DDB Signals

The remote read only mode is also available in the PSL via three dedicated DDB signals:

RP1 Read Only

RP2 Read Only

NIC Read Only

Through careful scheme logic design, the activations of these read only signals can be facilitated via Opto Inputs, Control Inputs and Function Keys.

These DDBs are available in every build, however they are effective only in Courier, IEC

60870-5-103 build and in latest IEC 61850 (firmware version 42/57 onwards). Depending on the product options, the setting cells may not be available in Modbus and DNP3.0.

P54x/EN OP/Nd5 Page 5-171

(OP) 5 Operation

3.9

3.9.1

Operation of Non-Protection Functions

Fault Locator

The relay has an integral fault locator that uses information from the current and voltage inputs to provide a distance to fault location. The sampled data from the analog input circuits is written to a cyclic buffer until a fault condition is detected. The data in the input buffer is then held to allow the fault calculation to be made. When the fault calculation is complete the fault location information is available in the relay fault record.

When applied to parallel circuits mutual flux coupling can alter the impedance seen by the fault locator. The coupling will contain positive, negative and zero sequence components.

In practice the positive and negative sequence coupling is insignificant. The effect on the fault locator of the zero sequence mutual coupling can be eliminated by using the mutual compensation feature provided.

Basic Theory for Ground Faults

A two-machine equivalent circuit of a faulted power system is shown below.

I p mZr

(1-m)Z I q

3.9.2

3.9.3

Zsp Zsq

Vp

Rf

Ep Eq

I f

P0124ENa

Figure 105 - Two-machine equivalent circuit

From this diagram, the fault location (m) can be found by estimating If and solving the following Fault Location equation.

Equation 1: Fault Location

Vp = mIpZr + IfRf

Data Acquisition and Buffer Processing

The fault locator stores the sampled data within a 12 cycle cyclic buffer at a resolution of

48 samples per cycle. When the fault recorder is triggered the data in the buffer is frozen such that the buffer contains 6 cycles of pre-trigger data and 6 cycles of post-trigger data.

Fault calculation commences shortly after this trigger point.

The trigger for the fault recorder is user selectable via the PSL.

The fault locator can store data for up to four faults. This ensures that fault location can be calculated for all shots on a typical multiple reclose sequence.

Faulted Phase Selection

Phase selection is derived from the current differential protection or the superimposed current phase selector.

Phase selection and fault location calculations can only be made if the current change exceeds 5% In.

Page 5-172 P54x/EN OP/Nd5

Operation of Non-Protection Functions

3.9.4

3.9.5

3.9.6

(OP) 5 Operation

Fault Location Calculation

This works by:

1. First obtaining the vectors

2. Selecting the faulted phase(s)

3. Estimating the phase of the fault current, If, for the faulted phase(s)

4. Solving the Fault Location equation for the fault location m at the instant of time where If = 0

Obtaining the Vectors

Different sets of vectors are chosen depending on the type of fault identified by the phase selection algorithm. The calculation using the Fault Location equation is applied for either a phase-to-ground fault or a phase-to-phase fault.

Thus for an A-phase to ground fault:

Equation 2: A-phase to ground fault

IpZr

And

Vp

=

=

Ia (Zline /THETA line) + In (Zresidual /THETA residual)

VA

For an A-phase to B-phase fault:

Equation 3: A-phase to B-phase fault

IpZr

And

Vp

=

=

Ia (Zline /THETA line) – Ib (Zresidual /THETA residual)

VA – VB

For a Ground fault:

The calculation for a ground fault is modified when mutual compensation is used:

Equation 4: ground fault

IpZr=Ia(Zline/THETA line) +In (residual/THETA residual)+ Im(mutual/THETA mutual)

Solving the Equation for the Fault Location

As the sine wave of If passes through zero, the instantaneous values of the sine waves

Vp and Ip can be used to solve the Fault Location equation for the fault location m. (The term IfRf being zero.)

This is determined by shifting the calculated vectors of Vp and IpZr by the angle (90° - angle of fault current) and then dividing the real component of Vp by the real component of IpZr. See the Fault locator selection of fault current zero diagram below.

P54x/EN OP/Nd5 Page 5-173

(OP) 5 Operation

IpZr

Vp

If = 0

Operation of Non-Protection Functions

3.9.7

Vp IpZr

P0125ENa

Figure 106 - Fault locator selection of fault current zero i.e.:

Phase advanced vector Vp

Vp = | Vp | (cos(s) + jsin(s)) * (sin(d) + jcos(d))

Vp = | Vp | [- sin(s-d) + jcos(s-d)]

Phase advanced vector IpZr

IpZr = | IpZr | (cos (e) + jsin (e)) * (sin (d) + jcos (d))

IpZr = | IpZr | [- sin(e-d) + jcos(e-d)]

Therefore from the Fault Location equation: m = Vp ÷ (Ip * Zr) at If = 0 m = Vpsin(s-d) / (IpZr * sin(e-d))

Where: d s e

=

=

= angle of fault current If angle of Vp angle of IpZr

Hence, the relay evaluates m which is the fault location as a percentage of the fault locator line impedance setting and then calculates the output fault location by multiplying this by the line length setting. When calculated, the fault location can be found in the fault record under the " VIEW RECORDS " column in the Fault Location cells. Distance to fault is available in kilometers, miles, impedance or percentage of line length.

Mutual Compensation

Analysis of a ground fault on one circuit of a parallel over-head line shows that a fault locator positioned at one end of the faulty line will tend to over-reach while that at the other end will tend to under-reach. In cases of long lines with high mutual inductance, mutual zero sequence compensation can be used to improve the fault locator accuracy.

The compensation is achieved by taking an input to the relay from the residual circuit of the current transformers in the parallel line.

The MiCOM P443/P54x/P841 provides mutual compensation for both the fault locator function, AND the distance protection zones.

Page 5-174 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4

4.1

4.1.1

4.1.2

4.1.2.1

(OP) 5 Operation

SINGLE CB CONTROL: P543/P545 OPERATION

This section describes the P443/P543/P545/P841A operational control of a single circuit breaker.

The circuit breaker control and monitoring in the P443/P543/P545 provides single-phase or three-phase switching of a feeder controlled by a single circuit breaker.

Single and Three Phase Auto-Reclosing

Time Delayed and High Speed Auto-Reclosing

The MiCOM P443/P543/P545 will initiate auto-reclosure following any current differential,

Zone 1, or distance-aided scheme trips which occur. In addition, the user can selectively decide to auto-reclose for trips from time-delayed distance zones, overcurrent and earth

(ground) elements, and DEF aided schemes.

The auto-reclose function offers multi-shot auto-reclose control, selectable to perform up to a four shot cycle. Dead times (Note 1) for all shots (Note 2) are independently adjustable. Should the CB close successfully at the end of the dead time, a Reclaim Time starts. If the circuit breaker does not trip again, the auto-reclose function resets at the end of the reclaim time. If the protection trips again during the reclaim time the relay advances to the next shot in the programmed cycle, or, if all programmed reclose attempts have been made, goes to lockout.

Note Dead Time denotes the open (dead) interval delay of the CB.

Note 2 A Shot is a reclosure attempt.

Logic diagrams to explain the operation of the auto-reclose feature are grouped together at the end of this section.

Auto-Reclose Logic Inputs (P543/P545)

The auto-reclose function uses inputs in the logic, which can be assigned and activated from any of the opto-isolated inputs on the relay via the Programmable Scheme Logic

(PSL). Contacts from external equipment may be used to influence the auto-recloser via the optos, noting that the CB Status (open/closed) must also be available via auxiliary contact inputs to the relay.

These logic inputs can also be assigned and activated from other sources. The function of these inputs is described below, identified by their DDB signal text. The inputs can be selected to accept either a normally open or a normally closed contact, programmable via the PSL editor.

CB Healthy (P543/P545)

The majority of Circuit Breakers (CBs) are only capable of providing one trip-close-trip cycle. Following this, it is necessary to re-establish sufficient energy in the CB before the

CB can be reclosed. The CB Healthy input is used to ensure that there is sufficient energy available to close and trip the CB before initiating a CB close command. If on completion of the dead time, sufficient energy is not detected by the relay from the CB

Healthy input for a period given by the CB Healthy time timer, lockout will result and the

CB will remain open.

P54x/EN OP/Nd5 Page 5-175

(OP) 5 Operation

4.1.2.2

4.1.2.3

4.1.2.4

4.1.2.5

Single CB Control: P543/P545 Operation

BAR (P543/P545)

External inputs can be used to block auto-reclose. The signal “Block CB AR” DDB (448) is available for mapping via the PSL from an opto input or a communications input. The

“Block CB AR” input, if asserted, will block the operation of the auto-reclose cycle and, if auto-reclose is in progress, it will force the circuit breaker to lockout.

Typically it is used where, dependent upon the type of protection operation, auto-reclose may, or may not, be required. An example is on a transformer feeder, where autoreclosing may be initiated from the feeder protection but blocked from the transformer protection. “Block CB AR” can also be used in cases where the auto-reclose cycle is likely to fail for conditions associated with the protected circuit. The input can be used for example if, anywhere during the dead time, a circuit breaker indicates that it is not capable of switching (low gas pressure or loss of vacuum alarm occurs).

Reset Lockout (P543/P545)

The following DDB signal is available for mapping in PSL from opto inputs or communications inputs: DDB (446) “Reset Lockout.

Pole Discrepancy (P543/P545)

Circuit breakers with independent mechanisms for each pole normally incorporate a

‘phases not together’ or ‘pole discrepancy’ protection device which automatically trips all three-phases if they are not all in the same position i.e. all open or all closed.

During single pole auto-reclosing a pole discrepancy condition is deliberately introduced and the pole discrepancy device must not operate for this condition. This may be achieved by using a delayed action pole discrepancy device with a delay longer than the single pole auto-reclose dead time, “SP AR Dead Time”. Alternatively, a signal can be given from the relay during the single pole auto-reclose dead time, “AR 1 Pole In Prog”,

DDB (845), to inhibit the external pole discrepancy device.

In the relay, the “Pole Discrepancy” input is activated by a signal from an external device indicating that all three poles of the CB are not in the same position. The “Pole

Discrepancy” inputs DDB (451) forces a 3 pole trip on the circuit breaker through PSL mapping.

The Pole Discrepancy input is activated by a signal from an external device indicating that all three poles of the CB are not in the same position. The Pole Discrepancy input forces a 3-pole trip which will cancel any single pole auto-reclose in progress and start three pole auto-reclose in progress.

Auto-Reclose Enable (P543/P545) Software D1a and Later

This is an Output signal available in the PSL, which can be mapped to an opto status input to enable the autoreclose as long as the below conditions are satisfied.

Page 5-176 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.1.2.6

4.1.2.7

4.1.2.8

(OP) 5 Operation

Autoreclose can be Enabled or Disabled. This is done using a combination of Setting changes, starting with DDB 1384 (AR Enable) operation. Here is what is needed to

Enable or Disable the Autoreclose:

AR Enabled = Autoreclose Enabled (0924 = 1) AND

(AR Telecontrol In Service (070B = 1) OR AR Enable DDB active (DDB 1384 = 1))

AND

(AR Enable CB1 DDB Active (DDB 1609 = 1) OR AR Enable CB2 DDB Active

(DDB 1605 = 1))

AR Disabled = Autoreclose Enabled (0924 = 0) OR

(AR Telecontrol Out of Service (070B = 2) AND AR Enable DDB active (DDB 1384

= 0)) OR

(AR Enable CB1 DDB Active (DDB 1609 = 1) AND AR Enable CB2 DDB Active

(DDB 1605 = 1))

Note More details are provided in the Auto-Reclose Skip Shot 1 (P543/P545) and the Auto-Reclose (P544/P546) sections.

Here is the new description of DDB 1384:

DDB No Text

DDB 1384 AR Enable

Description

External input via DDB mapped in PSL to enable AR, but ONLY if

“Enable AR CB1” DDB or “Enable AR CB2” DDB is set and “Auto-

Reclose” Configuration setting is enabled.

Enable 1 Pole AR (P543/P545)

The En 1 Pole Reclose input is used to select the single-phase auto-reclose operating mode.

Enable 3-pole AR(P543/P545)

The En 3-pole Reclose input is used to select the three-phase auto-reclose operating mode.

External Trip (P543/P545)

The External Trip 3Ph input and the External Trip A, External Trip B and External Trip C inputs can be used to initiate three or single-phase auto-reclose.

Note These signals are not used to trip the CB but do initiate auto-reclose. To trip the CB directly they could be assigned to the trip contacts of the relay in the

PSL.

P54x/EN OP/Nd5 Page 5-177

(OP) 5 Operation

4.1.3

4.1.3.1

4.1.3.2

4.1.3.3

4.1.4

4.1.4.1

4.1.4.2

4.1.4.3

Single CB Control: P543/P545 Operation

Internal Signals (P543/P545)

Trip Initiate Signals (P543/P545)

The Trip Inputs A, Trip Inputs B and Trip Inputs C signals are used to initiate signals or three-phase auto-reclose.

Note For single-phase auto-reclose these signals must be mapped in the PSL as shown in the default.

CB Status (P543/P545)

The CB Open 3 ph, CB Open A ph, CB Open B ph and CB Open C ph, signals are used to indicate if a CB is open three or single-phase. These are driven from the internal pole dead logic and the CB auxiliary inputs.

The CB Closed 3 ph, CB Closed A ph, CB Closed B ph and CB Closed C ph, signals are used to indicate if a CB is closed three or single-phase. These are driven from the internal pole dead logic and the CB auxiliary inputs.

Check Synch OK and System Check OK (P543/P545)

DDB (883) “Check Sync1 OK” & DDB (884) “Check Sync2 OK” are output from the circuit breaker Check Sync logic and indicate conditions for the circuit breaker sync check stage1 & 2 are satisfied.

Auto-Reclose Logic Outputs (P543/P545)

Any auto-reclose lockout condition will reset all auto-reclose in progress signals associated with the circuit breaker (e.g. “ARIP”).

AR 1 Pole in Progress (P543/P545)

The “AR 1Pole in Prog” (DDB 845) output signal indicates that single-phase auto-reclose is in progress. The output remains high from protection initiation until lockout, or successful reclosure of the circuit breaker which is indicated by the circuit breaker successful auto-reclose signal,“CB Succ 1P AR” (DDB 1571).

AR 3-pole in Progress (P543/P545)

The “AR 3Pole in Prog” (DDB 844) output signal indicates that three-phase auto-reclose is in progress. The output remains high from protection initiation until lockout, or successful reclosure of the circuit breaker which is indicated by the circuit breaker successful auto-reclose signal, “CB Succ 3P AR”.

Successful Close (P543/P545)

The AR Successful Reclose output indicates that an auto-reclose cycle has been successfully completed. A successful auto-reclose signal is given after the CB has tripped from the protection and reclosed whereupon the fault has been cleared and the reclaim time has expired resetting the auto-reclose cycle. The successful auto-reclose output is reset at the next CB trip or from one of the reset lockout methods; see the ’Reset from lockout’ section.

Page 5-178 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.1.4.4

4.1.4.5

(OP) 5 Operation

AR Status (P543/P545)

The A/R In Status 1P output indicates that the relay is in the single-phase auto-reclose mode. The A/R In Status 3P output indicates that the relay is in the three-phase autoreclose mode.

Auto Close (P543/P545)

The Auto Close output indicates that the auto-reclose logic has issued a close signal to the CB. This output feeds a signal to the control close pulse timer and remains on until the CB has closed. This signal may be useful during relay commissioning to check the operation of the auto-reclose cycle. This signal is combined with the manual close signal to produce the signal Control Close which should be mapped to an output contact.

P54x/EN OP/Nd5 Page 5-179

(OP) 5 Operation

4.1.5

4.1.5.1

4.1.5.2

4.1.5.3

Single CB Control: P543/P545 Operation

Auto-Reclose Alarms (P543/P545)

The following DDB signals will produce a relay alarm. These are described below, identified by their DDB signal text.

AR No Checksync (Latched) (P543/P545)

The AR No Checksync alarm indicates that the system voltages were not in synchronism at the end of the Check Sync Time, leading to a lockout condition. This alarm can be reset using one of the reset lockout methods; see the ’Reset from lockout’ section.

AR CB Unhealthy (Latched) (P543/P545)

The AR CB Unhealthy alarm indicates that the CB Healthy input was not energized at the end of the CB Healthy Time, leading to a lockout condition. The CB Healthy input is used to indicate that there is sufficient energy in the CB operating mechanism to close and trip the CB at the end of the dead time. This alarm can be reset using one of the reset lockout methods; see the Reset from Lockout section.

AR Lockout (Self Reset) (P543/P545)

The AR Lockout alarm indicates that the relay is in a lockout state and that further reclose attempts will not be made; see the Reset from Lockout section for more details. This alarm can be reset using one of the reset lockout methods; see the Reset from Lockout section.

Page 5-180 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.1.6

(OP) 5 Operation

Auto-Reclose Logic Operating Sequence (P543/P545)

An auto-reclose cycle can be internally initiated by operation of a protection element, provided the circuit breaker is closed until the instant of protection operation. The user can, via a setting, determine if the auto-reclose shall be initiated on the rising edge of the protection trip (Protection Op) or on the falling edge (Protection Reset).

If single pole auto-reclose [A/R Status 1P] only is enabled then if the first fault is a singlephase fault the single pole dead time (1 Pole Dead Time) and single pole auto-reclose in progress [AR 1pole in prog] starts on the rising or falling edge (according to the setting) of the single-phase trip. If the relay has been set to allow more than one single pole reclose

[Single Pole Shot >1] then any subsequent single-phase faults will be converted to 3-pole trips. The three pole dead times ("Dead Time 2, Dead Time 3, Dead Time 4") [Dead Time

2, 3, 4] and three pole auto-reclose in progress [AR 3pole in prog] will start on the rising or falling edge (according to the setting) of the three pole trip for the 2nd, 3rd and 4th trips

[shots]. For a multi-phase fault the relay will lockout on the rising or falling edge

(according to the setting) of the three-phase trip.

If three pole auto-reclose [A/R Status 3P] only is enabled then for any fault the three pole dead time ("Dead Time 1, Dead Time 2, Dead Time 3, Dead Time 4") [Dead Time 1, 2, 3,

4] and three pole auto-reclose in progress [AR 3pole in prog] starts on the rising or falling edge (according to the setting) of the three-phase trip. The logic forces a 3-pole trip

[Force 3-pole AR] for any single-phase fault if three pole auto-reclose [A/R Status 3P] only is enabled.

If single [A/R Status 1P] and three-phase auto-reclose [A/R Status 3P] are enabled then if the first fault is a single-phase fault the single pole dead time ("1 Pole Dead Time") [1

Pole Dead Time] and single pole auto-reclose in progress [AR 1pole in prog] starts on the rising or falling edge (according to the setting) of the single-phase trip. If the first fault is a multi-phase fault the three pole dead time ("Dead Time 1") and three pole auto-reclose in progress [AR 3pole in prog] starts on the rising or falling edge (according to the setting) of the three-phase trip. If the relay has been set to allow more than one reclose [Three Pole

Shot >1] then any subsequent faults will be converted to 3-pole trips [Force 3-pole AR].

The three pole dead times ("Dead Time 2, Dead Time 3, Dead Time 4") [Dead Time 2, 3,

4] and three pole auto-reclose in progress [AR 3pole in prog] will start on the rising or falling edge (according to the setting) of the three pole trip for the 2nd, 3rd and 4th trips

[shots]. If a single-phase fault evolves to a multi-phase fault during the single pole dead time [1 Pole Dead Time] then single pole auto-reclose in progress [AR 1pole in prog] is stopped and the three pole dead time [Dead Time 1] and three pole auto-reclose in progress [AR 3pole in prog] is started.

At the end of the relevant dead time, the auto-reclose single-phase or three-phase in progress signal is reset and a CB close signal is given, provided system conditions are suitable. The system conditions to be met for closing are that the system voltages are in synchronism or dead line/live bus or live line/dead bus conditions exist, indicated by the internal check synchronizing element and that the circuit breaker closing spring, or other energy source, is fully charged indicated from the CB Healthy input. The CB close signal is cut-off when the circuit breaker closes. For single pole auto-reclose no voltage or synchronism check is required as synchronizing power is flowing in the two healthy phases. Check synchronizing for the first three-phase cycle is controlled by a setting.

When the CB has closed the reclaim time (“Reclaim Time”) starts. If the circuit breaker does not trip again, the auto-reclose function resets at the end of the reclaim time. If the protection operates during the reclaim time the relay either advances to the next shot in the programmed auto-reclose cycle, or, if all programmed reclose attempts have been made, goes to lockout.

P54x/EN OP/Nd5 Page 5-181

(OP) 5 Operation Single CB Control: P543/P545 Operation

Every time the relay trips the sequence counter is incremented by 1. The relay compares the Single Pole Shots and Three Pole Shots counter values to the sequence count. If the fault is single-phase and the sequence count is greater than the Single Pole Shots setting then the relay will lockout. If the fault is multi-phase phase and the sequence count is greater than the Three Pole Shots setting then the relay will also lockout.

For example, if Single Pole Shots = 2 and Three Pole Shots = 1, after two phase-phase faults the relay will lockout because the sequence count = 2 which is greater than the

Three Pole Shots target of 1 and the second fault was a multi-phase fault. If there was a permanent earth fault the relay would trip and reclose twice and on the third application of earth fault current it would lockout. This is because on the third application of fault current the sequence count would be greater than the Single Pole Shots target of 2 and the third fault was an earth fault. There is no lockout at the second trip because the second trip was single-phase and the sequence count is not greater than the Single Pole Shots target of 2. If there was a single-phase fault which evolved to a phase-phase-ground fault then the relay would trip and reclose and on the second multi-phase fault would lockout.

This is because on the second application of fault current the sequence count is greater than the Three Pole Shots target of 1 and the second fault was a multi-phase fault.

The total number of auto-reclosures is shown in the CB Control menu under Total

Reclosures. This value can be reset to zero with the Reset Total A/R command.

The selection of which protection is used to initiate auto-reclose can be made using the settings Initiate AR, No Action or Block AR for the protection functions listed in the autoreclose menu. See the Auto-reclose Initiation section for more details.

For multi-phase faults the auto-reclose logic can be set to allow auto-reclose block for 2 and 3-phase faults or to block auto-reclose for 3-phase faults only using the setting Multi

Phase AR - Allow AR/BAR 2 & 3 Phase/BAR 3 Phase in the Auto-reclose settings.

Figure 107 - Auto-reclose timing diagram - single fault

Trip

(AR1 in Prog) or (AR3 in Prog)

AR Close

Force 3 Pole

Reclaim Time

Successful Close

Figure 108 - Auto-reclose timing diagram - repeated fault inception

P1025ENc

Page 5-182 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation (OP) 5 Operation

Figure 109 - Auto-reclose timing diagram - fault with system synchronism

Figure 110 - Auto-reclose timing diagram - lockout for no checksynch

P54x/EN OP/Nd5 Page 5-183

(OP) 5 Operation

4.1.7

4.1.7.1

4.1.7.2

Single CB Control: P543/P545 Operation

Auto-Reclose: Main Operating Features (P543/P545)

As from Software Version H4, the possible statuses of the Auto-Reclose function have changed. The new method means that the function now works in the same way across the whole P54x range. It does this because of the following DDB Numbers.

DDB Numbers 856, 857, 1532 and 1533

DDB Nos 856 and 857 have never been included in the MiCOM P544/P546 products.

In the MiCOM P543/P545 (running on Software Version 57), DDB Nos 856 and 857 were available to show the mode (3P, 1P) for the Auto-Reclose (AR) function.

In the MiCOM P543/P545 (running on Software Version D1), DDB Nos 856 and 857 were removed.

As from Software Version H4a, the following situation applies:

DDB

No

Source Element Name Description

856

857

Autoreclose

Autoreclose

DDB_AR_IN_

SERVICE_3P

DDB_AR_IN_

SERVICE_1P

1532 Autoreclose

DDB_AR_IN_

SERVICE_3P_FOLLOWER

1533 Autoreclose

DDB_AR_IN_

SERVICE_1P_FOLLOWER

3 Pole auto-recloser in service – the autoreclose function has been enabled either in the relay menu, or by an auto input.

Single pole auto-recloser in service – the auto-reclose function has been enabled either in the relay menu, or by an auto input.

Follower 3 Pole auto-recloser in service – the auto-reclose function has been enabled either in the relay menu, or by an auto input.

Follower Single pole auto-recloser in service

– the auto-reclose function has been enabled either in the relay menu, or by an auto input.

For MiCOM P44y/P54x products with a single CB application (P543/P545), DDB

Nos 856 and 857 again show the mode (3P, 1P).

For MiCOM P44y/P54x products with a dual CB application (P544/P546), DDB Nos

856 and 857 again show the mode (3P, 1P) for the leader CB.

For MiCOM P44y/P54x products with a dual CB application (P544/P546), DDB Nos

1532 and 1533 show the mode (3P, 1P) for the follower CB.

Auto-Reclose Modes (P543/P545)

The auto-reclose function has three operating modes:

Single-Pole Auto-reclose

Three-Pole Auto-reclose

Single/Three-Pole Auto-reclose

Single-pole and three-pole auto-reclose modes can be selected from opto inputs assigned for En 1 Pole Reclose and En 3-pole Reclose respectively. Energizing both opto inputs would select the single/three pole operating mode. Alternatively, the settings

Single Pole A/R - Enabled/Disabled and Three Pole A/R - Enabled/Disabled in the CB

Control menu can also be used to select the operating modes. How these operating modes affect the operating sequence is described above.

Auto-Reclose Initiation (P543/P545)

Auto-reclose is initiated from the internal protection of the relay:

Page 5-184 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.1.7.3

4.1.7.4

4.1.7.5

(OP) 5 Operation

By default, all “instantaneous” schemes will initiate auto-reclose, therefore current differential, Zone 1 distance, Aided Scheme 1, and Aided Scheme 2 will all initiate

AR.

For these instantaneous tripping elements, it is possible to override initiation for user set combinations of multi-phase faults if required, by use of the ‘Multi Phase

AR’ Block setting. This will prevent auto-reclose initiation, and drive the sequence to lockout.

The directional aided schemes, the DEF schemes and TOR (distance option only) can be selected to Initiate AR or Block AR in the auto reclose settings. The overcurrent, earthfault, and other distance zones (where optionally specified) can be selected to Initiate AR, Block AR or cause No Action in the auto reclose settings.

Auto-Reclose Inhibit Following Manual Close (P543/P545)

The AR Inhibit Time setting can be used to prevent auto-reclose being initiated when the

CB is manually closed onto a fault. Auto-reclose is disabled for the AR Inhibit Time following manual CB closure.

Auto-Reclose Lockout (P543/P545)

If protection operates during the reclaim time, following the final reclose attempt, the relay will be driven to lockout and the auto-reclose function will be disabled until the lockout condition is reset. This will produce an alarm, AR Lockout.

The block auto-reclose logic in the relay will also cause an auto-reclose lockout if autoreclose is in progress. The BAR input assigned to an opto input will block auto-reclose and cause a lockout if auto-reclose is in progress. The auto-reclose logic can also be set to block auto-reclose for 2 and 3-phase faults or to block auto-reclose for 3-phase faults only using the setting Multi Phase AR - Allow AR/BAR 2&3 Phase/BAR 3 Phase in the

Auto-reclose menu. Also, the protection functions can be individually selected to block auto-reclose using the settings, Initiate AR , No Action or Block AR in the Auto-reclose menu.

Auto-reclose lockout can also be caused by the CB failing to close because the CB springs are not charged/low gas pressure or there is no synchronism between the system voltages indicated by the AR CB Unhealthy and AR No Checksync alarms.

An auto-reclose lockout is also given if the CB is open at the end of the reclaim time.

Note CB Lockout, can also be caused by the CB condition monitoring functions maintenance lockout, excessive fault frequency lockout, broken current lockout, CB failed to trip and CB failed to close and manual close - no check synchronism and CB unhealthy. These lockout alarms are mapped to a composite signal CB Lockout Alarm.

Reset from Lockout (P543/P545)

The Reset Lockout input assigned to an opto input can be used to reset the auto-reclose function following lockout and reset any auto-reclose alarms, provided that the signals which initiated the lockout have been removed. Lockout can also be reset from the clear key or the CB CONTROL command Lockout Reset .

P54x/EN OP/Nd5 Page 5-185

(OP) 5 Operation

4.1.7.6

4.1.7.7

4.1.7.8

Single CB Control: P543/P545 Operation

The Reset Lockout by setting, CB Close/User interface in CB CONTROL is used to enable/ disable reset of lockout automatically from a manual close after the manual close time AR Inhibit Time .

System Check on Shot 1 (P543/P545)

The SysChk on Shot 1 setting is used to Enable/Disable system checks for the first reclose after a 3-pole trip in an auto-reclose cycle. When the SysChk on Shot 1 is set to

Disabled no system checks are required for the first reclose which may be preferred when high speed auto-reclose is applied to avoid the extra time for a system check.

Subsequent reclose attempts in a multi-shot cycle will still require a system check.

Immediate Auto-Reclose with Check Synchronism (P543/P545)

The CS AR Immediate setting allows immediate auto-reclosure without waiting for the expiry of the settable dead time, provided the check synchronism conditions are met and a fault is not detected. The intention is to allow the local end to reclose immediately if the remote end has already reclosed successfully and the synchronizing conditions are met.

This feature applies when the setting is enabled. It applies to all dead times, just for three pole auto-reclose and just for Live Line-Live Bus condition (plus other check synchronizing conditions of phase angle, frequency etc).

When set to disabled the relay will wait for the relevant dead time.

Discrimination Timer Setting (P543/P545)

A single-phase fault can result in a single-phase trip and a single-pole auto-reclose cycle will be started, however the fault may evolve during the dead time to affect another phase. For an evolving fault, the protection issues a three-phase trip.

The discrimination timer starts simultaneously with the dead time timer, and is used to discriminate from which point in time an evolving fault is identified as no longer one continued evolution of the first fault, but is now a discrete second fault condition. If the evolving fault occurs before the expiry of the discrimination time, the protection will start a three-pole auto-reclose cycle if permitted. If however, the second phase fault occurs after the discrimination time, the automatic reclose function is blocked, and driven to AR

Lockout.

Page 5-186 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.1.8

4.1.9

(OP) 5 Operation

Auto-Reclose Skip Shot 1 (P543/P545)

As from Software Version D1a, the Auto-Reclose can now be configured so that it skips the first shot. This means that the first AR cycle is skipped (missed), and so starts Dead

Time 2 at the first reclose attempt.

This is done by changing DDB No 1384 (Skip Shot 1 = Enabled/Disabled) as required.

This means that this signal can now be mapped from an opto to a comms input.

This is an Output signal available in the PSL,which can be mapped to an opto status input to force the autoreclose to skip shot 1.

DDB No Text

DDB 1384 AR Skip Shot1

Description

DDB mapped in PSL from opto or comms input: if setting "AR

Skip Shot 1" = Enable and this input is high when a protection operation initiates an autoreclose cycle, then the sequence counter advances directly to SC:COUNT = 2 so the autoreclose cycle skips (omits) Shot 1 and instead starts at Dead Time 2 for the first reclose attempt.

Auto-Reclose Logic Diagrams (P543/P545)

SETTING

CONFIGURATION

AUTO-RECLOSE

SETTING CB control

Single pole A/R

Enabled

Disabled

Enabled

Disabled

DDB En 1 pole reclose (449)

1

SETTING CB control

Three pole A/R

DDB En 3 pole reclose (450)

Enabled

Disabled

1

HMI Command

Command (from IEC60670-5-103)

DDB AR (on/off) pulse

1382 & 1383

DDB AR In Service (1384)

ARC Status

Note 1

Note: Default AR Command is ON

Figure 111 - Auto-reclose enable logic

1

&

&

DDB A/R Status 1 P (857)

DDB A/R Status 3 P (856)

1 DDB A/R in

Service (1385)

& Int Signal

Force 3 P

P1098ENd

P54x/EN OP/Nd5 Page 5-187

(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 112 - Auto-reclose single/three pole tripping

Page 5-188 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation (OP) 5 Operation

Figure 113 - Auto-reclose inhibit sequence count (P543/P545)

P54x/EN OP/Nd5 Page 5-189

(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 114 - Auto-reclose cycles (P543/P545)

Page 5-190 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation (OP) 5 Operation

Figure 115 - Auto-reclose close

P54x/EN OP/Nd5 Page 5-191

(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 116 - Auto-reclose lockout logic (P543/P545)

Page 5-192 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation (OP) 5 Operation

INTSIG SinglePoleARIP

INTSIG ThreePoleARIP

1

INTSIG SinglePhaseTrip

INTSIG ThreePhaseTrip

INTSIG ARLockout

1

INTSIG SequenceCount1

INTSIG SequenceCount2

INTSIG SequenceCount3

INTSIG SequenceCount4

INTSIG HealthyWindow

Enable

SET:

Single Pole A/R

Disable

DDB En 1 pole reclose (449)

INTSIG Force 3P

DDB BAR (448)

&

&

1

1

&

1

Figure 117 - Auto-reclose force 3-pole trip (P543/P545)

DDB Auto Close (854)

DDB CB Closed A ph (908)

DDB CB Closed B ph (909)

DDB CB Closed C ph (910)

DDB CB Closed 3 ph (907)

&

&

1

S

RD

Q &

1

INTSIG ReclaimTimeComplete

INTSIG ExternalResetLockout

DDB CB Open A ph (904)

DDB CB Open B ph (905)

DDB CB Open C ph (906)

DDB CB Open 3 ph (903)

1

Figure 118 - Auto-reclose close notify (P543/P545)

DDB Pole Discrepancy (451)

INTSIG ARLockout (effectively DDB_CB_Lockout_Alarm (860))

DDB CB Open A ph (904)

DDB CB Open B ph (905)

DDB CB Open C ph (906)

1

DDB Force 3 Pole (858)

P1104ENe

S

RD

Q

DDB Successful Close (852)

P1105ENc

DDB Pole

Discrepancy (699)

P1106ENf

Figure 119 - Ddb pole discrepancy trip (P543/P545)

P54x/EN OP/Nd5 Page 5-193

(OP) 5 Operation

4.2

4.2.1

4.2.2

Single CB Control: P543/P545 Operation

System Checks (including Check Synchronizer) (P543/P545)

Overview (P543/P545)

In some situations it is possible for both “bus” and “line” sides of a Circuit Breaker (CB) to be live when the CB is open, for example at the ends of a feeder which has a power source at each end. Therefore, when closing the CB, it is normally necessary to check that the network conditions on both sides are suitable, before giving a CB Close command. This applies to both manual CB closing and auto-reclosure. If a CB is closed when the line and bus voltages are both live, with a large phase angle, frequency or magnitude difference between them, the system could be subjected to an unacceptable shock, resulting in loss of stability, and possible damage to connected machines.

System checks involve monitoring the voltages on both sides of a circuit breaker, and, if both sides are live, performing a synchronism check to determine whether the phase angle, frequency and voltage magnitude differences between the voltage vectors, are within permitted limits.

The pre-closing system conditions for a given Circuit Breaker (CB) depend on the system configuration and, for auto-reclosing, on the selected auto-reclose program. For example, on a feeder with delayed auto-reclosing, the CBs at the two line ends are normally arranged to close at different times. The first line end to close usually has a live bus and a dead line immediately before reclosing, and charges the line (dead line charge) when the

CB closes. The second line end CB sees live bus and live line after the first CB has reclosed. If there is a parallel connection between the ends of the tripped feeder, they are unlikely to go out of synchronism, i.e. the frequencies will be the same, but the increased impedance could cause the phase angle between the two voltages to increase. Therefore the second CB to close might need a synchronism check, to ensure that the phase angle has not increased to a level which would cause unacceptable shock to the system when the CB closes.

If there are no parallel interconnections between the ends of the tripped feeder, the two systems could lose synchronism, and the frequency at one end could “slip” relative to the other end. In this situation, the second line end would require a synchronism check comprising both phase angle and slip frequency checks.

If the second line end busbar has no power source other than the feeder which has tripped, the circuit breaker will see a live line and dead bus assuming the first circuit breaker has reclosed. When the second line end circuit breaker closes the bus will charge from the live line (dead bus charge).

VT Selection (P543/P545)

The MiCOM P443/P445/P543/P545 has a three-phase Main VT input and a single-phase

Check Sync VT input. Depending on the primary system arrangement, the main threephase VT for the relay may be located on either the busbar side or the line side of the circuit breaker, with the check sync VT being located on the other side. Hence, the relay has to be programmed with the location of the Main VT. This is done using the Main VT

Location setting in the CT & VT RATIOS menu.

The Check Sync VT may be connected to either a phase to phase or phase to neutral voltage, and for correct synchronism check operation, the relay has to be programmed with the required connection. The C/S Input setting in the CT & VT RATIOS menu should be set to A-N, B-N, C-N, A-B, B-C or C-A A-N/1.732, B-N/1.732 or C-N/1.732 as appropriate.

Page 5-194 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.2.3

4.2.4

4.2.5

(OP) 5 Operation

Basic Functionality (P543/P545)

System check logic is collectively enabled or disabled as required, by setting System

Checks in the CONFIGURATION menu. The associated settings are available in

SYSTEM CHECKS, sub-menus VOLTAGE MONITORS, CHECK SYNC and SYSTEM

SPLIT. If System Checks is selected to Disabled, the associated SYSTEM CHECKS menu becomes invisible, and a Sys checks Inactive DDB signal is set.

In most situations where synchronism check is required, the Check Sync 1 function alone will provide the necessary functionality, and the Check Sync 2 and System Split signals can be ignored.

System Check Logic Outputs (P543/P545)

When enabled, the MiCOM P443/P445/P543/P545 system check logic sets signals as listed below, according to the status of the monitored voltages.

Line Live

Line Dead

Bus Live

If the Line voltage magnitude is not less than VOLTAGE

MONITORS - Live Voltage setting

If the Line voltage magnitude is less than VOLTAGE MONITORS -

Dead Voltage setting

If the Bus voltage magnitude is not less than VOLTAGE

MONITORS - Live Voltage setting

Bus Dead If the Bus voltage magnitude is less than VOLTAGE MONITORS -

Dead Voltage setting

Check Sync 1 OK If Check Sync 1 Status is Enabled, the Line and Bus voltages are both live, and the parameters meet the CHECK SYNC - Check

Sync 1 ---- settings

Check Sync 2 OK If Check Sync 2 Status is Enabled, the Line and Bus voltages are both live, and the parameters meet the CHECK SYNC - Check

Sync 2 ---- settings

System Split If SS Status is Enabled, the Line and Bus voltages are both live, and the measured phase angle between the voltage vectors is greater than SYSTEM SPLIT - SS Phase Angle setting

All the above signals are available as DDB signals for mapping in Programmable Scheme

Logic (PSL). In addition, the Checksync 1 & 2 signals are “hard coded” into the autoreclose logic.

Check Sync 2 and System Split (P543/P545)

Check Sync 2 and System Split functions are included for situations where the maximum permitted slip frequency and phase angle for synchro check can change according to actual system conditions. A typical application is on a closely interconnected system, where synchronism is normally retained when a given feeder is tripped, but under some circumstances, with parallel interconnections out of service, the feeder ends can drift out of synchronism when the feeder is tripped. Depending on the system and machine characteristics, the conditions for safe circuit breaker closing could be, for example:

Condition 1: for synchronized systems, with zero or very small slip: slip  50 mHz; phase angle <30

°

Condition 2: for unsynchronized systems, with significant slip: slip  250 mHz; phase angle <10

°

and decreasing

By enabling both Check Sync 1, set for condition 1, and Check Sync 2, set for condition

2, the relay can be configured to allow CB closure if either of the two conditions is detected.

P54x/EN OP/Nd5 Page 5-195

(OP) 5 Operation

4.2.6

4.2.7

Page 5-196

Single CB Control: P543/P545 Operation

For manual circuit breaker closing with synchro check, some utilities might prefer to arrange the logic to check initially for condition 1 only. However, if a System Split is detected before the condition 1 parameters are satisfied, the relay will switch to checking for condition 2 parameters instead, based upon the assumption that a significant degree of slip must be present when system split conditions are detected. This can be arranged by suitable PSL logic, using the system check DDB signals.

Synchronism Check (P543/P545)

Check Sync 1 and Check Sync 2 are two synchro check logic modules with similar functionality, but independent settings.

For either module to function:

The System Checks setting must be Enabled

The individual Check Sync 1(2) Status setting must be Enabled

AND

AND

The module must be individually “enabled”, by activation of DDB signal Check

Sync 1(2) Enabled, mapped in PSL

When enabled, each logic module sets its output signal when:

Line volts and bus volts are both live (Line Live and Bus Live signals both set)

AND

Measured phase angle is < Check Sync 1(2) Phase Angle setting AND

(For Check Sync 2 only), the phase angle magnitude is decreasing (Check Sync 1 can operate with increasing or decreasing phase angle provided other conditions are satisfied)

AND

If Check Sync 1(2) Slip Control is set to Frequency or Frequency + Timer, the measured slip frequency is < Check Sync 1(2) Slip Freq setting

AND

If Check Sync Voltage Blocking is set to OV, UV + OV, OV + DiffV or UV + OV +

DiffV, both line volts and bus volts magnitudes are < Check Sync Overvoltage setting

AND

If Check Sync Voltage Blocking is set to UV, UV + OV, UV + DiffV or UV + OV +

DiffV, both line volts and bus volts magnitudes are > Check Sync Undervoltage setting

AND

If Check Sync Voltage Blocking is set to DiffV, UV + DiffV, OV + DiffV or UV + OV

+ DiffV, the voltage magnitude difference between line volts and bus volts is <

Check Sync Diff Voltage setting

AND

If Check Sync 1(2) Slip Control is set to Timer or Frequency + Timer, the above conditions have been true for a time > or = Check Sync 1(2) Slip Timer setting

Note Live Line/Dead Bus and Dead Bus/Line functionality is provided as part of the default PSL.

Slip Control by Timer (P543/P545)

If Slip Control by Timer or Frequency + Timer is selected, the combination of Phase

Angle and Timer settings determines an effective maximum slip frequency, calculated as:

P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.2.8

(OP) 5 Operation

2 x A

T x 360

Hz. for Check Sync 1 or

A

T x 360

Hz. for Check Sync 2

Where:

A

T

=

=

Phase Angle setting (

°

)

Slip Timer setting (seconds)

For example, with Check Sync 1 Phase Angle setting 30

°

and Timer setting 3.3 sec, the

“slipping” vector has to remain within

±

30

°

of the reference vector for at least 3.3 seconds. Therefore a synchro check output will not be given if the slip is greater than 2 x

30

°

in 3.3 seconds. Using the formula: 2 x 30

÷

(3.3 x 360) = 0.0505 Hz (50.5 mHz).

For Check Sync 2, with Phase Angle setting 10

°

and Timer setting 0.1 sec, the slipping vector has to remain within 10

°

of the reference vector, with the angle decreasing, for 0.1 sec. When the angle passes through zero and starts to increase, the synchro check output is blocked. Therefore an output will not be given if slip is greater than 10

°

in 0.1 second. Using the formula: 10

÷

(0.1 x 360) = 0.278 Hz (278 mHz).

Slip control by Timer is not practical for “large slip / small phase angle” applications, because the timer settings required are very small, sometimes < 0.1 s. For these situations, slip control by frequency is recommended.

If Slip Control by Frequency + Timer is selected, for an output to be given, the slip frequency must be less than BOTH the set Slip Freq value and the value determined by the Phase Angle and Timer settings.

System Split (P543/P545)

For the System Split module to function:

The System Checks setting must be Enabled.

The SS Status setting must be Enabled.

AND

AND

The module must be individually enabled, by activation of DDB signal System Split

Enabled, mapped in PSL.

When enabled, the System Split module sets its output signal when:

Line volts and bus volts are both live (Line Live and Bus Live signals both set).

AND

Measured phase angle is > SS Phase Angle setting.

AND

If SS Volt Blocking is set to Undervoltage, both line volts and bus volts magnitudes are > SS Undervoltage setting.

The System Split output remains set for as long as the above conditions are true, or for a minimum period equal to the SS Timer setting, whichever is longer.

The Check Sync and System Sync functionality and the Check Sync logic block diagram are shown in the following diagrams.

P54x/EN OP/Nd5 Page 5-197

(OP) 5 Operation

Live

Volts

Nominal

Volts

Dead

Volts

Single CB Control: P543/P545 Operation

Check Sync

Stage 1 Limits

V

BUS

Check Sync

Stage 2 Limits

V

LINE

Rotating

Vector

Page 5-198

±180° System Split Limits

P2131ENa

Figure 120 - Synchro check and synchro split functionality (P543/P545)

Enable/Disable

Common

Settings

System

Checks

Stage 1

Settings

Enable

(DDB_CHECKSYNC_1_ENABLED)

Blocking

Check

Sync

Stage 1

Stage 2

Settings

Enable

(DDB_CHECKSYNC_2_ENABLED)

Blocking

Check

2

Sys Split

Settings

Enable

(DDB_SYSTEM_SPLIT_ENABLED)

Blocking

System

Split

Voltage

Monitor

Settings

Voltage

Monitors

‘System Checks’ Status

(DDB_SYSCHECKS_INACTIVE)

Stage 1 Check Sync OK

(DDB_CHECKSYNC_1_OK)

Stage 2 Check Sync OK

(DDB_CHECKSYNC_2_OK)

System Split Alarm

(DDB_SYSTEM_SPLIT_ALARM)

Line Live

Bus Live

Line Dead

(DDB_SYSCHECKS_LINE_LIVE)

(DDB_SYSCHECKS_LINE_DEAD)

(DDB_SYSCHECKS_Bus_Live)

Bus Dead

(DDB_SYSCHECKS_Bus_Dead)

P4045ENa

Figure 121 - Check sync (P543/P545)

P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation

4.3

4.4

(OP) 5 Operation

Auto-Reclose/Check Synchronization Interface (P543/P545)

Output signals from the internal system check function and signals from an external system check device are combined and made available as two internal inputs to the autoreclose function. One internal input permits auto-reclose based on system check conditions being met. The other internal input permits immediate auto-reclose based on check synchronism conditions being met, if this feature is enabled (CS AR Immediate).

The logic diagram for the interaction between the auto-reclose and system checks is shown below.

DDB_AR_Sys_Check_OK (899)

DDB_CS1_OK (883)

SET: Check Sync 1 Close En

&

DDB_CS2_OK (884)

SET: Check Sync 2 Close En

&

SET: Live Line/Dead Bus close

DDB_Line_Live (888)

DDB_Bus_Dead

&

1

INTSIG AR

SysCheck_OK

SET: Dead Line/Live Bus close

DDB_Line_Dead (889)

DDB_Bus_Live (886)

&

SET: Check Sync 1 Close En

&

DDB_AR_CS_Check_OK (897)

1

INTSIG AR

CheckSynch_OK

P1390ENb

Figure 122 - Auto-reclose/check sync interface (P543/P545)

If an external system check device is to be used with the internal auto-reclose function then logic inputs are available for the purpose and can be assigned to opto-isolated inputs using the PSL. These logic inputs are.

AR Check Synch OK

AR System Check OK/SYNC

CB State Monitoring (P543/P545)

The relay incorporates circuit breaker state monitoring, giving an indication of the position of the circuit breaker, or, if the state is unknown, an alarm is raised.

P54x/EN OP/Nd5 Page 5-199

(OP) 5 Operation

4.4.1

Single CB Control: P543/P545 Operation

CB State Monitoring Features (P543/P545)

To monitor the CBs and isolators, the following recommended functions shall be set in the PSL.

MiCOM relays can be set to monitor normally open (52A) and normally closed (52B) auxiliary contacts of the circuit breaker. Under healthy conditions, these contacts will be in opposite states. Should both sets of contacts be open, this would indicate one of the following conditions:

Auxiliary contacts / wiring defective

Circuit Breaker (CB) is defective

CB is in isolated position

Should both sets of contacts be closed, only one of the following conditions would apply:

Auxiliary contacts / wiring defective

Circuit Breaker (CB) is defective

If any of the above conditions exist, an alarm will be issued after the time delay set in the

PSL. A normally open / normally closed output contact can be assigned to this function via the Programmable Scheme Logic (PSL). The time delay is set to avoid unwanted operation during normal switching duties.

Note If the Circuit Breaker is under "not ready" status, the relay will not send any trip order to the Circuit Breaker.

In the CB CONTROL column of the relay menu there is a setting called ‘CB Status Input’.

This cell can be set at one of these options:

None

52A

52B

52A & 52B

52A

52B

52A & 52B

3 pole

3 pole

3 pole

1 pole

1 pole

1 pole

Where ‘None’ is selected no CB status will be available. This will directly affect any function within the relay that requires this signal, for example CB control, auto-reclose, etc. Where only 52a is used on its own then the relay will assume a 52b signal from the absence of the 52a signal. Circuit breaker status information will be available in this case but no discrepancy alarm will be available. The above is also true where only a 52b is used. If both 52a and 52b are used then status information will be available and in addition a discrepancy alarm will be possible, according to the following table. 52a and

52b inputs are assigned to relay opto-isolated inputs via the PSL.

Auxiliary Contact Position CB State Detected Action

52A

Open

52B

Closed Breaker Open Circuit breaker healthy

Closed

Closed

Open

Closed

Breaker Closed

State Unknown

Circuit breaker healthy

Alarm raised if the condition persists for longer than the time delay set in the PSL.

Open Open State Unknown

Alarm raised if the condition persists for longer than the time delay set in the PSL.

Table 23 - Contact positions, CB states and actions

Page 5-200 P54x/EN OP/Nd5

Single CB Control: P543/P545 Operation (OP) 5 Operation

Where single pole tripping is used then an open breaker condition will only be given if all three-phases indicate and open condition. Similarly for a closed breaker condition indication that all three-phases are closed must be given. For single pole tripping applications 52A-a, 52A-b and 52A-c and/or 52B-a, 52B-b and 52B-c inputs should be used.

The CB state monitoring logic is shown in Figure AR-142.

P54x/EN OP/Nd5 Page 5-201

(OP) 5 Operation

4.5

4.5.1

Single CB Control: P543/P545 Operation

CB Condition Monitoring (P543/P545)

Periodic maintenance of circuit breakers is needed to ensure that the trip circuit and mechanism operate correctly and also that the interrupting capability has not been compromised due to previous fault interruptions. Generally, such maintenance is based on a fixed time interval or a fixed number of fault current interruptions. These methods of monitoring circuit breaker condition give a rough guide only and can lead to excessive maintenance. The circuit breaker monitoring features of the MiCOM relay can help with more efficient maintenance regimes.

If inputs relevant to the circuit breakers are available to the relay via the opto isolated inputs, the logic will be able to determine the state of each circuit breaker.

CB Condition Monitoring Features (P543/P545)

For each circuit breaker trip operation the relay records statistics as shown in the following table taken from the relay menu. The menu cells shown are counter values only.

The Min./Max. values in this case show the range of the counter values. These cells can not be set:

Setting

Menu text Default Step size

Min. Max.

CB Operations {3 pole tripping} 0 0

Displays the total number of 3-pole trips issued by the relay.

Total IA Broken 0 0

10000 1

25000 In^ 1

Displays the total fault current interrupted by the relay for the A phase.

Total IB Broken 0 0 25000 In^ 1

Displays the total fault current interrupted by the relay for the B phase.

Total IC Broken 0 0 25000 In^ 1 In^

Displays the total fault current interrupted by the relay for the C phase.

CB Operate Time 0

Displays the calculated CB operating time.

Reset CB Data No

0 0.5 s 0.001

Yes, No

Reset the CB condition counters.

Table 24 - CB Condition Min/Max values

The above counters may be reset to zero, for example, following a maintenance inspection and overhaul.

The circuit breaker condition monitoring counters will be updated every time the relay issues a trip command. In cases where the breaker is tripped by an external protection device it is also possible to update the CB condition monitoring. This is achieved by allocating one of the relays opto-isolated inputs (using the programmable scheme logic) to accept a trigger from an external device. The signal that is mapped to the opto is called

External Trip , DDB 115.

Note When in Commissioning Test Mode the CB condition monitoring counters will not be updated.

The measurement of circuit breaker operating time, broken current and the overall CB

Monitoring logic are shown in the following diagrams.

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Single CB Control: P543/P545 Operation (OP) 5 Operation

Note: Broken current totals shall not be incremented if the relay is in test mode.

Figure 123 - Circuit breaker condition monitoring - broken current (P543/P545)

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(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 124 - Circuit breaker condition monitoring - operation time (P543/P545)

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Single CB Control: P543/P545 Operation (OP) 5 Operation

Figure 125 - CB monitoring (P543/P545)

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(OP) 5 Operation

4.6

Single CB Control: P543/P545 Operation

CB Control (P543/P545)

The relay includes the following options for control of a single circuit breaker:

Local tripping and closing, via the relay menu

Local tripping and closing, via relay opto-isolated inputs

Remote tripping and closing, using the relay communications

It is recommended that separate relay output contacts are allocated for remote circuit breaker control and protection tripping. This enables the control outputs to be selected via a local/remote selector switch. Where this feature is not required the same output contact(s) can be used for both protection and remote tripping.

+ve

Protection

Trip

Remote control trip

Trip

0

Close

Remote control close

Local

Remote

Trip Close

-ve

P0123ENa

Figure 126 - Remote control of circuit breaker (P543/P545)

A manual trip will be possible if the circuit breaker is closed. Likewise, a close command can only be issued if the CB is initially open.

Therefore, it will be necessary to use the breaker 52A and/or 52B contacts (the different selection options are given from the ‘CB Status Input’ cell above). If no CB auxiliary contacts are available then this cell should be set to None. Under these circumstances no

CB control (manual or auto) will be possible.

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Single CB Control: P543/P545 Operation (OP) 5 Operation

A circuit breaker close command CB Close will initiate closing of the circuit breaker. The output contact, however, can be set to operate following a user defined time delay ( Man

Close Delay ). This is designed to give personnel time to retreat from the circuit breaker following the close command. This time delay applies to all manual circuit breaker close commands.

The control close cycle can be cancelled at any time before the output contact operates by any appropriate trip signal, or by activating DDB443: Reset Close Delay .

An Auto Close CB signal from the Auto close logic bypasses the Man Close Delay time, and the CB Close output operate immediately to close the circuit breaker.

The length of the trip or close control pulse is set via the Trip Pulse Time and Close

Pulse Time settings respectively. These should be set long enough to ensure the breaker has completed its open or close cycle before the pulse has elapsed.

Note The manual trip and close commands are found in the SYSTEM DATA column and the hotkey menu.

If an attempt to close the breaker is being made, and a protection trip signal is generated, the protection trip command overrides the close command.

When the check synchronisation function (‘ System check ’ menu) is enabled, it can be used to control manual circuit breaker close commands. When the check synchronism criteria are satisfied, ‘ CBC Close ’ pulse is emitted. The ‘ C/S Window ’ time delay is used to set manual closure according to system check logic. If the system check criteria are not satisfied before that time-delay elapses, the relay will lockout and issue alarm.

In addition, a CB Healthy information (from the CB), connected to one of the relay’s optoisolators, will indicate the circuit breaker condition for closing availability. When “CB

Healthy input” (DDB: ' CB Healthy ') is used, the ‘ Healthy Window ’ time-delay can be set to adjust the manual close of the CB. If the CB does not indicate a healthy condition during this time-delay period, the relay will lockout and issue an alarm.

Where auto-reclose is used it may be desirable to block its operation when performing a manual close. In general, the majority of faults following a manual closure will be permanent faults and it will be undesirable to auto-reclose.

The ‘AR Inhibit Time’ setting can be used to prevent auto-reclose being initiated when the

CB is manually closed onto a fault. Auto-reclose is disabled for the AR Inhibit Time following manual CB closure.

If the CB fails to respond to the control command (indicated by no change in the state of

CB Status inputs) a ‘CB Failed to Trip’ or ‘CB Failed to Close’ alarm will be generated after the relevant trip or close pulses have expired. These alarms can be viewed on the relay LCD display, remotely via the relay communications, or can be assigned to operate output contacts for annunciation using the relays Programmable Scheme Logic (PSL).

Important The “CB Healthy Time” timer and “Check Sync Time” timer described in this menu section are applicable to manual circuit breaker operations only. These settings are duplicated in the auto-reclose menu for auto-reclose applications.

The ‘Lockout Reset’ and ‘Reset Lockout by’ setting cells in the menu are applicable to CB

Lockouts associated with manual circuit breaker closure, CB Condition monitoring

(Number of circuit breaker operations, for example) and auto-reclose lockouts.

The CB Control Logic is shown in Figure 126.

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(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 127 - Circuit breaker control (P543/P545)

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Single CB Control: P543/P545 Operation

4.6.1

(OP) 5 Operation

CB Control using Hotkeys (P543/P545)

The hotkeys allow direct access to the manual trip and close commands without the need to use the SYSTEM DATA menu column. Red or green color coding can be applied when used in circuit breaker control applications.

IF <<TRIP>> or <<CLOSE>> is selected the user is prompted to confirm the execution of the relevant command. If a “trip” is executed, a screen displaying the circuit breaker status will be displayed once the command has been completed. If a “close” is executed a screen with a timing bar will appear while the command is being executed. This screen has the option to cancel or restart the close procedure. The timer used is taken from the manual close delay timer setting in the CB CONTROL menu. If the command has been executed, a screen confirming the present status of the circuit breaker will be displayed.

The user is then prompted to select the next appropriate command or to exit - this will return to the default relay screen.

If no keys are pressed for a period of 25 seconds whilst the P445/P44y/P54x/P841 is waiting for the command confirmation, the P445/P44y/P54x/P841will revert to showing the circuit breaker status. If no key presses are made for a period of 25 seconds whilst the P445/P44y/P54x/P841is displaying the circuit breaker status screen, the

P445/P44y/P54x/P841will revert to the default relay screen. The Circuit breaker control hotkey menu diagram shows the hotkey menu associated with circuit breaker control functionality.

To avoid accidental operation of the trip and close functionality, the hotkey circuit breaker control commands are disabled for 10 seconds after exiting the hotkey menu.

30 SECS

4.6.2

P54x/EN OP/Nd5

Figure 128 - CB control hotkey menu

CB Control using Function Keys (P543/P545)

The function keys allow direct control of the circuit breaker if programmed to do this in the

PSL. Local tripping and closing must be set in the CB CONTROL menu “CB control by” cell to one of the via “opto” settings to enable this functionality. All circuit breaker manual control settings and conditions will apply for manual tripping and closing via function keys.

The following default logic can be programmed to activate this feature:

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(OP) 5 Operation Single CB Control: P543/P545 Operation

Figure 129 - CB control via function keys default PSL

Function key 2 and function key 3 are both enabled and set to ‘Normal’ Mode and the associated DDB signals (1097) and (1098) will be active high ‘1’ on a key press.

The following DDB signals must be mapped to the relevant function key:

Init Trip CB (DDB 439) - Initiate manual circuit breaker trip (CB or CB1)

Init Close CB (DDB 440) - Initiate manual circuit breaker close (CB or CB1)

The programmable function key LEDs have been mapped such that the LEDs will indicate yellow whilst the keys are activated.

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Dual CB Control: P544/P546 Operation

5

5.1

5.2

(OP) 5 Operation

DUAL CB CONTROL: P544/P546 OPERATION

This section describes the P544/P546 operational control of dual circuit breakers.

Introduction

The circuit breaker control and monitoring in the dual-breaker P446/P544/P546/P841B provides single-phase or three-phase switching of a feeder controlled by two circuit breakers at a line end, for example in a one and a half switch configuration or at a mesh type (ring bus) installation. It can also be set to manage switching of a feeder controlled by a single circuit breaker.

This section introduces the operation of the circuit breaker scheme, describes the circuit breaker state monitoring, condition monitoring, and circuit breaker control, and then the circuit breaker auto-reclose operation.

The control of circuit breaker switching sequences represents a complex logic arrangement. The operation is best understood by reference to the design logic diagrams that have been used to implement the functionality. For ease of reference, all these logic diagrams have been put together in a supplementary CB Control and AR Figures section in this chapter. Any diagrams that are not explicitly shown in this chapter will be found in the AR figures section and will be clearly indicated.

The inputs and outputs of the logic described are, in many cases, DDB signals that are available to the Programmable Scheme Logic (PSL). A description of these signals can be found in the Programmable Logic chapter of this manual. Other signals are also used to define the operation but are internal to the logic of the circuit breaker control. Unlike the

DDB signals, these internal signals cannot be accessed using the PSL. They are hardcoded into the application software. A second supplementary section lists these signals and provides a brief description to aid understanding.

CB Scheme Designation (P544/P546)

In the dual-breaker P446/P544/P546/P841B, the two controlled circuit breakers are designated CB1 and CB2. CB1 connects the P446/P544/P546/P841B to Bus1 and CB2 connects the P446/P544/P546/P841B to Bus 2.

It is possible to configure the P446/P544/P546/P841B for use in a single circuit breaker application using either CB1 control or CB2 control. If operating like this, all text, etc., associated with the unused circuit breaker is hidden.

Note In some of the menu text, the reference to which circuit breaker is being described, is not explicitly stated (for example, “CB Operations” in the circuit breaker monitoring features. In all such cases, an unqualified “CB”

reference should be assumed to be associated with CB1. “CB2” is always used to explicitly indicate CB2. An unqualified “CB” or an explicit

“CB1” refers to CB1. CBx indicates either CB1 or CB2.

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(OP) 5 Operation

5.3

Dual CB Control: P544/P546 Operation

Circuit Breaker Status (P544/P546)

For each circuit breaker, the P446/P544/P546/P841B incorporates circuit breaker state monitoring, giving an indication of the position of each circuit breaker or, if the state is unknown, an alarm is raised.

The P446/P544/P546/P841 can be set to monitor normally open (52A) and normally closed (52B) auxiliary contacts of the circuit breaker. Under healthy conditions, the 52A and 52B contacts should be in opposite states. Should both sets of contacts be open, this would indicate one of the following conditions:

Auxiliary contacts/wiring defective

Circuit breaker is defective

Circuit breaker is in an isolated position

Should both sets of contacts be closed, only one of these conditions would apply:

Auxiliary contacts/wiring defective

Circuit Breaker is defective

If any of the above conditions exist, an alarm will be issued after time delay as set in “CB

Status time” in the CB CONTROL settings column of the menu. A normally open / normally closed output contact can be assigned to this function via the PSL. The time delay is set to avoid unwanted operation during normal switching duties where fleeting abnormal circuit breaker status conditions may exist as the contacts change state.

Note The “CB Status time” setting is one setting applied equally to both controlled circuit breakers.

In the CB CONTROL column of the relay menu there are two settings: “CB1 Status Input” and “CB2 Status Input”. Each cell can be set at one of the following seven options to control CB1 and/or CB2:

None

52A

52B

52A & 52B

3 pole

3 pole

3 pole

52A

52B

1 pole

1 pole

52A & 52B 1 pole

If None is selected, no circuit breaker status will be available. This will directly affect any function within the relay that requires this signal, for example circuit breaker control, autoreclose, etc.

Where only 52A (open when the circuit breaker is open, closed when the circuit breaker is closed) is used then the relay will assume a 52B signal from the absence of the 52A signal. Circuit breaker status information will be available in this case but no discrepancy alarm will be available. The above is also true where only a 52B (closed when the circuit breaker is open, open when the circuit breaker is closed) is used.

If both 52A and 52B are used then status information will be available and in addition a discrepancy alarm “CBx Status Alarm” (x = 1 or 2) will be possible, according to the following table. 52A and 52B inputs are assigned to relay opto-isolated inputs via the

PSL.

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Dual CB Control: P544/P546 Operation

5.4

5.4.1

(OP) 5 Operation

Auxiliary contact position CB State Detected

52A 52B

Open

Closed

Closed

Open

Breaker Open

Breaker Closed

Closed

Open

Closed

Open

CB Failure

State Unknown

Action

Circuit breaker healthy

Circuit breaker healthy

Alarm raised if the condition persists for greater than “CB Status time”

Alarm raised if the condition persists for greater than “CB Status time”

Table 25 - Auxiliary contact position, CB state detected and Action

In the internal logic of the P446/P544/P546/P841, the breaker position used in the algorithm is considered to be open when the CB State Detected is Breaker Open . In all others cases, the breaker position is considered to be closed. Therefore, during operation of the circuit breaker, if the condition ‘52A=52B=0’ or ‘52A=52B=1’ is encountered, the circuit breaker is considered to be closed.

Where single pole tripping is used, then an open breaker condition will only be given if all three-phases indicate an open condition. Similarly for a closed breaker condition, indication that all three-phases are closed must be given. For single pole tripping applications 52A-a, 52A-b and 52A-c and/or 52B-a, 52B-b and 52B-c inputs should be used. The circuit breaker state monitoring logic diagram is shown in the Circuit breaker - state monitor or Circuit breaker 1/ 2 - state monitor diagram(s).

If inputs relevant to each of the circuit breakers (CB1 and CB2) are available to the relay via the opto isolated inputs, the logic will be able to determine the state of each circuit breaker.

Circuit Breaker Condition Monitoring (P544/P546)

Periodic maintenance of circuit breakers is needed to ensure that the trip circuit and mechanism operate correctly and also that the interrupting capability has not been compromised due to previous fault interruptions. Generally, such maintenance is based on a fixed time interval or a fixed number of fault current interruptions. These methods of monitoring circuit breaker condition give a rough guide only and can lead to excessive maintenance. The circuit breaker monitoring features of the MiCOM relay can help with more efficient maintenance regimes.

Circuit Breaker Condition Monitoring Features (P544/P546)

For each circuit breaker trip operation the relay records statistics as shown in the following table taken from the relay menu. The menu cells shown are counter values only.

The Min./Max. values in this case show the range of the counter values. These cells can not be set:

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(OP) 5 Operation

Page 5-214

Dual CB Control: P544/P546 Operation

Menu text

CB1 A Operations 0

Default

0

Min.

Setting

Max.

10000

Displays the total number of A phase trips issued by the relay for CB1.

CB1 B Operations 0 0 10000

Displays the total number of B phase trips issued by the relay for CB1.

CB1 C Operations 0 0 10000

Displays the total number of C phase trips issued by the relay for CB1.

CB1 IA Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB1.

CB1 IB Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB1.

CB1 IC Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB1.

CB1 Operate Time 0 0 0.5s

Displays the calculated CB1 operating time.

Reset CB1 Data No

Reset the CB1 condition counters.

Yes, No

CB2 A Operations 0 0 10000

Displays the total number of A phase trips issued by the relay for CB2.

CB2 B Operations 0 0 10000

Displays the total number of B phase trips issued by the relay for CB2.

CB2 C Operations 0 0 10000

Displays the total number of C phase trips issued by the relay for CB2.

CB2 IA Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB2.

CB2 IB Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB2.

CB2 IC Broken 0 0 25000 In^

Displays the total fault current interrupted by the relay for the A phase for CB2.

CB2 Operate Time 0 0 0.5 s

Displays the calculated CB2 operating time.

Reset CB2 Data No Yes, No

1

1

1

1

1

Step size

1 In^

0.001

1

1

1

1

1

1

Ι n^

0.001

Reset the CB2 condition counters.

Table 26 - Circuit Breaker Condition Min/Max values

The above counters may be reset to zero, for example, following a maintenance inspection and overhaul.

The circuit breaker condition monitoring counters will be updated every time the relay issues a trip command. In cases where the breaker is tripped by an external protection device it is also possible to update the CB condition monitoring. This is achieved by allocating one of the relays opto-isolated inputs (using the programmable scheme logic) to accept a trigger from an external device. The signal that is mapped to the opto is called

External Trip , DDB 115.

Note When in Commissioning Test Mode the CB condition monitoring counters will not be updated.

P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation (OP) 5 Operation

The measurement of circuit breaker broken current, operating time and the overall circuit breaker monitoring logic diagram, are shown in:

Figure 129 - CB1 condition monitoring – broken current

Figure 130 - CB2 condition monitoring – broken current

Figure 131 - CB1 condition monitoring – operation time

Figure 132 - CB2 condition monitoring – operation time

Figure 133 - Circuit breaker 1 – monitoring

Figure 134 - Circuit breaker 2 – monitoring

P54x/EN OP/Nd5

Figure 130 - CB1 condition monitoring – broken current

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(OP) 5 Operation Dual CB Control: P544/P546 Operation

Page 5-216

Figure 131 - CB2 condition monitoring – broken current

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Dual CB Control: P544/P546 Operation (OP) 5 Operation

P54x/EN OP/Nd5

Figure 132 - CB1 condition monitoring – operation time

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(OP) 5 Operation Dual CB Control: P544/P546 Operation

Page 5-218

Figure 133 - CB2 condition monitoring – operation time

P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation (OP) 5 Operation

Figure 134 - Circuit breaker 1 – monitoring

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(OP) 5 Operation Dual CB Control: P544/P546 Operation

Figure 135 - Circuit breaker 2 – monitoring

Page 5-220 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.5

(OP) 5 Operation

Circuit Breaker Control (P544/P546)

This functionality shows how a circuit breaker close signal from the auto-reclose logic

“AutoClose CBx” (x = 1 or 2) is applied alongside operator controlled circuit breaker close and trip control.

See AR Figure AR-186 and Figure AR-187 (logic diagram supplement) for CB1 & CB2 circuit breaker control respectively.

The P446/P544/P546/P841 includes the following options for the control of each of the two circuit breakers:

Local tripping and closing, via the relay menu or Hotkeys

Local tripping and closing, via relay opto-isolated inputs

Remote tripping and closing, using the relay communications

Auto-reclosing via “Auto Close CB1” or “Auto Close CB2” signal from CB1 & CB2

Auto Close logic.

It is recommended that separate relay output contacts are allocated for remote circuit breaker control and protection tripping. This enables the control outputs to be selected via a local/remote selector switch as shown in the Remote control of circuit breaker diagram.

Where this feature is not required the same output contact(s) can be used for both protection and remote tripping.

+ve

Protection

Trip

Remote control trip

Trip

0

Close

Remote control close

Local

Remote

P54x/EN OP/Nd5

Trip Close

-ve

P0123ENa

Figure 136 - Remote control of circuit breaker

In the case of the P446/P544/P546/P841B, the two circuit breakers may be selectively controlled both locally and remotely if relay contacts are assigned to allow a separate control trip contact and a separate control close for each circuit breaker i.e. four output relay contacts.

A manual trip will be possible if the circuit breaker is closed. Likewise, a close command can only be issued if the CB is open.

Therefore, it will be necessary to use the breaker positions 52A and/or 52B contacts via the PSL (the different selection options are given from the “CBx Status Input” cell above).

If no CB auxiliary contacts are available, this cell should be set to “None”. Under these circumstances no circuit breaker control (manual or auto) will be possible.

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(OP) 5 Operation Dual CB Control: P544/P546 Operation

A circuit breaker close command (“Close CB1” for CB1 or “Close CB2” for CB2) will initiate closing of the circuit breaker. The output contact, however, can be set to operate following a user defined time delay (‘Man Close Delay’). This is designed to give personnel time to retreat from the circuit breaker following the close command. This time delay applies to all manual circuit breaker close commands.

The control close cycle can be cancelled at any time before the output contact operates by any appropriate trip signal, or by activating DDB (443): “Rst CB1 CloseDly” for CB1 or by DDB (1419): “Rst CB2 CloseDly” for CB2.

An “Auto Close CB1” or “Auto Close CB2” signal from the “Auto close” logic bypasses the

“Man Close Delay” time, and the “CB1 Close” or “CB2 Close” outputs operate immediately to close the circuit breaker.

The length of the trip or close control pulse is set via the “Trip Pulse Time” and “Close

Pulse Time” settings respectively. These should be set long enough to ensure the breaker has completed its open or close cycle before the pulse has elapsed.

Note The manual trip and close commands are found in the SYSTEM DATA column and the hotkey menu.

If an attempt to close the breaker is being made, and a protection trip signal is generated, the protection trip command overrides the close command.

If the system check synchronism function is set, this can be enabled to supervise manual circuit breaker close commands. A circuit breaker close output will only be issued if the check synchronism criteria are satisfied. Different system check criteria can be selected for control closing CB1 and CB2. A user settable time delay (“Check Sync Time”) is included to supervise manual closure with check synchronizing criteria. If the check synchronism criteria are not satisfied in this time period following a close command the relay will lockout and alarm.

Before manual reclosure, in addition to a synchronism check there is also a circuit breaker healthy check, “CB Healthy”, which requires the circuit breaker to be capable of closing safely (for example, having its closing spring fully charged and/or gas pressure sufficient for a close and immediate fault trip), as indicated by DDB input “CBx Healthy” (x

= 1 or 2). A user settable time delay “CB Healthy Time” is included for manual closure with this check. If the circuit breaker does not indicate a healthy condition in this time period following a close command (DDB input is still low when the set time has elapsed) then the relay will lockout the relevant circuit breaker and set an alarm.

If auto-reclose is used it may be desirable to block its operation when performing a manual close. In general, the majority of faults following a manual closure will be permanent faults and it will be undesirable to allow auto-reclose.

To ensure that auto-reclosing is not initiated for a manual Circuit Breaker (CB) closure on to a pre-existing fault (switch on to fault), the AUTO-RECLOSE menu setting “CB IS

Time” (CB In Service Time) should be set for the desired time window. This setting ensures that auto-reclose initiation is inhibited for a period equal to setting “CB IS Time” following a manual CB closure. If a protection operation occurs during the inhibit period, auto-reclosing is not initiated.

Following manual CB closure, if either a single-phase or a three-phase fault occurs during the inhibit period, the CB is tripped three-phase, but auto-reclose is not locked out for this condition.

If the CB fails to respond to the control command (indicated by no change in the state of

CBx Status inputs) a ‘CBx Trip Fail’ or ‘CBx Close Fail’ alarm (x = 1 or 2) will be generated after the relevant ‘Trip pulse Time’ or ‘Close Pulse Time’ has expired. These alarms can be viewed on the relay LCD display, remotely via the relay communications, or can be assigned to operate output contacts for annunciation using the relays

Programmable Scheme Logic (PSL).

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Dual CB Control: P544/P546 Operation

5.5.1

5.5.2

(OP) 5 Operation

Important The “CB Healthy Time” timer and “Check Sync Time” timer described in this menu section are applicable to manual circuit breaker operations only. These settings are duplicated in the auto-reclose menu for auto-reclose applications.

For the description of settings and commands related to the various methods for resetting

circuit breaker lockouts, refer to section 5.6.6.19 - Reset CB Lockout.

CB Control using Hotkeys (P544/P546)

The hotkeys allow direct access to the manual trip and close commands without the need to use the SYSTEM DATA menu column. Red or green color coding can be applied when used in circuit breaker control applications.

IF <<TRIP>> or <<CLOSE>> is selected the user is prompted to confirm the execution of the relevant command. If a “trip” is executed, a screen displaying the circuit breaker status will be displayed once the command has been completed. If a “close” is executed a screen with a timing bar will appear while the command is being executed. This screen has the option to cancel or restart the close procedure. The timer used is taken from the manual close delay timer setting in the CB CONTROL menu. If the command has been executed, a screen confirming the present status of the circuit breaker will be displayed.

The user is then prompted to select the next appropriate command or to exit - this will return to the default relay screen.

If no keys are pressed for a period of 25 seconds whilst the P445/P44y/P54x/P841 is waiting for the command confirmation, the P445/P44y/P54x/P841will revert to showing the circuit breaker status. If no key presses are made for a period of 25 seconds whilst the P445/P44y/P54x/P841is displaying the circuit breaker status screen, the

P445/P44y/P54x/P841will revert to the default relay screen. The Circuit breaker control hotkey menu diagram shows the hotkey menu associated with circuit breaker control functionality.

To avoid accidental operation of the trip and close functionality, the hotkey circuit breaker control commands are disabled for 10 seconds after exiting the hotkey menu.

Circuit Breaker Control using Function Keys (P544/P546)

The function keys allow direct control of the circuit breaker if programmed to do this in the

PSL. Local tripping and closing must be set in the CB CONTROL menu “CB control by” cell to one of the via “opto” settings to enable this functionality. All circuit breaker manual control settings and conditions will apply for manual tripping and closing via function keys.

The following default logic can be programmed to activate this feature:

P54x/EN OP/Nd5

Figure 137 - Circuit breaker control via function keys default PSL

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(OP) 5 Operation Dual CB Control: P544/P546 Operation

Function key 2 and function key 3 are both enabled and set to ‘Normal’ Mode and the associated DDB signals (1097) and (1098) will be active high ‘1’ on a key press.

The following DDB signals must be mapped to the relevant function key:

Init Trip CB (DDB 439) - Initiate manual circuit breaker trip (CB or CB1)

Init Close CB (DDB 440) - Initiate manual circuit breaker close (CB or CB1)

The programmable function key LEDs have been mapped such that the LEDs will indicate yellow whilst the keys are activated.

The diagram shows the control of CB1 only for simplicity. CB2 can be controlled in a similar way and the relevant DDB signals are (441) Init Trip CB2, and (442) Init Close

CB2.

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Dual CB Control: P544/P546 Operation (OP) 5 Operation

5.6

5.6.1

P54x/EN OP/Nd5

Single and Three Phase Auto-Reclosing (P544/P546)

The auto-reclose scheme in the P544/P546 provides single-phase or three-phase autoreclosing of a feeder terminal switched by one or two circuit breakers.

With the P544/P546, the user can select to initiate auto-reclosure following any Zone 1, or distance-aided scheme trips which occur. In addition, the user can selectively decide to auto-reclose for trips from time-delayed distance zones, overcurrent and earth (ground) elements, and DEF aided schemes.

In a two circuit breaker scheme, the circuit breakers are normally arranged to reclose sequentially with one designated leader circuit breaker reclosing after a set dead time followed, if the leader circuit breaker remains closed, by the second circuit breaker after a further delay, the follower time. In the operational description, the two circuit breakers are designated as CB1 and CB2.

The scheme can be configured by menu settings, by control commands, or by opto inputs to operate in any of the following modes for the first shot (first auto-reclose attempt):

CB1

CB1

CB1

CB1

CB2

CB2

Leader CB Leader AR mode

1Ph

3Ph

1/3Ph

1Ph, 3P or 1/3Ph

1Ph

3Ph

CB2

CB2

Follower CB

CB2

No follower AR

CB1

CB1

Follower AR Mode

1Ph or 3Ph

3Ph

1/3Ph or 3Ph

No follower AR

1Ph or 3Ph

3Ph

CB2

CB2

1/3Ph

1Ph, 3P or 1/3Ph

CB1

No follower AR

1/3Ph or 3Ph

No follower AR

If “1Ph” or “1/3Ph” follower auto-reclose mode is selected, the follower can perform single-phase auto-reclose only if the leader circuit breaker has performed single-phase auto-reclose. If the leader has tripped and reclosed three-phase, the follower is also forced to trip three-phase, and will then reclose three-phase provided three-phase auto-reclose is permitted for the follower circuit breaker. If the follower circuit breaker trips three-phase, and three-phase auto-reclose is not permitted for the follower, then the follower circuit breaker will lock out without reclosing.

Single phase reclosing is permitted only for the first shot of an auto-reclose cycle. If two or more shots are enabled, then in a multi-shot auto-reclose cycle the second and subsequent trips and reclosures will be three-phase.

Table 27 - Leader CB, Leader AR mode, Follower CB and Follower AR Mode

The scheme can be configured to control a single CB installation. If the menu setting

“Num CBs” is set to “CB1 Only”, all menu settings and indications relating to CB2 are redundant and hidden, and the scheme controls only CB1. If the menu setting “Num CBs” is set to “CB2 Only”, all menu settings and indications relating to CB1 are redundant and hidden, and the scheme controls only CB2. In these single CB configurations, the selected CB auto-reclose can be selected to “1Ph”, “3Ph” or “1/3Ph AR mode” indicating single-phase, three-phase, or single/three-phase operation.

Time Delayed and High Speed Auto-Reclosing (P544/P546)

The auto-reclose function offers multi-shot auto-reclose control, selectable to perform up to a four shot cycle. Dead times (Note 1) for all shots (Note 2) are independently adjustable. Should the CB close successfully at the end of the dead time, a Reclaim Time starts. If the circuit breaker does not trip again, the auto-reclose function resets at the end of the reclaim time. If the protection trips again during the reclaim time the relay advances to the next shot in the programmed cycle, or, if all programmed reclose attempts have been made, goes to lockout.

Page 5-225

(OP) 5 Operation

5.6.2

5.6.2.1

5.6.2.2

5.6.2.3

Dual CB Control: P544/P546 Operation

Note

Note 2

Dead Time denotes the open (dead) interval delay of the CB.

A Shot is a reclosure attempt.

Auto-Reclose Logic Inputs (P544/P546)

The auto-reclose function uses inputs in the logic, which can be assigned and activated from any of the opto-isolated inputs on the relay via the Programmable Scheme Logic

(PSL). Contacts from external equipment may be used to influence the auto-recloser via the optos, noting that the CB Status (open/closed) must also be available via auxiliary contact inputs to the relay.

These logic inputs can also be assigned and activated from other sources. The function of these inputs is described below, identified by their DDB signal text. The inputs can be selected to accept either a normally open or a normally closed contact, programmable via the PSL editor.

CB Healthy (P544/P546)

The majority of circuit breakers are only capable of providing one trip-close-trip cycle.

Following this, it is necessary to re-establish sufficient energy in the CB (spring charged, gas pressure healthy, etc.) before the CB can be reclosed.

The CB Healthy input is used to ensure that there is sufficient energy available to close and trip the circuit breaker before initiating a CB Close command. If on completion of the dead time, the DDB “CB Healthy" input is low, and remains low for a period given by the

"CB Healthy Time" timer, lockout will result and the circuit breaker will remain open DDBs

(436 & 437) are used for “CB1 Healthy” & “CB2 Healthy” respectively to enable “CB1

Close” and “CB2 Close” by auto-reclose. The “CB Healthy Time” setting is common to both CB1 and CB2.

This check can be disabled by not allocating an opto input for DDB “CB Healthy". The signal defaults to high if no logic is mapped to DDB within the PSL in the relay

Inhibit Auto-Reclose (P544/P546)

An external input can be used to inhibit auto-reclose. The signal is available for mapping via the PSL from an opto input or a communications input.

The signal is “Inhibit AR”, DDB (1420). Where there are two circuit breakers, this single signal applies to both CB1 and CB2.

Energising the input will cause any auto-switching to be inhibited. Any auto-reclose in progress will be reset and inhibited, but not locked out. It is provided to ensure that autoswitching does not interfere with any manual switching. A typical application would be on a mesh-corner scheme where manual switching is being performed on the mesh, for which any auto-reclose would cause interference.

If a single-phase auto-reclose cycle is in progress and a single pole of the circuit breaker is tripped when this signal is raised, a ‘force three-phase trip output’, (“AR Force 3 pole”,

DDB (858)) will be set. This is to force the circuit breaker to trip the other phases thereby ensuring that all poles will be in the same state (and avoiding a pole stuck condition) when subsequent closing of the circuit breaker is attempted.

Block Auto-Reclose (P544/P546)

Page 5-226 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.6.2.4

5.6.2.5

5.6.2.6

(OP) 5 Operation

External inputs can be used to block auto-reclose. Two signals (one for each circuit breaker controlled) are available for mapping via the PSL from opto inputs or communications inputs. The two signals are:

“Block CB1 AR” DDB (448)

“Block CB2 AR“ DDB (1421)

The “Block CB AR” input, if asserted, will block the operation of the auto-reclose cycle and, if auto-reclose is in progress, it will force the circuit breaker to lockout.

Typically it is used where, dependent upon the type of protection operation, auto-reclose may, or may not, be required. An example is on a transformer feeder, where autoreclosing may be initiated from the feeder protection but blocked from the transformer protection.

“Block CB AR” can also be used in cases where the auto-reclose cycle is likely to fail for conditions associated with the protected circuit. The input can be used for example if, anywhere during the dead time, a circuit breaker indicates that it is not capable of switching (low gas pressure or loss of vacuum alarm occurs).

Reset Lockout (P544/P546)

The Reset Lockout input can be used to reset the auto-reclose function following lockout and reset any auto-reclose alarms, provided that the signals which initiated the lockout have been removed.

These DDB signals are available for mapping in PSL from opto inputs or communications inputs:

DDB (446) “Rst CB1 Lockout”: Reset Lockout Opto Input to reset CB1 Lockout state

DDB (1422) “Rst CB2 Lockout”: Reset Lockout Opto Input to reset CB2 Lockout state

Pole Discrepancy (P544/P546)

Circuit breakers with independent mechanisms for each pole normally incorporate a

‘phases not together’ or ‘pole discrepancy’ protection device which automatically trips all three-phases if they are not all in the same position i.e. all open or all closed.

During single-pole auto-reclosing a pole discrepancy condition is deliberately introduced and the pole discrepancy device must not operate for this condition. This may be achieved by using a delayed action pole discrepancy device with a delay longer than the single-pole auto-reclose dead time, “SP AR Dead Time”.

Alternatively, a signal can be given from the relay during the single-pole auto-reclose dead time, “AR 1 Pole In Progress”, to inhibit the external pole discrepancy device.

In the relay, the “Pole Discrepancy” input is activated by a signal from an external device indicating that all three poles of the CB are not in the same position. The “Pole

Discrepancy” inputs, DDB (451) & DDB (1606) forces a 3 pole trip on CB1 & CB2 respectively through PSL mapping.

The logic diagram for the pole discrepancy is shown in Figure AR-204 - Pole discrepancy.

External Trip (P544/P546)

The “External Trip 3Ph” input and the “External Trip A”, “External Trip B” and “External

Trip C” inputs can be used to initiate three or single-phase auto-reclose. Note, these signals are not used to trip the circuit breaker but do initiate auto-reclose. To trip the circuit breaker directly they could be assigned to the trip contacts of the relay in the PSL.

The following DDB signals are available for mapping in PSL from opto inputs to initiate auto-reclosing.

P54x/EN OP/Nd5 Page 5-227

(OP) 5 Operation

5.6.3

5.6.3.1

5.6.3.2

5.6.3.3

5.6.4

Dual CB Control: P544/P546 Operation

DDB (535): “CB1 Ext Trip A”

DDB (536): “CB1 Ext Trip B”

DDB (537): “CB1 Ext Trip C”

DDB (534): “CB1 Ext Trip 3Ph”

DDB (539): “CB2 Ext Trip A”

DDB (540): “CB2 Ext Trip B”

DDB (541): “CB2 Ext Trip C”

DDB (538): “CB2 Ext Trip 3Ph”

Internal Signals (P544/P546)

Trip Initiate Signals (P544/P546)

The Trip Inputs A, Trip Inputs B and Trip Inputs C signals are used to initiate signals or three-phase auto-reclose.

Note For single-phase auto-reclose these signals must be mapped in the PSL as shown in the default.

Circuit Breaker Status (P544/P546)

The CB Open 3 ph, CB Open A ph, CB Open B ph and CB Open C ph, signals are used to indicate if a CB is open three or single-phase. These are driven from the internal pole dead logic and the CB auxiliary inputs.

The CB Closed 3 ph, CB Closed A ph, CB Closed B ph and CB Closed C ph, signals are used to indicate if a CB is closed three or single-phase. These are driven from the internal pole dead logic and the CB auxiliary inputs.

Check Synch OK and System Check OK (P544/P546)

Internal signals generated from the internal system check function and external system check equipment are used by the internal auto-reclose logic to permit auto-reclosure.

DDB (883) “CB1 CS1 OK” & DDB (884) “CB1 CS2 OK” are output from CB1 Check Sync logic and indicate conditions for CB1 sync check stage1 & 2 are satisfied.

DDB (1577) “CB2 CS1 OK” & DDB (1463) “CB2 CS2 OK” are output from CB2 Check

Sync logic and indicate conditions for CB2 sync check stage 1 & 2 are satisfied.

Auto-Reclose Logic Outputs (P544/P546)

The following DDB signals can be masked to a relay contact in the PSL or assigned to a

Monitor Bit in Commissioning Tests, to provide information about the status of the autoreclose cycle. These are described below, identified by their DDB signal text.

Any auto-reclose lockout condition will reset all auto-reclose in progress signals associated with the circuit breaker (e.g. “ARIP”).

Page 5-228 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.6.4.1

5.6.4.2

5.6.5

(OP) 5 Operation

AR 1Pole in Prog

The “CB1 AR 1p InProg” (DDB 845) and the “CB2 AR 1p InProg” (DDB 855) output signals indicate that single-phase auto-reclose is in progress. The outputs remain high from protection initiation until lockout, or successful reclosure of the circuit breaker which is indicated by the circuit breaker successful auto-reclose signals,“CB1 Succ 1P AR”

(DDB 1571) and “CB2 Succ 1P AR” (DDB 1451) generated by the logic for CB1 and CB2 respectively.

AR 3Pole in Prog

The “CB1 AR 3p InProg” (DDB 844) and “CB2 AR 3p InProg” (DDB 1411) output signals indicate that three-phase auto-reclose is in progress. The outputs remain high from protection initiation until lockout, or successful reclosure of the circuit breaker which is indicated by the circuit breaker successful auto-reclose signals, “CB1 Succ 3P AR” (DDB

852) and “CB2 Succ 3P AR” (DDB 1452) for generated by the logic for CB1 and CB2 respectively.

Auto-Reclose Logic Operating Sequence (P544/P546)

For simplicity, the auto-reclose operating sequence is described for the case of a single circuit breaker, CB1 only.

The same operating sequence would apply if CB2 only was enabled.

In a dual breaker application, the same operating sequence would apply to the leader circuit breaker and, provided the leader circuit breaker remained closed after the set dead time, the follower circuit breaker would reclose after a further delay (the follower time).

Note In a dual circuit breaker application, the settings describing single and threephase auto-reclose “AR 1P” “AR 3P” and “AR 1/3P” below would change in the dual breaker case to reflect the mode of the leader circuit breaker “L1P”,

“L3P”, “L1/3P”.

Following this introduction to the logic sequence, is a comprehensive description of the auto-reclose and circuit breaker operation.

An auto-reclose cycle can be internally initiated by operation of a protection element, provided the circuit breaker is closed until the instant of protection operation.

The operation of the auto-reclose sequence is controlled by the “Dead Timers”. The user can, via settings, determine what conditions will be used to initiate the dead timers as described in the Dead Time Control section. In general, however, and for the purposes of this description, the dead timers can be considered to start upon initiation of the autoreclose cycle by the protection.

If only single-phase auto-reclose “AR 1P” is enabled then the logic allows only a single shot auto-reclose. For a single-phase fault, the single-phase dead timer "SP AR Dead

Time" starts, and the single-phase auto-reclose in progress signal “CB AR 1pole in prog”

(DDB 845) is asserted. For a multi-phase fault the logic triggers a three-phase trip and goes to lockout.

If only three-phase auto-reclose “AR 3P” is enabled then, for any fault, the three-phase dead timers: "3P AR DT Shot 1”, “3P AR DT Shot 2”, “3P AR DT Shot 3”, “3P AR DT Shot

4", (Dead Time 1, 2, 3, 4) are started and the three-phase auto-reclose in progress signal

“CB AR 3pole in prog” (DDB 844) is asserted. The logic forces a three-phase trip by setting “AR Force 3 pole” (DDB 858) for any single-phase fault if only three-phase autoreclose “AR 3P” is enabled.

P54x/EN OP/Nd5 Page 5-229

(OP) 5 Operation Dual CB Control: P544/P546 Operation

If single and three-phase auto-reclose “AR1/3P” are enabled then, if the first fault is a single-phase fault the single-phase dead time "SP AR Dead Time" is started and the single-phase auto-reclose in progress signal “AR 1pole in prog” (DDB 845) is asserted. If the first fault is a multi-phase fault the three-phase dead timer "3P AR DT Shot 1" is started and the three-phase auto-reclose in progress signal “AR 3pole in prog” (DDB 844) is asserted. If the relay has been set to allow more than one reclose (“AR Shots >1”) then any subsequent faults will be converted to three-phase trips by setting the signal “AR

Force 3 pole” (DDB 858). The three-phase dead times "3P AR DT Shot 2”, “3P AR DT

Shot 3” and “3P AR DT Shot 4" (Dead Times 2, 3, 4) will be started for the 2nd, 3rd and

4th trips (shots) respectively. The three-phase auto-reclose in progress signal “AR 3pole in prog” (DDB 844) will be asserted. If a single-phase fault evolves to a multi-phase fault during the single-phase dead time (“SP AR Dead Time”) then single-phase auto-reclose is stopped. The single-phase auto-reclose in progress signal “AR 1pole in prog” (DDB

845) is reset, the three-phase auto-reclose in progress signal “AR 3pole in prog” (DDB

844) is set, and the three-phase dead timer “3P AR DT Shot 1” is started.

At the end of the relevant dead time, provided system conditions are suitable, a circuit breaker close signal is given. The system conditions to be met for closing are that the system voltages are in synchronism or that the dead line/live bus or live line/dead bus conditions exist, indicated by the internal system check synchronizing element, and that the circuit breaker closing spring, or other energy source, is fully charged as indicated by the “CB Healthy” input. The circuit breaker close signal is cut-off when the circuit breaker closes. For single-phase auto-reclose no voltage or synchronism check is required as synchronizing power is flowing in the two healthy phases. For three-phase auto-reclosing, for the first shot only, auto-reclose can be performed without checking that the voltages are in synchronism by means of a setting. This setting, “CBxL SC Shot 1”, can be set to

“Enabled” to perform synch-checks on shot 1 for CB1 or CB2, or “Disabled” to not perform the checks.

When the circuit breaker has closed, the “Set CB1 Close” (DDB 1565) signal from the

“CB autoclose logic” goes high and the reclaim time (“Reclaim Time”) starts. If the circuit breaker has remained closed and not tripped again when the reclaim timer expires, the auto-reclose cycle is complete, and signal “CB1 Succ 1P AR” (DDB1571) or “CB1 Succ

3P AR” (DDB 852) is generated to indicate the successful reclosure. These signals also increment the relevant circuit breaker successful auto-reclose shot counters “CB1 SUCC

SPAR”, “CB1 SUCC 3PAR Shot1”, “CB1 SUCC 3PAR Shot2”, “CB1 SUCC 3PAR Shot3” and “CB1 SUCC 3PAR Shot4”, as well as resetting the circuit breaker auto-reclose in progress “CB1 ARIP” signal.

If the protection operates and circuit breaker trips during the reclaim time the relay either advances to the next shot in the programmed auto-reclose cycle, or, if all programmed reclose attempts have been made, the circuit breaker goes to lockout. Every time the relay trips the sequence counter is incremented by 1 and the reclaim time starts again after each shot, following the “Set CB1 Close” signal going high again.

For multi-phase faults the auto-reclose logic can be set to allow auto-reclose block for 2 and 3-phase faults or to allow auto-reclose block for 3-phase faults only using the setting

“Multi Phase AR” in the AUTORECLOSE settings, where the options are “Allow

Autoclose” , “BAR 2 & 3 ph” and “BAR 3 Phase”.

Page 5-230 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation (OP) 5 Operation

Protection Trip

AR (3P) in Progress

CB Open

Dead Time (3P)

Auto-close

Control Close

Reclaim Time (3P)

Successful Close (3P)

Figure 138 - Auto-reclose timing diagram – single breaker, single fault

P4349ENa

P54x/EN OP/Nd5 Page 5-231

(OP) 5 Operation Dual CB Control: P544/P546 Operation

Protection Trip

CB1/CB2 AR 1p in

Progress

(1ph)

CB1/CB2 AR 3p in

Progress

CB1 Open (1ph)

CB1 Open (3ph)

CB2 Open (1ph)

CB2 Open (3ph)

Dead Time (1p)

AR Force CB2 (3p)

AR Force CB1 (3p)

Auto Close CB1

Follower Time(1p)

Auto Close CB2

Reclaim Timing (1p)

Dead Time (3p)

Figure 139 - Auto-reclose timing diagram – repeated fault inception

(3ph)

P4352ENa

Page 5-232 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

Protection Trip (1ph)

CB1 AR1P In Progress

CB2 AR1P In Progress

CB1 Open

CB2 Open

Dead Time (1p)

Auto Close CB1

Follower Time (1P)

Auto Close CB2

Reclaim Time (1p)

CB1 Successful Close

CB2 Successful Close

Figure 140 - Auto-relose timing diagram leader/follower (1ph)

(OP) 5 Operation

P4348ENa

P54x/EN OP/Nd5 Page 5-233

(OP) 5 Operation

5.6.6

Dual CB Control: P544/P546 Operation

Protection Trip (3ph)

CB1 AR3P In Progress

CB2 AR3P In Progress

CB1 Open

CB2 Open

3P Dead Time 1

Auto Close CB1

3P Follower Time

Auto Close CB2

3P Reclaim Time

CB1 Successful Close

CB2 Successful Close

P4346ENa

Figure 141 - Auto-relose timing diagram leader/follower (3ph)

Auto-Reclose: Main Operating Features (P544/P546)

As from Software Version H4, the possible statuses of the Auto-Reclose function have changed. The new method means that the function now works in the same way across the whole P54x range. It does this because of the following DDB Numbers.

Page 5-234 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.6.6.1

5.6.6.2

(OP) 5 Operation

DDB Numbers 856, 857, 1532 and 1533

DDB Nos 856 and 857 have never been included in the MiCOM P544/P546 products.

In the MiCOM P543/P545 (running on Software Version 57), DDB Nos 856 and 857 were available to show the mode (3P, 1P) for the Auto-Reclose (AR) function.

In the MiCOM P543/P545 (running on Software Version D1), DDB Nos 856 and 857 were removed.

As from Software Version H4a, the following situation applies:

DDB

No

Source Element Name Description

856

857

Autoreclose

DDB_AR_IN_

SERVICE_3P

Autoreclose

DDB_AR_IN_

SERVICE_1P

3 Pole auto-recloser in service – the autoreclose function has been enabled either in the relay menu, or by an auto input.

Single pole auto-recloser in service – the auto-reclose function has been enabled either in the relay menu, or by an auto input.

1532 Autoreclose

DDB_AR_IN_

SERVICE_3P_FOLLOWER

1533 Autoreclose

DDB_AR_IN_

SERVICE_1P_FOLLOWER

Follower 3 Pole auto-recloser in service – the auto-reclose function has been enabled either in the relay menu, or by an auto input.

Follower Single pole auto-recloser in service

– the auto-reclose function has been enabled either in the relay menu, or by an auto input.

For MiCOM P44y/P54x products with a single CB application (P543/P545), DDB

Nos 856 and 857 again show the mode (3P, 1P).

For MiCOM P44y/P54x products with a dual CB application (P544/P546), DDB Nos

856 and 857 again show the mode (3P, 1P) for the leader CB.

For MiCOM P44y/P54x products with a dual CB application (P544/P546), DDB Nos

1532 and 1533 show the mode (3P, 1P) for the follower CB.

Circuit Breaker In Service (P544/P546)

The circuit breaker in service logic is shown in Figure AR-145.

To be available for auto-reclosing, the circuit breaker has to be “in service” when the auto-reclose is initiated by a protection operation. The circuit breaker is considered to be

“in service” if it has been in a closed state for a period equal to or greater than the setting

“CB IS Time”.

A short adjustable time delay, “CB IS Memory Time”, allows for situations where, due to very fast acting circuit breaker auxiliary switches, when a circuit breaker trips following a fault, the circuit breaker change of state from closed to open is detected in the autoreclose initiation logic before the “AR Initiate” signal from the protection is recognized.

Once an auto-reclose cycle has been started, the “in service” signal for the circuit breaker stays set until the end of the auto-reclose cycle.

The “CBx In Service” (x = 1 or 2) signal resets if the CB opens, or if the corresponding CB

Auto-Reclose In Progress (ARIP) signal resets.

Auto-Reclose Enable (P544/P546)

The auto-reclose enable logic is shown in Figure AR-146.

P54x/EN OP/Nd5 Page 5-235

(OP) 5 Operation

5.6.6.3

Dual CB Control: P544/P546 Operation

A master enable/disable signal provides overall control of the auto-reclose function for the circuit breakers. If the “Auto-reclose” setting cell in the CONFIGURATION column of the menu is set to “enabled” the auto-recloser can be brought into service with other commands (described below) providing further control.

In the figure, the auto-recloser is enabled when the “AR In Service” DDB (1385) is driven high. To achieve this, as well as enabling the “Auto-reclose” setting cell in the

CONFIGURATION column of the menu, the following conditions below must be met:

1. Auto-reclose must be enabled for at least one of the circuit breakers (CB1/CB2).

This is achieved by enabling DDB input “AR Enable CB1” (1609) for CB1 and/or

“AR Enable CB2” (1605) for CB2. Both these DDBs signals default to “high” if not mapped in the PSL so, if they are not mapped, this part of the logic will always be satisfied.

2. Auto-reclosing needs to be enabled from an opto input mapped to the “AR Enable”

DDB (1384), or one of the following conditions must be met:

A menu command from the HMI “Auto-reclose Mode” cell in the CB CONTROL column of the menu is used to bring the auto-recloser into service, or,

For a P446/P544/P546/P841 having IEC 60870-5-103 communications, a standardised enable auto-reclose command is received via the communications link, or,

The auto-recloser is brought into service by the pulsing of the “AR Pulse On” DDB

(1382).

The result of the logic above is the auto-reclose status. This can be seen in the data cell

“AR Status” in the CB CONTROL column of the menu, and will be either “In Service” or

“Out of Service”.

Software Version D1a and Later

This is an Output signal available in the PSL, which can be mapped to an opto status input to enable the autoreclose as long as the below conditions are satisfied.

Autoreclose can be Enabled or Disabled. This is done using a combination of Setting changes, starting with DDB 1384 (AR Enable) operation. Here is what is needed to

Enable or Disable the Autoreclose:

AR Enabled = Autoreclose Enabled (0924 = 1) AND

(AR Telecontrol In Service (070B = 1) OR AR Enable DDB active (DDB 1384 = 1))

AND

(AR Enable CB1 DDB Active (DDB 1609 = 1) OR AR Enable CB2 DDB Active

(DDB 1605 = 1))

AR Disabled = Autoreclose Enabled (0924 = 0) OR

(AR Telecontrol Out of Service (070B = 2) AND AR Enable DDB active (DDB 1384

= 0)) OR

(AR Enable CB1 DDB Active (DDB 1609 = 1) AND AR Enable CB2 DDB Active

(DDB 1605 = 1))

Note More details are provided in the Auto-Reclose Skip Shot 1 (P543/P545) and the Auto-Reclose (P544/P546) sections.

Here is the new description of DDB 1384:

DDB No Text

DDB 1384 AR Enable

Description

External input via DDB mapped in PSL to enable AR, but ONLY if

“Enable AR CB1” DDB or “Enable AR CB2” DDB is set and “Auto-

Reclose” Configuration setting is enabled.

Page 5-236 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.6.6.4

5.6.6.5

5.6.6.5.1

(OP) 5 Operation

Leader & Follower CB Selection (P544/P546)

The leader and follower circuit breaker selection logic is shown in Figure AR-147.

The method of selecting the preferred leader and follower circuit breakers is determined by the menu setting “Leader Select By:”, which can be set to “Leader by Menu”, “Leader by Opto” or “Leader by Ctrl”.

If “Leader Select By:” is set to “Leader by Menu”, a further setting, “Select Leader:”, becomes visible and is used to select the preferred leader circuit breaker by setting

“Select Leader:” either to “Sel Leader CB1” or “Sel Leader CB2”.

If “Leader Select By:” is set to “Leader by Opto”, the preferred leader circuit breaker is determined by the status of the input DDB (1408): “CB2 Lead”. If the input DDB (1408)

"CB2 Lead" is low, then preferred leader circuit breaker is CB1. If DDB "CB2 Lead" is high then it selects CB2 as the preferred leader.

If “Leader Select By:” is set to “Leader by Control”, then the preferred leader circuit breaker is determined by the user control command “CTRL CB2 Lead” cell found under the CB CONTROL column in the relay menu. If the command applied is “Reset CB2

Lead”, CB1 is selected as the preferred leader. Applying “Set CB2 Lead” command selects CB2 as the preferred leader.

If “Num CBs” is set to “Both CB1 &CB2”, either CB1 or CB2 can be selected as leader. If the setting “Num CBs” is set to “CB1 Only”, CB1 is selected as leader. Similarly, CB2 is selected as leader if the setting “Num CBs” is set to “CB2 Only”.

Provided that the circuit breaker is available for auto-reclose (i.e. the circuit breaker is: “in service”, not locked out, and enabled for auto-reclosing - refer the Auto-Reclose Enable and Auto-Reclose Mode and Leader and Follower Circuit Breaker sections), the

“preferred” leader circuit breaker will be the “active” leading circuit breaker in the autoreclose cycle.

If the “preferred” leader circuit breaker is not available for auto-reclosing then, provided it is available for auto-reclose, the “non-preferred” circuit breaker becomes the “active” leader. If this is the case there will be no follower circuit breaker.

If both circuit breakers are available for auto-reclosing and follower reclosing is enabled, then the “preferred leader” will be the “active” leader and the “non-preferred” circuit breaker will be the follower.

Auto-Reclose Mode for Leader & Follower Circuit Breaker (P544/P546)

The auto-reclose mode for the leader and follower circuit breaker logic is shown in Figure

AR-151.

Once auto-reclosing is enabled, the specific reclosing modes which can be applied to each circuit breaker are selected.

The auto-reclose function has three operating modes:

Single Phase Auto-reclose (1P)

Three Phase Auto-reclose (3P)

Single/Three Phase Auto-reclose(1/3P)

Single phase reclosing is permitted only for the first shot of an auto-reclose cycle. If two or more shots are enabled, then, in a multi-shot auto-reclose cycle, the second and subsequent trips and reclosures will always be three-phase.

The settings for the reclosing modes are affected by the number of circuit breakers, “Num

CBs”, setting in the AUTO-RECLOSE column of the menu.

Auto-Reclose Mode with One Circuit Breaker (P544/P546)

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5.6.6.5.2

5.6.6.6

Dual CB Control: P544/P546 Operation

If “Num CBs” is set to “CB1 Only” or “CB2 Only”, only one circuit breaker will be controlled, and a setting “AR Mode” is visible which controls the specific auto-reclosing mode for the active circuit breaker.

The following setting options are available: “AR 1P”, “AR 1/3P”, “AR 3P” & “Opto”.

Single phase auto-reclosing of the circuit breaker is permitted if “AR Mode” is set to “AR

1P” or “AR 1/3P”. Three phase auto-reclosing of the circuit breaker is permitted if “AR

Mode” is set to “AR 3P” or “AR 1/3P”.

If the “AR Mode” selection is by “Opto” then the reclose mode for the active circuit breaker is determined by the status of two DDB inputs: “Lead AR 1P” (1497) to enable single-phase auto-reclose, and “Lead AR 3P” (1498) to enable three-phase auto-reclose.

Auto-Reclose Mode with Two Circuit Breakers (P544/P546)

If “Num CBs” is set to “Both CB1&CB2” then a setting “Lead/Foll ARMode” becomes visible and is used to control the specific reclosing modes that are applied to each circuit breaker. The options available are:

“L1P F1P”

“L1P F3P”

“L3P F3P”

“L1/3P F1/3P”

“L1/3P F3P”

“Opto”

Where L refers to the leader circuit breaker, F refers to the follower circuit breaker, 1P implies single-phase, 3P implies three-phase, and 1/3P implies single or three-phase, so a setting of “L1/3P F3P” would mean that the leader circuit breaker could perform single or three-phase auto-reclose, whilst the follower would perform three-phase auto-reclose only.

If the auto-reclose mode selection is by “Opto” then the reclose mode for the active leader is determined by the status of two DDB inputs: “Lead AR 1P” (1497) to enable single-phase auto-reclose, and “Lead AR 3P” (1498) to enable three-phase auto-reclose.

The reclose mode for the active follower is determined by the status of two DDB inputs:

“Follower AR 1P” (1409) to enable single-phase auto-reclose, and “Follower AR 3P”

(1410) to enable three-phase auto-reclose.

Where the selected follower auto-reclose mode supports single-phase tripping, the follower can perform single-phase auto-reclose only if the leader circuit breaker has performed single-phase auto-reclose. If the leader has tripped and reclosed three-phase, the follower is also forced to trip three-phase. The follower will reclose three-phase provided three-phase auto-reclose is permitted for the follower circuit breaker. If the follower circuit breaker trips three-phase and three-phase auto-reclose is not permitted for the follower, then the follower circuit breaker locks out without reclosing.

Force Three Phase Trip (P544/P546)

The force three-phase trip logic is shown in Figure AR-152.

Following single-phase tripping, whilst the auto-reclose cycle is in progress, and upon resetting of the protection elements, an output signal DDB associated with the tripped circuit breaker is asserted high.

In the case of CB1, this is “DDB: AR Force CB1 3P” (858).

In the case of CB2, this is “DDB: AR Force CB2 3P” (1485).

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5.6.6.7

5.6.6.7.1

5.6.6.7.2

(OP) 5 Operation

These signals are applied to any associated protection trip conversion logic to force all protection trips to be converted to three-phase trips for the associated circuit breaker, for any subsequent faults that occur whilst the auto-reclose cycle remains in progress.

Auto-Reclose Initiation (P544/P546)

The auto-reclose initiation logic is shown in Figure AR-153, Figure AR-154, Figure AR-

155 and Figure AR-156.

Auto-reclose is initiated from the internal protection of the relay:

Protection functions hosted by the P446/P544/P546/P841

External protection equipment

Trip test

Auto-reclose initiation will start an auto-reclose for any circuit breaker that is in service and enabled for auto-reclose: CB1 auto-reclose will start if CB1 is in service and enabled for auto-reclose; CB2 auto-reclose will start if CB2 is in service and enabled for autoreclose.

When an auto-reclose cycle is started, the relevant circuit breaker auto-reclose in progress “CB1 ARIP” and/or “CB2 ARIP” signal is set, and remains set until the end of the cycle for the associated circuit breaker. The end of the cycle is signified by successful reclosure, or by lockout.

An auto-reclose cycle can be initiated by operation of any of the following:

Auto-Reclose Initiation by Host Relay Protection Function (P544/P546)

Auto-Reclose Initiation by External Protection Equipment (P544/P546)

The following DDB signals are available for mapping in the PSL from opto inputs or communication inputs to initiate auto-reclosing.

DDB (535): CB1 Ext Trip A

DDB (536): CB1 Ext Trip B

DDB (537): CB1 Ext Trip C

DDB (534): CB1 Ext Trip 3Ph

DDB (539): CB2 Ext Trip A

DDB (540): CB2 Ext Trip B

DDB (541): CB2 Ext Trip C

DDB (538): CB2 Ext Trip 3Ph

If mapped, activation of the input to the DDB will initiate auto-reclose.

Auto-Reclose Initiation and Cycle by Trip Test (P544/P546)

Auto-Reclose Initiation by Host Relay Protection Function (P544/P546)

Many protection functions in the P544/P546 (for example differential trips, Zone 1 trips, distance-aided scheme trips, time-delayed distance zones, overcurrent and earth

(ground) elements, DEF and directional aided schemes.) can be programmed to initiate or block auto-reclose by selecting the Initiate AR, or Block AR options in the settings which are available under the AUTORECLOSE settings column of the menu. Operation of a protection function selected for auto-reclose will initiate auto-reclose. Operation of a protection function selected to block auto-reclose will block and force a lockout.

Auto-Reclose Initiation by External Protection Equipment (P544/P546)

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5.6.6.7.3

5.6.6.8

5.6.6.9

Dual CB Control: P544/P546 Operation

The following DDB signals are available for mapping in the PSL from opto inputs or communication inputs to initiate auto-reclosing.

DDB (535): CB1 Ext Trip A

DDB (536): CB1 Ext Trip B

DDB (537): CB1 Ext Trip C

DDB (534): CB1 Ext Trip 3Ph

DDB (539): CB2 Ext Trip A

DDB (540): CB2 Ext Trip B

DDB (541): CB2 Ext Trip C

DDB (538): CB2 Ext Trip 3Ph

If mapped, activation of the input to the DDB will initiate auto-reclose.

Auto-Reclose Initiation and Cycle by Trip Test (P544/P546)

A user command (“Test Autoreclose” under COMMISSION TESTS) in the

P446/P544/P546/P841 menu can be used to initiate an auto-reclose cycle. Four separate commands can be executed, each command comprising a 100 ms pulse output when the relevant “execute” option is selected. Available commands are: “Trip Pole A” / “Trip Pole

B” / “Trip Pole C” / “Trip 3 Pole”. There is also a “No Operation” option to exit the command field without initiating a test.

Sequence Counter (P544/P546)

The sequence counter logic is shown in Figure AR-160.

The auto-reclose logic includes a counter known as the sequence counter. Unless autoreclose is in progress, the sequence counter will have a value of 0. Following a trip, and subsequent auto-reclose initiation, the sequence counter is incremented. The counter provides output signals indicating how many initiation events have occurred in any autoreclose cycle. These signals are available as user indications and are used in the logic to select the appropriate dead timers, or, for a persistent fault, force a lockout.

The logic generates the following sequence counter outputs which are used in the autoreclose shots counter logic (refer to the Circuit Breaker Auto-Reclose Shots Counters section).

DDB 847: “Seq. Counter = 1” is set when the counter is at 1;

DDB 848: “Seq. Counter = 2” is set when the counter is at 2;

DDB 849: “Seq. Counter = 3” is set when the counter is at 3; and

DDB 850: “Seq. Counter = 4” is set when the counter is at 4.

Every time the relay trips the sequence counter is incremented by 1. The auto-reclose logic compares the sequence counter values to the number of auto-reclose shots setting,

“AR Shots ” . If the counter value exceeds the setting then the auto-reclose is locked out.

In the case of a successful auto-reclose cycle the sequence counter resets to zero.

Auto-Reclose Cycle Selection (P544/P546)

The auto-reclose cycle selection determines, for a dual breaker configuration, the logic to determine which of the circuit breakers will act as leader/follower and whether the reclosing will be single-phase or three-phase.

The logic is shown in Figure AR-161 and Figure AR-163.

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5.6.6.10

5.6.6.11

(OP) 5 Operation

In a dual circuit breaker arrangement, when an auto-reclose cycle is started, single-phase or three-phase reclosing is asserted for each circuit breaker, according to whether the circuit breaker has tripped single-phase or three-phase, and according to whether singlephase and/or three-phase reclosing is permitted for that circuit breaker. Dependent upon the settings and trip performed, each circuit breaker can perform:

Single-phase reclose as Leader (with or without follower)

Single-phase reclose as Follower (provided the leader is also selected to singlephase auto-reclose)

Three-phase reclose as Leader (with or without follower)

Three-phase reclose as Follower

Dead Time Control (P544/P546)

The dead time control logic is shown in Figure AR-164, Figure AR-166, Figure AR-167 and Figure AR-168.

Once an auto-reclose cycle has started, the conditions to enable the dead time to run are determined by menu settings, circuit breaker status, protection status, the nature of the auto-reclose cycle (single-phase or three-phase) and opto inputs from external sources.

Three settings are involved in controlling the dead time start:

“DT Start by Prot”

“3PDTStart WhenLD”

“DTStart by CB Op”.

The “DT Start by Prot” setting is always visible and has three options “Protection Reset”,

“Protection Op”, and “Disable”. These options set the basic conditions for starting the dead time.

The ‘dead time started by protection operation’ condition can, optionally, be qualified by a check that the line is dead.

The ‘dead time started by protection reset’ condition can, optionally, be qualified by a check, that the circuit breaker is open, as well as by an optional check that the line is dead (note*).

If the DT Start by Prot” is set to “Disable”, the circuit breaker must be open for the dead time to start. This condition can, optionally be qualified by a check that the line is dead

(note*).

The qualification to check that the ‘line is dead’ is provided by setting “3PDTStart

WhenLD” to “Enabled”.

The qualification to check that the ‘circuit breaker is open’ is provided by setting “DTStart by CB Op” to “Enabled”.

In a dual circuit breaker scheme (“Num CBs” set to “Both CB1 & CB2”) if the “DTStart by

CB Op” is set to enabled, both circuit breakers must be tripped to enable the dead time to start. For a single-phase auto-reclose cycle, the leader circuit breaker has to be tripped single-phase. For a three-phase auto-reclose cycle, both circuit breakers have to be tripped three-phase.

Note* This is only applicable when tripping/auto-reclose is three-phase.

Follower CB Enable and Time Control (P544/P546)

The follower circuit breaker control logic is shown in Figure AR-170, Figure AR-171 and

Figure AR-172.

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5.6.6.12

Dual CB Control: P544/P546 Operation

When a leader/follower auto-reclose cycle is initiated, the conditions for the follower delay period (“Follower Time”) to start are determined by the leader circuit breaker operation, the follower circuit breaker status, the menu setting “BF if LFail Cls” (Block Follower reclose if Leader CB Fails to close), and opto inputs from external sources. The basic condition to start the follower delay is that the leader circuit breaker must have reclosed.

If the menu setting “BF if LFail Cls” is set to “Disabled”, the follower circuit breaker will reclose even if the leader circuit breaker fails to reclose (for example, due to the absence of a “CB Healthy” signal). When “BF if LFail Cls” is set to “Disabled”an additional menu setting “Dynamic F/L” becomes visible to further control the operation of the follower circuit breaker. If the setting “Dynamic F/L” is set to “Enabled”, the follower circuit breaker will reclose with no deliberate additional delay, i.e. at approximately the same instant that the leader circuit breaker would have closed if it had been healthy. If the menu setting

“Dynamic F/L” is set to “Disabled”, the follower circuit breaker will reclose after an additional delay equal to the set “Follower Time”.

If the menu setting “BF if LFail Cls “is set to “Enabled” then, if the leader circuit breaker fails to reclose, the follower circuit breaker cycle is cancelled and auto-reclosing of both circuit breakers is locked out.

The follower circuit breaker must be open for the follower delay time to start. For a singlephase follower auto-reclose cycle, the follower circuit breaker has to be open singlephase. For a three-phase follower auto-reclose cycle, the follower circuit breaker has to be open three-phase.

When the follower delay time has timed out, the relevant internal signal

“CBxSPFTCOMP” or “CBx3PFTCOMP” (x = 1 or 2) is applied to the “CB AutoClose” logic, described in the CB1 and CB2 Auto Close section to indicate that the follower time is complete.

CB1 and CB2 Auto Close (P544/P546)

The CB1 and CB2 auto close logic is shown in Figure AR-177 and Figure AR-178.

When the end of a dead time or the end of a follower time is indicated by one of the

• following internal signals, the auto close logic is executed:

CB1 SPDTCOMP

CB1 3PDTCOMP

CB2 SPDTCOMP

CB2 3PDTCOMP

CB1 SPFTCOMP

CB1 3PFTCOMP

CB2 SPFTCOMP

CB2 3PFTCOMP

The auto close logic checks that all necessary conditions are satisfied before issuing a

“AutoClose CB1” or “AutoClose CB2” signal to the CB1 and CB2 overall control scheme as described in the Circuit Breaker Control section.

For any reclosure, the circuit breaker must be healthy (mechanism OK to close, and retrip if necessary) and it should not be in a lockout state.

For any single-phase reclosure, the circuit breaker must be open on one phase. For any three-phase reclosure, the circuit breaker must be open on all three-phases and the appropriate system check conditions (live bus/dead line, synch check etc) must be satisfied.

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5.6.6.13

(OP) 5 Operation

The system check conditions for CB1 leader reclose, CB2 leader reclose, CB1 follower reclose and CB2 follower reclose are independently selectable by menu settings and are described in the System Checks for Circuit Breaker Closing section.

The auto close signals (“AutoClose CB1”, “AutoClose CB2”) sent to the circuit breaker control scheme are pulses lasting 100 milliseconds. Another pair of signals “Set CB1

Close” & “Set CB2 Close”, DDBs (1565/1449) are set in conjunction with the auto close signals, but these remain set until either the end of the auto-reclose cycle, or the next protection operation. These signals are used to initiate the “Reclaim timing logic” and the

“CB AR Shots Counters” logic, described in these sections:

Reclaim Time & Successful Auto-Reclose (P544/P546)

If “Res AROK by UI” is set to enabled, all the “successful auto-reclose" signals can be reset by user interface command “Reset AROK Ind” from the CB CONTROL settings column.

If “Res AROK by NoAR” is set to enabled, the “successful auto-reclose" signals for each circuit breaker can be reset by temporarily generating an “AR disabled” signal for each circuit breaker according to the logic described in the Autoreclose Enable

Logics section.

If “Res AROK by Ext” is set to enabled, the “successful autoreclose" signals for can be reset by activation of the relevant input “Ext Rst CB1 AROK” or “Ext Rst CB2

AROK” (DDB1517 or 1417) mapped in the PSL.

If “Res AROK by TDly” is set to enabled, the “successful autoreclose" signals for are automatically reset after a user defined time delay as set in "Res AROK by

TDly" setting.

Circuit Breaker Healthy and System Check Timers (P544/P546)

CB1 & CB2 Auto-Reclose Shots Counters (P544/P546)

Reclaim Time & Successful Auto-Reclose (P544/P546)

The reclaim time logic is shown in Figure AR-177 and Figure AR-178.

The successful auto-reclose logic is shown in Figure AR-179, Figure AR-180 and Figure

AR-181.

The “Set CB1 Close” & “Set CB1 Close”, DDBs (1565/1449) signals from the auto close logic are used to enable the reclaim timers. Depending on whether the circuit breaker has tripped single-phase or three-phase, and whether single-phase and/or three-phase reclosing is permitted for the circuit breaker, either the single-phase reclaim timer “SPAR

Reclaim Time” or the three-phase reclaim timer “3PAR Reclaim Time” is enabled.

If any protection re-operates before the reclaim time has timed out, the sequence counter is incremented. The counter signal advances from ‘Seq Counter = n’ to ‘Seq Counter =

(n+1)’, resets any “….DTCOMP” signal and prepares the logic for the next dead time to start when conditions are suitable. The operation also resets the “Set CB Close” signal, and hence the reclaim timer is also stopped and reset. The “Reclaim time” starts again if the “Set CB Close” signal goes high following completion of a dead time in a subsequent auto-reclose cycle.

If CB1 is closed and has not tripped again when the reclaim time is complete, signals

“CB1 Succ 1P AR”, (DDB1571) or “CB1 Succ 3P AR”, (DDB 852) are generated to indicate the successful reclosure.

Similarly, If CB2 is reclosed during the auto-reclose cycle and remains closed when the reclaim time is complete, signals “CB2 Succ 1P AR”, (DDB 1451) or “CB2 Succ 3P AR”,

(DDB 1452) are generated to indicate successful reclosure.

These signals also increment the relevant circuit breaker successful auto-reclose shot counters and reset the relevant “ARIP” signal.

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5.6.6.14

5.6.6.15

Dual CB Control: P544/P546 Operation

The “successful auto-reclose” signals generated from the logic can be reset by various commands and settings options available under CB CONTROL menu settings column.

These settings are described below:

If “Res AROK by UI” is set to enabled, all the “successful auto-reclose" signals can be reset by user interface command “Reset AROK Ind” from the CB CONTROL settings column.

If “Res AROK by NoAR” is set to enabled, the “successful auto-reclose" signals for each circuit breaker can be reset by temporarily generating an “AR disabled” signal for each circuit breaker according to the logic described in the Autoreclose Enable

Logics section.

If “Res AROK by Ext” is set to enabled, the “successful autoreclose" signals for can be reset by activation of the relevant input “Ext Rst CB1 AROK” or “Ext Rst CB2

AROK” (DDB1517 or 1417) mapped in the PSL.

If “Res AROK by TDly” is set to enabled, the “successful autoreclose" signals for are automatically reset after a user defined time delay as set in "Res AROK by

TDly" setting.

Circuit Breaker Healthy and System Check Timers (P544/P546)

The circuit breaker healthy and system check timers logic is shown in Figure AR-183 and

Figure AR-184.

This logic provides signals to cancel auto-reclosing for either circuit breaker if the circuit breaker is not healthy (e.g. low gas pressure or, for three-phase auto-reclosing, the required line & bus voltage conditions are not satisfied) when the scheme is ready to close the circuit breaker.

In this logic, both CB1 and CB2 share the settings “AR CBHealthy Time” and “AR

CheckSync Time”.

For either circuit breaker, at the completion of any dead time or follower time, the logic starts an “AR CBHealthy timer”. If the “CB Healthy” signal (DDB 436 or 437) becomes high before the set time is complete, the timer stops and, if all other relevant circuit breaker closing conditions are satisfied the scheme issues the “CB AutoClose” signal. If the “CB Healthy” signal, (DDB 436 or 437) signal stays low, then at the end of the set “AR

CBHealthy time” an “AR CB Unhealthy” alarm signal (DDB 307 or 329) is set. This forces the circuit breaker auto-reclose sequence to be cancelled.

Additionally, for either circuit breaker, at the completion of any three-phase dead time or three-phase follower time, the logic starts an “AR CheckSync Time”. If the circuit breaker synchro-check OK signal {“CB L SCOK “ (DDB 1573 or1455) or “CB F SCOK” (DDB1491 or 1456)} goes high before the set time is complete, the timer stops and, if all other relevant circuit breaker closing conditions are satisfied, the scheme issues the “CB

AutoClose” signal. If the “System check OK” signal stays low, then at the end of the “AR

CheckSync Time” an alarm “AR CB No C/S” (DDB 308 or 330) is set which informs that the check synchronism is not satisfied for that circuit breaker and forces the auto-reclose sequence to be cancelled.

CB1 & CB2 Auto-Reclose Shots Counters (P544/P546)

The CB1 & CB2 auto-reclose shots counter logic is shown in Figure AR-181 and Figure

AR-182.

A number of counters are provided to enable analysis circuit breaker auto-reclosing history. Each circuit breaker has a set of counters that are stored in non-volatile memory, so that the data is maintained even in the event of a failure of the auxiliary supply.

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5.6.6.16

(OP) 5 Operation

Logic signals from the “Sequence counters” is combined with “successful auto-reclose” signals and “auto-reclose lockout” signals to provide the following summary for each circuit breaker:

Overall total shots (No. of reclose attempts)

“CBx Total Shots”

Number of successful single-phase reclosures

“CBx SUCC SPAR”

Number of successful 1st shot three-phase reclosures

“CBx SUCC3PARShot1”

Number of successful 2nd shot three-phase reclosures

“CBx SUCC3PARShot2”

Number of successful 3rd shot three-phase reclosures

“CBx SUCC3PARShot3”

Number of successful 4th shot three-phase reclosures

“CBx SUCC3PARShot4”

Number of failed auto-reclose cycles which forced CB to lockout

“CBx Failed Shots”

All the counter contents are accessible through the CB CONTROL column of the menu.

For each individual circuit breaker, these counters can be reset either by user commands

“Reset CB1 Shots” or “Reset CB2 Shots” from the CB CONTROL settings column, or by activation of the relevant input “Ext Rst CB1 Shots” or “Ext Rst CB2 Shots” (DDB 1518 or

1418) mapped in the PSL.

System Checks for Circuit Breaker Closing (P544/P546)

The system checks for circuit breaker closing logic is shown in Figure AR-185 to Figure

AR-190.

For three-phase auto-reclosing and control closing of the circuit breakers, system voltage checks are separately selectable for:

CB1 reclosing as leader

CB1 reclosing as follower

CB1 control close

CB2 reclosing as leader

CB2 reclosing as follower

CB2 control close

In the AUTORECLOSE settings, if the “Num CBs” is set to “CB1 Only” or “CB2 Only”, then the operation of the circuit breaker will be the same as described for the corresponding leader circuit breaker (for example CB1 operation will be the same as described by CB1L in the diagrams and descriptions).

The system check options for each circuit breaker are enabled or disabled in the “CBx SC all” setting (x = 1L, 2L, 1F, 2F) in the AUTORECLOSE column of the menu. If set to

“Disabled”, then no system checks are required on any shot, and the relevant settings are invisible. Otherwise, the system check options that can be enabled for each breaker (as leader or follower) are:

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5.6.6.17

Dual CB Control: P544/P546 Operation

System check option Setting

System checks not required for first shot of auto-reclose “CBx SC Shot1”

Fast synchronism check (note 2) “CBx SC ClsNoDly”

Check synchronism stage 1 (note 1)

Check synchronism stage 2 (note 1)

Dead line / Live Bus

Live Line / Dead bus

Dead line / Dead bus

“CBx SC CS1”

“CBx SC CS2”

“CBx SC DLLB”

“CBx SC LLDB”

“CBx SC DLDB”

Note 1 Two separate (independent) system synchronism check stages are available for each circuit breaker. Each stage has different slip frequency and phase angle settings as described in the System Voltage Checks section.

Note 2 A “fast synchronism check auto-reclose” option is available for the threephase auto-reclose as leader circuit breaker, by menu setting “CBx SC

ClsNoDly”. When the setting is enabled, then if the line and bus come into synchronism (i.e. line energised from remote end) at any time after the three-phase dead time has started, a “AutoClose CB” signal is issued immediately without waiting for the dead time to elapse. This option is sometimes required for the second line end to reclose on a line with delayed auto-reclosing (typical cycle: first line end reclose after dead time with live bus & dead line, then second line end reclose immediately with live bus & live line in synchronism).

Table 28 - System check options and settings

Manual reclosing for each circuit breaker is controlled according to the settings in the

SYSTEM CHECKS column of the menu. The system check options for each circuit breaker are enabled or disabled in the “CBxM SC all” setting (x = 1 or 2) in the SYSTEM

CHECKS column of the menu. If set to “Disabled”, then no system checks are required for manual closure, and the relevant settings are invisible. Otherwise, the system check options that can be enabled for each breaker (as leader or follower) are:

System check option Setting

Check synchronism stage 1 (refer note 1 above)

Check synchronism stage 2 (refer note 1 above)

“CBM SC CS1”

“CBM SC CS2”

Dead line / Live Bus

Live Line / Dead bus

Dead line / Dead bus

Table 29 - System check options and settings

“CBM SC DLLB”

“CBM SC LLDB”

“CBM SC DLDB”

CB1 & CB2 Trip Time Monitor (P544/P546)

The circuit breaker trip time monitor logic is shown in Figure AR-191 and Figure AR-192.

This logic checks that the circuit breaker trips correctly following the issuing of a protection trip signal.

When any protection trip signal is issued a timer, “Trip Pulse Time” is started.

The “Trip Pulse Time” setting is common to both CB1 and CB2 and is used in the trip time monitor logic and in the circuit breaker control logic.

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5.6.6.18

(OP) 5 Operation

If the circuit breaker trips correctly (single-phase or three-phase according to the trip signal and settings) the timer resets and the auto-reclose cycle, if enabled, proceeds normally. If either circuit breaker fails to trip correctly within the set time, the signal “CB1

Fail Pr Trip” (1575) and/or “CB2 Fail Pr Trip” (1459) is issued and the affected circuit breaker auto-reclose cycle is forced to lock out.

Autoreclose Lockout (P544/P546)

The auto-reclose lockout logic is shown in Figure AR-193 to Figure AR-198.

Auto-reclose lockout of a circuit breaker will be triggered by a number of events. These are outlined below:

Protection operation during reclaim time. If, following the final reclose attempt, the protection operates during the reclaim time, the relay will be driven to lockout and the auto-reclose function will be disabled until the lockout condition is reset.

Persistent fault. A fault is considered persistent if the protection re-operates after the last permitted shot.

Block auto-reclose. The block auto-reclose logic can cause a lockout if autoreclose is in progress. If asserted, the “Block CBx AR” input (DDB 448 /1421) mapped in the PSL will, if auto-reclose is in progress, block auto-reclose and cause a lockout.

Multi phase faults. The logic can be set to block auto-reclose either for two-phase or three-phase faults, or to block auto-reclose for three-phase faults only. For this, the setting “Multi Phase AR” applies, where the options are “Allow AR”, “BAR 2&3

Phase” & “BAR 3 Phase” in the AUTORECLOSE column of the menu.

Protection function selection. The protection functions can be individually selected to block auto-reclose and force lockout. If enabled, the protection functions in the

AUTORECLOSE column of the menu can be set to “Block AR”. Selecting “Block

AR” will cause a lockout if the particular protection function operates.

Circuit breaker failure to close. If the circuit breaker fails to close because, for example, the circuit breaker springs are not charged, the gas pressure is low, or there is no synchronism between the system voltages indicated by the “AR CBx

Unhealthy” and “AR CBx No Checksync” alarms, auto-reclose will be blocked and forced to lockout.

Circuit breaker open at the end of the reclaim time. An auto-reclose lockout is forced if the circuit breaker is open at the end of the reclaim time.

Circuit breaker fails to close when the close command is issued.

Block follower if leader fails to close is set. If the setting “BF if Lfail Cls” in the

AUTORECLOSE column of the menu is set to “Enable”, the active follower circuit breaker will lockout if the leader circuit breaker fails to reclose.

Circuit breaker fails to trip correctly.

Three phase dead time started by line dead violation. If the line does not go dead within the “Dead Line Time” time setting when the dead time start is determined by the menu setting “3PDTStart WhenLD”, the logic will force the auto-reclose sequence to lockout after expiry of the setting time.

Single phase evolving to multi phase fault. If, after expiry of the discriminating time from the “Protection Re-operation + Evolving” fault logic (refer the Auto-Reclose

Cycle Selection section), a single-phase fault evolves into a two, or three-phase fault, the internal signal “Evolve Lock” will be asserted that will force the autoreclose to lockout.

Leader/Follower invalid selection via opto. If the “Leader/Follower AR” mode in the

AUTORECLOSE menu is set to be selected via the opto-inputs, “Opto”, then if the logic detects an invalid auto-reclose mode combination selection, it will force both

CB1 & CB2 to lockout if a trip occurs.

P54x/EN OP/Nd5 Page 5-247

(OP) 5 Operation

5.6.6.19

Dual CB Control: P544/P546 Operation

If CB1 or CB2 is locked out, the logic generates the alarms “CBx AR Lockout” (DDB 306

/328) for the corresponding circuit breaker. In this condition, auto-reclose of the circuit breaker cannot be initiated until the corresponding lockout has been reset. The methods of resetting from the lockout state are discussed in the next section.

Note CB Lockout, can also be caused by the CB condition monitoring functions maintenance lockout, excessive fault frequency lockout, broken current lockout, CB failed to trip and CB failed to close and manual close - no check synchronism and CB unhealthy. These lockout alarms are mapped to a composite signal CB Lockout Alarm.

These lockout alarms are mapped to a signals “CBx mon LO Alarm” (DDBs 300 & 322 for

CB1 and CB2 respectively) and “CBx LO Alarm”. (DDBs 860 & 1599 for CB1 and CB2 respectively).

Reset Circuit Breaker Lockout (P544/P546)

The lockout conditions caused by the circuit breaker condition monitoring functions

(including manual close failure) described in the Auto-Reclose Lockout section can be reset according to the condition of the “Rst CB mon LO by” setting found in the CB

CONTROL column of the menu.

The “Rst CB mon LO by” setting has two options “CB Close”, and “User interface”.

If “Rst CB mon LO By” is set to “CB Close” then closure of the circuit breaker will be a trigger for lockout reset. If set to “CB Close”, a further setting, “CB mon LO RstDly”, becomes visible. This is a timer setting that is applied between the circuit breaker closing, and the lockout being reset.

If “Rst CB mon LO By” is set to “User Interface” then a further command appears in the the CB CONTROL column of the menu, “CB mon LO reset”. This command can be used to reset the lockout.

This logic is included in the Figure 133 and Figure 134.

An auto-reclose lockout state of a circuit breaker will generate an auto-reclose circuit breaker lockout alarm (“AR CBx lockout”) and DDB 306 or 328 is set, corresponding to

CB1 or CB2 being locked out.

This is shown in the logic diagrams Figure AR-199 and Figure AR-200.

The auto-reclose lockout conditions can be reset by various commands and settings options found under the CB CONTROL column of the menu.

These settings and commands are described below:

If “Res LO by CB IS” is set to “Enabled”, the CB lockout is reset if the CB is manually closed successfully. For this the CB must remain closed long enough so that it enters the “In Service” state. (See the Circuit Breaker In Service section and the Remote Control of Circuit Breaker diagram(s)).

If “Res LO by UI” is set to “Enabled”, the CB lockout can be reset by the user interface commands “Reset CB1 LO” or “Reset CB2 LO” found in the CB

CONTROL column of the menu.

If “Res LO by NoAR” is set to “Enabled”, the CB lockout can be reset by temporarily generating an “AR disabled” signal according to the logic described in the Auto-Reclose Enable section, “Auto-reclose Enable” logic.

This is shown in the logic diagram in AR 0 .

If “Res LO by ExtDDB” is set to “Enabled”, the CB lockout can be reset by activation of the relevant input DDB “Reset Lockout” (DDB 446) in the PSL.

Page 5-248 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation (OP) 5 Operation

If “Res LO by ExtDDB” is set to “Enabled”, the CB lockout can be reset by activation of the relevant input DDB “Rst CB1 Lockout” or “Rst CB2 Lockout” (DDB

446 / 1422) in the PSL.

The reset circuit breaker auto-reclose lockout logic is shown in Figure AR-199 and Figure

AR-200.

P54x/EN OP/Nd5 Page 5-249

(OP) 5 Operation

5.7

5.7.1

5.7.2

5.7.3

Page 5-250

Dual CB Control: P544/P546 Operation

Dual CB System Voltage Checks (P544/P546)

Dual CB System Checks Overview (P544/P546)

In some situations it is possible for both “bus” and “line” sides of a Circuit Breaker (CB) to be live when the CB is open, for example at the ends of a feeder which has a power source at each end. Therefore, when closing the CB, it is normally necessary to check that the network conditions on both sides are suitable, before giving a “CB Close” command. This applies to both manual CB closing and auto-reclosure. If a CB is closed when the line and bus voltages are both live, with a large phase angle, frequency or magnitude difference between them, the system could be subjected to an unacceptable shock, resulting in loss of stability, and possible damage to connected machines.

System checks involve monitoring the voltages on both sides of a CB, and, if both sides are live, performing a synchronism check to determine whether the phase angle, frequency and voltage magnitude differences between the voltage vectors, are within permitted limits.

The pre-closing system conditions for a given CB depend on the system configuration and, for auto-reclosing, on the selected auto-reclose program. For example, on a feeder with delayed auto-reclosing, the CBs at the two line ends are normally arranged to close at different times. The first line end to close usually has a live bus and a dead line immediately before reclosing, and charges the line (dead line charge) when the CB closes. The second line end circuit breaker sees live bus and live line after the first CB has re-closed. If there is a parallel connection between the ends of the tripped feeder, they are unlikely to go out of synchronism, i.e. the frequencies will be the same, but the increased impedance could cause the phase angle between the two voltages to increase.

Therefore the second CB to close might need a synchronism check, to ensure that the phase angle has not increased to a level that would cause unacceptable shock to the system when the CB closes.

If there are no parallel interconnections between the ends of the tripped feeder, the two systems could lose synchronism, and the frequency at one end could “slip” relative to the other end. In this situation, the second line end would require a synchronism check comprising both phase angle and slip frequency checks.

If the second line end busbar has no power source other than the feeder that has tripped; the circuit breaker will see a live line and dead bus assuming the first circuit breaker has re-closed. When the second line end circuit breaker closes the bus will charge from the live line (dead bus charge).

Dual CB System Voltage Checks Logic Diagrams (P544/P546)

The system voltage checks logic is shown in:

Figure AR-201

Figure AR-202

Figure AR-203.

Dual CB System Voltage Checks VT Selection (P544/P546)

The system voltage checks function performs a comparison of the line voltage and the bus voltage.

For a single circuit breaker application, there will be two voltage inputs to compare – one from the Voltage Transformer (VT) input from the line side of the circuit breaker, and one from the VT on the bus side of the circuit breaker.

For a dual circuit breaker installation (breaker-and-a-half switch or mesh/ring bus), three

VT inputs are required, one from the common point of the two circuit breakers, identified as the line, one from the bus side of CB1, and the third from the bus side of CB2.

P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.7.4

(OP) 5 Operation

In most cases the line VT input will be three-phase, whereas the bus VTs will be singlephase.

Since the bus VT inputs are normally single-phase, the system voltage checks are made on single-phases, and since the VT may be connected to either a phase-to-phase or phase-to-neutral voltage, then for correct synchronism check operation, the

P446/P544/P546/P841 has to be programmed with the appropriate connection. The “CS

Input” setting in the “CT AND VT RATIOS” can be set to “A-N”, “B-N”, “C-N”, “A-B”, “B-C” or “C-A” according to the application.

The single-phase Bus1 VT and Bus 2 VT inputs each have associated phase shift and voltage magnitude compensation settings “CB1 CS VT PhShft”, “CB1 CS VT Mag ”, “CB2

CS VT PhShft” and “CB2 CS VT Mag ”, to compensate for healthy voltage angle and magnitude differences between the Bus VT input and the selected line VT reference phase. This allows the bus VT inputs to be taken from VT windings with different rated voltages or phase connections to the reference voltage (for example, they could be taken from VTs on opposite sides of a transformer). Any voltage measurements or comparisons using bus VT inputs are made using the compensated values.

The system checks logic comprises two modules, one to monitor the voltages, and one to check for synchronism.

The voltage monitor determines the voltage magnitudes, frequencies and relative phase angles of the VT inputs using the same VT inputs as the check sync reference phase voltage setting “CS Input”, The “Live Line”, “Dead Line”, etc., outputs from the voltage monitor are qualified by blocking inputs from the P544/P546/P841, external VT supervision, VT secondary MCB auxiliary switch contacts, and by external inputs mapped in the PSL to DDBs (1522, etc.) to individually inhibit the output DDBs (888, etc.) for each function.

Dual CB System Voltage Synchronism Checks (P544/P546)

Two synchronism check stages are provided to compare the line and bus voltages when closing a circuit breaker.

Synchronism check logic is enabled or disabled per circuit breaker, by settings “Sys

Checks CB1” to “Enable” or “Disable”, and “Sys Checks CB2” to “Enable”, or “Disable”.

If “System Checks CB1” is set to “Disable”, all other menu settings associated with system checks and synchronism checks for CB1 become invisible, and a DDB (880) signal “SChksInactiveCB1” is set.

Similarly if “System Checks CB2” is set to “Disable”, all other menu settings associated with system checks and synchronism checks for CB2 become invisible, and a DDB

(1484) signal “SChksInactiveCB2” is set.

The overall check synchronism functionality is illustrated below:

P54x/EN OP/Nd5 Page 5-251

(OP) 5 Operation

Live

Volts

Nominal

Volts

Dead

Volts

Dual CB Control: P544/P546 Operation

Check Sync

Stage 1 Limits

V

BUS

Check Sync

Stage 2 Limits

V

LINE

Rotating

Vector

±180° System Split Limits

Figure 142 - Synchro check functionality (P544/P546)

P2131ENa

Page 5-252 P54x/EN OP/Nd5

Dual CB Control: P544/P546 Operation

5.8

5.8.1

5.8.2

5.8.3

Synchronism Check Functions (P544/P546)

(OP) 5 Operation

Overview

Two stages of system synchronism check supervision are provided for each circuit breaker. When required, they control the manual closing and/or auto-reclosing of the associated circuit breaker. “CB1 CS1” and “CB1 CS2” supervise CB1, whilst “CB2 CS1” and “CB2 CS2” supervise CB2.

The functionality of the first two stages (CB1 CS1 and CB2 CS1) is the same for each, but each circuit breaker has individual settings.

The functionality of the second two stages (CB1 CS2 and CB2 CS2) is the same for each, with each circuit breaker having individual settings. The functionality is similar to the first stages, but the second stages have an additional “adaptive” setting.

The synchronism check function in P446/P544/P546/P841 relays can be set to provide appropriate synchronism check supervision of circuit breaker closing for either synchronous or asynchronous systems.

Synchronous Systems and Asynchronous Systems/System Split

Systems in which the frequency difference (“slip frequency”) between the voltages on either side of an open CB is practically zero are described as “synchronous”. Such systems are typically interconnected by other circuits in parallel with the open CB, which help to maintain synchronism even while the CB is open.

Systems which are electrically separated when a specific CB is open do not have parallel connections of sufficiently low impedance to maintain synchronism, and in the absence of any power flow between them the frequencies can drift apart, giving a significant slip frequency. Such systems are described as “asynchronous” or “split”, and are recognised by a measured slip frequency greater than the limiting slip frequency setting for synchronous systems.

Synchronism Check Functions Provided in the P544/P546

Two independently settable synchronism check functions are provided for each circuit breaker controlled by the relay.

CB1 CS1 and/or CB1 CS2 can be applied to supervise closing of circuit breaker CB1.

CB2 CS1 and/or CB2 CS2 can be applied to supervise closing of circuit breaker CB2.

CB1 CS1 and CB2 CS1 are designed to be applied for synchronism check on synchronous systems, while CB1 CS2 and CB2 CS2 provide additional features which may be required for synchronism check on asynchronous systems. In situations where it is possible for the voltages on either side of a circuit breaker to be either synchronous or asynchronous depending on plant connections elsewhere on the system, both CBx CS1 and CBx CS2 can be enabled, to provide a permissive close signal if either set of permitted closing conditions is satisfied.

Each synchronism check function, as well as having the basic maximum phase angle difference and slip frequency settings, can also be set to inhibit circuit breaker closing if selected “blocking” conditions such as overvoltage, undervoltage or excessive voltage magnitude difference are detected. In addition, CB1 CS2 and CB2 CS2 each require the phase angle difference to be decreasing in magnitude to permit circuit breaker closing, and each has an optional “Adaptive” closing feature to issue the permissive close signal when the predicted phase angle difference immediately prior to the instant of circuit breaker main contacts closing (i.e. after CB Close time) is as close as practicable to zero.

P54x/EN OP/Nd5 Page 5-253

(OP) 5 Operation Dual CB Control: P544/P546 Operation

Slip frequency can be defined as the difference between the voltage signals on either side of the circuit breaker, and represents a measure of the rate of change of phase between the two signals.

Having two system synchronism check stages available for each circuit breaker allows the circuit breaker closing to be enabled under different system conditions (for example, low slip / moderate phase angle, or moderate slip / small phase angle).

When the check synchronism criteria is satisfied, a DDB signal “CBx CSy OK” is set

(x = 1 or 2, y = 1 or 2).

For “CB1 CS1 OK” DDB (883) to be set, the following conditions are necessary:

Settings “Sys Checks CB1” and “CB1 CS1 Status” must both be Enabled; AND

“Live Line” and “Live Bus 1” signals are both set;

The measured phase angle magnitude is less than the “CB1 CS1 Angle” setting;

AND

AND

None of the selected “CB1 CS1 Volt. Blk” conditions (V<, V>, VDiff) are true; AND

If “CB1 CS1 SlipCtrl” setting is Enabled, the measured slip frequency between the

• line VT and Bus1 VT is less than the “CB1 CS1 SlipFreq” setting.

For signal “CB1 CS2 OK” DDB (884) to be set, these conditions are necessary:

Settings “Sys Checks CB1” and “CB1 CS2 Status” must both be Enabled; AND

“Live Line” and “Live Bus 1” signals are both set; AND

None of the selected “CB1 CS1 Volt. Blk” conditions (V<, V>, VDiff) are true; AND

If “CB1 CS2 SlipCtrl” setting is Enabled, the measured slip frequency between the line VT and Bus1 VTs is less than the “CB1 CS2 SlipFreq”setting; AND

The measured phase angle magnitude is decreasing; AND

If the “CB1 CS2 Adaptive” setting is Disabled, the measured phase angle magnitude is less than the “CB1 CS2 Angle” setting;

OR

If the “CB1 CS2 Adaptive” setting is Enabled, AND if the predicted phase angle when CB1 closes (after “CB1 Cl Time” setting) is less than the “CB1 CS2 Angle”

• setting AND as close as possible to zero AND still decreasing in magnitude.

For “CB2 CS1 OK” DDB (1577) to be set, the following conditions are necessary:

Settings “Sys Checks CB2” and “CB2 CS1 Status” must both be Enabled; AND

“Live Line” and “Live Bus 2” signals are both set; AND

None of the selected “CB2 CS1 Volt. Blk” conditions (V<, V>, VDiff) are true; AND

The measured phase angle magnitude is less than the “CB2 CS1 Angle” setting;

AND

If “CB2 CS1 SlipCtrl” setting is Enabled, the measured slip frequency between the line VT and Bus1 VT is less than the “CB2 CS1 SlipFreq” setting.

For signal “CB2 CS2 OK” DDB (1463) to be set, the following conditions are necessary:

Settings “Sys Checks CB2” and “CB2 CS2 Status” must both be Enabled; AND

“Live Line” and “Live Bus 2” signals are both set; AND

None of the selected “CB2 CS1 Volt. Blk” conditions (V<, V>, VDiff) are true; AND

If “CB2 CS2 SlipCtrl” setting is Enabled, the measured slip frequency between the line VT and Bus1 VTs is less than the “CB2 CS2 SlipFreq”setting; AND

The measured phase angle magnitude is decreasing; AND

If the “CB2 CS2 Adaptive” setting is Disabled, the measured phase angle magnitude is less than the “CB2 CS2 Angle” setting;

OR

If the “CB2 CS2 Adaptive” setting is Enabled, AND if the predicted phase angle when CB2 closes (after “CB2 Cl Time” setting) is less than the “CB2 CS2 Angle” setting AND as close as possible to zero AND still decreasing in magnitude.

Page 5-254 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

6 P544/P546 CB CONTROL AND AR FIGURES (AR FIGURES)

In Figure AR-143 to Figure AR-207, reference is made to Fig numbers. These refer to

figures in the AR sequence. For example, references to Fig 1 refers to Figure AR-143,

Fig 2 to Figure AR-144, Fig 3 to Figure AR-146, Fig 4 to Figure AR-146 up to Fig 63 to

Figure AR-207.

DDB: CB1 Aux3Ph 52A(420)

DDB: CB1 Aux3Ph 52B(424)

Setting:

CB1 Status Input:

None;

52A 3Pole;

52B 3Pole;

52A&52B 3Pole;

52A 1Pole;

52B 1Pole;

52A&52B 1Pole;

None

52A 3Pole

52B 3Pole

52A&52B 3Pole

52A 1Pole

52B 1Pole

52A&52B 1Pole

XOR

Fig 1

&

&

&

&

&

&

&

1

1

1

1

DDB: CB1 Closed 3ph(907)

DDB: CB1 Open 3ph(903)

DDB: CB1 Aux A 52A(421)

DDB: CB1 Aux A 52B(425) 1 DDB:CB1 Closed Aph(908)

DDB: CB1 Aux B 52A(422)

DDB: CB1 Aux B 52B(426)

DDB: CB1 Aux C 52A(423)

DDB: CB1 Aux C 52B(427)

XOR

XOR

XOR

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

1

1

1

1

1

1

&

&

1 DDB:CB1 Open Aph(904)

1 DDB: CB1 Closed Bph(909)

1 DDB:CB1 Open Bph(905)

1 DDB: CB1 Closed Cph(910)

1 DDB:CB1 Open Cph(906)

1

CB Status time t

0

DDB:CB1 Status Alm(301)

P4096ENa

Figure AR-143 - Circuit breaker 1 - state monitor

P54x/EN OP/Nd5 Page 5-255

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

DDB: CB2 Aux3Ph 52A(428)

DDB: CB2 Aux3Ph 52B(432)

Setting:

CB2 Status Input:

None;

52A 3Pole;

52B 3Pole;

52A&52B 3Pole;

52A 1Pole;

52B 1Pole;

52A&52B 1Pole;

None

52A 3Pole

52B 3Pole

52A&52B 3Pole

52A 1Pole

52B 1Pole

52A&52B 1Pole

XOR

DDB: CB2 Aux A 52A(429)

DDB: CB2 Aux A 52B(433)

XOR

Fig 2

&

&

&

&

&

&

&

1

1

1 DDB: CB2 Closed 3ph(915)

1 DDB: CB2 Open 3ph(911)

DDB: CB2 Aux B 52A(430)

DDB: CB2 Aux B 52B(434)

DDB: CB2 Aux C 52A(431)

DDB: CB2 Aux C 52B(435)

XOR

XOR

Figure AR-144 - Circuit breaker 2 - state monitor

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

1

1

1

1

1

1

&

&

1 DDB:CB2 Closed Aph(916)

1 DDB:CB2 Open Aph(912)

1 DDB: CB2 Closed Bph(917)

1 DDB:CB2 Open Bph(913)

1 DDB: CB2 Closed Cph(918)

1

1 DDB:CB2 Open Cph(914)

CB Status time t

0

DDB:CB2 Status Alm(323)

P4097ENa

Page 5-256 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

DDB:CB 1 Open Aph( 904)

DDB:CB 1 Open Bph( 905)

DDB:CB 1 Open Cph( 906)

Fig 3

1

(OP) 5 Operation

Int Sig: CB1Op1P

Fig 19,28,32,36

DDB: CB 1 Open 3ph( 903)

2

1

1

1

Int Sig: CB1 OpAny

Fig 16,37,55,56

Int Sig: CB1Op2/3P

Fig 16,21,24,28,36

Int Sig: CB2Op1P

Fig 19,28,33,36

DDB:CB 2 Open Aph( 912)

DDB:CB 2 Open Bph( 913)

DDB:CB 2 Open Cph( 914)

DDB: CB 2 Open 3ph( 911)

2

Figure AR-145 - CB1 & CB2 Open 1P, 2P, 2/3P, Any

1

1

Int Sig: CB2 OpAny

Fig 17,38,55,56

Int Sig: CB2Op2/3P

Fig 17,21,24,28,36

P4098ENa

P54x/EN OP/Nd5 Page 5-257

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 55 DDB: CB1 AR Lockout(306)

Setting:

NUM CBs :

CB1 Only

CB1 Only/

CB2 Only /

Both CB1

&CB

BothCB1&CB2

2

DDB: CB1 Closed 3ph( 907)

1

&

&

Fig 4

CBIST

0

CBIST

CBISMT

Logic 1 &

1

Fig 16

DDB: CB1 ARIP( 1544)

Int Sig: CB1 CRLO

Fig 57

R

S

Q DDB: CB 1 In Service (1526)

Fig 8,55,56

Fig 56

DDB: CB2 AR Lockout(328)

Setting:

NUM CBs :

CB1 Only/

CB2 Only

CB2 Only /

Both CB1

&CB

BothCB1&CB2

2

DDB: CB2 Closed 3ph( 915)

1

&

&

CBIST

0

CBIST

CBISMT

Logic 1 &

1

Fig 17

DDB: CB2 ARIP( 1435)

Figure AR-146 - Circuit breaker in service

Int Sig: CB2 CRLO

Fig 58

R

S

Q DDB: CB 2 In Service(1428)

Fig 8,55,56

P4099ENa

Page 5-258 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Config Setting

:

Enable/ Disable

Enable

HMI command

IEC60670-5- 103 Command

ARC Status

( default AR command is on)

1

DDB: AR Enable( 1384)

DDB: AR Enable CB *

DDB: AR Enable CB *

1

Figure AR-147 - Auto-reclose enable

Fig 5

& IntSig: AR DISABLED

Fig 13,37,38,57,58

* Note

If not mapped in PSL

Fig 8,9,10,55a,56a

P4100ENa

Fig 6

Setting:

Leader Select by:

Leader by Menu/

Leader by Opto/

Leader by Control

Leader by Menu

Leader by Opto

Leader by Control

&

&

Setting:

Select Leader:

Sel LeaderCB1/

Sel LeaderCB2

Sel LeaderCB1

Sel LeaderCB2

DDB: CB2 Lead(1408) &

1 IntSig: Pref LCB1

Fig 7

&

Command:

CB2 Lead:

ReSet/Set

Set

Setting:

NUM CBs :

CB1 Only/

CB2 Only/

Both CB1

&CB2

CB1 Only

BothCB1&CB2

CB2 Only

Figure AR-148 - Lead & follower circuit breaker selection

&

&

1 IntSig: Pref LCB2

Fig 7

P4101ENa

P54x/EN OP/Nd5 Page 5-259

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 7

Fig 8

Fig 43

Fig 39

Fig 16

DDB: Leader CB1(1530)

DDB:CB1 Close Fail(303)

DDB:AR CB1 Unhealthy(307)

DDB: ARIP(1542)

Fig 8

DDB: Leader CB2(1431)

Fig 44 DDB:CB2 Close Fail(325)

Fig 40 DDB:AR CB2 Unhealthy(329)

Fig 16

Fig 20

DDB: ARIP(1542)

Int Sig: Reset L-F

Fig 6 Int Sig: Pref LCB1

Fig 8 DDB: CB2 NOAR(1429) t=0.1s

1

1

1

&

&

&

&

&

&

SD

Q

R

&

1

1

1

Fig 16

DDB: CB1 ARIP(1544)

0.1S

0

&

1

Fig 6

Int Sig: Pref LCB2

Fig 8 DDB: CB1 NOAR(1528)

&

&

SD

Q

R

&

1

Fig 17

DDB: CB2 ARIP(1435)

0.1S

0

1

&

Figure AR-149 - Leader/follower logic – 1 (for Software Versions BEFORE H1)

Int Sig: CB1 LFRC

Fig 8,35,56

Int Sig: CB2 LFRC

Fig 8,35,55

Int Sig:SETLCB1

Fig 8

Int Sig: SETLCB2

Fig 8

P4102ENa

Page 5-260 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 8

Fig 43

Fig 39

DDB: Leader CB1( 1530)

DDB: CB 1 Close Fail( 303)

DDB: AR CB1 Unhealthy( 307)

DDB: AR CB1 No C/S (308)

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

Fig 16 DDB: ARIP( 1542)

Fig 8

Fig 44

Fig 40

DDB: Leader CB2( 1431)

DDB: CB 2 Close Fail( 325)

DDB: AR CB2 Unhealthy( 329)

&

DDB: AR CB2 No C/S (330)

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

Fig 16

Fig 20

Fig 6

DDB: ARIP( 1542)

Int Sig: Reset L-F

Int Sig: Pref LCB1

Fig 8 DDB: CB 2 NOAR( 1429) t=0.1s

&

1

1

1

Fig 7

&

&

&

&

&

&

R

SD

Q

&

1

1

1

Fig 16 DDB: CB 1 ARIP( 1544) 0.1S

0

&

1

&

Fig 6

Fig 8

Int Sig: Pref LCB2

DDB: CB 1 NOAR( 1528)

&

R

SD

Q

1

&

Fig 17 DDB: CB 2 ARIP( 1435)

0.1S

0

1

&

Figure AR-150 - Leader/follower logic – 1 (for Software Versions H1 and later)

Int Sig: CB 1 LFRC

Fig 8,35,56

Int Sig: CB 2 LFRC

Fig 8,35,55

Int Sig: SETLCB1

Fig 8

Int Sig: SETLCB2

Fig 8

P4102ENb

P54x/EN OP/Nd5 Page 5-261

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 8

Fig 5

DDB: AR in Service( 1385)

Fig 4

DDB: AR Enable CB1 (1609) *

DDB: CB1 In Service( 1526)

Fig 55 DDB: CB1 AR Lockout( 306)

Fig 55

Fig 16

Int Sig: BAR CB1

DDB: ARIP( 1542)

Fig 7 Int Sig: Set LCB1

Fig 9

Fig 9

Fig 8

Fig 8

Int Sig: Foll SPAROK

Int Sig: Foll 3 PAROK

DDB: Leader CB2( 1431)

Int Sig: CB2 LFRC

Fig 5 DDB: AR in Service( 1385)

DDB: AR Enable CB2 (1605) *

Fig 4

Fig 56

Fig 56

DDB: CB2 In Service( 1428)

DDB: CB2 AR Lockout( 328)

Int Sig: BAR CB2

1

1

&

Fig 7 Int Sig: Set LCB2

Fig 9

Fig 9

Fig 8

Fig 7

Int Sig: Foll SPAROK

Int Sig: Foll 3 PAROK

DDB: Leader CB1( 1530)

Int Sig: CB1 LFRC

1

1

Fig 20

Int Sig: Reset L-F t=0.1s

Figure AR-151 - Leader/follower logic – 2

&

&

&

DDB: CB1 NOAR( 1528)

Fig 7,16

&

&

&

&

1

1

R

S

Q DDB: Leader CB1( 1530)

Fig 7,9,10,16

DDB: Follower CB1( 1432)

Fig 9,16

&

&

&

&

&

&

1

1

DDB: CB2 NOAR( 1429)

Fig 7,17

R

S

Q DDB: Leader CB2( 1431)

Fig 7,9,10,17

DDB: Follower CB2( 1433)

Fig 9,17

* Note

If not mapped in PSL

P4103ENa

Page 5-262 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Setting:

NUM CBs :

CB1 Only

Both CB1&CB

Fig 5 DDB: AR in Service( 1385)

DDB: AR Enable CB1( 1609) *

DDB: AR Enable CB2( 1605) *

&

&

1

&

Setting:

AR Mode

AR 1P

AR 1/3P

AR 3P

AR Opto

DDB: Lead AR 1P( 1497)

DDB: Lead AR 3P( 1498)

&

&

Setting:

Leader/ Follower

AR Mode

L 1P , F1P

L 1P , F3 P

L3P , F3P

L1/3P , F1/3P

L1/3P , F3P

AR opto

DDB: Lead AR 1P( 1497)

DDB: Lead AR 3P( 1498)

DDB: Follower AR 1P( 1409)

DDB: Follower AR 3P( 1410)

Fig 18

Fig 18

DDB: Seq Counter=0( 846)

DDB: Seq Counter=1( 847)

Fig 8 DDB: Leader CB1( 1530)

DDB: AR Enable CB1( 1609) *

&

&

&

&

1

1

1

1

1

1

1

See

Note

&

&

&

&

&

&

&

&

Fig 8 DDB: Leader CB2( 1431)

DDB: AR Enable CB2( 1605) *

Fig 8

Fig 9

Fig 9

Int Sig: Foll CB1

Int Sig: CB2 L SPAROK

Int Sig: Foll SPAROK

&

&

&

&

Fig 9

1

1

1

1

&

Fig 8

Fig 9

Fig 9

Int Sig: Foll CB2

Int Sig: CB1 LSPAROK

Int Sig: Foll 3 PAROK

Figure AR-152 - Leader & follower AR modes enable

&

&

&

(OP) 5 Operation

* Note

If not mapped in PSL

Note

When Leader/ Follower AR Mode is combinations of optos that can be selected. This logic detects these combinations and on a trip forces both CB1 & CB 2 to lockout.

0

0

1

1

1P

0

0

0

Lead AR Follower AR

3P

0

1P

0

0

0

1

1

0

1

1

1

1

1

1

1

0

1

1

0

3P

1

0

1

5.0s

0

Int Sig: Foll SPAROK

Fig 8,9

Int Sig: Foll 3 PAROK

Fig 8,9

DDB: Invalid AR Mode(331)

Int Sig: InvalidAR Mode

Fig 55, 56

&

&

Int Sig: CB1 LSPAROK

Fig 9,10,19,21,55

Int Sig: CB2 LSPAROK

Fig 9,10,19,21,56

Int Sig: CB1L3 PAROK

Fig 10,16,21,55

Int Sig: CB2L3 PAROK

Fig 10,17,21,56

& Int Sig: CB1 FSPAROK

Fig 10,19,21, 55

Int Sig: CB1F3 PAROK

Fig 10,16,21,55

& Int Sig: CB2 FSPAROK

Fig 10,19,21,56

Int Sig: CB2F3 PAROK

Fig 10,17,21, 56

P4104ENa

P54x/EN OP/Nd5 Page 5-263

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 10

Fig 9

Fig 9

Fig 16

Fig 13

Int Sig: CB1 L SPAROK

Int Sig: CB1 F SPAROK

DDB: CB 1 ARIP( 1544)

Int Sig: TARANY

Fig 18

Fig 18

Fig 18

Fig 18

Fig 55

DDB: Seq Counter =1( 847)

DDB: Seq Counter =2( 848)

DDB: Seq Counter =3( 849)

DDB: Seq Counter =4( 850)

DDB: CB 1 AR Lockout( 306)

Fig 39

DDB: AR CB1 Unhealthy( 307)

DDB: Inhibit AR (1420)

Setting:

CB 2 TripMode

3P

1/3P

3P

Fig 8

DDB: Leader CB2( 1431)

Fig 9

Fig 9

Fig 17

Fig 13

Int Sig: CB2 L SPAROK

Int Sig: CB2 F SPAROK

DDB: CB 2 ARIP( 1435)

Int Sig: TARANY

Fig 18

Fig 18

Fig 18

Fig 18

Fig 56

Fig 40

DDB: Seq Counter =1( 847)

DDB: Seq Counter =2( 848)

DDB: Seq Counter =3( 849)

DDB: Seq Counter =4( 850)

DDB: CB 2 AR Lockout( 328)

DDB: AR CB2 Unhealthy( 329)

DDB: Inhibit AR (1420)

Setting:

CB 1 TripMode

3P

1/3P

3P

Fig 8

DDB: Leader CB1( 1530)

&

&

&

&

1

1

Fig 5

DDB: AR In Service( 1385)

Setting:

NUM CBs :

CB1 Only

CB2 Only

Both CB1&CB 2

1

1

Figure AR-153 - Force three-phase trip

Page 5-264

&

&

1

& 1

& DDB: AR Force CB1 3P( 858)

Fig 63

1

& 1

& DDB: AR Force CB2 3P( 1485)

Fig 63

P4105ENa

P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

PrFunct1 Trip

Fig 11

Setting:

PrFunct1 Trip

Initiate AR

:

No Action

Block AR

PrFunct2 Trip

Setting:

PrFunct2 Trip :

Initiate AR

No Action

Block AR

1

1

&

R

S

Q

IntSig: Prot AR Block

Fig 55,56

1 IntSig: INIT AR

Fig 13,14,16,17

PrFunct3 Trip

Setting:

PrFunct ‘n’ Trip

Initiate AR

No Action

Block AR

:

DDB: IA < Start ( 864)

DDB: IB < Start ( 865)

DDB: IC < Start ( 866)

DDB( 577): AR Trip Test A Fig 12

Fig 12

Fig 12

DDB( 578): AR Trip Test B

DDB( 579): AR Trip Test C

DDB( 522) : Any Trip

Figure AR-154 - Auto-reclose initiation

1

1

&

P4106ENa

P54x/EN OP/Nd5 Page 5-265

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 12

DDB: Init APh AR Test( 1504)

DDB: Init BPh AR Test( 1505)

DDB: Init CPh AR Test( 1506)

DDB: Init 3Ph AR Test( 1507)

User Command:

Test autoreclose

( 100 ms pulse

Aph / Bph /

Cph/3ph/ NoOp

A PH

:

)

C PH

3 PH

Figure AR-155 - Test trip & AR initiation

1

1

1

1

1

1

1

DDB( 577): AR Trip Test A

Fig 11

DDB( 578): AR Trip Test B

Fig 11

DDB( 579): AR Trip Test C

Fig 11

P4107ENa

Page 5-266 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 15

Fig 15

Int Sig: CB2 TARA

Int Sig: CB2 TARB

Fig 15 Int Sig: CB2 TARC

Setting:

NUM CBs :

CB1 Only/

CB2 Only/

Both CB1

&CB2

CB1 Only

BothCB1&CB2

1

1

Fig 11 Int Sig: Init AR

DDB: CB1 Trip OutputA(523)

DDB: CB1 Ext TripA(535)

DDB: CB1 Ext Trip 3Ph(534)

DDB: CB1 Trip OutputB(524)

DDB: CB1 Ext TripB(536)

Fig 16

Fig 5

DDB: CB1 Trip OutputC(525)

DDB: CB1 Ext TripC(537)

DDB: ARIP(1542)

Int Sig: AR Disabled

Fig 13

&

1

1

2 Int Sig:TAR2/3 PH

Fig 53

Int Sig: TARANY

Fig 10,20

S

Q

R

Int Sig: TARA

Fig 53

DDB: CB1 Trip AR MemA(1535)

Fig 13

&

&

1

1

0.01

0.1

1

&

&

0.2

0

S

Q

R

1

1

S

Q

R

Int Sig: TARB

Fig 53

DDB: CB1 Trip AR MemB(1536)

Fig 13

S

Q

R

Int Sig: TARC

Fig 53

DDB: CB1 Trip AR MemC(1537)

Fig 13

Int Sig: RESPRMEM

Fig 14,15

Fig 13 Int Sig: TARANY

Fig 14

Fig 14

Fig 14

Fig 13

Fig 13

Fig 13

DDB: CB2 Trip AR MemA(1499)

DDB: CB2 Trip AR MemB(1500)

DDB: CB2 Trip AR MemC(1501)

DDB: CB1 Trip AR MemA(1535)

DDB: CB1 Trip AR MemB(1536)

DDB: CB1 Trip AR MemC(1537)

1

1

1 Int Sig: TMEMANY

Fig 20,21

1

&

2

Int Sig: TMEM 1Ph

Fig 16,19,55

Int Sig:TMEM 2/3Ph

Fig 16,53,55

Int Sig: TMEM 3Ph

Fig 21

P4108ENa

Figure AR-156 - CB1 1pole / 3-pole trip + AR initiation

P54x/EN OP/Nd5 Page 5-267

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

NUM CBs :

CB1 Only/

CB2 Only/

Both CB1

&CB2

CB2 Only

BothCB1&CB2

1

Fig 11 Int Sig: Init AR

DDB: CB2 Trip OutputA(1601)

DDB: CB2 Ext Trip A(539)

DDB: CB2 Ext Trip 3Ph(538)

DDB: CB2 Trip OutputB(1602)

DDB: CB2 Ext Trip B(540)

&

&

&

1

1

DDB: CB2 Trip OutputC(1603)

DDB: CB2 Ext Trip C(541)

Fig 13 Int Sig: RESPRMEM

1

Fig 14

Fig 14

Fig 14

Fig 14

DDB: CB2 Trip AR MemA(1499)

DDB: CB2 Trip AR MemB(1500)

DDB: CB2 Trip AR MemC(1501)

1

&

2

2 Int Sig:CB2 TAR2/3 PH

Fig 54

S

Q

R

Int Sig: CB2 TARA

Fig 14,54

DDB: CB2 Trip AR MemA(1499)

Fig 13

S

R

Q

Int Sig: CB2 TARB

Fig 14,54

DDB: CB2 Trip AR MemB(1500)

Fig 13

S

Q

R

Int Sig: CB2 TARC

Fig 14,54

DDB: CB2 Trip AR MemC(1501)

Fig 13

Int Sig: CB2 TMEM 1Ph

Fig 17,19,56

Int Sig:CB2 TMEM 2/3Ph

Fig 17,54,56

Int Sig: CB2 TMEM 3Ph

Fig 21

P4109ENa

Figure AR-157 - CB2 1 pole / 3-pole trip + AR initiation

Page 5-268 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 16 DDB: AR Start(1541)

DDB: Trip Inputs A(530)

DDB: Ext Fault APh(1508)

DDB: Trip Inputs B(531)

DDB: Ext Fault BPh(1509)

DDB: Trip Inputs C(532)

DDB: Ext Fault CPh(1510)

Fig 13

Int Sig: ResPRMEM

1

1

1

Figure AR-158 - 1Ph, 2Ph & 3Ph fault memory

&

&

&

Fig 15

S

Q

R

S

Q

R

S

Q

R

(OP) 5 Operation

=2

&

Int Sig: FLTMEM 2P

Fig 55,56

Int Sig: FLTMEM 3P

Fig 55,56

P4110Ena

P54x/EN OP/Nd5 Page 5-269

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 11

DDB: CB2 Ext Trip A (539)

DDB: CB2 Ext Trip B(540)

DDB: CB2 Ext Trip C(541)

DDB: CB2 Ext Trip 3Ph(538)

Int Sig: Init AR

DDB: CB1 Ext TripA(535)

DDB: CB1 Ext TripB (536)

DDB: CB1 Ext TripC (537)

DDB: CB1 Ext Trip 3Ph(534)

Fig 3

Fig 16

Fig 16

Int Sig: CB1 OpAny

DDB: CB1 ARIP(1544)

DDB:AR START(1541)

Fig 13

Fig 13

Fig 3

Fig 9

Fig 9

Fig 32

Fig 8

Fig 36

DDB: Set CB1 Close(1565)

DDB:CB1 Closed 3ph(907)

Int Sig: TMEM 2/3Ph

Int Sig: TMEM 1Ph

Int Sig: CB1Op2/3P

Int Sig: CB1L3 PAROK

Int Sig: CB1F3 PAROK

DDB: Inhibit AR (1420)

DDB: CB1 LO Alarm(860)

DDB: CB1 NOAR (1528)

Int Sig: CB1 ARSUCC

&

Fig 35

Fig 8

Int Sig: CBARCancel

DDB: Leader CB1(1530)

Fig 8 DDB: Follower CB1(1432)

1

&

&

1

&

1

1

1

&

1

Fig 16

&

1

1

S

Q

R

Fig 17 DDB: CB2 ARIP(1435)

Figure AR-159 - CB1 Auto-reclose in progress

DDB: AR START(1541)

Fig 15,17,18,22,24,25,27,28,29,37,38

&

&

1

DDB: CB 1 ARINIT (1543)

Fig 18,22,55

DDB: CB 1 ARIP (1544)

Fig 4,7,10,20,32,35,41,43,55

DDB: ARIP(1542)

Fig 7,8,13,18,19,22,32 , 33,55,56

Int Sig: CB1 LARIP

Fig 19,21,35,55

Int Sig: CB1 FARIP

Fig 19,21,35,55

P4111Ena

Page 5-270 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 17

Fig 11 Int Sig: Init AR

DDB: CB2 Ext Trip A(539)

DDB: CB2 Ext Trip B(540)

DDB: CB2 Ext Trip C (541)

DDB: CB2 Ext Trip 3Ph(538)

Fig 3

Fig 17

Fig 16

Int Sig: CB2OpAny

DDB: CB2 ARIP(1435)

DDB: AR START(1541)

&

&

Fig 33 DDB: Set CB2 Close(1449)

DDB: CB2 Closed 3ph(915)

Fig 14

Fig 14

Fig 3

Fig 9

Fig 9

Fig 8

Fig 36

Fig 35

Int Sig:CB2 TMEM 2/3Ph

Int Sig: CB2 TMEM 1Ph

Int Sig: CB2Op2/3P

Int Sig: CB2L3PAROK

Int Sig: CB2F3PAROK

DDB: BAR(448)

DDB: CB2 LO Alarm(1599)

DDB: CB2 NOAR(1429)

Int Sig: CB2 ARSUCC

Int Sig: CBARCancel

&

1

1

1

&

&

1

1

&

Fig 8

Fig 8

DDB: Leader CB2(1431)

DDB: Follower CB2(1433)

1

1

S

Q

R

Figure AR-160 - CB2 Auto-reclose in progress

(OP) 5 Operation

&

&

DDB: CB2 ARINIT(1434)

Fig 18,22,55

DDB: CB2 ARIP(1435)

Fig 4,7,10,16,20,33,35,42,44,56

Int Sig: CB2 LARIP

Fig 19,21,35,56

Int Sig: CB2 FARIP

Fig 19,21,35,56

P4112Ena

P54x/EN OP/Nd5 Page 5-271

(OP) 5 Operation

Fig 16

Fig 17

Fig 16

DDB: CB1 ARINIT(1543)

DDB: CB2 ARINIT(1434)

DDB: ARIP(1542)

Fig 16 DDB: AR START(1541)

Fig 24

Fig 18

DDB: 1P DTime(1554)

DDB: Seq Counter=1(847)

Fig 16 DDB: ARIP(1542)

Setting:

AR Shots

Fig 20

Fig 16

Fig 18

Int Sig:Prot Re-op

DDB: AR START(1541)

DDB: Seq Counter=0(846)

Figure AR-161 - Sequence counter

P544/P546 CB Control and AR Figures (AR Figures)

&

1

Fig 18

&

&

1

& Int Sig: SC Increment

SEQUENCE COUNTER

(1) Increment on Rising

Edge

(3) Reset on falling Edge

AR Shot:1/2/3/4

DDB: Seq Counter=0(846)

Fig 9,18

DDB: Seq Counter=1(847)

Fig 9,10,18,20,26,28,41, 42,45,46,47,48

DDB: Seq Counter=2(848)

Fig 10,26,41,42

DDB: Seq Counter=3(849)

Fig 10,26,41,42

DDB: Seq Counter=4(850)

Fig 10,26,41,42

DDB: Seq Counter=5(851)

DDB: Seq Counter>Set(1546)

Fig 55,56

Int Sig:SCCountoveqShots

& S

R

Q Int Sig: LastShot

Fig 20,55,56

P4113Ena

Page 5-272 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 16

Fig 20

Fig 16

Fig 9

Fig 13

Int Sig: CB1L 3PAR

Int Sig: CB2L 3PAR

DDB: ARIP(1542)

Int Sig:RESETL-F

Int Sig: CB1L ARIP

Int Sig:CB1L SPAROK

Int Sig:TMEM 1PH

Fig 16

Fig 21

Int Sig: CB1L ARIP

Int Sig: CB1L 3PAR

Fig 17

Fig 9

Fig 15

Int Sig: CB2L ARIP

Int Sig:CB2L SPAROK

Int Sig:CB2 TMEM 1PH

Fig 17

Fig 9

Int Sig: CB2L ARIP

Fig 21 Int Sig: CB2L 3PAR

Fig 19 Int Sig: CB2L SPAR

Fig 16 Int Sig: CB1F ARIP

Int Sig:CB1F SPAROK

Fig 13 Int Sig:TMEM 1PH

Fig 16 Int Sig: CB1F ARIP

Fig 21 Int Sig: CB1F 3PAR

Fig 21 Int Sig: CB2L 3PAR

Fig 19 Int Sig: CB1L SPAR

Fig 17 Int Sig: CB2F ARIP

Fig 9 Int Sig:CB2F SPAROK

Fig 15 Int Sig:CB2 TMEM 1PH

Fig 17

Fig 21

Fig 21

Int Sig: CB2F ARIP

Int Sig: CB2F 3PAR

Int Sig: CB1L 3PAR

&

1

&

1

&

1

&

1

1

Fig 19

S

Q

R

S

Q

R

S

Q

R

S

Q

R

Figure AR-162 - Single phase AR cycle selection

(OP) 5 Operation

1

S

Q

R

Int Sig: LeaderSPAR

Fig 35

Int Sig: CB1L SPAR

Fig 24

Int Sig: CB2L SPAR

Fig 24

Int Sig: CB1F SPAR

Fig 27,28,32

1 DDB: CB1 AR 1p InProg(845)

Fig 62

Int Sig: CB2F SPAR

Fig 27,28,33

1 DDB: CB2 AR 1p InProg(855)

Fig 62

P4114Ena

P54x/EN OP/Nd5 Page 5-273

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 13 Int Sig: TMEM ANY

Fig 13 Int Sig: TAR ANY

Fig 24 DDB: 1P DTime(1554)

& 0

0.02

Fig 20

&

&

1

&

Discrim T t

0

&

Fig 20 Int Sig: Prot Re-Op

Fig 18 DDB: Seq Counter=1(847)

&

Fig 18 Int Sig:LastShot 0

0.02

& S

Q

R

Fig 55

Fig 56

Fig 32

DDB: CB1 AR Lockout(306)

DDB: CB2 AR Lockout(328)

Fig 16

Int Sig: SET CB1 CL

DDB: CB1 Closed 3ph(907)

DDB: CB1 ARIP(1544)

&

1

0

0.02

1

&

Fig 33 0

0.02

&

Int Sig: SET CB2CL

DDB: CB2 Closed 3ph(915)

DDB: CB2 ARIP(1435)

&

1

Fig 17

Figure AR-163 - Protection re-operation + evolving fault + persistent fault

&

Int Sig:Prot Re-op

Fig 18,32,33,35,55,56

Int Sig:RESETL-F

Fig 7,8,19

Int Sig: Evolve Lock

Fig 55,56

DDB: Evolve 3ph(1547)

Fig 21,55,56

DDB: CB1 Failed AR(1550)

DDB: CB2 Failed AR(1441)

P4115Ena

Page 5-274 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 21

Fig 16 Int Sig: CB1L ARIP

Fig 9

Fig 20

Fig 13

Fig 3

Fig 13

Fig 9

Int Sig: CB1L 3PAROK

DDB: Evolve 3ph(1547)

Int Sig: TMEM 3P

Int Sig: CB1 OP 2/3P

Int Sig: TMEM ANY

Int Sig: CB1L SPAROK

Fig 17 Int Sig: CB2L ARIP

Fig 9

Fig 15

Fig 3

Int Sig: CB2L 3PAROK

Int Sig: CB2 TMEM 3P

Int Sig: CB2 OP 2/3P

Fig 9 Int Sig: CB2L SPAROK

Fig 16 Int Sig: CB1F ARIP

Fig 9 Int Sig: CB1F 3PAROK

Fig 3 Int Sig: CB1 OP 2/3P

Fig 9 Int Sig: CB1F SPAROK

Fig 17 Int Sig: CB2F ARIP

Fig 9 Int Sig: CB2F 3PAROK

Fig 3 Int Sig: CB2 OP 2/3P

Fig 9 Int Sig: CB2F SPAROK

&

&

&

&

Figure AR-164 - Three phase AR cycle selection

1

1

1

1

&

S

Q

R

& S

Q

R

& S

Q

R

&

S

Q

R

(OP) 5 Operation

Int Sig: CB2L3PAR

Fig 19,25,26,33,39

1 DDB: CB2 AR 3p InProg(1411)

Int Sig: CB1F3PAR

Fig 19,27,28,32

P4116Ena

Int Sig: CB1L3PAR

Fig 19,25,26,32,40

1 DDB: CB1 AR 3p InProg(844)

Int Sig: CB2F3PAR

Fig 19,27,28,33

P54x/EN OP/Nd5 Page 5-275

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

DT Start by Prot:

Pr AR Disable/Pr

ProtOp/Pr ProtRes

Fig 16

Fig 24

Fig 25

Fig 16

Fig 16

Fig 17

DDB: AR START(1541)

Int Sig: OKTimeSP

DDB: OKTIME 3P(1555)

DDB: ARIP(1542)

DDB: CB1 ARINIT(1543)

DDB: CB2 ARINIT(1434)

Pr AR Disable

Pr ProtOp

Pr ProtRes

1

1

S

R

Q

0

0.02

Fig 22

&

&

&

1

1

& DDB: DTOK All(1551)

Fig 24,25

S

Q

R

Set Dead

Line time t

0

Int Sig: DeadLineLockout

Fig 55,56

Setting:

3PDT Start When LD:

Enabled/Disabled

DDB: Dead Line(889)

DDB: CB1 AR 1p InProg(845)

Disabled

Enabled

DDB: CB2 AR 1p InProg(855)

Setting:

DT Start by CB Op :

Enabled/Disabled

Fig 3

Fig 3

Int Sig: CB1OP 1P

Int Sig: CB2OPANY

Disabled

Enabled

DDB: CB1 Open 3ph(903)

DDB: CB2 Open 3ph(911)

Fig 3

Fig 3

Int Sig: CB2OP 1P

Int Sig: CB1OPANY

DDB: CB2 Open 3ph(911)

DDB: CB1 Open 3ph(903)

Setting:

NUM CBs :

CB 1 Only

CB 2 Only

Both CB 1&CB2

1

1

1

1

1

&

1

&

&

&

&

&

&

&

Figure AR-165 - Dead time start enable

1

1

1

1

1

DDB: DTOK CB1L 1P(1552)

Fig 24

DDB: DTOK CB1L 3P(1553)

Fig 25

DDB: DTOK CB2L 1P(1442)

Fig 24

DDB: DTOK CB2L 3P(1443)

Fig 25

P4117Ena

Page 5-276 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 19

Fig 22

Int Sig: CB1 LSPAR

DDB: DTOK CB1L 1P( 1552)

Fig 19

Fig 22

Fig 18

Fig 22

Fig 24

Int Sig: CB2 LSPAR

DDB: DTOK CB2L 1P( 1542)

DDB: DTOK All( 1551)

Int Sig: SPDTCOMP

Setting:

Pr ProtRes

ProtOp/ Pr ProtRes

Fig 16

Fig 19

Fig 19

Fig 18

Fig 3

Fig 3

Fig 16

DDB: AR START( 1541)

Int Sig: CB1 LSPAR

Int Sig: CB2 LSPAR

DDB: Seq Counter=1( 847)

Int Sig: CB1OP2/3P

Int Sig: CB2OP2/3P

DDB: AR START( 1541)

Fig 19

Int Sig: CB1 LSPAR

Fig 19

Int Sig: CB2 LSPAR

Logic 1

Logic 1

&

1

&

&

&

&

Fig 24

1

&

1 PDTIME t

0

&

1

1

R

S

Q

& Int Sig: OKTimeSP

Fig 22

Int Sig: SPDTCOMP

Fig 24

Fig 19

Fig 19

Int Sig: CB1 LSPAR

Int Sig: CB2 LSPAR

&

&

&

&

1

Int Sig: CB1 SPDTCOMP

Fig 32,34,39

DDB:1 P DTime( 1554)

Fig 18,20

Int Sig: CB2 SPDTCOMP

Fig 33,34,40

P4119ENa

Figure AR-166 - Single phase AR lead CB dead time

P54x/EN OP/Nd5 Page 5-277

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 25

Fig 21

Fig 22

Int Sig: CB1L3 PAR

DDB: DTOK CB1L 3P( 1553)

Fig 21

Fig 22

Int Sig: CB2L3 PAR

DDB: DTOK CB2L 3P( 1543)

Fig 22

Fig 26

DDB: DTOK All( 1551)

Int Sig: 3 PDTCOMP

Setting:

Pr ProtRes

ProtOp/ Pr ProtRes

Fig 16

DDB: AR START( 1541)

&

&

&

1

&

1

Fig 21

Fig 21

Int Sig: CB1L3 PAR

Int Sig: CB2L3 PAR

1

Logic 1

&

Fig 21 Int Sig: CB1L3 PAR

Logic 1

&

Fig 21 Int Sig: CB2L3 PAR

Figure AR-167 - Three phase AR lead CB dead time enable

1

R

S

Q

& DDB: OK Time 3P( 1555)

Fig 22,26,32,33,34,39,40

P4120ENa

Page 5-278 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 25

Fig 18

DDB: OKTIME3P(1555)

DDB: Seq Counter=1(847)

Fig 18 DDB: Seq Counter=2(848)

Fig 18

DDB: Seq Counter=3(849)

Fig 18

DDB: Seq Counter=4(850)

&

&

&

&

Fig 26 t

0

3PDTIME1

& t

0

DTIME2

& t

0

DTIME3

& t

0

DTIME4

&

Fig 26

Fig 21

Int Sig: 3PDTCOMP

Int Sig: CB1L3PAR

Fig 21 Int Sig: CB2L3PAR

&

&

&

&

Figure AR-168 - Three phase AR lead CB dead time

(OP) 5 Operation

1 Int Sig: 3PDTCOMP

Fig 25,26

DDB: 3P DTime1(1556)

DDB: 3P DTime2(1557)

DDB: 3P DTime3(1558)

DDB: 3P DTime4(1559)

1 DDB: 3P Dead Time IP(853)

DDB: CB13PDTIME(1560)

Int Sig: CB13PDTCOMP

Fig 32,34,39

DDB: CB23PDTIME(1444)

Int Sig: CB23PDTCOMP

Fig 33,34,40

P4121ENa

P54x/EN OP/Nd5 Page 5-279

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

BF if Lfail Cls:

Enabled/Disabled

Fig 43 DDB: Control CloseCB1(839)

Fig 19 Int Sig: CB2FSPAR

Fig 21 Int Sig: CB2F3PAR

Fig 44

Fig 16

DDB: CB2 Closed 3ph(915)

DDB: CB2CloseFail(325)

DDB: AR Start(1541)

Fig 55 DDB: CB1 AR Lockout(306)

DDB: CB1 Closed 3ph(907)

Disabled

1

Fig 19 Int Sig: CB2FSPAR

Logic 1

&

Logic 1

&

Fig 21 Int Sig: CB2F3PAR

1

&

1

Fig 27

&

1

S

Q

RD

& DDB: En CB2 Follower(1445)

Fig 28,29

Fig 44 DDB: Control CloseCB2(841)

Fig 19

Fig 21

Int Sig: CB1FSPAR

Int Sig: CB1F3PAR

DDB: CB1 Closed 3ph(907)

DDB: CB1CloseFail(303) Fig 43

Fig 16

Fig 56

DDB: AR Start(1541)

DDB: CB2 AR Lockout(328)

DDB: CB2 Closed 3ph(915)

1

&

1

&

1

S

Q

RD

Fig 19 Int Sig: CB1FSPAR

Logic 1

&

Logic 1

&

1

Fig 21 Int Sig: CB1F3PAR

Figure AR-169 - Follower AR enable (for Software Versions BEFORE H1)

& DDB: En CB1 Follower(1488)

Fig 28,29

P4122ENa

Page 5-280 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Setting:

Enabled/ Disabled

Disabled

DDB: AR CB1 Unhealthy (307)

DDB: AR CB1 No C/S (308)

1

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

Fig 43

Fig 19

Fig 21

DDB: Control CloseCB1( 839)

Int Sig: CB2 FSPAR

Int Sig: CB2F3 PAR

Fig 44

Fig 16

DDB: CB 2 Closed 3ph( 915)

DDB: CB2 CloseFail( 325)

DDB: AR Start (1541)

Fig 55 DDB: CB 1 AR Lockout ( 306)

DDB: CB 1 Closed 3ph( 907)

Fig 19 Int Sig: CB2 FSPAR

1

Logic 1

&

Logic 1

&

&

Fig 21 Int Sig: CB2F3 PAR

1

1

&

1

&

Fig 27

1

S

Q

RD

&

DDB: AR CB2 Unhealthy (329)

DDB: AR CB2 No C/S (330)

1

Fig 44

Fig 19

Fig 21

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

DDB: Control Close CB2 (841)

Int Sig: CB1 FSPAR

Int Sig: CB1F3 PAR

Fig 43

Fig 16

Fig 56

DDB: CB 1 Closed 3ph( 907)

DDB: CB1 CloseFail( 303)

DDB: AR Start ( 1541)

DDB: CB 2 AR Lockout ( 328)

DDB: CB 2 Closed 3ph( 915)

Fig 19 Int Sig: CB1 FSPAR

1

Logic 1

&

Logic 1

&

&

Fig 21

Int Sig: CB1F3 PAR

1

1

&

1

&

1

S

Q

RD

Figure AR-170 - Follower AR enable (for Software Versions H1 and later)

&

DDB: En CB2 Follower (1445)

Fig 28,29

DDB: En CB1 Follower (1488)

Fig 28,29

P4122ENb

P54x/EN OP/Nd5 Page 5-281

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

1

&

Fig 28

Setting:

Dynamic F/ L :

Enabled/ Disable

Int Sig: CB1 LFRC

Int Sig: CB2 LFRC

Fig 3

Fig 19

Fig 27

Int Sig: CB1OP1P

Int Sig: CB1 FSPAR

DDB: En CB1 Follower( 1488)

Enabled

1

&

1

&

Fig 3

Fig 19

Fig 27

Fig 28

Fig 18

Int Sig: CB2OP1P

Int Sig: CB2 FSPAR

DDB: En CB2 Follower( 1445)

DDB:1 PF TComp( 1561)

DDB: Seq Counter=1( 847)

&

1 R

S

Q

Fig 16

Fig 19

Fig 19

Fig 3

Fig 3

DDB: AR START( 1541)

Int Sig: CB1 FSPAR

Int Sig: CB2 FSPAR

Int Sig: CB1OP2/3 P

Int Sig: CB2OP2/3P

Fig 19

Int Sig: CB1 FSPAR

&

FOLL Time t

0

Fig 19 Int Sig: CB2 FSPAR

1 DDB:1 PF TComp( 1561)

Fig 28

&

&

&

&

1

Int Sig: CB1 SPFTCOMP

Fig 32,34,39

Int Sig: CB2 SPFTCOMP

Fig 33,34,40

P4123ENa

Figure AR-171 - Single phase follower time

Page 5-282 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Setting:

Dynamic F/L :

Enabled/Disable

Int Sig: CB1 LFRC

Int Sig: CB2 LFRC

Fig 21

Fig 27

DDB: CB1 Open 3ph(903)

Int Sig: CB1F3PAR

DDB: En CB1 Follower(1488)

Enabled

1

&

DDB: CB2 Open 3ph(911)

Int Sig: CB2F3PAR Fig 21

Fig 27

Fig 29

DDB: En CB2 Follower(1445)

Int Sig: 3PFOLLTCOMP

Fig 16

Fig 21

Fig 21

DDB: AR START(1541)

Int Sig: CB1F3PAR

Int Sig: CB2F3PAR

&

1

1

1

&

S

Q

R

Fig 29

&

FOLL Time t

0

1 DDB: 3PF TComp(1562)

Fig 29

Fig 21 Int Sig: CB1F3PAR

Fig 21 Int Sig: CB2F3PAR

&

&

&

&

1

Int Sig: CB13PFTCOMP

Fig 32,34,39

DDB: 3P Follower Time(1447)

Int Sig: CB23PFTCOMP

Fig 33,34,40

P4124ENa

Figure AR-172 - Three phase follower time

P54x/EN OP/Nd5 Page 5-283

(OP) 5 Operation

Fig 55

DDB: Any Trip(522)

DDB: CB1 AR Lockout(306)

DDB: CB1HEALTHY(436) *

Fig 24

Fig 3

Fig 21

IntSig: CB1SPDTCOMP

IntSig: CB1OP1P

Fig 26

Fig 45

Fig 45

Fig 25

IntSig: CB1L3PAR

DDB: CB1 Open 3ph(903)

IntSig: CB13PDTCOMP

DDB: CB1LSCOK(1573)

DDB: CB1FASTSCOK(1572)

DDB: OKTIME3P(1555)

Fig 19

Fig 3

Fig 28

IntSig: CB1FSPAR

IntSig: CB1OP1P

IntSig: CB1SPFTCOMP

Fig 21

Fig 29

Fig 47

IntSig: CB1F3PAR

DDB: CB1 Open 3ph(903)

IntSig: CB13PFTCOMP

DDB: CB1F SCOK (1491)

&

&

&

1

&

&

&

&

P544/P546 CB Control and AR Figures (AR Figures)

Fig 32

* Note

If not mapped in PSL are defaulted high.

1

Fig 55

Fig 20

Fig 16

DDB: CB1 AR Lockout(306)

IntSig: PROTREOP

DDB: ARIP(1542)

Fig 16

DDB: CB1 ARIP(1544)

DDB: CB1 Closed 3ph(907)

Logic 1

Figure AR-173 - CB Auto close

&

&

1

S

Q

R

PULSE 0.1S

DDB:Auto Close CB1(854)

Fig 35,43

DDB:Set CB1 Close(1565)

Fig 16,20,34,41,55,56

DDB:CB1CONTROL(1566)

P4127ENa

Page 5-284 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 56

DDB: Any Trip(522)

DDB: CB2 AR Lockout(328)

DDB: CB2HEALTHY(437) *

Fig 24

Fig 3

IntSig: CB2SPDTCOMP

IntSig: CB2OP1P

Fig 21

Fig 26

Fig 46

IntSig: CB2L3PAR

DDB: CB2 Open 3ph(911)

IntSig: CB23PDTCOMP

DDB: CB2LSCOK(1455)

Fig 46

Fig 25

DDB: CB2FASTSCOK(1454)

DDB: OKTIME3P(1555)

Fig 19

Fig 3

Fig 28

IntSig: CB2FSPAR

IntSig: CB2OP1P

IntSig: CB2SPFTCOMP

Fig 21

Fig 29

Fig 48

IntSig: CB2F3PAR

DDB: CB2 Open 3ph(911)

IntSig: CB23PFTCOMP

DDB: CB2FSCOK(1456)

&

&

&

&

1

&

&

&

Fig 33

1

(OP) 5 Operation

* Note

If not mapped in PSL are defaulted high.

Fig 56

Fig 20

Fig 16

DDB: CB2 AR Lockout(328)

IntSig: PROTREOP

DDB: ARIP(1542)

Fig 17 DDB: CB2 ARIP(1435)

DDB: CB2 Closed 3ph(915)

Logic 1

Figure AR-174 - CB2 Auto close

&

&

1

S

Q

R

PULSE 0.1S

DDB: Auto Close CB2(1448)

Fig 35,44

DDB: Set CB2 Close(1449)

Fig 17,20,34,42,55,56

DDB: CB2CONTROL(1450)

P4128ENa

P54x/EN OP/Nd5 Page 5-285

(OP) 5 Operation

Fig 24

Fig 28

IntSig: CB1SPDTCOMP

IntSig: CB1SPFTCOMP

Fig 32 DDB: Set CB1 Close(1565)

Fig 26

Fig 45

Fig 45

IntSig: CB13PDTCOMP

DDB: CB1LSCOK(1573)

DDB: CB1FASTSCOK(1572)

DDB: OKTIME3P(1555) Fig 25

Fig 29

Fig 47

IntSig: CB13PFTCOMP

DDB: CB1F SCOK(1491)

Fig 24

Fig 28

IntSig: CB2SPDTCOMP

IntSig: CB2SPFTCOMP

Fig 33 DDB: Set CB2 Close(1449)

Fig 26

Fig 46

Fig 46

Fig 25

IntSig: CB23PDTCOMP

DDB: CB2LSCOK(1455)

DDB: CB2FASTSCOK(1454)

DDB: OKTIME3P(1555)

Fig 29

Fig 48

IntSig: CB23PFTCOMP

DDB: CB2FSCOK(1456)

P544/P546 CB Control and AR Figures (AR Figures)

&

&

&

1

&

&

&

1

Fig 34

&

S

Q

R

IntSig: SETCB1SPCL

Fig 35,36

&

S

Q

R

IntSig: SETCB13PCL

Fig 35,36

1

1

&

S

Q

R

IntSig: SETCB2SPCL

Fig 35,36

&

S

Q

R

IntSig: SETCB23PCL

Fig 35,36

P4129ENa

Figure AR-175 - Prepare reclaim initiation

Page 5-286 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 35

Fig 34

Fig 17

Fig 34

Fig 34

Fig 32

Fig 16

IntSig: SETCB1SPCL

IntSig: CB2FARIP

IntSig: SETCB2SPCL

IntSig: SETCB23PCL

DDB: Auto Close CB1(854)

IntSig: CB1LARIP

Fig 34

Fig 16

Fig 34

Fig 34

Fig 33

Fig 17

IntSig: SETCB2SPCL

IntSig: CB1FARIP

IntSig: SETCB1SPCL

IntSig: SETCB13PCL

DDB: Auto Close CB2(1448)

IntSig: CB2LARIP

Fig 7

Fig 34

Fig 7

Fig 34

Setting:

Dynamic F/L :

Enabled/Disable

IntSig: CB2LFRC

IntSig: SETCB1SPCL

IntSig: CB1LFRC

IntSig: SETCB2SPCL

Enabled

Fig 7

Fig 34

IntSig: CB2LFRC

IntSig: SETCB13PCL

Fig 7

Fig 34

Fig 19

IntSig: CB1LFRC

IntSig: SETCB23PCL

IntSig: LeaderSPAR

Fig 34 IntSig: SETCB13PCL

Fig 17

Fig 34

IntSig: CB2FARIP

IntSig: SETCB23PCL

Fig 32

Fig 16

DDB: Auto Close CB1(854)

IntSig: CB1LARIP

1

1

1

&

&

&

&

&

1

&

1

&

&

&

1

&

Fig 34

Fig 16

Fig 34

IntSig: SETCB23PCL

IntSig: CB1FARIP

IntSig: SETCB13PCL

Fig 33

Fig 17

DDB: Auto Close CB2(1448)

IntSig: CB2LARIP

Fig 35

Fig 35

Fig 20

DDB: 1P Reclaim Time(1567)

DDB: 3P Reclaim Time(1569)

Int Sig:Prot Re-op

Fig 16

DDB: CB1 Closed 3ph(907)

DDB: CB1 ARIP(1544)

Fig 17

DDB: CB2 Closed 3ph(915)

DDB: CB2 ARIP(1435)

Figure AR-176 - Reclaim time

1

Logic 1

&

&

1

&

Logic 1

Close Pulse time t

0

&

&

1

&

1 &

SPAR RECLAIM TIME t

DDB: 1P Reclaim TComp(1568)

0

Fig 36

& DDB: 1P Reclaim Time(1567)

1

&

3PAR RECLAIM TIME t

DDB: 3P Reclaim TComp(1570)

0

Fig 36

& DDB: 3P Reclaim Time(1569)

& Int Sig: CBARCancel

Fig 16,17

P4130ENa

P54x/EN OP/Nd5 Page 5-287

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 35

Fig 35

Fig 34

Fig 3

DDB: 3P Reclaim TComp(1570)

DDB: 1P Reclaim TComp(1568)

IntSig: SETCB1SPCL

IntSig: CB1OP1P

DDB: CB1 Closed 3ph(907)

&

1

0

0.02S

&

1

Fig 37 IntSig: RESCB1ARSUCC

Fig 35

Fig 35

DDB: 3P Reclaim TComp(1570)

DDB: 1P Reclaim TComp(1568)

Fig 34

Fig 3

IntSig: SETCB13PCL

IntSig: CB1OP2/3P

DDB: CB1 Closed 3ph(907)

&

1

0

0.02S

&

1

S

R

Q

Fig 36

& S

Q

RD

S

Q

R

& S

Q

RD

DDB: CB1 Succ 1P AR(1571)

Fig 41

1 IntSig: CB1ARSUCC

Fig 16,37

DDB: CB1 Succ 3P AR(852)

Fig 41

Fig 35

Fig 35

DDB: 3P Reclaim TComp(1570)

DDB: 1P Reclaim TComp(1568)

Fig 34

Fig 3

IntSig: SETCB2SPCL

IntSig: CB2OP1P

DDB: CB2 Closed 3ph(915)

&

1

0

0.02S

&

1

Fig 38 IntSig: RESCB2ARSUCC

Fig 35

Fig 35

DDB: 3P Reclaim TComp(1570)

DDB: 1P Reclaim TComp(1568)

Fig 34

Fig 3

IntSig: SETCB23PCL

IntSig: CB2OP2/3P

DDB: CB2 Closed 3ph(915)

&

1

0

0.02S

&

1

S

R

Q

&

S

Q

RD

S

Q

R

& S

Q

RD

DDB: CB2 Succ 1P AR(1451)

Fig 42

1 IntSig: CB2ARSUCC

Fig 17,38

DDB: CB2 Succ 3P AR(1452)

Fig 42

P4131ENa

Figure AR-177 - Successful auto-reclose signals

Page 5-288 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 3 IntSig: CB1OPANY

Fig 16 DDB: AR START(1541)

Setting:

Res AROKby UI:

Enabled/Disabled

COMMAND:

Reset AROK Ind

Setting:

Res AROK by NoAR:

Enabled/Disabled

Enabled

Disabled

Yes

No

Enabled

Disabled

Fig 5 IntSig: AR DISABLED

Setting:

NUM CBs :

CB 1 Only

CB 2 Only

Both CB1&CB2

1

&

&

Setting:

Res AROK by Ext

Enabled/Disabled

Enabled

Disabled

Fig 36

DDB: Ext Rst CB1 AROK(1517)

Setting:

Res AROK by TDly:

Enabled/Disabled

Enabled

Disabled

IntSig: CB1ARSUCC

AROK Reset Time t

0

Figure AR-178 - Reset CB1 successful AR indication

&

&

Fig 37

(OP) 5 Operation

1 IntSig: RESCB1ARSUCC

Fig 36

P4132ENa

P54x/EN OP/Nd5 Page 5-289

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 3

Fig 16

IntSig: CB2OPANY

DDB: AR START(1541)

Setting:

Res AROKby UI:

Enabled/Disabled

Enabled

Disabled

COMMAND:

Reset AROK Ind

Setting:

Res AROK by NoAR:

Enabled/Disabled

Fig 5 IntSig: AR DISABLED

Setting:

NUM CBs :

CB 1 Only

CB 2 Only

Both CB1&CB2

Yes

No

Enabled

Disabled

1

&

&

Setting:

Res AROK by Ext

Enabled/Disabled

Enabled

Disabled

&

DDB: Ext Rst CB2 AROK(1417)

Setting:

Res AROK by TDly:

Enabled/Disabled

Enabled

Disabled

Fig 36 IntSig: CB2ARSUCC

AROK Reset Time t

0

Figure AR-179 - Reset CB2 successful AR indication

&

Fig 38

1 IntSig: RESCB2ARSUCC

Fig 36

P4133ENa

Page 5-290 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 21

Fig 25

Fig 45

Fig 24

Fig 28

Fig 26

Fig 29

IntSig: CB1L3PAR

DDB: OK Time 3P(1555)

DDB: CB1 Fast SCOK(1572)

IntSig: CB1SPDTCOMP

IntSig: CB1SPFTCOMP

IntSig: CB13PDTCOMP

IntSig: CB13PFTCOMP

&

1

Fig 55

DDB: CB1HEALTHY(436) *

DDB: CB1 AR Lockout(306)

DDB: CB1 Closed 3ph(907)

Fig 26

Fig 45

IntSig: CB13PDTCOMP

DDB: CB1L SCOK(1573)

Fig 55 DDB: CB1 AR Lockout(306)

DDB: CB1 Closed 3ph(907)

Fig 29

Fig 47

IntSig: CB13PFTCOMP

DDB: CB1F SCOK(1491)

Fig 55 DDB: CB1 AR Lockout(306)

DDB: CB1 Closed 3ph(907)

&

1

S

RD

Q

&

1

S

RD

Q

1

Fig 39

&

* Note

If not mapped in PSL are defaulted high.

S

RD

Q

CB Healthy Time t

0

DDB: AR CB1 Unhealthy(307)

Fig 7,10,55

1

CB Sys Check Time t

DDB: AR CB1 No C/S(308)

0

Fig 55

P4134ENa

Figure AR-180 - CB healthy & system check timers

P54x/EN OP/Nd5 Page 5-291

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 21

Fig 25

Fig 46

Fig 24

Fig 28

Fig 26

Fig 29

IntSig: CB2L3 PAR

DDB: OK Time 3P( 1555)

DDB: CB2 Fast SCOK( 1454)

IntSig: CB2 SPDTCOMP

IntSig: CB2 SPFTCOMP

IntSig: CB23 PDTCOMP

IntSig: CB23 PFTCOMP

&

1

Fig 56

DDB: CB2 HEALTHY( 437) *

DDB: CB2 AR Lockout(328)

DDB: CB2 Closed 3ph( 915)

Fig 26

Fig 46

IntSig: CB23 PDTCOMP

DDB: CB2 L SCOK( 1455)

Fig 56 DDB: CB2 AR Lockout(328)

DDB: CB2 Closed 3ph( 915)

Fig 29

Fig 48

IntSig: CB23 PFTCOMP

DDB: CB2 FSCOK( 1456)

Fig 56 DDB: CB2 AR Lockout(328)

DDB: CB2 Closed 3ph( 915)

&

1

&

1

S

RD

Q

S

RD

Q

&

Fig 40

* Note

If not mapped in PSL

S

Q

RD

AR CBHealthy Time t

0

DDB: AR CB2 Unhealthy( 329)

Fig 7,10,56

1

1

AR CheckSync Time t

0

DDB: AR CB2 No C/S( 330)

Fig 56

P4135ENa

Figure AR-181 - CB2 healthy & system check timers

Page 5-292 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 41

Fig 32 DDB: Set CB1 Close(1565)

(OP) 5 Operation

Fig 36 DDB: CB1 Succ 1P AR(1571)

Fig 36 DDB: CB1 Succ 3P AR(852)

Fig 18

DDB: Seq Counter=1(847)

Fig 18

DDB: Seq Counter=2(848)

Fig 18

DDB: Seq Counter=3(849)

&

&

&

&

Fig 18

DDB: Seq Counter=4(850)

Fig 16

DDB: CB1 ARIP(1544)

Fig 55 DDB: CB1 AR Lockout(306)

DDB: Ext Rst CB1 Shots(1518)

COMMAND:

Reset CB1shots

Yes /No

Figure AR-182 - AR shots counters

Yes

0

0.02

&

1

CB 1 TOTAL SHOTS

INC

COUNTER

RES

CB 1 SUCCESSFUL

INC

SPAR SHOT 1 COUNTER

RES

CB 1 SUCCESSFUL

INC

3 PAR SHOT1 COUNTER

RES

CB 1 SUCCESSFUL

INC

3 PAR SHOT2 COUNTER

RES

CB 1 SUCCESSFUL

INC

3 PAR SHOT3 COUNTER

RES

CB 1 SUCCESSFUL

INC

3 PAR SHOT4 COUNTER

RES

CB 1 FAILED AR

INC

COUNTER

RES

P4136ENa

P54x/EN OP/Nd5 Page 5-293

(OP) 5 Operation

Fig 33 DDB: Set CB2 Close(1449)

Fig 36 DDB: CB2 Succ 1P AR(1451)

Fig 36 DDB: CB2 Succ 3P AR(1452)

Fig 18 DDB: Seq Counter=1(847)

Fig 18

DDB: Seq Counter=2(848)

Fig 18 DDB: Seq Counter=3(849)

Fig 18 DDB: Seq Counter=4(850)

Fig 17

DDB: CB2 ARIP(1435)

Fig 56 DDB: CB2 AR Lockout(328)

DDB: Ext Rst CB2 Shots(1418)

COMMAND:

Reset CB2shots

Yes /No

Yes

0

0.02

&

1

Figure AR-183 - CB2 AR shots counters

Page 5-294

Fig 42

P544/P546 CB Control and AR Figures (AR Figures)

&

&

&

&

CB 2 TOTAL SHOTS

INC

COUNTER

RES

CB 2 SUCCESSFUL

INC

SPAR SHOT 1 COUNTER

RES

CB 2 SUCCESSFUL

INC

3 PAR SHOT1 COUNTER

RES

CB 2 SUCCESSFUL

INC

3 PAR SHOT2 COUNTER

RES

CB 2 SUCCESSFUL

INC

3 PAR SHOT3 COUNTER

RES

CB 2 SUCCESSFUL

INC

3 PAR SHOT4 COUNTER

RES

CB 2 FAILED AR

INC

COUNTER

RES

P4137ENa

P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Settings:

CB Control by

Disable

Local

Remote

Local & Remote

Opto

Local & Opto

Remote & Opto

Local & Remote & Opto

COMMAND:

UI Trip CB1

DDB: Init Trip CB1( 439)

&

&

Fig 16

Fig 32

DDB: Init Close CB1( 440)

COMMAND:

UI Close CB1

DDB: CB 1 ARIP( 1544)

DDB: Rst CB1 CloseDly( 443)

DDB: Any Trip( 522)

DDB: CB 1 Ext Trip 3Ph( 534)

DDB: CB 1 Ext TripA( 535)

DDB: CB 1 Ext TripB( 536)

DDB: CB 1 Ext TripC( 537)

1

1

1

1

Fig 43

* Note

If not mapped in PSL

Enable opto initiated

CB trip and close

&

Reset

Dominont

Latch

SET: Trip

Pulse Time

R

S

Q t

0

&

&

Reset

Dominont

Latch

R

S

Q

SET: Man

Close Delay t

0

&

1

DDB:CB 1 Trip Fail( 302)

DDB: CB1 CloseinProg(842)

Reset

Dominont

Latch

S

Q

R t

0

SET: Close

Pulse Time

Fig 27

1

& DDB:CB1 CloseFail( 303)

Fig 7,27,55

1

DDB: CB 1 Open 3ph( 903)

DDB: CB 1 Open Aph( 904)

DDB: CB 1 Open Bph( 905)

DDB: CB 1 Open Cph( 906)

DDB: CB 1 Closed 3ph( 907)

DDB: CB 1 Closed Aph(908)

DDB: CB 1 Closed Bph(909)

DDB: CB 1 Closed Cph(910)

DDB: CB1 HEALTHY( 436) *

Fig 51 DDB: CB 1 Man SCOK( 1574)

1

&

1

1

1

Figure AR-184 - CB1 circuit breaker control

1

SET: CB Healthy Time t

&

0

DDB: Man CB1 unhealthy( 304) t

&

0

SET: Check Sync Time

DDB: NoCS CB1 ManClose( 305)

P4138ENa

P54x/EN OP/Nd5 Page 5-295

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

SET:

CB Control by

COMMAND:

UI Trip CB2

DDB: Init Trip CB2(441)

Disable

Local

Remote

Local & Remote

Opto

Local & Opto

Remote & Opto

Local & Remote & Opto

&

Fig 17

Fig 33

DDB: Init Close CB2(442)

COMMAND:

UI Close CB2

DDB: CB2 ARIP(1435)

DDB: Auto Close CB2(1448)

DDB: Rst CB2 CloseDly(1419)

DDB: Any Trip(522)

DDB: Control Trip CB2(840)

DDB: CB2 Ext Trip3Ph(538)

DDB: CB2 Ext TripA(539)

DDB: CB2 Ext TripB(540)

DDB: CB2 Ext TripC(541)

&

1

1

1

1

Fig 44

* Note

If not mapped in PSL are defaulted high.

Enable opto initiated

CB trip and close

DDB: ControlTripCB2(840)

&

Reset

Dominont

Latch

S

Q

R

SET: Trip

Pulse Time t

0

& DDB: CB2 Trip Fail(324)

&

Reset

Dominont

Latch

SET: Man Close

Delay

S

Q

R t

0

&

1

DDB: CB2 Close inProg(1453)

Reset

Dominont

Latch

S

Q

R t

0

DDB:Control CloseCB2(841)

SET: Close

Pulse Time

Fig 27

1

& DDB: CB2CloseFail(325)

Fig 7,27,56

1

DDB: CB2 Open 3ph(911)

DDB:CB2 Open Aph(912)

DDB:CB2 Open Bph(913)

DDB:CB2 Open Cph(914)

DDB: CB2 Closed 3ph(915)

DDB:CB2 Closed Aph(916)

DDB: CB2 Closed Bph(917)

DDB: CB2 Closed Cph(918)

DDB: CB2HEALTHY(437) *

Fig 52 DDB: CB2 Man SCOK(1458)

1

&

1

1

1

1

SET: CB Healthy Time t

&

0 t

&

0

SET: Check Sync Time

DDB:ManCB2unhealthy(326)

DDB: NoCS CB2ManClose(327)

P4139ENa

Figure AR-185 - CB2 circuit breaker control

Page 5-296 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Setting:

CB1L SC ClsNoDly:

Enabled/Disabled

Enabled

Setting:

CB1L SC CS1:

Enabled/Disabled

DDB:CB1 CS1 OK(883)

Setting:

CB1L SC CS2

Enabled/Disabled

DDB:CB1 CS2 OK (884)

Setting:

CB1L SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus1(886)

Setting:

CB1L SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB:Dead Bus1(887)

Setting:

CB1L SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB:Dead Bus1(887)

Setting:

CB1L SC Shot1:

Enabled/Disabled

Fig 18

DDB: Seq Counter=1(847)

Setting:

CB1L SC all:

Enabled/Disabled

DDB: CB1 Ext CS OK (900) *

Enabled

Enabled

Enabled

Enabled

Enabled

Disabled

Disabled

Figure AR-186 - CB1 lead 3PAR system check

&

&

&

&

&

&

&

Fig 45

1

&

1

DDB: CB1FASTSCOK(1572)

Fig 32,34,39

DDB: CB1LSCOK(1573)

Fig 32,34,39

* Note

If not mapped in PSL are defaulted high.

P4140ENa

P54x/EN OP/Nd5 Page 5-297

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

CB2L SC ClsNoDly:

Enabled/Disabled

Enabled

Setting:

CB2L SC CS1:

Enabled/Disabled

DDB:CB2 CS1 OK (1577)

Setting:

CB2L SC CS2

Enabled/Disabled

DDB:CB2 CS2 OK(1463)

Setting:

CB2L SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus2(1461)

Setting:

CB2L SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB: Dead Bus2(1462)

Setting:

CB2L SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Dead Bus2(1462)

Fig 18

Setting:

CB2L SC Shot1:

Enabled/Disabled

DDB: Seq Counter=1(847)

Setting:

CB2L SC all:

Enabled/Disabled

DDB: CB2 Ext CS OK (901) *

Enabled

Enabled

Enabled

Enabled

Enabled

Disabled

Disabled

Figure AR-187 - CB2 lead 3PAR system check

&

&

&

&

&

&

&

Fig 46

1

&

1

DDB: CB2FASTSCOK (1454)

Fig 33,34,40

DDB: CB2LSCOK(1455)

Fig 33,34,40

* Note

If not mapped in PSL are defaulted high.

P4141ENa

Page 5-298 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Setting:

CB1F SC CS1:

Enabled/Disabled

DDB:CB1 CS1 OK(883)

Setting:

CB1F SC CS2

Enabled/Disabled

DDB:CB1 CS2 OK(884)

Setting:

CB1F SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus1(886)

Setting:

CB1F SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB:Dead Bus1(887)

Setting:

CB1F SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB:Dead Bus1(887)

Fig 18

Setting:

CB1F SC Shot1:

Enabled/Disabled

DDB: Seq Counter=1(847)

Setting:

CB1F SC all:

Enabled/Disabled

DDB: CB1 Ext CS OK(900) *

Enabled

Enabled

Enabled

Enabled

Enabled

Disabled

Disabled

Figure AR-188 - CB1 follow 3PAR system check

&

&

&

&

&

&

&

Fig 47

(OP) 5 Operation

1 DDB: CB1F SCOK(1491)

Fig 32,34,39

* Note

If not mapped in PSL are defaulted high.

P4142ENa

P54x/EN OP/Nd5 Page 5-299

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

CB2F SC CS1:

Enabled/Disabled

DDB:CB2 CS1 OK(1577)

Setting:

CB2F SC CS2

Enabled/Disabled

DDB:CB2 CS2 OK(1463)

Setting:

CB2F SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus2(1461)

Setting:

CB2F SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB: Dead Bus2(1462)

Setting:

CB2F SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Dead Bus2(1462)

Fig 18

Setting:

CB2F SC Shot1:

Enabled/Disabled

DDB: Seq Counter=1(847)

Setting:

CB2F SC all:

Enabled/Disabled

DDB: CB2 Ext CS OK(901) *

Enabled

Enabled

Enabled

Enabled

Enabled

Disabled

Disabled

Figure AR-189 - CB2 follow 3PAR system check

&

&

&

&

&

&

&

Fig 48

1 DDB: CB2F SCOK(1456)

Fig 33,34,40

* Note

If not mapped in PSL are defaulted high.

P4143ENa

Page 5-300 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Setting:

CB1M SC CS1:

Enabled/Disabled

DDB:CB1 CS1 OK(883)

Setting:

CB1M SC CS2

Enabled/Disabled

DDB:CB1 CS2 OK(884)

Setting:

CB1M SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus1(886)

Setting:

CB1M SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB:Dead Bus1(887)

Enabled

Enabled

Enabled

Enabled

Setting:

CB1M SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB:Dead Bus1(887)

Setting:

CB1M SC Required:

Enabled/Disabled

DDB: CB1 Ext CS OK(900) *

Enabled

Disabled

&

&

&

&

&

&

Figure AR-190 - CB1 man. close system check

Fig 51

(OP) 5 Operation

1 DDB: CB1 Man SCOK(1574)

Fig 43

* Note

If not mapped in PSL are defaulted high.

P4146ENa

P54x/EN OP/Nd5 Page 5-301

(OP) 5 Operation

Setting:

CB2M SC CS1:

Enabled/Disabled

DDB:CB2 CS1 OK(1577)

Setting:

CB2M SC CS2

Enabled/Disabled

DDB:CB2 CS2 OK(1463)

Enabled

Enabled

Setting:

CB2M SC DLLB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Live Bus2(1461)

Setting:

CB2M SC LLDB:

Enabled/Disabled

DDB: Live Line(888)

DDB: Dead Bus2(1462)

Setting:

CB2M SC DLDB:

Enabled/Disabled

DDB: Dead Line(889)

DDB: Dead Bus2(1462)

Setting:

CB2M SC Required:

Enabled/Disabled

DDB: CB2 Ext CS OK(901) *

Enabled

Enabled

Enabled

Disabled

&

&

&

&

&

&

Figure AR-191 - CB2 man. close system check

P544/P546 CB Control and AR Figures (AR Figures)

Fig 52

1 DDB: CB2 Man SCOK(1458)

Fig 44

* Note

If not mapped in PSL are defaulted high.

P4147ENa

Page 5-302 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 13 IntSig: TAR2/3Ph

DDB: CB1 Open 3ph(903)

DDB: CB1 Closed 3ph(907)

Fig 13

Fig 13

IntSig: TARA

IntSig: TMEM2/3Ph

DDB:CB1 Open Aph(904)

DDB: CB1 Closed 3ph(907)

Fig 13

Fig 13

IntSig: TARB

IntSig: TMEM2/3Ph

DDB:CB1 Open Bph(905)

DDB: CB1 Closed 3ph(907)

Fig 13

Fig 13

IntSig: TARC

IntSig: TMEM2/3Ph

DDB:CB1 Open Cph(906)

DDB: CB1 Closed 3ph(907)

Figure AR-192 - CB1 trip time monitor

S

Q

RD

Fig 53

&

S

Q

RD

& S

Q

RD

&

S

Q

RD

1

& S

Q

RD

&

S

Q

RD

1

& S

Q

RD

& S

RD

Q

1

(OP) 5 Operation

Trip Pulse Time t

0

1

Trip Pulse Time t

0

1

DDB: CB1FailPrTrip(1575)

Fig 55,56

P4148ENa

P54x/EN OP/Nd5 Page 5-303

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 14 IntSig: CB2 TAR2/3Ph

DDB: CB2 Open 3ph(911)

DDB: CB2 Closed 3ph(915)

Fig 14

Fig 14

IntSig: CB2 TARA

IntSig: CB2 TMEM2/3Ph

DDB:CB2 Open Aph(912)

DDB: CB2 Closed 3ph(915)

Fig 14

Fig 14

IntSig: CB2 TARB

IntSig: CB2 TMEM2/3Ph

DDB:CB2 Open Bph(913)

DDB: CB2 Closed 3ph(915)

Fig 14

Fig 14

IntSig: CB2 TARC

IntSig: CB2 TMEM2/3Ph

DDB:CB2 Open Cph(914)

DDB: CB2 Closed 3ph(915)

Figure AR-193 - CB2 trip time monitor

S

Q

RD

Fig 54

& S

Q

RD

& S

RD

Q

&

S

Q

RD

1

& S

Q

RD

&

S

Q

RD

1

& S

Q

RD

&

S

Q

RD

1

Trip Pulse Time t

0

1

Trip Pulse Time t

0

1

DDB: CB2FailPrTrip(1459)

Fig 55,56

P4149ENa

Page 5-304 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 9

Fig 9

Fig 4

Fig 13

Fig 15

Fig 15

Fig 43

IntSig: FLTMEM 3P

Setting:

Multi Phase AR:

Allow Autoclose/BAR

2 and 3 Ph/BAR 3Phase

IntSig: FLTMEM2P

DDB: CB1 CloseFail (303)

Setting:

BF if Lfail Cls:

Enabled/ Disabled

Fig 7

Fig 16

Int Sig: CB 2 LFRC

IntSig: CB1 FARIP

DDB: CB 2 AR Lockout (328)

Fig 56

Fig 53

Fig 3

Fig 16

DDB: CB1 FailPrTrip (1575)

IntSig: CB1 OpAny

DDB: CB 1 ARIP(1544)

DDB: BlockCB1AR (448)

BAR3Ph

BAR2 and3Ph

Enabled

Fig 39

Fig 39

Fig 20

Fig 20

Fig 18

Fig 16

Fig 20

Fig 11

Fig 4

Fig 13

DDB: AR CB1 Unhealthy(307)

DDB: AR CB1 No C/S(308)

DDB: Evolve 3ph( 1547)

IntSig: PROTRE-OP

IntSig: LastShot

DDB: CB 1 ARIP(1544)

IntSig: EVOLVELOCK

IntSig: ProtARBlock

DDB: CB 1 In Service(1526)

Int Sig: TMEM 2/3Ph

S

R

Q

Int Sig: CB1L3 PAROK

Int Sig: CB1F3 PAROK

DDB: CB 1 In Service(1526)

Int Sig: TMEM 1Ph

1

&

&

1

1

0

0.02s

1

0

0.02s

&

&

&

&

Fig 9

Fig 9

Int Sig: CB1 LSPAROK

Int Sig: CB1 FSPAROK

1

Fig 18

Fig 1

Fig 16

Fig 16

Fig 33

Fig 32

Fig 3

DDB: Seq Counter>Set (1546)

DDB: CB 1 Status Alm(301)

IntSig: CB1 LAIRP

IntSig: CB1 FARIP

DDB: Set CB2 Close(1449)

DDB: Set CB1 Close(1565)

IntSig: CB2 OpAny

Fig 4

Fig 4

Fig 54

Setting:

NUM CBs :

CB 1 Only/

CB 2 Only/

Both CB1

&CB2

BothCB1&CB2

DDB: CB 1 In Service(1526)

DDB: CB 2 In Service(1428)

DDB: CB2 FailPrTrip(1459)

1

&

&

&

&

&

&

&

Trip Pulse Time t

0

Fig 55

1

Fig 9

Fig 16

IntSig: InvalidAR Mode

DDB: CB 1 ARINIT(1543)

&

1

Fig 16 DDB: CB 1 ARIP (1544)

P4150ENa

Fig 22 Int Sig: DeadLineLockout

Figure AR-194 - Auto-reclose lockout – CB1 (for Software Versions BEFORE H1)

(OP) 5 Operation

IntSig: BARCB1

Fig 8, 55a

P54x/EN OP/Nd5 Page 5-305

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 55

Fig 15

Fig 15

Fig 43

IntSig: FLTMEM 3P

Setting:

Multi Phase AR:

Allow Autoclose/BAR

2 and 3 Ph/BAR 3Phase

IntSig: FLTMEM2P

DDB: CB1 CloseFail (303)

Setting:

BF if Lfail Cls:

Enabled/ Disabled

Fig 7

Fig 16

Int Sig: CB 2 LFRC

IntSig: CB1 FARIP

DDB: CB 2 AR Lockout (328)

Fig 56

Fig 53

Fig 3

DDB: CB1 FailPrTrip (1575)

IntSig: CB1 OpAny

Fig 16 DDB: CB 1 ARIP(1544)

DDB: BlockCB1AR (448)

BAR3Ph

BAR2 and3Ph

Enabled

Fig 39

Fig 39

DDB: AR CB1 Unhealthy(307)

DDB: AR CB1 No C/S(308)

1

&

&

&

&

&

1

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

Fig 20

Fig 20

Fig 18

Fig 16

Fig 20

Fig 11

Fig 4

Fig 13

DDB: Evolve 3ph( 1547)

IntSig: PROTRE-OP

IntSig: LastShot

DDB: CB 1 ARIP(1544)

IntSig: EVOLVELOCK

IntSig: ProtARBlock

DDB: CB 1 In Service(1526)

Int Sig: TMEM 2/3Ph

Fig 9

Fig 9

Fig 4

Fig 13

Int Sig: CB1L3 PAROK

Int Sig: CB1F3 PAROK

DDB: CB 1 In Service(1526)

Int Sig: TMEM 1Ph

1

Fig 9

Fig 9

Int Sig: CB1 LSPAROK

Int Sig: CB1 FSPAROK

1

Fig 18

Fig 1

Fig 16

Fig 16

Fig 33

Fig 32

Fig 3

DDB: Seq Counter>Set (1546)

DDB: CB 1 Status Alm(301)

IntSig: CB1 LAIRP

IntSig: CB1 FARIP

DDB: Set CB2 Close(1449)

DDB: Set CB1 Close(1565)

IntSig: CB2 OpAny

Fig 4

Fig 4

Fig 54

Setting:

NUM CBs :

CB 1 Only/

CB 2 Only/

Both CB1

&CB2

BothCB1&CB2

DDB: CB 1 In Service(1526)

DDB: CB 2 In Service(1428)

DDB: CB2 FailPrTrip(1459)

1

&

S

R

Q

&

&

1

0

0.02s

&

&

1

0

0.02s

&

Trip Pulse Time t

0

&

0.01s

0s

&

&

1

Fig 9

Fig 16

Fig 16

IntSig: InvalidAR Mode

DDB: CB 1 ARINIT(1543)

DDB: CB 1 ARIP (1544)

1

&

P4150ENb

Fig 22 Int Sig: DeadLineLockout

Figure AR-195 - Auto-reclose lockout – CB1 (for Software Versions H1 and later)

IntSig: BARCB1

Fig 8, 55a

Page 5-306 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 55 IntSig: BARCB1

Fig 5

DDB: AR In Service(1385)

Setting :

NUM CBs :

CB 1 Only /

CB 2 Only /

Both CB 1

CB 1 Only

& CB 2 BothCB1 & CB2

Fig 57 IntSig: RESCB1 LO

Figure AR-196 - Auto-reclose lockout – CB1

1

&

Fig 55a

&

& S

Q

R

DDB: CB 1 AR Lockout (306)

Fig

4,8,10,20,27,32,39,41,56,

57

P4151ENa

P54x/EN OP/Nd5 Page 5-307

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 56

Fig 15

IntSig: FLTMEM3P

Setting:

2 and 3 Ph/ BAR 3 Phase

Fig 15

Fig 44

IntSig: FLTMEM2P

DDB: CB2 CloseFail( 325)

Setting:

Enabled/ Disabled

Fig 7

Fig 17

Fig 55

Int Sig: CB 1 LFRC

IntSig: CB2 FARIP

DDB: CB 1 AR Lockout( 306)

BAR3Ph

BAR2 and3Ph

Enabled

Fig 54 DDB: CB2 FailPrTrip( 1459)

Fig 40

Fig 40

Fig 20

Fig 20

Fig 18

Fig 17

Fig 20

Fig 11

Fig 4

Fig 14

Fig 3

Fig 17

IntSig: CB2 OpAny

DDB: CB 2 ARIP( 1435)

DDB: BlockCB2 AR( 1421)

DDB: AR CB2 Unhealthy( 329)

DDB: AR CB2 No C/S( 330)

DDB: Evolve 3ph( 1547)

IntSig: PROTRE- OP

IntSig: Last Shot

DDB: CB 2 ARIP( 1435)

IntSig: EVOLVELOCK

IntSig: ProtARBlock

DDB: CB 2 In Service( 1428)

Int Sig: CB2 TMEM 2/3Ph

S

R

Q

1

1

&

&

&

&

&

&

Fig 9

Fig 9

Int Sig: CB2L3 PAROK

Int Sig: CB2F3 PAROK

Fig 14

DDB: CB 2 In Service( 1428)

Int Sig: CB2 TMEM 1Ph

1

0

0.02s

1

&

&

&

Fig 9

Fig 9

Int Sig: CB2 LSPAROK

Int Sig: CB2 FSPAROK

Fig 18

Fig 2

Fig 17

Fig 17

Fig 33

Fig 32

DDB: Seq Counter>Set( 1546)

DDB: CB 2 Status Alm( 323)

IntSig: CB2 LAIRP

IntSig: CB2 FARIP

DDB: Set CB2 Close( 1449)

DDB: Set CB1 Close( 1565)

Fig 3

Fig 4

Fig 4

Fig 54

Fig 9

Fig 17

IntSig: CB1 OpAny

Setting:

NUM CBs :

CB 1 Only/

CB 2 Only /

Both CB1

&CB

DDB: CB 1 In Service( 1526)

DDB: CB 2 In Service( 1428)

DDB: CB1 FailPrTrip( 1575)

IntSig: InvalidAR Mode

DDB: CB 2 ARINIT( 1434)

Fig 17 DDB: CB 2 ARIP( 1435)

1

1

&

1

&

0

0.02s

&

&

Trip Pulse Time t

0

&

Fig 22 Int Sig: DeadLineLockout

Figure AR-197 - Auto-reclose lockout – CB2 (for Software Versions BEFORE H1)

1

P4152ENa

IntSig: BARCB 2

Fig 8,56a

Page 5-308 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures) (OP) 5 Operation

Fig 56

Fig 15

Fig 15

Fig 44

Fig 7

Fig 17

Fig 55

IntSig: FLTMEM3P

Setting:

Multi Phase AR:

Allow Autoclose / BAR

2 and 3 Ph / BAR 3 Phase

IntSig: FLTMEM2P

DDB: CB2 CloseFail( 325)

Setting:

BF if Lfail Cls :

Enabled/Disabled

Int Sig: CB 1 LFRC

IntSig: CB2 FARIP

DDB: CB 1 AR Lockout ( 306)

BAR3Ph

BAR2 and3Ph

Enabled

Fig 54

Fig 3

Fig 17

Fig 40

Fig 40

DDB: CB2 FailPrTrip( 1459)

IntSig: CB2 OpAny

DDB: CB 2 ARIP(1435)

DDB: BlockCB2 AR (1421)

DDB: AR CB2 Unhealthy (329)

DDB: AR CB2 No C/S (330)

1

&

&

&

&

&

1

Setting:

No BF if L no CS:

Enabled

Disabled

Enabled

&

0.01s

0s

Fig 20

Fig 20

Fig 18

Fig 17

Fig 20

Fig 11

Fig 4

Fig 14

DDB: Evolve 3ph (1547)

IntSig: PROTRE - OP

IntSig: Last Shot

DDB: CB 2 ARIP (1435)

IntSig: EVOLVELOCK

IntSig: ProtARBlock

DDB: CB 2 In Service(1428)

S

R

Q

&

&

&

1

Fig 9

Fig 9

Fig 14

Int Sig: CB2L3 PAROK

Int Sig: CB2F3 PAROK

DDB: CB 2 In Service(1428)

Int Sig: CB2 TMEM 1Ph

1

0

0.02s

&

1

Fig 9

Fig 9

Int Sig: CB2 LSPAROK

Int Sig: CB2 FSPAROK

1

Fig 18

Fig 2

Fig 17

Fig 17

Fig 33

Fig 32

Fig 3

DDB: Seq Counter > Set ( 1546)

DDB: CB 2 Status Alm ( 323)

IntSig: CB2 LAIRP

IntSig: CB2 FARIP

DDB: Set CB2 Close (1449)

DDB: Set CB1 Close (1565)

Fig 4

Fig 4

Fig 54

Fig 9

Fig 17

IntSig: CB1 OpAny

Setting:

NUM CBs :

CB 1 Only/

CB 2 Only /

Both CB1

&CB 2

BothCB1&CB2

DDB: CB 1 In Service(1526)

DDB: CB 2 In Service(1428)

DDB: CB1 FailPrTrip(1575)

IntSig: InvalidAR Mode

DDB: CB 2 ARINIT(1434)

Fig 17 DDB: CB 2 ARIP (1435)

1

&

1

&

0

0.02s

&

&

Trip Pulse Time t

0

&

Fig 22 Int Sig: DeadLineLockout

Figure AR-198 - Auto-reclose lockout – CB2 (for Software Versions H1 and later)

1

P4152ENb

IntSig : BARCB 2

Fig 8, 56a

P54x/EN OP/Nd5 Page 5-309

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Fig 56a

Fig 56 IntSig: BARCB2

Fig 5 DDB: AR In Service( 1385)

Setting:

NUM CBs :

CB1 Only/

CB2 Only /

Both CB1

&CB2

CB2 Only

BothCB1&CB2

Fig 58 IntSig: RESCB2 LO

Figure AR-199 - Auto-reclose lockout – CB2

1

&

&

&

R

S

Q DDB: CB 2 AR Lockout( 328)

Fig 4, 8, 10, 20, 27, 33,

40, 42,55, 58

P4153ENa

Page 5-310 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Setting:

:

Enabled/ Disabled

Fig 4 IntSig: CB1 CRLO

Setting:

Res LO by UI:

Enabled/ Disabled

COMMAND:

ResetCB1LO:

Yes/No

Setting:

Enabled/ Disabled

Enabled

Enabled

Yes

Enabled

&

&

Fig 5 IntSig: AR DISABLED

Setting:

NUM CBs :

CB1 Only/

CB2 Only /

Both CB1

&CB

CB2 Only

2

1

&

Setting:

:

Enabled/ Disabled

Enabled

Fig 55

DDB: Rst CB1 Lockout(446)

Setting:

Enabled/ Disabled

DDB: CB1 AR Lockout(306)

Enabled

LO Reset Time t

0

Figure AR-200 - Reset CB1 lockout

&

&

Fig 57

(OP) 5 Operation

1 IntSig: RESCB1LO

Fig 55

P4154ENa

P54x/EN OP/Nd5 Page 5-311

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

Setting:

Res LO by CB IS:

Enabled/Disabled

Fig 4 IntSig: CB2CRLO

Setting:

Res LO by UI:

Enabled/Disabled

COMMAND:

ResetCB2LO:

Yes/No

Setting:

Res LO by NoAR:

Enabled/Disabled

Fig 5

IntSig: AR DISABLED

Setting:

NUM CBs :

CB1 Only/

CB2 Only/

Both CB1

&CB2

CB1 Only

Enabled

Enabled

Yes

Enabled

1

Fig 56

Setting:

Res LO by ExtDDB:

Enabled/Disabled

DDB: Rst CB2 Lockout(1422)

Enabled

Setting:

Res LO by T Delay:

Enabled/Disabled

Enabled

DDB: CB2 AR Lockout(328)

LO Reset Time t

0

&

&

&

&

&

Fig 58

Figure AR-201 - Reset CB2 lockout

1 IntSig: RESCB2LO

Fig 56

P4155ENa

Page 5-312 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Fig 59

:

Enabled/Disabled

Enabled

Disabled

Line

VT

Bus1

VT

Bus2

VT

Setting:

Select

ChSyn

Ref

Phase

CSRef

CS1 CS

CS2 CS

VOLTAGE

MONITORS

( Settings and

Output Criteria are not shown)

Live Line

Dead Line

Live Bus 1

Dead Bus1

Live Bus2

Dead Bus 2

DDB: MCB/ VTS (438)

DDB: MCB/VTS CB1 CS (1521)

DDB: MCB/VTS CB2 CS (1423)

DDB: InhibitLL(1522)

DDB: InhibitDL (1523)

DDB: InhibitLB1 (1524)

DDB: InhibitDB1 (1525)

DDB: InhibitLB2 (1424)

DDB: InhibitDB2 (1425)

Figure AR-202 - System checks – voltage monitor

1

1

1

1

1

1

(OP) 5 Operation

& DDB: Live Line (888)

& DDB: Dead Line (889)

& DDB: Live Bus1( 886)

& DDB: Dead Bus1 (887)

& DDB: Live Bus2 (1461)

& DDB: Dead Bus2 (1462)

P4156ENa

P54x/EN OP/Nd5 Page 5-313

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

ConfigurationSetting:

System Checks:

Enabled/Disabled

Setting:

System Checks CB1:

Enabled/Disabled

LINE VT

BUS1 VT

Setting:

Select

A-N,B-N,C-N

A-B,B-C,C-A

* Note

If not mapped in PSL are defaulted high.

Enabled

Disabled

Enabled

Disabled

CSRef

Check Synch

Check synch settings and operation criteria are shown

Fig 60

1

&

CB1 CS1CriteriaOK

CB1 CS2CriteriaOK

CB1 CS1SlipF>

CB1 CS1SlipF<

CB1 CS2SlipF>

CB1 CS2SlipF<

CSVline<

CSVBus1<

CSVLine>

CSVBus1>

CB1 CS1VL>VB1

CB1 CS1VL<VB1

CB1 CS1FL>FB1

CB1 CS1FL<FB1

CB1 CS1AngHigh+

CB1 CS1AngHigh-

CB1 CS2FL>FB1

CB1 CS2FL<FB1

CB1 CS2AngHigh+

CB1 CS2AngHigh-

CS1AngRotACW

CS1AngRotCW

CB1 CS2VL>VB1

CB1 CS2VL<VB1

DDB: VTS Fast Block(832)

DDB: MCB/VTS(438)

1

DDB: F Out of Range(319)

DDB:CB1 CS1 Enabled(881) *

Setting:

CB1 CS1:

Enabled/Disabled

Setting:

CB1 CS2:

Enabled/Disabled

Enabled

Disabled

Enabled

Disabled

DDB:CB1 CS2 Enabled(882) *

Inputs default to high if unmapped in PSL

Figure AR-203 - CB1 synch check signals

DDB:SchkslnactiveCB1(880)

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

DDB: CB1 CS1SlipF>(1578)

DDB: CB1 CS1SlipF<(1579)

DDB: CB1 CS2SlipF>(1464)

DDB: CB1 CS2SlipF<(1465)

DDB: CSVline<(1580)

DDB: CSVBus1<(1582)

DDB: CSVLine>(1581)

DDB: CSVBus1>(1583)

DDB: CB1 CS1 VL>VB(1586)

DDB: CB1 CS1 VL<VB(1588)

DDB: CB1 CS1 FL>FB(1590)

DDB: CB1 CS1 FL<FB(1591)

DDB: CB1 CS1AngHigh+(1592)

DDB: CB1 CS1AngHigh-(1593)

DDB: CB1 CS2 FL>FB(1493)

DDB: CB1 CS2 FL<FB(1494)

DDB: CB1 CS2AngHigh+(1495)

DDB: CB1 CS2AngHigh-(1496)

DDB: CB1 CS AngRotACW(1594)

DDB: CB1 CS AngRotCW(1595)

DDB: CB1 CS2 VL>VB(1587)

DDB: CB1 CS2 VL<VB(1589)

& DDB:CB1 CS1 OK(883)

& DDB:CB1 CS2 OK(884)

P4157ENa

Page 5-314 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

Enabled/Disabled

Setting:

System Checks CB2:

Enabled/Disabled

Enabled

Disabled

Enabled

Disabled

Setting:

Select

A-N,B-N,C-N

A-B,B-C,C-A

LINE VT

CSRef

Check Synch

Fig 61

1

&

CB 2 CS1 Criteria OK

CB 2 CS1 Criteria OK

CB 2 CS1 SlipF>

CB 2 CS1 SlipF<

CB 2 CS2 SlipF>

CB 2 CS2 SlipF<

CSVBUS2<

BUS2 VT CB2 CS

Check synch settings and operation criteria are not shown

* Note

If not mapped in PSL

DDB: VTS Fast Block( 832)

DDB: MCB/VTS( 438)

DDB: MCB/VTS CB2 CS (1423)

DDB: F Out of Range( 319)

DDB:CB 2 CS1 Enabled(1426) *

1

DDB:CB 2 CS2 Enabled(1427) *

Inputs default to high if unmapped in PSL

Figure AR-204 - CB2 synch check signals

Setting:

CB 2 CS1:

Enabled/Disabled

Setting:

CB 2 CS2:

Enabled/Disabled

CSVBUS2>

CB 2 CS1VL>VB1

CB 2 CS1VL<VB1

CB 2 CS1FL>FB1

CB 2 CS1FL<FB1

CB2 CS1 AngHigh+

CB 2 CS1 AngHigh-

CB 2 CS2FL>FB1

CB 2 CS2FL<FB1

CB2 CS2 AngHigh+

CB 2 CS2 AngHigh -

CS2 AngRotACW

CS2 AngRotCW

CB 2 CS2VL>VB1

CB 2 CS2VL<VB1

Enabled

Disabled

Enabled

Disabled

(OP) 5 Operation

&

&

&

&

&

&

DDB: CB2 CS1 SlipF>( 1466)

DDB: CB2 CS1 SlipF<( 1467)

DDB: CB2 CS2 SlipF>( 1468)

DDB: CB2 CS2 SlipF<( 1469)

& DDB: CSVBUS2<( 1584)

&

&

&

&

&

&

&

&

&

&

&

&

&

&

&

DDB: CSVBUS2 > (1585)

DDB: CB 2 CS 1 VL>VB (1470)

DDB: CB 2 CS 1 VL<VB (1472)

DDB: CB 2 CS 1 FL>FB (1474)

DDB: CB 2 CS 1 FL<FB (1476)

DDB: CB2 CS1 AngHigh+(1478)

DDB: CB2 CS1 AngHigh-( 1479)

DDB: CB 2 CS 2 FL>FB (1475)

DDB: CB 2 CS 2 FL<FB (1477)

DDB: CB 2 CS2 AngHigh+(1480)

DDB: CB 2 CS2 AngHigh-(1481)

DDB: CB 2 CS AngRotACW (1482)

DDB: CB 2 CS AngRotCW (1483)

DDB: CB 2 CS 2 VL>VB (1471)

DDB: CB 2 CS 2 VL<VB (1473)

& DDB:CB 2 CS 1 OK (1577)

& DDB:CB 2 CS 2 OK (1463)

P4158ENa

P54x/EN OP/Nd5 Page 5-315

(OP) 5 Operation

DDB: CB1 AR Lockout(306)

DDB: CB1 LO Alarm( 860)

DDB: Pole Discrep.CB1( 451)

DDB: CB1 AR 1 p InProg( 845)

DDB:CB1 Open Aph( 904)

DDB:CB1 Open Bph( 905)

DDB:CB1 Open Cph( 906)

P544/P546 CB Control and AR Figures (AR Figures)

&

1

Fig 62

&

0.04s

0

DDB: Pole Discrep.CB1 ( 699)

1

&

DDB: CB2 AR Lockout( 328)

DDB: CB2 LO Alarm (1599)

DDB: Pole Discrep.CB2(1606)

DDB: CB2 AR 1 p InProg( 855)

DDB:CB2 Open Aph( 912)

DDB:CB2 Open Bph( 913)

DDB:CB2 Open Cph( 914)

&

1

1

&

Figure AR-205 - Pole discrepancy (for P54x except P546)

&

0.04s

0

DDB: Pole Discrep.CB2 (1607)

P4159ENa

Page 5-316 P54x/EN OP/Nd5

P544/P546 CB Control and AR Figures (AR Figures)

DDB: CB1 AR Lockout(306)

DDB: CB1 LO Alarm( 860)

DDB: Pole Discrep.CB1( 451)

DDB: CB1 AR 1 p InProg( 845)

DDB:CB1 Open Aph( 904)

DDB:CB1 Open Bph( 905)

DDB:CB1 Open Cph( 906)

&

(OP) 5 Operation

1

Fig 62

&

0-10s step

0.01s

0

DDB: Pole Discrep.CB1 ( 699)

1

&

DDB: CB2 AR Lockout( 328)

DDB: CB2 LO Alarm (1599)

DDB: Pole Discrep.CB2(1606)

DDB: CB2 AR 1 p InProg( 855)

DDB:CB2 Open Aph( 912)

DDB:CB2 Open Bph( 913)

DDB:CB2 Open Cph( 914)

&

1

1

&

Figure AR-206 – Pole discrepancy (for P546 only)

&

0-10s step

0.01s

0

DDB: Pole Discrep.CB2 (1607)

P4159ENb

P54x/EN OP/Nd5 Page 5-317

(OP) 5 Operation P544/P546 CB Control and AR Figures (AR Figures)

DDB: Trip Inputs A (530)

DDB: Trip Inputs B (531)

DDB: Trip Inputs C (532)

Setting:

CB1 TripMode

3 P

1 /3P

3P

DDB: AR Force CB1 3P(858)

DDB: Force 3PTrip CB1(533)

DDB: CB1 Trip I/P 3ph(529)

Setting:

CB2 TripMode

3 P

1 /3P

3P

DDB: AR Force CB2 3P(1485)

DDB: Force 3PTrip CB2(1604)

DDB: CB2 Trip I/P 3ph(1608)

DDB: PoledeadA(892)

DDB: PoledeadB(893)

DDB: PoledeadC(894)

1

1

1

Figure AR-207 - CB trip conversion

&

&

&

1

&

2

1

1

1

1

Fig 63

&

&

1

1

1

1

1

S

Q

R

S

Q

R

S

Q

R

DDB: CB1 Trip Output A(523)

DDB: CB1Trip Output B(524)

DDB: CB1 Trip Output C(525)

S

Q

R

DDB: CB1 Trip 3Ph(526)

1

1

1

S

Q

R

S

Q

R

S

Q

R

S

Q

R

DDB: CB2 Trip Output A (1601)

DDB: CB2Trip Output B (1602)

DDB: CB2 Trip Output C (1603)

DDB: CB2 Trip 3Ph (1600)

Dwell

100ms

DDB: Any Trip(522)

S

Q

R

S

Q

R

DDB: 2/3Ph Fault(527)

DDB: 3Ph Fault(528)

P4160ENa

Page 5-318 P54x/EN OP/Nd5

P544/P546 CB Control and AR Logic: Internal Signal

Definitions

(OP) 5 Operation

7

Name

3PDTCOMP

AR DISABLED

BAR CB1

BAR CB2

CB1 3PDTCOMP

CB1 3PFTCOMP

CB1 3POK

CB1 ARSUCC

CB1 CS1 AngHigh-

CB1 CS1 AngHigh+

CB1 CS1 FL<FB

CB1 CS1 FL>FB

CB1 CS1 OK

CB1 CS1 SlipF<

CB1 CS1 SlipF>

CB1 CS1 VL<VB

CB1 CS1 VL>VB

CB1 CS2AngHigh-

CB1 CS2AngHigh+

CB1 CS2FL<FB

CB1 CS2FL>FB

CB1 CS2OK

CB1 CS2SlipF<

CB1 CS2SlipF>

CB1 CS2VL<VB

CB1 CS2VL>VB

CB1 FARIP

CB1 LARIP

CB1 Op1P

CB1 Op2/3P

CB1 OpAny

CB1 SPOK

CB1 SysCh Off

CB1CRLO

CB1F3PAR

P544/P546 CB CONTROL AND AR LOGIC: INTERNAL

SIGNAL DEFINITIONS

The CB control functionality of the P544/P546 is described in Figure AR-142 to Figure

AR-206 in the previous section. Within that description a number of signals that are

internal to the logic of the CB control are featured. Unlike the DDB signals, these internal signals cannot be accessed using the PSL, as they are hard-coded into the application software. This section lists those signals and provides a brief description. This section lists only the hard-coded internal signals used in the CB control. The DDB signals featuring in the logic are described in the Programmable Logic chapter (P54x/EN PL) of this manual.

Description

Int Sig:

Int Sig:

Three phase dead time complete

Overall autoreclosing disabled

Int Sig from “Autoreclose Lockout – CB1”

Int Sig from “Autoreclose Lockout – CB2”

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

CB1 3PAR dead time complete

CB1 3PAR follower time complete

CB1 OK for 3P AR (leader or follower)

CB1 auto-reclose sucessful

Line/Bus1 phase angle in range:

Line/Bus1 phase angle in range:

Bus1 F > (Line F + “CB1 CS1 SlipFreqf”)

-CB1 CS1 Angle to -180deg

+CB1 CS1 Angle to +180deg

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Line F > (Bus1 F + “CB1 CS1 SlipFreqf”)

CB1 CS1 is enabled and Line and Bus 1 voltages meet CB1 CS1 settings

Line-Bus 1 slip freq < CB1 CS1 SlipFreq setting

Line-Bus 1 slip freq > CB1 CS1 SlipFreq setting

Bus1 V > (Line V + “CB1 CS1 VDiff”)

Line V > (Bus1 V + “CB1 CS1 VDiff”)

Line/Bus1 phase angle in range:

Line/Bus1 phase angle in range:

Bus1 F > (Line F + “CB1 CS2 SlipFreqf”)

+CB1 CS2 Angle to +180deg

Line F > (Bus1 F + “CB1 CS2 SlipFreqf”)

CB1 CS2 is enabled and Line and Bus 1 voltages meet CB1 CS2 settings

Line-Bus 1 slip freq < CB1 CS2 SlipFreq setting

Line-Bus 1 slip freq > CB1 CS2 SlipFreq setting

Bus1 V > (Line V + “CB1 CS2 VDiff”)

Int Sig + DDB:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig + DDB:

Line V > (Bus1 V + “CB1 CS2 VDiff”)

CB1 ARIP as follower

CB1 ARIP as leader

CB1 open single-phase

CB1 open on 2 or 3-phases

CB1 open on 1, 2 or 3-phases

CB1 OK for SP AR (leader or follower)

CB1 CS1 & CB1 CS2checks disabled

Int Sig: CB1 in service – reset CB1 lockout

Int Sig from “Three Phase AR Cycle Selection”

-CB1 CS2 Angle to -180deg

P54x/EN OP/Nd5 Page 5-319

(OP) 5 Operation P544/P546 CB Control and AR Logic: Internal Signal

Definitions

Name

CB1F3PAROK

CB1FSPAR

CB1FSPAROK

CB1L3PAR

CB1L3PAR

CB1L3PAROK

CB1LFRC

CB1LFRC

CB1LSPAR

CB1LSPAROK

CB1SPDTCOMP

CB1SPFTCOMP

CB2 3PDTCOMP

CB2 3PFTCOMP

CB2 3POK

CB2 ARSUCC

CB2 CS1 AngHigh-

CB2 CS1 AngHigh+

CB2 CS1 FL<FB

CB2 CS1 FL>FB

CB2 CS1 OK

CB2 CS1 SlipF<

CB2 CS1 SlipF>

CB2 CS1 VL<VB

CB2 CS1 VL>VB

CB2 CS2AngHigh-

CB2 CS2AngHigh+

CB2 CS2FL<FB

CB2 CS2FL>FB

CB2 CS2OK

CB2 CS2SlipF<

CB2 CS2SlipF>

CB2 CS2VL<VB

CB2 CS2VL>VB

CB2 FARIP

CB2 LARIP

CB2 Op1P

CB2 Op2/3P

CB2 OpAny

CB2 SPOK

CB2 SysCh Off

CB2 TAR 2/3Ph

CB2 TARA

CB2 TARB

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig + DDB:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Description

CB1 OK to 3Ph AR as follower

Int Sig:

Int Sig:

CB1 SPAR in progress as follower

CB1 OK to SP AR as follower

Int Sig from “Three Phase AR Cycle Selection”

Int Sig from “Single Phase AR Cycle Selection”

Int Sig: CB1 OK to 3Ph AR as leader

Int Sig: CB1 failed to reclose as leader

Int Sig from “Leader/Follower Logic – 1”

Int Sig from “Single Phase AR Cycle Selection”

Int Sig: CB1 OK to SP AR as leader

Int Sig:

Int Sig:

CB1 SP dead time complete

CB1 SP follower time complete

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

CB2 3PAR dead time complete

CB2 3PAR follower time complete

CB2 OK for 3P AR (leader or follower)

CB2 auto-reclose sucessful

Line/Bus2 phase angle in range:

Line/Bus2 phase angle in range:

Bus2 F > (Line F + “CB2 CS1 SlipFreqf”)

Bus2 V > (Line V + “CB2 CS1 VDiff”)

Line V > (Bus2 V + “CB2 CS1 VDiff”)

Line/Bus2 phase angle in range:

-CB2 CS1 Angle to -180deg

+CB2 CS1 Angle to +180deg

Line F > (Bus2 F + “CB2 CS1 SlipFreqf”)

CB2 CS1 is enabled and Line and Bus 2 voltages meet CB2 CS1 settings

Line-Bus 2 slip freq < CB2 CS1 SlipFreq setting

Line-Bus 2 slip freq > CB2 CS1 SlipFreq setting

-CB2 CS2 Angle to -180deg

Line/Bus2 phase angle in range:

Bus2 F > (Line F + “CB2 CS2 SlipFreqf”)

+CB2 CS2 Angle to +180deg

Line F > (Bus2 F + “CB2 CS2 SlipFreqf”)

CB2 CS2 is enabled and Line and Bus 2 voltages meet CB2 CS2 settings

Line-Bus 2 slip freq < CB2 CS2 SlipFreq setting

Line-Bus 2 slip freq > CB2 CS2 SlipFreq setting

Bus2 V > (Line V + “CB2 CS2 VDiff”)

Line V > (Bus2 V + “CB2 CS2 VDiff”)

CB2 ARIP as follower

CB2 ARIP as leader

CB2 open single-phase

CB2 open on 2 or 3-phases

CB2 open on 1, 2 or 3-phases

CB2 OK for SP AR (leader or follower)

CB2 CS1 & CB2 CS2checks disabled

2Ph or 3Ph trip & AR initiation CB2

A Ph trip & AR initiation CB2

B Ph trip & AR initiation CB2

Page 5-320 P54x/EN OP/Nd5

P544/P546 CB Control and AR Logic: Internal Signal

Definitions

(OP) 5 Operation

Name

CB2 TARC

CB2 TMEM 1Ph

CB2 TMEM 2/3Ph

CB2 TMEM 3Ph

CB2CRLO

CB2F3PAR

CB2F3PAROK

CB2FSPAR

CB2FSPAROK

CB2L3PAR

CB2L3PAROK

CB2LFRC

CB2LFRC

CB2LSPAR

CB2LSPAROK

CB2SPDTCOMP

CB2SPFTCOMP

CBARCancel

CS VBus1<

CS VBus1>

CS VBus2<

CS VBus2>

CS VLine<

CS VLine>

CS1 Ang Rot ACW

CS1 Ang Rot CW

CS2 Ang Rot ACW

CS2 Ang Rot CW

Dead Bus 1

Dead Bus 2

Dead Line

DeadLineLockout

ENABLE CB13PDT

ENABLE CB1SPDT

ENABLE CB23PDT

ENABLE CB2SPDT

EVOLVE LOCK

F Out of Range

FLTMEM 2P

FLTMEM 3P

Foll CB1

Foll CB2

Foll3PAROK

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Description

C Ph trip & AR initiation CB2

CB1 1Ph trip +AR AR initiation memory CB2

CB1 2Ph trip +AR AR initiation memory CB2

CB1 3Ph trip +AR AR initiation memory CB2

Int Sig: CB2 in service – reset CB2 lockout

Int Sig from “Three Phase AR Cycle Selection”

Int Sig:

Int Sig:

CB2 OK to 3Ph AR as follower

CB2 SPAR in progress as follower

Int Sig: CB2 OK to SP AR as follower

Int Sig from “Three Phase AR Cycle Selection”

Int Sig:

Int Sig:

CB2 OK to 3Ph AR as leader

CB2 failed to reclose as leader

Int Sig from “Leader/Follower Logic – 1”

Int Sig from “Single Phase AR Cycle Selection”

Int Sig: CB2 OK to SP AR as leader

Int Sig:

Int Sig:

Int Sig:

Int Sig + DDB:

CB2 SP dead time complete

CB2 SP follower time complete

Stop and reset CB1 and CB2 AR In progress

Bus1 Volts < CS UV setting

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Bus1 Volts > CS OV setting

Bus2 Volts < CS UV setting

Bus2 Volts > CS OV setting

Line Volts < CS UV setting

Line Volts > CS OV setting

Line freq > (Bus1 freq + 0.001Hz) (CS1 Angle Rotating Anticlockwise)

Bus1 freq > (Line freq + 0.001Hz) (CS1 Angle Rotating Clockwise)

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB:

Int Sig:

Line freq > (Bus2 freq + 0.001Hz) (CS2 Angle Rotating Anticlockwise)

Bus2 freq > (Line freq + 0.001Hz) (CS2 Angle Rotating Clockwise)

CS1 V magnitude < Dead Bus 1 setting

CS2 V magnitude < Dead Bus 2 setting

Line V magnitude < Dead Line setting

When setting “3PDT Start When LD” is set to Enabled and the line does not go dead for a time set by “Dead Line Time” then this signal will force the autoreclose sequence to lockout.

Enable dead time for CB1 3PAR Int Sig:

Int Sig:

Int Sig:

Int Sig:

Int Sig:

Enable dead time for CB1 SPAR

Enable dead time for CB2 3PAR

Enable dead time for CB2 SPAR

Lockout for 2nd trip after Discrim Tim

Int Sig from frequency tracking logic

Int Sig: 2 Ph fault memory

Int Sig: 3 Ph fault memory

Int Sig from “Leader & Follower Logic – 2”

Int Sig from “Leader & Follower Logic – 2”

Int Sig from “Leader & Follower AR Modes Enable”

P54x/EN OP/Nd5 Page 5-321

(OP) 5 Operation P544/P546 CB Control and AR Logic: Internal Signal

Definitions

Name

FollSPAROK

INIT AR

Invalid AR Mode

Last Shot

Live Bus 1

Live Bus 2

Live Line

OK Time SP

PrefLCB1

PrefLCB2

Prot AR Block*

Prot Re-op

RESCB1ARSUCC

RESCB1LO

RESCB2ARSUCC

RESCB2LO

Reset L-F

RESPRMEM

SC Increment

SCCountoveqShots

SET CB1CL

SET CB2CL

SET LCB1

SET LCB1

SET LCB2

SET LCB2

SETCB13PCL

SETCB1SPCL

SETCB23PCL

SETCB2SPCL

SPDTCOMP

TAR 2/3Ph

TARA

TARANY

TARANY

TARB

TARC

TMEM 1Ph

TMEM 2/3Ph

TMEM 3Ph

TMEM ANY

Description

Int Sig from “Leader & Follower AR Modes Enable”

Int Sig:

Int Sig:

Host protection required to initiate AR

An invalid state is being indicated by the logic that determines AR mode by opto.

Int Sig:

Int Sig + DDB:

Int Sig + DDB:

Int Sig + DDB: the last shot

CS1 V magnitude >= Live Bus 1 setting

CS2 V magnitude >= Live Bus 2 setting

Line V magnitude >= Live Line setting

Int Sig from “Single Phase AR Lead CB Dead Time”

Int Sig: CB1 is the preferred leader

Int Sig: CB2 is the preferred leader

Int Sig: Host protection required to block AR

Int Sig from “Protection Re-operation + Evolving Fault”

Int Sig from “Reset CB1 Successful AR Indication

Int Sig from “Reset CB1 Lockout”

Int Sig from “Reset CB2 Successful AR Indication

Int Sig from “Reset CB2 Lockout”

Int Sig: From “Protection Re-operation + Evolving fault”

Int Sig:

Int Sig:

Reset “trip & AR” memory

Increment the sequence counter

Int Sig: Sequence counter has exceeded setting

Int Sig from “CB1 Auto Close”

Int Sig from “CB2 Auto Close”

Int Sig: CB1 selected leader

Int Sig from “Leader/Follower Logic – 1”

Int Sig: CB2 selected leader

Int Sig from “Leader/Follower Logic – 1”

Int Sig:

Int Sig:

CB1 three-phase close given

CB1 single-phase close given

Int Sig:

Int Sig:

Int Sig:

Int Sig:

CB2 three-phase close given

CB2 single-phase close given

Single phase dead time complete

2Ph or 3Ph trip & AR initiation

Int Sig: A Ph trip & AR initiation

Int Sig from “CB1 1 Pole / 3-pole Trip + AR Initiation”

Int Sig: Any trip & AR initiation

Int Sig:

Int Sig:

Int Sig:

Int Sig:

B Ph trip & AR initiation

C Ph trip & AR initiation

CB1 1Ph trip +AR AR initiation memory

CB1 2Ph trip +AR AR initiation memory

Int Sig:

Int Sig:

CB1 3Ph trip +AR AR initiation memory

Any Ph trip & AR initiation memory

Page 5-322 P54x/EN OP/Nd5

MiCOM P54x (P543, P544, P545 & P546) (AP) 6 Application Notes

P54x/EN AP/Nd5

APPLICATION NOTES

CHAPTER 6

Page (AP) 6-1

(AP) 6 Application Notes MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (AP) 6-2 P54x/EN AP/Nd5

Contents (AP) 6 Application Notes

CONTENTS

Page (AP) 6-

1 Introduction

1.1

Protection of Overhead Line, Cable, and Hybrid Circuits

11

11

2 Application of Individual Protection Functions 13

2.1

2.1.1

2.1.2

2.1.3

2.1.4

2.1.4.1

2.1.4.2

2.1.4.3

2.1.4.4

2.1.4.5

2.1.4.6

2.1.4.7

2.1.5

2.1.6

2.2

2.2.1

Differential Protection

Setting of the Phase Differential Characteristic

Relay Sensitivity under Heavy Load Conditions

CT Ratio Correction (All Models)

Transformers in Zone Applications (P543 & P545 models)

Magnetizing Inrush Stabilization

Second Harmonic Restraint

Second Harmonic Blocking

Fifth Harmonic Blocking

CT Ratio Correction

Phase Correction and Zero Sequence Current Filtering

High Set Differential Setting

Mesh Corner and 1½ Breaker Switched Substations

Small Tapped Loads (Tee Feeds)

Distance Protection Options

2.3

Distance Protection Zone and Timer Start Enhancements (for Software Version H3a and later) 26

Distance Protection and Aided DEF (Distance option only)

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.5.1

2.3.5.2

2.3.6

Simple and Advanced Setting Mode (Distance option only)

Line Parameters Settings (Distance option only)

Residual Compensation for Earth/Ground Faults (Distance option only)

Mutual Compensation for Parallel Lines (Distance option only)

Selection of Distance Operating Characteristic (Distance option only)

Phase Characteristic (Distance option only)

Ground Characteristic (Distance option only)

Zone Reaches - Recommended Settings (Distance option only)

2.3.7

2.3.8

2.3.8.1

2.3.9

Quadrilateral Phase Resistive Reaches (Distance option only)

Quadrilateral Ground Resistive Reaches and Tilting (Distance option only)

Dynamic Tilting:

Phase Fault Zone Settings (Distance option only)

2.3.10

2.3.11

Distance Directional Principle and Setup (Distance option only)

Delta Directional - Selection of RCA (Distance option only)

2.3.12

Distance Setup - Filtering, Load Blinding and Polarizing (Distance option only)

2.3.12.1

Digital Filtering (Distance option only)

2.3.12.2

CVTs with Passive Suppression of Ferroresonance (Distance option only)

2.3.12.3

CVTs with Active Suppression of Ferroresonance (Distance option only)

2.3.13

Load Blinding (Load Avoidance) (Distance option only)

2.3.13.1

Recommended Polarizing Settings (Distance option only)

30

39

39

40

40

40

40

40

41

36

36

37

39

30

30

31

31

33

33

34

34

13

13

17

18

22

24

24

24

18

19

22

22

25

25

26

P54x/EN AP/Nd5 Page (AP) 6-3

(AP) 6 Application Notes Contents

2.4

2.4.1

2.4.2

2.4.3

2.4.4

2.4.5

2.4.6

2.4.7

2.4.8

2.4.9

2.4.10

2.4.11

2.4.12

2.5

2.6

2.6.1

2.3.14

2.3.15

2.3.16

Out-of-Step Protection (Distance option only)

2.3.17

Critical Stability Angle (Distance option only)

2.3.17.1

Setting Option Recommendation (Distance option only)

2.3.17.2

Blinder Limits Determination (Distance option only)

2.3.17.3

Delta t, R5 and R6 Setting Determination (Distance option only)

2.3.17.4

Tost (Trip Delay) Setting (Distance option only)

2.3.17.5

Blinder Angle Setting (Distance option only)

2.3.17.6

Out-of-Step Operation on Series Compensated Lines (Distance option only)

2.3.18

Switch On To Fault (SOTF) Mode (Distance option only)

2.3.19

2.3.20

Distance Elements Basic Scheme Setting (Distance option only)

Power Swing Alarming and Blocking (Distance option only)

Trip On Reclose Mode (Distance option only)

Setup of DEF (Distance option only)

2.3.21

2.3.22

2.3.23

DEF Zero Sequence Polarization

DEF Negative Sequence Polarization (Distance option only)

2.3.24

2.3.25

41

43

44

44

46

47

49

50

50

50

51

52

52

52

52

General Setting Guidelines for DEF (Directional Ground Overcurrent) (Distance option only) 52

Delta Directional Comparison Principle and Setup (Distance option only) 53

Delta Directional Comparison - Selection of

I and

V Threshold (Distance option only)53

2.7

2.7.1

2.7.2

2.8

2.8.1

2.8.1.1

2.8.2

2.8.3

2.8.4

2.8.4.1

2.8.4.2

Channel Aided Schemes (Distance option only) 54

Distance Scheme PUR - Permissive Underreach Transfer Trip (Distance option only) 54

Distance Scheme POR - Permissive Overreach Transfer Trip (Distance option only) 54

Permissive Overreach Trip Reinforcement (Distance option only) 54

Permissive Overreach Scheme Weak Infeed Features (Distance option only)

Distance Scheme Blocking (Distance option only)

54

55

Permissive Overreach Schemes Current Reversal Guard (Distance option only)

Blocking Scheme Current Reversal Guard (Distance option only)

55

55

Aided DEF Ground Fault Scheme - Permissive Overreach (Distance option only) 55

Aided DEF Ground Fault Scheme - Blocking (Distance option only) 56

Delta Scheme POR - Permissive Overreach Transfer Trip (Distance option only) 56

Delta Blocking Scheme (Distance option only)

Delta Schemes Current Reversal Guard Timer (Distance option only)

56

56

Loss of Load Accelerated Tripping (LoL) (Distance option only)

Phase Fault Overcurrent Protection

Directional Overcurrent Characteristic Angle Settings

Thermal Overload Protection

Single Time Constant Characteristic

Dual Time Constant Characteristic

56

57

57

58

58

58

Earth Fault (Ground Overcurrent) and Sensitive Earth Fault (SEF) protection

Directional Earth Fault Protection

59

59

59 Residual Voltage Polarization

General Setting Guidelines for Directional Earth Fault (Ground Overcurrent) Protection60

Sensitive Earth Fault (SEF) Protection Element 60

Restricted Earth Fault (REF) Protection

Setting Guidelines for High Impedance Restricted Earth Fault (REF)

Use of METROSIL Non-Linear Resistors

62

62

63

Page (AP) 6-4 P54x/EN AP/Nd5

Contents (AP) 6 Application Notes

2.9

2.9.1

2.9.2

2.9.3

2.10

2.11

2.12

2.13

2.13.1

2.14

2.14.1

2.14.2

2.15

2.15.1

2.16

2.16.1

2.16.2

2.16.3

2.17

2.17.1

2.18

2.18.1

2.18.2

Negative Phase Sequence (NPS) Overcurrent Protection

NPS Current Threshold, '

Ι

2> Current Set'

Time Delay for the NPS Overcurrent Element, ‘

Ι

2> Time Delay’

Directionalizing the Negative Phase Sequence Overcurrent Element

Undervoltage Protection

Overvoltage Protection

Compensated Overvoltage Protection

Residual Overvoltage (Neutral Displacement) Protection

Setting Guidelines

Circuit Breaker Fail (CBF) Protection

Breaker Fail Timer Settings

Breaker Fail Undercurrent Settings

Broken Conductor Detection

Setting Guidelines

Communication between Relays

Optical Budgets

Clock Source Setting

Data Rate

Integral Intertripping

EIA(RS)232 InterMiCOM (“Modem InterMiCOM”)

InterMiCOM

64

(“Fiber InterMiCOM”)

IMx Command Type

IMx Fallback Mode

3 Worked Protection Example and other Protection Tips

3.1

3.1.1

3.1.2

3.1.3

3.1.4

Differential Protection Setting Examples

Differential Element

Transformer Feeder Examples

Teed Feeder Example

Three Winding Transformer in Zone with Different Rated CTs Example

3.2

Distance Protection Setting Example

3.2.1

3.2.2

3.2.3

3.2.4

3.2.5

3.2.6

3.2.7

3.2.8

Objective

System Data

Relay Settings

Line Impedance

Residual Compensation For Ground Fault Elements

Zone 1 Phase and Ground Reach Settings

Zone 2 Phase and Ground Reach Settings

Zone 3 Phase and Ground Reach Settings

3.2.9

3.2.10

3.2.11

Zone 3 Reverse Reach

Zone 4 Reverse Settings with POR and BLOCKING Schemes

Load Avoidance

3.2.12

Additional Settings for Quadrilateral Applications

3.2.12.1

Phase Fault Resistive Reaches (Rph)

3.2.12.2

Ground Fault Resistive Reaches (RGnd)

79

86

87

87

88

88

86

86

86

87

88

88

89

89

89

90

79

79

80

82

84

67

67

68

69

70

71

71

71

72

72

65

66

66

66

74

76

77

77

78

73

73

74

74

P54x/EN AP/Nd5 Page (AP) 6-5

(AP) 6 Application Notes Contents

3.6

3.7

3.7.1

3.7.2

3.7.3

3.7.4

3.7.5

3.7.6

3.7.7

3.7.8

3.7.9

3.7.9.1

3.7.9.2

3.7.9.3

3.7.9.4

3.7.9.5

3.7.9.6

3.7.9.7

3.7.10

3.5

3.5.1

3.5.1.1

3.5.1.2

3.5.2

3.5.2.1

3.5.2.2

3.5.3

3.5.3.1

3.5.3.2

3.3

3.3.1

3.3.2

3.3.3

3.3.4

3.4

3.4.1

3.4.2

Teed Feeder Protection

Apparent Impedance seen by the Distance Elements

Permissive Overreach (POR) Schemes

Permissive Underreach Schemes

Blocking Schemes

VT Connections

Open Delta (Vee Connected) VTs

VT Single Point Earthing

Trip Circuit Supervision (TCS)

TCS Scheme 1

Scheme Description

Scheme 1 PSL

TCS Scheme 2

Scheme Description

Scheme 2 PSL

TCS Scheme 3

Scheme Description

Scheme 3 PSL

Fault Detector / Trip Supervision

InterMiCOM

64

Application Example

100

103

InterMiCOM

64

Mapping for Three Ended Application – Blocking or PUR example 103

InterMiCOM

64

Application Example General Advice

Three-Ended Applications

104

105

Intermicom64 Application Example Scheme Description

Intermicom64 Application Example Channel Supervision

105

106

Intermicom64 Application Example Transfer Trip

InterMiCOM64 Application Example - Mapping for Two Ended Application

106

107

Intermicom64 Application Example - Dual Redundant Communications Channels 107

Intermicom64 Application Example - Scheme Co-Ordination Timers

InterMiCOM64 Application Example - Distance PUR Permissive Underreach

InterMiCOM64 Application Example - Distance POR Permissive Overreach

107

107

107

InterMiCOM64 Application Example - Distance Blocking 108

InterMiCOM64 Application Example - Directional earth Fault (DEF) POR Permissive Overreach108

InterMiCOM64 Application Example - Directional Earth Fault (DEF) Blocking

InterMiCOM64 Application Example - Delta Directional POR Permissive Overreach

108

108

InterMiCOM64 Application Example - Delta Directional Blocking

Fallback Mode for InterMiCOM64 bits

108

108

97

97

97

99

99

99

95

95

95

96

91

91

91

92

93

93

93

94

4 Application of Non-Protection Functions

4.1

4.1.1

4.1.2

4.1.2.1

4.1.2.2

4.1.3

4.1.3.1

4.1.3.2

Single and Three Phase Auto-Reclosing

Time Delayed and High Speed Auto-Reclosing

Auto-Reclose Logic Operating Sequence

Pole Discrepancy Timer for P54x (except P546)

Pole Discrepancy Timer for P546 Only

Setting Guidelines

Circuit Breaker Healthy

Number of Shots

109

109

109

109

109

109

110

110

110

Page (AP) 6-6 P54x/EN AP/Nd5

Contents

4.1.3.3

4.1.3.4

4.1.3.5

4.1.3.6

4.1.3.7

4.2

4.2.1

4.2.2

4.3

4.3.1

4.3.2

4.3.3

4.3.4

4.4

Dead Timer Setting

Follower Time Setting (P544 and P546 only)

De-Ionizing Time

Example Minimum Dead Time Calculation

Reclaim Timer Setting

Current Transformer Supervision (CTS)

Standard CTS

Differential CTS

Circuit Breaker Condition Monitoring

Setting the

Σ Ι

^ Thresholds

Setting the Number of Operations Thresholds

Setting the Operating Time Thresholds

Setting the Excessive Fault Frequency Thresholds

Read Only Mode

5 Two Circuit Breaker Control (P446) Worked Example

5.1

5.2

5.3

5.4

5.4.1

5.4.2

5.4.3

5.4.4

5.4.5

5.4.6

5.4.7

5.4.8

Introduction

Circuit Breaker Status

Voltage Inputs

Application Settings

CB CONTROL Menu:

CONFIGURATION Menu:

CT & VT RATIOS Menu:

GROUP 1 LINE PARAMETERS Menu:

GROUP 1 DISTANCE Menu:

GROUP 1 PHASE DIFF Menu:

GROUP 1 SYSTEM CHECKS Menu:

GROUP 1 AUTORECLOSE Menu:

5.5

PSL (Programmable Scheme Logic) Mapping

6 Two Circuit Breaker Control (P546)

7 Current Transformer Requirements

7.1

7.2

7.3

7.4

7.5

7.6

7.7

7.7.1

7.7.2

7.7.3

7.7.4

7.7.5

7.7.6

7.7.7

Recommended CT Classes (British and IEC)

Current Differential Requirements

Zone 1 Reach Point Accuracy (RPA)

Zone 1 Close-Up Fault Operation

Time Delayed Distance Zones

Determining Vk for an IEEE “C" Class CT

Worked Example for CT Requirements

System Data

Calculation of Primary X/R

Calculation of Source Impedance Zs

Calculation of Full Line Impedance (full 100 kms)

Calculation of Total Impedance Till Remote Bus Bar

Calculation of Through Fault X/R

Calculation of Through Fault If

(AP) 6 Application Notes

116

116

117

117

118

118

118

118

118

119

119

119

120

122

110

111

111

112

112

113

113

113

114

114

114

114

115

115

123

124

124

124

125

125

125

126

126

126

126

127

127

127

127

127

P54x/EN AP/Nd5 Page (AP) 6-7

(AP) 6 Application Notes Figures

7.7.8

7.7.9

7.7.10

7.7.11

7.7.12

7.7.13

7.7.14

7.7.15

7.7.16

Calculation of Line Impedance Till Zone1 Reach Point (80kms)

Calculation of Total Impedance till Zone1 Reach Point

Calculation of X/R till Zone1 Reach Point

Calculation of Fault Current Till Zone1 Reach Point

CT Vk for Current Differential Protection

CT Vk for Distance Zone1 Reach Point

CT Vk for Distance Zone1 Close-Up Fault

CT Vk for Distance Time Delayed Zones

Vk to be Considered

8 High Break Output Contacts

9 Auxiliary Supply Fuse Rating

FIGURES

Page (AP) 6-

Figure 1 – Differential three terminal scheme – internal fault

Figure 2 – Differential three terminal – external fault

Figure 3 - Steady state magnetizing inrush current

Figure 4 - Magnetizing inrush current during energization

Figure 5 - Variation of amplitude reduction factor

Figure 6 - Typical overflux current waveform

Figure 7 - Breaker and a half switched substation

Figure 8 – Distance Protection Zones

Figure 9 - LOGICAL OR Gate

Figure 10 - Non-directional timer fixed logic

27

28

29 Figure 11 - Distance Protection logic

Figure 12 - Settings required to apply a Mho zone (Distance option only) 33

Figure 13 - Settings required to apply a quadrilateral zone (Distance option only) 34

21

23

25

26

15

16

19

20

Figure 14 - Example of a high resistive zone 1 fault that falls outside zone 1 characteristic when the starting tilt angle of -3

°

is set (over-tilting effect).

(Distance option only)

Figure 15 - Basic time stepped distance scheme (Distance option only)

Figure 16 -

Power transfer in relation to angle difference θ between 2 ends

38

42

45

Figure 17 - Setting determination for the positive sequence resistive component R5

(Distance option only) 47

Figure 18 - R6

MAX

determination (Distance option only)

Figure 19 - Example of timer reset due to MOV’s operation

48

51

Figure 20 - Positioning of core balance current transformers

Figure 21 - Calculated Ferranti voltage rise on 345 kV and 765 kV lines

Figure 22 - Residual voltage, solidly earthed system

Figure 23 - Residual voltage, resistance earthed system

61

68

69

70

127

127

127

127

128

128

128

128

128

129

130

Page (AP) 6-8 P54x/EN AP/Nd5

Tables (AP) 6 Application Notes

Figure 24 - Typical plain feeder circuit

Figure 25 - Typical transformer feeder circuit

Figure 26 - Typical teed feeder application

Figure 27 - Three winding transformer in zone application

Figure 28 - System assumed for worked example

Figure 29 - Teed feeder application - apparent impedances seen by relay

Figure 30 - Teed feeder applications

Figure 31 - TCS scheme 1

Figure 32 - PSL for TCS schemes 1 and 3

Figure 33 - TCS scheme 2

Figure 34 - InterMiCOM

64

mapping in a three ended application

Figure 35 - Two circuit breaker auto-reclose application

Figure 36 - PSL mapping of some of the opto inputs and relay outputs

TABLES

Page (AP) 6-

Table 1 - Typical cable/line charging currents (UK, 50 Hz)

Table 2 - Selection of phase compensation factors

Table 3 - Lowest SIR ratio and Recommended

Table 4 - Typical time constant values

V Fwd (as a % of Vn)

14

24

53

58

58 Table 5 - Typical time constant values

Table 6 - Optical optical budgets and maximum transmission distances for relays from April 2008 and onwards 73

Table 7 - Original optical budgets and maximum transmission distances for Pre-

April 2008 relays 73

Table 8 - Typical operating times (PSL at send relay, to PSL state change at receive)78

Table 9 - Phase Association Logic

Table 10 - IEC Monitor Changes

100

101

Table 11 - DNP3 Mapping

Table 12 - Minimum Fault Arc De-Ionizing Time (Three Pole Tripping)

102

111

97

97

104

116

122

86

91

92

95

79

80

82

84

P54x/EN AP/Nd5 Page (AP) 6-9

(AP) 6 Application Notes

Notes

Tables

Page (AP) 6-10 P54x/EN AP/Nd5

Introduction

1

1.1

(AP) 6 Application Notes

INTRODUCTION

Protection of Overhead Line, Cable, and Hybrid Circuits

Overhead lines, typically ranging from 10 kV distribution lines to 800 kV transmission lines, are probably the most fault susceptible items of plant in a modern power system. It is therefore essential that the protection associated with them provides secure and reliable operation.

For distribution systems, continuity of supply is of paramount importance. The majority of faults on overhead lines are transient or semi-permanent in nature. Multi-shot autoreclose cycles are therefore commonly used in conjunction with instantaneous tripping elements to increase system availability. For permanent faults it is essential that only the faulted section of plant is isolated. As such, high speed, discriminative fault clearance is often a fundamental requirement of any protection scheme on a distribution network.

The requirements for a transmission network must also take into account system stability.

Where systems are not highly interconnected the use of single phase tripping and high speed auto-reclosure is often required. This in turn dictates the need for very high speed protection to reduce overall fault clearance times.

Many line configurations exist which need to be addressed. Transmission applications may typically consist of 2 or 3 terminal applications, possibly fed from breaker and a half or mesh arrangements. Lower voltage applications may again be 2 or 3 terminal configurations with the added complications of in zone transformers or small teed load transformers.

Charging current may also adversely affect protection. This is a problem particularly with cables and long transmission lines. Both the initial inrush and steady state charging current must not cause relay maloperation and preferably should not compromise protection performance.

Physical distance must be taken into account. Some EHV transmission lines can be up to several hundred kilometers in length. If high speed, discriminative protection is to be applied, it will be necessary to transfer information between line ends. This not only puts the onus on the security of signaling equipment but also on the protection in the event of loss of this signal.

Back-up protection is also an important feature of any protection scheme. In the event of equipment failure, such as signaling equipment or switchgear, for example, it is necessary to provide alternative forms of fault clearance. It is desirable to provide backup protection which can operate with minimum time delay and yet discriminate with both the main protection and protection elsewhere on the system.

P54x/EN AP/Nd5 Page (AP) 6-11

(AP) 6 Application Notes Introduction

Transmission and distribution systems are essential to route power from the point of generation to the region(s) of demand. The means of transport is generally via overhead lines, which must have maximum in-service availability. The exposed nature of overhead lines make them fault-prone, and protection devices must trip to initiate isolation of any faulted circuit.

Most of the faults that occur on overhead lines, however, are transient or semi-permanent in nature and are cleared simply by the act of isolating the circuit. Once the fault is cleared, system stability and availability can be addressed by auto-reclosing the circuit to bring it back into service. For distribution systems, continuity of supply is of paramount importance.

In addition to fast fault clearance to prevent plant damage, the requirements for a transmission network must also take into account system stability. Where systems are not highly interconnected the use of single phase tripping and high-speed multi-shot autoreclosure is often required. This in turn dictates the need for very high-speed protection to reduce overall fault clearance times.

The MiCOM IED provides fast, highly selective protection, to trip for genuine line faults.

The current differential principle easily detects intercircuit, evolving and cross country faults amongst others as the relay works on a per phase basis. It is also immune to voltage measurement problems such as CVT transients and power swings on the system and the most important benefit of all; differential principle offers the most selective line protection.

A combination with a full scheme distance protection and aided Directional Earth Fault

(DEF) makes the relay a complete and versatile solution for line protection. Differential and distance protection can be set to operate to work separately or simultaneously.

Distance can also be set to work upon failure of the relay protection communications.

These options allow the user to set different protection schemes such as Differential as main 1 and Distance as main 2 or vice versa, Differential as main 1 and Distance as backup, etc.

Distance protection on the MiCOM IED offers advanced load blinding and disturbance detection techniques such as power swing blocking to ensure stability when no tripping is required. Selectable mho and quadrilateral (polygon) characteristics allow versatile deployment as main protection for all effectively-earthed transmission and distribution circuits, whether lines, cables or hybrid (a mix of part cable, part overhead line).

Page (AP) 6-12 P54x/EN AP/Nd5

Application of Individual Protection Functions

2

2.1

2.1.1

(AP) 6 Application Notes

APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS

The following sections detail the individual protection functions in addition to where and how they may be applied. Worked examples are provided, to show how the settings are applied to the IED.

Differential Protection

Compensation Feature

(Applies to current differential variants only), e.g. P543, P544, P545 and P546 firmware versions.

When using the COMPENSATION feature, all relays in the protection scheme should be set to same configuration, i.e. ALL relays in the scheme set to "None", ALL relays in the scheme set to "Cap Charging", or ALL relays in the scheme set to "Transformer". Failure to adhere to this may result in unexpected relay operation e.g. mal-tripping or failure to operate.

Setting of the Phase Differential Characteristic

The characteristic is determined by four protection settings. All of them are user adjustable. This flexibility in settings allows the relay characteristic to be tailored to suit particular sensitivity and CT requirements. To simplify the protection engineer’s task, we strongly recommend three of the settings be fixed to:

Ι s2 = 2.0 pu k1 = 30% Provides stability for small CT mismatches, whilst ensuring good sensitivity to resistive faults under heavy load conditions k2 = 150% (2 terminal applications) or 100% (3 terminal applications).

Provides stability under heavy through fault current conditions

These settings will give a relay characteristic suitable for most applications leaving only

Is1 setting to be decided by the user.

Ι s1 This is the basic differential current setting which determines the minimum pick-up level of the relay. The value of this setting should be in excess of any mismatch between line ends, if any, and should also account for line charging current, where necessary.

Change to the “Is1 Step Size” Option

This change was introduced in these software versions:

The “Is1 Step Size” option (in the Stage 1 Phase Differential Is1 current level setting in the Phase Diff column) has been changed from 5% to 1%. This improves the protection functions such as trip supervision and fault detection on these relays.

P44y – Software Version H4a

P54x – Software Version H4a

P445 – Software Version J4a

If voltage inputs are connected to the relay, there is a feature to extract the charging current from the measured current before the differential quantity is calculated. In this case, it is necessary to enter the line positive sequence susceptance value. If capacitive charging current is enable,

Ι s1 may be set below the value of line charging current if required, however it is suggested that Is1 is chosen only sufficiently below the charging current to offer the required fault resistance coverage as described here after.

The following table shows some typical steady state charging currents for various lines and cables.

P54x/EN AP/Nd5 Page (AP) 6-13

(AP) 6 Application Notes Application of Individual Protection Functions

Voltage (kV)

11 kV Cable

33 kV Cable

33 kV Cable

Core formation and spacing

Three-core

Three-core

Close-trefoil

66 kV Cable

132 kV Overhead Line

Flat, 127 mm

132 kV Overhead Line

132 kV Cable Three-core

132 kV Cable Flat, 520 mm

275 kV Overhead Line

275 kV Overhead Line

275 kV Cable

275 kV Cable

Flat, 205 mm

Flat, 260 mm

Conductor size in mm

2

120

120

300

630

175

400

500

600

2 x 175

2 x 400

1150

2000

Charging current

A/km

1.2

1.8

2.5

10

0.22

0.44

10

20

0.58

0.58

19

24

400 kV Overhead Line

400 kV Overhead Line

400 kV Cable

400 kV Cable

Flat, 145 mm

Tref., 585 mm

2 x 400

4 x 400

2000

3000

0.85

0.98

28

33

Table 1 - Typical cable/line charging currents (UK, 50 Hz)

If capacitive charging current is disable, the setting of Is1 must be set above 2.5 times the steady state charging current. Where charging current is low or negligible, the recommended factory default setting of 0.2 In should be applied.

The tripping criteria can be formulated as:

1. for |

Ι bias| <

Ι s2,

|

Ι diff| > k1.|

Ι bias| +

Ι s1

2. for |

Ι bias| >

Ι s2,

|

Ι diff| > k2.|

Ι bias| - (k2 - k1).

Ι s2 +

Ι s1

From Software Version D1a

The Phase Comparison Algorithm was changed in Software Version D1a. The new method operates as follows.

The CT saturation detection uses a Phase Comparison algorithm (similarly to P746 phase comparison solution) to supervise the Current Differential operation.

The Phase comparison algorithm provides immunity to CT saturation.

Phase Comparison confirms that a fault is either internal or external to the protected line section.

Advantages of phase comparison:

It is an additional tripping criterion. It only allows the line differential algorithm to operate if the fault is detected as internal.

On an external fault (with a saturating CT) which then evolves to an internal fault, phase comparison allows the trip even if the CT remains saturated.

Page (AP) 6-14 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

P54x/EN AP/Nd5

Figure 1 – Differential three terminal scheme – internal fault

Page (AP) 6-15

(AP) 6 Application Notes Application of Individual Protection Functions

Page (AP) 6-16

Figure 2 – Differential three terminal – external fault

Settings

P54x/EN AP/Nd5

Application of Individual Protection Functions

2.1.2

(AP) 6 Application Notes

Relay Sensitivity under Heavy Load Conditions

The sensitivity of the relay is governed by its settings and also the magnitude of load current in the system. For a three-ended system, with relays X, Y and Z, the following applies:

|

Ι diff| =

|

Ι bias| =

|(

Ι

X +

Ι

Y +

Ι

Z)|

0.5 (|

Ι

X| + |

Ι

Y| + |

Ι

Z|)

Assume a load current of

Ι

L flowing from end X to Y and Z. Assume also a high resistance fault of current

Ι

F being singly fed from end X. For worst case analysis, we can assume also

Ι

F to be in phase with

Ι

L:

Ι

X =

Ι

Ι

Y

Z

=

=

|

Ι diff| =

|

Ι bias| =

Ι

L +

Ι

F

|

-y

Ι

L where 0<y<1

- (1-y)

Ι

L

|

Ι

F|

Ι

L| + 0.5 |

Ι

F|

Relay sensitivity when |

Ι bias| <

Ι s2:

For |

Ι bias| <

Ι s2, the relay would operate if |

Ι diff| > k1 |

Ι bias| +

Ι s1 or or or

|

Ι

F| > k1 (|

Ι

L| + 0.5 |

Ι

F|) +

Ι s1

(1 - 0.5 k1) |

Ι

F| > (k1 |

Ι

L| +

Ι s1)

|

Ι

F| > (k1 |

Ι

L| +

Ι s1) / (1 - 0.5 k1)

For

Ι s1 = 0.2 pu, k1 = 30% and

Ι s2 =2.0 pu, then for |

Ι

L| = 1.0 pu, the relay would operate if |

Ι

F| > 0.59 pu for |

Ι

L| = 1.59 pu, the relay would operate if |

Ι

F| > 0.80 pu

If |

Ι

F| = 0.80 pu and |

Ι

| = 1.59 pu, then |

Ι bias| = 1.99 pu which reaches the limit of the low percentage bias curve.

Relay sensitivity when |

Ι bias| > Is2:

For |

Ι bias| >

Ι s2, the relay would operate if

|

Ι diff| > k2 |

Ι bias| - (k2 - k1)

Ι s2 +

Ι s1 or |

Ι

F| > k2 (|

Ι

L| + 0.5 |

Ι

F|) - (k2 - k1)

Ι s2 +

Ι s1 or or

(1 - 0.5 k2) |

Ι

F| > (k2 |

Ι

L| - (k2 - k1)

Ι s2 +

Ι s1)

|

Ι

F| > (k2 |

Ι

L| - (k2 - k1)

Ι s2 +

Ι s1) / (1 - 0.5 k2)

For

Ι s1 = 0.2 pu, k1 = 30%,

Ι s2 = 2.0 pu and k2 = 100%, then, for |

Ι

L| = 2.0 pu, the relay would operate if |

Ι

F| > 1.6 pu for |

Ι

L| = 2.5 pu, the relay would operate if |

Ι

F| > 2.6 pu

P54x/EN AP/Nd5 Page (AP) 6-17

(AP) 6 Application Notes

2.1.3

2.1.4

Application of Individual Protection Functions

Fault resistance coverage:

Assuming the fault resistance, RF, is much higher than the line impedance and source impedance, then for a 33 kV system and 400/1 CT:-

|

Ι

F| =

=

=

(Vph-n /RF) * (1/CT ratio) pu

(33000 / 3 )/RF)/400 pu

47.63/RF pu

Based on the above analysis, the relay will detect a fault current in excess of 0.59 pu with a load current of 1 pu flowing. The fault resistance would have to be less than

47.63/0.59 = 81

in this case.

With a short time overload current of 2.0 pu, the relay will be able to detect a fault resistance of 47.63/1.6 = 30

or lower.

CT Ratio Correction

Ideally, the compensated current values should be arranged to be as close as possible to relay rated current to provide optimum relay sensitivity.

If there is not mismatch between the CTs, the CT correction factor should be set to 1:1.

Transformers in Zone Applications

In applying the well established principles of differential protection to transformers, a variety of considerations have to be taken into account. These include compensation for any phase shift across the transformer, possible unbalance of signals from current transformers either side of windings, and the effects of the variety of earthing and winding arrangements. In addition to these factors, which can be compensated for by correct application of the relay, the effects of normal system conditions on relay operation must also be considered. The differential element must restrain for system conditions which could result in maloperation of the relay, such as high levels of magnetizing current during inrush conditions.

In traditional transformer feeder differential schemes, the requirements for phase and ratio correction were met by correct selection of line current transformers.

The following feature applies to: P543, P544 (Software H1 and later), P545 and P546

(Software H1 and later).

In these relays, software Interposing CTs (ICTs) are provided which can give the required compensation. The advantage of having replica interposing CTs is that it gives the P54x relays the flexibility to cater for line CTs connected in either star or delta, as well as being able to compensate for a variety of system earthing arrangements. These relays also include a magnetizing inrush restraint and blocking facility.

INRUSH Restraint/Blocking

(Applies to current differential variants only), e.g. P543, P544, P545 and P546 firmware versions.

When using the INRUSH Restraint/Blocking feature, all relays in the protection scheme should be set to same configuration, i.e. ALL relays in the scheme set to "Disabled", ALL relays in the scheme set to "Restraint", or ALL relays in the scheme set to "Blocking".

Failure to adhere to this may result in relay operation e.g. mal-tripping or failure to operate.

Page (AP) 6-18 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.1.4.1

(AP) 6 Application Notes

Magnetizing Inrush Stabilization

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

When a transformer is first energized, a transient magnetizing current flows, which may

• reach instantaneous peaks of 8 to 30 times the full load current. The factors controlling the duration and magnitude of the magnetizing inrush are:

Size of the transformer bank

Size of the power system

Resistance in the power system from the source to the transformer bank

Residual flux level

Type of iron used for the core and its saturation level.

There are three conditions which can produce a magnetizing inrush effect:

First energization

Voltage recovery following external fault clearance

Sympathetic inrush due to a parallel transformer being energized.

The following diagram shows under normal steady state conditions the flux in the core changes from maximum negative value to maximum positive value during one half of the voltage cycle, which is a change of 2.0 maximum.

+F m

Steady state

-F m

P4297ENa

Figure 3 - Steady state magnetizing inrush current

If the transformer is energized at a voltage zero when the flux would normally be at its maximum negative value, the flux will rise to twice its normal value over the first half cycle of voltage. To establish this flux, a high magnetizing inrush current is required. The first peak of this current can be as high as 30 times the transformer rated current. This initial rise could be further increased if there was any residual flux in the core at the moment the transformer was energized.

P54x/EN AP/Nd5 Page (AP) 6-19

(AP) 6 Application Notes Application of Individual Protection Functions

Switch on at voltage zero –

No residual flux

P4298ENa

Figure 4 - Magnetizing inrush current during energization

As the flux enters the highly saturated portion of the magnetizing characteristic, the inductance falls and the current rises rapidly. Magnetizing impedance is of the order of

2000% but under heavily saturated conditions this can reduce to around 40%, which is an increase in magnetizing current of 50 times normal. This figure can represent 5 or 6 times normal full load current.

Analysis of a typical magnitude inrush current wave shows (fundamental = 100%):

Component -DC 2nd H 3rd H 4th H 5th H 6th H 7th H

55% 63% 26.8% 5.1% 4.1% 3.7% 2.4%

The offset in the wave is only restored to normal by the circuit losses. The time constant of the transient can be quite long, typically 0.1 second for a 100 KVA transformer and up to 1 second for larger units. The initial rate of decay is high due to the low value of air core reactance. When below saturation level, the rate of decay is much slower. The following graph shows the rate of decay of the DC offset in a 50 Hz or 60 Hz system in terms of amplitude reduction factor between successive peaks.

Page (AP) 6-20 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

Variation of amplitude reduction factor between successive mMagnetising inrush peaks with X/R ratio

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

P54x/EN AP/Nd5

0.2

0 10 20 30 40 50

X/R ratio

60 70 80 90 100

P4299ENa

Figure 5 - Variation of amplitude reduction factor

The magnitude of the inrush current is limited by the air core inductance of the windings under extreme saturation conditions. A transformer with concentric windings will draw a higher magnetizing current when energized from the LV side, since this winding is usually on the inside and has a lower air core inductance. Sandwich windings have approximately equal magnitude currents for both LV and HV. Resistance in the source will reduce the magnitude current and increase the rate of decay.

The magnetizing inrush phenomenon is associated with a transformer winding which is being energized where no balancing current is present in the other winding(s). This current appears as a large operating signal for the differential protection. Therefore, special measures are taken with the relay design to ensure that no maloperation occurs during inrush. The fact that the inrush current has a high proportion of harmonics having twice the system frequency offers a possibility of stabilization against tripping by the inrush current.

Page (AP) 6-21

(AP) 6 Application Notes

2.1.4.2

2.1.4.3

2.1.4.4

Application of Individual Protection Functions

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

These relays provides a choice between harmonic restraint and blocking by setting option, both providing stability during transformer inrush conditions.

To select second harmonic Restraint or Blocking option, set the cell [3312: Inrush

Restraint] under the GROUP 1 PHASE DIFF menu heading to Restraint or Blocking.

Second harmonic restraints or blocking provide security during transformer energization.

Second Harmonic Restraint

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

The magnetizing inrush current contains a high percentage of second harmonic. These relays filter out this component of the waveform and use it as an additional bias quantity.

The total bias used by the relay will therefore be a combination of the average load current on the line plus a multiple of the second harmonic component of the current. The multiplying factor which is used to ensure stability is controlled by the setting cell [3314:

Ih(2) Multiplier] under the GROUP 1 PHASE DIFF menu heading provided the setting cell

[3312: Inrush Restraint] is set to Restraint .

This multiplier is used in additional bias calculation as per following formula:

IF Inrush Restraint setting is set to Restraint

ELSE

Additional bias = Ih(2) Multiplier * 1.414 * largest 2nd harmonic current

Additional bias = 0

In the above equation second harmonic current is derived from Fourier filtering techniques.

Where these relays are used and inrush restrain function is enabled, it must be ensured that this function is enabled at each end to avoid possible maloperation.

Second Harmonic Blocking

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

To select second harmonic blocking option, set the cell [3312: Inrush Restraint] under the

GROUP 1 PHASE DIFF menu heading to Blocking .

Second harmonic blocking provides security during transformer energization.

For each phase, if the level of phase current is above 5% In, and if the ratio of second harmonic current ,Ih(2) to fundamental in the line is above the settings at cell [3320: Ih(2)

>%] then inrush conditions shall be detected which sets the appropriate phase block, to block local and remote ends.

Users can choose to apply Cross blocking or independent blocking by choosing the appropriate setting at cell [3321: Ih(2) CrossBlock] under the GROUP 1 PHASE DIFF menu heading. If Ih(2) CrossBlock is set to Disabled then independent blocking is used.

If independent blocking is enabled only the affected phase is blocked at all ends. If cross blocking is enabled all phases are blocked at all ends.

Fifth Harmonic Blocking

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

Page (AP) 6-22 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

The fifth Harmonic blocking feature is available for possible use to prevent unwanted operation of the low set differential element under transient overfluxing conditions.

When overfluxing occurs, the transformer core becomes partially saturated and the resultant magnetizing current waveforms increase in magnitude and become harmonically distorted. Such waveforms have a significant fifth harmonic content, which can be extracted and used as a means of identifying the abnormal operating condition.

The fifth harmonic blocking threshold is adjustable between 5 - 100%. The threshold should be adjusted so that blocking will be effective when the magnetizing current rises above the chosen threshold setting of the low-set differential protection.

For example, when a load is suddenly disconnected from a power transformer the voltage at the input terminals of the transformer may rise by 10-20% of the rated value. Since the voltage increases, the flux, which is the integral of the excitation voltage, also increases.

As a result, the transformer steady state excitation current becomes higher. The resulting excitation current flows in one winding only and therefore appears as differential current which may rise to a value high enough to operate the differential protection. A typical differential current waveform during such a condition is shown in the Typical overflux current waveform diagram shown below. A typical setting for Ih(5)%> is 35%

P54x/EN AP/Nd5

P4353ENa

Figure 6 - Typical overflux current waveform

To offer some protection against damage due to persistent overfluxing that might be caused by a geomagnetic disturbance, the fifth harmonic blocking element can be routed to an output contact using an associated timer. Operation of this element could be used to give an alarm to the network control centre. If such alarms are received from a number of transformers, they could serve as a warning of geomagnetic disturbance so that operators could take some action to safeguard the power system. Alternatively this element can be used to initiate tripping in the event of prolonged pick up of a fifth harmonic measuring element. It is not expected that this type of overfluxing condition would be detected by the AC overfluxing protection. This form of time delayed tripping should only be applied in regions where geomagnetic disturbances are a known problem and only after proper evaluation through simulation testing.

Note These relays determine the fundamental components and the fifth harmonic components from the line currents and provide fifth harmonic blocking option when the setting cell [3312: Inrush Restraint] under the GROUP 1

PHASE DIFF menu is set to Blocking.

For each phase, if the level of phase current is above 5% In, and if the ratio of fifth harmonic current, Ih(5) to fundamental in the line is above the settings at cell [3328: Ih(5)

>%] then the overfluxing conditions shall be detected which sets the appropriate phase block, to block local and remote ends.

Users can choose to apply Cross blocking or independent blocking by choosing the appropriate setting at cell [3329: Ih(5) CrossBlock] under the GROUP 1 PHASE DIFF menu heading. If Ih(5) CrossBlock is set to Disabled then independent blocking is used.

If independent blocking is enabled only the affected phase is blocked at all ends. If cross blocking is enabled all phases are blocked at all ends.

Page (AP) 6-23

(AP) 6 Application Notes

2.1.4.5

2.1.4.6

2.1.4.7

Application of Individual Protection Functions

CT Ratio Correction

In many cases the HV and LV current transformer primary ratings will not exactly match the transformer winding rated currents. The CT correction factor must be set to ensure that the signals to the differential algorithm are correct to guarantee current balance of the differential element under load and through fault conditions. To minimize unbalance due to tap changer operation, current inputs to the differential element should be matched for the mid-tap position. If there is not mismatch between the CTs, the CT correction factor should be set to 1:1.

The compensated current values should be arranged to be as close as possible to relay rated current to provide optimum relay sensitivity

When a Star/Delta software interposing CT is chosen, no additional account has to be taken for the 3 factor which would be introduced by the delta winding. This is accounted for by the relay.

Phase Correction and Zero Sequence Current Filtering

Selection of the phase correction settings will be dependant on the phase shift required across the transformer and on zero sequence filtering elements with CT correction factors, the phase correction is applied to each relay. Providing replica ICTs in software has the advantage of being able to cater for line CTs connected in either star as well as being able to cater for zero sequence current filtering

Dy1

Yd1

Dy5

Yd5

Dy7

Yd7

Dy11

Yd11

YNyn

To aid selection of the correct setting on the relay menu, some examples of selection of phase compensation factors are shown in the following table.

Transformer connection

Transformer phase shift

- 30°

- 30°

- 150°

Vectorial compensation (relay setting)

HV LV

Yy0 (0 deg)

Yd1 (-30 deg)

Yy0 (0 deg)

Yd11 (+30 deg)

Yy0 (0 deg)

Yd7 (+150 deg)

- 150°

+ 150°

+ 150°

+ 30°

+ 30°

Yd5 (-150 deg)

Yy0 (0 deg)

Yd7 (+150 deg)

Yy0 (0 deg)

Yd11 (+30 deg)

Ydy0 (0 deg)

Yy0 (0 deg)

Yd5 (-150 deg)

Yy0 (0 deg)

Yd1 (-30 deg)

Yy0 (0 deg)

Ydy0 (0 deg)

Table 2 - Selection of phase compensation factors

As shown in the table, a delta winding is introduced with the Y side software ICT. This provides the required zero sequence trap, as would have been the case if the vector correction factor had been provided using an external ICT.

Whenever an in zone earthing connection is provided, a zero sequence trap should always be provided. For instance if a YNyn power transformer is in the protected zone, there will be some difference between HV and LV zero sequence magnetizing current of the transformer. This is normally small, but to avoid any problems with any application the above rule for zero sequence traps should be applied with earthed windings.

High Set Differential Setting

The following feature(s) applies to:

P543, P544 (Software H1 and later), P545 and P546 (Software H1 and later).

Page (AP) 6-24 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.1.5

(AP) 6 Application Notes

When Inrush Restraint is set to Restraint or Blocking, a high set differential protection becomes active. This is provided to ensure rapid clearance for heavy internal faults with saturated CTs. Because high set is not restrained by magnetizing inrush, hence the setting must be set such that it will not operate for the largest inrush currents expected. It is difficult to accurately predict the maximum anticipated level of inrush current. Typical waveforms peak values are of the order of 8-10x rated current. A worst case estimation of inrush could me made by dividing the transformer full load current by the per unit leakage reactance quoted by the transformer manufacturer.

Mesh Corner and 1½ Breaker Switched Substations

Where a line is fed from a mesh corner or 1½ breaker switched substation, as shown in the following diagram, then two options are available for CT connections to the relay. The first is by paralleling the two sets of line CTs into a common input, ‘A’. The second is by using two separate inputs for each set of line CTs, ‘B’. The P544 and P546 relays are designed with an additional set of input CTs specifically for this purpose.

In the case of a through fault as shown, the relay connected to circuit ‘A’ should see no current and as such, will remain stable. Under this condition, it should be noted that no bias is produced in the relay. To ensure relay stability, the two sets of line CTs should be as near as identical in all characteristics, and equally loaded, such that the relaying connection is at the equipotential point of the secondary leads.

In the case of circuit ‘B’ no differential current should result. A large bias current will however exist, providing a high degree of stability in the event of a through fault. This bias will also ensure stability where CTs are not closely matched. Therefore, circuit ‘B’ is the preferred connection for such applications and so the P544 and P546 relay models would normally be specified.

Bus 1 Bus 2

I

F

I

F

2.1.6

P54x/EN AP/Nd5

F

87 87

Stub bus inputs

A

Figure 7 - Breaker and a half switched substation

B

P1009ENa

Small Tapped Loads (Tee Feeds)

Where transformer loads are tapped off the protected line it is not always necessary to install CTs at this location. Provided that the tee-off load is light, differential protection can be configured for the main line alone. The settings ‘Phase Char’, ‘Phase Time Delay’ and

‘TMS’ or ‘Time Dial’ in the “Selection of phase compensation factors” table allow the differential element to time grade with IDMT overcurrent relays or fuses protecting the tap. This keeps stability of the differential protection for external faults on the tee circuit

Page (AP) 6-25

(AP) 6 Application Notes

2.2

2.2.1

Application of Individual Protection Functions

Distance Protection Options

The MiCOM IED has, by ordering option, a comprehensive integrated distance protection

• package. This consists of:

Phase fault distance protection

Earth/ground fault distance protection

Power sing detection, alarm, and blocking

Out-of-step detection and tripping

Switch On To Fault (SOTF) and Trip On Reclose (TOR)

Directional Schemes

Aided schemes

These are described in the following sections and are marked as being applicable to the distance option only. If the distance option is not specified, these will not be applicable, and additional protection will be in the form of overcurrent etc., as described from the

Phase Fault Overcurrent Protection section.

Distance Protection Zone and Timer Start Enhancements (for Software

Version H3a and later)

Software Version H3a has modified how the Distance Protection Zone and the Timer

Start functions work. This section describes how these new functions can be applied.

For the MiCOM P443/P54x, there is now enhanced distance protection which includes the ability to start all timer stages with a general starting signal. This covers a distance protection application with six different distance zones, three zones in the forward direction, two programmable zones and one zone in the backward direction. The timer stages are defined for each zone (e.g. t1, t2, t3, tP and t4), and run in parallel with the two backup timer stages (directional and non-directional end timers) t5 and t6.

X

Z5

Z3

Z2

Z1

Page (AP) 6-26

R

Z4

Z6

P0683ENa

Figure 8 – Distance Protection Zones

This feature implements a distance zone ZQ. This ZQ zone uses the same parameters as the distance zone ZP.

P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

To fulfill the requirements for the application these zones are required:

Zone Z1

Zone Z2

Zone Z3

Zone Z4

Zone Z5

Zone Z6

MiCOM P443/MiCOM P540 zone 1

MiCOM P443/MiCOM P540 zone 2

MiCOM P443/MiCOM P540 zone P

MiCOM P443/MiCOM P540 zone Q

MiCOM P443/MiCOM P540 zone 3 without configured offset

MiCOM P443/MiCOM P540 zone 4

Distance Starting Elements

The MiCOM P443/MiCOM P540 are provided with these distance starting elements:

DELTA starting

Zone 3 starting

Zone 4 starting

Each of the starting elements has its own DDB numbers. This means that these can use special logical schemes (using GOOSE traffic or IM64 signal exchange) or simple signaling via PSL.

In addition to these starting DDBs, common starting information is also part of the fixed distance protection logic. Again, this common starting element has its own DDB to fulfill the specification mentioned before. This common starting information is created as a logical OR-gate, as shown in the drawing below:

DIST DELTA starting

DIST Zone 3 Starting

DIST Zone 4 Starting

>=1

DIST gen. starting

...

P0685ENa

Figure 9 - LOGICAL OR Gate

The core requirement is that the DIST General Starting picks up each time, if any of the distance function elements start. Therefore this should be the OR-combination of all

DELTA and distance zone starting signals. Such solution avoids potential trouble, if the scheme has been set e.g. zone Zp reach bigger than Z3 reach.

In distance timer operating mode “with general starting“, the zone 3 and zone 4 together are used as “impedance starting zone”. In this application, the scheme settings are defined so that these zones are reaching clearly beyond any other distance zones (Z1,

Z2, Zp, Zq). Also, in this scheme, their timers t3 and t4 won’t be used, but the end timers that are used are explained below.

Operating Mode “Timer Starting”

As already available in MiCOM P437 a special mode for the distance timer starting is part of the global distance settings. Two different timer modes can be configured:

Distance Zone Starting

Distance Gen. Starting

Within MiCOM S1 Studio, the settings are located in the Group 1 > Group 1 Distance

Setup section.

P54x/EN AP/Nd5 Page (AP) 6-27

(AP) 6 Application Notes Application of Individual Protection Functions

Distance Timer Starting using the Operating Mode

With configured DISTANCE GEN. STARTING the distance protection timer(s) is started with the active “DIST gen. starting” signal, independent from the zone starting information. In principle, one timer may be sufficient, but when using an existing device environment it is possible to start individual zone timers in parallel.

If a timer relating to a dedicated distance zone has elapsed, the distance protection checks whether the fault is inside this zone or not. If the fault is in this zone and the related timer has elapsed, the distance protection trips (with additional info that this zone tripped). If the zone timer has elapsed and the fault impedance “moves” into this zone

(e.g. because of remote CB opening), the distance protection trips too.

This functionality has been implemented for each of the 6 distance zones (including the new ZQ zone).

All timers are started when distance general starting picks up, and all timers are stopped and reset to zero when general starting resets. These timers are all independent from trip decisions.

Note The advantage of this functionality is a shorter fault clearance time in the case of evolving faults. If all timer stages run in parallel and the detected fault moves from an “outer zone” (e.g. zone 3) into an “inner zone” (e.g.

Zone P), the timer for the inner zone must not be started or re-started.

Note A potential disadvantage of this functionality is that fault clearance times may end up being too short to fit into the installed base.

End Timers

As described previously, the highest distance zones (for MiCOM P443/MiCOM P54x

Zone 3 and Zone 4) are used for backup functionality, and the zone timers are defined as end timers. Both of them are defined for a protection direction. So the timer for the zone in forward direction (zone 3) is defined as the directional (forward) end timer, a comparable definition can be created for the zone in backward direction.

However, in some locations schemes are expected to have a dedicated non-directional end timer. This non-directional end timer has an internal fixed logic, as shown here:

DIST t3 elapsed DIST dir. tEnd elaps.

DIST n.dir. tEnd elaps.

>=1

DIST t4 elapsed

P0686ENa

Figure 10 - Non-directional timer fixed logic

The above solution is very specific. It is preferable to implement the end timers as follows.

End timers by origin principle in mechanical relays were independent from distance zone measuring elements, to operate independently from these complex mechanics which might fail to operate. They were solely depending on general starting and directional relays. In numerical design, we have no “mechanical” (or electronic) independence, but the back-up protection philosophy of these end-timers is maintained (e.g. to avoid nonoperation due to too narrow zone settings).

Page (AP) 6-28 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

What is needed is:

General fault direction information (forward or backward).

It is not specified how the direction is determined, it could be DELTA or impedance based. Notably end timers are in the order of 1…3 s, so “slow” steady state based methods are suitable.

This direction information is generalized and not measurement loop selective. This means that any loop (impedance) measurement provides “fault impedance in forward zone”, the fault direction is “forward”. By this definition, “forward” and

“backward” directions could be present at the same time in case of e.g. crosscountry faults or intersystem faults on double-circuit lines.

One setting to determine the directional sense of the directional end timer.

Two end timer settings (0-10 s in steps of 0.1 s or smaller, and “blocked” setting)

Two signals indicating that the end timers elapsed. If such timer elapses, the DIST general trip signal shall be raised.

Fault forward & >1

Fault backward

DIST Direction tEnd

Forward directional

Backward directional

Non directional

&

DIST Gen. start t

DIST dir. tEnd

0

&

DIST dir. tEnd elaps.

t

DIST non-dir. tEnd

0

DIST non-dir. tEnd elaps.

P0687ENa

Figure 11 - Distance Protection logic

Distance Timer Stage Handling

In parallel to the existing distance protection trip signals each of the elapsed timer information has its own DDB numbers. It uses this information in special logical schemes

(using GOOSE traffic or IM64 signal exchange) or for simple signaling via PSL.

Distance Information

The elapsed timer information is checked to make sure it complies with communication standards.

The minimum requirement is related to the new distance zone ZQ. All zone information

(starting, trip, timer elapsed …) is provided for the communication protocols, mainly for the communication based on IEC 60870 and IEC 61850.

P54x/EN AP/Nd5 Page (AP) 6-29

(AP) 6 Application Notes

2.3

2.3.1

2.3.2

Application of Individual Protection Functions

Distance Protection and Aided DEF (Distance option only)

The MiCOM IED has, by ordering option, a comprehensive integrated distance protection

• package. This consists of:

Phase fault distance protection

Earth/ground fault distance protection

Power sing detection, alarm, and blocking

Out-of-step detection and tripping

Switch On To Fault (SOTF) and Trip On Reclose (TOR)

Directional Schemes

Aided schemes

These are described in the following sections and are marked as being applicable to the distance option only. If the distance option is not specified, the following features will not be applicable.

Note The Zone Q and General Starting features were introduced in Software H3.

Simple and Advanced Setting Mode (Distance option only)

The MiCOM P54x/P547 offers two setting modes for distance protection: “ Simple ” and

“ Advanced ”.

In the majority of cases, “ Simple ” setting is recommended, and allows the user merely to enter the line parameters such as length, impedances and residual compensation. Then, instead of entering distance zone impedance reaches in ohms, zone settings are entered in terms of percentage of the protected line . This makes the relay particularly suited to use along with any installed LFZP Optimho relays, as the reduced number of settings mimics the Autocalc facility within Opticom software.

The “ Advanced ” setting mode is recommended for the networks where the protected and adjacent lines are of dissimilar construction, requiring independent zone characteristic angles and residual compensation. In this setting mode all individual distance ohmic reach and residual compensation settings and operating current thresholds per each zone are accessible. This makes the relay adaptable to any specific application.

Line Parameters Settings (Distance option only)

It is essential (especially when using the “simple” setting mode) that the data relating to

100% of the protected line is entered here. Take care to input the Line Impedance that correctly corresponds to either Primary or Secondary, whichever has been chosen as the basis for Settings Values in the Configuration column.

Page (AP) 6-30 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.3

2.3.4

2.3.5

(AP) 6 Application Notes

Residual Compensation for Earth/Ground Faults (Distance option only)

For earth faults, residual current (derived as the vector sum of phase current inputs

(Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. Therefore, the earth loop reach of any zone must generally be extended by a multiplication factor of

(1 + kZN) compared to the positive sequence reach for the corresponding phase fault element.

Caution The kZN Angle is different than previous LFZP, SHNB, and

LFZR relays: When importing settings from these older products, subtract. angle

Z1.

Mutual Compensation for Parallel Lines

Typically a mutual cut off factor of 1.5 is chosen to give a good margin of safety between the requirements of correct mutual compensation for faults inside the protected line and eliminating misoperations for faults on the adjacent line.

Selection of Starting Behaviour

With Software H3 and later the zone timer starting is selectable either 'Zone Start'

(default) and 'General Start'. Before Software H3 only the 'Zone Start' behaviour is implemented.

The choice of the starting behaviour will be defined by the transmission or distribution system operator’s philosophy. Zone starting is commonly used in English distance philosophy regions (for example, the UK, Spain and South America) while general starting is mainly used in German speaking countries and Poland.

The advantage of using ‘General Starting’ is a shorter fault clearance time in the case of evolving faults. If all timer stages run in parallel and the detected fault moves from an

“outer zone” (e.g. zone 3) into an “inner zone” (e.g. Zone 2), the timer for the inner zone must not be started or re-started. A potential disadvantage of this selection is that fault clearance times may end up being too short to fit into the installed base.

End Timers

End timers by origin principle in mechanical relays were independent from distance zone measuring elements, to operate independently from these complex mechanics which might fail to operate. They were solely depending on general starting and directional relays. In numerical design, we have no “mechanical” (or electronic) independence, but the back-up protection philosophy of these end-timers is maintained (e.g. to avoid nonoperation due to too narrow zone settings).

Application Example for an Underimpedance Starting Scheme (Software H3 and later)

For a distance protection application 3 zones in forward direction and 2 zones in reverse direction are requested. In addition a non-directional and a directional backup protection using End timers are needed. A polygonal characteristic shall be used.

P54x/EN AP/Nd5 Page (AP) 6-31

(AP) 6 Application Notes

-35

Application of Individual Protection Functions

-25

The application can be solved in P44y/P54x using all six zones (see figure below):

Polygonal tripping zones

 Zone 1, 2 and P in forward direction

 Zone 4 and Q in reverse direction

Underimpedance starting (non-directional)

 Zone 3 with offset enabled covering all other zones (highest zone reach)

 Zone 3 tripping disabled

 Load blinder settings effecting Zones 3

Starting behaviour is ‘General Start’ using both End Timers (Non-directional and directional)

35 j X

25

15

Load Blinder

Zone 1

Zone 2

Zone 3

Zone 4

Zone P

Zone Q

5

-15 -5

-5

5 15 25

R

35

-15

-25

-35

Figure 12 - Zone reach setting with load blinders and underimpedance starting for application example

Page (AP) 6-32 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.6

2.3.6.1

(AP) 6 Application Notes

Selection of Distance Operating Characteristic

In general, these characteristics are recommended:

Short line applications: Mho phase fault and quadrilateral earth fault zones.

Open delta (vee-connected) VT applications: Mho phase fault, with earth fault distance disabled, and directional earth fault only used for earth fault protection.

Series compensated lines: Recommend always to use mho characteristics for both phase and earth faults.

Phase Characteristic

This phase characteristic selection is common to all zones, allowing mho or quadrilateral selection. Generally, the characteristic chosen will match the utility practice. If applied for line protection similarly to LFZP Optimho, LFZR, SHNB Micromho or SHPM Quadramho models in the Schneider Electric range, a mho selection is recommended. For cable applications, or to set similarly to the MiCOM P441/P442/P444 models, a quadrilateral selection is recommended.

The following figure shows the basic settings needed to configure a forward-looking mho zone, assuming that the load blinder is enabled.

Variable mho expansion by polarizing ratio

Zone Reach Z

Time

Delay t

Line

Angle

Load

Blinder

Angle

Blinder Radius

P1725ENa

Figure 13 - Settings required to apply a Mho zone (Distance option only)

The following figure shows the basic settings needed to configure a forward-looking quadrilateral zone (blinder not shown).

P54x/EN AP/Nd5 Page (AP) 6-33

(AP) 6 Application Notes

2.3.6.2

2.3.7

Application of Individual Protection Functions

Zone Reach

Z

Tilt

Angle

Time

Delay t

Line

Angle

Resistive

Reach

R

P1726ENa

Figure 14 - Settings required to apply a quadrilateral zone (Distance option only)

Ground Characteristic

In general, the same setting philosophy would be followed for ground distance protection as is used for the phase elements. This selection is common to all zones, allowing mho or quadrilateral selection and generally, the characteristic chosen will match the utility practice. If applied for long and medium length line protection similarly to LFZP Optimho,

LFZR, SHNB Micromho or SHPM Quadramho models in the Schneider Electric range, a mho selection is recommended. For cable applications, or to set similarly to the MiCOM

P441/P442/P444 models, a quadrilateral selection is recommended.

Quadrilateral ground characteristics are also recommended for all lines shorter than 10 miles (16 km). This is to ensure that the resistive fault arc coverage is not dependent on mho circle dynamic expansion, but will be a known set value.

Zone Reaches - Recommended Settings

The Zone 1 elements of a distance relay should be set to cover as much of the protected line as possible, allowing instantaneous tripping for as many faults as possible. In most applications the zone 1 reach (Z1) should not be able to respond to faults beyond the protected line. For an underreaching application the zone 1 reach must therefore be set to account for any possible overreaching errors. These errors come from the relay, the

VTs and CTs and inaccurate line impedance data. It is therefore recommended that the reach of the zone 1 distance elements is restricted to 80% of the protected line impedance (positive phase sequence line impedance), with zone 2 elements set to cover the final 20% of the line.

The Zone 2 elements should be set to cover the 20% of the line not covered by zone 1.

Allowing for underreaching errors, the zone 2 reach (Z2) should be set in excess of 120% of the protected line impedance for all fault conditions. Where aided tripping schemes are used; fast operation of the zone 2 elements is required. It is therefore beneficial to set zone 2 to reach as far as possible, such that faults on the protected line are well within reach. A constraining requirement is that, where possible, zone 2 does not reach beyond the zone 1 reach of adjacent line protection. For this reason the zone 2 reach should be set to cover

50% of the shortest adjacent line impedance, if possible.

Page (AP) 6-34 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

The Zone 3 elements would usually be used to provide overall back-up protection for adjacent circuits. The zone 3 reach (Z3) is therefore set to approximately 120% of the combined impedance of the protected line plus the longest adjacent line. A higher apparent impedance of the adjacent line may need to be allowed where fault current can be fed from multiple sources or flow via parallel paths.

Zone 3 may also be programmed with a slight reverse (“rev”) offset, in which case its reach in the reverse direction is set as a percentage of the protected line impedance too.

This would typically provide back-up protection for the local busbar, where the offset reach is set to 20% for short lines (<30 km) or 10% for longer lines.

Zone P is a reversible directional zone. The setting chosen for Zone P, if used at all, will depend upon its application. Typical applications include its use as an additional time delayed zone or as a reverse back-up protection zone for busbars and transformers. Use of zone P as an additional forward zone of protection may be required by some users to line up with any existing practice of using more than three forward zones of distance protection.

The Zone 4 elements may also provide back-up protection for the local busbar. Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive

Overreach schemes, zone 4 must reach further behind the relay than zone 2 for the remote end relay. In such cases the reverse reach should be as below (depends on characteristic used):

Mho: Z4

((Remote zone 2 reach) x 120%)

Quadrilateral: Z4

((Remote zone 2 reach) x 120%) minus the protected line impedance

Note In the case of the mho, the line impedance is not subtracted. This ensures that whatever the amount of dynamic expansion of the circle, the reverse looking zone will always detect all solid and resistive faults capable of detection by zone 2 at the remote line end.

P54x/EN AP/Nd5 Page (AP) 6-35

(AP) 6 Application Notes

2.3.8

2.3.9

Application of Individual Protection Functions

Quadrilateral Phase Resistive Reaches

Two setting modes are possible for resistive reach coverage:

Common In this mode, all zones share one common fault resistive reach setting

Proportional With this mode, the aspect ratio of (zone reach): (resistive reach) is the same for all zones. The “Fault Resistance” defines a reference fault at the remote end of the line, and depending on the zone reach percentage setting, the resistive reach will be at that same percentage of the Fault Resistance set. For example, if the zone 1 reach is 80% of the protected line, its resistive reach will be 80% of the reference “Fault Resistance”.

Proportional setting is used to mimic Germanic protection practice, and to avoid zones being excessively broad (large resistive reach width compared to zone reach length). In general, for easiest injection testing, the aspect ratio of any zone is best within the 1:15 range:

1/15th

Z reach / R reach setting

15

The resistive reach settings (RPh and RG) should be selected according to the utility practice. If no such guidance exists, a starting point for Zone 1 is:

Cables

Overhead lines

Choose Resistive Reach = 3 x Zone 1 reach

Choose Resistive Reach according to the following formula:

Resistive reach = [2.3 - 0.0045 x Line length (km)] x Zone 1 reach

Lines longer than 400 km Choose: 0.5 x Zone 1 reach

Quadrilateral Ground Resistive Reaches and Tilting

Note Because the fault current for a ground fault may be limited by tower footing resistance, high soil resistivity, and weak infeeding; any arcing resistance is often higher than for a corresponding phase fault at the same location. It maybe necessary to set the RG ground resistive settings to be higher than the RPh phase setting (i.e. boosted higher than the rule of thumb described previously). A setting of RG three times that of RPh is not uncommon.

The P443/P446/P54x/P547 allows two different methods of tilting the top reactance line:

Automatic adjustment of the top reactance line angle

Fix setting of the top line that will over-ride dynamic tilting

Both methods are detailed in the Operation chapter.

Page (AP) 6-36 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.9.1

(AP) 6 Application Notes

Dynamic Tilting:

Medium/ Long Lines:

In the case of medium and long line applications where Quad distance ground characteristic is used, the recommended setting is ‘Dynamic tilt’ enabled at starting tilt angle of -3° (as per default settings). The -3° is set to compensate for possible CT/VT and line data errors.

For high resistive faults during power exporting, the under-reaching zone 1 is only allowed to tilt down by the angle difference between the faulted phase and negative sequence current

(Iph-I2) starting from the –3° set angle. This ensures stability of zone

1 for high resistance faults beyond the zone 1 reach even during heavy load conditions

(high load angle between two voltage sources) and sufficient sensitivity for high resistance internal faults. The tilt angle for all other zones (that are by nature overreaching zones) will remain at -3 deg.

In the case of power importing, zone 1 will remain at –3° whilst all other zones will be allowed to tilt up by the

(Iph-I2) angle difference, starting from –3°. This will increase the zone 2 and zone 4 resistive reaches and secure correct operation in POR and blocking type schemes.

Short Lines:

For very short lines, typically below 10 Miles (16 km), the ratio of resistive to reactance reach setting (R/X) could easily exceed 10. For such applications the geometrical shape of the Quad characteristic could be such that the top reactance line is close or even crosses the resistive axis as shown below:

The below illustration shows an example of high resistive zone 1 fault that falls outside zone 1 characteristic when the starting tilt angle of -3° is set (over-tilting effect). (Distance option only)

In the case of high resistance external faults on a short line, particularly under heavy power exporting conditions, zone 1 will remain stable due to dynamic downwards tilting of the top line as explained earlier but the detection of high resistance internal faults especially towards the end of the line needs consideration. In such applications a user has a choice to either detect high resistance faults using highly sensitive Aided DEF or

Delta Directional schemes or to clear the fault with distance ground protection. If distance is to operate, it is necessary to eliminate over-tilting for internal faults by reducing the initial -3° tilting angle to zero so that the overall top line tilt will equal to

(Iph-I2) angle only.

As shown in the above illustration, the internal resistive fault will then fall in the zone 1 operating characteristic. However, it should be noted that for short lines the load angle is relatively low when compared to long transmission lines for the same transfer capacity and therefore the top line dynamic tilting may be moderate. Therefore it may be necessary to reduce the zone one reach to guarantee zone 1 stability. This is particularly recommended if distance is operating in an aided scheme. To summarize, for very short lines with large R/X setting ratios, it is recommended to set the initial tilt angle to zero and zone 1 reach to 70-75% of the line impedance.

Note The above discussion assumes homogenous networks where the angle of the negative sequence current derived at relaying point is very close to the total fault current angle. If the network is non-homogenous, there will be a difference in angle that will cause inaccurate dynamic tilting, hence in such networks either quad with fixed tilt angle or even Mho characteristic should be considered in order to avoid zone 1 over-reach.

P54x/EN AP/Nd5 Page (AP) 6-37

(AP) 6 Application Notes Application of Individual Protection Functions jX

High resistive internal fault

Total dynamic tilt starting from zero

Total dynamic tilt starting from -3°

Z1

Line angle

-3°

Iph-I2

Iph-I2

R

Figure 15 - Example of a high resistive zone 1 fault that falls outside zone 1 characteristic when the starting tilt angle of -3 ° is set (over-tilting effect)

P2360ENa

Fixed Tilt Angle:

As an alternative to Dynamic tilting, a user can set a fixed tilt angle. This is applicable to applications where the power flow direction is unidirectional.

Exporting End:

To secure stability, the tilt angle of zone 1 at exporting end has to be set negative and above the maximum angle difference between sources feeding the resistive faults. This data should be known from load flow study, but if unavailable, the minimum recommended setting would be the angle difference between voltage and current measured at local end during the heaviest load condition coupled with reduced zone 1 reach of 70-75% of the line impedance.

Note The previous illustration of a high resistive zone 1 fault shows that at sharp fixed tilt angle, the effective resistive coverage would be significantly reduced, and therefore for the short lines the dynamic tilting (with variable tilt angle depending on fault resistance and location) is preferred. For all other over-reaching zones set tilting angle to zero.

Importing End:

Set zone 1 tilt angle to zero and for all other zones the typical setting should be positive and between +(5-10)°.

Note The setting accuracy for over-reaching zones is not crucial because it will not pose a risk for relay’s maloperation, the purpose is only to boost zone 2 and zone 4 reach and improve distance aided schemes.

Page (AP) 6-38 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.10

2.3.11

2.3.12

(AP) 6 Application Notes

Phase Fault Zone Settings

Each zone has two additional settings that are not accessible in the Simple set mode.

These settings are:

A tilt angle on the top line of any quadrilateral set for phase faults;

A minimum current sensitivity setting.

By factory defaults, the Top Line of quadrilateral characteristics is not fixed as a horizontal reactance line. To account for phase angle tolerances in the line CT, VT and relay itself, the line is tilted downwards, at a “ droop ” of –3°. This tilt down helps to prevent zone 1 overreach.

The fixed Tilt setting on the phase elements may also be used to compensate for overreach effects when prefault heavy load export was flowing. In such cases, fault arc resistance will be phase shifted on the impedance polar plot, tilting down towards the resistive axis (i.e. not appearing to be fully resistive in nature). For long lines with heavy power flow, the Zone 1 top line might be tilted downwards within the range –5 to –15°, mimicking the phase shift of the resistance.

Note

Note

A minus angle is used to set a downwards tilt gradient, and a positive angle to tilt upwards. mho characteristics have an inherent tendency to avoid unwanted overreaching, making them very desirable for long line protection, and one of the reasons for their inclusion within the MiCOM P443/P446/P54x/P547 relay.

The current Sensitivity setting for each zone is used to set the minimum current that must be flowing in each of the faulted phases before a trip can occur. It is recommended to leave these settings at their default. The exception is where the relay is made more insensitive to match the lesser sensitivity of older relays existing on the power system, or to grade with the pickup setting of any ground overcurrent protection for tee-off circuits.

Distance Directional Principle and Setup

Delta Directional - Selection of RCA

Distance zones are directionalized by the delta decision. For delta directional decisions, the RCA settings must be based on the average source + line impedance angle for a fault anywhere internal or external to the line. Typically, the Delta Char Angle is set to 60°, as it is not essential for this setting to be precise. When a fault occurs, the delta current will never be close to the characteristic boundary, so an approximate setting is good enough.

The 60° angle is associated with mainly inductive sources and will work perfectly well for most applications. However, in series compensated line applications where the capacitor is physically located behind the line VT the Delta directional characteristic angle needs adjusting. In such applications the capacitor is included in the equivalent source impedance and the overall source impedance as seen by the relay will become predominantly capacitive if the inductance of the source (normally strong source) is less than the capacitor value. In this case, the calculated operating angle during an internal fault may not fall within the default 60° delta directional line operating boundary and that could potentially lead to an incorrect (reverse) directional decision. A zero degree shift will be most suitable for such a fault, but the constraining factor is the case of external faults for which the source is always inductive regardless of the degree of compensation and for which the 60° shift is most appropriate. To ensure correct, reliable and fast operation for both fault locations in case of predominantly capacitive source, a Delta Char Angle setting of 30° is strongly recommended .

P54x/EN AP/Nd5 Page (AP) 6-39

(AP) 6 Application Notes

2.3.13

2.3.13.1

2.3.13.2

2.3.13.3

2.3.14

Application of Individual Protection Functions

Distance Setup - Filtering, Load Blinding and Polarizing

Digital Filtering

In most applications, it is recommended that Standard filtering is used. This will ensure that the relay offers fast, sub-cycle tripping. In certain rare cases, such as where lines are immediately adjacent to High Voltage DC (HVDC) transmission, the current and voltage inputs may be severely distorted under fault conditions. The resulting non-fundamental harmonics could affect the reach point accuracy of the relay. To prevent the relay being affected, a ‘ Special’ set of filters are available.

Note When using the long line filter the instantaneous operating time is increased by about a quarter of a power frequency cycle.

CVTs with Passive Suppression of Ferroresonance

Set a Passive CVT filter for any type 2 CVT (those with an anti-resonance design). An

SIR cutoff setting needs to be applied, above which the relay operation is deliberately slowed by a quarter of a cycle. A typical setting is SIR = 30 , below which the relay will trip sub-cycle, and if the infeed is weak the CVT filter adapts to slow the relay and prevent transient overreach.

CVTs with Active Suppression of Ferroresonance

Set an Active CVT filter for any type 1 CVT.

Load Blinding (Load Avoidance)

For security, it is highly recommended that the blinder is Enabled, especially for lines above 150 km (90 miles), to prevent non-harmonic low-frequency transients causing load encroachment problems, and for any networks where power swings might be experienced.

The impedance radius must be set lower than the worst-case loading, and this is often taken as 120% overloading in one line, multiplied by two to account for increased loading during outages or fault clearance in an adjacent parallel circuit. Then an additional allowance for measuring tolerances results in a recommended setting typically 1/3rd (or even 1/4th in some countries such as UK) of the rated full load current:

Z

(Rated phase voltage Vn)/(I

FLC

x 3)

When the load is at the worst-case power factor, it should remain below the beta setting.

So, if we assume a typical worst-case 0.85 power factor, then:

β ≥

Cos-1 (0.85) plus 15° margin

47°

And, to ensure that line faults are detected,

β ≤

(Line Angle -15°).

In practice, an angle half way between the worst-case leading load angle, and the protected line impedance angle, is often used.

Page (AP) 6-40 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.14.1

2.3.15

(AP) 6 Application Notes

The MiCOM P443/P445/P446/P54x/P547 has a facility to allow the load blinder to be bypassed any time the measured voltage for the phase in question falls below an undervoltage V< setting. Under such circumstances, the low voltage could not be explained by normal voltage excursion tolerances on-load. A fault is definitely present on the phase in question, and it is acceptable to override the blinder action and allow the distance zones to trip according to the entire zone shape. The benefit is that the resistive coverage for faults near to the relay location can be higher.

The undervoltage setting must be lower than the lowest phase-neutral voltage under heavy load flow and depressed system voltage conditions. The typical maximum V< setting is 70% Vn .

Recommended Polarizing Settings

Cable applications In line with LFZP123 or LFZR applications for cable feeders, use only minimum 20% (0.2) memory, which results in minimum mho expansion. This keeps the protected line section well within the expanded mho, thereby ensuring better accuracies and faster operating times for close-up faults.

Series compensated lines

Short lines

Use a mho with maximum memory polarizing

(setting = 5). The large memory content will ensure correct operation even with the negative reactance effects of the compensation capacitors seen either within

Zs, or within the line impedance.

For lines shorter than 10 miles (16 km), or with an SIR higher than 15, use maximum memory polarizing

(setting = 5). This ensures sufficient characteristic expansion to cover fault arc resistance.

General line applications Use any setting between 0.2 and 1.

Distance Elements Basic Scheme Setting

The Zone 1 time delay (tZ1) is generally set to zero, giving instantaneous operation.

The Zone 2 time delay (tZ2) is set to co-ordinate with zone 1 fault clearance time for adjacent lines. The total fault clearance time will consist of the downstream zone 1 operating time plus the associated breaker operating time. Allowance must also be made for the zone 2 elements to reset following clearance of an adjacent line fault and also for a safety margin. A typical minimum zone 2 time delay is of the order of 200 ms.

The Zone 3 time delay (tZ3) is typically set with the same considerations made for the zone 2 time delay, except that the delay needs to co-ordinate with the downstream zone

2 fault clearance. A typical minimum zone 3 operating time would be in the region of

400 ms.

The Zone 4 time delay (tZ4) needs to co-ordinate with any protection for adjacent lines in the relay’s reverse direction.

P54x/EN AP/Nd5 Page (AP) 6-41

(AP) 6 Application Notes Application of Individual Protection Functions

Note (1) The MiCOM P443/P445/P446/P54x/P547 allows separate time delays to be applied to both phase and ground fault zones, for example where ground fault delays are set longer to time grade with external ground/earth overcurrent protection.

Note (2) Any zone (“#”) which may reach through a power transformer reactance, and measure secondary side faults within that impedance zone should have a small time delay applied. This is to avoid tripping on the inrush current when energizing the transformer. As a general rule, if: Z# Reach setting >

50% XT transformer reactance, set: tZ#

100 ms. Alternatively, the 2nd harmonic detector that is available in the Programmable Scheme Logic may be used to block zones that may be at risk of tripping on inrush current.

Settings for the inrush detector are found in the SUPERVISION menu column.

Figure 15 shows the typical application of the Basic scheme.

Zone 3

Zone 2

A

Zone 1

Z

B

Z

Zone 1

Zone 2

Zone 3

Z1

TZ1

Typical application

Relay A Relay B

1 Trip A

Trip B

1

ZP

TZP

Z2

TZ2

Z3

TZ3

Z4

TZ4

Note: All timers can be set instantaneous

Figure 16 - Basic time stepped distance scheme

TZ1

TZP

TZ2

TZ3

TZ4

Z1

Z3

Z4

ZP

Z2

P1144ENb

Page (AP) 6-42 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.16

(AP) 6 Application Notes

Power Swing Alarming and Blocking

Power Swing Blocking (PSB) is used to set either blocking or indication for out-of-step conditions. If blocking mode is selected, a user can individually select for each zone to be either blocked or allow tripping. The power swing detection is based on superimposed current, and is largely settings free.

The PSB Unblock Dly function allows any power swing block to be removed after a set period of time. For a persistent swing that does not stabilize, any blocked zones will be made free to trip once the timer has elapsed. In setting which relays will unblock, the user should consider which relay locations are natural split points for islanding the power system.

The PSB technique employed in the MiCOM P443/P445/P446/P54x/P547 has the significant advantage that it is adaptive and requires no user-set thresholds in order to detect swings faster than 0.5 Hz. The PSB relies on the delta techniques internal to the relay, which automatically detect swings. During the power oscillations slower than 0.5 Hz the continuous

∆I phase current integral to the detection technique for swing conditions may fall below the sensitive threshold of

∆I=0.05 In therefore may not operate. These slow swings will usually occur following sudden load changes or single pole tripping on the weaker systems where the displacement of initial power transfer is not severe. The slow swings of up to 1 Hz are by its nature recoverable swings but the swing impedance may stay longer inside the distance characteristics until the oscillations are damped by the power system. Therefore, to guarantee system stability during very slow swings it is recommended to set a blinder to complement the automatic, setting free detection algorithm. Zone 5 is used as a blinder for slow swing detection as well as for the Out-of-

Step (OST) protection described in the next section. Zone 5 settings are therefore visible even if OST protection is disabled. The slow swing condition will be declared if positive sequence impedance is detected inside zone 5 for more than a cycle without phase selection operation. The slow swing detection operates in parallel to automatic swing detection mechanism.

No system calculation is needed for zone 5 setting, it is only important to set zone 5 smaller than the minimum possible load impedance with a security margin:

In case the OST is enabled the R5, R5’, Z5 and Z5’ settings will be adequate for very slow swing detection. If, however, the OST protection is disabled, set:

R5=R5’=0.85 x Z<

Z5=Z5’=2 x Zline where Z< is load blinder radius determined in the Load Blinding (Load Avoidance) section.

The user decides which zones are required to be blocked.

Two timers are available:

The PSB Reset Delay is used to maintain the PSB status when

I naturally is low during the swing cycle (near the current maxima and minima in the swing envelope). A typical setting of 0.2s is used to seal-in the detection until

I has chance to appear again.

The PSB Unblock Dly is used to time the duration for which the swing is present.

The intention is to allow the distinction between a stable and an unstable swing. If after the timeout period the swing has still not stabilized, the block for selected zones can be released (“unblocking”), giving the opportunity to split the system. If no unblocking is required at the location of this relay, set to maximum.

The maximum value of the PSB Unblock Dly setting has been increased from 10 seconds to 20 seconds.

P54x/EN AP/Nd5 Page (AP) 6-43

(AP) 6 Application Notes

2.3.17

2.3.18

Application of Individual Protection Functions

PSB can be disabled on distribution systems, where power swings would not normally be experienced.

Out-of-Step Protection

The MiCOM P443/P446/P54x/P547 provides an integrated Out-of-STep (OST) protection, therefore avoiding a need for a separate stand alone Out-of-Step relays.

Unlike the power swing detection, the OST protection requires settings and is completely independent from the setting free Power swing detection.

This section provides a discussion and a guidance of how to set the OST protection.

Settings based on system studies must be applied when ‘ Predictive OST ’ operation mode is selected as the high setting accuracy is needed to avoid premature system splitting in the case of severe power oscillations that do not lead to pole slip conditions.

For the OST setting the same method may be used but an exhaustive stability study may not be required as it will be shown later that the total system impedance ZT and system split points are adequate to set the relay for this scenario.

The MiCOM P443/P446/P54x/P547 OST protection can operate as a stand alone protection, i.e. Distance protection may be completely disabled under Configuration column.

Critical Stability Angle

What is the angle between two ends when a power system oscillation could be declared as a pole slip? Consider the power angle curves as in shown in the figure below.

The figure represents power angle curves, with no AR being performed, as follows:

Curve 1 - Pre-fault system operation via parallel lines where transmitted power is

Po

Curve 2 - Transmitted power significantly reduced during two-phase to ground fault

Curve 3 - New power curve when the parallel line is tripped (fault cleared)

Page (AP) 6-44 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

P54x/EN AP/Nd5

Phase Angle Difference between Two Ends

P1974ENb

Figure 17 - Po wer transfer in relation to angle difference θ between 2 ends

It can be seen that at a fault instance, the operating point A moves to B, with a lower transfer level. There is therefore a surplus of power

P=AB at the sending end and the corresponding deficit at the receiving end. The sending end machines start to speed up, and the receiving end machines to slow down, so phase angle θ increases, and the operating point moves along curve 2 until the fault is cleared, when the phase angle is θ1.

The operating point now moves to point D on curve 3 which represents one line in service. There is still a power surplus at the sending end, and deficit at the receiving end, so the machines continue to drift apart and the operating point moves along curve 3. If, at some point between E and G (point F) the machines are rotating at the same speed, the phase angle will stop increasing. According to the Equal Area Criterion, this occurs when area 2 is equal to area 1. The sending end will now start to slow down and receiving end to speed up. Therefore, the phase angle starts to decrease and the operating point moves back towards E. As the operating point passes E, the net sending end deficit again becomes a surplus and the receiving end surplus becomes a deficit, so the sending end machines begin to speed up and the receiving end machines begin to slow down.

With no losses, the system operating point would continue to oscillate around point E on curve 3, but in practice the oscillation is dumped, and the system eventually settles at operating point E.

To resume, if area 1<area 2, the system will stay in synchronism. This swing is usually called a recoverable power swing . If, on contrary, the system passes point G with a further increase in angle difference between sending and receiving ends, the system drifts out of synchronism and becomes unstable. This will happen if the initial power transfer Po was set too high in the Power transfer diagram shown above, so that the area

1 is greater than area 2. This power swing is not recoverable and is usually called out of step or out of synchronism or pole slip condition. After this, only system separation and re-synchronizing of the machines can restore normal system operation.

Page (AP) 6-45

(AP) 6 Application Notes

2.3.18.1

Application of Individual Protection Functions

In the Power transfer diagram shown above, the point G is shown at approximately 120° deg, but it is not true in all cases. If, for example the pre-fault transmitted power (Po) was too high and if the fault clearance was slow, the area 1 will be greater so for the system to recover the angle

θ would be close to 90 deg. On contrarily, if the pre-fault transmitted power Po was low and fault clearance fast, the area 1 will be small, so that based on area comparison, the angle θ could go closer to 180 deg and the system will still remain stable.

The actual angle difference at which system will become unstable could only be determined by a particular system studies, but for the purpose of settings recommendation where ‘ OST’ setting is selected, the typical angle beyond which system will not recover is assumed to be 120 deg.

Setting Option Recommendation

The relay provides these different setting options:

Disabled

Predictive OST

OST

Predictive OST or OST

Set Option 1 on all lines except the line where tripping due to unrecoverable power oscillations is required or for the system where power oscillations are not severe - mainly in well interconnected systems operating with 3-phase tripping.

Setting Option 2 (and 4) is the best setting option from the system point of view, perhaps not being widely used in the past. Some utilities prefer an early system split to minimize the angle shift between ends and maximize the chances for the remaining two halves to stabilize as quickly as possible. Special care must be taken when this method is applied to ensure that the actual circuit breaker opening does not occur when the internal voltages at two ends are in anti phase. This is due to the fact that most breakers are not designed to interrupt at double nominal voltage and any attempt to break at that point would lead to flash over and possible circuit breaker damage. The fact is that setting

Option 2 (and 4) will be mainly applied do detect and trip fast power oscillations. When this is coupled with a typical 2 cycle circuit breaker operating time, the two voltages angles may rapidly move in opposite directions at the time of opening the circuit breaker.

Therefore, if this setting option is chosen, the above facts must be taken into account so that the actual CB opening must occur well before the angle difference between two ends approaches 180 degrees. On that basis, accurate settings have to be determined based on exhaustive system studies.

Setting Option 3 is the most commonly used approach. Once the Out-of-Step conditions are detected, the OST command will split the system at pre-determined points. The slight disadvantages of this method in comparison to Option 2 (and 4) is that the power oscillation will escalate further, thus causing more difficulties for the split parts to remain stable but the advantage is that the timing of the circuit breaker operation (‘tripping angle’) is easily controlled and the decision to split the system will be correct even if errors were made in the system data and setting parameters. This extra security is achieved by measuring and confirming the change of polarity of the resistive part of positive sequence impedance on zone 5 exit (reset).

Setting Option 4 provides 2 stages of Out-of-Step detection and tripping. If the power system oscillation is very fast, the combination of ∆R and Delta t setting (as discussed below) must be set in such a way that ‘Predictive OST’ operates. If however the oscillation is slower, the condition for the ‘Predictive OST’ will not be met and the ‘OST’ will operate later upon Z5 reset, providing that the change in polarity of the resistive component was detected. This is to distinguish between a slower non-recoverable oscillation and recoverable swings.

Page (AP) 6-46 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.18.2 Blinder Limits Determination

(AP) 6 Application Notes

+jX

Z6

Z5

Out of step trip

R6' R5'

ZT

ZL

ZS

ZR

Θ

α

R5 R6

Predictive Out of step trip

R

Z5'

Z6'

P1975ENa

Figure 18 - Setting determination for the positive sequence resistive component R5

Consider the Out of Step characteristic versus angle θ between two ends. The following figure shows the setting determination for the positive sequence resistive component R5

(P443/P446/P547 or P54x (for Distance option only)).

Firstly, determine the minimum inner resistive reach R5.

ZT

R5min = tan

2

Θ

2

Where ZT is a total system positive sequence impedance that equals to ZS + ZL + ZS, where ZS and ZR are equivalent positive sequence impedances at the sending and receiving ends and ZL positive sequence line impedance. ‘θ’ is an angle difference between the internal voltages at sending and receiving ends beyond which no system recovery is possible.

The next step is to determine the maximum (limit value) for the outer resistive reach R6. It must be insured that Point A in the R6

MAX

determination diagram below does not overlap with the load area for the worst assumed power factor of 0.85 and the lowest possible ZT angle α.

P54x/EN AP/Nd5 Page (AP) 6-47

(AP) 6 Application Notes Application of Individual Protection Functions

R6'

+jX

Z6

O

ZT

32

°

β

A

α

R6

LOAD

R

Z6'

P1976ENa

Figure 19 - R6

MAX

determination

β = 32 + 90 – α

Z load min = OA

R6MAX < Zload min x cos β

Where:

Zload min is the minimum load impedance radius calculated above which already has built in sufficient margin

32 deg is the load angle that corresponds to the lower power factor of 0.85

‘α’ is the load blinder angle that matches ZT angle

The setting of negative resistance R5’ should equal the R5 to accommodate the ‘load import’ condition. Starting from the limit values R5

MIN

and R6

MAX

the actual R5 and R6

(including the corresponding R5’ and R6’) reaches will be set in conjunction with the

‘Delta t’ setting below.

Note R6

MAX

reach must be greater than the maximum resistive reach of any distance zone to ensure correct initiation of the 25 ms and ‘Delta t’ timers.

However, the R5

MIN

reach could be set below the distance maximum resistive reach (inside the distance characteristic) if an extensive resistive coverage is required, meaning that Out of Step protection does not pose a restriction to the quad applications.

Setting of reactance lines Z5 and Z6 will depend on how far from the relay location the power oscillations are to be detected. Normally, there is only one point where the system is to be initially split and that point will be determined by system studies. For that reason, the Out of Step protection must be enabled at that location and disabled on all others. To detect the Out of step conditions, the Z5’-Z5 and Z6’-Z6 setting must be set to comfortably encompass the total system impedance ZT, as shown in the Setting determination for the positive sequence resistive component R5 diagram. Typical setting could be:

Z5 = Z5’ = 1/2 x 2 ZT = ZT

The Z6 and Z6’ setting is not of great importance and could be set to Z6 = Z6’ = 1.1 x Z5

Page (AP) 6-48 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.18.3

(AP) 6 Application Notes

Delta t, R5 and R6 Setting Determination

The R5MIN and R6MAX settings determined above are only limit values, the actual R5 and R6 need to be determine in relation to the ‘ Delta t ’ timer.

Predictive OST setting:

For the ‘Predictive OST’ setting it is important to:

Set R6 (and R6’) equal to R6

MAX

Set R5 as close as practical to R6

MAX

The aim of pushing the R5 setting to the right is to detect the fast oscillation as soon as possible to gain sufficient time to operate the breaker before the two source voltages are in opposite direction. The only restriction would be the limitation of the ‘ Delta t ’ minimum time delay of 30 ms and the speed of oscillation. Set ‘ Delta t ’ so that the following condition is satisfied:

‘Delta t’ does not expire after positive sequence impedance has passed the R6-R5 region

For this setting, knowledge of the accurate rate of change of swing impedance when crossing the R6-R5 region is essential and therefore must be based on system studies.

Assumption that the rate of change of the positive sequence impedance during crossing the R6-R5 region is average rate of change for the whole swing cycle is wrong and could easily lead to incorrect ‘ Predictive OST ’ operation.

Note For the fault, the R6-R5 region will be passed faster than 25 ms, therefore even very fast oscillations of 7 Hz will not be mistaken with the fault condition and ‘Predictive OST’ will not operate.

OST Setting:

For the ‘OST’ setting option the precise setting of blinders and ‘ Delta t ’ is not necessary.

This is based on the fact that:

The wider the ∆R region and the shorter the ∆t setting, any oscillation will be successfully detected.

The only condition is that the fault impedance must pass through the ∆R region faster than ∆t setting.

Therefore, for the ‘ OST

’ setting assume that θ = 120° and set:

R5 = R5’ = R5

MIN

= ZT/3.46

R6 = R6’ = R6

MAX

Delta t = 30 ms

The point is that ‘ Delta t ’ always expires, therefore the above setting will secure the detection of a wide range of oscillations, starting from very slow oscillations caused by recoverable swings up to the fastest oscillation of 7 Hz. It should be noted that any fault impedance will pass the R6-R5 region faster than the minimum settable ‘ Delta t ’ time of

30 ms.

Predictive OST or OST setting:

As per ‘Predictive OST’ above.

P54x/EN AP/Nd5 Page (AP) 6-49

(AP) 6 Application Notes

2.3.18.4

2.3.18.5

2.3.18.6

C

Application of Individual Protection Functions

Tost (Trip Delay) Setting

Tost must be set zero for setting Option 2 and 4 above.

For setting Option 3, Tost should normally be set to zero. It is only the case if a user wants to operate breaker at the angle closer to 360 degrees (when voltages are in phase) when time delay could be applied.

Blinder Angle Setting

Set blinders angle ‘α’ same as total system impedance ZT angle.

Out-of-Step Operation on Series Compensated Lines

The maximum phase currents during out of step condition rarely exceed 2xIn RMS, which corresponds to the minimum swing impedance passing through zone 1. Since the Metal-

Oxide Varistors (MOV) bypass level is normally set between 2-3In, they will not operate during the power oscillations and therefore in majority of applications will not make any impact on Out of Step operation.

Consider a worst case scenario when the power oscillations are triggered upon fault clearance on the parallel line. In that case approximately twice the load current will start flowing through the remaining circuit, increase further and eventually exceed the MOV threshold. Since the R6-R5 region is usually set far from zone 1 the chances that the positive sequence impedance’s trajectory may traverse in and out of the set ∆R region due to MOV’s operation, are remote. If MOV’s do operate within the ∆R region (see the

Example of a timer reset due to MOV diagram below), a timer, that has been initiated, may reset and be reinitiated or the impedance may remain within ∆R region for a slightly longer duration. This is due to the fact that resistive and capacitive components will be added to the measured impedance during MOV operation as per the figure below. This effect may have an impact on the ‘ Delta t ’ measurement if ‘ Predictive OST ’ setting is used. If the recommendation to set R5MIN as close as practically possible to the R6MAX is followed, the chances that the swing currents will exceed MOV threshold within the

∆R region is very remote. If a study shows that the MOV’s could operate within the ∆R region, it is recommended to set ‘ Predictive OST and OST ’ operating mode to cover all eventualities.

Page (AP) 6-50 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

+jX

Z6

Z5

?R

R6' R5'

ZL

R5 R6

MOVs operation

R

2.3.19

Z5'

Z6'

P1977Ena

Figure 20 - Example of timer reset due to MOV’s operation

Note If ‘OST’ setting is chosen, the timer when triggered, will eventually expire as the power oscillations progress, therefore MOV operation will not have any impact on Out of Step operation.

Switch On To Fault (SOTF) Mode

To ensure fast isolation of faults (for example a closed three phase earth/grounding switch) upon energization, it is recommended this feature is enabled with appropriate zones and/or ‘ Current No Volt ’ (CNV) level detectors, depend on utility practices.

When busbar VTs are used, ‘ Pole Dead ’ signal will not be produced and a user has to connect circuit breaker auxiliary contacts for correct operation. This is not necessary if the

SOTF is activated by an external pulse.

SOTF delay The time chosen should be longer than the slowest delayed-autoreclose dead time, but shorter than the time in which the system operator might re-energize a circuit once it had opened/tripped.

110 seconds is recommended as a typical setting.

SOTF pulse Typically this could be set to at 500 ms. This time is enough to establish completely the voltage memory of distance protection.

TOC reset delay 500 ms is recommended as a typical setting (chosen to be in excess of the 16 cycles length of memory polarizing, allowing full memory charging before normal protection resumes).

P54x/EN AP/Nd5 Page (AP) 6-51

(AP) 6 Application Notes

2.3.20

2.3.21

2.3.22

2.3.23

2.3.24

Application of Individual Protection Functions

Trip On Reclose Mode

To ensure fast isolation of all persistent faults following the circuit breaker reclosure. It is recommended this feature is enabled with appropriate zones selected and/or ‘ Current No

Volt ’ (CNV) level detectors.

TOC Delay The TOR is activated after ‘ TOC Delay ’ has expired. The setting must not exceed the minimum AR Dead Time setting to make sure that the TOR is active immediately upon reclose command.

TOC reset delay 500 ms is recommended as a typical setting (as per SOTF).

Setup of DEF

DEF Zero Sequence Polarization

In practice, the typical zero sequence voltage on a healthy system can be as high as 1%

(i.e.: 3% residual), and the VT error could be 1% per phase. A VNpol Set setting between

1% and 4%.Vn is typical, to avoid spurious detection on standing signals. The residual voltage measurement provided in the Measurements column of the menu may assist in determining the required threshold setting during commissioning, as this will indicate the level of standing residual voltage present. The Virtual Current Polarizing feature will create a VNpol which is always large, regardless of whether actual VN is present.

With DEF, the residual current under fault conditions lies at an angle lagging the polarizing voltage. Hence, negative characteristic angle settings are required for DEF applications. This is set in cell ‘ DEF Char Angle ' in the relevant earth fault menu.

The following angle settings are recommended for a residual voltage polarized relay:

Distribution systems (solidly earthed)

-45°

Transmissions systems (solidly earthed)

-60°

DEF Negative Sequence Polarization

For negative sequence polarization, the RCA settings must be based on the angle of the upstream negative phase sequence source impedance. A typical setting is -60 o

.

General Setting Guidelines for DEF (Directional Ground Overcurrent)

DEF forward threshold

DEF reverse threshold

This setting determines the current sensitivity (trip sensitivity) of the DEF aided scheme. This setting must be set higher than any standing residual current unbalance. A typical setting will be between 10 and 20%

In.

This setting determines the current sensitivity for the reverse ground fault. The setting must always be below the DEF forward threshold for correct operation of

Blocking scheme and to provide stability for current reversal in parallel line applications. The recommended setting is 2/3 of DEF forward setting. Note that this setting has to be above the maximum steady state residual current unbalance.

Page (AP) 6-52 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.3.25

2.3.26

(AP) 6 Application Notes

Delta Directional Comparison Principle and Setup

For delta directional decisions, the RCA settings must be based on the average source + line impedance angle for a fault anywhere internal or external to the line. Typically, the

Delta Char Angle is set to 60 o

, as it is not essential for this setting to be precise. When a fault occurs, the delta current will never be close to the characteristic boundary, so an approximate setting is good enough.

Delta Directional Comparison - Selection of

I and

V Threshold

For best performance, it is suggested that the delta I Fwd current threshold is set at

10 to 20% In. This will ensure detection of all fault types, provided that the fault current contribution to an earth fault at the remote end of the line will generate at least this amount of delta. Selection of the correct Delta V Forward setting is achieved with reference to the table below (SIR = Source to Line impedance ratio):

Lowest SIR ratio of the system Recommended

V Fwd (as a % of Vn)

0.3

0.5

1

2

3

5

10

4%

6%

9%

13%

15%

17%

19%

25 – 60 21%

Table 3 - Lowest SIR ratio and Recommended

V Fwd (as a % of Vn)

For the reverse fault detectors, these must be set more sensitively, as they are used to invoke the blocking and current reversal guard elements. It is suggested that all reverse detectors are set at 66 to 80% of the setting of the forward detector, typically:

Delta V Rev

Delta I Rev

=

=

Delta V Fwd x 0.66

Delta I Fwd x 0.66

This setting philosophy is in-accordance with the well-proven Schneider Electric LFDC relay.

Deltas by their nature are present only for 2 cycles on fault inception. If any distance elements are enabled, these will automatically allow the delta forward or reverse decisions to “ seal-in ”, until such time as the fault is cleared from the system. Therefore, as a minimum, some distance zone(s) must be enabled as fault detectors. It does not matter what time delay is applied for the zone(s) – this can either be the typical distance delay for that Zone, or set to maximum (10 s) if no distance tripping is required. As a minimum, Zone 3 must be enabled, with a reverse reach such as to allow seal-in of Delta

Rev, and a forward reach to allow seal-in of Delta Fwd. The reaches applicable would be:

Zone 3 Forward Set at least as long as a conventional Zone 2 (120-150% of the protected line)

Zone 3 Reverse Set at least as long as a conventional Zone 4, or supplement by assigning Zone 4 itself if a large reverse reach is not preferred for Zone 3.

A mho characteristic is generally advised in such starter applications, although quadrilaterals are acceptable. As the mho starter is likely to have a large radius, applying the Load Blinder is strongly advised.

P54x/EN AP/Nd5 Page (AP) 6-53

(AP) 6 Application Notes

2.4

2.4.1

2.4.2

2.4.3

2.4.4

Application of Individual Protection Functions

Channel Aided Schemes (Distance option only)

The MiCOM P443/P445/P446/P54x/P547 offers two sets of aided channel (“ pilot ”) schemes, which may be operated in parallel.

Aided Scheme 1

Aided Scheme 2

May be keyed by distance and/or DEF and/ or delta directional comparison

May be keyed by distance and/or DEF and/ or delta directional comparison

When schemes share the same channel, the same generic scheme type will be applied - i.e. ALL Permissive Overreach, or ALL Blocking.

Distance Scheme PUR - Permissive Underreach Transfer Trip

This scheme is similar to that used in the MiCOM P44x (see note) distance relays. It allows an instantaneous Z2 trip on receipt of the signal from the remote end protection.

Note Matches PUP Z2 mode in P44x (P442/P444).

Send logic:

Permissive trip logic:

Zone 1

Zone 2 plus Channel Received

The “ Dist dly ” trip time setting should be set to Zero, for fast fault clearance.

Distance Scheme POR - Permissive Overreach Transfer Trip

This scheme is similar to that used in the MiCOM P44x (see note) distance relays. The

POR scheme also uses the reverse looking zone 4 of the relay as a reverse fault detector. This is used in the current reversal logic and in the optional weak infeed echo feature.

Note Matches POP Z2 mode in P44x (P442/P444).

Send logic:

Permissive trip logic:

Zone 2

Zone 2 plus Channel Received

The “ Dist dly ” trip time setting should be set to Zero, for fast fault clearance.

Permissive Overreach Trip Reinforcement

The send logic in the POR scheme is done in such a way that for any trip command at the local end, the relay sends a channel signal to the remote end(s) in order to maximize the chances for the fault to be isolated at all ends.

Note The send signal is generated by the ‘Any trip’ command and is sent on both channels, Ch1 and Ch2, if more than one channel is in use. This feature is termed permissive trip reinforcement, and is a deliberate attempt to ensure that synchronous tripping occurs at all line ends.

Permissive Overreach Scheme Weak Infeed Features

Where weak infeed tripping is employed, a typical voltage setting is 70% of rated phaseneutral voltage. Weak infeed tripping is time delayed according to the WI Trip Delay value, usually set at 60 ms.

Page (AP) 6-54 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.4.5

2.4.6

2.4.7

2.4.8

(AP) 6 Application Notes

Distance Scheme Blocking

To allow time for a blocking signal to arrive, a short time delay on aided tripping, “ Dist dly ”, must be used, as follows:

Recommended Dly setting = Max. Signaling channel operating time + 1 power frequency cycle.

This scheme is similar to that used in the LFZP Optimho, SHNB Micromho, LFZR, and

MiCOM P44x (see note) distance relays.

Note Matches BOP Z2 mode in P441/P442/P444.

Send logic: Reverse Zone 4

Trip logic: Zone 2, plus Channel NOT Received, delayed by Tp

Note Two variants of a Blocking scheme are provided, Blocking 1 and Blocking 2.

Both schemes operate identically, except that the reversal guard timer location in the logic changes. Blocking 2 may sometimes allow faster unblocking when a fault evolves from external to internal, and hence a faster trip.

Permissive Overreach Schemes Current Reversal Guard

The recommended setting is: tREVERSAL GUARD = Maximum signaling channel reset time + 35 ms.

Blocking Scheme Current Reversal Guard

The recommended setting is:

Where Duplex signaling channels are used: tREVERSAL GUARD = Maximum signaling channel operating time + 20 ms.

Where Simplex signaling channels are used: tREVERSAL GUARD = Maximum signaling channel operating time - minimum signaling channel reset time + 20 ms.

Aided DEF Ground Fault Scheme - Permissive Overreach

This POR scheme is similar to that used in all other Schneider Electric relays.

Send logic: IN> Forward pickup

Permissive trip logic: IN> Forward plus Channel Received

Note The Time Delay for a permissive scheme aided trip would normally be set to zero.

P54x/EN AP/Nd5 Page (AP) 6-55

(AP) 6 Application Notes

2.4.9

2.4.10

2.4.11

2.4.12

2.5

Application of Individual Protection Functions

Aided DEF Ground Fault Scheme - Blocking

This scheme is similar to that used in all other Schneider Electric relays.

Send logic: DEF Reverse

Trip logic: IN> Forward, plus Channel NOT Received, with a small set delay

To allow time for a blocking signal to arrive, a short time delay on aided tripping must be used.

The recommended

Time Delay setting = max. Signaling channel operating time + 20 ms.

Delta Scheme POR - Permissive Overreach Transfer Trip

This scheme is similar to that used in the LFDC relay.

Send logic:

Fault Forward

Permissive trip logic:

Fault Forward plus Channel Received.

The Delta Delay trip time setting should be set to zero, for fast fault clearance.

Delta Blocking Scheme

This scheme is similar to that used in the LFDC relay.

Send logic:

Fault Reverse

Trip logic:

Fault Forward, plus Channel NOT Received, delayed by Tp.

Recommended Dly setting = Max. signaling channel operating time + 6 ms.

Delta Schemes Current Reversal Guard Timer

Similarly to the distance protection schemes, current reversals during fault clearance on an adjacent parallel line need to be treated with care. In order to prevent misoperation

(mal-tripping) of the protection on the unfaulted line, a current reversal guard timer must be set. The recommended setting for both POR and BLOCKING schemes is: tREVERSAL GUARD = Maximum signaling channel reset time + 35 ms

Loss of Load Accelerated Tripping (LoL) (Distance option only)

For circuits with load tapped off the protected line, care must be taken in setting the Loss of Load (LoL) feature to ensure that the I< level detector setting is above the tapped load current. When selected, the LoL feature operates in conjunction with the main distance scheme that is selected. In this way it provides high speed clearance for end zone faults when the Basic scheme is selected or, with permissive signal aided tripping schemes, it provides high speed back-up clearance for end zone faults if the channel fails.

Page (AP) 6-56 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.6

2.6.1

(AP) 6 Application Notes

Phase Fault Overcurrent Protection

Settings for the time delayed overcurrent element should be selected to ensure discrimination with surrounding protection. Setting examples for phase fault overcurrent protection can be found in the Network Protection and Automation Guide (NPAG), a comprehensive reference textbook available from Schneider Electric.

Caution The IEEE C.37.112 standard for IDMT curves permits some freedom to manufacturers at which Time Dial (TD) value the reference curve applies. Rather than pick a mid-range value, for the MiCOM device the reference curve norm applies at a time dial of 1. The TD is merely a multiplier on the reference curve, in order to achieve the desired tripping time. Take care when grading with other suppliers' relays which may take TD = 5, or TD = 7 as a mid-range value to define the IDMT curve. The equivalent

MiCOM device setting to match those relays is achieved by dividing the imported setting by 5 or 7.

This caution applies to the MiCOM P443 / P445 / P446 /

P54x / P841.

Phase Overcurrent Function

(Applies to Dual CB variants only), e.g. P544, P546, P446 and P841B firmware versions.

Please note that when using Overcurrent stages 3 and/or 4 (I>3 and/or I>4 respectively) for Circuit Breaker failure detection, where the protection stage is set to monitor an individual CT input (e.g. CT1 OR CT2). The user should not use the same overcurrent stages for backup protection because of the different Current sensitivity (setting) levels required for CB Failure and Backup Overcurrent.

Directional Overcurrent Characteristic Angle Settings

The relay uses a 90° connection angle for the directional overcurrent elements. The relay characteristic angles in this case are nominally set to:

+30° Plain feeders, zero sequence source behind relay

+45° Transformer feeder, zero sequence source in front of relay

Whilst it is possible to set the RCA to exactly match the system fault angle, it is recommended that the above figures are followed, as these settings have been shown to provide satisfactory performance and stability under a wide range of system conditions.

P54x/EN AP/Nd5 Page (AP) 6-57

(AP) 6 Application Notes

2.7

2.7.1

2.7.2

Application of Individual Protection Functions

Thermal Overload Protection

Thermal overload protection can be used to prevent electrical plant from operating at temperatures in excess of the designed maximum withstand. Prolonged overloading causes excessive heating, which may result in premature ageing of the insulation, or in extreme cases, insulation failure.

Single Time Constant Characteristic

The current setting is calculated as:

Thermal Trip = Permissible continuous loading of the plant item/CT ratio.

Typical time constant values are given in the following table. The relay setting,

‘ Time Constant 1 ’, is in minutes.

An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip threshold. A typical setting might be ‘ Thermal Alarm ’ = 70% of thermal capacity.

Time constant

τ

(minutes)

Air-core reactors 40

Capacitor banks 10

Overhead lines 10

Cables

Busbars

60 - 90

60

Limits

Cross section

100 mm

2

Cu or 150 mm

2

Al

Typical, at 66 kV and above

Table 4 - Typical time constant values

Dual Time Constant Characteristic

The current setting is calculated as:

Thermal Trip = Permissible continuous loading of the transformer / CT ratio.

Typical time constant values are shown in the following table:

An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip threshold. A typical setting might be ‘Thermal Alarm’ = 70% of thermal capacity.

Note

Oil-filled transformer

The thermal time constants given in the above tables are typical only.

Reference should always be made to the plant manufacturer for accurate information.

5

τ

1 (minutes)

τ

2 (minutes)

120

Limits

Rating 400 - 1600 kVA

Table 5 - Typical time constant values

Note

The thermal time constants given in Figure 14 and Figure 15 are typical

only. Reference should always be made to the plant manufacturer for accurate information.

Page (AP) 6-58 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.8

2.8.1

2.8.1.1

(AP) 6 Application Notes

Earth Fault (Ground Overcurrent) and Sensitive Earth Fault (SEF) protection

Earth Fault

(Applies to Dual CB variants only), e.g. P544, P546, P446 and P841B firmware versions.

Please note that when using Earth Fault stages 3 and/or 4 (IN>3 and/or IN>4 respectively) for Circuit Breaker failure detection, where the protection stage is set to monitor an individual CT input (e.g. CT1 OR CT2). The user should not use the same

Earth Fault stages for backup protection because of the different Current sensitivity

(setting) levels required for CB Failure and Backup Earth Fault.

Caution The IEEE C.37.112 standard for IDMT curves permits some freedom to manufacturers at which Time Dial (TD) value the reference curve applies. Rather than pick a mid-range value, for the MiCOM device the reference curve norm applies at a time dial of 1. The TD is merely a multiplier on the reference curve, in order to achieve the desired tripping time. Take care when grading with other suppliers' relays which may take TD = 5, or TD = 7 as a mid-range value to define the IDMT curve. The equivalent

MiCOM device setting to match those relays is achieved by dividing the imported setting by 5 or 7.

This caution applies to the MiCOM P443 / P445 / P446 /

P54x / P841.

Directional Earth Fault Protection

Residual Voltage Polarization

It is possible that small levels of residual voltage will be present under normal system conditions due to system imbalances, VT inaccuracies, relay tolerances etc. Hence, the relay includes a user settable threshold (

Ι

N>VNPol Set ) which must be exceeded in order for the DEF function to be operational. In practice, the typical zero sequence voltage on a healthy system can be as high as 1% (i.e.: 3% residual), and the VT error could be 1% per phase. A setting between 1% and 4% is typical. The residual voltage measurement provided in the Measurements column of the menu may assist in determining the required threshold setting during commissioning, as this will indicate the level of standing residual voltage present.

P54x/EN AP/Nd5 Page (AP) 6-59

(AP) 6 Application Notes

2.8.2

2.8.3

Application of Individual Protection Functions

General Setting Guidelines for Directional Earth Fault (Ground Overcurrent)

Protection

When setting the Relay Characteristic Angle (RCA) for the Directional Earth Fault (DEF) element, a positive angle setting was specified. This was due to the fact that the quadrature polarizing voltage lagged the nominal phase current by 90°; i.e. the position of the current under fault conditions was leading the polarizing voltage and hence a positive

RCA was required. With DEF, the residual current under fault conditions lies at an angle lagging the polarizing voltage. Hence, negative RCA settings are required for DEF applications. This is set in cell ' I>N ’ in the relevant earth fault menu.

The following angle settings are recommended for a residual voltage polarized relay:

Distribution systems (solidly earthed) -45°

Transmissions systems (solidly earthed) -60°

For negative sequence polarization, the RCA settings must be based on the angle of the upstream negative phase sequence source impedance.

Sensitive Earth Fault (SEF) Protection Element

Sensitive Earth Fault (SEF) would normally be fed from a Core Balance Current

Transformer (CBCT) mounted around the three phases of the feeder cable. However, care must be taken in the positioning of the CT with respect to the earthing of the cable sheath. See below.

Page (AP) 6-60 P54x/EN AP/Nd5

Application of Individual Protection Functions

Cable box

Cable gland/sheath earth connection

Cable gland

SEF

(AP) 6 Application Notes

“Incorrect”

SEF

No operation

“Correct”

Operation

SEF

P0112ENa

Figure 21 - Positioning of core balance current transformers

As can be seen from the above illustration, if the cable sheath is terminated at the cable gland and earthed directly at that point, a cable fault (from phase to sheath) will not result in any unbalance current in the core balance CT. Hence, prior to earthing, the connection must be brought back through the CBCT and earthed on the feeder side. This then ensures correct relay operation during earth fault conditions.

P54x/EN AP/Nd5 Page (AP) 6-61

(AP) 6 Application Notes

2.8.4

2.8.4.1

Application of Individual Protection Functions

Restricted Earth Fault (REF) Protection

Earth faults occurring on a transformer winding or terminal may be of limited magnitude, either due to the impedance present in the earth path or by the percentage of transformer winding that is involved in the fault. It is common to apply standby earth fault protection fed from a single CT in the transformer earth connection - this provides time-delayed protection for a transformer winding or terminal fault. In general, particularly as the size of the transformer increases, it becomes unacceptable to rely on time delayed protection to clear winding or terminal faults as this would lead to an increased amount of damage to the transformer. A common requirement is therefore to provide instantaneous phase and earth fault protection. Applying differential protection across the transformer may fulfill these requirements. However, an earth fault occurring on the LV winding, particularly if it is of a limited level, may not be detected by the differential relay, as it is only measuring the corresponding HV current. Therefore, instantaneous protection that is restricted to operating for transformer earth faults only is applied. This is referred to as

Restricted Earth Fault (REF) Protection.

When applying differential protection such as REF, some suitable means must be employed to give the protection stability under external fault conditions, therefore ensuring that relay operation only occurs for faults on the transformer winding / connections.

Two methods are commonly used; bias or high impedance. The biasing technique operates by measuring the level of through current flowing and altering the relay sensitivity accordingly. The high impedance technique ensures that the relay circuit is of sufficiently high impedance such that the differential voltage that may occur under external fault conditions is less than that required to drive setting current through the relay.

The REF protection in the relays can be configured to operate as high impedance element. Following sections describe the application of the relay for high impedance element.

Note The high impedance REF element of the relay shares the same CT input as the SEF protection. Hence, only one of these elements may be selected.

Setting Guidelines for High Impedance Restricted Earth Fault (REF)

From the SEF/REF options cell, Hi Z REF must be selected to enable this protection.

The only setting cell then visible is

Ι

REF>

Ι s , which may be programmed with the required differential current setting. This would typically be set to give a primary operating current of either 30% of the minimum earth fault level for a resistance earthed system or between

10 and 60% of rated current for a solidly earthed system.

The primary operating current (

Ι op) will be a function of the current transformer ratio, the relay operating current (

Ι

REF>

Ι s1), the number of current transformers in parallel with a relay element (n) and the magnetizing current of each current transformer (

Ι e) at the stability voltage (Vs). This relationship can be expressed in three ways:

To determine the maximum current transformer magnetizing current to achieve a specific primary operating current with a particular relay operating current:

I e

<

1 n

x

I op

CT ratio

- I REF > I s

To determine the minimum relay current setting to achieve a specific primary operating current with a given current transformer magnetizing current.

[ I REF > I s

] <

I op

CT ratio

- nl e

Page (AP) 6-62 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.8.4.2

(AP) 6 Application Notes

Use of METROSIL Non-Linear Resistors

Metrosils are used to limit the peak voltage developed by the current transformers under internal fault conditions, to a value below the insulation level of the current transformers, relay and interconnecting leads, which are normally able to withstand 3000 V peak.

The following formulae should be used to estimate the peak transient voltage that can be produced for an internal fault. The peak voltage produced during an internal fault will be a function of the current transformer kneepoint voltage and the prospective voltage that would be produced for an internal fault if current transformer saturation did not occur.

Vp = 2 2V k

(V f

– V k)

V f

=

Ι

'f (R ct

+ 2R

L

+ R

ST

)

Where:

V p

=

V k

=

V f

=

Ι

' f

=

R ct

=

R

L

=

R

ST

=

Peak voltage developed by the CT under internal fault conditions

Current transformer kneepoint voltage

Maximum voltage that would be produced if CT saturation did not occur

Maximum internal secondary fault current

Current transformer secondary winding resistance

Maximum lead burden from current transformer to relay

Relay stabilizing resistor

When the value given by the formulae is greater than 3000 V peak, metrosils should be applied. They are connected across the relay circuit and serve the purpose of shunting the secondary current output of the current transformer from the relay in order to prevent very high secondary voltages.

Metrosils are externally mounted and take the form of annular discs. Their operating characteristics follow the expression:

V = C

Ι 0.25

Where:

V =

C

I

=

=

Instantaneous voltage applied to the non-linear resistor (metrosil)

Constant of the non-linear resistor (metrosil)

Instantaneous current through the non-linear resistor (metrosil)

With a sinusoidal voltage applied across the metrosil, the RMS current would be approximately 0.52 x the peak current. This current value can be calculated as follows:

I(rms) = 0.52

Vs (rms) x 2 4

C

Where:

Vs(rms) = rms value of the sinusoidal voltage applied across the metrosil.

This is due to the fact that the current waveform through the metrosil is not sinusoidal but appreciably distorted.

For satisfactory application of a non-linear resistor (metrosil), it's characteristic should be such that it complies with these requirements:

At the relay voltage setting, the non-linear resistor (metrosil) current should be as low as possible, but no greater than approximately 30 mA rms for 1 A current transformers and approximately 100 mA rms for 5 A current transformers.

At the maximum secondary current, the non-linear resistor (metrosil) should limit the voltage to 1500 V rms or 2120 V peak for 0.25 second. At higher relay voltage settings, it is not always possible to limit the fault voltage to 1500V rms, so higher fault voltages may have to be tolerated.

P54x/EN AP/Nd5 Page (AP) 6-63

(AP) 6 Application Notes Application of Individual Protection Functions

The following tables show the typical Metrosil types that will be required, depending on relay current rating, REF voltage setting etc.

Metrosil Units for Relays with a 1 Amp CT

The Metrosil units with 1 Amp CTs have been designed to comply with the following restrictions:

1. At the relay voltage setting, the Metrosil current should be less than 30 mA rms.

2. At the maximum secondary internal fault current the Metrosil unit should limit the voltage to 1500 V rms if possible.

The Metrosil units normally recommended for use with 1Amp CT's are as shown below:

Relay voltage setting

Up to 125 V rms

125 to 300 V rms

Nominal characteristic

C

β

450

900

0.25

0.25

Recommended Metrosil type

Single pole relay

600 A/S1/S256

600 A/S1/S1088

Triple pole relay

600 A/S3/1/S802

600 A/S3/1/S1195

Note Single pole Metrosil units are normally supplied without mounting brackets unless otherwise specified by the customer.

Metrosil units for relays with a 5 amp CT

These Metrosil units have been designed to comply with these requirements:

At the relay voltage setting, the Metrosil current should be less than 100 mA rms

(the actual maximum currents passed by the units shown below their type description.

At the maximum secondary internal fault current the Metrosil unit should limit the voltage to 1500 V rms for 0.25 secs. At the higher relay settings, it is not possible to limit the fault voltage to 1500 V rms hence higher fault voltages have to be tolerated (indicated by *, **, ***).

The Metrosil units normally recommended for use with 5 Amp CTs and single pole relays are as shown in the following table:

Secondary internal fault current

Recommended Metrosil type

Relay voltage setting

Amps rms Up to 200 V rms 250 V rms 275 V rms 300 V rms

50 A

100 A

150 A

Note:

600 A/S1/S1213

C = 540/640

35 mA rms

600 A/S1/S1214

C = 670/800

40 mA rms

600 A/S1/S1214

C =670/800

50 mA rms

600 A/S2/P/S1217

C = 470/540

70 mA rms

600 A/S2/P/S1215

C = 570/670

75 mA rms

600 A/S2/P/S1215

C =570/670

100 mA rms

600 A/S3/P/S1219

C = 430/500

100 mA rms

600 A/S3/P/S1220

C = 520/620

100 mA rms

600 A/S3/P/S1221

C = 570/670**

100 mA rms

**2200 V peak

600 A/S1/S1223

C = 740/870*

50 mA rms

600 A/S2/P/S1196

C =620/740*

100 mA rms

600 A/S3/P/S1222

C =620/740***

100 mA rms

*2400 V peak

***2600 V peak

Page (AP) 6-64 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.9

(AP) 6 Application Notes

In some situations single disc assemblies may be acceptable, contact Schneider Electric for detailed applications.

1. The Metrosil units recommended for use with 5 Amp CTs can also be applied for usewith triple pole relays and consist of three single pole units mounted on the same central stud but electrically insulated from each other. To order these units please specify Triple pole Metrosil type , followed by the single pole type reference.

2. Metrosil units for higher relay voltage settings and fault currents can be supplied if required.

3. To express the protection primary operating current for a particular relay operating current and with a particular level of magnetizing current.

I op

= (CT ratio) x (IREF > Is + nI c

)

To achieve the required primary operating current with the current transformers that are used, a current setting (

Ι

REF>

Ι s) must be selected for the high impedance element, as detailed in expression (ii) above. The setting of the stabilizing resistor (RST) must be calculated in the following manner, where the setting is a function of the required stability voltage setting (Vs) and the relay current setting (

Ι

REF>

Ι s).

Note The following formula assumes negligible relay burden.

Note The stabilizing resistor that can be supplied is continuously adjustable up to its maximum declared resistance.

R st

=

V s

I

REF

> I s

=

I

F

(R

CT

+ 2

RL

)

I

REF

> I s

Negative Phase Sequence (NPS) Overcurrent Protection

The following section describes how Negative Phase Sequence (NPS) overcurrent protection may be applied in conjunction with standard overcurrent and earth fault protection in order to alleviate some less common application difficulties:

NPS overcurrent elements give greater sensitivity to resistive phase-to-phase faults, where phase overcurrent elements may not operate.

In certain applications, residual current may not be detected by an earth fault relay due to the system configuration. For example, an earth fault relay applied on the delta side of a Dy (delta-wye) transformer is unable to detect earth faults on the star (wye) side. However, negative sequence current will be present on both sides of the transformer for any fault condition, irrespective of the transformer configuration. Therefore, a NPS overcurrent element may be employed to provide time-delayed back-up protection for any uncleared asymmetrical faults downstream.

It may be required to simply alarm for the presence of negative phase sequence currents on the system. Operators may then investigate the cause of the unbalance.

P54x/EN AP/Nd5 Page (AP) 6-65

(AP) 6 Application Notes

2.9.1

2.9.2

2.9.3

Application of Individual Protection Functions

NPS Current Threshold, '

Ι

2> Current Set'

The current pick-up threshold must be set higher than the NPS current due to the maximum normal load unbalance on the system. This can be set practically at the commissioning stage, making use of the relay measurement function to display the standing NPS current, and setting at least 20% above this figure.

Where the NPS element is required to operate for specific uncleared asymmetric faults, a precise threshold setting would have to be based upon an individual fault analysis for that particular system due to the complexities involved. However, to ensure operation of the protection, the current pick-up setting must be set approximately 20% below the lowest calculated NPS fault current contribution to a specific remote fault condition.

Time Delay for the NPS Overcurrent Element, ‘

Ι

2> Time Delay’

As stated above, correct setting of the time delay for this function is vital. It should also be noted that this element is applied primarily to provide back-up protection to other protective devices or to provide an alarm. Hence, in practice, it would be associated with a long time delay.

It must be ensured that the time delay is set greater than the operating time of any other protective device (at minimum fault level) on the system which may respond to unbalanced faults.

Directionalizing the Negative Phase Sequence Overcurrent Element

Where negative phase sequence current may flow in either direction through a relay location, such as parallel lines, directional control of the element should be employed.

Directionality is achieved by comparison of the angle between the negative phase sequence voltage and the negative phase sequence current and the element may be selected to operate in either the forward or reverse direction. A suitable relay characteristic angle setting (

Ι

2> Char Angle) is chosen to provide optimum performance.

This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (– V2), in order to be at the center of the directional characteristic.

The angle that occurs between V2 and

Ι

2 under fault conditions is directly dependent upon the negative sequence source impedance of the system. However, typical settings for the element are as follows;

For a transmission system the RCA should be set equal to -60°

For a distribution system the RCA should be set equal to -45°

For the negative phase sequence directional elements to operate, the relay must detect a polarizing voltage above a minimum threshold,

Ι

2> V2pol Set . This must be set in excess of any steady state negative phase sequence voltage. This may be determined during the commissioning stage by viewing the negative phase sequence measurements in the relay.

Page (AP) 6-66 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.10

2.11

(AP) 6 Application Notes

Undervoltage Protection

In the majority of applications, undervoltage protection is not required to operate during system earth (ground) fault conditions. If this is the case, the element should be selected in the menu to operate from a phase to phase voltage measurement, as this quantity is less affected by single phase voltage depressions due to earth faults. The measuring mode (ph-N or ph-ph) and operating mode (single phase or 3 phase) for both stages are independently settable.

The voltage threshold setting for the undervoltage protection should be set at some value below the voltage excursions which may be expected under normal system operating conditions. This threshold is dependent upon the system in question but typical healthy system voltage excursions may be in the order of -10% of nominal value.

Similar comments apply with regard to a time setting for this element, i.e. the required time delay is dependent upon the time for which the system is able to withstand a depressed voltage.

Overvoltage Protection

The inclusion of the two stages and their respective operating characteristics allows for a number of possible applications;

Use of the IDMT characteristic gives the option of a longer time delay if the overvoltage condition is only slight but results in a fast trip for a severe overvoltage.

As the voltage settings for both of the stages are independent, the second stage could then be set lower than the first to provide a time delayed alarm stage if required.

Alternatively, if preferred, both stages could be set to definite time and configured to provide the required alarm and trip stages.

If only one stage of overvoltage protection is required, or if the element is required to provide an alarm only, the remaining stage may be disabled within the relay menu.

This type of protection must be co-ordinated with any other overvoltage relays at other locations on the system. This should be carried out in a similar manner to that used for grading current operated devices. The measuring mode (ph-N or ph-ph) and operating mode (single phase or 3 phase) for both stages are independently settable.

P54x/EN AP/Nd5 Page (AP) 6-67

(AP) 6 Application Notes

2.12

Application of Individual Protection Functions

Compensated Overvoltage Protection

Temporary overvoltages in the order of seconds (even minutes) which may originate from switching or load rejection may damage primary plant equipment. In particular, this type of overvoltage protection is applied to protect long transmission lines against Ferranti effect overvoltages where the transmission line is energized from one end only. The following figure shows the Ferranti overvoltages calculated for a 345 kV and 765 kV transmission line for different line lengths based on the formulas as in the Operation chapter.

The two stage compensated overvoltage element can be applied as alarming or trip elements. Both stages’ time delays should be set not to pick-up for transient overvoltages in the system with a typical time delays of 1-2 seconds upwards being adequate for most applications. In the example above for a 345 kV transmission line of 400 km line length, the alarm threshold (stage 1) can be set to 105% and the trip threshold set to 110% for example.

Calculated Ferranti Overvoltage

345kV

765kV

114

112

110

108

106

104

102

100

0 20 40 80 120 160 200 240 280 320 360 400

Line Length (km)

P4094ENa

Figure 22 - Calculated Ferranti voltage rise on 345 kV and 765 kV lines

Page (AP) 6-68 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.13

(AP) 6 Application Notes

Residual Overvoltage (Neutral Displacement) Protection

On a healthy three phase power system, the addition of each of the three phase to earth voltages is nominally zero, as it is the vector addition of three balanced vectors at 120° to one another. However, when an earth (ground) fault occurs on the primary system this balance is upset and a ‘ residual ’ voltage is produced.

Note This condition causes a rise in the neutral voltage with respect to earth which is commonly referred to as neutral voltage displacement or NVD.

The following figure shows the residual voltages that are produced during earth fault conditions occurring on a solid earthed power system.

As shown in below the residual voltage measured by a relay for an earth fault on a solidly earthed system is solely dependent upon the ratio of source impedance behind the relay to line impedance in front of the relay, up to the point of fault. For a remote fault, the Zs/Zl ratio will be small, resulting in a correspondingly small residual voltage. As such, depending upon the relay setting, such a relay would only operate for faults up to a certain distance along the system. The value of residual voltage generated for an earth fault condition is given by the general formula shown.

E S R F

Z

S

Z

L

A-G

G

V

A

V

A

V

C

V

B

V

C

V

B

V

C

V

B

V

A

V

B

V

RES

V

A

V

B

V

RES V

B

V

C

V

C V

C

Residual voltage at R (relay point) is dependant upon Z

S

/Z

L

ratio.

V

RES

=

Z

S0

2Z

S1

+ Z

S0

+ 2Z

L1

+ Z

L0

Figure 23 - Residual voltage, solidly earthed system

X 3 E

P0117ENa

P54x/EN AP/Nd5 Page (AP) 6-69

(AP) 6 Application Notes

2.13.1

Application of Individual Protection Functions

The following figure shows the residual voltages that are produced during earth fault conditions occurring on an impedance earthed power system.

This shows that a resistance earthed system will always generate a relatively large degree of residual voltage, as the zero sequence source impedance now includes the earthing impedance. It follows then, that the residual voltage generated by an earth fault on an insulated system will be the highest possible value (3 x phase-neutral voltage), as the zero sequence source impedance is infinite.

E

S R F

Z

S

Z

L

N

Z

E

A-G

G

V

C-G

S

V

A-G

G,F

V

B-G

V

C-G

R

V

A-G

G,F

V

B-G

V

C-G

G,F

V

B-G

V

RES

V

A-G

V

C-G

V

B-G

V

RES

V

A-G

V

C-G

V

B-G

V

RES

V

C-G

V

B-G

Z

S0

+ 3Z

E

V

RES

= X 3 E

2Z

S1

+ Z

S0

+ 2Z

L1

+ Z

L0

+ 3Z

E P0118ENa

Figure 24 - Residual voltage, resistance earthed system

The detection of a residual overvoltage condition is an alternative means of earth fault detection, which does not require any measurement of zero sequence current. This may be particularly advantageous at a tee terminal where the infeed is from a delta winding of a transformer (and the delta acts as a zero sequence current trap).

Note Where residual overvoltage protection is applied, such a voltage will be generated for a fault occurring anywhere on that section of the system and hence the NVD protection must co-ordinate with other earth/ground fault protection.

Setting Guidelines

The formula referred to here are shown in Figure 22 and Figure 23.

Page (AP) 6-70 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.14

2.14.1

(AP) 6 Application Notes

The voltage setting applied to the elements depends on the magnitude of residual voltage that is expected to occur during the earth fault condition. This in turn is dependent on the method of system earthing employed and may be calculated by using the formulae previously given in the previous diagrams. It must also be ensured that the relay is set above any standing level of residual voltage that is present on the system.

Note IDMT characteristics are selectable on the first stage of NVD so that elements located at various points on the system may be time graded with one another.

Circuit Breaker Fail (CBF) Protection

Breaker Fail Timer Settings

Typical timer settings to use are as follows:

CB fail reset mechanism

Initiating element reset

CB open

Undercurrent elements tBF time delay

Typical delay for 2 ½ cycle circuit breaker

CB interrupting time + element reset time (max.) + error in tBF timer + safety margin

50 + 45 + 10 + 50 = 155 ms

CB auxiliary contacts opening/closing time (max.) + error in tBF timer + safety margin

CB interrupting time + undercurrent element (max.) + safety margin

50 + 10 + 50 = 110 ms

50 + 25 + 50 = 125 ms

Note All CB Fail resetting involves the operation of the undercurrent elements.

Where element reset or CB open resetting is used the undercurrent time setting should still be used if this proves to be the worst case.

The examples above consider direct tripping of a 2½ cycle circuit breaker.

Note Where auxiliary tripping relays are used, an additional 10-15 ms must be added to allow for trip relay operation.

2.14.2 Breaker Fail Undercurrent Settings

The phase undercurrent settings (I<) must be set less than load current, to ensure that I< operation indicates that the circuit breaker pole is open. A typical setting for overhead line or cable circuits is 20% In, reduced to 10% or 5% where the infeed has a high SIR ratio

(e.g. at a spur terminal with embedded generation infeed).

The sensitive earth fault protection (SEF) undercurrent element must be set less than the respective trip setting, typically as follows:

Ι

SEF< = (

Ι

SEF> trip) / 2

P54x/EN AP/Nd5 Page (AP) 6-71

(AP) 6 Application Notes

2.15

2.15.1

Application of Individual Protection Functions

Broken Conductor Detection

The majority of faults on a power system occur between one phase and ground or two phases and ground. These are known as shunt faults and arise from lightning discharges and other overvoltages which initiate flashovers. Alternatively, they may arise from other causes such as birds on overhead lines or mechanical damage to cables etc. Such faults result in an appreciable increase in current and hence in the majority of applications are easily detectable.

Another type of unbalanced fault that can occur on the system is the series or open circuit fault. These can arise from broken conductors, maloperation of single phase switchgear, or single-phasing of fuses. Series faults will not cause an increase in phase current on the system and hence are not readily detectable by standard protection. However, they will produce an unbalance and a resultant level of negative phase sequence current, which can be detected.

It is possible to apply a negative phase sequence overcurrent relay to detect the above condition. However, on a lightly loaded line, the negative sequence current resulting from a series fault condition may be very close to, or less than, the full load steady state unbalance arising from CT errors, load unbalance etc. A negative sequence element therefore would not operate at low load levels.

Setting Guidelines

For a broken conductor affecting a single point earthed power system, there will be little zero sequence current flow and the ratio of

Ι

2/

Ι

1 that flows in the protected circuit will approach 100%. In the case of a multiple earthed power system (assuming equal impedance’s in each sequence network), the ratio

Ι

2/

Ι

1 will be 50%.

In practice, the levels of standing negative phase sequence current present on the system govern this minimum setting. This can be determined from a system study, or by making use of the relay measurement facilities at the commissioning stage. If the latter method is adopted, it is important to take the measurements during maximum system load conditions, to ensure that all single-phase loads are accounted for.

Note A minimum value of 8% negative phase sequence current is required for successful relay operation.

Since sensitive settings have been employed, it can be expected that the element will operate for any unbalance condition occurring on the system (for example, during a single pole auto-reclose cycle). Hence, a long time delay is necessary to ensure coordination with other protective devices. A 60 second time delay setting may be typical.

The example following information was recorded by the relay during commissioning;

Ifull load = 500 A

I2 = 50 A therefore the quiescent

Ι

2/

Ι

1 ratio is given by:

I2/I1 = 50/500 = 0.1

To allow for tolerances and load variations a setting of 20% of this value may be typical:

Therefore set I2/I1 = 0.2

In a double circuit (parallel line) application, using a 40% setting will ensure that the broken conductor protection will operate only for the circuit that is affected. Setting 0.4 results in no pick-up for the parallel healthy circuit.

Set I2/I1 Time Delay = 60 s to allow adequate time for short circuit fault clearance by time delayed protections.

Page (AP) 6-72 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.16

2.16.1

Communication between Relays

(AP) 6 Application Notes

Optical Budgets

When applying any of the P54x range of current differential relays it is important to select the appropriate protection communications interface. This will depend on the fiber used and distance between devices. The following table shows the optical budgets of the available communications interfaces.

From April 2008

850 nm

Multi mode

1300 nm

Multi mode

1300 nm

Single mode

1550 nm

Single mode

Min. transmit output level

(average power)

Receiver sensitivity

(average power)

-19.8 dBm

-25.4 dBm

Optical budget

Less safety margin (3 dB)

5.6 dB

2.6 dB

Typical cable loss 2.6 dB/km

Max. transmission distance 1 km

-6 dBm

-49 dBm

43.0 dB

40.0 dB

0.8 dB/km

50.0 km

-6 dBm

-49 dBm

43.0 dB

40.0 dB

0.4 dB/km

100.0 km

-6 dBm

-49 dBm

43.0 dB

40.0 dB

0.3 dB/km

130 km

Note From April 2008, the optical budgets and hence also the maximum transmission distances of the 1300 nm multi-mode, 1300 nm single-mode and 1550 nm single-mode fiber interfaces have been increased, to the values shown in the table above.

Table 6 - Optical optical budgets and maximum transmission distances for relays from April 2008 and onwards

The new interface cards are identified by “ 43dB ” marked in the centre of the back-plate, visible from the rear of the relay. These new fiber interfaces are fully backwardcompatible with the original equivalent interface. However, in order to achieve the increased distance, both/all ends of the P443/P445 scheme would need to use the new interface.

Pre-April 2008 relays will have the original optical budgets and maximum transmission distances, as shown below.

Pre-April 2008

850 nm

Multi mode

Min. transmit output level

(average power)

Receiver sensitivity

(average power)

Optical budget

-19.8 dBm

-25.4 dBm

5.6 dB

Less safety margin (3dB)

Typical cable loss

2.6 dB

2.6 dB/km

Max. transmission distance 1 km

1300 nm

Multi mode

-10 dBm

-37 dBm

27.0 dB

24.0 dB

0.8 dB/km

30.0 km

1300 nm

Single mode

-10 dBm

-37 dBm

27.0 dB

24.0 dB

0.4 dB/km

60.0 km

1550 nm

Single mode

-10 dBm

-37 dBm

27.0 dB

24.0 dB

0.3 dB/km

80 km

Table 7 - Original optical budgets and maximum transmission distances for Pre-

April 2008 relays

P54x/EN AP/Nd5 Page (AP) 6-73

(AP) 6 Application Notes

2.16.2

2.16.3

2.17

Application of Individual Protection Functions

The total optical budget is given by transmitter output level minus the receiver sensitivity and will indicate the total allowable losses that can be tolerated between devices. A safety margin of 3 dB is also included in the above table. This allows for degradation of the fiber as a result of ageing and any losses in cable joints. The remainder of the losses will come from the fiber itself. The figures given are typical only and should only be used as a guide.

In general, the 1300 nm and 1550 nm interfaces will be used for direct connections between relays. The 850 nm would be used where multiplexing equipment is employed.

Clock Source Setting

The Clock Source should be set to “Internal” at all system ends, where they are connected by direct optical fiber, as the P54x at each end has to supply the clock.

The Clock Source should be set to External at all system ends, where the ends are connected by multiplexer equipment which is receiving a master clock signal from the multiplexer network. It is important that there is a single master clock source on the multiplexer network and that the multiplexer equipment at each end is synchronized to this clock.

Note This setting is not applicable if IEEE C37.94 mode selected.

Data Rate

The data rate for signaling between the two or three ends may be set to either 64kbit/sec or 56kbit/sec as appropriate.

If there is a direct fiber connection between the ends, the data rate would usually be set to 64kbit/sec, as this gives a slightly faster trip time.

If there is a multiplexer network between the ends, then this will determine the data rate to be used by the MiCOM P443/P445/P446/P54x system. The electrical interface to the multiplexer (G.703 co-directional, V.35, or X.21) will be provided on either a 64kbit/sec or

56kbit/sec channel, and the MiCOM P443/P445/P446/P54x at each end must be set to match this data rate.

Generally, North American multiplexer networks are based on 56kbit/sec (and multiples thereof) channels, whereas multiplexer networks in the rest of the world are based on

64kbit/sec (and multiples thereof) channels.

This setting is not applicable if IEEE C37.94 mode selected.

Integral Intertripping

The operation of this function changed with the introduction of Software Version D1a.

Page (AP) 6-74 P54x/EN AP/Nd5

Application of Individual Protection Functions (AP) 6 Application Notes

For software versions D1 and earlier:

MiCOM P443/P445/P446/P54x devices support integral intertripping in the form of

InterMiCOM.

InterMiCOM can use an auxiliary EIA(RS)232 connection (MODEM InterMiCOM), or it can be realised by means of an integral optical fiber communication connection (fiber

InterMiCOM, or InterMiCOM

64

). An EIA(RS)232 (MODEM) InterMiCOM provides a single, full duplex communication channel, suitable for connection between two MiCOM

P443/P445/P446/P54x relays. The fiber InterMiCOM (InterMiCOM

64

) can provide up to two full-duplex communications channels. It can be used to connect two MiCOM

P443/P445/P446/P54x relays using a single channel, or redundancy can be added by using dual communications. Alternatively, InterMiCOM

64

can be used to connect three

MiCOM P443/P445/P446/P54x devices in a triangulated scheme for the protection of

Teed feeders. MODEM InterMiCOM and InterMiCOM

64

are completely independent.

They have separate settings, are described by separate DDB signals.

As a general rule, where possible, InterMiCOM

64

would be preferable from an application point of view since it is faster, and based on optical fibers it has high immunity to electromagnetic interference. If the high speed communication channel requirement of

InterMiCOM

64

cannot be provided, EIA(RS)232 provides a cost effective alternative.

Because of the differences between the implementation of EIA(RS)232 InterMiCOM and

InterMiCOM64, the settings associated with each implementation are different. Refer to

P54x/EN ST for details of all settings. There are settings to prevent inadvertent crossconnection or loopback of communications channels (address settings), settings to accommodate different channel requirements (baud rate, clock source, channel selection) as well as the different settings used for channel quality monitoring and signal management actions in the event of channel failures.

The received InterMiCOM signals are continually monitored for quality and availability. In the event of quality or availability of the received signals falling below set levels, then an alarm can be raised.

Note An alarm indicating the signaling has failed, refers only to the incoming signals. The remote relay will monitor the other direction of the communications link for quality of transmission. If indication of the quality of the signal transmitted from the local relay for reception at the remote relay is required, then one of the InterMiCOM command channels can be used to reflect this back.

For software versions D1a and later:

Introduction

When a trip is issued by the differential element, in addition to tripping the local breaker, the relay will send a differential intertrip signal to the remote terminals. This will ensure tripping of all ends of the protected line, even for marginal fault conditions.

Selectable Inter-Tripping

The Line Differential communication channel Inter-tripping signals can be Enabled /

Disabled independently via the relay menu (“GROUP x PHASE DIFF” menu Column).

Menu Text Default setting Setting Range

Intertrip CH1 Enabled Disabled or Enabled

Intertrip CH2 Enabled Disabled or Enabled

When set to Disabled, Differential Intertrips will NOT be sent to the remote end via the selected protection communications channel.

P54x/EN AP/Nd5 Page (AP) 6-75

(AP) 6 Application Notes

2.17.1

Application of Individual Protection Functions

When set to Enabled, Differential Intertrips will be sent to the remote end via the selected protection communications channel, i.e. operation is as per the existing products without these settings.

The settings should be applied at all relays in the current differential protection scheme.

EIA(RS)232 InterMiCOM (“Modem InterMiCOM”)

The settings needed for the implementation of MODEM InterMiCOM are stored in two columns of the menu structure. The first column entitled INTERMICOM COMMS contains all the information to configure the communication channel and also contains the channel statistics and diagnostic facilities. The second column entitled INTERMICOM

CONF selects the format of each signal and its fallback operation mode.

The settings needed for the InterMiCOM signaling are largely dependant on whether a direct or indirect (modem/multiplexed) connection between the scheme ends is used.

Direct connections will either be short metallic or dedicated fiber optic based (by means of suitable EIA(RS)232 to optical fiber converters) and hence can be set to have the highest signaling speed of 19200b/s. Due to this high signaling rate, the difference in operating speed between the direct, permissive and blocking type signals is so small that the most secure signaling (direct intertrip) can be selected without any significant loss of speed. In turn, since the direct intertrip signaling requires the full checking of the message frame structure and CRC checks, it would seem prudent that the IM# Fallback

Mode be set to Default with a minimal intentional delay by setting IM# FrameSyncTim to

10 msecs. In other words, whenever two consecutive messages have an invalid structure, the relay will immediately revert to the default value until a new valid message is received.

For indirect connections, the settings that can be applied will become more application and communication media dependent. As for the direct connections, consider only the fastest baud rate but this will usually increase the cost of the necessary modem/multiplexer. In addition, devices operating at these high baud rates may suffer from data jams during periods of interference and in the event of communication interruptions, may require longer re-synchronization periods. Both of these factors will reduce the effective communication speed thereby leading to a recommended baud rate setting of 9.6 kbit/s. As the baud rate decreases, the communications will become more robust with fewer interruptions, but the overall signaling times will increase.

Since it is likely that slower baud rates will be selected, the choice of signaling mode becomes significant. However, once the signaling mode has been chosen it is necessary to consider what should happen during periods of noise when message structure and content can be lost. If Blocking mode is selected, only a small amount of the total message is actually used to provide the signal, which means that in a noisy environment there is still a good likelihood of receiving a valid message. In this case, it is recommended that the IM# Fallback Mode is set to Default with a reasonably long IM#

FrameSyncTim . A typical default selection of Default = 1 (blocking received substitute) would generally apply as the failsafe assignment for blocking schemes.

If Direct Intertrip mode is selected, the whole message structure must be valid and checked to provide the signal, which means that in a very noisy environment the chances of receiving a valid message are quite small. In this case, it is recommended that the

IM# Fallback Mode is set to Default with a minimum IM# FrameSyncTim setting i.e. whenever a non-valid message is received, InterMiCOM will use the set default value. A typical default selection of Default = 0 (intertrip NOT received substitute) would generally apply as the failsafe assignment for intertripping schemes.

If Permissive mode is selected, the chances of receiving a valid message is between that of the Blocking and Direct Intertrip modes. In this case, it is possible that the

IM# Fallback Mode is set to Latched . The table below highlights the recommended

IM# FrameSyncTim settings for the different signaling modes and baud rates:

Page (AP) 6-76 P54x/EN AP/Nd5

Application of Individual Protection Functions

2.18

2.18.1

(AP) 6 Application Notes

Baud rate

Minimum recommended

“IM# FrameSyncTim” Setting

600

Direct intertrip mode

100

1200 50

250

130

Blocking mode

2400 30

4800 20

9600 10

19200 10

70

40

20

10

Minimum setting (ms)

100

50

30

20

10

10

Maximum setting (ms)

1500

1500

1500

1500

1500

1500

Note No recommended setting is given for the Permissive mode since it is anticipated that Latched operation will be selected. However, if Default

mode is selected, the IM# FrameSyncTim setting should be set greater than the minimum settings listed above. If the IM# FrameSyncTim setting is set lower than the minimum setting listed above, there is a danger that the relay will monitor a correct change in message as a corrupted message.

A setting of 25% is recommended for the communications failure alarm.

InterMiCOM

64

(“Fiber InterMiCOM”)

The protection signaling channels of the P54x primarily intended to provide the capability for implementing current differential protection are also capable of supporting

InterMiCOM

64

teleprotection. If the P54x is configured to provide differential protection, then the InterMiCOM

64

commands (IMx command) are transmitted together with the current differential signals. If the differential protection of the P54x is not being employed, then the communications messages are restructured to provide InterMiCOM

64

signaling of the type supported by the MiCOM P446, P443 and P445 relays. In either case, the fundamental operation of the InterMiCOM64 commands is the same.

IMx Command Type

Due to the fast data rate, there is not so much difference in real performance between the three generic modes of teleprotection (Direct Intertrip, Permissive and Blocking), so only two are implemented for InterMiCOM64. Direct Intertripping is available, with the second mode a combined mode for Permissive/Blocking (the latter is named as ‘Permissive’ in the menu). To increase the security for Intertripping (Direct transfer tripping), the

InterMiCOM64 Direct command is issued only when 2 valid consecutive messages are received. The recommended setting is:

For Blocking schemes

For Permissive scheme

For Transfer (inter)tripping set set set

‘Permissive’

‘Permissive’

‘Direct’

The setting files provide independent setting for each of the first 8 commands. Due to the fast data rate, there will be minimal speed difference between the two mode options. Both will give a typical operating time (PSL trigger at the send relay, to PSL state change at the receive relay) as shown in the following table:

P54x/EN AP/Nd5 Page (AP) 6-77

(AP) 6 Application Notes Application of Individual Protection Functions

Channel Mode

Setting

Application

Typical Delay

(ms)

Permissive Direct Fiber

Direct Intertrip Direct Fiber

3 to 7

Multiplexed Link 5 to 8 + MUX

4 to 8

Multiplexed Link 6 to 8 + MUX

Maximum

(ms)

Comments

9 Assuming no repeaters (no source of digital noise).

12 + MUX For channel bit error rate up to 1 x 10

-3

.

10 Assuming no repeaters (no source of digital noise).

13 + MUX For channel bit error rate up to 1 x 10

-3

.

Table 8 - Typical operating times (PSL at send relay, to PSL state change at receive)

These figures are for InterMiCOM64 used as a standalone feature. For use with differential message, add 2 ms for permissive mode and 4 ms for direct intertrip at 64

Kb/sec.

When using InterMiCOM64 to implement Aided Scheme 1 or Aided Scheme 2, it is suggested to assume a conservative worst-case channel delay of 15 ms (pickup and reset delay), for the purposes of blocking and reversal guard calculations. The delay of the multiplexer should be added if applicable, taking into account longer standby path reroutings which might be experienced in the event of self-healing in a SONET/SDH telecomms network.

When using InterMiCOM64 as a standalone feature in 3-terminal applications, where fallback to “chain” topology is possible in the event of failure of one communications leg in the triangle, longer times may be experienced. In fallback mode, retransmission of the messages occurs so the path length is doubled. Overall command times to the final end can be doubled.

2.18.2 IMx Fallback Mode

When the ‘ Default ’ setting is selected, the following ‘ IMx Default Value ’ settings are recommended: For Intertripping schemes set 0 , for Blocking schemes set 1 . In

Permissive applications, the user may prefer to latch the last healthy received state

Page (AP) 6-78 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3

3.1

3.1.1

(AP) 6 Application Notes

WORKED PROTECTION EXAMPLE AND OTHER

PROTECTION TIPS

Differential Protection Setting Examples

Differential Element

All four settings are user adjustable. This flexibility in settings allows the relay characteristic to be tailored to suit particular sensitivity and CT requirements. To simplify the protection engineer’s task, we strongly recommend three of the settings be fixed to:

Ι s2 = k1 = k2 =

2.0 pu

30%

150% (2 terminal applications) or 100% (3 terminal applications)

These settings will give a relay characteristic suitable for most applications. It leaves only the Is1 setting to be decided by the user. The value of this setting should be in excess of any mismatch between line ends, if any, and should also account for line charging current, where necessary.

By considering the circuit shown in in the Typical Plain Feeder Circuit diagram below, the settings for the phase current differential element can be established.

33kV 25km 33kV

400/1 400/1

P54x/EN AP/Nd5

Digital communications link

P540 P540

Steady state charging current = 2.5 A/km - cable

= 0.1 A/km – overhead line

P1010ENa

Figure 25 - Typical plain feeder circuit

The following settings should be set as follows:

Ι s2 k1 k2

=

=

=

2.0 pu

30%

150% (for a two terminal application)

This leaves the setting of

Ι s1 to be established.

In the case that voltage inputs are not in place, no facility to account for line charging current is available. The setting of

Ι s1 must therefore be set above 2.5 times the steady state charging current value. In this example, assume a cable is used and there are not

VT inputs connected to the relay:

Ι s1 > 2.5 x

Ι ch

Ι s1 > 2.5 x (25km x 2.5 A/km)

Ι s1 > 156.25 A

The line CTs are rated at 400 amps primary. The setting of

Ι s1 must therefore exceed

156.25/400 = 0.391 pu. Therefore select:

Ι s1 = 0.4 pu

Page (AP) 6-79

(AP) 6 Application Notes

3.1.2

Worked Protection Example and other Protection Tips

If VT is connected, a facility exists to overcome the effects of the line charging current. It will be necessary in this case to enter the line positive sequence susceptance value. This can be calculated from the line charging current as follows (assuming a VT ratio of

33 kV / 110 V):

Ι ch = 25 x 2.5 A = 62.5 A

Susceptance B =

ω

C =

Ι ch/V

B

B

=

=

Therefore set:

B =

62.5 A/(33/ 3 ) kV primary

3.28 x 10-3 S primary

3.28 mS primary (= 2.46 mS secondary)

Ι s1 may now be set below the value of line charging current if required, however it is suggested that Is1 is chosen only sufficiently below the charging current to offer the required fault resistance coverage as described in the Relay Sensitivity under Heavy

Load Conditions section Where charging current is low or negligible, the recommended factory default setting of 0.2

Ι n should be applied.

Transformer Feeder Examples

Ratio Correction Example:

P543 and P545 relays are suitable for the protection of transformer feeders. An example is shown in the following diagram.

20MVA Transformer, Dyn1, 33/11 kV

HV CT ratio - 400/1

LV CT ratio - 1500/1

Dyn1

20MVA 33/11kV

400/1 1500/1

350A 1050A

0° -30°

0.875

0.7

P540

Yyo x1.14

Digital communications channel

Figure 26 - Typical transformer feeder circuit

P540

Yd11 x1.43

P1011ENa

Page (AP) 6-80 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips (AP) 6 Application Notes

It is necessary to calculate the required ratio correction factor to apply to the relays at each line end.

33 kV full load current =

Secondary current =

11 kV full load current =

Secondary current =

20 MVA/(33 kV. 3 ) = 350 A

350 x 1/400 = 0.875A

20 MVA/(11 kV. 3 ) = 1050 A

1050 x 1/1500 = 0.7A

Each of these secondary currents should be corrected to relay rated current; in this case

1A.

HV ratio correction factor 1/0.875 = 1.14 [Setting applied to relay]

LV ratio correction factor 1/0.7 = 1.43 [Setting applied to relay]

When a Star/Delta software interposing CT is chosen, no additional account has to be taken for the 3 factor which would be introduced by the delta winding. This is accounted for by the relay.

Phase Correction Example:

Using the same transformer as shown in the Typical Transformer Feeder Circuit diagram shown above it is now necessary to correct for the phase shift between the HV and LV windings.

The transformer connection shows that the delta connected high voltage line current leads the low voltage line current by 30°. To ensure that this phase shift does not create a differential current, the phase shift must be corrected in the LV secondary circuit. The LV relay software interposing CT is effectively a winding replica of the main power transformer. It not only provides a +30° phase shift, but also performs the necessary function of filtering out any LV zero sequence current component.

Hence, the HV relay setting requires no phase shift or zero sequence current filtering (as

HV winding is delta connected). The LV relay setting requires phase shifting by +30° and also requires zero sequence current filtering (as LV winding is star connected).

Set: HV = Yy0

LV = Yd11 (+30°)

It is important when considering the software ICT connection, to account for both the phase shift and zero sequence current filtering. For example, with the transformer in the

Typical Transformer Feeder Circuit diagram shown above, it would have been possible to provide phase compensation by applying Yd1 and Yy0 settings to the HV and LV relays respectively. Although this provides correct phase shift compensation, no zero sequence current filtering exists on the LV side and hence relay maloperation could occur for an external earth fault.

P54x/EN AP/Nd5 Page (AP) 6-81

(AP) 6 Application Notes

3.1.3

Worked Protection Example and other Protection Tips

Teed Feeder Example

End A

275 kV

4000/5

45 km

P543

Ch 1

Ch 2

Digital communication link

Digital communication link

End C

275 kV

1200/5

4000/5

End B

275 kV

30 km

Ch 2

Ch 1 P543

Digital communication link

P543

Ch 1 Ch 2

Steady State Charging Current = 0.58 A/Km Overhead Line

P1502ENc

Figure 27 - Typical teed feeder application

If there are not VT inputs connected, P54x relays have not facilities to account for charging line current, therefore the setting Is1 must be 2.5 times the steady state charging current.

If VT inputs are connected, there is a facility to overcome the effect of charging current.

As mentioned before, it is necessary to enter the positive sequence susceptance value.

Considering the charging current on the circuit shown in the previous Typical Feed

Feeder Application diagram, the following calculation is done:

Ich = 0.58 A ( 45 + 30 + 10 ) = 49.3 A

Susceptance =

ω

B = 49.3 A/( 275/

C = Ich/V

3) kV primary

B = 0.31 x 10-3 S primary.

As the CT ratio on the three ends are different, it is necessary to apply a correction factor in order to ensure secondary currents balance for all conditions:

Page (AP) 6-82 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips (AP) 6 Application Notes

To calculate the Correction Factor (CF), the same primary current must be used even this current is not the expected load transfer for every branch. This will ensure secondary current balance for all conditions.

A good approximation to calculate the CF, would be to use the primary rated current of the smallest CT ratio as a base current. In this case we will use the primary rated CT current at End C, in order to correct the secondary currents to the relay rated current:

For End A 1200 A

Secondary current =1200x 5/4000 = 1.5 A

CF = 5/1.5 = 3.33

For End B 1200 A

Secondary current =1200x 5/4000 = 1.5 A

CF = 5/1.5 = 3.33

For End C 1200 A prim = 5 A sec

Secondary current =1200x 5/1200 = 5 A

CF = 5/5 = 1

As mentioned in the above Differential Element Example, the following settings are recommended:

Is1 = 0.2 In

Is2 = 2 In

K1 = 30%

K2 = 100%

Therefore, settings in secondary values for each end are:

Is1 = 0.2In =1 A

Is2 = 2In =10 A

Note Settings shown in primary values at ends A and B appear different compared with end C. This is not a problem as the currents at ends A and B will be multiplied by the CF, when the differential calculation is done. There would not be a requirement to alter settings by CF as the relay works in secondary values.

Susceptance Settings:

For Ends A and B

With a VT ratio 275 kV/110 V and CT ratio 4000/5

RCT

RVT

B =

= 800

=

310

µ

S

2500

Secondary susceptance = 310

µ

S x RVT/ RCT = 968

µ

S

For End C

With a VT ratio 275 kV/110 V and CT ratio 1200/5

B = 310

µ

S

Secondary susceptance = 310

µ

S x RVT/ RCT = 3.22 mS sec.

P54x/EN AP/Nd5 Page (AP) 6-83

(AP) 6 Application Notes

3.1.4

Worked Protection Example and other Protection Tips

Three Winding Transformer in Zone with Different Rated CTs Example

P543 and P545 relays are suitable for the protection of three winding transformers in zone. An example is shown in the Three winding transformer in zone application diagram shown below.

100 MVA/100MVA/30MVA Transformer, Ynyn0d1, 400 kV/110 kV/30 kV

HV, 400 kV CT ratio - 600/1

MV, 110 kV CT ratio - 1200/1

LV, 30 kV CT ratio - 2000/5

400kV

Ynyn0d1

100MVA/100MVA/30MVA 110 kV

600/1 1220/1

P543/5

Yd1 x 4.16

Ch 1

Ch 2

Digital communication link

30 kV 2000/5

Ch 2

Ch 1

P543/5

Yd1 x 3.81

Digital communication link

Digital communication link

P543/5

Yy0 x 1

Ch 1 Ch 2 P1503ENc

Figure 28 - Three winding transformer in zone application

These three relays must be rated differently, i.e. 1A for HV and MV side and 5 A for 30 kV side. This does not present a problem for P54x relays as the digital signals representing the currents are in pu.

It is necessary to calculate the required ratio Correction Factor (CF) as well as the phase correction factor for each end. To choose the appropriate vector compensation, it is necessary to account for phase current and zero sequence current filtering as explained in example the above Transformer Feeder Example section.

To calculate the CF range, it is necessary to use the same MVA base for the three sides of the transformer although the third winding actually has a lower rated MVA. This is to ensure secondary current balance for all conditions.

For HV side: 100 MVA/ (400 kV.

3) = 144.34 A.

Secondary current

For MV side: 100 MVA/ (110 kV.

3)

Secondary current

For LV side: 100 MVA/ (30 kV.

3)

Secondary current

=

=

=

=

=

144.34 x 1/600 = 0.24 A

524.86 A.

524.86 x 1/1200 = 0.44 A

1924.5 A.

1924.5x 5/2000 = 4.81 A

Page (AP) 6-84 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips (AP) 6 Application Notes

Each secondary current should be corrected to relay rated current, in this case 1A for HV and MV side and 5 A for 30 kV side

HV ratio CF = 1/0.24 = 4.16

MV ratio CF = 1/0.44 = 2.29

LV ratio CF = 5/4.81 = 1.04

To choose the vector compensation connection, it should be noted that the Wye connected HV line is in phase with the MV line current and leads the LV line current by

30o. Therefore for LV side, the phase shift must be compensated.

To account for the zero sequence current filtering in the case of an external earth fault, it is necessary to connect the Wye connected power transformer windings to an interposing current transformer (internal relay ICT) to trap the zero sequence current (the secondary side being connected delta).

To account for both vector compensation and zero sequence current filtering, the following vectorial compensation setting is recommended:

For HV side = Yd1 (-30 deg)

For MV side = Yd1 (-30 deg)

For LV side = Yy0 (0 deg)

Note It is not necessary to include the

3 factor in the calculation as this is incorporated in the relay algorithm.

P543 and P545 relays are suitable for transformer applications, as such an inrush restrain is provided on these relay models. By enabling inrush restrain, an additional current differential high setting (Id High set) becomes enable.

When the inrush restrain feature is enabled, it is necessary that this function is enabled in the relay at each line end (3 ends).

For the differential calculation the same recommended settings for the previous examples are recommended:

Is1 = 0.2 In

Is2 = 2 In

K1 = 30%

K2 = 100%

Therefore, settings in secondary values are:

For relays rated to 1 A (HV and MV sides) Is1 = 200 mA and Is2 = 2 A

For relay rated to 5 A (LV side) Is1 = 1 A and Is2 = 10 A

For the current differential high setting (Id High set) the setting must be in excess of the anticipated inrush current after ratio correction. Assuming that maximum inrush is 12 times the nominal transformer current, it would be safe to set the relays at 15 times the nominal current, therefore the setting would be:

Id high set : for HV side = 15 In = 15 A for MV side = 15 In = 15 A for LV side = 15 In = 75 A

P54x/EN AP/Nd5 Page (AP) 6-85

(AP) 6 Application Notes

3.2

3.2.1

Worked Protection Example and other Protection Tips

Distance Protection Setting Example

Objective

To protect the 100 km double circuit line between Green Valley and Blue River substations using a MiCOM P445/P54x in distance POR Permissive Overreach mode and to set the relay at Green Valley substation, shown in the following diagram. It is assumed that mho characteristics will be used.

Tiger Bay Green Valley Blue River Rocky Bay

100km

80km 60km

3.2.2

3.2.3

Page (AP) 6-86

System data

Green Valley – Blue River transmission line

System voltage 230kv

System grounding solid

CT ratio 1200/5

VT ratio 230000/115

Line length 100km

Line impedance

Z1 = 0.089 + J0.476 OHM/km

Z2 = 0.426 + J1.576 OHM/km

Fault levels

Green Valley substation busbars maximum 5000MVA, minimum 2000MVA

Blue River substation busbars maximum 3000MVA, minimum 1000MVA

Circuit continuous rating = 400MVA

Worst-case power factor of load = 0.85

P1019ENb

Figure 29 - System assumed for worked example

System Data

Line length:

Line impedances:

CT ratio:

VT ratio:

100 km

Z1

Z0

=

=

Z0/Z1 =

1 200/5

230 000/115

0.089 + j0.476 = 0.484

3.372

-4.6

°

79.4

° Ω

/km

0.426 + j1.576 = 1.632

74.8

° Ω

/km

Relay Settings

It is assumed that Zone 1 Extension is not used and that only three forward zones are required. Settings on the relay can be performed in primary or secondary quantities and impedances can be expressed as either polar or rectangular quantities (menu selectable). For the purposes of this example, secondary quantities are used.

P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.2.4 Line Impedance

(AP) 6 Application Notes

3.2.5 Residual Compensation For Ground Fault Elements

3.2.6 Zone 1 Phase and Ground Reach Settings

P54x/EN AP/Nd5 Page (AP) 6-87

(AP) 6 Application Notes

3.2.7

3.2.8

3.2.9

3.2.10

Worked Protection Example and other Protection Tips

Zone 2 Phase and Ground Reach Settings

Required Zone 2 impedance = (Green Valley-Blue River) line impedance + 50%

(Blue River-Rocky Bay) line impedance

Z2 = (100+30) x 0.484

79.4

°

x 0.12 = 7.56

79.4

° Ω

secondary.

The Line Angle = 80

°

Actual Zone 2 reach setting = 7.56

80

° Ω

secondary

Alternatively, in SIMPLE setting mode, this reach can be set as a percentage of the protected line. Typically a figure of at least 120% is used.

Zone 3 Phase and Ground Reach Settings

Required Zone 3 forward reach

River-Rocky Bay) x 1.2

Z3

=

=

= (Green Valley-Blue River + Blue

(100+60) x 1.2 x 0.484

79.4

°

x 0.12

11.15

79.4

°

ohms secondary

Actual Zone 3 forward reach setting = 11.16

80

°

ohms secondary

Alternatively, in SIMPLE setting mode, this reach can be set as a percentage of the protected line.

Zone 3 Reverse Reach

In the absence of other special requirements, Zone 3 can be given a small reverse reach setting, of Z3’ = 10%. This is acceptable because the protected line length is > 30km.

Zone 4 Reverse Settings with POR and BLOCKING Schemes

Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive

Overreach schemes, zone 4 must reach further behind the relay than zone 2 for the remote relay. This can be achieved by setting: Z4

((Remote zone 2 reach) x 120%), where mho characteristics are used.

Remote Zone 2 reach = (Blue River-Green Valley) line impedance + 50%n

(Green Valley-Tiger Bay) line impedance

Z4

=

=

=

(100+40) x 0.484

79.4

°

x 0.12

8.13

79.4

° Ω

secondary

((8.13

79.4

°

) x 120%) - (5.81

79.4

°

)

3.95

79.4

°

Minimum zone 4 reverse reach setting = 3.96

80

°

ohms secondary

Page (AP) 6-88 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.2.11

3.2.12

3.2.12.1

(AP) 6 Application Notes

Load Avoidance

I

The maximum full load current of the line can be determined from the calculation:

FLC

= [(Rated MVA

FLC

) / (

3 x Line kV)]

In practice, relay settings must allow for a level of overloading, typically a maximum current of 120% I

FLC

prevailing on the system transmission lines. Also, for a double circuit line, during the auto-reclose dead time of fault clearance on the adjacent circuit, twice this level of current may flow on the healthy line for a short period of time. Therefore the circuit current loading could be 2.4 x I

FLC

.

With such a heavy load flow, the system voltage may be depressed, typically with phase voltages down to 90% of Vn nominal.

Allowing for a tolerance in the measuring circuit inputs (line CT error, VT error, relay tolerance, and safety margin), this results in a load impedance which might be 3 times the expected “ rating ”.

To avoid the load, the blinder impedance needs to be set:

Z

=

(Rated phase-ground voltage Vn) / (I

(115/√3) / (I

FLC

x 3)

FLC

x 3)

Set the V< Blinder voltage threshold at the recommended 70% of Vn = 66.4 x 0.7 = 45 V.

Additional Settings for Quadrilateral Applications

Phase Fault Resistive Reaches (Rph)

In primary impedance terms, RPh reaches must be set to cover the maximum expected phase-to-phase fault resistance. Ideally, RPh must be set greater than the maximum fault arc resistance for a phase-phase fault, calculated as follows:

Ra = (28710 x L)/If

1.4

Where:

If

L

=

=

Ra =

Minimum expected phase-phase fault current (A);

Maximum phase conductor separation (m);

Arc resistance, calculated from the van Warrington formula (

).

Typical figures for Ra (primary

) are given in the following table, for different values of minimum expected phase fault current.

Conductor spacing (m) Typical system voltage (kV) If = 1 kA If = 2 kA

4

8

11

110 - 132

220 - 275

380 - 400

7.2

14.5

19.9

2.8

5.5

7.6

If = 3 kA

1.6

3.1

4.3

Note Dual-end infeed effects will make a fault resistance appear higher, because each relay cannot measure the current contribution from the remote line end. The apparent fault resistance increase factor could be 2 to 8 times the calculated resistance. Therefore it is recommended that the Zone resistive reaches are set to say, 4 times the primary arc resistance calculation.

Typical figures for Ra (primary

) for different values of minimum expected phase fault current

P54x/EN AP/Nd5 Page (AP) 6-89

(AP) 6 Application Notes

3.2.12.2

Worked Protection Example and other Protection Tips

In the example, the minimum phase fault level is 1000 MVA. This is equivalent to an effective short-circuit fault feeding impedance of:

Z = kV 2/MVA = 2302/1000 = 53

(primary)

The lowest phase fault current level is equivalent to:

Ifault =

=

(MVA x 1000)/(

3 x kV)

(1000 x 1000)/(

3 x 230)

= 2.5 kA

And this fault current in the van Warrington formula would give an arc resistance of:

Ra = 4

As this impedance is relatively small compared to the value “Z” calculated above, there is no need to perform an iterative equation to work out the actual expected Ifault (which would in reality be lower due to the added Ra arc resistance in the fault loop). It will suffice to increase the calculated Ra by the recommended factor of four, and a little extra to account for the fault current being lower than that calculated. So, in this case use a minimum setting of 5 x Ra, which is 20

primary.

It is obvious that the setting could easily be set above 20

on the primary system

(perhaps following the rule of thumb formula in the Quadrilateral Phase Resistive

Reaches section earlier in this chapter). Typically, all zone resistive reaches would be set greater than this 20

primary figure, and ideally less than the load impedance (see the

Load Avoidance section).

Ground Fault Resistive Reaches (RGnd)

Fault resistance would comprise arc-resistance and tower footing resistance. A typical resistive reach coverage setting would be 40

on the primary system.

For high resistance earth faults, the situation may arise where no distance elements could operate. In this case it will be necessary to provide supplementary earth fault protection, for example using the relay Channel Aided DEF protection. In such cases it is not essential to set large resistive reaches for ground distance, and then RGnd can be set according to the rule of thumb formula in the Quadrilateral Ground Resistive Reaches and Tilting section earlier in this chapter.

Page (AP) 6-90 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.3

3.3.1

3.3.2

(AP) 6 Application Notes

Teed Feeder Protection

The application of distance relays to three terminal lines is fairly common. However, several problems arise when applying distance protection to three terminal lines.

Apparent Impedance seen by the Distance Elements

The following illustration shows a typical three terminal line arrangement. For a fault at the busbars of terminal B the impedance seen by a relay at terminal A will be equal to:

Za = Zat + Zbt + [Zbt.(Ic/Ia)]

Relay A will underreach for faults beyond the tee-point with infeed from terminal C. When terminal C is a relatively strong source, the underreaching effect can be substantial. For a zone 2 element set to 120% of the protected line, this effect may result in non-operation of the element for internal faults. This not only effects time delayed zone 2 tripping but also channel-aided schemes. Where infeed is present, it will be necessary for Zone 2 elements at all line terminals to overreach both remote terminals with allowance for the effect of tee-point infeed. Zone 1 elements must be set to underreach the true impedance to the nearest terminal without infeed. Both these requirements can be met through use of the alternative setting groups.

I a

I b

B

Z at

Z bt

I c

Z ct

V a

= I a

Z at

+ I b

Z bt

I b

= I a

+ I c

Impedance seen by relay A = V

I a a

C

Figure 30 - Teed feeder application - apparent impedances seen by relay

P1018ENb

Permissive Overreach (POR) Schemes

To ensure operation for internal faults in a POR scheme, the relays at the three terminals should be able to see a fault at any point within the protected feeder. This may demand very large zone 2 reach settings to deal with the apparent impedances seen by the relays.

A POR scheme requires the use of two signaling channels. A permissive trip can only be issued upon operation of zone 2 and receipt of a signal from both remote line ends. The requirement for an 'AND' function of received signals must be realized through use of contact logic external to the relay, or the internal Programmable Scheme Logic (PSL).

Although a POR scheme can be applied to a three terminal line, the signaling requirements make its use unattractive.

P54x/EN AP/Nd5 Page (AP) 6-91

(AP) 6 Application Notes

3.3.3

Worked Protection Example and other Protection Tips

Permissive Underreach Schemes

For a PUR scheme, the signaling channel is only keyed for internal faults. Permissive tripping is allowed for operation of zone 2 plus receipt of a signal from either remote line end. This makes the signaling channel requirements for a PUR scheme less demanding than for a POR scheme. A common Power Line Carrier (PLC) signaling channel or a triangulated signaling arrangement can be used. This makes the use of a PUR scheme for a teed feeder a more attractive alternative than use of a POR scheme.

The channel is keyed from operation of zone 1 tripping elements. Provided at least one zone 1 element can see an internal fault then aided tripping will occur at the other terminals if the overreaching zone 2 setting requirement has been met. There are however two cases where this is not possible:

The following figure is divided into three parts: (i), (ii) and (ii).

Part (i) shows the case where a short tee is connected close to another terminal. In this case, zone 1 elements set to 80% of the shortest relative feeder length do not overlap. This leaves a section not covered by any zone 1 element. Any fault in this section would result in zone 2 time delayed tripping.

Part (ii) shows an example where terminal 'C' has no infeed. Faults close to this terminal will not operate the relay at 'C' and hence the fault will be cleared by the zone 2 time-delayed elements of the relays at 'A' and 'B'.

Part (iii) illustrates a further difficulty for a PUR scheme. In this example current is outfed from terminal 'C' for an internal fault. The relay at 'C' will therefore see the fault as reverse and not operate until the breaker at 'B' has opened; i.e. sequential tripping will occur.

(i)

A B

Z1A

(ii)

A

C

Z1C

(iii)

A

= area where no zone 1 overlap exists

B

Z1A Z1B

C

No infeed

Fault

Fault seen by A & B in zone 2

B

C

Relay at C sees reverse fault until B opens

Figure 31 - Teed feeder applications

P1166ENa

Page (AP) 6-92 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.3.4

3.4

3.4.1

(AP) 6 Application Notes

Blocking Schemes

Blocking schemes are particularly suited to the protection of teed feeders, since high speed operation can be achieved where there is no current infeed from one or more terminals. The scheme also has the advantage that only a common simplex channel or a triangulated simplex channel is required.

The major disadvantage of blocking schemes is highlighted in section (iii) of the previous figure where fault current is outfed from a terminal for an internal fault condition. Relay 'C' sees a reverse fault condition. This results in a blocking signal being sent to the two remote line ends, preventing tripping until the normal zone 2 time delay has expired.

VT Connections

Open Delta (Vee Connected) VTs

MiCOM relays can be used with V-connected VTs by connecting the VT secondaries to:

C19, C20 and C21 input terminals, with the C22 input left unconnected for P14x,

P443, P445, P543, P544 and P841A

D19, D20 and D21 input terminals, with the D22 input left unconnected for P446,

P545, P546, P547 and P841B

C2, C4 and E2 input terminals, with the Vn input left unconnected for P64x (P642,

P643 & P645)

For more details, see the see the Connection Diagrams chapter.

This type of VT arrangement cannot pass zero-sequence (residual) voltage to the relay, or provide any phase to neutral voltage quantities. Therefore any protection that is dependent upon phase to neutral voltage measurements should be disabled.

The ground directional comparison elements, ground distance elements, neutral voltage displacement (residual overvoltage) and CT supervision all use phase-to-neutral voltage signals for their operation and should be disabled. The DEF elements should be selected for negative sequence polarization to avoid the use of phase-to-neutral voltages. Under and over voltage protection can be set as phase-to-phase measuring elements, whereas all other protection elements should remain operational.

The accuracy of the single phase voltage measurements can be impaired when using vee connected VT’s. The relay attempts to derive the phase to neutral voltages from the phase to phase voltage vectors. If the impedance of the voltage inputs were perfectly matched the phase to neutral voltage measurements would be correct, provided the phase to phase voltage vectors were balanced. However, in practice there are small differences in the impedance of the voltage inputs, which can cause small errors in the phase to neutral voltage measurements. This may give rise to an apparent residual voltage. This problem also extends to single phase power measurements that are also dependent upon their respective single phase voltages.

The phase to neutral voltage measurement accuracy can be improved by connecting three, well-matched, load resistors between the relevant phase voltage inputs and neutral thus creating a ‘virtual’ neutral point. The load resistor values must be chosen so that their power consumption is within the limits of the VT. It is recommended that 10 k

Ω ±

1%

(6 W) resistors are used for the 110 V (Vn) rated relay, assuming the VT can supply this burden.

The connections are as follows for different MiCOM IEDs:

Phase Voltage Inputs Neutral MiCOM IEDs

C19, C20, C21

D19, D20, D21

C22

D22

P14x/P443/P445/P446/P543/P544/P841A

P545/P546/P841B

P54x/EN AP/Nd5 Page (AP) 6-93

(AP) 6 Application Notes

3.4.2

Worked Protection Example and other Protection Tips

VT Single Point Earthing

The MiCOM P14x/P443/P445/P446/P54x/P547/P64x/P841 will function correctly with conventional 3-phase VTs earthed at any one point on the VT secondary circuit. Typical earthing examples being neutral earthing, or B-phase (UK: “ yellow phase ” earthing).

Page (AP) 6-94 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.5

3.5.1

3.5.1.1

(AP) 6 Application Notes

Trip Circuit Supervision (TCS)

The trip circuit, in most protective schemes, extends beyond the IED enclosure and passes through components such as fuses, links, relay contacts, auxiliary switches and other terminal boards. This complex arrangement, coupled with the importance of the trip circuit, has led to dedicated schemes for its supervision.

Several Trip Circuit Supervision (TCS) scheme variants are offered. Although there are no dedicated settings for TCS, in the MiCOM P24x / P34x / P443 / P445 / P446 / P54x /

P547 / P64x / P746 / P841 the following schemes can be produced using the

Programmable Scheme Logic (PSL). A user alarm is used in the PSL to issue an alarm message on the relay front display. If necessary, the user alarm can be re-named using the menu text editor to indicate that there is a fault with the trip circuit.

TCS Scheme 1

Scheme Description

Trip

Trip

R1

Optional

TCS Scheme 1

Figure 32 - TCS scheme 1

Blocking

Diode

P54x

Opto

Circuit Breaker

Trip

Coil

52a

52b

P2228ENc

P54x/EN AP/Nd5 Page (AP) 6-95

(AP) 6 Application Notes

3.5.1.2

Worked Protection Example and other Protection Tips

This scheme provides supervision of the trip coil with the breaker open or closed, however, pre-closing supervision is not provided. This scheme is also incompatible with latched trip contacts, as a latched contact will short out the opto for greater than the recommended DDO timer setting of 400ms. If breaker status monitoring is required a further 1 or 2 opto inputs must be used.

Note A 52a CB auxiliary contact follows the CB position and a 52b contact is the opposite.

When the breaker is closed, supervision current passes through the opto input, blocking diode and trip coil. When the breaker is open current still flows through the opto input and into the trip coil via the 52b auxiliary contact. Hence, no supervision of the trip path is provided whilst the breaker is open. Any fault in the trip path will only be detected on CB closing, after a 400ms delay.

Resistor R1 is an optional resistor that can be fitted to prevent maloperation of the circuit breaker if the opto input is inadvertently shorted, by limiting the current to

<60mA. The resistor should not be fitted for auxiliary voltage ranges of 30/34 volts or less, as satisfactory operation can no longer be guaranteed. The table below shows the appropriate resistor value and voltage setting ( Opto Config.

menu) for this scheme.

This TCS scheme will function correctly even without resistor R1, since the opto input automatically limits the supervision current to less that 10mA. However, if the opto is accidentally shorted the circuit breaker may trip.

Auxiliary Voltage (Vx) Resistor R1 (ohms)

24/27

30/34

48/54

110/250

220/250

-

-

1.2k

2.5k

5.0k

Opto Voltage Setting with R1 Fitted

-

-

24/27

48/54

110/125

Note When R1 is not fitted the opto voltage setting must be set equal to supply voltage of the supervision circuit.

Scheme 1 PSL

The next figure shows the scheme logic diagram for the TCS scheme 1. Any of the available opto inputs can be used to show whether or not the trip circuit is healthy. The delay on drop off timer operates as soon as the opto is energized, but will take 400ms to drop off/reset in the event of a trip circuit failure. The 400ms delay prevents a false alarm due to voltage dips caused by faults in other circuits or during normal tripping operation when the opto input is shorted by a self-reset trip contact. When the timer is operated the

NC (normally closed) output relay opens and the LED and user alarms are reset.

The 50ms delay on pick-up timer prevents false LED and user alarm indications during the relay power up time, following an auxiliary supply interruption.

Page (AP) 6-96 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.5.2

3.5.2.1

3.5.2.2

(AP) 6 Application Notes

Opto Input

0

Drop-off

400

0

Straight

0

NC Output Relay

Latching LED

&

Figure 33 - PSL for TCS schemes 1 and 3

TCS Scheme 2

Scheme Description

50

Pick-up

0

User Alarm

P2229ENa

Trip

Circuit Breaker

Trip

Trip

Coil

52a

R1

P54x

Opto A

Optional

52b

R2

P54x

Opto B

Optional

TCS Scheme 2

P2230ENc

Figure 34 - TCS scheme 2

Much like scheme 1, this scheme provides supervision of the trip coil with the breaker open or closed and also does not provide pre-closing supervision. However, using two opto inputs allows the relay to correctly monitor the circuit breaker status since they are connected in series with the CB auxiliary contacts. This is achieved by assigning Opto A to the 52a contact and Opto B to the 52b contact. Provided the Circuit Breaker Status is set to 52a and 52b (CB CONTROL column) the relay will correctly monitor the status of the breaker. This scheme is also fully compatible with latched contacts as the supervision current will be maintained through the 52b contact when the trip contact is closed.

When the breaker is closed, supervision current passes through opto input A and the trip coil. When the breaker is open current flows through opto input B and the trip coil. As with scheme 1, no supervision of the trip path is provided whilst the breaker is open. Any fault in the trip path will only be detected on CB closing, after a 400 ms delay.

As with scheme 1, optional resistors R1 and R2 can be added to prevent tripping of the

CB if either opto is shorted. The resistor values of R1 and R2 are equal and can be set the same as R1 in scheme 1.

Scheme 2 PSL

The PSL for this scheme is practically the same as that of scheme 1. The main difference being that both opto inputs must be off before a trip circuit fail alarm is given.

P54x/EN AP/Nd5 Page (AP) 6-97

(AP) 6 Application Notes Worked Protection Example and other Protection Tips

Opto Input A

Opto Input B

CB Aux 3ph (52a)

1

0

Drop-off

400

CB Aux 3ph (52b)

&

0

Pick-up

50

0

Straight

0

Output Relay

Latching

User Alarm

LED

P2187ENb

Page (AP) 6-98 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.5.3

3.5.3.1

TCS Scheme 3

Scheme Description

(AP) 6 Application Notes

3.5.3.2

P2231ENa

Scheme 3 is designed to provide supervision of the trip coil with the breaker open or closed, but unlike schemes 1 and 2, it also provides pre-closing supervision. Since only one opto input is used, this scheme is not compatible with latched trip contacts. If circuit breaker status monitoring is required a further 1 or 2 opto inputs must be used.

When the breaker is closed, supervision current passes through the opto input, resistor

R2 and the trip coil. When the breaker is open current flows through the opto input, resistors R1 and R2 (in parallel), resistor R3 and the trip coil. Unlike schemes 1 and

2, supervision current is maintained through the trip path with the breaker in either state, thus giving pre-closing supervision.

As with schemes 1 and 2, resistors R1 and R2 are used to prevent false tripping, if the opto-input is accidentally shorted. However, unlike the other two schemes, this scheme is dependent upon the position and value of these resistors. Removing them would result in incomplete trip circuit monitoring. The table below shows the resistor values and voltage settings required for satisfactory operation.

Auxiliary Voltage (Vx)

24/27

30/34

48/54

110/250

220/250

Resistor R1 & R2

(ohms)

-

-

1.2k

2.5k

5.0k

Resistor R3 (ohms) Opto Voltage Setting

-

-

0.6k

1.2k

2.5k

-

-

24/27

48/54

110/125

Note Scheme 3 is not compatible with auxiliary supply voltages of 30/34 volts and below.

Scheme 3 PSL

The PSL for scheme 3 is identical to that of scheme 1.

P54x/EN AP/Nd5 Page (AP) 6-99

(AP) 6 Application Notes

3.6

Worked Protection Example and other Protection Tips

Fault Detector / Trip Supervision (Software Version H4 and later)

The overall trip supervision element can be enabled/disabled. When enabled, it can also

• be enabled/disabled for each of these protection functions.

This feature relates to using fault detectors to supervise the trip signals coming from the line differential and distance protection functions. This supervision element includes these features:

• fast trip time (i.e. the trip signal of the protection function is not delayed due to the supervision element) independent of the differential communications channel where needed, it can be based only on current criteria (as some schemes may not be using voltage detection)

Condition Code Selected Trip Conditions

Overcurrent

Over Neutral

Current

Over Delta

Current

OC

OCN

OCD the (selected) trip condition(s) will be blocked if the phase current is below the overcurrent current threshold setting the (selected) trip condition(s) will be blocked if the derived neutral current is below the neutral current threshold setting the (selected) trip condition(s) will be blocked if the calculated delta currents are below the over delta current threshold setting

Under Phase-to-

Phase Voltage

Under Phase-to-

Ground Voltage

Under Delta

Voltage

UVPP or the (selected) trip condition(s) will be blocked if the calculated phase to phase voltages are above the phase to phase under voltage

27S threshold setting

UVPN or the (selected) trip condition(s) will be blocked if the calculated phases to ground voltages are above the phase to ground under

27G voltage threshold setting

UVD the (selected) trip condition(s) will be blocked if the calculated delta voltages are below the under delta voltage threshold setting

Phase Associated Logic

This table lists the phase relationships between the protection and supervision elements:

Supervision

Elements

A

B

C

Protection element phases

OC

A B C

X

X

X

OCN

N

X

X

X

Table 9 - Phase Association Logic

OCD

A B C AB BC CA A B C A B C

X

X

X

X

X

UVPP

X

X

UVPN UVD

X X

X

X

X

X X X

Page (AP) 6-100 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips (AP) 6 Application Notes

DDB Changes

Several DDB numbers have been modified, including:

P543, P544, P545 & P546 = 1889 to 1892

DDB No

(Ordinal)

1889

1890

1891

1892

English

Definition

Description

TS IDiff. Blk

Provides an indication that Line Differential is blocked by the trip supervision elements. Set to one when any of the supervising elements is enabled for the Line Differential function but none of the elements has met the criteria and the trip signal is high.

CdiffTripA Blk Current Diff Trip A Block by Trip Supervision

CdiffTripB Blk Current Diff Trip B Block by Trip Supervision

CdiffTripC Blk Current Diff Trip C Block by Trip Supervision

Note The Programming Scheme Logic chapter contains details of these DDB Nos.

Monitor points with INF numbers 86 to 93 are available in P443, P445, P446, P543,

P544, P545 and P546.

Monitor points with INF numbers 86 to 93 are available in P543, P544, P545 and P546 only.

See IEC870 Monitor sheet of the Menu Database for further details.

COT

202

202

202

202

202

202

202

202

202

Diff Primary

FUN INF

86

87

88

89

90

91

92

93

94

Distance Primary

138

FUN

138

138

138

138

138

138

138

138

86

87

88

89

90

91

92

93

94

INF

AR Primary

FUN

170

170

170

170

170

170

170

170

170

92

93

94

86

INF

87

88

89

90

91

Description

Supervision block on Z1 Trip

Supervision block on Z2 Trip

Supervision block on Z3 Trip

Supervision block on Z4 Trip

Supervision block on ZP Trip

Supervision block on ZQ Trip

Supervision block on aided1 Z Trip

Supervision block on aided2 Z Trip

Supervision block on IDiff Trip

Table 10 - IEC Monitor Changes

All the below Binary Input points except “TS IDiff.Blk” are available in P443, P445, P446,

P543, P544, P545 and P546.

Binary Input point “TS IDiff.Blk” is available in P543, P544, P545 and P546 only.

See DNPEV Binary Inputs sheet of the Manu Database for further details.

P54x/EN AP/Nd5 Page (AP) 6-101

(AP) 6 Application Notes Worked Protection Example and other Protection Tips

P443 P445 P446

P543 / P545

No Distance

611 573 712

612 574 713

613 575 714

614 576 715

615 577 716

616 578 717

618 579 718

619 580 719

P544 / P546

No Distance

665

666

667

668

669

670

P543 /

P545

662

663

664

767

768

769

770

771

772

P544 /

P546

764

765

766

P547 P841 A P841 B

Table 11 - DNP3 Mapping

These points are not mapped in IEC61850.

Name /

Description

DDB

No.

TS Dist. Z1 Blk 1881

TS Dist. Z2 Blk 1882

TS Dist. Z3 Blk 1883

TS Dist. Z4 Blk 1884

TS Dist. ZP Blk 1885

TS Dist. ZQ Blk 1886

TS Aided1 Z Blk 1887

TS Aided2 Z Blk 1888

TS IDiff. Blk 1889

Page (AP) 6-102 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.7

3.7.1

(AP) 6 Application Notes

InterMiCOM

64

Application Example

The protection signaling channels of the P54x primarily intended to provide the capability for implementing current differential protection are also capable of supporting

InterMiCOM

64

teleprotection. If the P54x is configured to provide differential protection, then the InterMiCOM64 commands (IMx command) are transmitted together with the current differential signals. If the differential protection of the P54x is not being employed, then the communications messages are restructured to provide InterMiCOM

64

signaling of the type supported by the MiCOM P446, P443 and P445 relays. In either case, the fundamental operation of the InterMiCOM

64

commands is the same, but the way in which communications failures are handled differs. In a differential scheme, failure or disturbance of communications could cause failure of the protection scheme and the alarming requirements are high. In a scheme where differential protection is not being employed, and InterMiCOM

64

is being employed to transfer command status between the line ends, communications disturbances may be less critical and this is reflected in the

InterMiCOM

64

implementation of P446, P443 and P445.

An example of how to apply an InterMiCOM

64

scheme is given below. This assumes that the P54x has been configured as a P443/P445 (i.e. no differential protection) and takes account of different level of communication disturbance alarming provided in this configuration. It is also assumed that the optional distance protection is included. This example should be read in conjunction with the InterMiCOM

64

section of the Operation chapter of the MiCOM P446, P443 or P445 Technical Manual.

InterMiCOM

64

Mapping for Three Ended Application – Blocking or PUR example

Figure 34 shows a suggested InterMiCOM64 mapping:

P54x/EN AP/Nd5 Page (AP) 6-103

(AP) 6 Application Notes Worked Protection Example and other Protection Tips

Receive from Remote 1

IM64 Ch 1 Input 1

DDB #096

Receive from Remote 2

IM64 Ch 2 Input 1

DDB #104

1

Receive Logic

Aided 1 Scheme Rx

DDB #493

Aided 1 Send

DDB #498

Input 14

DDB #035

Control Input 1

DDB #192

IM64 Ch 1 Input 2

DDB #097

IM64 Ch 2 Input 2

DDB #105

IM64 Scheme Fail

DDB #314

1

Send Logic

&

Scheme Supervision

IM64 Ch 1 Output 1

DDB #112

Send to Remote 1

IM64 Ch 2 Output 1

DDB #120

Send to Remote 2

IM64 Ch 1 Output 2

DDB #113

IM64 Ch 2 Output 2

DDB #121

Aided 1 COS/LGS

DDB #492

Aid 1 Chan Fail

DDB #317

Non -

Latching

LED 8

DDB #1031

Local Indication

Input 15

DDB #036

IM64 Ch 1 Input 5

DDB #100

IM64 Ch 1 Output 5

DDB #116

IM64 Ch 2 Output 5

DDB #124

1

Direct connection to RS

Transfer Trip

IM64 Ch 2 Input 5

DDB #108

P4162ENa

Figure 35 - InterMiCOM

64

mapping in a three ended application

3.7.2 InterMiCOM

64

Application Example General Advice

MiCOM relays have standard, pre-configured aided scheme logic internal to each relay.

Thus, it is not necessary to draw the zone logic for Permissive Underreach, Permissive

Overreach or Blocking schemes within the PSL. To gain the benefit of selecting a proven and tested scheme, the standard “ Aided ” scheme logic should be used.

When InterMiCOM

64

is being used as the transmission medium for the aided channel signal(s), all that is required is to create one-to-one mapping between the Aided scheme logic, and the InterMiCOM

64

(IM64) signals to be used. The PSL editor is used to perform the simple mapping required.

In order to configure the signal SEND logic:

Route the required Aided send DDB signal to the IM64 Output to be used

In order to configure the signal RECEIVE logic:

Route the required IM64 Input signal to the Aided scheme Rx DDB input

Page (AP) 6-104 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.7.3

3.7.4

(AP) 6 Application Notes

Three-Ended Applications

The example in the “InterMiCOM

64

Application Example General Advice” section shows a three terminal application, in this case in a BLOCKING or PUR scheme mode.

Note: This breaks with the rule of the one-to-one mapping as described in the

InterMiCOM

64

Application Example General Advice section. In three terminal schemes, the input to the Aided scheme is some kind of logic combination of the signals received from the two remote ends:

BLOCKING schemes are recommended to take a logical OR of the incoming IM64 signals, before being mapped to Aided scheme Rx. This is to ensure that if the fault is declared as external at any line end, Zone 2 accelerated tripping at the local end is blocked.

PERMISSIVE UNDERREACH schemes are recommended to take a logical OR of the incoming IM64 signals, before being mapped to Aided scheme Rx. Thus, if the fault is declared as internal at any remote line end, Zone 2 accelerated tripping at the local end is allowed. As Zone 1 is an underreaching element, it can only key the channel for an internal fault, so there is no need for AND logic.

PERMISSIVE OVERREACH schemes are recommended to take a logical AND of the incoming IM64 signals, before being mapped to Aided scheme Rx. This is to ensure that the fault must be seen as forward from both remote ends before Zone

2 accelerated tripping at the local end is allowed. As Zone 2 keys the channel, confirmation of a forward decision at all three line ends must be confirmed before aided scheme tripping is permitted.

In all three terminal schemes, the send logic is a one-to-many mapping. The Aided send is mapped to the IM64 signals which transmit to both remote ends. The connection to

Ch1 (channel 1), and Ch2 (channel 2) ensures communication to the two remote ends.

In case of channel failure between any two relays, the ‘ Aided 1 COS/LGS ’ signal will become high in the relay that is not receiving and activate the FallBackMode. Therefore, to preserve the stability in 3-ended blocking scheme, the corresponding ‘ IM_X

DefaultValue ’ in the setting file must be set high. It should be noted that in the PUR and

POR schemes such a precaution is not necessary since the aided signal can not be sent via broken communications.

Intermicom64 Application Example Scheme Description

The scheme in the InterMiCOM

64

mapping in a three ended application diagram is assumed as a case study. The top half of the page shows the mapping of the send and receive logic as already described. It can be seen that the first InterMiCOM bit (Input 1) is being used for the purposes of Aided scheme 1.

Notes Two Aided schemes are available, Aided 1 and Aided 2. This allows for example an independent Distance aided scheme, and a DEF aided scheme to be configured. Whether Aided 1 is used alone, or Aided 2 is used too will depend on the utility preference. Further detail is available in the MiCOM

Technical Manual.

The InterMiCOM

64

bits are duplex in nature, in other words InterMiCOM

64

bit

1 between the relay at line end A and B is completely independent from the same bit traveling from end B to A.

For simplicity, it is recommended that Aided scheme 1 is mapped to IM64 bit 1.

Likewise, where Aided scheme 2 is applied, it is more logical to assign IM64 bit 2, providing that it is not already used in the PSL for some other function.

P54x/EN AP/Nd5 Page (AP) 6-105

(AP) 6 Application Notes

3.7.5

3.7.6

Worked Protection Example and other Protection Tips

Intermicom64 Application Example Channel Supervision

For teleprotection schemes, it is commonplace to configure alarming in the event of channel failure. The third dotted box on the case study provides full monitoring of the scheme in three ended applications. Here, IM64 bit 2 is permanently energized when the channel is healthy. The OR gate shows how an opto input (L4) and a Control Input might be used as prerequisites for healthy signaling:

The use of an opto input allows a check that correct DC battery voltages are present for local teleprotection purposes, or perhaps that a selector switch has not taken the scheme out of service.

The use of a Control Input allows switching in or out of the teleprotection via menu commands on the relay concerned. This provides convenient in-out switching of the entire teleprotection scheme by visiting/addressing just one line end relay.

The exact logic condition to declare the local “ signaling healthy ” condition will be chosen such as to reflect the utility’s practices. In the example shown, this logical condition is then mapped to IM64 Output 2 (bit 2), for transmitting to the two remote line ends.

In order to declare that the signaling scheme is healthy, bit 2 (the assigned health-check bit) must be received from both remote ends. This can be combined with a general check on InterMiCOM

64

messaging, DDB#314. The AND gate shows that signaling is only healthy if:

The local DC battery voltage/control state is set to allow teleprotection operation,

The remote end health-check bits are both received successfully,

The scheme alarms have not detected messaging failures (IM64 Scheme Fail).

A logical “ AND ” combination is used, with the gate output inverted to feed into the aided scheme logic. This scheme failure output then feeds the standard “ Channel out of

Service ” (COS) logic.

The fourth dotted box illustrates how the same scheme failure alarm (COS) can then be simply mapped to any LED indication, or output contact for alarming.

Note If a simpler scheme is preferred, it is not necessary to assign a health-check bit. In such instances, the IM64 Scheme Fail alarm alone can be used to drive COS. However, if a test mode selection were to disable the aided scheme at one end, the other line ends would have no indication of the depleted operation.

For this reason, the use of the health-check bit is recommended.

Intermicom64 Application Example Transfer Trip

The case study scheme shows a suggested Transfer Trip (“ Intertrip ”) in the lower dotted box area. This is an optional addition (or alternative) with any aided scheme. The example shows an opto input (L5) which is being used to initiate the intertrip, mapped to send IM64 bit 5 to both remote ends. On receipt of the intertrip bit from any remote line end, the OR gate is used to map the received intertrip to whichever output relay trips the local breaker. In the diagram, relay 3 is shown as an example.

Again it can be seen that the PSL is the means by which the InterMiCOM

64

signals are driven, and to where any received bits are routed too.

Page (AP) 6-106 P54x/EN AP/Nd5

Worked Protection Example and other Protection Tips

3.7.7

3.7.8

3.7.9

3.7.9.1

3.7.9.2

(AP) 6 Application Notes

InterMiCOM64 Application Example - Mapping for Two Ended Application

The same scheme principle as shown in the InterMiCOM

64

mapping in a three ended application diagram applies in a two-ended application. The scheme will be simplified, whereby Aided Send signals are mapped directly to IM64 bits, on a one-to-one mapping.

The IM64 bit received from the remote end is also mapped directly to the Aided Scheme

Rx signal, requiring no AND or OR logic combination.

Intermicom64 Application Example - Dual Redundant Communications

Channels

In dual redundant operation, the user has the option to send end-end signals via two paths. The two paths (channels) are defined as Ch1 and Ch2. Several factors can be taken into account when using this mode:

The assignment of IM64 bits is completely independent, per channel. For example if all 8 possible bits per channel are assigned to discrete functions, this allows a total of 16 end-end signals.

The receive logic should employ AND (“ both ”) or OR (“ any” ) logic gate functions to combine the dual redundant signals, as appropriate to the desired operation.

Intermicom64 Application Example - Scheme Co-Ordination Timers

Distance and DEF and delta directional aided schemes use scheme co-ordination timers to ensure correct operation. The function of these is documented in the Operation chapter of the Technical Manual. However, when using InterMiCOM

64

as the teleprotection channel, the time delays applied can be different to those used for traditional channels. This is due, mainly, to the fact that the response time of opto inputs and output contacts is bypassed. An output contact will take typically 3 to 5ms to close, and an opto input will take 1 to 2ms to recognize a change of state. Thus, using

InterMiCOM

64

will save around 5-6ms for I/O response time.

The new time delays appropriate for Dist Dly and Current Reversal Guard timers are as listed in the following sections. Where direct fiber connections are used for

InterMiCOM

64

, ignore the + MUX addition. Where a multiplexed link is used, the + MUX figure should account for the multiplexer response time. If this is unknown, it can be obtained for the specific installation using the appropriate measurement in the

MEASUREMENTS 4 menu column.

InterMiCOM64 Application Example - Distance PUR Permissive Underreach

Dist dly = zero

InterMiCOM64 Application Example - Distance POR Permissive Overreach

Dist dly = zero

• tREV. Guard = 40ms + MUX

P54x/EN AP/Nd5 Page (AP) 6-107

(AP) 6 Application Notes

3.7.9.3

3.7.9.4

3.7.9.5

3.7.9.6

3.7.9.7

3.7.10

Worked Protection Example and other Protection Tips

InterMiCOM64 Application Example - Distance Blocking

Dist dly (50Hz) = 25ms + MUX

Dist dly (60Hz) = tREV. Guard =

22ms + MUX

25ms + MUX

InterMiCOM64 Application Example - Directional earth Fault (DEF) POR Permissive

Overreach

DEF dly tREV. Guard

=

= zero

50ms + MUX

InterMiCOM64 Application Example - Directional Earth Fault (DEF) Blocking

DEF dly = 25ms + MUX

• tREV. Guard = 35ms + MUX

InterMiCOM64 Application Example - Delta Directional POR Permissive Overreach

Delta dly = tREVERSAL GUARD = zero

40ms + MUX

InterMiCOM64 Application Example - Delta Directional Blocking

Delta dly = tREVERSAL GUARD =

14ms + MUX

25ms + MUX

Note When adding any multiplexer delays, the maximum response time of the multiplexed link should be assumed. This should include any addition for rerouting in self-healing networks.

Fallback Mode for InterMiCOM64 bits

On temporary loss of the InterMiCOM

64

channel, the user may select to latch the last healthy signal for a period of time, or to fallback to a chosen default value.

For Intertripping schemes, reverting to a default state of 0 is recommended;

For Blocking schemes set, reverting to a default state of 1 is recommended;

For Permissive applications, latching the last healthy received state is recommended.

Page (AP) 6-108 P54x/EN AP/Nd5

Application of Non-Protection Functions

4

4.1

4.1.1

4.1.2

4.1.2.1

4.1.2.2

(AP) 6 Application Notes

APPLICATION OF NON-PROTECTION FUNCTIONS

Single and Three Phase Auto-Reclosing

Time Delayed and High Speed Auto-Reclosing

An analysis of faults on any overhead line network has shown that 80-90% are transient in nature.

In the majority of fault incidents, if the faulty line is immediately tripped out, and time is allowed for the fault arc to de-ionize, reclosure of the circuit breakers will result in the line being successfully re-energized. Auto-reclose schemes are employed to automatically reclose a switching device a set time after it has been opened due to operation of protection, where transient and semi-permanent faults are prevalent.

The principal benefit gained by the application of auto-reclosing to overhead line feeders is improved supply continuity and possibly reduced costs since fewer personnel may be required. On some systems the application of high speed auto-reclose may permit a higher level of power transfer while retaining transient stability for most faults which are likely to occur. High speed single phase auto-reclosure can offer increased benefits over high speed three phase auto-reclosure in terms of a higher power transfer limit and reduced stress on reclosing.

Auto-Reclose Logic Operating Sequence

The MiCOM P543 and P545 have a standard auto-reclose scheme configured to permit control of one circuit breaker only.

The MiCOM P544 and P546 can be used in applications such as breaker-and-a-half, or ring bus topologies, where two circuit breakers feed each line and both need to be controlled by the auto-reclose logic.

For high speed auto-reclose only the instantaneous protection would normally be set to initiate auto-reclose. This is because for best results when applying high speed autoreclose to improve a system stability limit, it is important that the fault should be cleared as quickly as possible from both line ends.

The auto-reclose scheme in the P446/P544/P546/P547/P841B provides auto-reclosing of a feeder terminal switched by two circuit breakers. The two circuit breakers are normally arranged to reclose sequentially with one designated leader circuit breaker reclosing after a set dead time followed, if the leader circuit breaker remains closed, by the second circuit breaker after a further delay, the follower time.

Pole Discrepancy Timer for P54x (except P546)

The pole discrepancy timer is fixed at 0.04s.

Pole Discrepancy Timer for P546 Only

In some schemes, there is a need to use pole discrepancy logic in P546 relay. Once a pole discrepancy situation has been detected, a timer starts to run. Once this timer has elapsed, an output relay contact or a virtual output signal indicates that there is a pole discrepancy.

It is possible to develop a PSL logic scheme (with digital inputs with the position of the CB pole A, B and C, gates and timer). However, these schemes can become complex; with them sometimes starting to approach the limit for the maximum capacity (in terms of gates, timers or even logic equations).

P54x/EN AP/Nd5 Page (AP) 6-109

(AP) 6 Application Notes

4.1.3

4.1.3.1

4.1.3.2

4.1.3.3

Application of Non-Protection Functions

Hence, the pole discrepancy timer has now been enhanced so that it allows a range of different times to be set. Previously, the configurable pole discrepancy timer was shown to be fixed at 0.04s. whereas it is now in the range 0 to 10s with a step of 0.01s.

Setting Guidelines

Circuit Breaker Healthy

The P443/P446/P54x/P547/P841 monitors the state of the auxiliary contacts (52A, 52B) of the controlled circuit breaker(s) to determine healthy circuit breaker status before allowing auto-reclose. Monitoring of the auxiliary contacts is recommended, but this check can be disabled by not allocating opto inputs to this function, and deliberately applying logic 1 onto the corresponding DDB signals within the PSL.

Number of Shots

An important consideration is the ability of the circuit breaker to perform several trip close operations in quick succession and the effect of these operations on the maintenance period.

The fact that 80 - 90% of faults are transient highlights the advantage of single shot schemes. If statistical information for the power system shows that a moderate percentage of faults are semi-permanent, further Delayed Auto-Reclose (DAR) shots may be used provided that system stability is not threatened.

Note DAR shots will always be three pole.

Dead Timer Setting

High speed auto-reclose may be required to maintain stability on a network with two or more power sources. For high speed auto-reclose the system disturbance time should be minimized by using fast protection, <30 ms, such as distance or feeder differential protection (for P54x/P841) or distance or phase comparison (for P547) and fast circuit breakers <60 ms. For stability between two sources a system dead time of ≤300 ms may typically be required. The minimum system dead time considering just the CB is the trip mechanism reset time plus the CB closing time.

Minimum relay dead time settings are governed primarily by two factors:

Time taken for de-ionization of the fault path

Circuit breaker characteristics

Also it is essential that the protection fully resets during the dead time, so that correct time discrimination will be maintained after reclosure onto a fault. For high speed autoreclose instantaneous reset of protection is required.

For highly interconnected systems synchronism is unlikely to be lost by the tripping out of a single line. Here the best policy may be to adopt longer dead times, to allow time for power swings on the system resulting from the fault to settle.

Page (AP) 6-110 P54x/EN AP/Nd5

Application of Non-Protection Functions

4.1.3.4

4.1.3.5

(AP) 6 Application Notes

Follower Time Setting (P544 and P546 only)

In the application of auto-reclosing to a feeder terminal switched by two circuit breakers, the P446/P544/P546/P841B provides the necessary control for both circuit breakers. The two circuit breakers are normally arranged to re-close sequentially with one designated leader circuit breaker reclosing after a set dead time followed, if the leader circuit breaker remains closed, by the second, follower, circuit breaker after a further delay, the follower time.

The follower time is provided to prevent un-necessary operation of the follower circuit breaker. The follower time should be set sufficiently long as to avoid an un-necessary closure of the follower circuit breaker where conditions are such that it would be required to trip again.

After expiry of the dead time, the leader circuit breaker will attempt a reclosure. The minimum value of the follower time should allow sufficient time for the auto-reclosure of the lead circuit breaker to be considered successful. Consider a worst case where the phase differential elements are unavailable and back-up protection is being provided by the distance elements. Take the case of reclosure onto a dead line with a persistent fault at the remote end of the line. Local end protection (Time delayed Back up protection, like distance Z2 element) may detect this fault after set time delay (typically > 200 ms), time must be allowed for the leader circuit breaker to re-trip (50 - 100 ms), and a safety margin needs to be added so that typically, the minimum follower time could be around 500 ms.

If the reclosure of the lead circuit breaker is successful, the follower circuit breaker can be allowed to reclose. Delaying the reclosure of the follower circuit breaker will allow any transients to decay before the switching and if the transient decay figure is known, can be used to determine a minimum follower time value. The larger of the two values can then be used as the minimum follower time.

Note Since the follower circuit breaker should only be re-closed if the system is healthy, and, since in a dual circuit breaker scheme where the system is healthy the follower circuit breaker acts more like a bus coupler, there is no real requirement for fast switching and a time delay in excess of 1s might be appropriate. Indeed, in the P446/P544/P546/P841B default follower time is chosen as 5s and this can comfortably be applied to most applications.

De-Ionizing Time

The de-ionization time of a fault arc depends on circuit voltage, conductor spacing, fault current and duration, wind speed and capacitive coupling from adjacent conductors. As circuit voltage is generally the most significant, minimum de-ionizing times can be specified as in the table below.

Note For single pole high-speed auto-reclose, the capacitive current induced from the healthy phases can increase the time taken to de-ionize fault arcs.

Line voltage (kV) Minimum de-energization time (s)

66

110

132

220

275

400

0.1

0.15

0.17

0.28

0.3

0.5

Table 12 - Minimum Fault Arc De-Ionizing Time (Three Pole Tripping)

P54x/EN AP/Nd5 Page (AP) 6-111

(AP) 6 Application Notes

4.1.3.6

4.1.3.7

Application of Non-Protection Functions

Example Minimum Dead Time Calculation

The following circuit breaker and system characteristics are to be used:

CB Operating time (Trip coil energized

Arc interruption): 50 ms (a);

CB Opening + Reset time (Trip coil energized

Trip mechanism reset): 200 ms

(b);

Protection reset time: < 80 ms (c);

CB Closing time (Close command

Contacts make): 85 ms (d).

De-ionizing time for 220 kV line:

280 ms (e) for a three phase trip. (560 ms for a single pole trip).

The minimum relay dead time setting is the greater of:

(a) + (c) = 50 + 80 = 130 ms, to allow protection reset;

(a) + (e) - (d) = 50 + 280 - 85 = 245 ms, to allow de-ionizing (three pole);

= 50 + 560 - 85 = 525 ms, to allow de-ionizing (single pole).

In practice a few additional cycles would be added to allow for tolerances, so 3P - Dead

Time 1 could be chosen as

300 ms, and 1P - Dead Time could be chosen as

600 ms.

The overall system dead time is found by adding (d) to the chosen settings, and then subtracting (a). (This gives 335 ms and 635 ms respectively here).

Reclaim Timer Setting

A number of factors influence the choice of the reclaim timer, such as;

Fault incidence/Past experience - Small reclaim times may be required where there is a high incidence of recurrent lightning strikes to prevent unnecessary lockout for transient faults

Spring charging time - For high speed auto-reclose the reclaim time may be set longer than the spring charging time. A minimum reclaim time of >5 s may be needed to allow the CB time to recover after a trip and close before it can perform another trip-close-trip cycle. This time will depend on the duty (rating) of the CB.

For delayed auto-reclose there is no need as the dead time can be extended by an extra CB healthy check AR Inhibit Time window time if there is insufficient energy in the CB

Switchgear Maintenance - Excessive operation resulting from short reclaim times can mean shorter maintenance intervals

The Reclaim Time setting is generally set greater than the tZ2 distance zone delay

Page (AP) 6-112 P54x/EN AP/Nd5

Application of Non-Protection Functions

4.2

4.2.1

4.2.2

(AP) 6 Application Notes

Current Transformer Supervision (CTS)

MiCOM P54x has two methods of detecting CT problems: Differential CTS and Standard

CTS as detailed in the Operation Section. Both methods could be applied simultaneously and that is a significant advantage because all protection elements that would tend to operate upon CT failure will be successfully prevented from operating. The Differential

CTS method should be used whenever differential protection is used, whilst the Standard

CTS stabilizes all local ground protections. Therefore, to be on a safe side and cover all eventualities the recommended setting is ‘I diff + Standard CTS’ mode. Note that the

‘CTS Reset mode’ and ‘CTS Time delay’ are common for both techniques.

Standard CTS

The residual voltage setting, CTS Vn< Inhibit and the residual current setting,

CTS

Ι n> set , should be set to avoid unwanted operation during healthy system conditions. For example CTS Vn< Inhibit should be set to at least 120% of the maximum steady state residual voltage. The CTS

Ι n> set will typically be set below minimum load current. The time-delayed alarm, CTS Time Delay , is generally set to 5 seconds.

Where the magnitude of residual voltage during a ground/earth fault is unpredictable, the element can be disabled to prevent protection elements being blocked during fault conditions.

Standard CTS must not be used to inhibit the operation of Current differential protection as this is a local supervision and therefore it will not be fast enough to inhibit the operation of the differential protection at the remote end.

Differential CTS

Phase Is1 CTS setting must be set above the phase current of the maximum load transfer expected, normally at 1.2 In. This setting defines the minimum pick-up level of the current differential protection once the current transformer supervision CTS is detected.

CTS i1> setting, once exceeded, indicates that the circuit is loaded. A default setting of

0.1 In is considered suitable for most applications, but could be lowered in case of oversized CTs.

CTS i2/i1> This setting should be in excess of the worst unbalanced load expected in the circuit under normal operation. It is recommended to read out the values of i2 and i1 in the MEASUREMENT 1 column and set the ratio above 5% of the actual ratio.

CTS i2/i1>> We strongly recommend to keep the default setting (40% In). If the ratio i2/i1 exceeds the value of this setting at only one end, the CT failure is declared.

Note The minimum generated i2/i1 ratio will be 50% (case of one CT secondary phase lead being lost), and therefore setting of 40% is considered appropriate to guarantee sufficient operating speed.

Any of the previous methods will always block protection elements operating from derived quantities: Broken Conductor, Earth Fault and Neg Seq O/C. Other protections can be selectively blocked by customizing the PSL, gating DDB 928: CTS Block (originated by either method) or DDB 929 CTS Block Diff with the protection function logic.

P54x/EN AP/Nd5 Page (AP) 6-113

(AP) 6 Application Notes

4.3

4.3.1

4.3.2

4.3.3

Application of Non-Protection Functions

Circuit Breaker Condition Monitoring

Setting the

Σ Ι

^ Thresholds

Where overhead lines are prone to frequent faults and are protected by Oil Circuit

Breakers (OCBs), oil changes account for a large proportion of the life cycle cost of the switchgear. Generally, oil changes are performed at a fixed interval of circuit breaker fault operations. However, this may result in premature maintenance where fault currents tend to be low, and hence oil degradation is slower than expected. The

Σ Ι

^ counter monitors the cumulative severity of the duty placed on the interrupter allowing a more accurate assessment of the circuit breaker condition to be made.

For OCBs, the dielectric withstand of the oil generally decreases as a function of

Σ Ι 2 t.

This is where ‘

Ι

’ is the fault current broken, and ‘t’ is the arcing time within the interrupter tank (not the interrupting time). As the arcing time cannot be determined accurately, the relay would normally be set to monitor the sum of the broken current squared, by setting

‘Broken

Ι

^’ = 2.

For other types of circuit breaker, especially those operating on higher voltage systems, practical evidence suggests that the value of ‘ Broken

Ι

^ ’ = 2 may be inappropriate. In such applications ‘ Broken

Ι

^ ’ may be set lower, typically 1.4 or 1.5. An alarm in this instance may be indicative of the need for gas/vacuum interrupter HV pressure testing, for example. The setting range for ‘ Broken

Ι

^ ’ is variable between 1.0 and 2.0 in 0.1 steps. It is imperative that any maintenance program must be fully compliant with the switchgear manufacturer’s instructions.

Setting the Number of Operations Thresholds

Every operation of a circuit breaker results in some degree of wear for its components.

Therefore, routine maintenance, such as oiling of mechanisms, may be based upon the number of operations. Suitable setting of the maintenance threshold will allow an alarm to be raised, indicating when preventative maintenance is due. Should maintenance not be carried out, the relay can be set to lockout the auto-reclose function on reaching a second operations threshold. This prevents further reclosure when the circuit breaker has not been maintained to the standard demanded by the switchgear manufacturer’s maintenance instructions.

Certain circuit breakers, such as Oil Circuit Breakers (OCBs) can only perform a certain number of fault interruptions before requiring maintenance attention. This is because each fault interruption causes carbonizing of the oil, degrading its dielectric properties.

The maintenance alarm threshold No CB Ops. Maint.

may be set to indicate the requirement for oil sampling for dielectric testing, or for more comprehensive maintenance. Again, the lockout threshold No CB Ops. Lock may be set to disable autoreclosure when repeated further fault interruptions could not be guaranteed. This minimizes the risk of oil fires or explosion.

Setting the Operating Time Thresholds

Slow CB operation is also indicative of the need for mechanism maintenance. Therefore, alarm and lockout thresholds (CB Time Maint./CB Time Lockout) are provided and are settable in the range of 5 to 500 ms. This time is set in relation to the specified interrupting time of the circuit breaker.

Page (AP) 6-114 P54x/EN AP/Nd5

Application of Non-Protection Functions

4.3.4

4.4

(AP) 6 Application Notes

Setting the Excessive Fault Frequency Thresholds

Persistent faults will generally cause auto-reclose lockout, with subsequent maintenance attention. Intermittent faults such as clashing vegetation may repeat outside of any reclaim time, and the common cause might never be investigated. For this reason it is possible to set a frequent operations counter on the relay which allows the number of operations Fault Freq. Count over a set time period Fault Freq. Time to be monitored. A separate alarm and lockout threshold can be set.

Read Only Mode

With IEC 61850 and Ethernet/Internet communication capabilities, security has become a pressing issue. The Px40 IED provides a facility to allow the user to enable or disable the change in configuration remotely.

Read Only mode can be enabled/disabled for the following rear ports:

Rear Port 1 - IEC 60870-5-103 and Courier protocols

Rear Port 2 (if fitted) -

Ethernet Port (if fitted) -

Courier protocol

Courier protocol ( tunnelled )

P54x/EN AP/Nd5 Page (AP) 6-115

5.1

Two Circuit Breaker Control (P446) Worked Example (AP) 6 Application Notes

5 TWO CIRCUIT BREAKER CONTROL (P446) WORKED

EXAMPLE

A worked example of the control of a feeder switched by a dual circuit breaker is presented below. Detailed explanation of the control of such a scheme is presented in the Operation chapter of this manual.

Introduction

This application example is for two shot, single and three phase, auto-reclosing at one end of a 500kV overhead transmission line switched by two circuit breakers in a

“ one and a half switch ” configuration.

The single line diagram for the circuit is shown below. This example outlines the settings required for auto-reclosing using a MiCOM P446/P544/P546/P841 relay at sub-station A.

The single line diagram for the circuit is shown in Figure 35.

Bus 1

VT

CB1 x

1

Line 1

3

Live VT

CB2 x

P54x

Line 2

1

CB3 x

VT

Bus 2

Sub-Station A

Figure 36 - Two circuit breaker auto-reclose application

P4344ENb

Page (AP) 6-116 P54x/EN AP/Nd5

Two Circuit Breaker Control (P446) Worked Example

5.2

5.3

(AP) 6 Application Notes

Auto-reclosing is considered to be initiated by differential protection, by distance protection tripping for a fault in Zone 1 or by aided high speed tripping. It is also possible to initiate auto-reclose by an external protection device, in which case the auto-reclose initiation would be provided by an opto input.

The circuit breakers are capable of either single phase or three phase tripping. Circuit

Breaker 1 (CB1) is designated as Leader and will reclose before Circuit Breaker 2 (CB2).

CB2 becomes the designated Follower, and will reclose after a Follower Time delay after

CB1 has successfully reclosed.

The “ Leader ”, CB1 is arranged for single/three phase tripping and re-closing. The

“ Follower ”, CB2 is arranged to trip three phase for all faults.

For a single phase fault, CB1 will trip single phase and CB2 will trip three phase. When the fault has been cleared, CB1 will re-close single phase without any system voltage checks after the selected “ Single Phase AR dead time ”, then, after the follower time delay, CB2 will re-close three phase, subject to a synchronism check between the line and Bus 2.

For a two phase or three phase fault, both circuit breakers will trip three phase. When the fault has been cleared, CB1 will re-close three phase after the selected “ Three Phase AR dead time ”, with either live bus/dead line or live bus/live line check synchronism between the line and Bus 1. When CB1 has successfully re-closed, after the follower time delay,

CB2 will re-close three phase, subject to a synchronism check between the line and

Bus 2.

For live line/live bus three phase re-closing of either circuit breaker, acceptable conditions are typically:

The phase angle difference is not greater than 20 degrees;

The slip frequency is not greater than 0.05Hz/s; and

The magnitudes of both the applied line voltage and “ are between 85% and 120% of nominal; and compensated ” Bus voltage

The magnitude of the difference between the applied line voltage and the

“ compensated ” Bus voltage on either side of the circuit breaker is not greater than

10% of nominal.

It is assumed that re-closing at the remote line end will be either single phase with no system voltage checks, or three phase with live bus/live line synchronism check.

Circuit Breaker Status

The circuit breaker open/closed status is signaled to the auto-reclose scheme by separate type 52B auxiliary switch contacts on each circuit breaker pole (contact open when circuit breaker phase is closed, contact closed when the circuit breaker pole is open).

Voltage Inputs

The voltage inputs to the auto-reclose equipment are:

3 phase input (3P + N, magnitude 110V Ph-Ph, 63.5V Ph-N) from a line VT, connected to the Line VT (main VT) input;

1 phase input (A-B, magnitude 110V) from a Bus1 VT connected to the Bus1 VT

(CB1 CS VT), input;

1 phase input (A-B, magnitude 110V) from a Bus2 VT connected to the Bus2 VT

(CB2 CS VT), input.

Under healthy system conditions each bus VT (check sync VT) input leads the A-phase to Neutral Line VT input (main VT) by 30 degrees and has voltage magnitude of 110 V

(assumes settings in secondary values).

P54x/EN AP/Nd5 Page (AP) 6-117

(AP) 6 Application Notes Two Circuit Breaker Control (P446) Worked Example

5.4

5.4.1

5.4.2

5.4.3

5.4.4

Page (AP) 6-118

Application Settings

Typical values for the principal settings and user commands related to the auto-reclosing and system voltage check functions are given below. They are presented in the order in which they appear in the menu. The hexadecimal numbers in brackets/parentheses represent the Courier cell location in the menu.

CB CONTROL Menu:

In the CB CONTROL column, the “ Autoreclose Mode ” command (07 0B) should be activated by setting to “ In Service ”;

The data cell “ AR Status ” (07 0E) should display “ In Service ”.

The “ CB1 Status Input ” (07 11): should be set to “ 52B 1Pole ”;

The “ CB2 Status Input ” (07 80): should be set to “ 52B 1Pole ”.

CONFIGURATION Menu:

In the CONFIGURATION column, the following should all be set to “ Enabled ”:

“ Distance ” (09 0B)

“System Checks” (09 23)

“Auto-Reclose” (09 24)

CT & VT RATIOS Menu:

In the CT & VT RATIOS column, the following should be set:

Main VT Primary

CS Input

” (0A 01): set nominal system primary ph-ph voltage (500kV);

“ Main VT Sec’y ” (0A 02): set “ 110 V ”;

“ CB1 CS VT Prim’y ” (0A 03): set nominal system primary ph-ph voltage (500kV);

“CB1 CS VT Sec’y” (0A 04): set “110 V”;

“ CB2 CS VT Prim’y ” (0A 05): set nominal system primary ph-ph voltage (500kV);

“CB2 CS VT Sec’y” (0A 06): set “110 V”;

” (0A 0F): set “ A-N ”;

“ CB1 CS VT PhShft ” (0A 21): set “ -30 degrees ” (this creates a “ compensated ”

Bus1 phase angle normally in phase with the selected “ CS Input ”);

“ CB1 CS VT Mag ” (0A 22): set “ 0.58

” (this creates a “ compensated ” Bus1 voltage magnitude normally equal to that of the selected “ CS Input ”);

“ CB2 CS VT PhShft ” (0A 23): set “ -30 degrees ” (this creates a “ compensate d”

Bus2 phase angle normally in phase with the selected “ CS Input ”);

“ CB2 CS VT Mag ” (0A 24): set “ 0.58

” (creates a “ compensated ” Bus2 voltage magnitude normally equal to that of the selected “ CS Input ”);

Note VT secondary voltage settings in this section of the menu are always set in terms of phase to phase values, even when the actual inputs are taken from phase to neutral VT terminals.

GROUP 1 LINE PARAMETERS Menu:

In the GROUP 1 LINE PARAMETERS column, the following should be set:

“CB1Tripping Mode” (30 0C): set “1 and 3 Pole”;

“CB2Tripping Mode” (30 0E): set “3 Pole”.

P54x/EN AP/Nd5

Two Circuit Breaker Control (P446) Worked Example

5.4.5

5.4.6

5.4.7

(AP) 6 Application Notes

GROUP 1 DISTANCE Menu:

In the GROUP 1 DISTANCE column, appropriate settings should be applied and the elements enabled as per the operational requirements. Operation of the zone

1 tripping and/or the operation of the aided schemes will initiate auto-reclose.

GROUP 1 PHASE DIFF Menu:

In the GROUP 1 PHASE DIFF column, appropriate settings should be applied and the elements enabled as per the operational requirements. Operation of phase differential tripping will initiate auto-reclose.

GROUP 1 SYSTEM CHECKS Menu:

In the GROUP 1 SYSTEM CHECKS column, the following should be set:

“ Live Line ” (48 85): set “ 32 V ” (typical setting 50% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“ Dead Line ” (48 86): set “ 13 V ” (typical setting 20% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“ Live Bus 1 ” (48 87): set “ 32 V ” (typical setting 50% of “ compensated ” nominal applied voltage);

“ Dead Bus 1 ” (48 88): set “ 13 V ” (typical setting 20% of “ compensated ” nominal applied voltage).

“ Live Bus 2 ” (48 89): set “ 32 V ” (typical setting 50% of “ compensated ” nominal applied voltage);

“ Dead Bus 2 ” (48 8A): set “ 13 V ” (typical setting 20% of “ compensated ” nominal applied voltage);

“ CS UV ” (48 8B): set “ 54 V ” (typical setting 85% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“ CS OV ” (48 8C): set “ 76 V ” (typical setting 120% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“Sys Checks CB1” (48 8D): set “Enabled”;

“CB1 CS Volt. Blk” (48 8E): set “V< V> and Vdiff”;

“CB1 CS1 Status” (48 8F): set “Enabled”;

“CB1 CS1 Angle” (48 90): set “20 degrees”;

“ CB1 CS1 Vdiff ” (48 91): set “ 6.5 V ” (typical setting 10% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“CB1 CS1 SlipCtrl” (48 92): set “Enabled”;

“CB1 CS1 SlipFreq” (48 93): set “0.05Hz”;

“CB1 CS2 Status” (48 94): set “Disabled”;

“Sys Checks CB2” (48 9B): set “Enabled”;

“CB2 CS Volt. Blk” (48 9C): set “V< V> and Vdiff”;

“CB2 CS1 Status” (48 9D): set “Enabled”;

“CB2 CS1 Angle” (48 9E): set “20 degrees”;

“ CB2 CS1 Vdiff ” (48 9F): set “ 6.5 V ” (typical setting 10% of nominal applied voltage of selected “ CS Input ” (set to A-N in this example));

“CB2 CS1 SlipCtrl” (48 A0): set “Enable”;

“CB2 CS1 SlipFreq” (48 A1): set “0.05Hz”;

“CB2 CS2 Status” (48 94): set “Disabled”;

P54x/EN AP/Nd5 Page (AP) 6-119

(AP) 6 Application Notes

5.4.8

Two Circuit Breaker Control (P446) Worked Example

GROUP 1 AUTORECLOSE Menu:

In the GROUP 1 AUTORECLOSE column, the following should be set:

“ Num CBs ” (49 50): set “ Both CB1&CB2 ”;

“ Lead/Foll ARMode ” (49 53): set “ L 1/3P, F 3P ”;

Leader Select By

Select Leader

BF if LFail Cls

AR Shots

” (49 55): set “

” (49 56): set “

” (49 57): set “

” (49 59): set “ 2 ”;

Menu

Sel Leader CB1

Enabled

”;

”;

”;

“Multi Phase AR” (49 5C): set “

“ Discrim Time ” (49 5D): set “

Allow Autoclose

0.5 sec

”;

” (set as per application requirements);

“ CB IS Time ” (49 60): set “ 5 sec ” (this requires the circuit breaker to have been in the closed position for at least 5 seconds before fault occurrence will enable autoreclose initiation. It is designed to prevent auto-reclosure for a fault immediately after manual circuit breaker closure (switch on to fault));

“ CB IS Memory Time ” (49 61): set “ 0.5 sec ”;

“ DT Start by Prot ” (49 62): set “ Protection Reset ” (measured dead time starts when protection resets);

“ 3PDTStart WhenLD ” (49 63): set “ Disabled ”;

“ DTStart by CB Op ” (49 64): set “ Disabled ”;

“ SP AR Dead Time ” (49 67): set “ 0.5 sec ” (typical);

“ 3P AR DT Shot 1 ” (49 68): set “ 0.3 sec ” (or as per application requirements and considerations at circuit breaker location);

“ 3P AR DT Shot 2 ” (49 68): set “ 60 sec ” (or as per application requirements and considerations at the circuit breaker location);

“ Follower Time ” (49 6C): set “ 5 sec ” (typical);

“ SPAR ReclaimTime ” (49 6D): set “ 180 sec ” (or as required to suit circuit breaker duty cycle);

“ 3P AR ReclaimTime ” (49 6E): set “ 180 sec ” (or as required to suit circuit breaker duty cycle);

“AR CBHealthyTime” (49 6F): set “0.3 sec”;

“AR CheckSyncTime” (49 70): set “0.3 sec”;

“ Z1 AR ” (49 72): set “ Initiate AR ”;

“Dist Aided AR” (49 74): set “Initiate AR”;

Page (AP) 6-120 P54x/EN AP/Nd5

Two Circuit Breaker Control (P446) Worked Example (AP) 6 Application Notes

All other protection inputs (“ Z2T AR ” (49 72) onwards): set “ Block AR ”;

“ CB1L SC all ” (49 A6): set “ Enabled ”;

“CB1L SC Shot 1” (49 A7): set “Enabled”;

“CB1L SC ClsNoDly” (49 A8): set “Disabled”;

“ CB1L SC CS1 ” (49 A9): set “ Enabled ”;

“ CB1L SC CS2 ” (49 AA): set “ Disabled ”;

“ CB1L SC DLLB ” (49 AB): set “ Enabled ”;

“CB1L SC LLDB” (49 AC): set “Disabled”;

“CB1L SC DLDB” (49 AD): set “Disabled”;

“ CB2F SC all ” (49 BD): set “ Enabled ”;

“CB2F SC Shot 1” (49 BE): set “Enabled”;

“ CB2F SC CS1 ” (49 BF): set “ Enabled ”;

“ CB2F SC CS2 ” (49 C0): set “ Disabled ”;

“CB2F SC DLLB” (49 C1): set “Disabled”;

“CB2F SC LLDB” (49 C2): set “Disabled”;

“CB2F SC DLDB” (49 C3): set “Disabled”.

P54x/EN AP/Nd5 Page (AP) 6-121

(AP) 6 Application Notes

5.5

Two Circuit Breaker Control (P446) Worked Example

PSL (Programmable Scheme Logic) Mapping

The PSL mapping of some of the opto inputs and relay outputs for this application example are shown below for guidance.

Input L2

DDB #033

Input L3

DDB #034

Input L4

DDB #035

Input L10

DDB #041

Input L11

DDB #042

Input L12

DDB #043

Input L5

DDB #036

Input L6

DDB #037

CB1Aux A (52-B)

DDB #425

CB1Aux B (52-B)

DDB #426

CB1Aux C (52-B)

DDB #427

CB2 Aux A(52-B)

DDB #433

CB2 Aux B(52-B)

DDB #434

CB2 Aux C(52-B)

DDB #435

CB1 Healthy

DDB #436

CB2 Healthy

DDB #437

Control Close CB1

DDB #839

0

Straight

0

Output R15

DDB #014

Control Close CB2

DDB #841

0

Pick-Up

0

Output R16

DDB #015

P4966ENa

Figure 37 - PSL mapping of some of the opto inputs and relay outputs

In order to test the application example, as well as applying appropriate current and voltage connections, the settings, and the PSL, it will be necessary to employ some secondary test equipment capable of mimicking the circuit breaker status.

For any specific application, the Application Engineer must analyze the particular power systems to determine the appropriate settings and PSL mappings.

Page (AP) 6-122 P54x/EN AP/Nd5

Two Circuit Breaker Control (P546)

6

(AP) 6 Application Notes

TWO CIRCUIT BREAKER CONTROL (P546)

Protection schemes sometimes need to use the Circuit Breaker (CB) Failure function when using two MiCOM P546 relays. The scheme may require the CB Fail function to start via internal trip or external trip (through activation of digital input). When there is an external trip, the scheme may need to condition the External CB Fail Start to an overcurrent value. This means that for an External CB Fail Start, the activation of the DI and the overcurrent value must both be present.

This means that the PSL needs to be used, and this needs to gate an AND gate with the

DI and the overcurrent starting signal to the "External trip signal" to initiate the CB failure logic.

In previous versions of the MiCOM P546 relay, the overcurrent stages did not take into account each of the CT inputs but the summation of both. Hence, because the summation of both CTs is zero, the external CB function will not work as requested (i.e. because there won't be the required overcurrent condition so the external CB failure function won't operate). This has been seen as a problem in certain installations.

This function has now been modified so that there is one phase overcurrent and one neutral overcurrent stage associated to CT1 set and one phase overcurrent and one neutral overcurrent stage associated to CT2. This solves the problem, allowing two P546 relays to be used in this way. This is achieved by adding new options into the relevant settings.The options added include “I>3, IN>3, I>4 and IN>4” and the analogue input as

“CT1+CT2”, “CT1 or CT2”.

P54x/EN AP/Nd5 Page (AP) 6-123

(AP) 6 Application Notes

7

7.1

7.2

Current Transformer Requirements

CURRENT TRANSFORMER REQUIREMENTS

Recommended CT Classes (British and IEC)

Class X current transformers with a knee point voltage greater or equal than that calculated can be used.

Class 5P protection CTs can be used, noting that the knee point voltage equivalent these offer can be approximated from:

Vk = (VA x ALF)/In + (RCT x ALF x In)

Where:

VA =

ALF =

In =

Voltampere burden rating

Accuracy limit factor

CT nominal secondary current

Current Differential Requirements

For accuracy, class X or class 5P Current Transformers (CTs) are strongly recommended. The knee point voltage of the CTs should comply with the minimum requirements of the formulae shown below.

Vk

K. In (Rct + 2 RL)

Where:

Vk =

K =

In =

Rct =

RL =

Required IEC knee point voltage

Dimensioning factor

CT nominal secondary current

CT resistance

One-way lead impedance from CT to relay

K is a constant depending on:

If =

X/R =

Maximum value of through fault current for stability (multiple of In)

Primary system X/R ratio

For relays with Software Version BEFORE D1; the following K factors apply:

K is determined as follows:

For relays set at Is1 = 20%, Is2 = 2 In, k1 = 30%, k2 = 150%:

K must be the highest of:

K

40 + (0.07 x (If x X/R))

Or

K

65

This is valid for (If x X/R)

1000

For higher (If x X/R) up to 1600:

K = 107

For relays set at Is1 = 20%, Is2 = 2 In, k1 = 30%, k2 = 100%:

K must be the highest of:

K

Or

K

40 + (0.35 x (If x X/R))

65

This is valid for (If x X/R)

600

Page (AP) 6-124 P54x/EN AP/Nd5

Current Transformer Requirements

7.3

7.4

7.5

(AP) 6 Application Notes

For higher (If x X/R) up to 1600:

K = 256

For relays with Software Version D1 and later; the following K factors apply:

From Software Version D1, the K factors are as follows:

K = 50 where X/R < 80

K = 65 where X/R

≥ 80

Zone 1 Reach Point Accuracy (RPA)

Vk

K

RPA

x IF Z1 x (1+ X/R). (RCT + RL)

Where:

Vk =

K

RPA

=

IF

Z1

=

X/R =

RCT =

RL =

Required CT knee point voltage (volts)

Fixed dimensioning factor = always 0.6

Max. secondary phase fault current at Zone 1 reach point (A)

Primary system reactance/resistance ratio

CT secondary winding resistance (

)

Single lead resistance from CT to relay (

)

Zone 1 Close-Up Fault Operation

An additional calculation must be performed for all cables, and any lines where the source impedance ratio might be less than SIR = 2.

Vk

Kmax x IF max x (RCT + RL)

Where:

Kmax

IF max

=

=

Fixed dimensioning factor = always 1.4

Max. secondary phase fault current (A).

Then, the highest of the two calculated knee points must be used.

Note It is not necessary to repeat the calculation for earth faults, as the phase reach calculation (3 ϕ

) is the worst-case for CT dimensioning.

Time Delayed Distance Zones

When a time delayed distance zone is being used, there is no need to calculate the required Vk separately. This is due to the employed time delay (usually more than 3 times the primary time constant for a fault at the remote bus of the protected feeder), which overrides the transient conditions. When it is insisted to do some calculations for the time delayed distance zone, then we should use the following equation

Vk > If (RCT + RL)

Where If is the current for a fault at the remote bus of the protected feeder (in other words, the through fault current for the current differential function)

P54x/EN AP/Nd5 Page (AP) 6-125

(AP) 6 Application Notes

7.6

7.7

7.7.1

7.7.2

Current Transformer Requirements

Determining Vk for an IEEE “C" Class CT

Where American/IEEE standards are used to specify CTs, the C class voltage rating can be checked to determine the equivalent Vk (knee point voltage according to IEC). The equivalence formula is:

Vk = [(C rating in volts) x 1.05] + [100 x RCT]

Worked Example for CT Requirements

The Power system and the line parameters (Line length: 100 km) as given in the Distance

Protection Setting Example section is used here to calculate CT requirements.

Important Notes to be Considered

Current differential – Both If and X/R are to be calculated for a through fault

Distance Zone1 reach point case – Both If and X/R are to be calculated for a fault at Zone1 reach point

For calculating the CT requirements, the bus bar short time symmetrical fault rating shall be considered as the bus fault level.

When there are only indicative X/Rs available, then the circuit breaker’s dc breaking capacity shall be used to arrive at the primary time constant (and hence the primary system X/R). The derivation shall be obtained from the circuit breaker manufacturer; practical primary time constants arrived in such a way vary between

50 ms (applicable for 66 kV and 132 kV breakers) and 120 ms (applicable for 220 kV and 400 kV breakers). 150 ms is a practical figure for generator circuit breakers.

System Data

In the following example, the following parameters have been considered for the CT calculations:

System voltage - 230 kV

System frequency - 50 Hz

System grounding - solid

Single circuit operation between Green Valley and Blue River

CT ratio - 1200/1

Line length - 100 kms

Line positive sequence impedance Z1 = 0.089 + j 0.476 ohm / km

Bus fault level - 40 kA

Primary time constant = 120 ms

Calculation of Primary X/R

Primary X/R till the Green Valley bus = 2 * pi * f * primary time constant in s

= 2 * pi * 50 * 0.12

Primary X/R till the bus = 37.7

Page (AP) 6-126 P54x/EN AP/Nd5

Current Transformer Requirements

7.7.3

7.7.4

7.7.5

7.7.6

7.7.7

7.7.8

7.7.9

7.7.10

7.7.11

(AP) 6 Application Notes

Calculation of Source Impedance Zs

Source Impedance Zs

Source angle

Hence, Zs

= 230 kV / (1.732 * 40 kA)

= 3.32 ohms

= tan-1 (X/R)

= tan-1 (37.7)

= 88.48 deg

= 0.088 + j 3.317 ohms

Calculation of Full Line Impedance (full 100 kms)

Z1 = 0.089 + j 0.476 ohm / km

ZL = 8.9 + j 47.6 ohms

ZL = 48.42 ohms with an angle 79.4 deg

Calculation of Total Impedance Till Remote Bus Bar

ZT = Zs + ZL = 8.988 + j 50.917 ohms

= 51.7 ohms with an angle of 80 deg

Calculation of Through Fault X/R

X/R thro = 50.917 / 8.988

= 5.66

Calculation of Through Fault If

If thro = 230kV / (1.732 * 51.7 )

= 2568.5 A primary

= 2.14 A (secondary)

Calculation of Line Impedance Till Zone1 Reach Point (80kms)

Zzone1 = 0.8 * ZL = 7.12 + j 38.08 ohms

= 38.73 ohms with an angle of 79.4 deg

Calculation of Total Impedance till Zone1 Reach Point

ZTzone1 = Zs + Zzone1

= 7.208 + j 41.397 ohms

= 42.019 ohms with an angle of 80 deg

Calculation of X/R till Zone1 Reach Point

X/R zone1 = 41.397 / 7.208

= 5.74

Calculation of Fault Current Till Zone1 Reach Point

If zone1 = 230 kV / (1.732 * 42.019)

= 3160.34 A (primary)

= 2.63 A (secondary)

P54x/EN AP/Nd5 Page (AP) 6-127

(AP) 6 Application Notes

7.7.12

7.7.13

7.7.14

7.7.15

7.7.16

Current Transformer Requirements

CT Vk for Current Differential Protection

If thro * X/R thro = 2.14 * 5.66

= 12.11

The appropriate equation for K and Vk to be is used from the Current Differential

Requirements section.

K > 40 + (0.07 * 12.11) OR K > 65

K > 40.8 OR K > 65

Hence K = 65

Vk

K. In (Rct + 2 RL)

Vk > 65 (RCT + 2 RL)

CT Vk for Distance Zone1 Reach Point

Vk

KRPA x IF z1 x (1+ X/R). (RCT + RL) (From the Zone 1 Reach Point

Accuracy (RPA) section).

Vk > 0.6 * 2.63 * (1+5.74) * (RCT+RL)

Vk > 10.65 (RCT + RL)

CT Vk for Distance Zone1 Close-Up Fault

SIR = Zs / Zzone1 = 3.32 / 38.73 is less than 2; so we need to do this Vk calculation

Close-up fault current = 40kA (primary) = 33.33 A (secondary)

Vk

Kmax x IF max x (RCT + RL) (from the Zone 1 Close-Up Fault Operation section)

Vk > 1.4 * 33.33 * ( RCT + RL)

Vk > 46.67 (RCT + RL)

CT Vk for Distance Time Delayed Zones

Vk > If (RCT + RL)

Vk > If thro * (RCT + RL)

Vk > 2.14 (RCT + RL)

(from the Time Delayed Distance Zones section).

Vk to be Considered

Using the above sections, the different Vk requirements are to be calculated for all the functions that will be enabled, or that will be brought into operation. Then the highest Vk shall be considered for the CT design.

Page (AP) 6-128 P54x/EN AP/Nd5

High Break Output Contacts

8

(AP) 6 Application Notes

HIGH BREAK OUTPUT CONTACTS

The high break contacts allow the elimination of auxiliary relays. This in turn helps in the provision of cost effective solutions, minimizing space, wiring, commissioning time, etc.

According to the model selected, in addition to standard output relay boards, one or two

‘ high break ’ output relay boards can be fitted. Each houses four normally open output contacts suitable for breaking loads higher than can be broken with the standard contacts. The performance and possible application scenarios of these contacts are described in the Technical Data (TD) and Product Design (PD) chapters of this manual.

P54x/EN AP/Nd5 Page (AP) 6-129

(AP) 6 Application Notes

9

Auxiliary Supply Fuse Rating

AUXILIARY SUPPLY FUSE RATING

In the Safety Information part of this manual, the maximum allowable fuse rating of 16A is quoted. To allow time grading with fuses upstream, a lower fuselink current rating is often preferable. Use of standard ratings of between 6A and 16A is recommended. Low voltage fuselinks, rated at 250V minimum and compliant with IEC60269-2 general application type gG are acceptable, with high rupturing capacity. This gives equivalent characteristics to HRC "red spot" fuses type NIT/TIA often specified historically.

The table below recommends advisory limits on relays connected per fused spur. This applies to MiCOM Px40 series devices with hardware suffix C and higher, as these have inrush current limitation on switch-on, to conserve the fuse-link.

Maximum Number of MiCOM Px40 Relays Recommended Per Fuse

Battery Nominal Voltage

24 to 54V 2

60 to 125V 4

6A

4

8

10A Fuse 15 or 16A Fuse

6

12

Fuse Rating > 16A

Not permitted

Not permitted

138 to 250V 6 10 16 Not permitted

Alternatively, Miniature Circuit Breakers (MCBs) may be used to protect the auxiliary supply circuits.

Page (AP) 6-130 P54x/EN AP/Nd5

MiCOM Px4x (SE) 7 Using the PSL Editor

Px4x/EN SE/E22

USING THE PSL EDITOR

CHAPTER 7

Page (SE) 7-1

(SE) 7 Using the PSL Editor MiCOM Px4x

Date: 06/2016

Products covered by this chapter:

Hardware Suffix:

Software Version:

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

All MiCOM Px4x products

All MiCOM Px4x products

Connection Diagrams: P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x:

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (SE) 7-2 Px4x/EN SE/E22

Contents (SE) 7 Using the PSL Editor

CONTENTS

1 Overview

2 Easergy Studio (MiCOM S1 Studio) PSL Editor

2.1

2.2

2.3

2.4

2.5

2.6

How to Obtain Easergy Studio (MiCOM S1 Studio) Software

To Start Easergy Studio (MiCOM S1 Studio)

To Open a Pre-Existing System

To Start the PSL Editor

How to use MiCOM PSL Editor

Warnings

3 Toolbar and Commands

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

Standard Tools

Alignment Tools

Drawing Tools

Nudge Tools

Rotation Tools

Structure Tools

Zoom and Pan Tools

Logic Symbols

4 PSL Logic Signals Properties

4.8

4.9

4.10

4.11

4.12

4.13

4.14

4.15

4.1

4.2

4.2.1

4.3

4.4

4.5

4.6

4.7

4.16

4.17

4.18

Signal Properties Menu

Link Properties

Rules for Linking Symbols

Opto Signal Properties

Input Signal Properties

Output Signal Properties

GOOSE Input Signal Properties

GOOSE Output Signal Properties

Control In Signal Properties

InterMiCOM Output Commands Properties

InterMiCOM Input Commands Properties

Function Key Properties

Fault Recorder Trigger Properties

LED Signal Properties

Contact Signal Properties

LED Conditioner Properties

Contact Conditioner Properties

Timer Properties

Gate Properties

Page (SE) 7-

16

19

20

20

20

18

18

19

19

17

17

18

18

16

16

17

17

21

21

22

11

13

13

14

14

11

12

12

13

7

8

8

8

8

8

9

10

Px4x/EN SE/E22 Page (SE) 7-3

(SE) 7 Using the PSL Editor Figures

4.19

SR Programmable Gate Properties 23

5 Specific Tasks (P44y, P54x, P445 & P841 only)

5.1

5.2

5.3

5.4

5.5

5.6

5.7

24

PSL Signal Grouping Modes (P44y, P54x, P445 & P841 Software Version

D1a and later) 24

Digital Input Label Operation (P44y, P54x, P445 & P841 Software Version

D1a and later) 27

Virtual Input Label Operation (P44y, P54x, P445 & P841 Software Version

28 C1 and later)

Virtual Output Label Operation (P44y, P54x, P445 & P841 Software

Version C1 and later)

SR/MR User Alarm Label Operation (P44y, P54x, P445 & P841 Software

Version C1 and later)

Settable Control Input Operation (P44y, P54x, P445 & P841 Software

Version C1 and later)

Settable Control Setg I/P Label Operation (P44y, P54x, P445 & P841

Software Version C1 and later)

29

30

31

33

6 Making a Record of MiCOM Px40 Device Settings

6.1

6.2

6.3

35

Using Easergy Studio (MiCOM S1 Studio) to Manage Device Settings 35

Extract Settings from a MiCOM Px40 Device

Send Settings to a MiCOM Px40 Device

35

36

FIGURES

Page (SE) 7-

Figure 1 - Example of a PSL editor module

Figure 2 - Link properties

Figure 3 - Red, green and yellow LED outputs

Figure 4 - Contact conditioner settings

Figure 5 - Timer settings

Figure 6 - Gate properties

Figure 7 - SR latch component properties

Figure 8 - PSL diagram

Figure 9 – Easergy Studio (MiCOM S1 Studio) Disturb Recorder table diagram

Figure 10 - DR Chan Labels tree

Figure 11 - Digital Input 1 dialog box

Figure 12 - DR Chan Labels tree

Figure 13 - MiCOM S1 Studio VIR I/P Labels Tree

Figure 14 - Virtual Input 1 dialog box

Figure 15 - Easergy Studio (MiCOM S1 Studio) VIR I/P Labels Tree

Figure 16 - Easergy Studio (MiCOM S1 Studio) VIR O/P Labels Tree

Figure 17 - Easergy Studio (MiCOM S1 Studio) USR Labels Tree

28

28

28

29

30

26

27

27

27

21

22

23

25

9

16

20

21

Page (SE) 7-4 Px4x/EN SE/E22

Tables (SE) 7 Using the PSL Editor

Figure 18 - Virtual Input 1 dialog box

Figure 19 - Virtual Input 1 settings

Figure 20 - Easergy Studio (MiCOM S1 Studio) Control Inputs tree

Figure 21 – Ctrl Setg I/P 33 dialog box

30

30

31

31

Figure 22 - Easergy Studio (MiCOM S1 Studio) Control Inputs (Ctl Setg I/P 33) tree 31

Figure 23 – Ctrl Stg I/P Stat dialog box 32

Figure 24 - Easergy Studio (MiCOM S1 Studio) Control I/P Labels (Ctl Setg I/P 33) tree 33

Figure 25 – Ctrl Setg I/P 33 dialog box

Figure 26 - Easergy Studio (MiCOM S1 Studio) Control I/P Labels (Ctl Setg I/P 33) tree 33

33

TABLES

Page (SE) 7-

23 Table 1 - SR programmable gate properties

Px4x/EN SE/E22 Page (SE) 7-5

(SE) 7 Using the PSL Editor

Notes:

Tables

Page (SE) 7-6 Px4x/EN SE/E22

Overview

1

(SE) 7 Using the PSL Editor

OVERVIEW

The purpose of the Programmable Scheme Logic (PSL) is to allow the relay user to configure an individual protection scheme to suit their own particular application. This is achieved through the use of programmable logic gates and delay timers.

The input to the PSL is any combination of the status of opto inputs. It is also used to assign the mapping of functions to the opto inputs and output contacts, the outputs of the protection elements, e.g. protection starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic provides the relay’s standard protection schemes.

The PSL itself consists of software logic gates and timers. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed duration on the output regardless of the length of the pulse on the input. The outputs of the PSL are the LEDs on the front panel of the relay and the output contacts at the rear.

The execution of the PSL logic is event driven; the logic is processed whenever any of its inputs change, for example as a result of a change in one of the digital input signals or a trip output from a protection element. Also, only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time that is used by the PSL; even with large, complex PSL schemes the relay trip time will not lengthen.

This system provides flexibility for the user to create their own scheme logic design.

However, it also means that the PSL can be configured into a very complex system; hence setting of the PSL is implemented through the PC support package MiCOM S1

Studio.

Note MiCOM S1 Studio has been renamed as Easergy Studio.

Px4x/EN SE/E22 Page (SE) 7-7

(SE) 7 Using the PSL Editor

2

2.1

2.2

2.3

2.4

Easergy Studio (MiCOM S1 Studio) PSL Editor

EASERGY STUDIO (MICOM S1 STUDIO) PSL EDITOR

Note MiCOM S1 Studio has been renamed as Easergy Studio.

The PSL Editor can be used inside Easergy Studio (MiCOM S1 Studio) or directly.

This chapter assumes that you are using the PSL Editor from within Easergy Studio

(MiCOM S1 Studio).

If you use it from Easergy Studio (MiCOM S1 Studio), the Studio software will be locked whilst you are using the PSL editor software. The Studio software will be unlocked when you close the PSL Editor software.

The Easergy Studio (MiCOM S1 Studio) product is updated periodically. These updates provide support for new features (such as allowing you to manage new MiCOM products, as well as using new software releases and hardware suffixes). The updates may also include fixes. Accordingly, we strongly advise customers to use the latest Schneider

Electric version of Easergy Studio (MiCOM S1 Studio).

How to Obtain Easergy Studio (MiCOM S1 Studio) Software

Easergy Studio (MiCOM S1 Studio) is available from the Schneider Electric website:

• www.schneider-electric.com

To Start Easergy Studio (MiCOM S1 Studio)

To Start the Easergy Studio (MiCOM S1 Studio) software, click the Start > Programs >

Schneider Electric > MiCOM S1 Studio > MiCOM S1 Studio menu option.

To Open a Pre-Existing System

Within Easergy Studio (MiCOM S1 Studio), click the File + Open System menu option.

Navigate to where the scheme is stored, then double-click to open the scheme.

To Start the PSL Editor

The PSL editor lets you connect to any MiCOM device front port, retrieve and edit its PSL files and send the modified file back to a suitable MiCOM device.

Px30 and Px40 products are edited different versions of the PSL Editor. There is one link to the Px30 editor and one link to the Px40 editor.

To start the PSL editor for Px40 products:

Highlight the PSL file you wish to edit, and then either:

Double-click the highlighted PSL file,

Click the open icon or

In the MiCOM S1 Studio main menu, select Tools > PSL PSL editor (Px40) menu.

The PSL Editor will then start, and show you the relevant PSL Diagram(s) for the file you have opened. An example of such a PSL diagram is shown in the Example of a PSL editor module diagram.

Page (SE) 7-8 Px4x/EN SE/E22

Easergy Studio (MiCOM S1 Studio) PSL Editor (SE) 7 Using the PSL Editor

2.5

P0280ENa

Figure 1 - Example of a PSL editor module

How to use MiCOM PSL Editor

The MiCOM PSL editor lets you:

Start a new PSL diagram

Extract a PSL file from a MiCOM Px40 IED

Open a diagram from a PSL file

Add logic components to a PSL file

Move components in a PSL file

Edit link of a PSL file

Add link to a PSL file

Highlight path in a PSL file

Use a conditioner output to control logic

Download PSL file to a MiCOM Px40 IED

Print PSL files

For a detailed discussion on how to use these functions, please refer to the Easergy

Studio (MiCOM S1 Studio) User Manual.

Px4x/EN SE/E22 Page (SE) 7-9

(SE) 7 Using the PSL Editor

2.6

Easergy Studio (MiCOM S1 Studio) PSL Editor

Warnings

Before the scheme is sent to the relay checks are done. Various warning messages may be displayed as a result of these checks.

The Editor first reads in the model number of the connected relay, then compares it with the stored model number. A "wildcard" comparison is used. If a model mismatch occurs, a warning is generated before sending starts. Both the stored model number and the number read from the relay are displayed with the warning. However, the user must decide if the settings to be sent are compatible with the relay that is connected. Ignoring the warning could lead to undesired behavior of the relay.

If there are any potential problems of an obvious nature then a list will be generated. The types of potential problems that the program attempts to detect are:

• One or more gates, LED signals, contact signals, and/or timers have their outputs linked directly back to their inputs. An erroneous link of this sort could lock up the relay, or cause other more subtle problems to arise.

• Inputs to Trigger (ITT) exceeds the number of inputs. If a programmable gate has its ITT value set to greater than the number of actual inputs; the gate can never activate. There is no lower ITT value check. A 0-value does not generate a warning.

• Too many gates. There is a theoretical upper limit of 256 gates in a scheme, but the practical limit is determined by the complexity of the logic. In practice the scheme would have to be very complex, and this error is unlikely to occur.

• Too many links. There is no fixed upper limit to the number of links in a scheme.

However, as with the maximum number of gates, the practical limit is determined by the complexity of the logic. In practice the scheme would have to be very complex, and this error is unlikely to occur.

Page (SE) 7-10 Px4x/EN SE/E22

Toolbar and Commands

3 TOOLBAR AND COMMANDS

3.1 Standard Tools

(SE) 7 Using the PSL Editor

Px4x/EN SE/E22 Page (SE) 7-11

(SE) 7 Using the PSL Editor

3.2 Alignment Tools

3.3 Drawing Tools

Page (SE) 7-12

Toolbar and Commands

Px4x/EN SE/E22

Toolbar and Commands

3.4 Nudge Tools

3.5

3.6

Rotation Tools

Structure Tools

Px4x/EN SE/E22

(SE) 7 Using the PSL Editor

Page (SE) 7-13

(SE) 7 Using the PSL Editor

3.7 Zoom and Pan Tools

3.8 Logic Symbols

Page (SE) 7-14

Toolbar and Commands

Px4x/EN SE/E22

Toolbar and Commands (SE) 7 Using the PSL Editor

Px4x/EN SE/E22 Page (SE) 7-15

(SE) 7 Using the PSL Editor

4

4.1

4.2

PSL Logic Signals Properties

PSL LOGIC SIGNALS PROPERTIES

The logic signal toolbar is used for the selection of logic signals.

This allows you to link signals together to program the PSL. A number of different properties are associated with each signal. In the following sections, these are characterized by the use of an icon from the toolbar; together with a signal name and a

DDB number. The name and DDB number are shown in a pointed rectangular block, which includes a colour code, the icon, the name, DDB No and a directional pointer. One example of such a block (for P54x for Opto Signal 1 DDB No #032) is shown below:

Input 1

DDB #032

More examples of these are shown in the following properties sections.

Important The DDB Numbers vary according to the particular product and the particular name, so that Opto Signal 1 may not be DDB No

#032 for all products. The various names and DDB numbers illustrated below are provided as an example.

You need to look up the DDB numbers for the signal and the specific MiCOM product you are working on in the relevant

DDB table for your chosen product.

Signal Properties Menu

The logic signal toolbar is used for the selection of logic signals. To use this:

• Use the logic toolbar to select logic signals.

This is enabled by default but to hide or show it, select View > Logic Toolbar .

• Zoom in or out of a logic diagram using the toolbar icon or select View > Zoom

Percent .

• Right-click any logic signal and a context-sensitive menu appears.

• Certain logic elements show the Properties… option. Select this and a

Component Properties window appears. The Component Properties window and the signals listed vary depending on the logic symbol selected.

The following subsections describe each of the available logic symbols.

Link Properties

Links form the logical link between the output of a signal, gate or condition and the input to any element.

Any link that is connected to the input of a gate can be inverted. Right-click the input and select Properties… .

The Link Properties window appears.

Figure 2 - Link properties

Page (SE) 7-16 Px4x/EN SE/E22

PSL Logic Signals Properties

4.2.1

4.3

4.4

4.5

(SE) 7 Using the PSL Editor

Rules for Linking Symbols

An inverted link is shown with a small circle on the input to a gate. A link must be connected to the input of a gate to be inverted.

Links can only be started from the output of a signal, gate, or conditioner, and can only be ended at an input to any element.

Signals can only be an input or an output. To follow the convention for gates and conditioners, input signals are connected from the left and output signals to the right. The

Editor automatically enforces this convention.

A link is refused for the following reasons:

• An attempt to connect to a signal that is already driven. The reason for the refusal may not be obvious because the signal symbol may appear elsewhere in the diagram.

Right-click the link and select Highlight to find the other signal. Click anywhere on the diagram to disable the highlight.

• An attempt is made to repeat a link between two symbols. The reason for the refusal may not be obvious because the existing link may be represented elsewhere in the diagram.

Opto Signal Properties

Each opto input can be selected and used for programming in PSL. Activation of the opto input drives an associated DDB signal.

For example, activating opto Input L1 asserts DDB 032 in the PSL for the P14x, P34x,

P44y, P445, P54x, P547, P74x, P746, P841, P849 products.

Input 1

DDB #032

DDB Nos “Input 1 DDB #064” applies to: P24x, P64x.

“Opto Label DDB #064” applies to: P44x.

Input Signal Properties

Relay logic functions provide logic output signals that can be used for programming in

PSL. Depending on the relay functionality, operation of an active relay function drives an associated DDB signal in PSL.

For example, DDB 671 is asserted in the PSL for the P44y, P547 & P841 product if the active earth fault 1, stage 1 protection operate/trip.

IN>1 Trip

DDB #671

Output Signal Properties

Relay logic functions provide logic input signals that can be used for programming in

PSL. Depending on the relay functionality, activation of the output signal will drive an associated DDB signal in PSL and cause an associated response to the relay function.

For example, if DDB 409 is asserted in the PSL for the P44y, P54x, P547 and P841 product, it will block the sensitive earth function stage 1 timer.

ISEF>1 Timer Blk

DDB #409

Px4x/EN SE/E22 Page (SE) 7-17

(SE) 7 Using the PSL Editor

4.6

4.7

4.8

4.9

GOOSE Input Signal Properties

GOOSE Output Signal Properties

Control In Signal Properties

InterMiCOM Output Commands Properties

PSL Logic Signals Properties

Page (SE) 7-18 Px4x/EN SE/E22

PSL Logic Signals Properties

4.10 InterMiCOM Input Commands Properties

(SE) 7 Using the PSL Editor

4.11

4.12

Function Key Properties

Fault Recorder Trigger Properties

Px4x/EN SE/E22 Page (SE) 7-19

(SE) 7 Using the PSL Editor

4.13

4.14

4.15

PSL Logic Signals Properties

LED Signal Properties

All programmable LEDs will drive associated DDB signal when the LED is activated.

For example DDB 1036 will be asserted when LED 7 is activated for the P44y, P54x,

P547 or P841 product.

LED7 Red

DDB #1036

Contact Signal Properties

All relay output contacts will drive associated DDB signal when the output contact is activated.

For example, DDB 009 will be asserted when output R10 is activated for all products.

Output R10

DDB #009

LED Conditioner Properties

1. Select the LED name from the list (only shown when inserting a new symbol).

2. Configure the LED output to be Red, Yellow or Green.

Configure a Green LED by driving the Green DDB input.

Configure a RED LED by driving the RED DDB input.

Configure a Yellow LED by driving the RED and GREEN DDB inputs simultaneously.

1

1

Non -

Latching

Non -

Latching

FnKey LED1 Red

DDB #1040

FnKey LEDGm

DDB #1041

FnKey LED1 Red

DDB #1040

FnKey LEDGm

DDB #1041

LED Output Red

LED Output Green

1

Non -

Latching

FnKey LED1 Red

DDB #1040

FnKey LEDGm

DDB #1041

LED Output Yellow

P2610ENa

Figure 3 - Red, green and yellow LED outputs

3. Configure the LED output to be latching or non-latching.

DDB #642 and DDB #643 applies to these products: P14x, P44x, P74x, P746 and P849.

DDB #1040 and DDB #1041 applies to these products: P24x, P34x, P44y, P54x, P547,

P64x and P841.

Page (SE) 7-20 Px4x/EN SE/E22

PSL Logic Signals Properties

4.16 Contact Conditioner Properties

(SE) 7 Using the PSL Editor

4.17

Figure 4 - Contact conditioner settings

Timer Properties

Figure 5 - Timer settings

Px4x/EN SE/E22 Page (SE) 7-21

(SE) 7 Using the PSL Editor

4.18 Gate Properties

A Gate may be an AND, OR, or programmable gate.

PSL Logic Signals Properties

, OR

Figure 6 - Gate properties

1. Select the Gate type AND, OR, or Programmable.

2. Set the number of inputs to trigger when Programmable is selected.

3. Select if the output of the gate should be inverted using the Invert Output check box. An inverted output is indicated with a "bubble" on the gate output.

Page (SE) 7-22 Px4x/EN SE/E22

PSL Logic Signals Properties

4.19

(SE) 7 Using the PSL Editor

1

1

0

0

SR Programmable Gate Properties

For many products a number of programmable SR Latches are added. They are configured by an appropriate version of PSL Editor (S1v2.14 version 5.0.0 or greater) where an SRQ icon features on the toolbar.

Each SR latch has a Q output. The Q output may be inverted in the PSL Editor under the

SR Latch component properties window. The SR Latches may be configured as

Standard (no input dominant), Set Dominant or Reset Dominant in the PSL Editor under the SR Latch component properties window. The truth table for the SR Latches is given below.

A Programmable SR gate can be selected to operate with these latch properties:

S input R input O - Standard

O – Set input dominant

O – Rest input dominant

0

1

0

1

1

0

0

0

1

1

0

0

1

1

0

0

Table 1 - SR programmable gate properties

Px4x/EN SE/E22

S

R

O

Figure 7 - SR latch component properties

Select if the output of the gate should be inverted using the Invert Output check box. An inverted output is indicated with a "bubble" on the gate output.

Page (SE) 7-23

(SE) 7 Using the PSL Editor

5

5.1

Specific Tasks (P44y, P54x, P445 & P841 only)

SPECIFIC TASKS (P44Y, P54X, P445 & P841 ONLY)

Note MiCOM S1 Studio has been renamed as Easergy Studio.

PSL Signal Grouping Modes

(P44y, P54x, P445 & P841 Software Version D1a and later)

PSL Signal Grouping Nodes

For Software Version D1a and later, these DDB “Group” Nodes can be mapped to individual or multiple DDBs in the PSL:

PSL Group Sig 1

PSL Group Sig 2

PSL Group Sig 3

PSL Group Sig 4

There are now four additional DDB Group Sig x Nodes that can be mapped to individual or multiple DDBs in the PSL. These can then be set to trigger the DR via the

DISTURBANCE RECORD menu.

These "Nodes" are general and can also be used to group signals together in the PSL for any other reason. These four nodes are available in each of the four PSL setting groups.

Number PSL Group Sig

992

993

994

PSL Group Sig 1

PSL Group Sig 2

PSL Group Sig 3

995 PSL Group Sig 4

1. For a control input, the DR can be triggered directly by triggering directly from the

Individual Control Input (e.g. Low to High (L to H) change)

2. For an input that cannot be triggered directly, or where any one of a number of

DDBs are required to trigger a DR, map the DDBs to the new PSL Group sig n and then trigger the DR on this. e.g. in the PSL:

Page (SE) 7-24 Px4x/EN SE/E22

Specific Tasks (P44y, P54x, P445 & P841 only) (SE) 7 Using the PSL Editor

Figure 8 - PSL diagram

In the DR Settings:

Digital Input 1 is triggered by the PSL Group Sig 1 (L to H)

Digital Input 2 is triggered by Control Input 1 (L to H)

Px4x/EN SE/E22 Page (SE) 7-25

(SE) 7 Using the PSL Editor Specific Tasks (P44y, P54x, P445 & P841 only)

Figure 9 – Easergy Studio (MiCOM S1 Studio) Disturb Recorder table diagram

If triggering on both edges is required map another DR channel to the H/L as well

Digital Input 4 is triggered by the PSL Group Sig 1 (H to L)

Digital Input 5 is triggered by Control Input 1 (H to L)

Page (SE) 7-26 Px4x/EN SE/E22

Specific Tasks (P44y, P54x, P445 & P841 only)

5.2

(SE) 7 Using the PSL Editor

Digital Input Label Operation

(P44y, P54x, P445 & P841 Software Version D1a and later)

The digital input labels can be modified via the MiCOM P54X User Interface or S1 Studio.

The following example is using S1 Studio Version 5.0.0.

The digital input labels are available in the “DR CHAN LABELS” folder in the settings file as shown below:

Figure 10 - DR Chan Labels tree

Easergy Studio (MiCOM S1 Studio) removes leading spaces from the value field so making the ‘D’ look as if it’s the 1 st character in the label. The default values above in fact have a leading space which is used to switch off the use of the label as show below in the change settings view.

Figure 11 - Digital Input 1 dialog box

Pressing OK will save the setting and return to the settings page as follows:

Px4x/EN SE/E22

Figure 12 - DR Chan Labels tree

Digital Input 1 label will now be used in the Disturbance Record when the settings file is downloaded to the relay.

Page (SE) 7-27

(SE) 7 Using the PSL Editor

5.3 Virtual Input Label Operation

Specific Tasks (P44y, P54x, P445 & P841 only)

(P44y, P54x, P445 & P841 Software Version C1 and later)

Figure 13 - MiCOM S1 Studio VIR I/P Labels Tree

Figure 14 - Virtual Input 1 dialog box

Page (SE) 7-28

Figure 15 - Easergy Studio (MiCOM S1 Studio) VIR I/P Labels Tree

Px4x/EN SE/E22

Specific Tasks (P44y, P54x, P445 & P841 only)

5.4

(SE) 7 Using the PSL Editor

Virtual Output Label Operation

(P44y, P54x, P445 & P841 Software Version C1 and later)

Figure 16 - Easergy Studio (MiCOM S1 Studio) VIR O/P Labels Tree

Px4x/EN SE/E22 Page (SE) 7-29

(SE) 7 Using the PSL Editor

5.5

Specific Tasks (P44y, P54x, P445 & P841 only)

SR/MR User Alarm Label Operation

(P44y, P54x, P445 & P841 Software Version C1 and later)

Figure 17 - Easergy Studio (MiCOM S1 Studio) USR Labels Tree

Page (SE) 7-30

Figure 18 - Virtual Input 1 dialog box

Figure 19 - Virtual Input 1 settings

Px4x/EN SE/E22

Specific Tasks (P44y, P54x, P445 & P841 only)

5.6

(SE) 7 Using the PSL Editor

Settable Control Input Operation

(P44y, P54x, P445 & P841 Software Version C1 and later)

Figure 20 - Easergy Studio (MiCOM S1 Studio) Control Inputs tree

Figure 21 – Ctrl Setg I/P 33 dialog box

Px4x/EN SE/E22

Figure 22 - Easergy Studio (MiCOM S1 Studio) Control Inputs (Ctl Setg I/P 33) tree

Page (SE) 7-31

(SE) 7 Using the PSL Editor Specific Tasks (P44y, P54x, P445 & P841 only)

The setting “Ctl Stg I/P Stat” can be used to control multiple “Ctrl Setg I/P” at the same time, e.g. clear Ctrl Setg I/P 33 and set Ctrl Setg I/P 34 to 38, but please note that the status will not be reflected in the individual inputs settings or vice versa.

This cell may be hidden in the Easergy Studio (MiCOM S1 Studio) files.

Figure 23 – Ctrl Stg I/P Stat dialog box

Page (SE) 7-32 Px4x/EN SE/E22

Specific Tasks (P44y, P54x, P445 & P841 only)

5.7

(SE) 7 Using the PSL Editor

Settable Control Setg I/P Label Operation

(P44y, P54x, P445 & P841 Software Version C1 and later)

Figure 24 - Easergy Studio (MiCOM S1 Studio) Control I/P Labels (Ctl Setg I/P 33) tree

Figure 25 – Ctrl Setg I/P 33 dialog box

Px4x/EN SE/E22

Figure 26 - Easergy Studio (MiCOM S1 Studio) Control I/P Labels (Ctl Setg I/P 33) tree

Page (SE) 7-33

(SE) 7 Using the PSL Editor Specific Tasks (P44y, P54x, P445 & P841 only)

The above “Custom Ctrl Sg 1” label text will now be used in place of “Ctrl Setg I/P 33” in the Disturbance / Event Records after the settings file is downloaded to the relay.

Page (SE) 7-34 Px4x/EN SE/E22

Making a Record of MiCOM Px40 Device Settings

6

6.1

6.2

(SE) 7 Using the PSL Editor

MAKING A RECORD OF MICOM PX40 DEVICE SETTINGS

Using Easergy Studio (MiCOM S1 Studio) to Manage Device Settings

An engineer often needs to create a record of what settings have been applied to a device. In the past, they could have used paper printouts of all the available settings, and mark up the ones they had used. Keeping such a paper-based Settings Records could be time-consuming and prone to error (e.g. due to being settings written down incorrectly).

The Easergy Studio (MiCOM S1 Studio) software lets you read from or write to MiCOM devices.

Extract lets you download all the settings from a MiCOM Px40 device. A summary is given in the Extract Settings from a MiCOM Px40 Device section.

Send lets you send the settings you currently have open in Easergy Studio

(MiCOM S1 Studio). A summary is given in the Send Settings to a MiCOM Px40

Device section.

In most cases, it will be quicker and less error prone to extract settings electronically and store them in a settings file on a memory stick. In this way, there will be a digital record which is certain to be accurate. It is also possible to archive these settings files in a repository; so they can be used again or adapted for another use.

Full details of how to do this is provided in the Easergy Studio (MiCOM S1 Studio) help.

A quick summary of the main steps is given here. In each case, you need to make sure that:

Your computer includes the Easergy Studio (MiCOM S1 Studio) software.

Your computer and the MiCOM device are powered on.

You have used a suitable cable to connect your computer to the MiCOM device

(Front Port, Rear Port, Ethernet port or Modem as available).

Extract Settings from a MiCOM Px40 Device

Full details of how to do this is provided in the Easergy Studio (MiCOM S1 Studio) help.

As a quick guide, you need to do the following:

1. In Easergy Studio (MiCOM S1 Studio), click the Quick Connect… button.

2. Select the relevant Device Type in the Quick Connect dialog box.

3. Click the relevant port in the Port Selection dialog box.

4. Enter the relevant connection parameters in the Connection Parameters dialog box and click the Finish button

5. Studio will try to communicate with the Px40 device. It will display a connected message if the connection attempt is successful.

6. The device will appear in the Studio Explorer pane on the top-left hand side of the interface.

7. Click the + button to expand the options for the device, then click on the Settings folder.

8. Right-click on Settings and select the Extract Settings link to read the settings on the device and store them on your computer or a memory stick attached to your

9. computer.

After retrieving the settings file, close the dialog box by clicking the Close button.

Px4x/EN SE/E22 Page (SE) 7-35

(SE) 7 Using the PSL Editor

6.3

Making a Record of MiCOM Px40 Device Settings

Send Settings to a MiCOM Px40 Device

Full details of how to do this is provided in the Easergy Studio (MiCOM S1 Studio) help.

As a quick guide, you need to do the following:

1. In Easergy Studio (MiCOM S1 Studio), click the Quick Connect… button.

2. Select the relevant Device Type in the Quick Connect dialog box.

3. Click the relevant port in the Port Selection dialog box.

4. Enter the relevant connection parameters in the Connection Parameters dialog box and click the Finish button

5. Studio will try to communicate with the Px40 device. It will display a connected message if the connection attempt is successful.

6. The device will appear in the Studio Explorer pane on the top-left hand side of the interface.

7. Click the + button to expand the options for the device, then click on the Settings link.

8. Right-click on the device name and select the Send link.

Note When you send settings to a MiCOM Px40 device, the data is stored in a temporary location at first. This temporary data is tested to make sure it is complete. If the temporary data is complete, it will be programmed into the

MiCOM Px40 device. This avoids the risk of a device being programmed with incomplete or corrupt settings.

9. In the Send To dialog box, select the settings file(s) you wish to send, then click the

Send button.

10. Close the the Send To dialog box by clicking the Close button.

Page (SE) 7-36 Px4x/EN SE/E22

MiCOM P54x (P543, P544, P545 & P546) (PL) 8 Programmable Logic

P54x/EN PL/Nd5

PROGRAMMABLE LOGIC

CHAPTER 8

Page (PL) 8-1

(PL) 8 Programmable Logic MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (PL) 8-2 P54x/EN PL/Nd5

Contents (PL) 8 Programmable Logic

CONTENTS

1 Overview

2 Description of Logic Nodes

3 Factory Default Programmable Scheme Logic (PSL) Settings

4 Logic Input and Output Mappings

4.1

4.2

4.3

4.4

4.5

4.6

4.7

Logic Input Mappings

Standard Relay Output Contact Mappings

Optional High Break Relay Output Contact Mappings

Programmable LED Output Mappings

Fault Recorder Start Mappings

PSL Data Column

PSL Signal Grouping Modes

5 Viewing and Printing Default PSL Diagrams

5.1

5.2

Typical Mappings

Download and Print PSL Diagrams

6 MICOM P543 with Distance PSL

6.1

6.2

6.3

6.4

Output Input Mappings

Output Contacts

Output Contacts

LEDs

7 MiCOM P543 Without Distance PSL

7.1

7.2

7.3

7.4

Output Input Mappings

Output Contacts

Output Contacts

LEDs

8 MiCOM P544 With Distance PSL

8.1

8.2

8.3

8.4

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

9 MiCOM P544 Without Distance PSL

9.1

9.2

9.3

9.4

9.5

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

LEDs

P54x/EN PL/Nd5

Page (PL) 8-

68

69

69

70

72

75

78

78

78

7

8

80

80

80

81

81

82

83

84

106

106

107

108

109

94

94

95

96

97

119

119

120

121

122

123

Page (PL) 8-3

(PL) 8 Programmable Logic Tables

10 MiCOM P545 With Distance PSL

10.1

10.2

10.3

10.4

10.5

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

LEDs

11 MiCOM P545 Without Distance PSL

11.1

11.2

11.3

11.4

11.5

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

LEDs

12 MiCOM P546 With Distance PSL

12.1

12.2

12.3

12.4

12.5

12.6

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

Output Contacts

LEDs

13 MiCOM P546 Without Distance PSL

13.1

13.2

13.3

13.4

13.5

13.6

Output Input Mappings

Output Contacts

Output Contacts

Output Contacts

Output Contacts

LEDs

TABLES

Table 1 - DDB numbers and description of logic nodes

Table 2 - Factory default PSL settings for P54x models

Table 3 - Default opto-isolated input mappings

Table 4 - Default relay output contact mappings for P543 and P544

Page (PL) 8-

67

68

69

70

71 Table 5 - Default relay output contact mappings for P545 and P546

Table 6 - Default standard and high break output contact mappings for P543 and

P544 72

Table 7 - Default standard and high break output contact mappings for P545 73

173

173

174

175

176

177

186

159

159

160

161

162

163

172

146

146

147

148

149

150

132

132

133

134

135

136

Page (PL) 8-4 P54x/EN PL/Nd5

Tables (PL) 8 Programmable Logic

Table 8 - Default standard and high break output contact mappings for P546 (16 standard and 8 high break)

Table 9 - Default standard and high break output contact mappings for P546 (8 standard and 12 high break)

Table 10 - Default mappings for programmable LEDs for P543

Table 11 - Default mappings for programmable LEDs for P544

Table 12 - Default mappings for programmable LEDs for P545

Table 13 - Fault Recorder Start Mappings

73

74

75

76

77

78

P54x/EN PL/Nd5 Page (PL) 8-5

(PL) 8 Programmable Logic

Notes:

Tables

Page (PL) 8-6 P54x/EN PL/Nd5

Overview

1

(PL) 8 Programmable Logic

OVERVIEW

The purpose of the Programmable Scheme Logic (PSL) is to allow the user to configure an individual protection scheme to suit their own particular application. This is achieved through the use of programmable logic gates and delay timers.

The input to the PSL is any combination of the status of opto inputs. It is also used to assign the mapping of functions to the opto inputs and output contacts, the outputs of the protection elements, e.g. protection starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic provides the relay’s standard protection schemes.

The PSL itself consists of software logic gates and timers. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed duration on the output regardless of the length of the pulse on the input. The outputs of the PSL are the LEDs on the front panel of the relay and the output contacts at the rear.

The execution of the PSL logic is event driven; the logic is processed whenever any of its inputs change, for example as a result of a change in one of the digital input signals.

Also, only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time that is used by the

PSL. This means that even with large, complex PSL schemes the device trip time will not lengthen.

This system provides flexibility for the user to create their own scheme logic design. It also means that the PSL can be configured into a very complex system, hence setting of the PSL is implemented through the PC support package MiCOM S1 Studio.

How to edit the PSL schemes is described in the “Using the PSL Editor” chapter.

This chapter contains details of the logic nodes which are specific to this product, together with any PSL diagrams which we have published for this product.

P54x/EN PL/Nd5 Page (PL) 8-7

(PL) 8 Programmable Logic Description of Logic Nodes

2 DESCRIPTION OF LOGIC NODES

The following table shows the available DDB Numbers, a Description of what they are and which products they apply to. Where a range of DDB Numbers apply to a consecutively-numbered range of related items, the DDB

Number range is shown. For example, DDB No 0 to 11 to cover Output Relay 1 to Output Relay 11; or 2nd

Harmonic A to C to cover 2nd Harmonic A, 2nd Harmonic B and 2nd Harmonic C).

If a DDB Number is not shown, it is not used in this range of products.

DDB

No

32 to 55 Opto Input

56 to 63 Opto Input

56 to 63 Opto Input

64 to 79

80 to 87 InterMiCOM

88 to 95 PSL

96 to 103 IM64

104 to

111

112 to

119

120 to

127

128 to

159

160 to

191

192 to

223

IM64

PSL

PSL

PSL

Source

Virtual Input

Command

Note

Description

Where applicable. Not all nodes appear in every product variant.

English Text

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

Assignment of signal to drive output

Relay 1 to

Relay 32

From opto input 1 to

From opto input 24

When opto energized

From opto input 25 to

From opto input 32

When opto energized

Unused

Unused

InterMiCOM Input 1 to

InterMiCOM Input 8

Is driven by a message from the remote line end

InterMiCOM Output 1 to

InterMiCOM Output 8

Is an output to the remote line end

IM64 Ch1 input 1 to

IM64 Ch1 input 8

Is driven by a message from the remote line end

IM64 Ch2 input 1 to

IM64 Ch2 input 8

Is driven by a message from the remote line end

IM64 Ch1 output 1 to

IM64 Ch1 output 8

Mapping what will be sent to the remote line end

IM64 Ch2 output 1 to

IM64 Ch2 output 8

Mapping what will be sent to the remote line end

Input to relay 1 output conditioner to

Input to relay 32 output conditioner

Relay 1 to

Relay 32

Opto 1 to

Opto 24

Opto 25 to

Opto 32

Unused

Unused

IM Input 1 to

IM Input 8

IM Output 1

IM64 Ch1 Input 1 to

IM64 Ch1 Input 8

IM64 Ch2 Input 1 to

IM64 Ch2 Input 8

IM64 Ch1 Output1 to

IM64 Ch1 Output8

IM64 Ch2 Output1

Relay Cond 1 to

Relay Cond 32

Unused Unused

Control input 1 to

Control Input 32

For SCADA and menu commands into PSL

Control Input 1 to

Control Input 32

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

Page (PL) 8-8 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

290

291

292

293

294

297

298

299

295

296

297

DDB

No

224 to

255

Source

GOOSE Input

Command

256 to

287

PSL

Description English Text

Virtual Input 1 to

Virtual Input 32

Received from GOOSE message

Virtual Input 1 to

Virtual Input 32

Virtual Output 1 to

Virtual Output 32

Allows user to control a binary signal which can be mapped via SCADA protocol output to other devices

Virtual Output 1 to

Virtual Output32

288

289

290

294

295

300

301

302

Commissioning

Test

Commissioning

Test

Commissioning

Test

C Diff

C Diff

Protection disabled - typically out of service due to test mode

Static test mode option bypasses the delta phase selectors, power swing detection and reverts to conventional directional line and cross polarization to allow testing with test sets that can not simulate a real fault

Prot'n Disabled

Static Test Mode

Unused Reserved

Loopback test in service (external or internal) Test Loopback

Indication that relay is in test mode Test IM64

VT Fail Alarm

CT Supervision CTS indication alarm (CT supervision alarm) CT Fail Alarm

CT Supervision

CT Supervision

CT1S indication alarm (CT supervision alarm)

In the cases of two CTs:

- If standard CTS is used, this indication is

ON in case of failure on any of the CTs

- If Diff CTS is used this indication is ON in case of failure on CT1

CT1 Fail Alarm

CT2S indication alarm (CT supervision alarm).

This indication is ON If Diff CTS is used and there is a failure on CT2

CT2 Fail Alarm

CT Supervision Unused Reserved

Remote CT Alarm

Powerswing

Blocking

Powerswing

Blocking

CB Fail

Powerswing blocking will block any distance zone selected in the setting file

Power Swing

CB Monitoring

CB Monitoring

CB Status

CB Control

Unused Reserved

Circuit breaker fail alarm

This alarm indicates that DDB I ^ Maint.

Alarm (1106) or DDB CB OPs Maint. (1108) or DDB CB Time Maint. (1110)

CB Fail Alarm

CB Monitor Alarm

This alarm indicates that DDB I ^ Lockout

Alarm (1107) or DDB CB Ops Lock (1109) or

DDB CB Time lockout (1111)

Circuit breaker failed to trip (after a manual/operator) trip command

CB Lockout Alarm

Indication of problems by circuit breaker state monitoring - example defective auxiliary contacts

CB Status Alarm

CB Trip Fail

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

* *

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-9

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

303

304

305

306

307

308

298

299

300

301

302

303

304

305

306

Source Description English Text

CB Control

CB Control

CB Control

Circuit breaker failed to close (after a manual/operator or auto-reclose close command)

Manual circuit breaker unhealthy output signal indicating that the circuit breaker has not closed successfully after a manual close command. (A successful close also requires

The circuit breaker healthy signal to reappear within the "healthy window" timeout)

Indicates that the check synchronism signal has failed to appear for a manual close

CB Close Fail

Man CB Unhealthy

No C/S Man Close

Autoreclose

Autoreclose

Indicates an auto-reclose lockout condition - no further auto-reclosures possible until resetting

Auto-reclose circuit breaker unhealthy signal, output from auto-reclose logic. Indicates during auto-reclose in progress, if the circuit breaker has to become healthy within the circuit breaker healthy time window

Autoreclose

Indicates during auto-reclose in progress, if system checks have not been satisfied within the check synchronizing time window

CB Fail Circuit breaker (CB1) fail alarm

CB Monitoring CB1 Monitor Alarm

A/R Lockout

A/R CB Unhealthy

A/R No Checksync

CB1 Fail Alarm

CB1 Monitor Alm

CB1 Mon LO Alarm CB Monitoring CB1 Monitor Lockout Alarm

CB Status

CB1 Status Alarm - set when CB1 status is determined by inputs from BOTH 52A and

52B type auxiliary contacts (setting "CB1

Status Input = 52A&52B-xPole), and both inputs are in the same state (both = 0 or both

= 1) for time period => 5sec, indicating a problem with the auxiliary switch mechanism).

CB1 Status Alm

CB Control

CB Control

CB Control

CB Control

Autoreclose

*

*

*

*

*

*

CB1 Failed to Trip - alarm set if CB1 does not trip within set Trip Pulse Time when CB1 trip command is issued.

CB1 Trip Fail

CB1 Failed to Close - alarm set if CB1 fails to close within set Close Pulse Time when CB1 close command is issued

CB1 Close Fail

Control CB1 Unhealthy - alarm set if CB1 remains "unhealthy" for CB Control set time

"CB Healthy Time" when operator controlled

CB1 close sequence is initiated. (Please see description for CB Control setting "CB

Healthy Time").

ManCB1 Unhealthy

Control No Checksync - alarm set if selected system check conditions for manual closing

CB1 remain unsatisfied for CB Control set time "Check Sync Time" when operator controlled CB1 close sequence is initiated.

(Please see description for CB Control setting

"Check Sync Time").

NoCS CB1ManClose

Autoclose Lockout/RLY BAR - alarm set when CB1 autoreclose is locked out.

CB1 AR Lockout

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

P544

/

P546

Page (PL) 8-10 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

307

308

309

310

311

312

313

314

315

316

317

318

317 to

318

319

320

321

322

323

324

Source

Autoreclose

Autoreclose

Check sync

C Diff

C Diff

C Diff

C Diff

C Diff

C Diff

PSL

PSL

PSL

Frequency

Tracking

CB2 Fail

CB Monitoring

CB Monitoring

CB2 Status

CB2 Control

Description English Text

No Healthy (AR) - alarm set if CB1 remains

"unhealthy" for Autoreclose set time "CB

Healthy Time" when CB1 close sequence is initiated by autoreclose function. (Please see description for Autoreclose setting "CB

Healthy Time").

AR CB1 Unhealthy

No Check Sync / AR Fail - alarm set if selected system check conditions for autoreclosing CB1 remain unsatisfied for

Autoreclose set time "Check Sync Time" when CB1 close sequence is initiated by autoreclose function. (Please see description for Autoreclose setting "Check Sync Time").

Unused

Indicates that GPS is lost

AR CB1 No C/S

Reserved

GPS Alarm

If a differential protection communication path has remained failed for a period which is longer than the “Comms Fail Timer”, this alarm is ON

Signalling Fail

If successive calculated propagation delay times exceed time delay setting “Comm

Delay Tol”, this alarms is ON

It indicates that differential protection communications are completely lost and therefore C diff does not work

Comm Delay Alarm

C Diff Failure

It indicates that communications between relays are completely lost and therefore IM64 does not work

IM64 SchemeFail t will appear in case of at least one of the following: CH1 (or CH2) loss of signal, CH1

(or CH2) PATH_YELLOW or CH1 (or CH2)

BAD_RX_N

IEEE C37.94 Fail

Indicate that a differential protection has been inhibited

C Diff Inhibited

Aided channel scheme 1 - channel out of service indication, indicating channel failure Aid 1 Chan Fail

Aided channel scheme 2 - channel out of service indication, indicating channel failure Aid 2 Chan Fail

Unused Reserved

Frequency out of range alarm F out of Range

Circuit breaker 2 fail alarm

This alarm indicates that DDB CB2 I ^ Maint.

Alarm (1113) or DDB CB2 OPs Maint. (1115) or DDB CB2 Time Maint. (1117)

CB2 Fail Alarm

CB2 Monitor Alm

This alarm indicates that DDB CB2 I ^

Lockout Alarm (1114) or DDB CB Ops Lock

(1116) or DDB CB Time lockout (1118)

Indication of problems by circuit breaker 2 state monitoring - example defective auxiliary contacts

Circuit breaker 2 failed to trip (after a manual/operator) trip command

CB2 Mon LO Alarm

CB2 Status Alm

CB2 Trip Fail

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-11

(PL) 8 Programmable Logic Description of Logic Nodes

320

321

322

323

324 to

326

327

327

328 to

330

331

331

332

333

334

DDB

No

325

326

328

329

330

335

336

337

338

339

339

Source Description English Text

CB2 Control

CB2 Control

Circuit breaker 2 failed to close (after a manual/operator or auto-reclose close command)

Manual circuit breaker unhealthy output signal indicating that the circuit breaker 2 has not closed successfully after a manual close command. (A successful close also requires

The circuit breaker healthy signal to reappear within the "healthy window" timeout)

CB2 Close Fail

ManCB2 Unhealthy

CB2 Fail Unused

CB Monitoring Unused

CB Monitoring Unused

Reserved

Reserved

Reserved

CB2 Status

CB2 Control

CB2 Control

Autoreclose

Autoreclose

Autoreclose

Unused

Unused

Reserved

Reserved

Indicates that the check synchronism signal has failed to appear for a manual close

Indicates an auto-reclose lockout condition - no further auto-reclosures possible until resetting

NoCS CB2ManClose

CB2 AR Lockout

Auto-reclose circuit breaker unhealthy signal, output from auto-reclose logic. Indicates during auto-reclose in progress, if the circuit breaker has to become healthy within the circuit breaker healthy time window

AR CB2 Unhealthy

Indicates during auto-reclose in progress, if system checks have not been satisfied within the check synchronizing time window

Unused

AR CB2 No C/S

Reserved *

*

*

*

*

*

CB2 Control

Autoreclose

Autoreclose

Autoreclose

C Diff

C Diff

Co-processor interface

C Diff

C Diff

C Diff

C Diff

CT Setting

CT Setting

Unused

In three ended schemes on power up, the relays check to see if one of them should be configured out. Under some circumstances it is possible for them to fail to resolve this in which case they produce the

DDB_CONFIGURATION_ERROR alarm

Indicates that RESTORE or RECONFIGURE or CONFIGURE operations have failed

This is an alarm which indicates that C3794 comms have been changed to standard or vice versa and relay must be rebooted

Maximum Propagation Delay Alarm

CT2 ratio/CT1 ratio out of range

Unused

Reserved

AR Mode selected via optos is not supported Invalid AR Mode

Unused Reserved

Incompatible relays Incompatible Rly

Invalid Message Format InValid Mesg Fmt

Indicates a failure in differential or distance or

DEF

Main Prot. Fail

Config Error

Re-Config Error

Comms Changed

Max Prop. Alarm

Ct para mismatch

Reserved

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

Page (PL) 8-12 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

355

356

357

358

359

360

361

362

363

352

353

354

DDB

No

340 to

343

344 to

347

348 to

351

Source Description English Text

PSL

PSL

PSL

Unused Reserved

Triggers user alarm 1

Triggers user alarm 4 message to be alarmed on LCD display (selfresetting)

Triggers user alarm 5 message to

Triggers user alarm 8 message to be alarmed on LCD display (manualresetting)

SR User Alarm 1 to

SR User Alarm 4

MR User Alarm 5 to

MR User Alarm 8

Self monitoring 48V field voltage failure

Battery Fail

Field Volts Fail

Rear Comm 2 Fail

Ethernet Interface Ethernet board not fitted

Ethernet Interface Ethernet board not responding

Ethernet Interface Ethernet board unrecoverable error

Ethernet Interface Ethernet problem

Ethernet Interface Ethernet problem

Ethernet Interface Ethernet problem

SW If this location DST is in effect now

*

*

GOOSE IED Absent *

NIC Not Fitted

NIC No Response

NIC Fatal Error

NIC Soft. Reload

Bad TCP/IP Cfg.

Bad OSI Config.

DST status

NIC SW Mis-Match *

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

364

365

366

367

368

369

370 to

383

384

385

InterMiCOM

InterMiCOM

InterMiCOM

InterMiCOM

Self monitoring

PSL

PSL

IP Addr Conflict

EIA(RS)232 InterMiCOM indication that

Loopback testing is in progress

EIA(RS)232 InterMiCOM Message Failure alarm. Setting that is used to alarm for poor channel quality. If during the fixed 1.6 s rolling window the ratio of invalid messages to the total number of messages that should be received (based upon the ‘Baud Rate’ setting) exceeds the above threshold, a

‘Message Fail’ alarm will be issued

EIA(RS)232 InterMiCOM Data Channel

Detect Fail i.e. modem failure

EIA(RS)232 InterMiCOM Channel Failure alarm. No messages were received during the alarm time setting

This is an alarm that is ON if any setting fail during the setting changing process. If this happens, the relay will use the last known good setting

Platform Alarm 19 to

Platform Alarm 32

Zone 1 ground basic scheme blocking

Zone 1 phase basic scheme blocking

IM Loopback

IM Message Fail

IM Data CD Fail

IM Channel Fail

Backup Setting

Reserved

Block Zone 1 Gnd

Block Zone 1 Phs

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-13

(PL) 8 Programmable Logic Description of Logic Nodes

417

418

419

409 to

412

PSL

413

414

PSL

PSL

415

416

PSL

PSL

PSL

PSL

PSL

396

396

397

398

397

398

DDB

No

386

387

388

389

390

391

392

393

394

395

384 to

395

399

399

400

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Source

401 to

404

PSL

405 to

408

PSL

Description

Zone 2 ground basic scheme blocking

Zone 2 phase basic scheme blocking

Zone 3 ground basic scheme blocking

Zone 3 phase basic scheme blocking

Zone P ground basic scheme blocking

Zone P phase basic scheme blocking

Zone 4 ground basic scheme blocking

Zone 4 phase basic scheme blocking

Block distance aided scheme 1 tripping

Block DEF aided scheme 1 tripping

Unused

Block Delta directional aided scheme 1 tripping

Unused

Block distance aided scheme 2 tripping

Block DEF aided scheme 2 tripping

Unused

Unused

Block Delta directional aided scheme 2 tripping

Unused

Time synchronism by opto pulse

Block phase overcurrent stage 1 time delayed tripped trip to

Block phase overcurrent stage 4 time delayed trip

Block standby earth fault stage 1 time delayed trip to

Block standby earth fault stage 4 time delayed trip

Block sensitive earth fault stage 1 time delayed trip to

Block sensitive earth fault stage 4 time delayed trip

Unused

Block phase undervoltage stage 1 time delayed trip

Block phase undervoltage stage 2 time delayed trip

Block phase overvoltage stage 1 time delayed trip

Block phase overvoltage stage 2 time delayed trip

Block residual overvoltage stage 1 time delayed trip

Block residual overvoltage stage 2 time delayed trip

English Text

Block Zone 2 Gnd

Block Zone 2 Phs

Block Zone 3 Gnd

Block Zone 3 Phs

Block Zone P Gnd

Block Zone P Phs

Block Zone 4 Gnd

Block Zone 4 Phs

Aid1 InhibitDist

Aid1 Inhibit DEF

Unused

Aid1 Inhib Delta

Unused

Aid2 InhibitDist

Aid2 Inhibit DEF

Unused

Unused

Aid2 Inhibit DIR

Unused

Time Synch

I>1 Timer Block to

I>4 Timer Block

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

P543

/

P545

* *

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

* * * *

IN>1 Timer Block to

IN>4 Timer Block

*

ISEF>1 Timer Blk to

ISEF>4 Timer Blk

Unused

V<1 Timer Block

V<2 Timer Block

V>1 Timer Block

V>2 Timer Block

VN>1 Timer Blk

VN>2 Timer Blk

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-14 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

420

421

422

423

424

425

426

427

428

DDB

No

420

421

422

423

424

425

426

427

429

430

431

432

433

434

435

428 to

435

Source

436 PSL

436

439

440

439

437

437

438

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Description English Text

52-A (CB closed) CB auxiliary input (3 phase) CB Aux 3ph(52-A)

52-A (CB A phase closed) CB auxiliary CB Aux A(52-A)

52-A (CB B phase closed) CB auxiliary CB Aux B(52-A)

52-A (CB C phase closed) CB auxiliary CB Aux C(52-A)

52-B (CB open) CB auxiliary input (3 phase) CB Aux 3ph(52-B)

52-B (CB A phase open) CB auxiliary input CB Aux A(52-B)

52-B (CB B phase open) CB auxiliary input CB Aux B(52-B)

52-B (CB C phase open) CB auxiliary input CB Aux C(52-B)

52-A (CB1 closed) CB auxiliary input (3 phase)

CB1Aux 3ph(52-A)

52-A (CB1 A phase closed) CB auxiliary

52-A (CB1 B phase closed) CB auxiliary

52-A (CB1 C phase closed) CB auxiliary

52-B CB Contact Input

52-B CB Contact Input A Phase

CB1Aux A (52-A)

CB1Aux B (52-A)

CB1Aux C (52-A)

CB1Aux 3ph(52-B)

CB1Aux A (52-B)

52-B CB Contact Input B Phase

52-B CB Contact Input C Phase

52-A (CB2 closed) CB2 auxiliary input (3 phase)

CB1Aux B (52-B)

CB1Aux C (52-B)

CB2 Aux3ph(52-A)

52-A (CB2 A phase closed) CB auxiliary CB2 Aux A(52-A)

52-A (CB2 B phase closed) CB2 auxiliary CB2 Aux B(52-A)

52-A (CB2 C phase closed)CB2 auxiliary

52-B (CB2 open) CB2 auxiliary input (3 phase)

CB2 Aux C(52-A)

CB2 Aux3ph(52-B)

52-B (CB2 A phase open) CB2 auxiliary input CB2 Aux A(52-B)

52-B (CB2 B phase open) CB2 auxiliary input CB2 Aux B(52-B)

52-B (CB2 C phase open) CB2 auxiliary input CB2 Aux C(52-B)

Unused Unused

Circuit breaker healthy (input to auto-recloser

- that the CB has enough energy to allow reclosing)

CB Healthy

Circuit breaker healthy (input to auto-recloser

- that the CB1 has enough energy to allow reclosing)

CB1 Healthy

Circuit breaker healthy (input to auto-recloser

- that the CB2 has enough energy to allow reclosing)

CB2 Healthy

Unused

VT supervision input - signal from external miniature circuit breaker showing MCB tripped

Initiate tripping of circuit breaker from a manual command

Unused

MCB/VTS

Init Trip CB

Initiate closing of circuit breaker from a manual command

Initiate tripping of circuit breaker 1 from a manual command

Init Close CB

Init Trip CB1

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-15

(PL) 8 Programmable Logic Description of Logic Nodes

443

446

447

447

448

444

445

446

451

452

453

DDB

No

440

441

PSL

PSL

Source

442

441 to

442

PSL

PSL

443 PSL

448

454

455

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

449 to

450

PSL

451 PSL

PSL

PSL

Description English Text

Initiate closing of circuit breaker 1 from a manual command

Initiate tripping of circuit breaker 2 from a manual command

Initiate closing of circuit breaker 2 from a manual command

Unused

Init Close CB1

Init Trip CB2

Init Close CB2

Unused

Reset Manual CB Close Timer Delay (stop & reset Manual Close Delay time for closing

CB).

Reset Manual CB Close Timer Delay (stop & reset Manual Close Delay time for closing

CB1).

Reset Close Dly

Rst CB1 CloseDly

Reset latched relays & LEDs (manual reset of any lockout trip contacts, auto-reclose lockout, and LEDs)

Reset Relays/LED

Reset thermal state to 0%

Manual control to reset auto-recloser from lockout

Reset Lockout Opto Input to reset CB1

Lockout state

Rst CB1 Lockout

Reset circuit breaker maintenance values Reset CB Data

Reset CB1 Maintenance values Rst CB1 Data

DDB mapped in PSL from opto or comms input. External signal to force CB1 autoreclose to lockout.

DDB mapped in PSL from opto or comms input. External signal to force CB autoreclose to lockout.

Reset Thermal

Reset Lockout

Block CB1 AR

Block CB AR

Unused Unused

Pole discrepancy (from external detector) - input used to force a 2nd single pole trip to move to a 3 pole auto-reclose cycle

Pole discrepancy (from external detector) - input used to force a 2nd single pole trip to move to a 3 pole auto-reclose cycle

To enable loopback mode via opto input

When linked to an opto input, inhibits differential relay at the local end and send an inhibit command to the remote end

Pole Discrepancy

Pole Discrep.CB1

Loopback Mode

Permissive intertrip mapping what will be sent to the remote line end

Perm Intertrip

To enable stub bus protection in relays with two CT inputs. When enabled, all current values transmitted to the remote relays, and all those received from remote relays, are set to zero. Differential intertrip signals are not sent The protection provides differential protection for the stub zone

Stub Bus Enabled

Inhibit C Diff

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-16 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

456

457

458

458

459

460

PSL

PSL

PSL

PSL

PSL

483

484

485

461

479

480

481

482

462

463 to

466

467 to

470

471

472

473

474

475

476

477

478

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Source Description English Text

This must be energized (along with DDB 455

- inhibit C Diff) at the time that a relay configuration is changed from 3 ended to 2 ended scheme. This usually should be driven from a 52-B contact of the CB connected to the line end that is taken out of service

If a P54x relay working with GPS sample synchronization loses GPS and there is a further switch in the protection communications network, the relay becomes

Inhibit. If GPS become active again, the relay will automatically reset. But if not, the user can remove the inhibited condition by energizing this DDB signal as long as it is ensured that propagation delay times are equal

Recon Interlock

Prop Delay Equal

Inhibit WI

Unused

Inhibit weak infeed aided scheme logic

Unused

Commissioning tests - automatically places relay in test mode

For IEC-870-5-103 protocol only, used for

"Command Blocking" (relay ignores SCADA commands)

For IEC-870-5-103 protocol only, used for

"Monitor Blocking" (relay is quiet - issues no messages via SCADA port)

Unused

Test Mode

103 CommandBlock

103 MonitorBlock

Unused

*

*

*

*

*

*

*

P543 /

P545 No

Distance

Inhibit stage 1 overcurrent protection to

Inhibit stage 4 overcurrent protection

Inhibit stage 1 earth fault protection to

Inhibit stage 4 earth fault protection

Inhibit stage 1 undervoltage protection

Inhibit stage 2 undervoltage protection

Inhibit I>1 to

Inhibit I>4

Inhibit IN>1 to

Inhibit IN>4

Inhibit V<1

Inhibit V<2

*

*

Inhibit stage 1 overvoltage protection

Inhibit stage 2 overvoltage protection

Inhibit stage 2 overvoltage protection

Inhibit V>1

Inhibit V>2

Inhibit VN>1

Inhibit stage 2 residual overvoltage protection Inhibit VN>2

Unused

Inhibit thermal overload protection

Unused

Inhibit Thermal

Inhibit circuit breaker state monitoring (no alarm for defective/stuck auxiliary contact) InhibitCB Status

Inhibit circuit breaker fail protection

Broken conductor protection

Inhibit VT supervision (including turn OF

MCB’s) via PSL

Inhibit CT supervision (both differential and standard CTS) via PSL

Inhibit checksync. (Both stages and for each

CB)

Inhibit trip on reclose (TOR)

Inhibit CB Fail

Inhibit OpenLine

Inhibit VTS

Inhibit CTS

InhibitChecksync

Inhibit TOR

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

P54x/EN PL/Nd5 Page (PL) 8-17

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

486

485 to

486

487

488

489

490

491

492

493

494

488

489

490 to

493

PSL

PSL

Source

Inhibit switch onto fault (SOTF)

Unused

PSL

PSL

Zone 1 Extension

Scheme

To disable differential CTS via PSL

AR reset Z1X reach back to Z1 reach in Z1 extension scheme

Disable CTS

To enable SOTF logic by an external pulse.

When this input is energized by en external pulse, SOTF becomes enabled during “SOTF

Pulse” time setting

Set SOTF

AR Reset Z1 EXT

PSL

PSL

PSL

PSL

Aided Scheme

Logic

PSL

Zone 1 Extension

Scheme

Reset zone Z1X back to Z1 reach using logic input (i.e. case when external AR and Z1 extension scheme are used)

Inhibit Loss of Load scheme function

Aided 1 channel out of service signal (COS) or loss of guard signal (LGS) in distance unblocking schemes. This signal is normally driven from an opto input on conventional channels or from InterMiCOM

Aided channel 1 - external signal received, for input to distance fixed scheme logic

Aided channel 1 - internal signal received generated in the signal receive logic

Unused

Unused

Reset Zone 1 Ext

Inhibit LoL

Aided 1 COS/LGS

Aided1 Scheme Rx

Aided 1 Receive

Unused

Unused

Unused

Description English Text

Inhibit SOTF

Unused

Unused

494

495

PSL

Aided Scheme

Logic

496

497

498

499

500

PSL

PSL

Aided Scheme

Logic

PSL

Aided Scheme

Logic

Unused Unused

Unused

Prevent sending by customized logic - aided scheme 1

Programmable send logic for special customized scheme (aided channel 1)

Aided channel 1 send - internal send signal generated in signal send logic

Unused

Aid1 Block Send

Aid1 Custom Send

Aided 1 Send

When using a custom programmable aided scheme 1, the user is able to include a current reversal guard timer. Energizing this

DDB will additionally start this timer, from

PSL

Aid1 Custom T In

When using customized aided scheme 1, this signal is used to indicate any additional condition that should be treated as permission for an aided trip (for example a permissive signal received could be connected, or a blocking signal could be inverted and then connected)

Aid1 CustomT Out

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

* * *

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-18 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

501

502

503

496 to

497

498

499

500 to

501

502

503

504

504

505

506

507

508

509

510

511

512

505

506 to

507

508

513

514

Source Description English Text

Aided Scheme

Logic

PSL

Aided Scheme

Logic

PSL

Aided scheme 1 trip enable - this is a permissive signal used to accelerate zone 2, or a blocking signal which has been inverted.

It is a signal output, part-way through the internal fixed logic of aided schemes

Aid1 Trip Enable

Aid1 custom trip enable

Aided scheme 1 distance trip command

(output from aided tripping logic)

Aid1 Custom Trip

Aid 1 Dist Trip

Unused Unused

Aided Scheme

Logic

PSL

Aided Scheme

Logic

PSL

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Unused

Unused

Unused

Unused

Unused

Aided Scheme 1 Delta Directional Trip

Unused

Unused

Unused

Unused

Unused command (output from Aided tripping logic) Aid 1 Delta Trip

Unused Unused

PSL

PSL

Aided Scheme

Logic

Aided Scheme

Logic

PSL

Aided scheme 1 DEF trip command (output from aided tripping logic)

Aided 2 channel out of service signal (COS) or loss of guard signal (LGS) in distance unblocking schemes. This signal is normally driven from an opto input on conventional channels or from InterMiCOM

Aided channel 2 - external signal received, for input to distance fixed scheme logic

Aided channel 2 - internal signal received generated in the signal receive logic

Unused

Aid 1 DEF Trip

Aided 2 COS/LGS

Aided2 Scheme Rx

Aided 2 Receive

Unused

Unused Unused

Aided Scheme

Logic

Unused

RP1 Read Only RP1 Read Only DDB

RP2 Read Only RP2 Read Only DDB

NIC Read Only NIC Read Only DDB

PSL

Prevent sending by customized logic - aided scheme 2

PSL

Programmable send logic for special customized scheme (aided channel 2)

Aided Scheme

Logic

Aided channel 2 send - internal send signal generated in signal send logic

Unused

RP1 Read Only

RP2 Read Only

NIC Read Only

Aid2 Block Send

Aid2 Custom Send

Aided 2 Send

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-19

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

515

516

517

518

519

512 to

513

514

515

516 to

517

518

519

520

520

521

521

522

523

524

525

523

PSL

Aided Scheme

Logic

Aided Scheme

Logic

PSL

Aided Scheme

Logic

PSL

Aided Scheme

Logic

PSL

Aided Scheme

Logic

PSL

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

When using a custom programmable aided scheme 2, the user is able to include a current reversal guard timer. Energizing this

DDB will additionally start this timer, from

PSL

When using customized aided scheme 2, this signal is used to indicate any additional condition that should be treated as permission for an aided trip (for example a permissive signal received could be connected, or a blocking signal could be inverted and then connected)

Aid2 Custom T In

Aid2 CustomT Out

Aided scheme 2 trip enable - this is a permissive signal used to accelerate zone 2, or a blocking signal which has been inverted.

It is a signal output, part-way through the internal fixed logic of aided schemes

Aid2 Trip Enable

Aid2 custom trip enable

Aided scheme 2 distance trip command

(output from aided tripping logic)

Aid2 Custom Trip

Aid 2 Dist Trip

Unused Unused

Unused

Unused

Unused

Unused

Unused

Aided Scheme 2 Delta Directional Trip

Unused

Aided scheme 2 DEF trip command (output from aided tripping logic)

Unused

Unused

Unused

Unused

Unused

Unused command (output from Aided tripping logic) Aid 2 Delta Trip

Unused

Aid 2 DEF Trip

Unused

Any trip signal - can be used as the trip command in three-pole tripping applications Any Trip

Trip signal for phase A - used as a command to drive trip A output contact(s). Takes the output from the internal trip conversion logic

Trip Output A

Trip signal for phase B - used as a command to drive trip B output contact(s). Takes the output from the internal trip conversion logic

Trip signal for phase C - used as a command to drive trip C output contact(s). Takes the output from the internal trip conversion logic

Trip Output B

Trip Output C

Trip signal for CB1 phase A - used as a command to drive CB1 trip A output contact(s). Takes the output from the internal trip conversion logic

CB1 Trip OutputA

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-20 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

524

525

526

526

527

528

529

529

530

531

532

533

533

534

535

Source Description English Text

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Trip signal for CB1 phase B - used as a command to drive CB1 trip B output contact(s). Takes the output from the internal trip conversion logic

CB1 Trip OutputB

Trip signal for CB1 phase C - used as a command to drive CB1 trip C output contact(s). Takes the output from the internal trip conversion logic

CB1 Trip OutputC

Trip signal for 3ph - used as a command to drive trip 3ph output contact(s). Takes the output from the internal trip conversion logic

Trip 3ph

Trip signal for CB1 3ph - used as a command to drive CB1 trip 3ph output contact(s). Takes the output from the internal trip conversion logic

CB1 Trip 3ph

2 or 3 phase fault indication - used to flag whether the fault is polyphase. Typically used to control auto-reclose logic, where auto-reclosing is allowed only for single phase faults

2/3 Ph Fault

3 phase fault indication. Typically used to control auto-reclose logic, where autoreclosing is blocked for faults affecting all three phases together

Trip 3 phase - input to trip latching logic

CB1 Trip 3 Phase - Input to Trip Latching

Logic

A phase trip - input to trip conversion logic.

Essential to ensure correct single or three pole trip command results (e.g. converts a 2 pole trip to 3 phase)

B phase trip - input to trip conversion logic.

Essential to ensure correct single or three pole trip command results (e.g. converts a 2 pole trip to 3 phase)

3 Ph Fault

Trip Inputs 3Ph

CB1 Trip I/P 3Ph

Trip Inputs A

Trip Inputs B

C phase trip - input to trip conversion logic.

Essential to ensure correct single or three pole trip command results (e.g. converts a 2 pole trip to 3 phase)

Force any trip which is issued to always be 3 pole (trip conversion - used in single pole trip applications, to signal when single pole tripping and re-closing is either unwanted, or impossible)

External DDB input to host protection trip conversion logic to force 3 Pole tripping of

CB1 for all faults

External trip 3 phase - allows external protection to initiate breaker fail, circuit breaker condition monitoring statistics, and internal auto-reclose (if enabled)

External trip A phase - allows external protection to initiate breaker fail, circuit breaker condition monitoring statistics, and internal auto-reclose (if enabled)

Trip Inputs C

Force 3Pole Trip

Force 3PTrip CB1

External Trip3ph

External Trip A

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-21

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

536

537

534

535

536

537

542

543

544

PSL

PSL

PSL

PSL

PSL

PSL

538

539

540

541

538 to

541

PSL

PSL

545

546 to

549

550

551

552

553

550 to

553

Stability test

Phase

Comparison

PSL

Out Of Step

Tripping

PSL

Out Of Step

Tripping

Out Of Step

Tripping

Source Description English Text

External trip B phase - allows external protection to initiate breaker fail, circuit breaker condition monitoring statistics, and internal auto-reclose (if enabled)

External trip C phase - allows external protection to initiate breaker fail, circuit breaker condition monitoring statistics, and internal auto-reclose (if enabled)

CB1 Ext Trip3ph - signal from external protection to initiate three phase autoreclosing of CB1

CB1 Ext Trip A - signal from external protection to initiate single phase autoreclosing (A Ph) of CB1

CB1 Ext Trip B - signal from external protection to initiate single phase autoreclosing (B Ph) of CB1

CB1 Ext Trip C - signal from external protection to initiate single phase autoreclosing (C Ph) of CB1

External trip 3 phase - allows external protection to initiate breaker 2 fail

External trip A phase - allows external protection to initiate breaker 2 fail

External trip B phase - allows external protection to initiate breaker 2 fail

External trip C phase - allows external protection to initiate breaker 2 fail

External Trip B

External Trip C

CB1 Ext Trip3ph

CB1 Ext Trip A

CB1 Ext Trip B

CB1 Ext Trip C

CB2 Ext Trip3ph

CB2 Ext Trip A

CB2 Ext Trip B

CB2 Ext Trip C

Unused Unused

Setting group selector X1 (low bit)-selects

SG2 if only DDB 542 signal is active.

SG1 is active if both DDB 542 & DDB 543=0

SG4 is active if both DDB 542 & DDB 543=1

SG Select x1

Setting group selector 1X (high bit)-selects

SG3 if only DDB 543 is active.

SG1 is active if both DDB 542 & DDB 543=0

SG4 is active if both DDB 542 & DDB 543=1

SG Select 1x

To reset all statistics values cumulated on the relay. If mapped, the input for this signal could come from a command of the remote end (DDB 1020 - clear stats cmd -) via IM64

Clear Statistics

Unused Unused

Unused Unused

Block predictive out of step tripping command Inh Pred. OST

Predictive out of step trip

Block out of step tripping command

Out of step trip

Pred. OST

Inhibit OST

OST

Unused Unused

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-22 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

557

558

580

580

581

581

582

583

584

DDB

No

554

555

554 to

555

556

559

560

561

556 to

561

562

563 to

566

567 to

570

571 to

574

575

576

576

577

578

579

Source Description English Text

Out Of Step

Tripping

Out Of Step

Tripping

Out Of Step

Tripping

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

PSL

PSL

Neg Sequence overcurrent

Neg Sequence overcurrent

Phase comparison

Commissioning

Test

Commissioning

Test

Commissioning

Test

Commissioning

Test

Commissioning

Test

Autoreclose

Autoreclose

Autoreclose

Autoreclose

C Diff

C Diff

C Diff

Positive sequence impedance is detected in

Z5

Positive sequence impedance is detected in

Z6

Start Z5

Start Z6

Unused Unused

Level detector Current No Volts (CNV) exceeded

Trip on Reclose trip due to Current No Volts

(CNV) level detectors

Switch on to Fault trip due to Current No

Volts (CNV) level detectors

Phase A Fast Overvoltage level detector used by Current No Volts (CNV)

Phase B Fast Overvoltage level detector used by Current No Volts (CNV)

Phase C Fast Overvoltage level detector used by Current No Volts (CNV)

CNV ACTIVE

TOR Trip CNV

SOTF Trip CNV

Fast OV PHA

Fast OV PHB

Fast OV PHC

Unused Unused

Inhibit Neg Sequence overcurrent protection I2> Inhibit

Block Neg Sequence overcurrent stage 1 time delayed trip to

Block Neg Sequence overcurrent stage 4 time delayed trip

I2>1 Tmr Blk to

I2>4 Tmr Blk

1st stage Neg Sequence overcurrent start to

4th stage Neg Sequence overcurrent start

I2>1 Start to to

I2>4 Start

1st stage Neg Sequence overcurrent trip to

4th stage Neg Sequence overcurrent trip

I2>1 Trip to

I2>4 Trip

Unused Unused

Auto-reclose trip test cycle in progress.

Indication that a manually-initiated test cycle is in progress

AR Trip Test

Autoreclose trip test AR Trip Test

Auto-reclose trip test A phase. Indication that a manually-initiated test cycle is in progress AR Trip Test A

Auto-reclose trip test B phase. Indication that a manually-initiated test cycle is in progress AR Trip Test B

Auto-reclose trip test C phase. Indication that a manually-initiated test cycle is in progress AR Trip Test C

Initiate 3 phase auto-reclose (signal to an external re-closer)

Unused

Block Autoreclose

Unused

Current differential trip

Current differential A phase trip

Current differential B phase trip

AR Init 3Ph

Unused

Block AR

Unused

Diff Trip

Diff Trip A

Diff Trip B

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-23

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

597 to

600

601 to

604

605

606

607

585

586

587

588

589

590

591

592

593 to

596

608

609

610

611

612

613

614

615

616

617

618

619

620

621

622

623

C Diff

C Diff

C Diff

C Diff

C Diff

C Diff

C Diff

PSL

PSL

Source

SW

SW

SW

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Description

Current differential C phase trip

Current differential intertrip

Current differential A phase intertrip

Current differential B phase intertrip

Current differential C phase intertrip

Permissive intertrip

Stub bus trip

Inhibit df/dt protection

Block df/dt Stage 1 Timer to

Block df/dt Stage 4 Timer

Invalid IEC 61850 Configuration Alarm

Test Mode Activated Alarm

Contacts Blocked Alarm

Zone 1 Trip

Zone 1 A Phase Trip

Zone 1 B Phase Trip

Zone 1 C Phase Trip

Zone 1 N Trip

Zone 2 Trip

Zone 2 A Phase Trip

Zone 2 B Phase Trip

Zone 2 C Phase Trip

Zone 2 N Trip

Zone 3 Trip

Zone 3 A Phase Trip

Zone 3 B Phase Trip

Zone 3 C Phase Trip

Zone 3 N Trip

Zone P Trip

Zone 2 B Trip

Zone 2 C Trip

Zone 2 N Trip

Zone 3 Trip

Zone 3 A Trip

Zone 3 B Trip

Zone 3 C Trip

Zone 3 N Trip

Zone P Trip

English Text

Diff Trip C

Diff InterTrip

Diff InterTrip A

Diff InterTrip B

Diff InterTrip C

Perm InterTrip

Stub Bus Trip df/dt> Inhibit df/dt>1 Tmr Blk to df/dt>4 Tmr Blk df/dt>1 Start to df/dt>4 Start df/dt>1 Trip to df/dt>4 Trip

Invalid Config.

Test Mode Alm

Contacts Blk Alm

Zone 1 Trip

Zone 1 A Trip

Zone 1 B Trip

Zone 1 C Trip

Zone 1 N Trip

Zone 2 Trip

Zone 2 A Trip

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

P543

/

P545

* * *

*

*

*

*

*

*

*

P544

/

P546

*

*

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-24 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

624

625

626

627

628

629

630

631

632

633

634

635

636

637

638

639

608 to

632

633 to

639

640

640

641

642

643

644

645

Source Description English Text

Distance Basic

Scheme

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Zone P A Phase Trip

Zone P B Phase Trip

Zone P C Phase Trip

Zone P N Trip

Zone 4 Trip

Zone 4 A Phase Trip

Zone 4 B Phase Trip

Zone 4 C Phase Trip

Zone 4 N Phase Trip

Aided channel scheme 1 trip A phase

Aided channel scheme 1 trip B phase

Aided channel scheme 1 trip C phase

Aided channel scheme 1 trip involving ground

(N)

Aided scheme 1 weak infeed trip phase A

Aided scheme 1 weak infeed trip phase B Aid 1 WI Trip B

Aided scheme 1 weak infeed trip phase C Aid 1 WI Trip C

Unused

Unused

Aided scheme 1 Delta directional Trip 3

Phase

Unused

Zone P A Trip

Zone P B Trip

Zone P C Trip

Zone P N Trip

Zone 4 Trip

Zone 4 A Trip

Zone 4 B Trip

Zone 4 C Trip

Zone 4 N Trip

Aided 1 Trip A

Aided 1 Trip B

Aided 1 Trip C

Aided 1 Trip N

Aid 1 WI Trip A

Unused

Aid1 Delta Tr3Ph

Unused

Aided 1 directional earth fault scheme trip 3 phase

Aided channel scheme 1 - weak infeed logic trip 3 phase

Aid1 DEF Trip3Ph

Aid1 WI Trip 3Ph

Aided channel scheme 2 trip A phase Aided 2 Trip A

Aided channel scheme 2 trip B phase

Aided channel scheme 2 trip C phase

Unused

Aided 2 Trip B

Aided 2 Trip C

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-25

(PL) 8 Programmable Logic

DDB

No

Source

654

666

667

668

669

662

663

664

665

670

655

656

657

658

659

660

661

671

646

647

648

649

641 to

649

650

650

651

652

651 to

652

653

654

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Loss of Load

Logic

Loss of Load

Logic

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Earth Fault

672

673

Earth Fault

Earth Fault

Description English Text

Aided channel scheme 2 trip involving ground

(N)

Aided 2 Trip N

Aided scheme 2 weak infeed trip phase A Aid 2 WI Trip A

Aided scheme 2 weak infeed trip phase B Aid 2 WI Trip B

Aided scheme 2 weak infeed trip phase C Aid 2 WI Trip C

Unused

Aided scheme 2 Delta directional Trip 3

Phase

Unused

Unused

Aid2 Delta Tr3Ph

Unused

Aided 2 directional earth fault scheme trip 3 phase

Aided channel scheme 2 - weak infeed logic trip 3 phase

Aid2 DEF Trip3Ph

Aid2 WI Trip 3Ph

Unused

Unused

Loss of Load Trip

Unused

Unused

Loss ofLoad Trip

Unused Unused

1st stage phase overcurrent trip 3 phase I>1 Trip

1st stage phase overcurrent trip phase A I>1 Trip A

1st stage phase overcurrent trip phase B I>1 Trip B

1st stage phase overcurrent trip phase C I>1 Trip C

2nd stage phase overcurrent trip 3 phase I>2 Trip

2nd stage phase overcurrent trip phase A I>2 Trip A

2nd stage phase overcurrent trip phase B I>2 Trip B

2nd stage phase overcurrent trip phase C I>2 Trip C

3rd stage phase overcurrent trip 3 phase I>3 Trip

3rd stage phase overcurrent trip phase A I>3 Trip A

3rd stage phase overcurrent trip phase B I>3 Trip B

3rd stage phase overcurrent trip phase C

4th stage phase overcurrent trip 3 phase

4th stage phase overcurrent trip phase A

4th stage phase overcurrent trip phase B

I>3 Trip C

I>4 Trip

I>4 Trip A

I>4 Trip B

4th stage phase overcurrent trip phase C

1st stage stand by earth fault (SBEF) protection trip

2nd stage stand by earth fault (SBEF) protection trip

3rd stage stand by earth fault (SBEF) protection trip

I>4 Trip C

IN>1 Trip

IN>2 Trip

IN>3 Trip

Page (PL) 8-26

Description of Logic Nodes

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5

Description of Logic Nodes

678

679

689

690

691

692

693

685

686

687

688

680

681

682

683

684

694

695

696

697

698

699

700

701

702

703

704 to

707

708

DDB

No

674

675

676

677

699

Source Description English Text

Earth Fault

SEF

SEF

SEF

SEF

Broken

Conductor

Broken Conductor Trip

Thermal overload Thermal Overload Trip

SEF

Undervoltage

Undervoltage

Unused

Restricted earth fault (REF) protection trip

Undervoltage stage 1, three phase trip

Undervoltage stage 1 A/AB phase trip

Broken Wire Trip

Thermal Trip

Unused

IREF> Trip

V<1 Trip

V<1 Trip A/AB

Undervoltage

Undervoltage

Undervoltage

Undervoltage

Undervoltage

Undervoltage

Overvoltage

Overvoltage

Overvoltage

Undervoltage stage 1 B/BC phase trip

Undervoltage stage 1 C/CA phase trip

Undervoltage stage 2, three phase trip

Undervoltage stage 2 A/AB phase trip

Undervoltage stage 2 B/BC phase trip

Undervoltage stage 2 C/CA phase trip

Overvoltage stage 1, three phase trip

Overvoltage stage 1 A/AB phase trip

Overvoltage stage 1 B/BC phase trip

V<1 Trip B/BC

V<1 Trip C/CA

V<2 Trip

V<2 Trip A/AB

V<2 Trip B/BC

V<2 Trip C/CA

V>1 Trip

V>1 Trip A/AB

V>1 Trip B/BC

Overvoltage

Overvoltage

Overvoltage

Overvoltage

Overvoltage

Pole discrepency

4th stage stand by earth fault (SBEF) protection trip

1st stage sensitive earth fault (SEF) protection trip

2nd stage sensitive earth fault (SEF) protection trip

3rd stage sensitive earth fault (SEF) protection trip

4th stage sensitive earth fault (SEF) protection trip

Overvoltage stage 1 C/CA phase trip

Overvoltage stage 2, three phase trip

Overvoltage stage 2 A/AB phase trip

Overvoltage stage 2 B/BC phase trip

Overvoltage stage 2 C/CA phase trip

Pole discrepancy signal to force a three pole trip conversion, if the relay detects one pole dead, and no auto-reclose in progress

IN>4 Trip

ISEF>1 Trip

ISEF>2 Trip

ISEF>3 Trip

ISEF>4 Trip

V>1 Trip C/CA

V>2 Trip

V>2 Trip A/AB

V>2 Trip B/BC

V>2 Trip C/CA

Pole Discrepancy

Pole Discrep.CB1

Residual overvoltage

Residual overvoltage

PSL

Neg Sequence overcurrent

Trip on Close

Trip on Close

Residual overvoltage stage 1 trip

Residual overvoltage stage 2 trip

Trigger for Fault Recorder

Unused

TOR trip zone 1 (trip on reclose) to

TOR Trip Zone 4

TOR Trip Zone P

VN>1 Trip

VN>2 Trip

Fault REC TRIG

Unused

TOR Trip Zone 1 to

TOR Trip Zone 4

TOR Trip Zone P

*

*

*

*

(PL) 8 Programmable Logic

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-27

(PL) 8 Programmable Logic Description of Logic Nodes

716

736

737

738

739

740

717 to

719

720

721

722

723 to

727

728 to

735

741

DDB

No

709 to

712

713

704 to

713

714

715

Trip on Close

SW

SW

Phase comparison

SW

Source

Trip on Close

Trip on Close

742

743

744

745

746

747

748

749

750

751

752

753

PSL

PSL

Phase

Comparison

SW

PSL

C Diff

C Diff

C Diff

C Diff

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

SOTF trip zone 1 (switch on to fault) to

SOTF Trip Zone 4

SOTF Trip Zone P

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Description

Unused

Any Start

Current differential start

Current differential A phase start

Current differential B phase start

Current differential C phase start

Zone 1 A Phase Start

Zone 1 B Phase Start

Zone 1 C Phase Start

Zone 1 ground element start

Zone 2 A Phase Start

Zone 2 B Phase Start

Zone 2 C Phase Start

Zone 2 ground element start

Zone 3 A Phase Start

Zone 3 B Phase Start

Zone 3 C Phase Start

Zone 3 N Start

Zone P A Phase Start

English Text

SOTF Trip Zone 1 to

SOTF Trip Zone 4

SOTF Trip Zone P

Unused

Unused

Unused

Unused

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

Unused

Unused

Unused

Unused

Unused

Unused

Any Start

IDiff>Start

IDiff>Start A

IDiff>Start B

IDiff>Start C

Zone 1 A Start

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Zone 1 B Start

Zone 1 C Start

Zone 1 N Start

Zone 2 A Start

Zone 2 B Start

Zone 2 C Start

Zone 2 N Start

Zone 3 A Start

Zone 3 B Start

Zone 3 C Start

Zone 3 N Start

Zone P A Start

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-28 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

754

755

756

757

758

759

760

769

770

771

772

764

765

766

767

768

773

774

775

776

741 to

760

761

762

763

777

778

779

780

781

782

783

784

Source Description

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Overcurrent

Earth Fault

Zone P B Phase Start

Zone P C Phase Start

Zone P N Start

Zone 4 A Phase Start

Zone 4 B Phase Start

Zone 4 C Phase Start

Zone 4 N Start

Earth Fault

Earth Fault

Earth Fault

SW

SW

SW

SW

Unused

1st stage overcurrent start 3 phase

1st stage overcurrent start phase A

1st stage overcurrent start phase B

1st stage overcurrent start phase C

2nd stage overcurrent start 3 phase

2nd stage overcurrent start phase A

2nd stage overcurrent start phase B

2nd stage overcurrent start phase C

3rd stage overcurrent start 3 phase

3rd stage overcurrent start phase A

3rd stage overcurrent start phase B

3rd stage overcurrent start phase C

4th stage overcurrent start 3 phase

4th stage overcurrent start phase A

4th stage overcurrent start phase B

4th Stage overcurrent start phase C

1st stage stand by earth fault (SBEF) overcurrent start

2nd stage stand by earth fault (SBEF) overcurrent start

3rd stage stand by earth fault (SBEF) overcurrent start

4th stage stand by earth fault (SBEF) overcurrent start

1st stage sensitive earth fault (SEF) overcurrent start

2nd stage sensitive earth fault (SEF) overcurrent start

3rd stage sensitive earth fault (SEF) overcurrent start

4th stage sensitive earth fault (SEF) overcurrent start

Zone P B Start

Zone P C Start

Zone P N Start

Zone 4 A Start

Zone 4 B Start

Zone 4 C Start

Zone 4 N Start

Unused

I>1 Start

I>1 Start A

I>1 Start B

I>1 Start C

I>2 Start

I>2 Start A

I>2 Start B

I>2 Start C

I>3 Start

I>3 Start A

I>3 Start B

I>3 Start C

I>4 Start

I>4 Start A

I>4 Start B

I>4 Start C

IN>1 Start

IN>2 Start

IN>3 Start

IN>4 Start

ISEF>1 Start

ISEF>2 Start

ISEF>3 Start

ISEF>4 Start

English Text

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-29

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

796

797

798

799

792

793

794

795

800

801

802

803

785

786

787

788

789

790

791

804

805

806

807 to

828

829

830

831

832

833

834

835

Source Description English Text

Thermal overload Thermal Overload Alarm

Unused

Unused

Undervoltage

Undervoltage

Undervoltage

Undervoltage

Undervoltage stage 1, three phase start

Undervoltage stage 1, A phase start

Undervoltage stage 1, B phase start

Undervoltage stage 1, C phase start

Undervoltage

Undervoltage

Undervoltage

Undervoltage

Overvoltage

Overvoltage

Overvoltage

Overvoltage

Undervoltage stage 2, three phase start

Undervoltage stage 2, A phase start

Undervoltage stage 2, B phase start

Undervoltage stage 2, C phase start

Overvoltage stage 1, three phase start

Overvoltage stage 1, A phase start

Overvoltage stage 1, B phase start

Overvoltage stage 1, C phase start

Overvoltage

Overvoltage

Overvoltage

Overvoltage

Residual overvoltage

Residual overvoltage

Neg Sequence overcurrent

Phase

Comparison

Overvoltage stage 1, C phase start

Overvoltage stage 2, A phase start

Overvoltage stage 2, B phase start

Overvoltage stage 2, C phase start

Residual overvoltage stage 1 start

Residual overvoltage stage 2 start

Unused

Unused

Poledead

Poledead

Poledead

VT Supervision

VT Supervision

CB Fail

CB Fail

VN>1 Start

VN>2 Start

Unused

Unused

Phase A undervoltage level detector used in the pole dead logic. Detectors have a fixed threshold: undervoltage pickup 38.1 V-drop off 43.8 V

Phase B undervoltage level detector used in the pole dead logic. Detectors have a fixed threshold: undervoltage pickup 38.1 V-drop off 43.8 V

Phase C undervoltage level detector used in the pole dead logic. Detectors have a fixed threshold: undervoltage pickup 38.1 V-drop off 43.8 V

VT supervision fast block - blocks elements which would otherwise maloperate immediately a fuse failure event occurs

VA< start

VB< start

VC< start

VTS Fast Block

VT supervision slow block - blocks elements which would otherwise maloperate some time after a fuse failure event occurs

VTS Slow Block tBF1 trip 3Ph - three phase output from circuit breaker failure logic, stage 1

CBfail1 Trip 3ph tBF2 trip 3Ph - three phase output from circuit breaker failure logic, stage 2

CBfail2 Trip 3ph

Thermal Alarm

Unused

Unused

V<1 Start

V<1 Start A/AB

V<1 Start B/BC

V<1 Start C/CA

V<2 Start

V<2 Start A/AB

V<2 Start B/BC

V<2 Start C/CA

V>1 Start

V>1 Start A/AB

V>1 Start B/BC

V>1 Start C/CA

V>2 Start

V>2 Start A/AB

V>2 Start B/BC

V>2 Start C/CA

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

P543

/

P545

* * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-30 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

839

838

839

840

841

840

841

842

842

843

844

844

845

845

837

836

837

838

DDB

No

834

835

836

Source

CB Fail

CB Fail

CB Fail

CB Fail

CB Fail

CB Fail

CB Control

CB Control

CB Control

CB Control

CB Control

CB Control

CB Control

CB Control

CB Control

CB Control

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Description English Text

CBfail1 Trip 3ph

CBfail2 Trip 3ph tBF1 trip 3Ph - three phase output from circuit breaker failure 2 logic, stage 1

CB2 Fail1 Trip tBF2 trip 3Ph - three phase output from circuit breaker failure 2 logic, stage 2

CB2 Fail2 Trip

Unused

Unused

Control trip - operator trip instruction to the circuit breaker, via menu, or SCADA. (Does not operate for protection element trips)

CB1 Fail1 Trip

CB1 Fail2 Trip

Unused

Unused

Control Trip

Control close command to the circuit breaker.

Operates for a manual close command

(menu, SCADA), and additionally is driven by the auto-reclose close command

Control Close

Control trip - operator trip instruction to circuit breaker 1, via menu, or SCADA. (Does not operate for protection element trips)

Control TripCB1

Control close command to circuit breaker 1.

Operates for a manual close command

(menu, SCADA), and additionally is driven by the auto-reclose close command

Control CloseCB1

Control trip - operator trip instruction to circuit breaker 2, via menu, or SCADA. (Does not operate for protection element trips)

Control TripCB2

Control close command to circuit breaker 2.

Operates for a manual close command

(menu, SCADA), and additionally is driven by the auto-reclose close command

Control CloseCB2

Unused

Unused

Unused

Unused

Control close in progress - the relay has been given an instruction to close the circuit breaker, but the manual close timer delay has not yet finished timing out

Close in Prog

Control Close in Progress CB1 Close inProg

AR Block Main Protection. In P841 etc, there is no specific output DDB to block selected protection functions. If such a feature is required for a particular application, appropriate mapping should be created in

PSL, using output DDBs from sequence counter, single phase dead time and three phase dead time logic as required.

Block Main Prot

Auto-reclose 3 pole in progress (dead time is running)

AR 3pole in prog

CB1 Auto Reclose/(AR 3 pole) in Progress CB1 AR 3p InProg

Single pole auto-reclose in progress (dead time is running)

CB1 AR 1pole in progress

AR 1pole in prog

CB1 AR 1p InProg

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-31

(PL) 8 Programmable Logic Description of Logic Nodes

855

855

856

DDB

No

846

847

848

849

850

851

852

852

853

853

854

854

857

Source

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Description English Text

Auto-reclose sequence counter is at zero - no previous faults have been cleared within recent history. The sequence count is at zero because no reclaim times are timing out, and the auto-recloser is not locked out. The recloser is awaiting the first protection trip, and all programmed cycles are free to follow

Seq Counter = 0

The first fault trip has happened in a new auto-reclose sequence. Dead time 1, or reclaim time 1 are in the process of timing out

Seq Counter = 1

Auto-reclose sequence counter is at 2. This means that the initial fault trip happened, and then another trip followed, moving the counter on to 2

Auto-reclose sequence counter is at 3. This means that the initial fault trip happened, and then 2 trips followed, moving the counter on to 3

Seq Counter = 2

Seq Counter = 3

Auto-reclose sequence counter is at 4. This means that the initial fault trip happened, and then 3 trips followed, moving the counter on to 4

Seq Counter = 4

Seq Counter = 5 (In 2CB AR, there is no output specifically for seq counter = 5.

However there is a DDB output for Seq

Counter > 4. may need a different allocation for DDB#851 in 2CB AR scheme.

Seq Counter = 5

This signal is set when CB has successfully completed a three phase autoreclose cycle. CB Succ 3P AR

This signal is set when CB1 has successfully completed a three phase autoreclose cycle. CB1 Succ 3P AR

2CB logic provides separate output DDBs indicating (i) single phase dead time in progress, (ii) three phase dead time in progress (all shots), (iii) 3 ph 1st shot dead time in progress, (iv) 3 ph 2nd shot dead time in progress, (v) 3 ph 3rd shot dead time in progress, (vi) 3 ph 4th shot dead time in progress.

3P Dead Time IP

Unused Unused

Auto-reclose command to the circuit breaker Auto Close

This is a signal issued by the autoreclose logic to the general CB1 Control logic when the conditions to autoreclose CB1 are satisfied (dead time complete, CB healthy etc).

Auto Close CB1

Single pole auto-reclose in progress (dead time is running) CB2

Unused

3 Pole auto-recloser in service - the autoreclose function has been enabled either in the relay menu, or by an opto input

Single pole auto-recloser in service - the auto-reclose function has been enabled either in the relay menu, or by an opto input

CB2 AR 1p InProg

Unused

A/R Status 3P

A/R Status 1P

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-32 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

861

862

863

DDB

No

858

858

859

860

860

864

865

866

867

868

869

870

871

Source Description English Text

Autoreclose

Autoreclose

Autoreclose

CB Control

CB Control

C Diff

Composite Lockout Alarm - circuit breaker locked out due to auto-recloser, or condition monitioring

Instantaneous GPS Alarm initiated immediately on loss of the GPS 1 pulse per second input signal

IRIG-B Inmon IRIG-B Status Signal Valid

Unused

Undercurrent

Undercurrent

Undercurrent

Undercurrent

Undercurrent

B phase undercurrent level detector pickup

(detects low current in CT1). It is used for breaker failure in models with two CT inputs

CB1 LO Alarm

GPSAlarm Instant

IRIG-B Valid

Unused

A phase undercurrent level detector pickup

(detects low current). It is used for breaker failure in models with one CT input and also it is used for fault record reset (as the sum

CTs in models with two CTs)

IA< Start

B phase undercurrent level detector pickup

(detects low current). It is used for breaker failure in models with one CT input and also it is used for fault record reset (as the sum

CTs in models with two CTs)

IB< Start

C phase undercurrent level detector pickup

(detects low current). It is used for breaker failure in models with one CT input and also it is used for fault record reset (as the sum

CTs in models with two CTs)

IC< Start

A phase undercurrent level detector pickup

(detects low current in CT1). It is used for breaker failure in models with two CT inputs

CB1 IA< Start

CB1 IB< Start

Undercurrent

Undercurrent

Undercurrent

Due to the sequence count reached, lockout, or any outage of the internal auto-recloser - this signal instructs any other trips to be forced to three pole trips

This DDB is set when the autoreclose logic has determined that single pole tripping/autoreclosing is not permitted for

CB1. It can be applied in PSL when required to force trip conversion logic for internal and/or external protection to three phase trip mode for CB1.

It indicates that AR has been blocked (ex. from external input BAR)

Composite lockout alarm - circuit breaker locked out due to auto-recloser, or condition monitoring reasons

AR Force 3 pole

AR Force CB1 3P

AR Blocked

Lockout Alarm

C phase undercurrent level detector pickup

(detects low current in CT1). It is used for breaker failure in models with two CT inputs

A phase undercurrent level detector pickup

(detects low current in CT2). It is used for breaker failure in models with two CT inputs

B phase undercurrent level detector pickup

(detects low current in CT2). It is used for breaker failure in models with two CT inputs

CB1 IC< Start

CB2 IA< Start

CB2 IB< Start

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-33

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

881

882

883

884

872

867 to

872

873

874

875

876

877

878

879

876

877 to

879

880

880

881

882

883

Undercurrent

C phase undercurrent level detector pickup

(detects low current in CT2). It is used for breaker failure in models with two CT inputs

CB2 IC< Start

Undercurrent Unused Unused

Undercurrent

Undercurrent

Undercurrent

Zone 1 Extension

Scheme

Trip on Close

Trip on Close

SEF undercurrent level detector pickup

(detects low current in CT SEF)

Unused

Unused

Zone 1 extension active - zone 1 is operating in its reach extended mode

Trip on close functions (either SOTF or TOR) active. These elements are in-service for a period of time following circuit breaker closure

Trip on re-close protection is active - indicated TOC delay timer has elapsed after circuit breaker opening, and remains inservice on auto-reclosure for the duration of the trip on close window

ISEF< Start

Unused

Unused

Z1X Active

TOC Active

TOR Active

Trip on Close

Switch on to fault protection is active - in service on manual breaker closure, and then remains in-service for the duration of the trip on close window

Zone 1 Extension

Scheme

Unused

SOTF Active

Unused

Trip on Close

Check sync

PSL

PSL

Check sync

Check sync

Check sync

PSL

PSL

Check sync

Unused Unused

System checks inactive (output from the check synchronism, and other voltage checks)

Check sync. stage 1 enabled

Check sync. stage 2 enabled

SysChks Inactive

CS1 Enabled

CS2 Enabled

Check sync. stage 1 OK

Check sync. stage 2 OK

Check Sync 1 OK

Check Sync 2 OK

Output from CB1 system check logic: indicates system checks for CB1 are disabled

(setting "System Checks CB1" = Disabled or global setting "System Checks" =

Disabled)+D2269

SChksInactiveCB1

DDB input must be high to enable CB1check sync 1 logic to operate. Defaults to high if not mapped in PSL; if mapped in PSL must be driven high.

DDB input must be high to enable CB1check sync 2 logic to operate. Defaults to high if not mapped in PSL; if mapped in PSL must be driven high.

Output from CB1 Check Sync logic, when enabled: indicates set conditions for CB1 sync check type 1 are satisfied.

CB1 CS1 Enabled

CB1 CS2 Enabled

CB1 CS1 OK

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-34 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

886

887

899

909

910

903

904

905

906

907

908

905

900

901

901

902

903

904

890

891

892

893

894

895

896

897

DDB

No

884

885

886

887

888

889

898

Source

Check sync

PSL

Voltage

Monitoring

Voltage

Monitoring

Voltage

Monitoring

Voltage

Monitoring

Voltage

Monitoring

Voltage

Monitoring

Description

Output from CB1 Check Sync logic, when enabled: indicates set conditions for CB1 sync check type 2 are satisfied.

Unused

Indicates live bus condition is detected

Indicates dead bus condition is detected

Indicates Bus 1 input is live, i.e. voltage >= setting "Live Bus 1"

Indicates Bus 1 input is dead, i.e. voltage < setting "Dead Bus 1"

Indicates live line condition is detected

Indicates dead line condition is detected

English Text

CB1 CS2 OK

Unused

Live Bus

Dead Bus

Live Bus 1

Dead Bus 1

Live Line

Dead Line

All Poles Dead

Any Pole Dead

Poledead logic Phase A Pole Dead

Poledead logic Phase B Pole Dead

Poledead logic Phase C Pole Dead

Fixed Logic

Fixed Logic

Accelerate Ind

Any Voltage Dependent

PSL

PSL

PSL

PSL

PSL

Input to the auto-reclose logic to indicate system in synchronism

Input to the circuit breaker control logic to indicate manual check synchronization conditions are satisfied

Input to the auto-reclose logic to indicate system checks conditions are satisfied

External check-sync is OK for CB1

External check-sync is OK for CB2

PSL

PSL

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

Pole Dead A

Pole Dead B

Pole Dead C

VTS Acc Ind

VTS Volt Dep

AR Check Sync OK

Ctl Check Sync

AR Sys Checks OK

Unused

Unused

Circuit breaker is open, all three phases

Circuit breaker A phase is open

CB1 Ext CS OK

CB2 Ext CS OK

Unused

Unused

CB Open 3 ph

CB Open A ph

Circuit breaker B phase is open

Circuit breaker C phase is open

CB Open B ph

CB Open C ph

Circuit breaker is closed, all three phases CB Closed 3 ph

Circuit breaker A phase is closed CB Closed A ph

CB Status

CB Status

CB Status

CB Status

CB Status

Circuit breaker B phase is closed

Circuit breaker C phase is closed

CB1 Open 3 ph

CB1 Open A ph

CB1 Open B ph

CB Closed B ph

CB Closed C ph

CB1 Open 3 ph

CB1 Open A ph

CB1 Open B ph

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-35

(PL) 8 Programmable Logic Description of Logic Nodes

923

924

925

926

927

928

929

930

931

932

932

933

934

DDB

No

913

914

915

916

917

918

911 to

918

906

907

908

909

910

911

912

Source

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

CB Status

919 PSL

920 PSL

921

922

PSL

PSL

Overvoltage

Overvoltage

Overvoltage

Overvoltage

Description English Text

CB1 Open C ph

CB1 Closed 3 ph

CB1 Closed A ph

CB1 Open C ph

CB1 Closed 3 ph

CB1 Closed A ph

CB1 Closed B ph

CB1 Closed C ph

CB1 Closed B ph

CB1 Closed C ph

Circuit breaker 2 is open, all three phases CB2 Open 3 ph

Circuit breaker 2 A phase is open CB2 Open A ph

Circuit breaker 2 A phase is open

Circuit breaker 2 A phase is open

CB2 Open B ph

CB2 Open C ph

Circuit breaker 2 is closed, all three phases CB2 Closed 3 ph

Circuit breaker 2 A phase is closed CB2 Closed A ph

Circuit breaker 2 B phase is closed

Circuit breaker 2 C phase is closed

CB2 Closed B ph

CB2 Closed C ph

Unused Unused

Inhibit the first stage compensated overvoltage element

Inhibit the second stage compensated overvoltage element

Block the first stage compensated overvoltage element

Block the second stage compensated overvoltage element

1st stage compensated overvoltage start signal

2nd stage compensated overvoltage start signal

1st stage compensated overvoltage trip signal

2nd stage compensated overvoltage trip signal

Unused

Standard or differential CT supervision block

(current transformer supervision)

Inhibit Cmp V1>1

Inhibit Cmp V1>2

Cmp V1>1 Tim Blk

Cmp V1>2 Tim Blk

V1>1 Cmp Start

V1>2 Cmp Start

V1>1 Cmp Trip

V1>2 Cmp Trip

Unused

CTS Block

CTS Block Diff

CT Supervision Unused

CTS Restrain

CT1 L i1>

CT2 L i1>

Unused

CT1 R1 i1>

CT2 R1 i1>

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

P543

/

P545

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-36 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

937

938

938

939

DDB

No

935

936

Source

CT Supervision Unused

Description English Text

CT1 R2 i1>

CT2 R2 i1>

CT1 L i2/i1>

CT2 L i2/i1>

Unused

CT1 R1 i2/i1>

940

941

942

CT2 R1 i2/i1>

CT1 R2 i2/i1>

CT2 R2 i2/i1>

943

944

944

945

946

947

948

949 to

951

952 PSL

953

954

955

956

957

CT Supervision Unused

PSL

PSL

PSL

PSL

PSL

CT1 L i2/i1>>

CT2 L i2/i1>>

Unused

CT1 R1 i2/i1>>

CT2 R1 i2/i1>>

CT1 R2 i2/i1>>

CT2 R2 i2/i1>>

Unused Unused

Faulted phase A - must be assigned, as this sets the start flag used in records, and on the

LCD display

Faulted Phase A

Faulted phase B - must be assigned, as this sets the start flag used in records, and on the

LCD display

Faulted phase C - must be assigned, as this sets the start flag used in records, and on the

LCD display

Faulted phase N (fault involves ground) - must be assigned, as this sets the start flag used in records, and on the LCD display

Started phase A - must be assigned, as this sets the start flag used in records, and on the

LCD display

Faulted Phase B

Faulted Phase C

Faulted Phase N

Started Phase A

Started phase B - must be assigned, as this sets the start flag used in records, and on the

LCD display

Started Phase B

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-37

(PL) 8 Programmable Logic Description of Logic Nodes

965

966

967

968

969

970

971

972

960

961

962

963

964

979

980

981

973

974

975

976

977

978

DDB

No

958

959

PSL

PSL

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Source Description English Text

Started phase C - must be assigned, as this sets the start flag used in records, and on the

LCD display

Started phase N (fault involves ground) - must be assigned, as this sets the start flag used in records, and on the LCD display

Started Phase C

Started Phase N

Zone 1 AN ground fault element Zone1 AN Element

Zone 1 BN ground fault element

Zone 1 CN ground fault element

Zone 1 AB phase fault element

Zone 1 BC phase fault element

Zone1 BN Element

Zone1 CN Element

Zone1 AB Element

Zone1 BC Element

Zone 1 CA phase fault element

Zone 2 AN ground fault element

Zone 2 BN ground fault element

Zone 2 CN ground fault element

Zone 2 AB phase fault element

Zone 2 BC phase fault element

Zone 2 CA phase fault element

Zone 3 AN ground fault element

Zone1 CA Element

Zone2 AN Element

Zone2 BN Element

Zone2 CN Element

Zone2 AB Element

Zone2 BC Element

Zone2 CA Element

Zone3 AN Element

Zone 3 BN ground fault element

Zone 3 CN ground fault element

Zone 3 AB phase fault element

Zone 3 BC phase fault element

Zone 3 CA phase fault element

Zone P AN ground fault element

Zone P BN ground fault element

Zone P CN ground fault element

Zone P AB phase fault element

Zone3 BN Element

Zone3 CN Element

Zone3 AB Element

Zone3 BC Element

Zone3 CA Element

ZoneP AN Element

ZoneP BN Element

ZoneP CN Element

ZoneP AB Element

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

* *

P543

/

P545

*

P544

/

P546

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-38 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

982

983

984

985

986

987

988

989

960 to

989

990 to

991

992 to

995

996

997

996

997

998

999

1000

1001

1002

1003

1004

1005

1006

1007

Source Description

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Zone P BC phase fault element

Zone P CA phase fault element

Zone 4 AN ground fault element

Zone 4 BN ground fault element

Zone 4 CN ground fault element

Zone 4 AB phase fault element

Zone 4 BC phase fault element

Zone 4 CA phase fault element

Unused

Unused

PSL

Directional Earth

Fault

Directional Earth

Fault

Directional Earth

Fault

Directional Earth

Fault

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

Delta directional

Element

PSL Group Sig. 1 to

PSL Group Sig. 4

DEF forward (directional earth fault aided scheme detector)

DEF reverse (directional earth fault aided scheme detector)

Unused

Unused

Delta directional scheme forward AN detection

Delta directional scheme forward BN detection

Delta directional scheme forward CN detection

Delta directional scheme forward AB detection

Delta directional scheme forward BC detection

Delta directional scheme forward CA detection

Delta directional scheme reverse AN detection

Delta directional scheme reverse BN detection

Delta directional scheme reverse CN detection

Delta directional scheme reverse AB detection

Delta Dir FWD AN

Delta Dir FWD BN

Delta Dir FWD CN

Delta Dir FWD AB

Delta Dir FWD BC

Delta Dir FWD CA

Delta Dir Rev AN

Delta Dir Rev BN

Delta Dir Rev CN

Delta Dir Rev AB

English Text

ZoneP BC Element

ZoneP CA Element

Zone4 AN Element

Zone4 BN Element

Zone4 CN Element

Zone4 AB Element

Zone4 BC Element

Zone4 CA Element

Unused *

Unused

PSL Group Sig 1 to to

PSL Group Sig 4

DEF Forward

*

*

DEF Reverse

Unused

Unused

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-39

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1008

Delta directional

Element

Delta directional scheme reverse BC detection

1009

998 to

1009

Delta directional

Element

Delta directional

Element

Delta directional scheme reverse CA detection

Unused

1010 Phase Selector Phase selector - phase A pickup

1011 Phase Selector Phase selector - phase B pickup

Delta Dir Rev BC

Delta Dir Rev CA

Unused

1019

1020

1021

Inrush Detector

SW

SW

Phase Select A

Phase Select B

1012 Phase Selector Phase selector - phase C pickup

1013 Phase Selector Phase selector - neutral indication

1014

1015

Powerswing

Blocking

Powerswing

Blocking

Power swing detected

Power swing block fault

1010 to

1013

1014 to

1015

Phase Selector Unused

Powerswing

Blocking

Unused

1016

1017

1018

Inrush Detector

Inrush Detector

Inrush Detector

Phase Select C

Phase Select N

P Swing Detector

PSB Fault

Unused

Unused

2nd harmonic current ratio exceeds threshold on phase A (may be used to block any instantaneous distance elements that reach through the reactance of a power transformer)

Ih(2) Loc Blk A

2nd harmonic current ratio exceeds threshold on phase B (may be used to block any instantaneous distance elements that reach through the reactance of a power transformer)

Ih(2) Loc Blk B

2nd harmonic current ratio exceeds threshold on phase C (may be used to block any instantaneous distance elements that reach through the reactance of a power transformer)

Ih(2) Loc Blk C

2nd harmonic current ratio exceeds threshold on neutral current measurement (may be used to block any instantaneous distance elements that reach through the reactance of a power transformer)

Unused

Ih(2) Loc Blk N

Unused

Indication that remote end phase A is blocked by 2nd harmonic

Ih(2) Rem Blk A

1022 SW

Indication that remote end phase B is blocked by 2nd harmonic

Ih(2) Rem Blk B

1023 SW

Indication that remote end phase C is blocked by 2nd harmonic

1024 Tri LED Red 1 Programmable LED 1 red is energized

Ih(2) Rem Blk C

LED1 Red

1025 Tri LED Green 1 Programmable LED 1 green is energized

1026 Tri LED Red 2 Programmable LED 2 red is energized

1027 Tri LED Green 2 Programmable LED 2 green is energized

1028 Tri LED Red 3 Programmable LED 3 red is energized

1029 Tri LED Green 3 Programmable LED 3 green is energized

LED1 Grn

LED2 Red

LED2 Grn

LED3 Red

LED3 Grn

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-40 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1051

1052

1053

1054

1055

1056

1057

1058

1045

1046

1047

1048

1049

1050

DDB

No

1030

1031

1032

1033

1034

1035

1036

1037

1038

1039

1040

Source Description

Tri LED Red 4 Programmable LED 4 red is energized

Tri LED Green 4 Programmable LED 4 green is energized

Tri LED Red 5 Programmable LED 5 red is energized

Tri LED Green 5 Programmable LED 5 green is energized

Tri LED Red 6 Programmable LED 6 red is energized

Tri LED Green 6 Programmable LED 6 green is energized

Tri LED Red 7 Programmable LED 7 red is energized

Tri LED Green 7 Programmable LED 7 green is energized

Tri LED Red 8 Programmable LED 8 red is energized

Tri LED Green 8 Programmable LED 8 green is energized

Tri LED Red 9

Programmable function key LED 1 red is energized

1041

1042

1043

1044

English Text

LED4 Red

LED4 Grn

LED5 Red

LED5 Grn

LED6 Red

LED6 Grn

LED7 Red

LED7 Grn

LED8 Red

LED8 Grn

FnKey LED1 Red

FnKey LED1 Grn

FnKey LED2 Red

FnKey LED2 Grn

FnKey LED3 Red

FnKey LED3 Grn

FnKey LED4 Red

FnKey LED4 Grn

FnKey LED5 Red

FnKey LED5 Grn

FnKey LED6 Red

FnKey LED6 Grn

FnKey LED7 Red

FnKey LED7 Grn

FnKey LED8 Red

FnKey LED8 Grn

FnKey LED9 Red

FnKey LED9 Grn

FnKey LED10 Red

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

P543

/

P545

* * *

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-41

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1059 Tri LED Green 18 Programmable function key LED 10 green is FnKey LED10 Grn

1060 LED_CON_R1 Assignment of input signal to drive output

1061 LED_CON_G1

Assignment of signal to drive output LED 1 green. To drive LED 1 yellow DDB 676 and

DDB 677 must be driven at the same time

LED1 Con R

LED1 Con G

1062 LED_CON_R2 Assignment of input signal to drive output

1063 LED_CON_G2

Assignment of signal to drive output LED 2 green. To drive LED 2 yellow DDB 678 and

DDB 679 must be driven at the same time

LED2 Con R

LED2 Con G

1064 LED_CON_R3 Assignment of input signal to drive output

1065 LED_CON_G3

Assignment of signal to drive output LED 3 green. To drive LED 3 yellow DDB 680 and

DDB 681 must be driven at the same time

LED3 Con R

LED3 Con G

1066 LED_CON_R4 Assignment of input signal to drive output

1067 LED_CON_G4

Assignment of signal to drive output LED 4 green. To drive LED 4 yellow DDB 682 and

DDB 683 must be driven at the same time

LED4 Con R

LED4 Con G

1068 LED_CON_R5 Assignment of input signal to drive output

1069 LED_CON_G5

Assignment of signal to drive output LED 5 green. To drive LED 5 yellow DDB 684 and

DDB 685 must be driven at the same time

LED5 Con R

LED5 Con G

1070 LED_CON_R6 Assignment of input signal to drive output

1071 LED_CON_G6

Assignment of signal to drive output LED 6 green. To drive LED 6 yellow DDB 686 and

DDB 687 must be driven at the same time

LED6 Con R

LED6 Con G

1072 LED_CON_R7 Assignment of input signal to drive output

1073 LED_CON_G7

Assignment of signal to drive output LED 7 green. To drive LED 7 yellow DDB 688 and

DDB 689 must be driven at the same time

LED7 Con R

LED7 Con G

1074 LED_CON_R8 Assignment of input signal to drive output

1075 LED_CON_G8

Assignment of signal to drive output LED 8 green. To drive LED 8 yellow DDB 690 and

DDB 691 must be driven at the same time

1076 LED_CON_R9

Assignment of signal to drive output function key LED 1 red. This LED is associated with function key 1

1077

1078

LED_CON_G9

LED_CON_R10

Assignment of signal to drive output function key LED 1 green. This LED is associated with function key 1. To drive function key

LED, yellow DDB 692 and DDB 693 must be active at the same time

Assignment of signal to drive output function key LED 2 red. This LED is associated with function key 2

LED8 Con R

LED8 Con G

FnKey LED1 ConR

FnKey LED1 ConG

FnKey LED2 ConR

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-42 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

1079

1080

1081

1082

1083

1084

1085

1086

1087

1088

1089

1090

1091

1092

Source Description English Text

LED_CON_G10

LED_CON_R11

LED_CON_G11

LED_CON_R12

LED_CON_G12

LED_CON_R13

LED_CON_G13

LED_CON_R14

LED_CON_G14

LED_CON_R15

LED_CON_G15

LED_CON_R16

LED_CON_G16

LED_CON_R17

Assignment of signal to drive output function key LED 2 green. This LED is associated with function key 2. To drive function key

LED, yellow DDB 694 and DDB 695 must be active at the same time

Assignment of signal to drive output function key LED 3 red. This LED is associated with function key 3

Assignment of signal to drive output function key LED 3 green. This LED is associated with function key 3. To drive function key

LED, yellow DDB 696 and DDB 697 must be active at the same time

Assignment of signal to drive output function key LED 4 red. This LED is associated with function key 4

Assignment of signal to drive output function key LED 4 green. This LED is associated with function key 4. To drive function key

LED, yellow DDB 698 and DDB 699 must be active at the same time

Assignment of signal to drive output function key LED 5 red. This LED is associated with function key 5

Assignment of signal to drive output function key LED 5 green. This LED is associated with function key 5. To drive function key

LED, yellow DDB 700 and DDB 701 must be active at the same time

Assignment of signal to drive output function key LED 6 red. This LED is associated with function key 6

Assignment of signal to drive output function key LED 6 green. This LED is associated with function key 6. To drive function key

LED, yellow DDB 702 and DDB 703 must be active at the same time

Assignment of signal to drive output function key LED 7 red. This LED is associated with function key 7

Assignment of signal to drive output function key LED 7 green. This LED is associated with function key 7. To drive function key

LED, yellow DDB 704 and DDB 705 must be active at the same time

Assignment of signal to drive output function key LED 8 red. This LED is associated with function key 8

Assignment of signal to drive output function key LED 8 green. This LED is associated with function key 8. To drive function key

LED, yellow DDB 706 and DDB 707 must be active at the same time

Assignment of signal to drive output function key LED 9 red. This LED is associated with function key 9

FnKey LED2 ConG

FnKey LED3 ConR

FnKey LED3 ConG

FnKey LED4 ConR

FnKey LED4 ConG

FnKey LED5 ConR

FnKey LED5 ConG

FnKey LED6 ConR

FnKey LED6 ConG

FnKey LED7 ConR

FnKey LED7 ConG

FnKey LED8 ConR

FnKey LED8 ConG

FnKey LED9 ConR

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-43

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1093

1094

1095

Source

LED_CON_G17

LED_CON_R18

LED_CON_G18

Description English Text

Assignment of signal to drive output function key LED 9 green. This LED is associated with function key 9. To drive function key

LED, yellow DDB 708 and DDB 709 must be active at the same time

Assignment of signal to drive output function key LED 10 red. This LED is associated with function key 10

Assignment of signal to drive output function key LED 10 green. This LED is associated with function key 10. To drive function key

LED, yellow DDB 710 and DDB 711 must be active at the same time

FnKey LED9 ConG *

FnKey LED10 ConR *

FnKey LED10 ConG *

P543 /

P545 No

Distance

1096 to

1105

1106

Function Key 1 to

Function Key 10

CB Monitoring

Function key 1 is activated.

Function key 10 is activated.

In ‘Normal’ mode it is high on keypress and in

‘Toggle’ mode remains high/low on single keypress

Function Key 1 to

Function Key 10

Broken current maintenance alarm - circuit breaker cumulative duty alarm set-point

CB I^ Maint

*

*

1107

1108

1109

CB Monitoring

CB Monitoring

CB Monitoring

Broken current lockout alarm - circuit breaker cumulative duty has been exceeded

No of circuit breaker operations maintenance alarm - indicated due to circuit breaker trip operations threshold

No of circuit breaker operations maintenance lockout - excessive number of circuit breaker trip operations, safety lockout

CB I^ Lockout

No.CB OPs Maint

No.CB OPs Lock

1110

1111

CB Monitoring

CB Monitoring

Excessive circuit breaker operating time maintenance alarm - excessive operation time alarm for the circuit breaker (slow interruption time)

Excessive circuit breaker operating time lockout alarm - excessive operation time alarm for the circuit breaker (too slow interruption)

CB Time Maint

CB Time Lockout

1112 CB Monitoring Excessive fault frequency lockout alarm

1106 CB Monitoring

CB FaultFreqLock

Broken current maintenance alarm - circuit breaker cumulative duty alarm set-point CB1 CB1 I^ Maint

1107 CB Monitoring

Broken current lockout alarm - circuit breaker cumulative duty has been exceeded CB1

CB1 I^ Lockout

1108

1109

1110

CB Monitoring

CB Monitoring

CB Monitoring

No of circuit breaker operations maintenance alarm - indicated due to circuit breaker trip operations threshold CB1

No of circuit breaker operations maintenance lockout - excessive number of circuit breaker trip operations, safety lockout CB1

Excessive circuit breaker operating time maintenance alarm - excessive operation time alarm for the circuit breaker (slow interruption time) CB1

No.CB1 OPs Maint

No.CB1 OPs Lock

CB1 Time Maint

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

P544

/

P546

Page (PL) 8-44 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

1111

1112

1113

Source Description English Text

CB Monitoring

Excessive circuit breaker operating time lockout alarm - excessive operation time alarm for the circuit breaker (too slow interruption) CB1

CB1 Time Lockout

CB Monitoring Excessive fault frequency lockout alarm CB1 CB1FaultFreqLock

1114

1115

1116

1117

1118

1119

1113 to

1119

1120

1121

1122

1123

1124

1125

1126

1127

1128

1129

1130

1131

CB2 I^ Lockout

CB2 Monitoring

CB2 Monitoring

No of circuit breaker operations maintenance alarm - indicated due to circuit breaker trip operations threshold CB2

No of circuit breaker operations maintenance lockout - excessive number of circuit breaker trip operations, safety lockout CB2

No.CB2 OPs Maint

No.CB2 OPs Lock

CB2 Monitoring

Excessive circuit breaker operating time maintenance alarm - excessive operation time alarm for the circuit breaker (slow interruption time) CB2

CB2 Time Maint

CB2 Monitoring

Excessive circuit breaker operating time lockout alarm - excessive operation time alarm for the circuit breaker (too slow interruption) CB2

CB2 Time Lockout

CB2 Monitoring Excessive fault frequency lockout alarm CB2 CB2FaultFreqLock

CB2 Monitoring Unused Unused

C Diff

C Diff

Reception of messages on channel 1 has stopped

Transmission of messages on channel 1 has stopped

SignalFail Ch1Rx

SignalFail Ch1Tx

C Diff

Fibre Monitor Bits

It indicates that GPS sampling synchronization (for protection purposes) running on channel 1 is lost

This is an alarm that appears if the channel 1 baud rate is outside the limits 52 kbits/s or 70

Kbits/s

Fibre Monitor Bits Mux indicates signal lost over channel 1

Ch 1 GPS Fail

Ch1 Mux Clk

Ch1 Signal Lost

Fibre Monitor Bits

One way communication. Local relay that is sending over Ch1 indicates that remote end is not receiving

Ch1 Path Yellow

Ch1 Mismatch RxN

Fibre Monitor Bits

Indication that no valid message is received over channel 1 during ‘Channel Timeout’ window

Fibre Monitor Bits Indicates poor channel 1 quality

Ch1 Timeout

Ch1 Degraded

Ch1 Passthrough

C Diff

C Diff

Reception of messages on channel 2 has stopped

Transmission of messages on channel 1 has stopped

SignalFail Ch2Rx

SignalFail Ch2Tx

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-45

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1132 C Diff

1133 Fibre Monitor Bits

It indicates that GPS sampling synchronization (for protection purposes) running on channel 2 is lost

This is an alarm that appears if the channel 2 baud rate is outside the limits 52kbits/s or 70 kbits/s

1134 Fibre Monitor Bits Mux indicates signal lost over channel 2

Ch 2 GPS Fail

Ch2 Mux Clk

Ch2 Signal Lost

1135 Fibre Monitor Bits

One way communication. Local relay that is sending over Ch2 indicates that remote end is not receiving

Ch2 Path Yellow

1136 Fibre Monitor Bits Indication of mismatch between

1137 Fibre Monitor Bits

Indication that no valid message is received over channel 2 during ‘Channel Timeout’ window

1138 Fibre Monitor Bits Indicates poor channel 2 quality

Ch2 Mismatch RxN

Ch2 Timeout

Ch2 Degraded

1139 Fibre Monitor Bits Ch2 data received via Ch 1 in 3 ended

1140 C Diff

1141 C Diff

1142 C Diff relay is already configured reconfigure was successful reconfigure was unsuccessful

1143 C Diff

1144 C Diff

1145 C Diff

1146

1147

1148

1149 to

1152

PSL restore was successful restore was unsuccessful

Inhibit Current Differential

Backup Enabled

SEF Trip

Current Prot SEF Trip

Block Underfrequency Stage 1 Timer to

Block Underfrequency Stage 4 Timer

Block Overfrequency Stage 1 Timer

Block Overfrequency Stage 2 Timer

Under frequency Stage 1 start to

Under frequency Stage 4 start

1153 PSL

1154 PSL

1155 to

1158

1159

Frequency

Protection

Frequency

Protection

1160

1161 to

1164

1165

Frequency

Protection

Frequency

Protection

Frequency

Protection

1166

Frequency

Protection

1167 to

1170

PSL

1171 PSL

1172 PSL

1173 to

1175

SW

Over frequency Stage 1 start

Over frequency Stage 2 start

Under frequency Stage 1 trip to

Under frequency Stage 4 trip

Over frequency Stage 1 Trip

Over frequency Stage 2 Trip

Inhibit Stage 1 Underfrequency protection to

Inhibit Stage 4 Underfrequency protection

Inhibit Stage 1 Overfrequency protection

Ch2 Passthrough

F>1 Start

F>2 Start

F<1 Trip to

F<4 Trip

F>1 Trip

F>2 Trip

Inhibit F<1 to

Inhibit F<4

Inhibit F>1

Inhibit Stage 2 Overfrequency protection Inhibit F>2

Network Interface Card link 1 fail indication to

Network Interface Card link 3 fail indication

ETH Link 1 Fail to

ETH Link 3 Fail

Config Same

Reconfig Pass

Reconfig Fail

Restore Pass

Restore Fail

Inhibit C Diff

Backup Enabled

SEF Trip

B Fail SEF Trip

F<1 Timer Block to

F<4 Timer Block

F>1 Timer Block

F>2 Timer Block

F<1 Start to

F<4 Start

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

* *

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-46 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1307

1308

1309

1310

1311

1303

1304

1305

1306

1295

1296

1297

1298

1299

1300

1301

1302

DDB

No

1176

1177

1178

1179

1180

1181

1182

Source Description English Text

1183

1184 to

1191

1192

1193

1194 to

1293

1294

SW

SW

SW

PSL

User logged into UI

User logged into front port courier

User logged into Rear Port1 courier

PSL Internal Node

Logged into UI

Logged into FP

Logged into RP1

SW

SW

SW

SW

User logged into Rear Port2 courier

User logged into turnneled courier

User logged into co-processor courier

Main card/Ethernet card hw option mismatch

Alarm

Logged into RP2

Logged into TNL

Logged into CPR

NIC HW Mismatch

SW

Commissioning

Test

Main card/Ethernet card IEC61850 ver mismatch Alarm

NIC APP Mismatch

Monitor port signal 1 to

Monitor port signal 8

Allows mapped monitor signals to be mapped to disturbance recorder or contacts

Monitor Bit 1 to

Monitor Bit 8

Fault recorder New Fault Record New Fault Record

PSL Unused Unused

PSL Int 1 to

PSL Int 100

VTS Ia>

VTS Ib>

VTS Ic>

VT Supervision Va has exceed 30 volts (drop off at 10 volts) VTS Va>

VT Supervision Vb has exceed 30 volts (drop off at 10 volts) VTS Vb>

VT Supervision Vc has exceed 30 volts (drop off at 10 volts) VTS Vc>

VT Supervision “VTS I2> Inhibit “ setting has been exceeded VTS I2>

VT Supervision V2 has exceed 10 volts VTS V2>

VTS Ia delta>

VTS Ib delta>

VTS Ic delta>

Z1 AN Comparator

Z1 BN Comparator

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Z1 AN Comparator

Z1 BN Comparator

Z1 CN Comparator

Z1 AB Comparator

Z1 BC Comparator

Z1 CA Comparator

Z2 AN Comparator

Z1 CN Comparator

Z1 AB Comparator

Z1 BC Comparator

Z1 CA Comparator

Z2 AN Comparator

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

P543

/

P545

* * *

*

*

*

*

*

*

P544

/

P546

*

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

* * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-47

(PL) 8 Programmable Logic

Description

Z2 BN Comparator

Z2 CN Comparator

Z2 AB Comparator

Z2 BC Comparator

Z2 CA Comparator

Z3 AN Comparator

Z3 BN Comparator

Z3 CN Comparator

Z3 AB Comparator

Z3 BC Comparator

Z3 CA Comparator

ZP AN Comparator

ZP BN Comparator

ZP CN Comparator

ZP AB Comparator

ZP BC Comparator

ZP CA Comparator

Z4 AN Comparator

Z4 BN Comparator

Z4 CN Comparator

Z4 AB Comparator

Z4 BC Comparator

Z4 CA Comparator

IN> Bias

WI Detect I0/I2

Unused

DDB

No

Source

1312

1313

1314

1315

1316

1317

1318

1319

1320

1321

1322

1323

1324

1325

1326

1327

1328

1329

1330

1331

1332

1333

1334

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

1335

Distance diagnostic

1336

1305 to

1335

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Page (PL) 8-48

Description of Logic Nodes

Z2 BN Comparator

Z2 CN Comparator

Z2 AB Comparator

Z2 BC Comparator

Z2 CA Comparator

Z3 AN Comparator

Z3 BN Comparator

Z3 CN Comparator

Z3 AB Comparator

Z3 BC Comparator

Z3 CA Comparator

ZP AN Comparator

ZP BN Comparator

ZP CN Comparator

ZP AB Comparator

ZP BC Comparator

ZP CA Comparator

Z4 AN Comparator

Z4 BN Comparator

Z4 CN Comparator

Z4 AB Comparator

Z4 BC Comparator

Z4 CA Comparator

IN> Bias

WI Detect I0/I2

Unused

English Text

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5

Description of Logic Nodes

DDB

No

1336

1337

1354

1355

1356

1357

1358

Source Description

1338

1339

1340

1341

1342

1343

1344

1345

1346

1347

1348

1337 to

1348

1349 to

1351

1352

1353

1359

1360

1361

1362

1363

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Unused

Delta Directional Forward AN

Delta Directional Forward BN

Delta Directional Forward CN

Delta Directional Forward AB

Delta Directional Forward BC

Delta Directional Forward CA

Delta Directional Reverse AN

Delta Directional Reverse BN

Delta Directional Reverse CN

Delta Directional Reverse AB

Delta directional

Diagnostic

Delta directional

Diagnostic

Delta directional

Diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Delta Directional Reverse BC

Delta Directional Reverse CA

Unused

Zone 1 Blocked by PSB to

Zone 3 Blocked by PSB

Zone P Blocked by PSB

Zone 4 Blocked by PSB

Memory Valid

Phase Selector Phase Sel Two Cycle

Phase Selector Phase Sel Five Cycle

Phase Selector Buffer Frozen

Aided Scheme

Logic

Aided 1 WI V< A

Aided Scheme

Logic

Aided 1 WI V< B

Aided Scheme

Logic

Aided 1 WI V< C

Aided Scheme

Logic

Aided Scheme

Logic

Aided Scheme

Logic

Aided 2 WI V< A

Aided 2 WI V< B

Aided 2 WI V< C

P54x/EN PL/Nd5

(PL) 8 Programmable Logic

English Text

Unused

Delta Dir FWD AN

Delta Dir FWD BN

Delta Dir FWD CN

Delta Dir FWD AB

Delta Dir FWD BC

Delta Dir FWD CA

Delta Dir Rev AN

Delta Dir Rev BN

Delta Dir Rev CN

Delta Dir Rev AB

Delta Dir Rev BC

Delta Dir Rev CA

Unused

Zone 1 Blocked to

Zone 3 Blocked

Zone P Blocked

Zone 4 Blocked

Mem. Valid

Ph Two Cycle

Ph Five Cycle

Ph Frozen

Aided 1 WI V< A

Aided 1 WI V< B

Aided 1 WI V< C

Aided 2 WI V< A

Aided 2 WI V< B

Aided 2 WI V< C

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-49

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1349 to

1354

Distance diagnostic

Unused

1355 to

1357

1358 to

1363

Phase Selector Unused

Aided Scheme

Logic

1364 CB Control

1364 CB Control

Unused

Pre-Lockout

Output from CB1 monitoring logic

1365

1366

1367

1365 to

1367

1368

1369

1370

1371

1372

1373

1374

Loss of Load logic

Loss of Load logic

Loss of Load logic

Loss of Load logic

Frequency

Tracking

Frequency

Tracking

Frequency

Tracking

Frequency

Tracking

3d/4th Harmonic

Restraint A

Phase

3d/4th Harmonic

Restraint B

Phase

3d/4th Harmonic

Restraint C

Phase

Loss of Load level detector A

Loss of Load level detector B

Loss of Load level detector C

Unused

Freq High

Freq Low

Freq Not found

Stop Freq Track

3rd/4th Harmonic Restraint A Phase

3rd/4th Harmonic Restraint B Phase

3rd/4th Harmonic Restraint C Phase

1375

1376

1376

1377

1378

This is an output signal available in the PSL, that could be mapped to “C Diff Failure” for

IEC870-5-103

This applies only if distance primary FUN is selected (in IEC870-5-103)

This signal is ON if an overcurrent stage is selected to be enabled on VTS and distance is blocked by VTS

Unused

This applies only if distance primary FUN is selected (in IEC870-5-103)

This signal is ON if DDB 1376 is ON and one of the overcurrent stages set to be enabled on VTS condition trips

This applies only if distance primary FUN is selected (in IEC870-5-103)

This is an output signal available in the PSL, which could be mapped to a signal send of one of the two teleprotection channels

Unused

Unused

Unused

Pre-Lockout

CB1 Pre-Lockout

I> LoL A

I> LoL B

I> LoL C

Unused

Freq High

Freq Low

Freq Not found

Stop Freq Track

3d/4th HarmonicA

3d/4th HarmonicB

3d/4th HarmonicC

Teleprot Disturb

I>> Backup Super

Unused

I> Trip by VTS

Teleprot Tx

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-50 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

1379

1378 to

1379

1380

1381

1382

1383

1384

1385

1386

1387

1388

1389

1390

1391

1392

1393

1394

1395

1390 to

1395

1396 to

1403

1404

1404

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Transfer

Transfer

Source Description English Text

This applies only if distance primary FUN is selected (in IEC870-5-103)

This is an output signal available in the PSL, which could be mapped to a signal receive of one of the two teleprotection channels

Teleprot Rx

Unused Unused *

This is an output signal available in the PSL, which can be mapped in IEC870-5-103 to a minor defect which does not shut down the main protection

This is an output signal available in the PSL, which can be mapped in IEC870-5-103 to a major problem normally linked to the watchdog

Group Alarm

This is an output signal available in the PSL, which can be mapped to enable AR via pulse AR On Pulse

This is an output signal available in the PSL, which can be mapped to disable AR via pulse AR Off Pulse

External input via DDB mapped in PSL to enable AR if Enable AR CB1 or Enable AR

CB2 is set and AR Configuration setting is enabled

Auto-reclose in service

Group Warning

AR Enable

AR In Service

Setting MaxCh 1 PropDelay has been exceeded

Setting MaxCh 2 PropDelay has been exceeded

Setting MaxCh1 Tx-RxTime has been exceeded

Setting MaxCh2 Tx-RxTime has been exceeded

MaxCh1 PropDelay

MaxCh2 PropDelay

MaxCh1 Tx-RxTime

MaxCh2 Tx-RxTime

*

*

*

*

*

*

*

*

*

*

ZV AN Comparator ZV AN Comparator

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

ZV BN Comparator

ZV CN Comparator

ZV BN Comparator

ZV CN Comparator

*

*

*

*

ZV AB Comparator

ZV BC Comparator

ZV CA Comparator

ZV AB Comparator

ZV BC Comparator

ZV CA Comparator

Unused Unused

Unused Unused

Signal from the VTS logic that can be used to block operation of the distance elements

Unused

VTS Blk Distance

Unused

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-51

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1405 to

1407

Source

1408

1409

1410

1408 to

1410

1411 Autoreclose

1411

1412 to

1416

1417

1418

1419

1412 to

1419

PSL

1420 PSL

1421

1422

1423

1424

1425

1421 to

1425

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

PSL

Description English Text

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

Unused Unused

If setting "Leader Select By:" = Opto, then preferred leader CB is CB1 if input DDB "CB2

LEAD" is low, or CB2 if DDB "CB2 LEAD" is high.

CB2 Lead

If setting "Foll AR Mode" = Opto, then if input

DDB "FARSP" is high, the follower CB is enabled for single phase autoreclose, if

"FARSP" is low, the follower CB is NOT enabled for single phase autoreclose.D2215

Foll AR Mode 1P

If setting "Foll AR Mode" = Opto, then if input

DDB "FAR3P" is high, the follower CB is enabled for three phase autoreclose, if

"FAR3P" is low, the follower CB is NOT enabled for three phase autoreclose.

Foll AR Mode 3P

Unused

Autoreclose in progress CB2

Unused

Unused

Unused

CB2 AR 3p InProg

Unused

Unused

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset any CB2 Successful Autoreclose" signal.

Ext Rst CB2 AROK

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset the CB2 cumulative "Shots" counters.

Ext Rst CB2Shots

DDB mapped in PSL. Reset Manual CB2

Close Timer Delay (stop & reset Manual

Close Delay time for closing CB2).

Rst CB2 CloseDly

Unused Unused

DDB mapped in PSL from opto or comms input. External signal to inhibit autoreclose. Inhibit AR

DDB mapped in PSL from opto or comms input. External signal to force CB2 autoreclose to lockout.

Block CB2 AR

DDB mapped in PSL from opto or comms input. Reset Lockout Opto Input to reset CB2

Lockout state

Rst CB2 Lockout

DDB mapped in PSL from opto input (Bus2

VT secondary MCB tripped or VT fail detected by external VTS scheme), or signal from host relay VTS scheme

MCB/VTS CB2 CS

DDB mapped in PSL from opto input

(external signal to inhibit Live Bus 2 function) Inhibit LB2

DDB mapped in PSL from opto input

(external signal to inhibit Dead Bus 2 function)

Inhibit DB2

Unused Unused

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-52 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1444

1445

1446

1447

1448

1449

DDB

No

1426 PSL

1427 PSL

1426 to

1427

1428

1429

1428 to

1429

1430

1431

1432

1433

1434

1435

1436

1431 to

1436

1437

1438

1439

1440

1441

Autoreclose

SW

SW

SW

SW

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

1442

1443

1450

Source Description English Text

DDB mapped in PSL from opto input or logic

DDBs (enable CB2 CS1 check synchronism function)

DDB mapped in PSL from opto input or logic

DDBs (enable CB2 CS2 check synchronism function)

CB2 CS1 Enabled

CB2 CS2 Enabled

Unused Unused

Signal from CB In Service logic, indicating that CB2 is "In Service", i.e. can be initiated to autoreclose,

CB2 not available for autoreclose

Unused

CB2 In Service

CB2 NoAR

Unused

Unused Unused

CB2 set as leader

CB1 set as follower

Leader CB2

Follower CB1

CB2 set as follower Follower CB2

Indicates initiation of a CB2 autoreclose cycle CB2 AR Init

CB2 autoreclose cycle in progress

Unused

CB2 ARIP

Unused

Unused Unused

Current differential High Set start IDiff>>Start

Current differential High Set A phase start IDiff>>Start A

Current differential High Set B phase start IDiff>>Start B

Current differential High Set C phase start IDiff>>Start C

CB2 autoreclose failed due to persistent fault CB2 Failed AR

Output DDB indicates conditions to enable

CB2 lead single phase autoreclose dead time to run are satisfied

DTOK CB2L 1P

Output DDB indicates conditions to enable

CB2 lead three phase autoreclose dead time to run are satisfied

DTOK CB2L 3P

Indicates CB2 three phase autoreclose dead time running

Indicates conditions are satisfied to enable

CB2 follower sequence

Indicates a single pole autoreclose follower time is running (either CB)

CB2 3P DTime

En CB2 Follower

1P Follower Time

Indicates a three pole autoreclose follower time is running (either CB)

Signal from autoreclose logic to initiate CB2 close via “CB2 CB Control”

Indicates a CB2 Auto Close signal has been issued

3P Follower Time

Auto Close CB2

Set CB2 Close

Output DDB can be applied to inhibit CB2 reclose by adjacent scheme until local autoreclose scheme confirms it is OK to close

CB2

CB2 Control

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-53

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1451

1452

1453

Source

1454

1455

1456

1457

1458

1459

1460

1441 to

1460

1461

1462

1463

1461 to

1463

1464

1464

1465

1465

1466

Description English Text

CB2 successful single phase AR

CB2 successful three phase AR

CB2 Manual Close initiated – awaiting Man

Close Delay time

OK to reclose CB2 with sync check without waiting for dead time to complete

System conditions OK to reclose CB2 as leader when dead time complete

CB2 Succ 1P AR

CB2 Succ 3P AR

CB2 Close inProg

CB2 Fast SCOK

CB2L SCOK

System conditions OK to reclose CB2 when follower time complete

Unused

CB2F SCOK

Unused

System conditions OK to manually close CB2 CB2 Man SCOK signal to force CB2 AR lockout if CB2 fails to trip when protection operates

Unused

CB2 Fail Pr Trip

Unused

Unused Unused

Indicates Bus 2 input is live, i.e. voltage >= setting [48 89]

Indicates Bus 2 input is dead i.e. voltage < setting [48 8A]

CB2 close with synchronism check type 2 is permitted (setting [48 A2]= Enabled), and

Line and Bus 2 voltages satisfy relay settings for CB2 synchronism check type 2

Live Bus 2

Dead Bus 2

CB2 CS2 OK

Unused Unused

Line-Bus 1 slip freq > setting [48 98]

(frequency difference (slip) between line voltage and bus 1 voltage is greater than maximum slip permitted for CB1 synchronism check type 2)

CB1 CS2 SlipF>

Line-Bus 1 slip freq > setting [48 98]

(frequency difference (slip) between line voltage and bus 1 voltage is greater than maximum slip permitted for CB synchronism check type 2)

Line-Bus 1 slip freq < setting [48 98]

(frequency difference (slip) between line voltage and bus 1 voltage is within the permitted range for CB1 synchronism check type 2)

CS2 SlipF>

CB1 CS2 SlipF<

Line-Bus 1 slip freq < setting [48 98]

(frequency difference (slip) between line voltage and bus voltage is within the permitted range for CB synchronism check type 2)

CS2 SlipF<

Line-Bus 2 slip freq > setting [48 A1]

(frequency difference (slip) between line voltage and bus 2 voltage is greater than maximum slip permitted for CB2 synchronism check type 1)

CB2 CS1 SlipF>

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

*

P544

/

P546

*

*

* *

*

*

*

*

*

*

*

*

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-54 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

1467

1468

1469

1466 to

1485

1470

1471

1472

1473

1474

1475

1476

1477

1478

1479

1480

1481

1482

Source Description English Text

Line-Bus 2 slip freq < setting [48 A1]

(frequency difference (slip) between line voltage and bus 2 voltage is within the permitted range for CB2 synchronism check type 1)

Line-Bus 2 slip freq < setting [48 A6]

(frequency difference (slip) between line voltage and bus 2 voltage is within the permitted range for CB2 synchronism check type 2)

CB2 CS1 SlipF<

Line-Bus 2 slip freq > setting [48 A6]

(frequency difference (slip) between line voltage and bus 2 voltage is greater than maximum slip permitted for CB2 synchronism check type 2)

CB2 CS2 SlipF>

CB2 CS2 SlipF<

Unused Unused *

Voltage magnitude difference between Line V and Bus2 V is greater than setting [48 9F]

(line V > Bus V)

CB2 CS1 VL>VB

Voltage magnitude difference between Line V and Bus2 V is greater than setting [48 A4]

(line V > Bus V)

CB2 CS2 VL>VB

Voltage magnitude difference between Line V and Bus2 V is greater than setting [48 9F]

(line V < Bus V)

CB2 CS1 VL<VB

Voltage magnitude difference between Line V and Bus2 V is greater than setting [48 A4]

(line V < Bus V)

CB2 CS2 VL<VB

Frequency difference between Line V and

Bus2 V is greater than setting [48 A1] (line freq > Bus freq)

Frequency difference between Line V and

Bus2 V is greater than setting [48 A6] (line freq > Bus freq)

CB2 CS1 FL>FB

CB2 CS2 FL>FB

Frequency difference between Line V and

Bus2 V is greater than setting [48 A1] (line freq < Bus freq)

Frequency difference between Line V and

Bus2 V is greater than setting [48 A6] (line freq < Bus freq)

Line/Bus2 phase angle in range: setting [48

9E] to +180deg (anticlockwise from Vbus)

Line/Bus2 phase angle in range: setting [48

9E] to -180deg (clockwise from Vbus)

Line/Bus2 phase angle in range: setting [48

A3] to +180deg (anticlockwise from Vbus)

Line/Bus2 phase angle in range: setting [48

A3] to -180deg (clockwise from Vbus)

Line freq > (Bus2 freq + 0.001Hz) (Line voltage vector rotating anticlockwise relative to VBus2)

CB2 CS1 FL<FB

CB2 CS2 FL<FB

CB2 CS1 AngHigh+

CB2 CS1 AngHigh-

CB2 CS2 AngHigh+

CB2 CS2 AngHigh-

CB2 CS AngRotACW

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

P54x/EN PL/Nd5 Page (PL) 8-55

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1483

1484

1485

1486 to

1492

1487 Autoreclose

1488

1489 to

1490

1493

1494

1495

1496

1493

1494

1495

1496

1497

1498

1491

1492

PSL

PSL

Source

Autoreclose

Description English Text

Bus2 freq > (Line freq + 0.001Hz) (Line voltage vector rotating clockwise relative to

VBus2)

This DDB is set when the autoreclose logic has determined that single pole tripping/autoreclosing is not permitted for

CB2. It can be applied in PSL when required to force trip conversion logic for internal and/or external protection to three phase trip mode for CB2.

CB2 CS AngRotCW

Output from CB2 system check logic: indicates system checks for CB2 are disabled

(setting "System Checks CB2" = Disabled or global setting "System Checks" = Disabled)

SChksInactiveCB2

AR Force CB2 3P

Unused

Unused

Indicates conditions are satisfied to enable

CB1 follower sequence

Unused

Unused

Unused

En CB1 Follower

Unused

System conditions OK to reclose CB1 when follower time complete

Unused

Frequency difference between Line V and

Bus1 V is greater than setting [48 98] (line freq > Bus freq)

Frequency difference between Line V and

Bus1 V is greater than setting [48 98] (line freq < Bus freq)

Line/Bus1 phase angle in range: setting [48

95] to +180deg (anticlockwise from Vbus)

Line/Bus1 phase angle in range: setting [48

95] to -180deg (clockwise from Vbus)

Frequency difference between Line V and

Bus1 V is greater than setting [48 98] (line freq > Bus freq)

CB1F SCOK

Unused

CB1 CS2 FL>FB

CB1 CS2 FL<FB

CB1 CS2 AngHigh+

CB1 CS2 AngHigh-

CS2 FL>FB

Frequency difference between Line V and

Bus1 V is greater than setting [48 98] (line freq < Bus freq)

Line/Bus1 phase angle in range: setting [48

95] to +180deg (anticlockwise from Vbus)

CS2 FL<FB

CS2 AngHigh+

Line/Bus1 phase angle in range: setting [48

95] to -180deg (clockwise from Vbus)

If setting "Lead AR Mode" = Opto, then if input DDB "AR Mode 1P" is high, the leader

CB is enabled for single phase autoreclose, if

"AR Mode 1P" is low, the leader CB is NOT enabled for single phase autoreclose.

CS2 AngHigh-

AR Mode 1P

If setting "Lead AR Mode" = Opto, then if input DDB "AR Mode 3P" is high, the leader

CB is enabled for three phase autoreclose, if

"AR Mode 3P" is low, the leader CB is NOT enabled for three phase autoreclose.

AR Mode 3P

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-56 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

Source Description English Text

1499

1500

1501

1499 to

1501

1502

1503

1503

CB2 A Ph trip & AR initiation memory

CB2 B Ph trip & AR initiation memory

CB2 C Ph trip & AR initiation memory

Unused

CB2 Trip AR MemA

CB2 Trip AR MemB

CB2 Trip AR MemC

Unused

1504

1505

1506

PSL

PSL

PSL

PSL

Unused

Unused

Unused

DDB mapped in PSL from opto or comms input. Input high-low operation will initiate

APh test trip & autoreclose cycle

DDB mapped in PSL from opto or comms input. Input high-low operation will initiate

BPh test trip & autoreclose cycle

DDB mapped in PSL from opto or comms input. Input high-low operation will initiate

CPh test trip & autoreclose cycle

Unused

Unused

Unused

Init APh AR Test

Init BPh AR Test

Init CPh AR Test

1507

1508

1509

1510

1517

1518

PSL

PSL

PSL

PSL

PSL

PSL

DDB mapped in PSL from opto or comms input. Input high-low operation will initiate

3Ph test trip & autoreclose cycle

DDB mapped in PSL from opto or comms input: indicates external protection operated for fault involving A phase

DDB mapped in PSL from opto or comms input: indicates external protection operated for fault involving C phase

DDB mapped in PSL from opto or comms input: indicates external protection operated for fault involving C phase

1511 PSL

DDB mapped in PSL from opto or comms input: if setting "AR Skip Shot 1" = Enable and this input is high when a protection operation initiates an autoreclose cycle, then the sequence counter advances directly to

SC:COUNT = 2 so the autoreclose cycle skips (omits) Shot 1 and instead starts at

Dead Time 2 for the first reclose attempt.

1512 to

1515

1512 to

1515

PSL

PSL

Unused

Unused

1516

PSL Unused

Init 3P AR Test

Ext Fault APh

Ext Fault BPh

Ext Fault CPh

AR Skip Shot1

Unused

Unused

Unused

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset any CB1 "Successful Autoreclose" signal.

Ext Rst CB1 AROK

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset the CB1 cumulative "Shots" counters.

Ext Rst CB1Shots

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

P544 /

P546 No

Distance

P543

/

P545

*

*

*

*

*

*

*

*

*

*

P544

/

P546

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-57

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1517 PSL

1518 PSL

1519 to

1520

PSL

1521 PSL

1522 PSL

1523 PSL

1524 PSL

1525 PSL

1524 PSL

1525 PSL

1526

1526

1527

1528 Autoreclose

1528

1529

1530 Autoreclose

1530

1531

1532 Autoreclose

1533 Autoreclose

1534

1535

1536

1537

1532 to

1534

1535

Source Description English Text

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset any CB "Successful Autoreclose" signal.

DDB mapped in PSL from opto or comms input. This input DDB is used when required to reset the CB cumulative "Shots" counters.

Ext Rst AROK

Ext Rst CB Shots

Unused Unused

DDB mapped in PSL from opto input (Bus1

VT secondary MCB tripped or VT fail detected by external VTS scheme), or signal from host relay VTS scheme

MCB/VTS CB1 CS

DDB mapped in PSL from opto input

(external signal to inhibit Live Line function) Inhibit LL

DDB mapped in PSL from opto input

(external signal to inhibit Dead Line function) Inhibit DL

DDB mapped in PSL from opto input

(external signal to inhibit Live Bus 1 function) Inhibit LB1

DDB mapped in PSL from opto input

(external signal to inhibit Dead Bus 1 function)

Inhibit DB1

DDB mapped in PSL from opto input

(external signal to inhibit Live Bus function) Inhibit LB

DDB mapped in PSL from opto input

(external signal to inhibit Dead Bus function) Inhibit DB

CB1 In Service (can be initiated for autoreclose)

CB In Service (can be initiated for autoreclose)

CB1 In Service

CB In Service

Unused

CB1 not available for autoreclose

Unused

Unused

CB1 set as leader

Unused

Unused

Follower 3 Pole auto-recloser in service - the auto-reclose function has been enabled either in the relay menu, or by an opto input

Unused

CB1 NoAR

Unused

Unused

Leader CB1

Unused

Unused

Follow A/R 3P

Follower Single pole auto-recloser in service - the auto-reclose function has been enabled either in the relay menu, or by an opto input

Follow A/R 1P

Unused

A Ph trip & AR initiation memory

B Ph trip & AR initiation memory

C Ph trip & AR initiation memory

Unused

CB1 Trip AR MemA

CB1 Trip AR MemB

CB1 Trip AR MemC

Unused Unused

A Ph trip & AR initiation memory Trip AR MemA

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-58 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1547

1554

1555

1556

1557

1558

1559

1560

1560

1548 to

1549

1550

1550

1551

1552

1553

1552

1553

1561

1562

1563 to

1564

1561 to

1564

1565

1566

1565

1566

1567

1568

1569

DDB

No

1543

1544

1543

1544

1545

1546

1536

1537

1538 to

1540

1541

1542

Source

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Autoreclose

Description English Text

B Ph trip & AR initiation memory

C Ph trip & AR initiation memory

Unused

Trip AR MemB

Trip AR MemC

Unused

Any AR initiation signal present

Any AR cycle in progress

CB1 AR cycle initiation

CB1 AR cycle in progress

CB AR cycle initiation

CB AR cycle in progress

Unused

Sequence counts greater than shots

Convert SPAR to 3PAR. DDB mapped to give 100ms pulse to CB1 Trip 3Ph and CB2

Trip 3Ph outputs

Unused

AR Start

ARIP

CB1 AR Init

CB1 ARIP

AR Initiation

CB ARIP

Unused

Seq Counter>Set

Evolve 3Ph

Unused

CB1 AR failed due to persistent fault

CB AR failed due to persistent fault

Enabling condition for any dead time required for CB1 lead SPAR D Time required for CB1 lead 3PAR D Time required for CB SPAR D Time required for CB 3PAR D Time

Single pole dead time in progress

OK to start 3PAR dead time

3Phase dead time 1 running

3Phase dead time 2 running

3Phase dead time 3 running

3Phase dead time 4 running

CB1 3PAR dead time running

CB 3PAR dead time running

Either CB SP follower time complete

Either CB 3P follower time complete

Unused

CB1 Failed AR

CB Failed AR

DTOK All

DTOK CB1L 1P

DTOK CB1L 3P

DTOK CB 1P

DTOK CB 3P

1P DTime

OK Time 3P

3P DTime1

3P DTime2

3P DTime3

3P DTime4

CB1 3P DTime

3P Dtime

1PF TComp

3PF TComp

Unused

Unused Unused

DDB (Optional PSL mapping to indication) Set CB1 Close

Inhibits CB1 reclose by adjacent scheme CB1 Control

DDB (Optional PSL mapping to indication) Set CB Close

Inhibits CB reclose by adjacent scheme CB Control

Single Ph AR reclaim time running

Single Ph AR reclaim time complete

Three Ph AR reclaim time running

1P Reclaim Time

1P Reclaim TComp

3P Reclaim Time

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-59

(PL) 8 Programmable Logic Description of Logic Nodes

1580

1581

1582

1583

1582

1583

1584

1585

1584 to

1585

1586

DDB

No

1570

1571

1572

Source

1573

1574

1575

1571

1572

1573

1574

1575

1576

1577

1577

1578

1579

1578

1579

Description English Text

Three Ph AR reclaim time complete

CB1 successful single phase AR

OK to reclose CB1 with sync check without waiting for dead time to complete

System conditions OK to reclose CB1 when dead time complete

3P Reclaim TComp

CB1 Succ 1P AR

CB1 Fast SCOK

CB1L SCOK

System conditions OK to manually close CB1 CB1 Man SCOK signal to force CB1 AR lockout CB1 Fail Pr Trip

CB successful single phase AR CB Succ 1P AR

OK to reclose CB with sync check without waiting for dead time to complete

System conditions OK to reclose CB when dead time complete

CB Fast SCOK

CB SCOK

System conditions OK to manually close CB CB Man SCOK signal to force CB AR lockout CB Fail Pr Trip

Unused

CB2 CS1 is enabled and Line and Bus 2 voltages meet CB2 CS1 settings

Unused

CB2 CS1 OK

Unused Unused

Line-Bus 1 slip freq > setting [48 93]

(frequency difference (slip) between line voltage and bus 1 voltage is greater than maximum slip permitted for CB1 synchronism check type 1)

CB1 CS1 SlipF>

Line-Bus 1 slip freq < setting [48 93]

(frequency difference (slip) between line voltage and bus 1 voltage is greater than maximum slip permitted for CB1 synchronism check type 1)

CB1 CS1 SlipF<

Line-Bus slip freq > setting [48 93] (frequency difference (slip) between line voltage and bus voltage is greater than maximum slip permitted for CB synchronism check type 1)

CS1 SlipF>

Line-Bus slip freq < setting [48 93] (frequency difference (slip) between line voltage and bus voltage is greater than maximum slip permitted for CB synchronism check type 1)

CS1 SlipF<

Line Volts < setting [48 8B]

Line Volts > setting [48 8C]

Bus1 Volts < setting [48 8B]

Bus1 Volts > setting [48 8C]

Bus Volts < setting [48 8B]

Bus Volts > setting [48 8C]

Bus2 Volts < setting [48 8B]

Bus2 Volts > setting [48 8C]

CS VLine<

CS VLine>

CS VBus1<

CS VBus1>

CS VBus<

CS VBus>

CS VBus2<

CS VBus2>

Unused Unused

Voltage magnitude difference between Line V and Bus1 V is greater than setting [48 91]

(line V > Bus V)

CB1 CS1 VL>VB

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

*

P543

/

P545

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-60 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

DDB

No

1587

1588

1589

1590

1591

1592

1593

1594

1595

1586

1587

1588

1589

1590

1591

1592

1593

1594

1595

Source Description English Text

Voltage magnitude difference between Line V and Bus1 V is greater than setting [48 96]

(line V > Bus V)

CB1 CS2 VL>VB

Voltage magnitude difference between Line V and Bus1 V is greater than setting [48 91]

(line V < Bus V)

CB1 CS1 VL<VB

Voltage magnitude difference between Line V and Bus1 V is greater than setting [48 96]

(line V < Bus V)

CB1 CS2 VL<VB

Frequency difference between Line V and

Bus1 V is greater than setting [48 93] (line freq > Bus freq)

Frequency difference between Line V and

Bus1 V is greater than setting [48 93] (line freq < Bus freq)

Line/Bus1 phase angle in range: setting [48

90] to +180deg (anticlockwise from Vbus)

Line/Bus1 phase angle in range: setting [48

90] to -180deg (anticlockwise from Vbus)

CB1 CS1 FL>FB

CB1 CS1 FL<FB

CB1 CS1 AngHigh+

CB1 CS1 AngHigh-

Line freq > (Bus1 freq + 0.001Hz) (Line voltage vector rotating anticlockwise relative to VBus1)

Bus1 freq > (Line freq + 0.001Hz) (Line voltage vector rotating clockwise relative to

VBus1)

CB1 CS AngRotACW

CB1 CS AngRotCW

Voltage magnitude difference between Line V and Bus V is greater than setting [48 91] (line

V > Bus V)

CS1 VL>VB

Voltage magnitude difference between Line V and Bus V is greater than setting [48 96] (line

V > Bus V)

CS2 VL>VB

Voltage magnitude difference between Line V and Bus V is greater than setting [48 91] (line

V < Bus V)

CS1 VL<VB

*

*

*

Voltage magnitude difference between Line V and Bus V is greater than setting [48 96] (line

V < Bus V)

CS2 VL<VB

Frequency difference between Line V and

Bus V is greater than setting [48 93] (line freq

> Bus freq)

CS1 FL>FB

Frequency difference between Line V and

Bus V is greater than setting [48 93] (line freq

< Bus freq)

CS1 FL<FB

Line/Bus phase angle in range: setting [48

90] to +180deg (anticlockwise from Vbus)

Line/Bus phase angle in range: setting [48

90] to -180deg (anticlockwise from Vbus)

CS1 AngHigh+

CS1 AngHigh-

Line freq > (Bus freq + 0.001Hz) (Line voltage vector rotating anticlockwise relative to VBus1)

Bus freq > (Line freq + 0.001Hz) (Line voltage vector rotating clockwise relative to

VBus1)

CS AngRotACW

CS AngRotCW

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

*

*

*

*

*

*

P544 /

P546 No

Distance

*

*

*

*

*

*

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

P544

/

P546

P54x/EN PL/Nd5 Page (PL) 8-61

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1596

1597

1598

1599

1597 to

1599

Unused

Rst CB2 All Val

Output from CB2 monitoring logic

CB2 LO Alarm

Unused

Unused

Rst CB2 Data

CB2 Pre-Lockout

CB2 LO Alarm

Unused

1600

1601

1602

1603

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

Trip Conversion

Logic

3 Phase Trip 2

A Phase Trip 2

B Phase Trip 2

C Phase Trip 2

CB2 Trip 3ph

CB2 Trip OutputA

CB2 Trip OutputB

CB2 Trip OutputC

1604 PSL

External input via DDB to force host relay trip conversion logic to issue a three phase trip signal to CB2 for all faults

Force 3PTrip CB2

1605

1606 PSL Pole Discrepancy

1607 Pole discrepency Pole Discrepancy

1608 PSL

External input via DDB to enable CB2, if "in service", to be initiated for autoreclosing by an AR initiation signal from protection. DDB input defaults to high if not mapped in PSL, so CB2 AR initiation is permitted.

AR Enable CB2

Pole Discrep.CB2

Pole Discrep.CB2

Trip 3 Phase - Input to Trip Latching Logic CB2 Trip I/P 3Ph

1600 to

1603

Trip Conversion

Logic

1604 PSL

Unused

Unused

1605 to

1606

Unused

1607 Pole discrepency Unused

1608 PSL

1609

Unused

External input via DDB mapped in PSL to enable CB1, if "in service", to be initiated for autoreclosing by an AR initiation signal from protection. DDB input defaults to high if not mapped in PSL, so CB1 AR initiation is permitted.

1609

External input via DDB mapped in PSL to enable CB, if "in service", to be initiated for autoreclosing by an AR initiation signal from protection. DDB input defaults to high if not mapped in PSL, so CB AR initiation is permitted.

1610 to

1615

1610 -

1615

1616 to

1665

PSL

Unused

Unused

PSL Internal Node

Unused

Unused

Unused

Unused

Unused

AR Enable CB1

AR Enable CB

Unused

Unused

PSL Int 101 to

PSL Int 150

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

*

P544 /

P546 No

Distance

*

*

P543

/

P545

* *

*

*

*

P544

/

P546

*

* *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-62 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1668

1669

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

1670

1671

1683

1683

1684

1684

1685

1685

1686

1686

1679

1679

1680

1680

1681

1681

1682

1682

1687

1687

1688

1674

1675

1675

1676

1676

1677

1677

1678

1678

1672

1672

1673

1673

1674

DDB

No

1666

1667

SW

SW

Source Description English Text

5th harmonic current ratio exceeds threshold on phase A

Ih(5) Loc Blk A

5th harmonic current ratio exceeds threshold on phase B

5th harmonic current ratio exceeds threshold on phase C

Ih(5) Loc Blk B

Ih(5) Loc Blk C

Indication that remote end phase A is blocked by 5th harmonic

Ih(5) Rem Blk A

Indication that remote end phase B is blocked by 5th harmonic

Ih(5) Rem Blk B

Indication that remote end phase C is blocked by 5th harmonic tBF1 trip phase A for CB1 tBF1 trip phase A for CB tBF2 trip phase A for CB1 tBF2 trip phase A for CB tBF1 trip phase B for CB1 tBF1 trip phase B for CB tBF2 trip phase B for CB1 tBF2 trip phase B for CB tBF1 trip phase C for CB1 tBF1 trip phase C for CB tBF2 trip phase C for CB1 tBF2 trip phase C for CB tBF1 trip phase A for CB2

Unused

Ih(5) Rem Blk C

CB1 Fail1 Trip A

CB Fail1 Trip A

CB1 Fail2 Trip A

CB Fail2 Trip A

CB1 Fail1 Trip B

CB Fail1 Trip B

CB1 Fail2 Trip B

CB Fail2 Trip B

CB1 Fail1 Trip C

CB Fail1 Trip C

CB1 Fail2 Trip C

CB Fail2 Trip C

CB2 Fail1 Trip A

Unused tBF2 trip phase A for CB2

Unused tBF1 trip phase B for CB2

Unused tBF2 trip phase B for CB2

Unused tBF1 trip phase C for CB2

Unused tBF2 trip phase C for CB2

Unused

CT1 phase A Zero Cross Detector

CT phase A Zero Cross Detector

CT1 phase B Zero Cross Detector

CT phase B Zero Cross Detector

CT1 phase C Zero Cross Detector

CT phase C Zero Cross Detector

CT2 phase A Zero Cross Detector

Unused

CT2 phase B Zero Cross Detector

CB2 Fail2 Trip A

Unused

CB2 Fail1 Trip B

Unused

CB2 Fail2 Trip B

Unused

CB2 Fail1 Trip C

Unused

CB2 Fail2 Trip C

Unused

CT1A ZCD

CT A ZCD

CT1B ZCD

CT B ZCD

CT1C ZCD

CT C ZCD

CT2A ZCD

Unused

CT2B ZCD

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* * * *

P54x/EN PL/Nd5 Page (PL) 8-63

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

1705 PSL

1706 PSL

1707 PSL

1708 PSL

1709 PSL

1710 PSL

1711 PSL

1712 to

1714

1715 PSL

1716 PSL

1717 PSL

1718 PSL

1719 PSL

1715 PSL

1688 SW

1689 SW

1689 SW

1690 SW

1691 to

1695

1696 PSL

1697 PSL

1698 PSL

1699 PSL

1700 PSL

1701 PSL

1702 PSL

1703 PSL

1704 PSL

1716 PSL

1717 PSL

1718 PSL

1719 PSL

1720 PSL

1721 PSL

1722 PSL

1723 PSL

1720 to

1723

1724 -

1727

Source Description English Text

Unused

CT2 phase C Zero Cross Detector

Unused

CT1 and CT2 Zero Cross Detector

Unused

Unused

CT2C ZCD

Unused

CT IN ZCD

Unused

IEC61850 User Dual Point Status 1 Open IEC Usr 01 Open

IEC61850 User Dual Point Status 1 Closed IEC Usr 01 Close

IEC61850 User Dual Point Status 2 Open IEC Usr 02 Open

IEC61850 User Dual Point Status 2 Closed IEC Usr 02 Close

IEC61850 User Dual Point Status 3 Open IEC Usr 03 Open

IEC61850 User Dual Point Status 3 Closed IEC Usr 03 Close

IEC61850 User Dual Point Status 4 Open IEC Usr 04 Open

IEC61850 User Dual Point Status 4 Closed IEC Usr 04 Close

IEC61850 User Dual Point Status 5 Opened IEC Usr 05 Open

IEC61850 User Dual Point Status 5 Closed IEC Usr 05 Close

IEC61850 User Dual Point Status 6 Open IEC Usr 06 Open

IEC61850 User Dual Point Status 6 Closed IEC Usr 06 Close

IEC61850 User Dual Point Status 7 Open IEC Usr 07 Open

IEC61850 User Dual Point Status 7 Closed IEC Usr 07 Close

IEC61850 User Dual Point Status 8 Open IEC Usr 08 Open

IEC61850 User Dual Point Status 8 Closed IEC Usr 08 Close

Unused Unused

External Reset for CB 3 phase fail

External Reset for CB A phase fail

External Reset for CB B phase fail

External Reset for CB C phase fail

External Reset for SEF CB fail

External Reset for CB1 3 phase fail

External Reset for CB1 A phase fail

External Reset for CB1 B phase fail

External Reset for CB1 C phase fail

Enternal Reset for SEF CB fail

External Reset for CB2 3 phase fail

External Reset for CB2 A phase fail

External Reset for CB2 B phase fail

External Reset for CB2 C phase fail

Unused

Ext Rst CBF

Ext Rst CBF A

Ext Rst CBF B

Ext Rst CBF C

Ext Rst SEF CBF

Ext Rst CB1F

Ext Rst CB1F A

Ext Rst CB1F B

Ext Rst CB1F C

Ext Rst SEF CBF

Ext Rst CB2F

Ext Rst CB2F A

Ext Rst CB2F B

Ext Rst CB2F C

Unused

Unused Unused

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

*

P544 /

P546 No

Distance

*

*

*

*

P543

/

P545

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

* * * *

Page (PL) 8-64 P54x/EN PL/Nd5

Description of Logic Nodes (PL) 8 Programmable Logic

1804

1805

1806

1807

1807

1808

1809

1810

1811

1812

1813

1792

1793

1794

1795

1796

SW

SW

SW

SW

IEC 103

1797

1796 to

1797

1798

1799

1800

IEC 103

IEC 103

IEC 103

1801

1802

1803

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

IEC 103

DDB

No

Source

1728 to

1759

GOOSE Input

Command

1760 to

1791

GOOSE Input

Command

Description English Text

GOOSE virtual input 1 to

GOOSE virtual input 32

Provides the Quality attributes of any data object in an incoming GOOSE message

Quality VIP 1 to

Quality VIP 32

GOOSE virtual input 1 to

GOOSE virtual input 32

Indicates if the GOOSE publisher responsible for publishing the data that derives a virtual input is present.

PubPres VIP 1 to

PubPres VIP 32

Current differential Saturation Block Idiff Sat Block

Current differential Saturation Block Phase A Idiff Sat Bk PhA

Current differential Saturation Block Phase B Idiff Sat Bk PhB

Current differential Saturation Block Phase C Idiff Sat Bk PhC

Distance protection function enabled in configuration settings

Distance Enabled

Directional Earth Fault protection function enabled in configuration settings

DEF Enabled

Unused Unused

Phase difference protection function enabled in configuration settings

Unused

Ph Diff Enabled

Unused

Overcurrent function enabled in configuration settings

OC Enabled

Negative Sequence Overcurrent function enabled in configuration settings

Broken conductor protection function enabled in configuration settings

Earth Fault protection function enabled in configuration settings

SEF/REF protection function enabled in configuration settings

Neg OC Enabled

Broke cond Enab

EF Enabled

SEF/REF Enabled

Residual OV NVD protection function enabled in configuration settings

Thermal overload protection function enabled in configuration settings

Res OV NVD Enab

Therm OL Enabled

Power swing block protection function enabled in configuration settings

Unused

Unused

Voltage protection function enabled in configuration settings

Frequency protection function enabled in configuration settings

PSB Enabled

Unused

Unused

Volt Prt Enabled

Freq Prt Enabled df/dt function enabled in configuration settings

CBFail protection function enabled in configuration settings

Supervision protection function enabled in configuration setting dfdt Enabled

CBFail Enabled

SuperVis Enabled

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

P544 /

P546 No

Distance

P543

/

P545

P544

/

P546

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-65

(PL) 8 Programmable Logic Description of Logic Nodes

DDB

No

Source Description English Text

1814

1815

1816

1817

IEC 103

IEC 103

SW

SW

1818 SW

1819 to

1834

SW

1835 PSL

1836 PSL

1837

Distance Basic

Scheme

1838

1839

Distance Basic

Scheme

Distance Basic

Scheme

1840

1841

Distance Basic

Scheme

Distance Basic

Scheme

1842 Trip on Close

1843 Trip on Close

1835 to

1843

1844 to

1845

1846

1847

1848

Distance Basic

Scheme

Distance Basic

Scheme

Distance Basic

Scheme

1849

1850

1851

1852

1853

1854

1855

Distance Basic

Scheme

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

Distance

Elements

System checks function enabled in configuration settings

Auto reclose protection function enabled in configuration settings

Overcurrent condition for phase differential trip blocking for phase A

Overcurrent condition for phase differential trip blocking for phase B

Overcurrent condition for phase differential trip blocking for phase C setting input 33 menu settings into PSL to setting input 48 menu settings into PSL

Zone Q ground basic scheme blocking

Zone Q phase basic scheme blocking

Zone Q Trip

Zone Q A Phase Trip

Zone Q B Phase Trip

Zone Q C Phase Trip

Zone Q N Phase Trip

TOR Trip Zone Q

SOTF Trip Zone Q

Unused

Unused

Zone Q A Phase Start

Zone Q B Phase Start

Zone Q C Phase Start

Zone Q N Start

Zone Q AN ground fault element

Zone Q BN ground fault element

Zone Q CN ground fault element

Zone Q AB phase fault element

Zone Q BC phase fault element

Zone Q CA phase fault element

SysChk Enabled

AutoRec Enabled

Diff Blk IA<

Diff Blk IB<

Diff Blk IC<

Ctrl Setg I/P 33 to

Ctrl Setg I/P 48

Block Zone Q Gnd

Block Zone Q Phs

Zone Q Trip

Zone Q A Trip

Zone Q B Trip

Zone Q C Trip

Zone Q N Trip

TOR Trip Zone Q

SOTF Trip Zone Q

Unused

Unused

Zone Q A Start

Zone Q B Start

Zone Q C Start

Zone Q N Start

ZoneQ AN Element

ZoneQ BN Element

ZoneQ CN Element

ZoneQ AB Element

ZoneQ BC Element

ZoneQ CA Element

*

*

*

*

*

*

*

*

*

P543 /

P545 No

Distance

*

P544 /

P546 No

Distance

*

P543

/

P545

*

P544

/

P546

* * * *

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

*

Page (PL) 8-66 P54x/EN PL/Nd5

Description of Logic Nodes

DDB

No

Source Description English Text

1856

1857

1858

1859

1860

1861

1862

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

Distance diagnostic

ZQ AN Comparator

ZQ BN Comparator

ZQ CN Comparator

ZQ AB Comparator

ZQ BC Comparator

ZQ CA Comparator

Zone Q Blocked by PSB

ZQ AN Comparator

ZQ BN Comparator

ZQ CN Comparator

ZQ AB Comparator

ZQ BC Comparator

ZQ CA Comparator

Zone Q Blocked

1891

1892

1890 to

1892

1893

1894 to

1983

1984 to

2015

1881 to

1884

1885

1886

1887

1888

1889

1881 to

1889

1890

1846 to

1862

1863 to

1870

1871

1872

1873

1871 to

1873

1874 to

1880

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

SW

PSL

Unused

Unused

Distance Scheme General Start

Directional end timer elapse

Non Directional end timer elapse

Unused

Unused

Supervision block on Z1 Trip to

Supervision block on Z4 Trip

Supervision block on ZP Trip

Supervision block on ZQ Trip

Supervision block on aided1 Z Trip

Supervision block on aided2 Z Trip

Supervision block on IDiff Trip

Unused

TS Dist. Z1 Blk to

TS Dist. Z4 Blk

TS Dist. ZP Blk

TS Dist. ZQ Blk

TS Aided1 Z Blk

TS Aided2 Z Blk

TS IDiff. Blk

Current Diff Trip A Block by Trip Supervision CdiffTripA Blk

Current Diff Trip B Block by Trip Supervision CdiffTripB Blk

Current Diff Trip C Block by Trip Supervision CdiffTripC Blk

Unused

CB Fail Non current trip

Unused

Unused

Unused

Dis Sch Gen Str

Dir End Timer

NonDir EndTimer

Unused

Unused

Unused

Unused

CBFNonITrip

Unused

PSL

Input to auxiliary timer 1 to

Input to auxiliary timer 32

Timer in 1 to

Timer in 32

2016 to

2047

Timer out 1 to

Timer out 32

Table 1 - DDB numbers and description of logic nodes

(PL) 8 Programmable Logic

*

*

*

*

*

*

*

*

*

*

*

*

P54x/EN PL/Nd5 Page (PL) 8-67

(PL) 8 Programmable Logic

3

Factory Default Programmable Scheme Logic (PSL)

Settings

FACTORY DEFAULT PROGRAMMABLE SCHEME LOGIC

(PSL) SETTINGS

The following section details the default settings of the PSL.

The P54x model options are as follows:

Opto inputs Model

P543xxx?xxxxxxK

P543xxx#xxxxxxK

P544xxx?xxxxxxK

P544xxx#xxxxxxK

P545xxx?xxxxxxK

P545xxx#xxxxxxK

P545xxx$xxxxxxK

P546xxx?xxxxxxK

P546xxx#xxxxxxK

P546xxx£xxxxxxK

24

32

24

24

24

16

16

16

16

24

Relay outputs

14

7 standard and 4 high break

14

7 standard and 4 high break

32

16 standard and 8 high break

32

32

16 standard and 8 high break

8 standard and 12 high break

Note ? is for models with only standard output contacts = A, B, C, D, E, F, G, H,

J, K, L, M or R.

Note

Note

# is for models with standard and high break contacts = S, T, U, V, W, X, Z,

0, 1, 2, 3, 4 or 5.

$ is for models with 32 opto inputs with standard and high break contacts =

8 or 9

Note £ is for models with standard and high break contacts = I, N, O, P, Q, 8, 9.

Table 2 - Factory default PSL settings for P54x models

Page (PL) 8-68 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

4 LOGIC INPUT AND OUTPUT MAPPINGS

4.1 Logic Input Mappings

The default mappings for each of the opto-isolated inputs are in Table 3.

27

28

29

30

23

24

25

26

16

17

18

19

20

21

22

12

13

14

15

8

9

10

11

5

6

7

3

4

1

2

Input L16

Input L17

Input L18

Input L19

Input L20

Input L21

Input L22

Input L23

Input L24

Input L25

Input L26

Input L27

Input L28

Input L29

Input L30

Input L1

Input L2

Input L3

Input L4

Input L5

Input L6

Input L7

Input L8

Input L9

Input L10

Input L11

Input L12

Input L13

Input L14

Input L15

Optoinput No Relay text

P543

Function

L1 Inhibit Diff

L2 Interlock

L3 Aid 1 Receive

L4 Aid 1 COS/LGS

L5 Reset LEDs

L6 Ext Trip A

L7 Ext Trip B

L8 Ext Trip C

L9 CB AuxA 52-B

L10 CB AuxB 52-B

L11 CB AuxC 52-B n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a

L12 MCB/VTS

L13 CB Close Man

L14 Reset Lckout

L15 CB Healthy

L16 BAR n/a n/a n/a

31

32

Input L31

Input L32 n/a n/a n/a n/a

Table 3 - Default opto-isolated input mappings

P544

Function

L1 Inhibit Diff

L2 Interlock

L3 Aid 1 Receive

L4 Aid 1 COS/LGS

L5 Reset LEDs

L6 CB2 AuxA 52-B

L7 CB2 AuxB 52-B

L8 CB2 AuxC 52-B

L9 CB AuxA 52-B

L10 CB AuxB 52-B

L11 CB AuxC 52-B n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a

L12 MCB/VTS

L13 CB1 CloseMan

L14 CB2 CloseMan

L15 Not Used

L16 Stub Bus En n/a n/a n/a

P545

Function

L1 Inhibit Diff

L2 Interlock

L3 Aid 1 Receive

L4 Aid 1 COS/LGS

L5 Reset LEDs

L6 Ext Trip A

L7 Ext Trip B

L8 Ext Trip C

L9 CB AuxA 52-B

L10 CB AuxB 52-B

L11 CB AuxC 52-B

L12 MCB/VTS

L13 CB Close Man

L14 Reset Lckout

L15 CB Healthy

L16 BAR

L17 PIT

L18 Prop Dly Eq

L19 IM64 1

L20 IM64 2

L21 IM64 3

L22 IM64 4

L23 Not Used

L24 Not Used

L25 Not Used

L26 Not Used

L27 Not Used

L28 Not Used

L29 Not Used

L30 Not Used

L31 Not Used

L32 Not Used n/a n/a n/a n/a n/a n/a

P546

Function

L1 Inhibit Diff

L2 BAR

L3 Aid 1 Receive

L4 Aid 1 COS/LGS

L5 Reset LEDs

L6 CB2 AuxA 52-B

L7 CB2 AuxB 52-B

L8 CB2 AuxC 52-B

L9 CB AuxA 52-B

L10 CB AuxB 52-B

L11 CB AuxC 52-B

L12 MCB/VTS

L13 CB1 CloseMan

L14 CB2 CloseMan

L15 CB1 Healthy

L16 Stub Bus En

L17 CB2 Healthy

L18 IM64

L19 CB1 Ext Trip A

L20 CB1 Ext Trip B

L21 CB1 Ext Trip C

L22 CB2 Ext Trip A

L23 CB2 Ext Trip B

L24 CB2 Ext Trip C n/a n/a

P54x/EN PL/Nd5 Page (PL) 8-69

(PL) 8 Programmable Logic Logic Input and Output Mappings

4.2 Standard Relay Output Contact Mappings

The default mappings for each of the relay output contacts appear in Table 4 and Table 5

7

8

5

6

9

10

11

3

4

1

2

Relay

Contact

No

12

13

14

Relay text

Output R1

Output R2

Output R3

Output R4

Output R5

Output R6

Output R7

Output R8

Output R9

Output R10

Output R11

Output R12

Output R13

Output R14

Note

Relay conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Straight-through

P543

Function

R1 Trip Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB Fail Time1

R7 Cntl CB Close

R8 Cntl CB Trip

R9 Trip A

R10 Trip B

R11 Trip C

R12 AR in Prog

R13 SuccessClose

R14 AR Lockout

Relay conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

P544

Function

R1 Trip Diff/Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB1 Fail1Trip

R7 Cntl CB1 Close

R8 Cntl CB1 Trip

R9 Trip A

R10 Trip B

R11 Trip C

R12 CB2 Fail1Trip

R13 CntlCB2Close

R14 Cntl CB2Trip

A fault record can be generated by connecting one or a number of contacts to the Fault Record Trigger in PSL. It is recommended that the triggering contact be ‘self reset’ and not a latching. If a latching contact were chosen the fault record would not be generated until the contact had fully reset.

Table 4 - Default relay output contact mappings for P543 and P544

P545

11

12

13

14

15

16

5

6

7

8

9

10

3

4

1

2

Relay

Contact

No

Relay Text

Output R1

Output R2

Output R3

Output R4

Output R5

Output R6

Output R7

Output R8

Output R9

Output R10

Output R11

Output R12

Output R13

Output R14

Output R15

Output R16

Relay Conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Function

R1 Trip Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB Fail Time1

R7 Cntl CB Close

R8 Cntl CB Trip

R9 Trip A

R10 Trip B

R11 Trip C

R12 AR in Prog

R13 SuccessClose

R14 AR Lockout

R15 AR InService

R16 BAR

Relay Conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

P546

Function

R1 Trip Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB1 Fail1Trip

R7 Cntl CB1 Close

R8 Cntl CB1 Trip

R9 CB1 Trip A

R10 CB1 Trip B

R11 CB1 Trip C

R12 CB2 Fail1Trip

R13 CntlCB2Close

R14 Cntl CB2Trip

R15 CB1 Fail2Trip

R16 CB2 Fail2Trip

Page (PL) 8-70 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

29

30

31

32

25

26

27

28

21

22

23

24

Relay

Contact

No

17

18

19

20

Relay Text

Output R17

Output R18

Output R19

Output R20

Output R21

Output R22

Output R23

Output R24

Output R25

Output R26

Output R27

Output R28

Output R29

Output R30

Output R31

Output R32

Note

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Relay Conditioner

P545

Function

R17 Trip A

R18 Trip B

R19 Trip C

R20 DistInst Trp

R21 Dist Dly Trp

R22 Aid DEF Trip

R23 Any Start

R24 Aid 1 Send

R25 GPS Fail

R26 Diff Trip

R27 VTS

R28 PSB

R29 IM64 2

R30 IM64 3

R31 IM64 4

R32 Not Used

Relay Conditioner

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

P546

Function

R17 CB2 Trip A

R18 CB2 Trip B

R19 CB2 Trip C

R20 DistInst Trp

R21 Dist Dly Trp

R22 Aid DEF Trip

R23 Any Start

R24 Aid 1 Send

R25 GPS Fail

R26 Diff Trip

R27 VTS

R28 PSB

R29 AR CB1 Lockout

R30 AR CB2 Lockout

R31 ARIP

R32 SuccessClose

A fault record can be generated by connecting one or a number of contacts to the Fault Record Trigger in PSL. It is recommended that the triggering contact be ‘self reset’ and not a latching. If a latching contact were chosen the fault record would not be generated until the contact had fully reset.

Table 5 - Default relay output contact mappings for P545 and P546

P54x/EN PL/Nd5 Page (PL) 8-71

(PL) 8 Programmable Logic Logic Input and Output Mappings

4.3 Optional High Break Relay Output Contact Mappings

The default mappings for each of the standard and high break relay output contacts

appear in Table 6 to Table 9:

7

8

9

10

11

12

13

5

6

3

4

1

2

Relay

Contact

No

14

15

16

17

18

19

20

21

22

3

4

5

1

2

8

9

6

7

Relay

Contact

No

Output R1

Output R2

Output R3

Output R4

Output R5

Output R6

Output R7

Output R8

Output R9

Relay Text P543 Relay

Conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

HBC Dwell 100 ms

HBC Dwell 100 ms

P543

Function

R1 Trip Diff/Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB Fail Time1

R7 Cntl CB Close

R8 Trip A

R9 Trip B

P543 Relay

Conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Dwell 100 ms

Dwell 100 ms

10

11

Output R10 HBC

Output R11 HBC

HBC = High-Break Contact

Dwell 100 ms

Dwell 100 ms

R10 Trip C

R11 Any Trip

Dwell 100 ms

Dwell 100 ms

Table 6 - Default standard and high break output contact mappings for P543 and P544

P544

Function

R1 Trip Diff/Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB1 Fail1Trip

R7 CB2 Fail1Trip

R8 Trip A

R9 Trip B

R10 Trip C

R11 Any Trip

P545 relay text

Output R1

Output R2

Output R3

Output R4

Output R5

Output R6

Output R7

Output R8

Output R9

Output R10

Output R11

Output R12

Output R13

Output R14

Output R15

Output R16

Output R17

Output R18

Output R19

Output R20

Output R21

Output R22

P545 relay conditioner

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

Straight-through

Straight-through

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

R1 Trip Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

R6 CB Fail Time1

R7 Cntl CB Close

R8 Cntl CB Trip

R9 Trip A

R10 Trip B

R11 Trip C

R12 AR in Prog

R13 SuccessClose

R14 AR Lockout

R15 AR InService

R16 Aid 1 Send

R17 Trip A

R18 Trip B

R19 Trip C

R20 Any Trip

R21 Trip A

R22 Trip B

Function

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

Page (PL) 8-72 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

Relay

Contact

No

23

24

P545 relay text

Output R23

Output R24

HBC = High-Break Contact

P545 relay conditioner

Dwell 100 ms

Dwell 100 ms

R23 Trip C

R24 Any Trip

Table 7 - Default standard and high break output contact mappings for P545

3

4

1

2

Relay

Contact

No

P546 relay text P546 relay conditioner

Note This table shows the P546 model with 8 standard outputs and 12 high break outputs.

5

Output R1

Output R2

Output R3

Output R4

Output R5

Straight-through

Straight-through

Dwell 100 ms

Dwell 500 ms

Straight-through

R1 Trip Z1

R2 SignalingFail

R3 Any Trip

R4 General Alarm

R5 IM64 1

Function

High break contact

High break contact

14

15

16

17

18

19

20

21

22

23

10

11

12

13

8

9

6

7

3

4

5

Relay

Contact

No

P546 relay text P546 relay conditioner Function

Note This table shows the P546 model with 16 standard outputs and 8 high break outputs (Option S).

1 Output R1 Straight-through R1 Trip Z1

2 Output R2 Straight-through R2 SignalingFail

Output R3

Output R4

Output R5

Dwell 100 ms

Dwell 500 ms

Straight-through

R3 Any Trip

R4 General Alarm

R5 IM64 1

Output R6

Output R7

Output R8

Output R9

Output R10

Output R11

Output R12

Output R13

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Straight-through

R6 CB1 Fail1Trip

R7 Cntl CB1 Close

R8 Cntl CB1 Trip

R9 CB1 Trip A

R10 CB1 Trip B

R11 CB1 Trip C

R12 Any Start

R13 CntlCB2Close

Output R14

Output R15

Output R16

Output R17

Output R18

Output R19

Output R20

Output R21

Output R22

Output R23

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

R14 Cntl CB2Trip

R15 CB2 Fail1Trip

R16 Aid 1 Send

R17 CB1 Trip A

R18 CB1 Trip B

R19 CB1 Trip C

R20 CB1 Trip 3ph

R21 CB2 Trip A

R22 CB2 Trip B

R23 CB2 Trip C

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

24 Output R24 Dwell 100 ms R24 CB2 Trip 3ph High break contact

Table 8 - Default standard and high break output contact mappings for P546 (16 standard and 8 high break)

Function

P54x/EN PL/Nd5 Page (PL) 8-73

(PL) 8 Programmable Logic Logic Input and Output Mappings

14

15

16

17

10

11

12

13

8

9

6

7

Relay

Contact

No

P546 relay text P546 relay conditioner Function

Output R6

Output R7

Output R8

Output R9

Output R10

Output R11

Output R12

Output R13

Output R14

Output R15

Output R16

Output R17

Dwell 100 ms

Straight-through

Straight-through

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

R6 CB1 Fail1Trip

R7 Cntl CB1 Close

R8 Cntl CB1 Trip

R9 CB1 Trip A

R10 CB1 Trip B

R11 CB1 Trip C

R12 CB2 Fail1Trip

R13 CntlCB2Close

R14 Cntl CB2Trip

R15 CB1 Fail2Trip

R16 CB2 Fail2Trip

R17 CB2 Trip A

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

High break contact

18

19

20

Output R18

Output R19

Output R20

Dwell 100 ms

Dwell 100 ms

Dwell 100 ms

R18 CB2 Trip B

R19 CB2 Trip C

R20 DistInst Trp

High break contact

High break contact

High break contact

Table 9 - Default standard and high break output contact mappings for P546 (8 standard and 12 high break)

Page (PL) 8-74 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

4.4 Programmable LED Output Mappings

The default mappings for each of the programmable LEDs appear in Table 10 to Table

12.

11

12

8

9

10

6

7

4

5

1

2

3

LED No

6

7

8

9

10

11

12

13

14

15

1

4

5

2

3

LED No LED Input connection/text

LED 1 Red

LED 2 Red

LED 3 Red

LED 4 Red

LED 5 Red

LED 6 Red

LED 7 Red

LED 8 Red

FnKey LED1 Red

FnKey LED2 Red

FnKey LED3 Red

FnKey LED4 Red

FnKey LED5 Red

FnKey LED6 Red

FnKey LED7 Red

16

17

18

FnKey LED8 Red

FnKey LED9 Red

FnKey LED10 Red

No

No

No

Table 10 - Default mappings for programmable LEDs for P543

No

No

No

No

No

No

No

No

No

No

Latched

Yes

Yes

Yes

No

No

LED input connection/text

LED 1 Red

LED 2 Red

LED 3 Red

LED 4 Red

LED 5 Red

LED 6 Red

LED 7 Red

LED 8 Red

FnKey LED1 Red

FnKey LED1 Green

FnKey LED1 Amber

FnKey LED2 Red

FnKey LED2 Green

FnKey LED2 Amber

FnKey LED3 Red

FnKey LED3 Green

FnKey LED3 Amber

FnKey LED4 Red

FnKey LED4 Green

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

Latched

Yes

Yes

Yes

Diff Trip

P543 LED function indication

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

AR in Progress

AR Lockout

Test Loopback

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Diff Trip

P544 LED function indication

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

Not Used

Test Loopback

AR In Service

CB1 A Open

CB1 A Closed

Not Mapped

CB1 B Open

CB1 B Closed

Not Mapped

CB1 C Open

CB1 C Closed

Not Mapped

CB1 AR Lockout

Not Mapped

P54x/EN PL/Nd5 Page (PL) 8-75

(PL) 8 Programmable Logic Logic Input and Output Mappings

3

4

1

2

17

18

13

14

15

16

8

9

6

7

10

11

12

3

4

5

1

2

LED No

14

15

16

17

13

LED No LED input connection/text

FnKey LED4 Amber

FnKey LED5 Red

FnKey LED5 Green

FnKey LED5 Amber

Funky LED6 Red

FnKey LED6 Green

FnKey LED6 Amber

Funky LED7 Red

FnKey LED7 Green

FnKey LED7 Amber

Funky LED8 Red

FnKey LED8 Green

FnKey LED8 Amber

Funky LED9 Red

FnKey LED9 Green

18

FnKey LED9 Amber

Funky LED10 Red

FnKey LED10 Green

FnKey LED10 Amber

No

No

No

No

Table 11 - Default mappings for programmable LEDs for P544

No

No

No

No

No

No

No

No

No

No

No

Latched

No

No

No

No

LED input connection/text

LED 1 Red

LED 2 Red

LED 3 Red

LED 4 Red

LED 5 Red

LED 6 Red

LED 7 Red

LED 8 Red

Funky LED1 Red

Funky LED2 Red

Funky LED3 Red

Funky LED4 Red

Funky LED5 Red

Funky LED6 Red

Funky LED7 Red

Funky LED8 Red

Funky LED9 Red

Funky LED10 Red

LED 1 Red

LED 2 Red

LED 3 Red

LED 4 Red

No

No

No

No

No

No

Yes

Yes

Yes

No

No

No

No

No

No

No

No

Latched

Yes

Yes

Yes

No

No

P544 LED function indication

Not Mapped

Not Mapped

CB1 AR Successful

CB1 ARIP

CB2 A Open

CB2 A Closed

Not Mapped

CB2 B Open

CB2 B Closed

Not Mapped

CB2 C Open

CB2 C Closed

Not Mapped

CB2 AR Lockout

Not Mapped

Not Mapped

Not Mapped

CB2 AR Successful

CB2 ARIP

Diff Trip

P545 LED function indication

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Any Start

AR in Progress

AR Lockout

Test Loopback

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Not Mapped

Diff Trip

Dist Inst Trip

Dist Delay Trip

Signaling Fail

Page (PL) 8-76 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

17

15

16

13

14

11

12

9

10

7

8

5

6

LED No LED input connection/text

LED 5 Red

LED 6 Red

LED 7 Red

LED 8 Red

Funky LED1 Red

FnKey LED1 Green

FnKey LED1 Amber

Funky LED2 Red

FnKey LED2 Green

FnKey LED2 Amber

Funky LED3 Red

FnKey LED3 Green

FnKey LED3 Amber

Funky LED4 Red

FnKey LED4 Green

FnKey LED4 Amber

Funky LED5 Red

FnKey LED5 Green

FnKey LED5 Amber

Funky LED6 Red

FnKey LED6 Green

FnKey LED6 Amber

Funky LED7 Red

FnKey LED7 Green

FnKey LED7 Amber

Funky LED8 Red

FnKey LED8 Green

FnKey LED8 Amber

Funky LED9 Red

FnKey LED9 Green

18

FnKey LED9 Amber

Funky LED10 Red

FnKey LED10 Green

FnKey LED10 Amber

No

No

No

No

Table 12 - Default mappings for programmable LEDs for P545

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

Latched

No

No

No

No

P545 LED function indication

Any Start

Not Used

Test Loopback

AR In Service

CB1 A Open

CB1 A Closed

Not Mapped

CB1 B Open

CB1 B Closed

Not Mapped

CB1 C Open

CB1 C Closed

Not Mapped

CB1 AR Lockout

Not Mapped

Not Mapped

Not Mapped

CB1 AR Successful

CB1 ARIP

CB2 A Open

CB2 A Closed

Not Mapped

CB2 B Open

CB2 B Closed

Not Mapped

CB2 C Open

CB2 C Closed

Not Mapped

CB2 AR Lockout

Not Mapped

Not Mapped

Not Mapped

CB2 AR Successful

CB2 ARIP

P54x/EN PL/Nd5 Page (PL) 8-77

(PL) 8 Programmable Logic

4.5

4.6

4.7

Logic Input and Output Mappings

Fault Recorder Start Mappings

The default mappings for the signal which initiates a fault record is as shown below:

Initiating Signal

DDB Any Trip (522)

Fault Trigger

Initiate fault recording from main protection trip

Table 13 - Fault Recorder Start Mappings

PSL Data Column

The relay contains a PSL DATA column that can be used to track PSL modifications. A total of 12 cells are contained in the PSL DATA column, 3 for each setting group. The function for each cell is shown below:

Grp PSL Ref

18 Nov 2002

08:59:32.047

Grp 1 PSL ID -

2062813232

When downloading a PSL to the relay, the user will be prompted to enter which groups the PSL is for and a reference ID. The first 32 characters of the reference ID will be displayed in this cell.

The  and  keys can be used to scroll through 32 characters as only 16 can be displayed at any one time.

This cell displays the date and time when the PSL was down loaded to the relay.

This is a unique number for the PSL that has been entered. Any change in the PSL will result in a different number being displayed.

Note The above cells are repeated for each setting group.

PSL Signal Grouping Modes

There are now four additional DDB Group Sig x Nodes that can be mapped to individual or multiple DDBs in the PSL. These can then be set to trigger the DR via the

DISTURBANCE RECORD menu.

These "Nodes" are general and can also be used to group signals together in the PSL for any other reason. These four nodes are available in each of the four PSL setting groups.

Number PSL Group Sig

992

993

994

PSL Group Sig 1

PSL Group Sig 2

PSL Group Sig 3

995 PSL Group Sig 4

1. For a control input, the DR can be triggered directly by triggering directly from the

Individual Control Input (e.g. Low to High (L to H) change)

2. For an input that cannot be triggered directly, or where any one of a number of

DDBs are required to trigger a DR, map the DDBs to the new PSL Group sig n and then trigger the DR on this. e.g. in the PSL:

Page (PL) 8-78 P54x/EN PL/Nd5

Logic Input and Output Mappings (PL) 8 Programmable Logic

In the DR Settings:

• Digital Input 1 is triggered by the PSL Group Sig 1 (L to H)

• Digital Input 2 is triggered by Control Input 1 (L to H)

P54x/EN PL/Nd5

If triggering on both edges is required map another DR channel to the H/L as well

Digital Input 4 is triggered by the PSL Group Sig 1 (H to L)

Digital Input 5 is triggered by Control Input 1 (H to L)

Page (PL) 8-79

(PL) 8 Programmable Logic

5

5.1

5.2

Viewing and Printing Default PSL Diagrams

VIEWING AND PRINTING DEFAULT PSL DIAGRAMS

Typical Mappings

It is possible to view and print the default PSL diagrams for the device. Typically, these diagrams allow you to see these mappings:

Opto Input Mappings

Output Relay Mappings

LED Mappings

Start Indications

Phase Trip Mappings

System Check Mapping

Important The following PSL diagrams show the DDB numbers for a specific MiCOM product, with a specific software version to run on a specific hardware platform. Descriptions, DDB Numbers,

Inputs and Outputs may vary for different products, software or hardware.

Download and Print PSL Diagrams

To download and print the default PSL diagrams for the device:

1. Close MiCOM S1 Studio.

2. Select Programs > then navigate through to > MiCOM S1 Studio > Data Model

Manager .

3. Click Add then Next .

4. Click Internet then Next .

5. Select your language then click Next .

6. From the tree view, select the model and software version.

7. Click Install . When complete click OK .

8. Close the Data Model Manager and start MiCOM S1 Studio.

9. Select Tools > PSL Editor (Px40).

10. In the PSL Editor select File > Open .

The downloaded psl files are in C:\Program

Files\ directory located in the \MiCOM S1\Courier\PSL\Defaults sub-directory.

11. Highlight the required psl diagram and select File > Print .

Page (PL) 8-80 P54x/EN PL/Nd5

MICOM P543 with Distance PSL

6

6.1

Input L1

DDB #032

Input L2

DDB #033

Input L3

DDB #034

Input L4

DDB #035

(PL) 8 Programmable Logic

MICOM P543 WITH DISTANCE PSL

Output Input Mappings

Inhibit C Diff

DDB #455

Recon Interlock

DDB #456

Aided1 Scheme Rx

DDB #493

Aided 1 COS/LGS

DDB #492

Input L6

DDB #037

Input L7

DDB #038

Input L8

DDB #039

Input L9

DDB #040

Input L10

DDB #041

Input L11

DDB #042

Input L12

DDB #043

Input L13

DDB #044

Input L14

DDB #045

Input L15

DDB #046

External Trip A

DDB #535

External Trip B

DDB #536

External Trip C

DDB #537

CB Aux A(52-B)

DDB #425

CB Aux B(52-B)

DDB #426

CB Aux C(52-B)

DDB #427

MCB/VTS

DDB #438

Init Close CB

DDB #440

Reset Lockout

DDB #446

CB Healthy

DDB #436

Opto L5 & L16 can be found on other pages

External Trips:

Initiate Breaker

Auto-reclose

(if enabled).

P0701ENa

P54x/EN PL/Nd5 Page (PL) 8-81

(PL) 8 Programmable Logic

6.2 Output Contacts

MICOM P543 with Distance PSL

Page (PL) 8-82 P54x/EN PL/Nd5

MICOM P543 with Distance PSL

6.3 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-83

(PL) 8 Programmable Logic

6.4 LEDs

MICOM P543 with Distance PSL

Page (PL) 8-84 P54x/EN PL/Nd5

MICOM P543 with Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-85

(PL) 8 Programmable Logic MICOM P543 with Distance PSL

Page (PL) 8-86 P54x/EN PL/Nd5

MICOM P543 with Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-87

(PL) 8 Programmable Logic MICOM P543 with Distance PSL

Page (PL) 8-88 P54x/EN PL/Nd5

MICOM P543 with Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-89

(PL) 8 Programmable Logic MICOM P543 with Distance PSL

Page (PL) 8-90 P54x/EN PL/Nd5

MICOM P543 with Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-91

(PL) 8 Programmable Logic MICOM P543 with Distance PSL

Page (PL) 8-92 P54x/EN PL/Nd5

MICOM P543 with Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-93

(PL) 8 Programmable Logic

7

7.1

MiCOM P543 Without Distance PSL

MICOM P543 WITHOUT DISTANCE PSL

Output Input Mappings

Page (PL) 8-94 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL

7.2 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-95

(PL) 8 Programmable Logic

7.3 Output Contacts

MiCOM P543 Without Distance PSL

Page (PL) 8-96 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL

7.4 LEDs

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-97

Diff Start C

DDB #740

I>1 Start C

DDB #764

I>2 Start C

DDB #768

I>3 Start C

DDB #772

I>4 Start C

DDB #776

Diff Start B

DDB #739

I>1 Start B

DDB #763

I>2 Start B

DDB #767

I>3 Start B

DDB #771

I>4 Start B

DDB #775

(PL) 8 Programmable Logic

Diff Start A

DDB #738

I>1 Start A

DDB #762

I>2 Start A

DDB #766

I>3 Start A

DDB #770

I>4 Start A

DDB #774

1

1

MiCOM P543 Without Distance PSL

Start Phase Mappings.

Used in Fault Record & on LCD Display

Started Phase A

DDB #956 remove "Started

Phase" DDB signals

1

Started Phase B

DDB #957

1

Started Phase C

DDB #958

P0718ENa

Page (PL) 8-98 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-99

(PL) 8 Programmable Logic MiCOM P543 Without Distance PSL

Page (PL) 8-100 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-101

(PL) 8 Programmable Logic MiCOM P543 Without Distance PSL

Page (PL) 8-102 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-103

(PL) 8 Programmable Logic MiCOM P543 Without Distance PSL

Page (PL) 8-104 P54x/EN PL/Nd5

MiCOM P543 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-105

(PL) 8 Programmable Logic

8

8.1

MICOM P544 WITH DISTANCE PSL

Output Input Mappings

MiCOM P544 With Distance PSL

Page (PL) 8-106 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL

8.2 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-107

(PL) 8 Programmable Logic

8.3 Output Contacts

MiCOM P544 With Distance PSL

Page (PL) 8-108 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL

8.4 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-109

(PL) 8 Programmable Logic MiCOM P544 With Distance PSL

Page (PL) 8-110 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-111

(PL) 8 Programmable Logic MiCOM P544 With Distance PSL

Page (PL) 8-112 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-113

(PL) 8 Programmable Logic MiCOM P544 With Distance PSL

Page (PL) 8-114 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-115

(PL) 8 Programmable Logic MiCOM P544 With Distance PSL

Page (PL) 8-116 P54x/EN PL/Nd5

MiCOM P544 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-117

(PL) 8 Programmable Logic MiCOM P544 With Distance PSL

Page (PL) 8-118 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL

9

9.1

(PL) 8 Programmable Logic

MICOM P544 WITHOUT DISTANCE PSL

Output Input Mappings

P54x/EN PL/Nd5 Page (PL) 8-119

(PL) 8 Programmable Logic

9.2 Output Contacts

MiCOM P544 Without Distance PSL

Page (PL) 8-120 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL

9.3 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-121

(PL) 8 Programmable Logic

9.4 Output Contacts

MiCOM P544 Without Distance PSL

Page (PL) 8-122 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL

9.5 LEDs

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-123

(PL) 8 Programmable Logic MiCOM P544 Without Distance PSL

Page (PL) 8-124 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-125

(PL) 8 Programmable Logic MiCOM P544 Without Distance PSL

Page (PL) 8-126 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-127

(PL) 8 Programmable Logic MiCOM P544 Without Distance PSL

Page (PL) 8-128 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-129

(PL) 8 Programmable Logic MiCOM P544 Without Distance PSL

Page (PL) 8-130 P54x/EN PL/Nd5

MiCOM P544 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-131

(PL) 8 Programmable Logic

10

10.1

MICOM P545 WITH DISTANCE PSL

Output Input Mappings

MiCOM P545 With Distance PSL

Page (PL) 8-132 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL

10.2 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-133

(PL) 8 Programmable Logic

10.3 Output Contacts

MiCOM P545 With Distance PSL

Page (PL) 8-134 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL

10.4 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-135

(PL) 8 Programmable Logic

10.5 LEDs

MiCOM P545 With Distance PSL

Page (PL) 8-136 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-137

(PL) 8 Programmable Logic MiCOM P545 With Distance PSL

Page (PL) 8-138 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-139

(PL) 8 Programmable Logic MiCOM P545 With Distance PSL

Page (PL) 8-140 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-141

(PL) 8 Programmable Logic MiCOM P545 With Distance PSL

Page (PL) 8-142 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-143

(PL) 8 Programmable Logic MiCOM P545 With Distance PSL

Page (PL) 8-144 P54x/EN PL/Nd5

MiCOM P545 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-145

(PL) 8 Programmable Logic

11

11.1

MiCOM P545 Without Distance PSL

MICOM P545 WITHOUT DISTANCE PSL

Output Input Mappings

Page (PL) 8-146 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL

11.2 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-147

(PL) 8 Programmable Logic

11.3 Output Contacts

MiCOM P545 Without Distance PSL

Page (PL) 8-148 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL

11.4 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-149

(PL) 8 Programmable Logic

11.5 LEDs

MiCOM P545 Without Distance PSL

Page (PL) 8-150 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-151

(PL) 8 Programmable Logic MiCOM P545 Without Distance PSL

Page (PL) 8-152 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-153

(PL) 8 Programmable Logic MiCOM P545 Without Distance PSL

Page (PL) 8-154 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-155

(PL) 8 Programmable Logic MiCOM P545 Without Distance PSL

Page (PL) 8-156 P54x/EN PL/Nd5

MiCOM P545 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-157

(PL) 8 Programmable Logic MiCOM P545 Without Distance PSL

Page (PL) 8-158 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL

12

12.1

MICOM P546 WITH DISTANCE PSL

Output Input Mappings

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-159

(PL) 8 Programmable Logic

12.2 Output Contacts

MiCOM P546 With Distance PSL

Page (PL) 8-160 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL

12.3 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-161

(PL) 8 Programmable Logic

12.4 Output Contacts

MiCOM P546 With Distance PSL

Page (PL) 8-162 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL

12.5 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-163

(PL) 8 Programmable Logic MiCOM P546 With Distance PSL

Page (PL) 8-164 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-165

(PL) 8 Programmable Logic MiCOM P546 With Distance PSL

Page (PL) 8-166 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-167

(PL) 8 Programmable Logic MiCOM P546 With Distance PSL

Page (PL) 8-168 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-169

(PL) 8 Programmable Logic MiCOM P546 With Distance PSL

Page (PL) 8-170 P54x/EN PL/Nd5

MiCOM P546 With Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-171

(PL) 8 Programmable Logic

12.6 LEDs

MiCOM P546 With Distance PSL

Page (PL) 8-172 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL

13

13.1

(PL) 8 Programmable Logic

MICOM P546 WITHOUT DISTANCE PSL

Output Input Mappings

P54x/EN PL/Nd5 Page (PL) 8-173

(PL) 8 Programmable Logic

13.2 Output Contacts

MiCOM P546 Without Distance PSL

Page (PL) 8-174 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL

13.3 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-175

(PL) 8 Programmable Logic

13.4 Output Contacts

MiCOM P546 Without Distance PSL

Page (PL) 8-176 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL

13.5 Output Contacts

(PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-177

(PL) 8 Programmable Logic MiCOM P546 Without Distance PSL

Page (PL) 8-178 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-179

(PL) 8 Programmable Logic MiCOM P546 Without Distance PSL

Page (PL) 8-180 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-181

(PL) 8 Programmable Logic MiCOM P546 Without Distance PSL

Page (PL) 8-182 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-183

(PL) 8 Programmable Logic MiCOM P546 Without Distance PSL

Page (PL) 8-184 P54x/EN PL/Nd5

MiCOM P546 Without Distance PSL (PL) 8 Programmable Logic

P54x/EN PL/Nd5 Page (PL) 8-185

(PL) 8 Programmable Logic

13.6 LEDs

MiCOM P546 Without Distance PSL

Page (PL) 8-186 P54x/EN PL/Nd5

MiCOM P54x (P543, P544, P545 & P546) (MR) 9 Measurements and Recording

MEASUREMENTS AND RECORDING

CHAPTER 9

P54x/EN MR/Nd5 Page (MR) 9-1

(MR) 9 Measurements and Recording MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (MR) 9-2 P54x/EN MR/Nd5

Contents (MR) 9 Measurements and Recording

CONTENTS

1 Introduction

2 Event and Fault Records

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

View Records Column

Types of Event

Change of State of Opto-Isolated Inputs

Change of State of one or more Output Relay Contacts

Relay Alarm Conditions

Protection Element Starts and Trips

General Events

Fault Records

Maintenance Reports

Setting Changes

Resetting of Event/Fault Records

Viewing Event Records via MiCOM S1 Studio Support Software

Event Filtering

3 Disturbance Recorder

4 Measurements

4.1

4.2

4.3

4.4

4.5

4.6

4.6.1

4.6.2

4.6.3

4.7

4.8

4.9

Measured Voltages and Currents

Sequence Voltages and Currents

Slip Frequency

Power and Energy Quantities

RMS. Voltages and Currents

Demand Values

Fixed Demand Values

Rolling Demand Values

Peak Demand Values

Settings

Measurement Display Quantities

Measurements 4 Column:

Page (MR) 9-

17

30

31

31

31

31

32

30

30

30

30

32

33

35

5

6

7

8

8

9

6

7

7

7

9

9

9

10

10

P54x/EN MR/Nd5 Page (MR) 9-3

(MR) 9 Measurements and Recording

TABLES

Table 1 - View records

Table 2 – Alarm conditions and event text/values

Table 3 - Event filtering

Table 4 - Disturbance recorder for digital channel

Table 5 - Measurement setup

Table 6 - Measurement 1, 2, 3 and 4

Tables

Page (MR) 9-

16

28

6

8

32

34

Page (MR) 9-4 P54x/EN MR/Nd5

Introduction

1

(MR) 9 Measurements and Recording

INTRODUCTION

The relay is equipped with integral measurements, event, fault and disturbance recording facilities suitable for analysis of complex system disturbances.

The relay is flexible enough to allow for the programming of these facilities to specific user application requirements. These requirements are discussed in the sections which follow.

P54x/EN MR/Nd5 Page (MR) 9-5

(MR) 9 Measurements and Recording

2

2.1

Event and Fault Records

EVENT AND FAULT RECORDS

The relay records and time tags up to 250 or 512 events (only up to 250 events in the

P24x and P44x) and stores them in non-volatile (battery-backed up) memory. This lets the system operator establish the sequence of events that occurred in the relay following a particular power system condition or switching sequence. When the available space is used up, the oldest event is automatically overwritten by the new one (i.e. first in, first out).

The relay’s real-time clock provides the time tag to each event, to a resolution of 1 ms.

The event records can be viewed either from the front plate LCD or remotely using the communications ports (using any available protocols, such as Courier or MODBUS).

For local viewing on the LCD of event, fault and maintenance records, select the VIEW

RECORDS menu column.

For extraction from a remote source using communications, see the SCADA

Communications chapter or the MiCOM S1 Studio instructions.

For a full list of all the event types and the meaning of their values, see the Menu

Database document.

View Records Column

VIEW RECORDS

LCD reference

Select Event

Time & Date

Event Text

Event Value

Select Fault

Select Maint.

Maint. Text

Maint. Type/Main

Data

Reset Indication

Description

Setting range from 0 to 511. This selects the required event record from the possible 512 that may be stored. A value of 0 corresponds to the latest event and so on.

Time & Date Stamp for the event given by the internal Real Time Clock.

Up to 32 Character description of the Event refer to following sections).

Up to 32 Bit Binary Flag or integer representative of the Event (refer to following sections).

Setting range from 0 to 14. This selects the required fault record from the possible 15 that may be stored. A value of 0 corresponds to the latest fault and so on.

The following cells show all the fault flags, protection starts, protection trips, fault location, measurements etc. associated with the fault, i.e. the complete fault record.

Setting range from 0 to 9. This selects the required maintenance report from the possible 10 that may be stored. A value of 0 corresponds to the latest report and so on.

Up to 16 Character description of the occurrence (refer to following sections).

These cells are numbers representative of the occurrence. They form a specific error code which should be quoted in any related correspondence to

Report Data.

Either Yes or No. This serves to reset the trip LED indications provided that the relevant protection element has reset.

Table 1 - View records

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Event and Fault Records

2.2

2.3

(MR) 9 Measurements and Recording

Types of Event

An event may be a change of state of a control input or output relay, an alarm condition, or a setting change. The following sections show the various items that constitute an event:

Change of State of Opto-Isolated Inputs

If one or more of the opto (logic) inputs has changed state since the last time the protection algorithm ran, the new status is logged as an event. When this event is selected to be viewed on the LCD, three cells appear, as in shown here:

Time & date of event

“LOGIC INPUTS1”

“Event Value 0101010101010101”

The Event Value is a multi-bit word (see note) showing the status of the opto inputs, where the least significant bit (extreme right) corresponds to opto input 1. The same information is present if the event is extracted and viewed using a PC.

Note For P24x or P44x the Event Value is an 8 or 16 bit word.

For P34x or P64x it is an 8, 12, 16, 24 or 32-bit word.

For P445 it is an 8, 12 or 16-bit word.

For P44y, P54x, P547 or P841, it is an 8, 12, 16 or 24-bit word.

For P74x it is a 12, 16, 24 or 32-bit word.

For P746 or P849 it is a 32-bit word.

2.4 Change of State of one or more Output Relay Contacts

If one or more of the output relay contacts have changed state since the last time the protection algorithm ran, the new status is logged as an event. When this event is selected to be viewed on the LCD, three cells appear, as shown here:

Time and Date of Event

Output Contacts

Event Value 010101010101010101010

The Event Value is a multi-bit word (see Note) showing the status of the output contacts, where the least significant bit (extreme right) corresponds to output contact 1, etc. The same information is present if the event is extracted and viewed using a PC.

Note For P24x the Event Value is is a 7 or 16-bit word.

For P34x or P64x it is an 7, 11, 14, 15, 16, 22, 24 or 32-bit word.

For P445 it is an 8, 12 or 16-bit word.

For P44x it is a 7, 14 or 21 bit word.

For P44y, P54x, P547 or P841, it is an 8, 12, 16, 24 or 32 bit word.

For P74x it is a 12, 16, 24 or 32 bit word.

For P746 or P849 it is a 24-bit word.

2.5 Relay Alarm Conditions

Any alarm conditions generated by the relays are logged as individual events. The following table shows examples of some of the alarm conditions and how they appear in the event list:

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(MR) 9 Measurements and Recording

2.6

2.7

Event and Fault Records

Alarm condition

Battery Fail

Event text

Battery Fail ON/OFF

Field Voltage Fail Field Volt Fail ON/OFF

Setting Group via Opto Invalid Setting Grp. Invalid ON/OFF

Protection Disabled Prot’n. Disabled ON/OFF

Frequency out of Range

VTS Alarm

CB Trip Fail Protection

Freq. out of Range ON/OFF

VT Fail Alarm ON/OFF

CB Fail ON/OFF

Event value

Bit position 0 in 32 bit field

Bit position 1 in 32 bit field

Bit position 2 in 32 bit field

Bit position 3 in 32 bit field

Bit position 4 in 32 bit field

Bit position 5 in 32 bit field

Bit position 7 in 32 bit field

Table 2 – Alarm conditions and event text/values

The previous table shows the abbreviated description given to the various alarm conditions and a corresponding value between 0 and 31. This value is appended to each alarm event in a similar way to the input and output events described previously. It is used by the event extraction software, such as MiCOM S1 Studio, to identify the alarm and is therefore invisible if the event is viewed on the LCD. ON or OFF is shown after the description to signify whether the particular condition has become operated or has reset.

Protection Element Starts and Trips

Any operation of protection elements, (either a start or a trip condition) is logged as an event record, consisting of a text string indicating the operated element and an event value. This value is intended for use by the event extraction software, such as MiCOM S1

Studio, rather than for the user, and is invisible when the event is viewed on the LCD.

General Events

Several events come under the heading of General Events . An example appears here.

Nature of event Displayed text in event record Displayed value

Password modified, either from the front or the rear port.

PW modified F, R or R2

0 F=11, R=16, R2=38. For P44x, the value displayed is 0.

A complete list of the General Events is in the Relay Menu Database document. This is a separate document, for each MiCOM Px4x product or product range. They are normally available for download from www.schneider-electric.com

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Event and Fault Records

2.8

2.9

2.10

2.11

(MR) 9 Measurements and Recording

Fault Records

Each time a fault record is generated, an event is also created. The event states that a fault record was generated, with a corresponding time stamp.

Further down the VIEW RECORDS column, select the Select Fault cell to view the actual fault record, which is selectable from up to 5, 15 or 20 records (see Note). These records consist of fault flags, fault location, fault measurements, etc. The time stamp given in the fault record is more accurate than the corresponding stamp given in the event record as the event is logged some time after the actual fault record is generated.

Note Up to 5 records for the P14x, P24x, P34x, P44x and P74x.

Up to 15 records for the P445, P44y, P54x, P547 and P841.

Up to 20 records for the P746.

The fault record is triggered from the Fault REC. TRIG.

signal assigned in the default programmable scheme logic. Normally this is assigned to relay 3, protection trip, but in the P746 it is assigned to Any Start or Any Trip. The fault measurements in the fault record are given at the time of the protection start.

The fault recorder does not stop recording until any start or relay 3 (protection trip) resets in order to record all the protection flags during the fault.

It is recommended that the triggering contact (relay 3 for example) be ‘self reset’ and not latching. If a latching contact were chosen the fault record would not be generated until the contact had fully reset.

Maintenance Reports

Internal failures detected by the self-monitoring circuitry, such as watchdog failure, field voltage failure etc. are logged into a maintenance report. The maintenance report holds up to 10 such ‘ events ’ (only 5 events for the P24x/P54x/P547) and is accessed from the

" Select Report " cell at the bottom of the " VIEW RECORDS " column.

Each entry consists of a self explanatory text string and a ‘ Type ’ and ‘ Data ’ cell, which are explained in the menu extract at the beginning of this section.

Each time a Maintenance Report is generated, an event is also created. The event simply states that a report was generated, with a corresponding time stamp.

Setting Changes

Changes to any setting in the relay are logged as an event. For example:

Type of setting change

Control/Support Setting

Group # Change

Where # = 1 to 4

Displayed text in event record

C & S Changed

Group # Changed

22

#

Displayed value

Note Control/Support settings are communications, measurement, CT/VT ratio settings etc, which are not duplicated in the setting groups. When any of these settings are changed, the event record is created simultaneously.

Changes to protection or disturbance recorder settings only generate an event once the settings have been confirmed at the ‘setting trap’.

Resetting of Event/Fault Records

To delete the event, fault or maintenance reports, use the RECORD CONTROL column.

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(MR) 9 Measurements and Recording Event and Fault Records

2.12 Viewing Event Records via MiCOM S1 Studio Support Software

When the event records are extracted and viewed on a PC they look slightly different than when viewed on the LCD. The following shows an example of how various events appear when displayed using MiCOM S1 Studio:

Monday 24 October 2008 15:32:49 GMT I>1 Start ON

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 00 Row: 23

Event Type: Protection operation

Monday 24 October 2008 15:32:52 GMT Fault Recorded

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 01 Row: 00

Event Type: Fault record

Monday 24 October 2008 15:33:11 GMT Logic Inputs

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 00 Row: 20

Event Type: Logic input changed state

Monday 24 October 2008 15:34:54 GMT Output Contacts

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 00 Row: 21

Event Type: Relay output changed state

Monday 24 October 2008 15:35:55 GMT A/R Lockout ON

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 00 Row: 22

Event Type: Alarm event

Tuesday 25 October 2016 20:18:22.988 GMT Zone 1 Trip ON

MiCOM : MiCOM P54x

Model Number: P543218A1M054/50K

Address: 001 Column: 0F Row: 30

Event Type: Setting event

The first line gives the description and time stamp for the event, while the additional information displayed below may be collapsed using the +/– symbol.

For further information regarding events and their specific meaning, refer to the Relay

Menu Database document. This standalone document not included in this manual.

2.13 Event Filtering

Event reporting can be disabled from all interfaces that support setting changes. The settings that control the various types of events are in the RECORD CONTROL column.

The effect of setting each to disabled is in shown in the following table:

Note Some occurrences can result in more than one type of event, e.g. a battery failure will produce an alarm event and a maintenance record event.

MENU TEXT

If the Protection Event setting is Enabled, a further set of settings is revealed which allow the event generation by individual DDB signals to be enabled or disabled.

For further information on events and their specific meaning, see the Relay Menu

Database document.

Col Row

RECORD CONTROL 0B 0 0

Default Setting

Description

Available Setting

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Event and Fault Records (MR) 9 Measurements and Recording

MENU TEXT

Clear Events

Col Row Default Setting

Description

This column contains settings for Record Controls

0B 1 No 0 = No or 1 = Yes

Available Setting

Clear Event records

Clear Faults

Clear Fault records

Clear Maint

0B 2 No 0 = No or 1 = Yes

0B 3 No 0 = No or 1 = Yes

Clear Maintenance records

Alarm Event 0B 4 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that all the occurrences that produce an alarm will result in no event being generated.

Relay O/P Event 0B 5 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any change in logic state.

Opto Input Event 0B 6 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any change in logic input state.

General Event 0B 7 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no General Events will be generated

Fault Rec Event 0B 8 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any fault that produces a fault record

Maint Rec Event 0B 9 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that no event will be generated for any occurrence that produces a maintenance record.

Protection Event 0B 0A Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that any operation of protection elements will not be logged as an event

Flt Rec Extended 0B 2F Disabled 0 = Disabled or 1 = Enabled

When this setting is disabled, the fault record contains a snap shot of the local, remote, differential and bias currents taken 1 cycle after the trip.

With this setting enabled an additional snap shot of local, remote, differential and bias currents taken at the time the differential trips is included in the fault record.

Clear Dist Recs 0B

Clear Disturbance records

30 No 0 = No or 1 = Yes

Security Event 0B 31 Enabled 0 = Disabled or 1 = Enabled

Disabling this setting means that any operation of security elements will not be logged as an event

DDB 31 - 0 0B 40 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 63 - 32 0B 41 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 95 - 64 0B 42 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 127 - 96 0B 43 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

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(MR) 9 Measurements and Recording Event and Fault Records

MENU TEXT Col Row Default Setting

Description

Available Setting

DDB 159 - 128 0B 44 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 191 - 160 0B 45 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 223 - 192 0B 46 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 255 - 224 0B 47 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 287 - 256 0B 48 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 319 - 288 0B 49 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 351 - 320 0B 4A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 383 - 352 0B 4B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 415 - 384 0B 4C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 447 - 416 0B 4D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 479 - 448 0B 4E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 511 - 480 0B 4F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 543 - 512 0B 50 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

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Event and Fault Records (MR) 9 Measurements and Recording

MENU TEXT Col Row Default Setting

Description

Available Setting

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 575 - 544 0B 51 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 607 - 576 0B 52 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 639 - 608 0B 53 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 671 - 640 0B 54 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 703 - 672 0B 55 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 735 - 704 0B 56 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 767 - 736 0B 57 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 799 - 768 0B 58 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 831 - 800 0B 59 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 863 - 832 0B 5A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 895 - 864 0B 5B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 927 - 896 0B 5C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

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(MR) 9 Measurements and Recording Event and Fault Records

MENU TEXT Col Row Default Setting

Description

Available Setting

DDB 959 - 928 0B 5D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 991 - 960 0B 5E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1023 - 992 0B 5F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1055 - 1024 0B 60 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1087 - 1056 0B 61 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1119 - 1088 0B 62 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1151 - 1120 0B 63 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1183 - 1152 0B 64 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1215 - 1184 0B 65 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1247 - 1216 0B 66 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1279 - 1248 0B 67 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1311 - 1280 0B 68 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1343 - 1312 0B 69 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

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MENU TEXT Col Row Default Setting

Description

Available Setting

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1375 - 1344 0B 6A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1407 - 1376 0B 6B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1439 - 1408 0B 6C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1471 - 1440 0B 6D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1503 - 1472 0B 6E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1535 - 1504 0B 6F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1567 - 1536 0B 70 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1599 - 1568 0B 71 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1631 - 1600 0B 72 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1663 - 1632 0B 73 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1695 - 1664 0B 74 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1727 - 1696 0B 75 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

P54x/EN MR/Nd5 Page (MR) 9-15

(MR) 9 Measurements and Recording Event and Fault Records

MENU TEXT Col Row Default Setting

Description

Available Setting

DDB 1759 - 1728 0B 76 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1760 - 1791 0B 77 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1792 - 1823 0B 78 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1824 - 1855 0B 79 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1856 - 1887 0B 7A 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1888 - 1919 0B 7B 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1920 - 1951 0B 7C 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1952 - 1983 0B 7D 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 1984 - 2015 0B 7E 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

DDB 2016 - 2047 0B 7F 0xFFFFFFFF

32-bit binary setting: 1 = event recording Enabled, 0 = event recording Disabled

Chooses whether any individual DDBs should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.

Table 3 - Event filtering

Page (MR) 9-16 P54x/EN MR/Nd5

Disturbance Recorder

3

(MR) 9 Measurements and Recording

DISTURBANCE RECORDER

The integral enhanced disturbance recorder has an area of memory specifically set aside for record storage. The number of records that may be stored by the relay is dependent on the selected recording duration and the installed software release.

The relay can typically store a pre-set minimum number of records, each of a pre-set duration. These may vary between different MiCOM products.

Disturbance records continue to be recorded until the available memory is exhausted, at which time the oldest record(s) are overwritten to make space for the newest one.

The recorder stores actual samples that are taken at a rate of pre-defined number of samples per cycle. Again, this may vary between different MiCOM products.

Each disturbance record consists of a number of analog data channels and digital data channels.

The relevant CT and VT ratios for the analog channels are also extracted to enable scaling to primary quantities. If a CT ratio is set less than unity, the relay will choose a scaling factor of zero for the appropriate channel.

The minimum number of records and duration is as follows:

• For Software Release 47/57 V/W/X and earlier:

 minimum of 20 records, each of 1.5 seconds duration

• For Software Release A0/B0:

 minimum of 15 records, each of 3.0 seconds duration

The recorder stores actual samples that are taken at a rate of 48 samples per cycle.

The number of analog data channels and 32 digital data channels for each disturbance record is as follows:

• For Software Release 47/57 V/W/X and earlier:

 12 analog data channels and 32 digital data channels

• For Software Release A0/B0:

 20 analog data channels and 128 digital data channels

There are now four additional DDB Group Sig x Nodes that can be mapped to individual or multiple DDBs in the PSL. These can then be set to trigger the DR via the

DISTURBANCE RECORD menu.

These "Nodes" are general and can also be used to group signals together in the PSL for any other reason. These four nodes are available in each of the four PSL setting groups.

1. For a control input, the DR can be triggered directly by triggering directly from the

Individual Control Input (e.g. Low to High (L to H) change)

2. For an input that cannot be triggered directly, or where any one of a number of

DDBs are required to trigger a DR, map the DDBs to the new PSL Group sig n and then trigger the DR on this. e.g. in the PSL:

In the DR Settings:

Digital Input 1 is triggered by the PSL Group Sig 1 (L to H)

Digital Input 2 is triggered by Control Input 1 (L to H)

If triggering on both edges is required map another DR channel to the H/L as well

Digital Input 4 is triggered by the PSL Group Sig 1 (H to L)

Digital Input 5 is triggered by Control Input 1 (H to L)

P54x/EN MR/Nd5 Page (MR) 9-17

(MR) 9 Measurements and Recording Disturbance Recorder

MENU TEXT Col Row

Default

Setting

Description

DISTURB

RECORDER

0C 0 0

This column contains settings for the Disturbance Recorder

Available Setting

Duration 0C 1

This sets the overall recording time.

1.5 0.1s to 10.5s step 0.01s

Trigger Position 0C 2 33.3 0 to 100 step 0.1

This sets the trigger point as a percentage of the duration. For example, the default settings show that the overall recording time is set to 1.5 s with the trigger point being at 33.3% of this, giving 0.5 s pre-fault and 1s post fault recording times.

Trigger Mode 0C 3 Single 0 = Single or 1 = Extended

If set to single mode, if a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger. However, if this has been set to Extended, the post trigger timer will be reset to zero, thereby extending the recording time.

Analog Channel 1 0C 4 VA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 1 0C 4 VA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 2 0C 5 VB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 2 0C 5 VB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 3 0C 6 VC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 3

Analog Channel 4

0C

0C

6

7

VC

IA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 4 0C 7 IA

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 5 0C 8 IB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 5 0C 8 IB

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

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Disturbance Recorder (MR) 9 Measurements and Recording

MENU TEXT Col Row

Default

Setting

Available Setting

Analog Channel 6 0C 9 IC

Description

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 6 0C 9 IC

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 7 0C 0A IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 7 0C 0A IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 8 0C 0B IN Sensitive

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 8 0C 0B IN Sensitive

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Digital Input 1 0C 0C Relay 1 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 1 Trigger 0C 0D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 2 0C 0E Relay 2 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 2 Trigger 0C 0F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 3 0C 10 Relay 3 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 3 Trigger 0C 11 Trigger L/H 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 4 0C 12 Relay 4 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 4 Trigger 0C 13 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 5 0C 14 Relay 5 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 5 Trigger 0C 15 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 6 0C 16 Relay 6 See Data Types - G32

P54x/EN MR/Nd5 Page (MR) 9-19

(MR) 9 Measurements and Recording Disturbance Recorder

MENU TEXT Col Row

Default

Setting

Available Setting

Description

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 6 Trigger 0C 17 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 7 0C 18 Relay 7 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 7 Trigger 0C 19 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 8 0C 1A Relay 8 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 8 Trigger 0C 1B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 9 0C 1C Relay 9 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 9 Trigger 0C 1D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 10 0C 1E Relay 10 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 10 Trigger 0C 1F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 11 0C 20 Relay 11 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 11 Trigger 0C 21 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 12 0C 22 Relay 12 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 12 Trigger 0C 23 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 13 0C 24 Relay 13 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 13 Trigger 0C 25 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 14 0C 26 Relay 14 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 14 Trigger 0C 27 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 15 0C 28 Opto Input 1 See Data Types - G32

Page (MR) 9-20 P54x/EN MR/Nd5

Disturbance Recorder (MR) 9 Measurements and Recording

MENU TEXT Col Row

Default

Setting

Available Setting

Description

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 15 Trigger 0C 29 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 16 0C 2A Opto Input 2 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 16 Trigger 0C 2B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 17 0C 2C Opto Input 3 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 17 Trigger 0C 2D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 18 0C 2E Opto Input 4 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 18 Trigger 0C 2F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 19 0C 30 Opto Input 5 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 19 Trigger 0C 31 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 20 0C 32 Opto Input 6 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 20 Trigger 0C 33 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 21 0C 34 Opto Input 7 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 21 Trigger 0C 35 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 22 0C 36 Opto Input 8 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 22 Trigger 0C 37 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 23 0C 38 Opto Input 9 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 23 Trigger 0C 39 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 24 0C 3A Opto Input 10 See Data Types - G32

P54x/EN MR/Nd5 Page (MR) 9-21

(MR) 9 Measurements and Recording Disturbance Recorder

MENU TEXT Col Row

Default

Setting

Available Setting

Description

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 24 Trigger 0C 3B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 25 0C 3C Opto Input 11 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 25 Trigger 0C 3D No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 26 0C 3E Opto Input 12 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 26 Trigger 0C 3F No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 27 0C 40 Opto Input 13 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 27 Trigger 0C 41 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 28 0C 42 Opto Input 14 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 28 Trigger 0C 43 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 29 0C 44 Opto Input 15 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 29 Trigger 0C 45 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 30 0C 46 Opto Input 16 See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 30 Trigger 0C 47 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 31 0C 48 Not Used See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 31 Trigger 0C 49 No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Digital Input 32 0C 4A Not Used See Data Types - G32

The digital channels may monitor any of the opto isolated inputs or output contacts, in addition to a number of internal relay digital signals, such as protection starts, LEDs etc.

Input 32 Trigger 0C 4B No Trigger 0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L

Any of the digital channels may be selected to trigger the disturbance recorder on either a low to high or a high to low transition.

Analog Channel 9 0C 50

Page (MR) 9-22 P54x/EN MR/Nd5

Disturbance Recorder (MR) 9 Measurements and Recording

MENU TEXT

Analog Channel 9

Col Row

0C 50

Default

Setting

V Checksync

Available Setting

Description

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 10 0C 51 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 = VC, 8

= IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 10 0C 51 IA2

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 11 0C 52 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 = VC, 8

= IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 11 0C 52 IB2

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 12 0C 53 IN

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM or 9 = V Checksync

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 12 0C 53 IC2

Selects any available analogue input to be assigned to this channel (including derived IN residual current).

Analog Channel 13 0C 54 Unused 0

0

0 = IA, 1 = IB, 2 = IC, 3 = IN, 4 = IN Sensitive, 5 = VA, 6 = VB, 7 =

VC, 8 = IM, 9 = V Checksync, 10 = IA2, 11 = IB2, 12 = IC2, 13 = IN2 or

14 = V Checksync2

54 Unused 0 Analog Channel 13 0C

0

Analog Channel 14 0C

0

Analog Channel 14 0C

0

Analog Channel 15 0C

55

55

56

Unused

Unused

Unused

0

0

0

0

Analog Channel 15 0C

0

Analog Channel 16 0C

0

Analog Channel 16 0C

0

Analog Channel 17 0C

0

Analog Channel 17 0C

0

56

57

57

58

58

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

P54x/EN MR/Nd5 Page (MR) 9-23

(MR) 9 Measurements and Recording

MENU TEXT

0

Digital Input 39

0

Digital Input 40

0

Digital Input 41

0

Digital Input 42

0

Digital Input 43

0

Digital Input 44

0

Digital Input 45

0

Analog Channel 18 0C

0

Analog Channel 18 0C

0

Analog Channel 19 0C

0

Analog Channel 19 0C

0

Analog Channel 20 0C

0

Analog Channel 20 0C

0

0C Digital Input 33

0

Digital Input 34

0

0C

0C Digital Input 35

0

Digital Input 36

0

Digital Input 37

0

Digital Input 38

0C

0C

0C

Digital Input 46

0

Digital Input 47

0

Digital Input 48

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

Col Row

59

Default

Setting

Unused

59

5A

5A

5B

5B

70

71

72

73

74

75

76

77

78

79

7A

7B

7C

7D

7E

7F

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Description

0

0

0

Page (MR) 9-24

Available Setting

Disturbance Recorder

P54x/EN MR/Nd5

Disturbance Recorder

0

Digital Input 49

0

Digital Input 50

0

Digital Input 51

0

Digital Input 52

0

Digital Input 53

0

Digital Input 54

0

Digital Input 55

0

Digital Input 56

0

Digital Input 57

0

Digital Input 58

0

Digital Input 59

0

Digital Input 60

0

Digital Input 61

0

Digital Input 62

0

Digital Input 63

0

Digital Input 64

0

Digital Input 65

0

Digital Input 66

0

Digital Input 67

0

Digital Input 68

0

Digital Input 69

0

MENU TEXT Col Row

0C 86

0C 87

0C 88

0C 89

0C 8A

0C 8B

0C 8C

0C 80

0C 81

0C 82

0C 83

0C 84

0C 85

0C 8D

0C 8E

0C 8F

0C 90

0C 91

0C 92

0C 93

0C 94

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Default

Setting

0

0

0

0

0

0

0

0

0

0

0

0

Description

0

0

0

0

0

0

0

0

0

(MR) 9 Measurements and Recording

Available Setting

P54x/EN MR/Nd5 Page (MR) 9-25

(MR) 9 Measurements and Recording

Digital Input 70

0

Digital Input 71

0

Digital Input 72

0

Digital Input 73

0

Digital Input 74

0

Digital Input 75

0

Digital Input 76

0

Digital Input 77

0

Digital Input 78

0

Digital Input 79

0

Digital Input 80

0

Digital Input 81

0

Digital Input 82

0

Digital Input 83

0

Digital Input 84

0

Digital Input 85

0

Digital Input 86

0

Digital Input 87

0

Digital Input 88

0

Digital Input 89

0

Digital Input 90

0

Digital Input 91

MENU TEXT Col Row

0C 95

Default

Setting

Unused 0

Description

0C 96

0C 97

0C 98

Unused

Unused

Unused

0

0

0

0C 99

0C 9A

0C 9B

0C 9C

0C

0C

0C

0C

9D

9E

9F

A0

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

0

0

0

0

0

0

0

0C A1

0C A2

0C A3

0C A4

0C A5

0C A6

0C A7

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0C A8

0C A9

Unused

Unused

0C AA Unused

0

0

0

0

0

0

0

0

0

0

Page (MR) 9-26

Available Setting

Disturbance Recorder

P54x/EN MR/Nd5

Disturbance Recorder

0

Digital Input 92

0

Digital Input 93

0

Digital Input 94

0

Digital Input 95

0

Digital Input 96

0

Digital Input 97

0

Digital Input 98

0

Digital Input 99

0

Digital Input 100

0

Digital Input 101

0

Digital Input 102

0

Digital Input 103

0

Digital Input 104

0

Digital Input 105

0

Digital Input 106

0

Digital Input 107

0

Digital Input 108

0

Digital Input 109

0

Digital Input 110

0

Digital Input 111

0

Digital Input 112

0

MENU TEXT Col Row

0C AD

0C AE

0C AF

0C B0

0C B1

0C B2

0C B3

0C AB

0C AC

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0C B4

0C B5

0C B6

0C B7

0C B8

0C B9

0C BA

0C BB

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0C BC

0C BD

0C BE

0C BF

Unused

Unused

Unused

Unused

Default

Setting

0

0

0

0

0

0

0

0

0

0

0

0

Description

0

0

0

0

0

0

0

0

0

(MR) 9 Measurements and Recording

Available Setting

P54x/EN MR/Nd5 Page (MR) 9-27

(MR) 9 Measurements and Recording Disturbance Recorder

MENU TEXT Col Row

Default

Setting

Available Setting

Digital Input 113

0

Digital Input 114

0

Digital Input 115

0

Digital Input 116

0

Digital Input 117

0

Digital Input 118

0

Digital Input 119

0

Digital Input 120

0

Digital Input 121

0

Digital Input 122

0

Digital Input 123

0

Digital Input 124

0

Digital Input 125

0

Digital Input 126

0

Digital Input 127

0

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

0C

C0

C1

C2

C3

C4

C5

C6

C7

C8

C9

CA

CB

CC

CD

CE

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

Unused

0

Description

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Digital Input 128

0

0C CF Unused 0

Table 4 - Disturbance recorder for digital channel

The pre and post fault recording times are set by a combination of the Duration and

Trigger Position cells. Duration sets the overall recording time and the Trigger

Position sets the trigger point as a percentage of the duration.

Page (MR) 9-28 P54x/EN MR/Nd5

Disturbance Recorder (MR) 9 Measurements and Recording

• For Software Release 47/57 V/W/X and earlier:

 The default settings show that the overall recording time is set to 1.5 s with the trigger point being at 33.3% of this, giving 0.5 s pre-fault and 1s post fault recording times.

• For Software Release A0/B0:

 The default settings show that the overall recording time is set to 3.0 s with the trigger point being at 33.3% of this, giving 1.0 s pre-fault and 1.0 s postfault recording times.

If a further trigger occurs while a recording is taking place, the recorder ignores the trigger if the Trigger Mode is set to Single . However, if this is set to Extended , the post-trigger timer is reset to zero, extending the recording time.

As can be seen from the menu, each of the analog channels is selectable from the available analog inputs to the relay. The digital channels may be mapped to any of the opto isolated inputs or output contacts, in addition to several internal relay digital signals, such as protection starts and LEDs. The complete list of these signals may be found by viewing the available settings in the relay menu or using a setting file in MiCOM S1

Studio. Any of the digital channels may be selected to trigger the disturbance recorder on either a low-to-high or a high-to-low transition, using the Input Trigger cell. The default trigger settings are that any dedicated trip output contacts, such as relay 3, trigger the recorder.

It is not possible to view the disturbance records locally using the LCD; they must be extracted using suitable software such as MiCOM S1 Studio. This process is fully explained in the SCADA Communications chapter.

P54x/EN MR/Nd5 Page (MR) 9-29

(MR) 9 Measurements and Recording

4

4.1

4.2

4.3

4.4

Measurements

MEASUREMENTS

The relay produces a variety of both directly measured and calculated power system quantities. These measurement values are updated every second and can be viewed in the Measurements columns (up to three) of the relay or using the MiCOM S1 Studio

Measurement viewer.

The relay can measure and display these quantities:

Phase Voltages

Local and Remote Currents

Differential and Bias Currents on a Per Phase Basis

Sequence Voltages and Currents

Slip Frequency

Power and Energy Quantities

Rms. Voltages and Currents

Peak, Fixed and Rolling Demand Values

There are also measured values from the protection functions, which are also displayed under the measurement columns of the menu; these are described in the section on the relevant protection function.

Measured Voltages and Currents

The relay produces both phase-to-ground and phase-to-phase voltage and current values. They are produced directly from the Discrete Fourier Transform (DFT) used by the relay protection functions and present both magnitude and phase angle measurement.

Currents mentioned above can be seen on the Measurement 1 column. The relay also shows local and remote currents in Measurement 3 column. These currents have the same treatment as the currents used for differential protection purposes.

Sequence Voltages and Currents

Sequence quantities are produced by the relay from the measured Fourier values; these are displayed as magnitude and phase angle values.

Slip Frequency

The relay produces a slip frequency measurement by measuring the rate of change of phase angle, between the bus and line voltages, over a one-cycle period. The slip frequency measurement assumes the bus voltage to be the reference phasor.

Power and Energy Quantities

Using the measured voltages and currents the relay calculates the apparent, real and reactive power quantities. These are produced phase-by-phase. Three-phase values are based on the sum of the three individual phase values. The signing of the real and reactive power measurements can be controlled using the measurement mode setting.

The options are as follows.

Page (MR) 9-30 P54x/EN MR/Nd5

Measurements

4.5

4.6

4.6.1

4.6.2

(MR) 9 Measurements and Recording

1

2

Measurement mode

0 (Default)

Parameter

Export Power

Import Power

Lagging Vars

Leading VArs

Export Power

Import Power

Lagging Vars

Leading VArs

Export Power

Import Power

Lagging Vars

Leading VArs

+

+

+

+

+

+

Signing

3

Export Power

Import Power

Lagging Vars

Leading VArs

In addition to the measured power quantities, the relay calculates the power factor phaseby-phase, in addition to a three-phase power factor.

+

+

These power values are also used to increment the total real and reactive energy measurements. Separate energy measurements are maintained for the total exported and imported energy. The energy measurements are incremented up to maximum values of 1000 GWhr or 1000 GVARhr, at which point they reset to zero. It is also possible to reset these values using the menu or remote interfaces using the Reset Demand cell.

RMS. Voltages and Currents

RMS phase voltage and current values are calculated by the relay using the sum of the samples squared over a cycle of sampled data.

Demand Values

The relay produces fixed, rolling and peak demand values. Using the reset demand menu cell it is possible to reset these quantities from the user interface or the remote communications.

Fixed Demand Values

The fixed demand value is the average value of a quantity over the specified interval; values are produced for each phase current and for three-phase real and reactive power.

The fixed demand values displayed by the relay are those for the previous interval. The values are updated at the end of the fixed demand period.

Rolling Demand Values

The rolling demand values are similar to the fixed demand values, the difference being that a sliding window is used. The rolling demand window consists of several smaller subperiods. The resolution of the sliding window is the sub-period length, with the displayed values updated at the end of each of the sub-periods.

P54x/EN MR/Nd5 Page (MR) 9-31

(MR) 9 Measurements and Recording Measurements

4.6.3 Peak Demand Values

Peak demand values are produced for each phase current and the real and reactive power quantities. These display the maximum value of the measured quantity since the last reset of the demand values.

4.7 Settings

MENU TEXT

The settings shown under the heading MEASURE’T SETUP can be used to configure the relay measurement function. See the following Measurements table for more details:

Col Row Default Setting Available Setting

MEASURE'T SETUP 0D 0 0

Description

This column contains settings for the measurement setup

Default Display 0D 1 Description

0 = User Banner, 1 = 3Ph + N Current, 2 = 3Ph Voltage, 3 =

Power, 4 = Date and Time, 5 = Description, 6 = Plant

Reference, 7 = Frequency, 8 = Access Level

This setting can be used to select the default display from a range of options, note that it is also possible to view the other default displays whilst at the default level using the 4 and 6 keys. However once the 15 minute timeout elapses the default display will revert to that selected by this setting.

Local Values 0D 2 Primary 0 = Primary or 1 = Secondary

This setting controls whether measured values via the front panel user interface and the front courier port are displayed as primary or secondary quantities.

Remote Values 0D 3 Primary 0 = Primary or 1 = Secondary

This setting controls whether measured values via the rear communication port are displayed as primary or secondary quantities.

Measurement Ref 0D 4 VA 0 = VA, 1 = VB, 2 = VC, 3 = IA, 4 = IB, 5 = IC

Using this setting the phase reference for all angular measurements by the relay can be selected. This reference is for

Measurements 1. Measurements 3 uses always IA local as a reference

Measurement Mode 0D 5 0 0 to 3 step 1

This setting is used to control the signing of the real and reactive power quantities; the signing convention used is defined in the

Measurements and Recording chapter (P54x/EN MR).

Fix Dem Period 0D 6 30

This setting defines the length of the fixed demand window

1 to 99 step 1

Roll Sub Period 0D 7 30 1 to 99 step 1

These two settings are used to set the length of the window used for the calculation of rolling demand quantities

Num Sub Periods 0D 8 1 1 to 15 step 1

This setting is used to set the resolution of the rolling sub window

Distance Unit 0D 9 Miles 0 = Kilometres or 1 = Miles

This setting is used to select the unit of distance for fault location purposes, note that the length of the line is preserved when converting from km to miles and vice versa

Fault Location 0D 0A Distance 0 = Distance, 1 = Ohms, 2 = % of Line

The calculated fault location can be displayed using one of several options selected using this setting

Remote 2 Values 0D 0B Primary 0 = Primary or 1 = Secondary

The setting defines whether the values measured via the 2nd Rear Communication port are displayed in primary or secondary terms.

Table 5 - Measurement setup

Page (MR) 9-32 P54x/EN MR/Nd5

Measurements (MR) 9 Measurements and Recording

4.8 Measurement Display Quantities

The relay has Measurement columns for viewing measurement quantities. These can also be viewed with MiCOM S1 Studio and are shown below.

MEASUREMENTS 1

IA Magnitude 0 A

IA Phase Angle

IB Magnitude

IB Phase Angle

IC Magnitude

MEASUREMENTS 2

A Phase Watts

0 deg B Phase Watts

0 A C Phase Watts

0 deg A Phase VArs

0 A B Phase VArs

0 W

0 W

0 W

0 Var

0 Var

IC Phase Angle

IN Derived Mag.

0 deg C Phase VArs

0 A A Phase VA

IN Derived Angle 0 deg B Phase VA

ISEF Magnitude

ISEF Angle

I1 Magnitude

0 A

0 A

C Phase VA

0 deg 3 Phase Watts

3 Phase VArs

MEASUREMENTS 3

IA Local

IA Angle Local

IB Local

IB Angle Local

IC Local

0 A

0 deg

0 A

0 deg

0 A

MEASUREMENTS 4

Ch 1 Prop Delay

Ch 2 Prop Delay

Ch1 Rx Prop Delay

Ch1 Tx Prop Delay

Ch2 Rx Prop Delay

0 Var

0 VA

0 VA

IC Angle Local

IA remote 1

0 deg

0 A

Ch2 Tx Prop Delay

Channel 1 Status

IA Ang remote 1 0 deg Channel 2 Status

0 VA

0 W

IB remote 1

0 VAr IC remote 1

0 A

IB Ang remote 1 0 deg STATISTICS

0 A

IM64 Rx Status

Last Reset on

I2 Magnitude

I0 Magnitude

IA RMS

IB RMS

IC RMS

IN RMS

0 A

0 A

0 A

0 A

0 A

0 A

3 Phase VA

3Ph Power Factor

CPh Power Factor

3Ph WHours Fwd

0 VA

0

APh Power Factor 0

BPh Power Factor 0

0

0 Wh

IC Ang remote 1 0 deg Date/Time

IA remote 2 0 A Ch1 No.Vald Mess

IA Ang remote 2 0 deg Ch1 No.Err Mess

IB remote 2 0 A Ch1 No.Errored s

IB Ang remote 2 0 deg Ch1 No.Sev Err s

IC remote 2 0 A

Ch1 No.

Dgraded m

VAB Magnitude 0 V 3Ph WHours Rev 0 Wh IC Ang remote 2 0 deg Ch2 No.Vald Mess

VAB Phase Angle 0 deg 3Ph VArHours Fwd 0 VArh IA Differential 0 A Ch2 No.Err Mess

VBC Magnitude 0 V 3Ph VArHours Rev 0 VArh IB Differential 0 A Ch2 No.Errored s

VBC Phase Angle 0 deg 3Ph W Fix Demand 0 W

VCA Magnitude 0 V 3Ph VArs Fix Dem.

VCA Phase Angle 0 deg IA Fixed Demand

0 VAr

0 A

IC Differential

IA Bias

IB Bias

0 A

0 A

0 A

Ch2 No.Sev Err s

Ch2 No.

Dgraded m

Max Ch 1 Prop Delay

VAN Magnitude 0 V IB Fixed Demand 0 A

VAN Phase Angle 0 deg IC Fixed Demand 0 A

VBN Magnitude 0 V 3 Ph W Roll Dem. 0 W

VBN Phase Angle 0 deg 3Ph VArs Roll Dem. 0 VAr

VCN Magnitude 0 V IA Roll Demand 0 A

VCN Phase Angle 0 deg IB Roll Demand 0 A

IC Bias

V1 Magnitude

V2 Magnitude

V0 Magnitude

VAN RMS

VBN RMS

VCN RMS

VAB RMS

VBC RMS

VCA RMS

Frequency

0 V

0 V

0 V

0 V

0 V

0 V

0 V

0 V

0 V

IC Roll Demand 0 A

3Ph W Peak Dem. 0 W

3Ph VAr Peak Dem. 0 VAr

IA Peak Demand 0 A

IB Peak Demand

IC Peak Demand

Reset Demand

0 A

0 A

No

0 A Max Ch 2 Prop Delay

Max Ch1 TxRx Time

Max Ch2 TxRx Time

Clear Statistics

P54x/EN MR/Nd5 Page (MR) 9-33

(MR) 9 Measurements and Recording Measurements

MEASUREMENTS 1

CB1 CS Volt Mag 0 V

CB1 CS Volt Ang 0 deg

CB1 Bus-Line Ang 0 deg

CB1 CS Slip Freq

IM Magnitude

IM Phase Angle

I1 Magnitude

I1 Phase Angle

0 A

0 deg

0 A

0 deg

I2 Magnitude

I2 Phase Angle

I0 Magnitude

I0 Phase Angle

V1 Magnitude

V1 Phase Angle

V2 Magnitude

0 A

0 deg

0 A

0 deg

0 V

0 deg

0 V

V2 Phase Angle

V0 Magnitude

0 deg

0 V

V0 Phase Angle 0 deg

CB2 CS Volt Mag 0 V

CB2 CS Volt Ang 0 deg

CB2 Bus-Line Ang 0 deg

CB2 CS Slip Freq

VRem Magnitude

VRem Phase Ang

0 V

0 deg

IA CT1 Magnitude 0 A

IA CT1 Phase Ang 0 deg

IB CT1 Magnitude 0 A

IB CT1 Phase Ang 0 deg

IC CT1 Magnitude 0 A

IC CT1 Phase Ang 0 deg

IA CT2 Magnitude 0 A

IA CT2 Phase Ang 0 deg

IB CT2 Magnitude 0 A

IB CT2 Phase Ang 0 deg

IC CT2 Magnitude 0 A

IC CT2 Phase Ang 0 deg

Table 6 - Measurement 1, 2, 3 and 4

MEASUREMENTS 2 MEASUREMENTS 3 MEASUREMENTS 4

Page (MR) 9-34 P54x/EN MR/Nd5

Measurements

4.9

(MR) 9 Measurements and Recording

Measurements 4 Column

Channel 1 and Channel 2 propagation times are displayed in seconds. These times are the ones calculated with asynchronous sampling (sometimes called “ping pong” method).

Ch1/Ch2 Rx Prop Delay Ch1 and Ch1/Ch2 Tx Prop Delay are displayed in seconds.

These times are the ones calculated with synchronous sampling (by using GPS), therefore they are displayed only when GPS method is active (setting PROT COMMS -

IM64/GPS Sync/Enabled)

‘Channel Status 1’ is a diagnostics flag associated with Channel 1 condition (Channel 2 is the same).

• Bit “Max Tx-Rx Time” If the GPS Synch is enabled and the TxRx Time Stats enabled, this bit indicates that the delay time between

is message transmission and reception is above the setting.

Bit “Max Prop Delay” If the Prop Delay Stats is enabled, this bit indicates that the propagation delay time is above the setting.

Bit “H/W B to J mode” If a relay suffix K (or higher) is communicating with a relay suffix B, G or J, this bit is 1.

Bit “Passthrough” This indicates that, in a three-terminal configuration, Ch1 data has been received on Ch2 via the self healing ring mechanism.

Bit “Message Level” Is indicative of the quality of the signal on Channel 1.

Bit “Timeout” Indication that no valid messages are received over

Channel 1 during the ‘Channel Timeout’ window.

Bit “Mismatch Rxn”

Bit “Path Yellow”

Bit “Signal Lost”

Indication of mismatch between the InterMiCOM64 Ch1 setting and that of the associated multiplexer.

An indication of one way communication. The local relay is being informed by the remote connected relay that the remote connected relay is not receiving messages from the local one.

An indication from the associated multiplexer that

Channel1 signals are being lost.

• Bit “Mux Clk F Error” This is an alarm that appears if the Channel 1 baud rate is outside the limits 52 Kbis/s or 70 Kbits/s

Bit “Remote GPS”

Bit “Local GPS”

Bit “Tx”

Indicates the status of the remote GPS on Channel 1.

Indicates the status of the local GPS on Channel 1.

Indication of transmission on Channel 1.

Bit “Rx” Indication of reception on Channel 1.

P54x/EN MR/Nd5 Page (MR) 9-35

(MR) 9 Measurements and Recording Measurements

‘IM64 Rx Status’ is a 16 bit word that displays the status of received commands as “1” or

“0”.

‘Last Reset on’ displays the time and date of last statistics reset.

‘Ch1/Ch2 No. of valid messages’ displays the number of received valid messages over channel 1/2 since last statistics reset.

‘Ch1/Ch2 No. of Errored messages’ displays the number of invalid messages over channel 1/Ch 2 since last statistics reset.

The number of errored messages complies with ITU- G8.21 and is as follows:

‘Ch1/Ch2 No. Errored seconds’ displays the number of seconds containing 1 or more errored or lost messages

‘Ch1/Ch2 No. Severely Errored seconds‘ displays the number of seconds containing 31 or more errored or lost messages (see Note 1).

Note 1 Any severely errored seconds are ignored when working out the minutes intervals

‘Ch1/Ch2 No. Degraded minutes’ displays the number of minutes containing 2 or more errored or lost messages.

The number of lost messages recorded is intended as an indicator for noises under normal communication conditions and not for recording long communication breaks. The lost message count is accumulated by incrementing a counter when a message is rejected by the Error code check, message length check and the sequential time tag check.

‘Max Ch 1/2 Prop Delay’ displays the maximum value of the overall propagation delay divided by 2 when the protection communications are enabled.

The error statistics are automatically cleared on power-up. They can also be cleared using the Clear Statistics setting in Measurements column of the menu.

Page (MR) 9-36 P54x/EN MR/Nd5

MiCOM P54x (P543, P544, P545 & P546) (PD) 10 Product Design

P54x/EN PD/Nd5

PRODUCT DESIGN

CHAPTER 10

Page (PD) 10-1

(PD) 10 Product Design MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware Suffix:

Software Version:

Connection Diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (PD) 10-2 P54x/EN PD/Nd5

Contents (PD) 10 Product Design

CONTENTS

1 Relay System Overview

1.1

1.2

1.3

1.4

1.4.1

1.5

1.5.1

1.5.2

1.5.3

1.6

1.6.1

1.6.2

1.6.3

1.7

1.8

1.9

1.10

Hardware Overview

Mechanical Layout

Processor Board

Internal Communication Buses

Co-Processor Board (optionally with InterMiCOM 64 Fiber Teleprotection)

Input Module

Transformer Board

Input Board

Universal Opto Isolated Logic Inputs

Power Supply Module (including Output Relays)

Power Supply Board (including EIA(RS)485 Communication Interface)

Output Relay Board

High Break Relay Board

Hardware Communications Options

IRIG-B Modulated or Un-modulated Board (Optional)

Second Rear Communications Board (Optional)

Ethernet Board (Options)

2 Relay Software

2.1

2.2

2.3

2.3.1

2.3.2

2.3.3

2.4

2.4.1

2.4.2

2.4.3

2.4.4

2.4.5

2.4.6

2.4.7

2.4.8

2.4.9

Real-Time Operating System

System Services Software

Platform Software

Record Logging

Settings Database

Database Interface

Protection and Control Software

Signal Processing

Main Protection Digital Filtering - Co-Processor Board

Distance Protection Filters

Frequency Response

Programmable Scheme Logic (PSL)

Function Key Interface

Event, Fault and Maintenance Recording

Enhanced Disturbance Recorder

Fault Locator

3 Self-Testing and Diagnostics

3.1

3.1.1

3.1.2

Start-Up Self-Testing

System Boot

Initialization Software

Page (PD) 10-

5

7

7

8

8

9

10

5

6

6

7

10

10

11

13

13

13

14

17

17

18

18

18

19

19

19

21

23

23

23

24

19

20

20

21

25

25

25

25

P54x/EN PD/Nd5 Page (PD) 10-3

(PD) 10 Product Design

3.1.3

3.2

FIGURES

Platform Software Initialization and Monitoring

Continuous Self-Testing

Figure 1 - Relay modules and information flow

Figure 2 - Main input board

Figure 3 - High break contact operation

Figure 4 - Second rear comms board (optional)

Figure 5 - Ethernet board connectors (optional)

Figure 6 - Relay software structure

Figure 7 - Frequency response of filters

TABLES

Table 1 - PCBs and voltage/current inputs for different relay types

Table 2 - Threshold levels

Table 3 - Numbers of opto inputs for different models

Table 4 - Power supply options

Table 5 - Numbers of relay contacts for different models

Table 6 - Numbers of relay contacts for different models

Figures

26

26

Page (PD) 10-

12

14

5

8

16

17

21

Page (PD) 10-

9

10

7

9

11

11

Page (PD) 10-4 P54x/EN PD/Nd5

Relay System Overview (PD) 10 Product Design

1

1.1

RELAY SYSTEM OVERVIEW

Hardware Overview

The relay is based on a modular hardware design where each module performs a separate function. This section describes the functional operation of the various hardware modules. Some modules are essential while others are optional depending on the user’s requirements (see Product Specific Options and Hardware Communications Options ).

All modules are connected by a parallel data and address bus which allows the processor board to send and receive information to and from the other modules as required.

There is also a separate serial data bus for transferring sample data from the input module to the processor. See the following Relay modules diagram.

Alarm, event, fault, disturbance & maintenance records

Executable software code & data, setting database data

Default settings & parameters language text, software code.

Present values of all settings

Battery backed-up

SRAM

SRAM

Flash

EPROM

IRIG-B signal optional

Fibre optic rear comms port optional

2 nd rear comms port

EIA(RS)485 optional

Ethernet comms

Front LCD panel

LEDs

EIA(RS)232 Front comms port

Parallel test port

Main processor board

Timing data

IRIG-B and/or FO rear port, or

IRIG-B and/or 2 nd

(where fitted)

rear comms board

CPU

Comms between main & coprocessor boards

FPGA

Ethernet board

(where fitted)

SRAM

CPU

Coprocessor board

(where fitted)

CPU code

& data

Power supply, rear comms data, output relay status

Parallel data bus

Digital input values

Relay board

Power supply (3 voltages), rear comms data

Power supply board

ADC Input board

Transformer board

Analogue input signals

Power supply

Watchdog contacts

Field voltage

Rear EIA(RS)485 communication port

Figure 1 - Relay modules and information flow

Current and voltage inputs

P0126ENd

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(PD) 10 Product Design

1.2

1.3

Relay System Overview

Mechanical Layout

The relay case is pre-finished steel with a conductive covering of aluminum and zinc. This provides good earthing at all joints with a low impedance path to earth that is essential for shielding from external noise. The boards and modules use multi-point grounding

(earthing) to improve immunity to external noise and minimize the effect of circuit noise.

Ground planes are used on boards to reduce impedance paths and spring clips are used to ground the module metalwork.

Heavy duty terminal blocks are used at the rear of the relay for the current and voltage signal connections. Medium duty terminal blocks are used for the digital logic input signals, output relay contacts, power supply and rear communication port. A BNC connector is used for the optional IRIG-B signal. 9-pin and 25-pin female D-connectors are used at the front of the relay for data communication.

Inside the relay the boards plug into the connector blocks at the rear, and can be removed from the front of the relay only. The connector blocks to the relay’s CT inputs have internal shorting links inside the relay. These automatically short the current transformer circuits before they are broken when the board is removed.

The front panel consists of a membrane keypad with tactile dome keys, an LCD and 12 or

22 LEDs (depending on the model) mounted on an aluminum backing plate.

Processor Board

The processor board performs all calculations for the relay and controls the operation of all other modules in the relay. The processor board also contains and controls the user interfaces (LCD, LEDs, keypad and communication interfaces).

The relay is based around a TMS320VC33-150MHz (peak speed), floating-point, 32-bit

Digital Signal Processor (DSP) operating at a clock frequency of half this speed. This processor performs all of the calculations for the relay, including the protection functions, control of the data communication and user interfaces including the operation of the LCD, keypad and LEDs.

The processor board is directly behind the relay’s front panel. This allows the LCD and

LEDs and front panel communication ports to be mounted on the processor board. These ports are:

The 9-pin D-connector for EIA(RS)232 serial communications used for MiCOM S1

Studio and Courier communications.

The 25-pin D-connector relay test port for parallel communication.

All serial communication is handled using a Field Programmable Gate Array (FPGA).

The main processor board has:

2 MB SRAM for the working area. This is fast access (zero wait state) volatile memory used to temporarily store and execute the processor software.

4 MB flash ROM to store the software code, text, configuration data, default settings, and present settings.

• 4 MB battery-backed SRAM to store disturbance, event, fault and maintenance records.

Note With hardware revisions L and M, the SRAM size has changed from 2MB to

8MB; and the Flash size has changed from 4MB to 8MB.

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Relay System Overview

1.4

1.4.1

1.5

(PD) 10 Product Design

Internal Communication Buses

The relay has two internal buses for the communication of data between different modules. The main bus is a parallel link that is part of a 64-way ribbon cable. The ribbon cable carries the data and address bus signals in addition to control signals and all power supply lines. Operation of the bus is driven by the main processor board that operates as a master while all other modules in the relay are slaves.

The second bus is a serial link that is used exclusively for communicating the digital sample values from the input module to the main processor board. The DSP has a built-in serial port that is used to read the sample data from the serial bus. The serial bus is also carried on the 64-way ribbon cable.

Co-Processor Board (optionally with InterMiCOM

64

Fiber Teleprotection)

A co-processor board is used to process the distance protection and delta directional algorithms. It contains the optical fiber transmit and receive hardware and serial data communication controller for the InterMiCOM cost ordering option.

64 teleprotection. InterMiCOM 64 is an extra

A second processor board is used in the relay for the processing of the distance and delta protection algorithms. The processor used on the second board is the same as that used on the main processor board. The second processor board has provision for fast access (zero wait state) SRAM for use with both program and data memory storage. This memory can be accessed by the main processor board via the parallel bus, and this route is used at power-on to download the software for the second processor from the flash memory on the main processor board. Further communication between the two processor boards is achieved via interrupts and the shared SRAM. The serial bus carrying the sample data is also connected to the co-processor board, using the processor’s built-in serial port, as on the main processor board.

The co-processor board also handles any communication with the remote differential relay(s). This is achieved via BFOC 2.5 - ST optical fiber connections at the rear and hence the co-processor board holds the optical modules to transmit and receive data over the fiber links. One or two channels will be provided, each comprising a Rx (receive) and a Tx (transmit) fiber as a pair. The channels, when fitted according to an ordering option, are labeled Ch1 and Ch2.

Input Module

The input module provides the interface between the relay processor board(s) and the analog and digital signals coming into the relay. The input module consists of the main input board and the transformer board.

Relay

P543

P544

P545

P546

2

3

2

3

No of

PCBs

1

1

1

1

PCBs

No of

Main Input Boards

1

2

1

2

No of

Transformer Boards

4

5

4

5

Inputs

Voltage Current

5

8

5

8

Table 1 - PCBs and voltage/current inputs for different relay types

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(PD) 10 Product Design Relay System Overview

1.5.1

1.5.2

VT

Transformer Board

The current inputs will accept either 1A or 5A nominal current (observe menu and wiring options) and the nominal voltage input is 100/110/115/120V. The transformers are used both to step-down the currents and voltages to levels appropriate to the relay’s electronic circuitry and to provide effective isolation between the relay and the power system. The connection arrangements of both the current and voltage transformer secondary’s provide differential input signals to the main input board to reduce noise.

Input Board

The main input board is shown as a block diagram in the Main input board diagram. It provides the circuitry for the digital input signals and the analogue-to-digital conversion for the analogue signals. Hence it takes the differential analogue signals from the CTs and VTs on the transformer board(s), converts these to digital samples and transmits the samples to the processor board via the serial data bus. On the input board the analogue signals are passed through an anti-alias filter before being multiplexed into a single analogue to digital converter chip. The A - D converter provides 16-bit resolution and a serial data stream output. The digital input signals are opto isolated on this board to prevent excessive voltages on these inputs causing damage to the relay's internal circuitry.

Anti-alias filters

Diffn to single

Low pass filter

Optical isolator

8 digital inputs

8

Optical isolator

Noise filter

8

Noise filter

4 4 4

VT

Diffn to single

Low pass filter

Buffer

CT

Diffn to single

Low pass filter

Buffer

16-bit

ADC

Serial interface

Serial sample data bus

5 5 5

Sample control

Trigger from processor board

CT

Diffn to single

Low pass filter

Calibration

EEPROM

Parallel bus

P0127ENg

Figure 2 - Main input board

Three spare channels are used to sample three different reference voltages for the purpose of continually checking the operation of the multiplexer and the accuracy of the

A-D converter. The sample rate is maintained at 48 samples per cycle (see note) of the power waveform by a logic control circuit which is driven by the frequency tracking function on the main processor board.

The calibration non-volatile memory holds the calibration coefficients which are used by the processor board to correct for any amplitude or phase errors introduced by the transformers and analog circuitry.

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Relay System Overview

1.5.3

(PD) 10 Product Design

The other function of the input board is to read the signals on the digital inputs and send them through the parallel data bus to the processor board. The input board holds eight optical isolators for connecting up to eight digital input signals. Opto-isolators are used with digital signals for the same reason as transformers are used with analog signals: to isolate the relay’s electronics from the power system environment. A 48 V ‘field voltage’ supply at the back of the relay is used to drive the digital opto-inputs. The input board has hardware filters to remove noise from the digital signals. The digital signals are then buffered so they can be read on the parallel data bus. Depending on the relay model, more than eight digital input signals can be accepted by the relay. This is done using an additional opto-board that contains the same provision for eight isolated digital inputs as the main input board, but does not contain any of the circuits for analog signals which are provided on the main input board.

Universal Opto Isolated Logic Inputs

This series of relays have universal opto-isolated logic inputs that can be programmed for the nominal battery voltage of the circuit of which they are a part. This allows different voltages for different circuits such as signaling and tripping. They can also be programmed as Standard 60% - 80% or 50% - 70% to satisfy different operating constraints.

Threshold levels are shown in the following table:

Nominal battery voltage (Vdc)

Standard 60% - 80% 50% - 70%

No operation

(Logic 0) Vdc

Operation (Logic

1) Vdc

No operation

(Logic 0) Vdc

Operation

(Logic 1) Vdc

24/27 <16.2 >19.2 <12.0 >16.8

30/34

48/54

110/125

220/250

<20.4

<32.4

<75.0

<150.0

>24.0

>38.4

>88.0

>176.0

<15.0

<24.0

<55.0

<110

>21.0

>33.6

>77.0

>154

Table 2 - Threshold levels

This lower value eliminates fleeting pick-ups that may occur during a battery earth fault, when stray capacitance may present up to 50% of battery voltage across an input.

Each input also has selectable filtering. This allows a pre-set ½ cycle filter to be used to prevent induced noise on the wiring. However, although the ½ cycle filter is secure it can be slow, particularly for intertripping. If the ½ cycle filter is switched off to improve speed, double pole switching or screened twisted cable may be needed on the input to reduce ac noise.

The first method is to use double pole switching on the input, the second is to use screened twisted cable on the input circuit.

Relay Model No of Opto Inputs Notes

P543

P544

P545

P546

16

16

24

24

Or 32 by certain ordering options

Table 3 - Numbers of opto inputs for different models

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(PD) 10 Product Design

1.6

1.6.1

1.6.2

Relay System Overview

Power Supply Module (including Output Relays)

The power supply module contains two boards, one for the power supply unit and the other for the output relays. It provides power to all of the other modules in the relay, as well as the EIA(RS)485 electrical connection for the rear communication port. The second board of the power supply module contains the relays that provide the output contacts.

Power Supply Board (including EIA(RS)485 Communication Interface)

One of three different configurations of the power supply board can be fitted to the relay.

This will be specified at the time of order and depends on the nature of the supply voltage that will be connected to the relay. The options are shown in the following table:

Nominal dc range Nominal ac range

24 - 32 V dc

48 - 110 V dc dc only dc only

110 - 250 V dc 100 - 240 V ac rms

Table 4 - Power supply options

The output from all versions of the power supply module are used to provide isolated power supply rails to all of the other modules in the relay. Three voltage levels are used in the relay: 5.1 V for all of the digital circuits, ±16 V for the analog electronics such as on the input board, and 22 V for driving the output relay coils. All power supply voltages including the 0 V earth line are distributed around the relay through the 64-way ribbon cable. The power supply board also provides the 48 V field voltage. This is brought out to terminals on the back of the relay so that it can be used to drive the optically-isolated digital inputs.

The two other functions provided by the power supply board are the EIA(RS)485 communications interface and the watchdog contacts for the relay. The EIA(RS)485 interface is used with the relay’s rear communication port to provide communication using one of either Courier, MODBUS, IEC60870-5-103, or DNP3.0 protocols. The EIA(RS)485 hardware supports half-duplex communication and provides optical isolation of the serial data that is transmitted and received. All internal communication of data from the power supply board is through the output relay board connected to the parallel bus.

The watchdog facility has two output relay contacts, one Normally Open (N/O)and one

Normally Closed (N/C). These are driven by the main processor board and indicate that the relay is in a healthy state.

The power supply board incorporates inrush current limiting. This limits the peak inrush current, during energization, to approximately 10 A.

Output Relay Board

The standard output relay boards hold different numbers of relays with normally open contacts and with changeover contacts. The relevant numbers are as follows:

The relays are driven from the 22 V power supply line. The relays’ state is written to or read from using the parallel data bus.

Depending on the relay model up to 32 output contacts may be provided through the use of up to 4 standard output relay boards.

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Relay System Overview

1.6.3

(PD) 10 Product Design

Relay Model

P543/P544

P545/P546

7

8

No of Relay Contacts

3

6

No of normally open contacts

Table 5 - Numbers of relay contacts for different models

4

2

No of changeover contacts

High Break Relay Board

One ‘high break’ output relay board consists of four normally open output contacts.

Arrangements of those boards are as follows:

Relay Model

P543/P544

P545

P546 with option A

P546 with option B

No of high break output relay boards

1 (to replace a standard board)

2 (to replace standard boards)

2 (to replace standard boards)

3 (to replace standard boards)

7

16

16

8

Total standard relay outputs

4

Total high break relay outputs

8

8

12

Table 6 - Numbers of relay contacts for different models

Note These relay contacts are polarity-sensitive . External wiring must comply with the polarity requirements described in the external connection diagram to ensure correct operation.

This board uses a hybrid of MOSFET Solid State Devices (SSD) in parallel with high capacity relay output contacts. The MOSFET has a varistor across it to provide protection which is required when switching off inductive loads because the stored energy in the inductor causes a reverse high voltage which could damage the MOSFET.

When there is a control input command to operate an output contact, the miniature relay is operated at the same time as the SSD. The miniature relay contact closes in nominally

3.5 ms and is used to carry the continuous load current; the SSD operates in <0.2 ms and is switched off after 7.5 ms. When the control input resets to open the contacts, the SSD is again turned on for 7.5 ms. The miniature relay resets in nominally 3.5 ms before the

SSD so the SSD is used to break the load. The SSD absorbs the energy when breaking inductive loads and so limits the resulting voltage surge. This contact arrangement is for switching dc circuits only. As the SSD comes on very fast (<0.2 ms) these high break output contacts have the added advantage of being very fast operating. See the High break contact operation diagram below:

P54x/EN PD/Nd5 Page (PD) 10-11

(PD) 10 Product Design

Databus control input on

1.6.3.1

Relay System Overview off

MOSFET operate 7ms on

MOSFET reset

7ms on

Relay contact closed

3.5ms + contact bounce 3.5ms

Load current

P1981ENa

Figure 3 - High break contact operation

High Break Contact Applications

1. Efficient Scheme Engineering

In traditional hardwired scheme designs, high break capability could only be achieved using external electromechanical trip relays. External MVAJ tripping relays can be used or the new high break contacts inside MiCOM relays can be used, reducing panel space.

2. Accessibility of CB Auxiliary Contacts

Common practice is to use circuit breaker 52a (CB Closed) auxiliary contacts to break the trip coil current on breaker opening, easing the duty on the protection contacts. In cases such as operation of disconnectors, or retrofitting, 52a contacts may be unavailable or unreliable. High break contacts can be used to break the trip coil current in these applications.

3. Breaker Fail

The technique to use 52a contacts in trip circuits was described above. However, in the event of failure of the local circuit breaker (stuck breaker), or defective auxiliary contacts (stuck contacts), the 52a contact action is incorrect. The interrupting duty at the local breaker then falls on the relay output contacts which may not be rated to perform this duty. MiCOM high break contacts will avoid the risk of burnt relay contacts.

4. Initiation of Teleprotection

The MiCOM high break contacts also offer fast making, which can provide faster tripping. Also fast keying of teleprotection is a benefit. Fast keying bypasses the usual contact operation time so that permissive, blocking and intertrip commands can be routed faster.

Page (PD) 10-12 P54x/EN PD/Nd5

Relay System Overview

1.7

1.8

1.9

(PD) 10 Product Design

Hardware Communications Options

The Hardware Communications Options could mean that a second additional board is present if it was specified when the relay was ordered. Any such board is fitted into Slot

A, as this is the optional communications slot.

The hardware options board commonly allows a choice of IRIG-B, Ethernet, Redundant

Ethernet, PRP, HSR, Dual IP, Self-Healing Ring, RSTP, Dual Homing Star, Second Rear

Comms Ports, Optical Fibre connections). Some of these choices are mutually exclusive whereas others provide more than one option on the same board. An up-to-date list of the available combinations for the Hardware/Software combination of this product is shown in the Ordering Options section in Chapter 1 – Introduction .

The main options are described in more detail in the these sections:

• IRIG-B Modulated or Un-modulated Board (Optional)

Second Rear Communications Board (Optional)

Ethernet Board (Options)

IRIG-B Modulated or Un-modulated Board (Optional)

The optional IRIG-B board is an order option that can be fitted to provide an accurate timing reference for the relay. This can be used wherever an IRIG-B signal is available.

The IRIG-B signal is connected to the board with a BNC connector on the back of the relay. The timing information is used to synchronize the relay’s internal real-time clock to an accuracy of 1 ms. The internal clock is then used for the time tagging of the event, fault maintenance and disturbance records. The IRIG-B board can also be specified with a fiber optic or Ethernet rear communication port.

Second Rear Communications Board (Optional)

For relays with Courier, MODBUS, IEC60870-5-103 or DNP3.0 protocol on the first rear communications port there is the hardware option of a second rear communications port, which runs the Courier language. This can be used over one of three physical links: twisted pair K-BUS (non-polarity sensitive), twisted pair EIA(RS)485 (connection polarity sensitive) or EIA(RS)232.

This optional second rear port is designed typically for dial-up modem access by protection engineers and operators, when the main port is reserved for SCADA traffic.

The port supports full local or remote protection and control access by MiCOM S1 Studio software. The second rear port is also available with an on board IRIG-B input.

The second rear communications board, Ethernet and IRIG-B boards are mutually exclusive since they use the same hardware slot. For this reason two versions of second rear communications and Ethernet boards are available; one with an IRIG-B input and one without. The second rear communications board is shown in the following diagram.

P54x/EN PD/Nd5 Page (PD) 10-13

(PD) 10 Product Design

1.10

Relay System Overview

IRIG-B:

Modulated option or

Unmodulated option

Courier Port

(EIA232/

EIR485)

Not used

(EIA232)

SK4

Language: Courier always

Physical links:

EIA232

Or

EIA 485 (polarity sensitive)

Or

K-Bus (non-polarity sensitive)

SK5

Physical links are s/w selectable

P2083ENa

Figure 4 - Second rear comms board (optional)

Ethernet Board (Options)

This is a mandatory board for IEC 61850 enabled relays. It provides network connectivity through either copper or fiber media at rates of 10Mb/s (copper only) or 100Mb/s. There is also an option on this board to specify IRIG-B board port (modulated or unmodulated). This board, the IRIG-B board mentioned in the Hardware Communications

Options section and second rear comms. board mentioned in the IRIG-B Board section are mutually exclusive as they all use slot A within the relay case.

All modules are connected by a parallel data and address bus that allows the processor board to send and receive information to and from the other modules as required. There is also a separate serial data bus for conveying sample data from the input module to the processor. The relay modules and information flow diagram shows the modules of the relay and the flow of information between them.

This optional board is required for providing network connectivity using IEC 61850. There are a variety of different boards which provide Ethernet connectivity.

Important The choice of communication board options varies according to the Hardware Suffix and the Software Version of the MiCOM product. These are shown in the Ordering Options section in

Chapter 1 – Introduction ,

Page (PD) 10-14 P54x/EN PD/Nd5

Relay System Overview (PD) 10 Product Design

By way of example, the board options may include:

• single-port Ethernet boards (which use 10/100 Mbits/s Copper and modulated/unmodulated IRIG-B connectivity) single-port Ethernet boards (which use 100MBits/s optical fibre connectivity)

Redundant Ethernet Self-Healing Ring with one or more multi-mode fibre optic ports and modulated/unmodulated IRIG-B connectivity

Redundant Ethernet RSTP with one or more multi-mode fibre optic ports and modulated/unmodulated IRIG-B connectivity

Redundant Ethernet Dual Homing Star with one or more multi-mode fibre optic ports and modulated/unmodulated IRIG-B connectivity

Redundant Ethernet Parallel Redundancy Protocol (PRP) with one or more multimode fibre optic ports and modulated/unmodulated IRIG-B connectivity

Redundant Ethernet with PRP/HSR/Dual IP and a mixture of LC/RJ45 ports and modulated/unmodulated IRIG-B connectivity

Some of these options are mutually exclusive as they all use slot A in the relay case.

Note Each Ethernet board has a unique MAC address used for each Ethernet communication interface. The MAC address is printed on the rear of the board, next to the Ethernet sockets.

Note The 100 Mbits/s Fiber Optic ports use ST/LC type connectors and are suitable for 1310 nm multi-mode fiber type.

Copper ports use RJ45 type connectors. When using copper Ethernet, it is important to use Shielded Twisted Pair (STP) or Foil Twisted Pair (FTP) cables, to shield the IEC

61850 communications against electromagnetic interference. The RJ45 connector at each end of the cable must be shielded, and the cable shield must be connected to this

RJ45 connector shield, so that the shield is grounded to the relay case. Both the cable and the RJ45 connector at each end of the cable must be Category 5 minimum, as specified by the IEC 61850 standard.

It is recommended that each copper Ethernet cable is limited to a maximum length of 3 m and confined to one bay or cubicle.

When using IEC 61850 communications through the Ethernet board, the rear EIA(RS)485 and front EIA(RS)232 ports are also available for simultaneous use, both using the

Courier protocol.

One example of an Ethernet board is shown in this Ethernet board connectors diagram:

P54x/EN PD/Nd5 Page (PD) 10-15

(PD) 10 Product Design Relay System Overview

IRIG-B:

Modulated option or

Unmodulated option

10 Base- T/100

Base- Tx (RJ45)

Link activity LEDs

100 Base-FX

(ST type)

Figure 5 - Ethernet board connectors (optional)

P1980ENa

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Relay Software (PD) 10 Product Design

2 RELAY SOFTWARE

The relay software was introduced in the overview of the relay at the start of this chapter.

The software can be considered to be made up of these sections:

• The real-time operating system

The system services software

The platform software

• The protection and control software

These four elements are all processed by the same processor board.This section describes in detail the platform software and the protection and control software , which between them control the functional behavior of the relay. The following Relay software structure diagram shows the structure of the relay software.

Protection and Control Software

Fault locator task

Disturbance recorder task

Measurements and event, fault and disturbance records

Programmable & fixed scheme logic

Co-processor current differential algorithms

Protection task

Fourier signal processing

Protection algorithms

Platform software

Event, fault, disturbance, maintenance record logging

Remote communications interface –

IEC60870-5-103

Supervisor task

Protection and control settings

Settings database

Remote communications interface - ModBus

Sampling function – copies samples into

2-cycle buffer Control of output contacts and programmable LEDs

Front panel interface – LCD and keypad

Local and Remote communications interface - Courier

Sample data and digital logic inputs

Control of interfaces to keypad, LCD,

LEDs, front and rear comms ports.

Self-checking maintenance records.

System services software

Relay hardware

P1040ENa

Figure 6 - Relay software structure

2.1 Real-Time Operating System

The real-time operating system provides a framework for the different parts of the relay’s software to operate in.

The software is split into tasks; the real-time operating system is used to schedule the processing of the tasks to ensure that they are processed in the time available and in the desired order of priority. The operating system is also responsible in part for controlling the communication between the software tasks through the use of operating system messages.

P54x/EN PD/Nd5 Page (PD) 10-17

(PD) 10 Product Design

2.2

2.3

2.3.1

Relay Software

System Services Software

As shown in the above Relay software structure diagram, the system services software provides the low-level control of the relay hardware. It also provides the interface between the relay’s hardware and the higher-level functionality of the platform software and the protection and control software.

For example, the system services software provides drivers for items such as the LCD display, the keypad and the remote communication ports. It also controls the boot of the processor and downloading of the processor code into SRAM from non-volatile flash

EPROM at power up.

Platform Software

The platform software has these main functions:

• To deal with the management of the relay settings.

To control the logging of all records that are generated by the protection software, including alarms and event, fault, disturbance and maintenance records.

To store and maintain a database of all of the relay’s settings in non-volatile memory.

• To provide the internal interface between the settings database and each of the relay’s user interfaces. These interfaces are the front panel interface and the front and rear communication ports, using whichever communication protocol has been specified (Courier, MODBUS, IEC60870-5-103 and DNP3.0). The platform software converts the information from the database into the format required.

The platform software notifies the protection and control software of all settings changes and logs data as specified by the protection and control software.

Record Logging

The logging function is provided to store all alarms, events, faults and maintenance records. The records for all of these incidents are logged in battery backed-up SRAM in order to provide a non-volatile log of what has happened. The relay maintains four logs: one each for alarms, event records, fault records and maintenance records. The logs are maintained such that the oldest record is overwritten with the newest record.

The maximum number of alarms, event records, fault records and maintenance records varies depending on the product, the software and the model options, as shown below:

Software

Alarms (maximum)

Events Records

Hx.x and later

96

1024 (0 - 1023)

41/51 to A0/B0 Versions prior to 41/51

96

1024 (0 - 1023)

96

512 (0 - 511)

Fault Records

Maintenance Records

15 (0 – 14)

10 (0 – 9)

10 (0 – 9)

10 (0 – 9)

5 (0 – 4)

5 (0 – 4)

The logging function can be initiated from the protection software or the platform software, and is responsible for logging of a maintenance record in the event of a relay failure. This includes errors that have been detected by the platform software itself or error that are detected by either the system services or the protection software functions.

See also the section on Self-Testing and Diagnostics later in this section.

Page (PD) 10-18 P54x/EN PD/Nd5

Relay Software

2.3.2

2.3.3

2.4

2.4.1

(PD) 10 Product Design

Settings Database

The settings database contains all of the settings and data for the relay, including the protection, disturbance recorder and control and support settings. The settings are maintained in non-volatile memory. The platform software’s management of the settings database make sure that only one user interface modifies the database settings at any one time. This feature is used to avoid confusion between different parts of the software during a setting change. For changes to protection settings and disturbance recorder settings, the platform software operates a ‘scratchpad’ in SRAM memory. This allows a number of setting changes to be made in any order but applied to the protection elements, disturbance recorder and saved in the database in non-volatile memory, at the same time. If a setting change affects the protection and control task, the database advises it of the new values.

The database is directly compatible with Courier communications.

Database Interface

The other function of the platform software is to implement the relay’s internal interface between the database and each of the relay’s user interfaces. The database of settings and measurements must be accessible from all of the relay’s user interfaces to allow read and modify operations. The platform software presents the data in the appropriate format for each user interface.

Protection and Control Software

The protection and control software interfaces with the platform software for settings changes and logging of records, and with the system services software for acquisition of sample data and access to output relays and digital opto-isolated inputs. It also performs the calculations for all of the protection algorithms of the relay. This includes digital signal processing such as Fourier filtering and ancillary tasks such as the disturbance recorder.

The protection and control software task processes all of the protection elements and measurement functions of the relay. It has to communicate with both the system services software and the platform software, and organize its own operations. The protection software has the highest priority of any of the software tasks in the relay, to provide the fastest possible protection response. It also has a supervisor task that controls the startup of the task and deals with the exchange of messages between the task and the platform software.

After initialization at start-up, the protection and control task on the main processor board is suspended until the co-processor board re-starts via an interrupt. Where the coprocessor board has failed, the protection task will automatically start after six analog samples have been received. In normal operation the task will be re-started by the coprocessor 16 times per cycle. The acquisition of samples on the main processor board is controlled by a ‘sampling function’ which is called by the system services software and takes each set of new samples from the input module and stores them in a two-cycle buffer, these samples are also stored concurrently by the co-processor.

Signal Processing

The sampling function filters the digital input signals from the opto-isolators and tracks the frequency of the analog signals. The digital inputs are checked against their previous value over a period of half a cycle. Therefore a change in the state of one of the inputs must be maintained over at least half a cycle before it is registered with the protection and control software.

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(PD) 10 Product Design

2.4.2

2.4.2.1

2.4.3

Relay Software

The frequency tracking of the analog input signals is achieved by a recursive Fourier algorithm which is applied to one of the input signals, and works by detecting a change in the measured signal’s phase angle. The calculated value of the frequency is used to modify the sample rate being used by the input module to achieve a constant sample rate of 48 samples per cycle of the power waveform. The value of the frequency is also stored for use by the protection and control task.

When the protection and control task is re-started by the sampling function, it calculates the Fourier components for the analogue signals. The Fourier components are calculated using a one-cycle, 48-sample Discrete Fourier Transform (DFT). The DFT is always calculated using the last cycle of samples from the 2-cycle buffer, i.e. the most recent data is used. The DFT used in this way extracts the power frequency fundamental component from the signal and produces the magnitude and phase angle of the fundamental in rectangular component format. The DFT provides an accurate measurement of the fundamental frequency component, and effective filtering of harmonic frequencies and noise. This performance is achieved in conjunction with the relay input module which provides hardware anti-alias filtering to attenuate frequencies above the half sample rate, and frequency tracking to maintain a sample rate of 48 samples per cycle. The Fourier components of the input current and voltage signals are stored in memory so that they can be accessed by all of the protection elements’ algorithms. The samples from the input module are also used in an unprocessed form by the disturbance recorder for waveform recording and to calculate true rms values of current, voltage and power for metering purposes.

Main Protection Digital Filtering - Co-Processor Board

Differential Protection

The differential protection is based on the relays at the line ends exchanging data messages four times per cycle. To achieve this the co-processor takes the frequencytracked samples at 48 samples per cycle from the input board and converts these to 8 samples per cycle based on the nominal frequency (i.e. not frequency tracked). The coprocessor calculates the Fourier transform of the fixed rate samples after every sample, using a one-cycle window. This generates current measurements eight times per cycle which are used for the differential protection algorithm and transmitted to the remote relay(s) using the HDLC (High-level Data Link Control) communication protocol.

The co-processor is also responsible for managing intertripping commands via the communication link, and re-configuration instigated from the remote relay(s). Data exchange between the co-processor board and the main processor board is achieved through the use of shared memory on the co-processor board. When the main processor accesses this memory, the co-processor is temporarily halted. After the co-processor code has been copied onto the board at initialization, the main traffic between the two boards consists of setting change information, commands from the main processor, differential protection measurements and output data.

Distance Protection Filters

Important This applies to the MiCOM P54x products which include distance protection options. More recent Software versions

(such as D1 and H4) include distance protection options, but exclude non-distance variants. Depending on the specific model and the options, older software versions (such as 41, 42,

44, 45, 47, A0 and C0) may not include distance protection functions.

Page (PD) 10-20 P54x/EN PD/Nd5

Relay Software

2.4.4

2.4.4.1

2.4.5

P54x/EN PD/Nd5

(PD) 10 Product Design

The current and voltage inputs are filtered, using Finite Impulse Response (FIR) digital filters to reduce the effects of non-power frequency components in the input signals, such as DC offsets in current waveforms, and Capacitor Voltage Transformer (CVT) transients in the voltages.

• The P44y/P54x uses a combination of a ¼-cycle filter using 12 coefficients, a ½cycle filter using 24 coefficients, and a one-cycle filter using 48 coefficients.

The relay automatically performs intelligent switching in the application of the filters, to select the best balance of removal of transients with fast response.

Note The protection elements themselves then perform additional filtering, for example implemented by the trip count strategy.

Frequency Response

Important This applies to the MiCOM P54x products which include distance protection options. More recent Software versions

(such as D1 and H4) include distance protection options, but exclude non-distance variants. Depending on the specific model and the options, older software versions (such as 41, 42,

44, 45, 47, A0 and C0) may not include distance protection functions.

The combined affect of the anti-aliasing and Fourier filters is shown in the following

Frequency response diagram. This shows the frequency response of the 12, 24 and 48 coefficient filters, noting that all have a gain of unity at the fundamental.

Filter Response

2.5

2

1.5

Full

Half

Quarter

1

0.5

0

0 3 6 9 12 15 18 21

Harmonic

Figure 7 - Frequency response of filters

P1305ENa

Fourier Filtering

All backup protection and measurement functions use one-cycle Fourier digital filtering to extract the power frequency component. This filtering is performed on the main processor board.

Programmable Scheme Logic (PSL)

The Programmable Scheme Logic (PSL) allows the relay user to configure an individual protection scheme to suit their own particular application. This is done with programmable logic gates and delay timers.

Page (PD) 10-21

(PD) 10 Product Design

2.4.5.1

Relay Software

The input to the PSL is any combination of the status of the digital input signals from the opto-isolators on the input board, the outputs of the protection elements such as protection starts and trips, and the outputs of the fixed PSL. The fixed PSL provides the relay’s standard protection schemes. The PSL consists of software logic gates and timers. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay or to condition the logic outputs, such as to create a pulse of fixed duration on the output, regardless of the length of the pulse on the input. The outputs of the PSL are the LEDs on the front panel of the relay and the output contacts at the rear.

The execution of the PSL logic is event driven: the logic is processed whenever any of its inputs change, for example as a result of a change in one of the digital input signals or a trip output from a protection element. Also, only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time that is used by the PSL. The protection and control software updates the logic delay timers and checks for a change in the PSL input signals every time it runs.

This system provides flexibility for the user to create their own scheme logic design.

However, it also means that the PSL can be configured into a very complex system, and because of this setting of the PSL is implemented through the PC support package

MiCOM S1 Studio.

PSL Data

Attaching A Text Identifier for Version Traceability

In the PSL editor in MiCOM S1 Studio, when a PSL file is downloaded to the relay the user can specify the group to download the file and a 32 character PSL reference description. This PSL reference is shown in the Grp. 1/2/3/4 PSL Ref.

cell in the PSL

DATA menu in the relay. The download date and time and file checksum for each group’s

PSL file is also shown in the PSL DATA menu in cells Date/Time and Grp. 1/2/3/4 PSL

ID . The PSL data can be used to show if a PSL has been changed and can be useful in providing information for version control of PSL files.

The default PSL Reference description is Default PSL followed by the model number, for example, Default PSL P54x ??????

0yy0 ?

where x refers to the model such as 1, 2, 3 and yy refers to the software version such as H4. This is the same for all protection setting groups (since the default PSL is the same for all groups). Since the LCD display (bottom line) only has space for 16 characters, the display must be scrolled to see all 32 characters of the PSL Reference description.

The default date and time is the date and time when the defaults were loaded.

Note The PSL DATA column information is only supported by Courier and

MODBUS, but not DNP3.0 or IEC60870-5-103.

Page (PD) 10-22 P54x/EN PD/Nd5

Relay Software

2.4.6

2.4.7

2.4.8

(PD) 10 Product Design

Function Key Interface

The ten function keys interface directly into the PSL as digital input signals and are processed based on the PSLs event-driven execution. However, a change of state is only recognized when a key press is executed, on average for longer than 200 ms. The time to register a change of state depends on whether the function key press is executed at the start or the end of a protection task cycle, with the additional hardware and software scan time included. A function key press can provide a latched (toggled mode) or output on key press only (normal mode) depending on how it is programmed and can be configured to individual protection scheme requirements. The latched state signal for each function key is written to non-volatile memory and read from non-volatile memory during relay power up, allowing the function key state to be reinstated after power-up if the relay power is lost.

Event, Fault and Maintenance Recording

A change in any digital input signal or protection element output signal is used to indicate that an event has taken place. When this happens, the protection and control task sends a message to the supervisor task to show that an event is available to be processed. The protection and control task writes the event data to a fast buffer in SRAM that is controlled by the supervisor task. When the supervisor task receives either an event or fault record message, it instructs the platform software to create the appropriate log in battery backed-up SRAM. The supervisor’s buffer is faster than battery backed-up SRAM, therefore the protection software is not delayed waiting for the records to be logged by the platform software. However, if a large number of records to be logged are created in a short time, some may be lost if the supervisor’s buffer is full before the platform software is able to create a new log in battery backed-up SRAM. If this occurs, an event is logged to indicate this loss of information.

Maintenance records are created in a similar manner with the supervisor task instructing the platform software to log a record when it receives a maintenance record message.

However, it is possible that a maintenance record may be triggered by a fatal error in the relay, in which case it may not be possible to successfully store a maintenance record, depending on the nature of the problem. See the Self-Testing and Diagnostics section .

Fault records are stored in the sequence of events. They can be viewed locally or remotely and include:

Faulty phase(s)

Protection Tripped

Protection Started

Fault duration

Fault type (internal or external fault)

Operating time

Primary or Secondary RMS values of prefault phase and neutral currents or angle of each winding

Primary or Secondary RMS values of fault phase and neutral currents or angle of each winding

Primary or Secondary RMS values of differential and biased current of each phase

Enhanced Disturbance Recorder

The analog values and logic signals are routed from the protection and control software to the disturbance recorder software. The platform software interfaces with the disturbance recorder to allow the stored records to be extracted.

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(PD) 10 Product Design

2.4.9

Relay Software

The disturbance recorder operates as a separate task from the protection and control task. It can record the waveforms for up to 12 calibrated analog channels and the values of up to 32 digital signals.

Several seconds of data can be recorded and the recording time is user selectable.

• Up to 50 seconds can be recorded for most relays - a minimum number of 5 records of 10 seconds each and a maximum of 50 records with 10 seconds each can be set.

The disturbance recorder is supplied with data by the protection and control task once per cycle. The disturbance recorder collates the data that it receives into a disturbance record of the required length. The disturbance records can be extracted by MiCOM S1

Studio which can also store the data in COMTRADE format, thus allowing the use of other packages to view the recorded data.

Fault Locator

The relay has an integral fault locator (which is separate from the protection and control task). The fault locator samples data from analog current and voltage inputs and writes it to a cyclic 12-cycle buffer until a fault condition is detected. . It then uses this data to provide a distance to fault location feature.

The data in the input buffer is then held to allow the fault calculation to be made and to calculate a distance to fault location. The calculated location of the fault is sent to the protection and control task which includes it in the fault record for the fault. When the fault record is complete (i.e. includes the fault location), the protection and control task can send a message to the supervisor task to log the fault record.

Page (PD) 10-24 P54x/EN PD/Nd5

Self-Testing and Diagnostics

3

3.1

3.1.1

3.1.2

(PD) 10 Product Design

SELF-TESTING AND DIAGNOSTICS

The relay includes several self-monitoring functions to check the operation of its hardware and software when it is in service. These are included so that if an error or fault occurs in the relay’s hardware or software, the relay is able to detect and report the problem and attempt to resolve it by performing a reboot. The relay must therefore be out of service for a short time, during which the Healthy LED on the front of the relay is OFF and, the watchdog contact at the rear is ON. If the reboot fails to resolve the problem, the relay takes itself permanently out of service; the Healthy LED stays OFF and watchdog contact stays ON.

If a problem is detected by the self-monitoring functions, the relay stores a maintenance record in battery backed-up SRAM.

The self-monitoring is implemented in two stages: firstly a thorough diagnostic check that is performed when the relay is booted-up secondly a continuous self-checking operation that checks the operation of the relay’s critical functions while it is in service.

Start-Up Self-Testing

The self-testing that is carried out when the relay is started takes a few seconds to complete, during which time the relay’s protection is unavailable. This is shown by the

Healthy LED on the front of the relay which is ON when the relay has passed all tests and entered operation. If the tests detect a problem, the relay remains out of service until it is manually restored to working order.

The operations that are performed at start-up are:

System Boot

Initialization Software

Platform Software Initialization and Monitoring

System Boot

The integrity of the flash memory is verified using a checksum before the program code and data are copied into SRAM and executed by the processor. When the copy is complete the data then held in SRAM is checked against that in flash memory to ensure they are the same and that no errors have occurred in the transfer of data from flash memory to SRAM. The entry point of the software code in SRAM is then called which is the relay initialization code.

Initialization Software

The initialization process includes the operations of initializing the processor registers and interrupts, starting the watchdog timers (used by the hardware to determine whether the software is still running), starting the real-time operating system and creating and starting the supervisor task.

P54x/EN PD/Nd5 Page (PD) 10-25

(PD) 10 Product Design

3.1.3

3.2

Self-Testing and Diagnostics

In the initialization process the relay checks the following.

• The status of the battery

The integrity of the battery backed-up SRAM that stores event, fault and disturbance records

The voltage level of the field voltage supply that drives the opto-isolated inputs

The operation of the LCD controller

The watchdog operation

When the initialization software routine is complete, the supervisor task starts the platform software.

Platform Software Initialization and Monitoring

In starting the platform software, the relay checks the integrity of the data held in nonvolatile memory with a checksum, the operation of the real-time clock, and the IRIG-B board if fitted. The final test that is made concerns the input and output of data; the presence and healthy condition of the input board is checked and the analog data acquisition system is checked through sampling the reference voltage.

At the successful conclusion of all of these tests the relay is entered into service and the protection started-up.

Continuous Self-Testing

When the relay is in service, it continually checks the operation of the critical parts of its hardware and software. The checking is carried out by the system services software (see section on relay software earlier in this section) and the results reported to the platform software.

The functions that are checked are as follows:

• The flash EPROM containing all program code and language text is verified by a checksum

The code and constant data held in SRAM is checked against the corresponding data in flash EPROM to check for data corruption

The SRAM containing all data other than the code and constant data is verified with a checksum

The non-volatile memory containing setting values is verified by a checksum, whenever its data is accessed

The battery status

The level of the field voltage

The integrity of the digital signal I/O data from the opto-isolated inputs and the relay contacts, is checked by the data acquisition function every time it is executed.

The operation of the analog data acquisition system is checked by the acquisition function every time it is executed. This is done by sampling the reference voltage on a spare multiplexed channel

• The operation of the IRIG-B board is checked, where it is fitted, by the software that reads the time and date from the board

If the Ethernet board is fitted, it is checked by the software on the main processor board.

If the Ethernet board fails to respond, an alarm is raised and the board is reset in an attempt to resolve the problem

Page (PD) 10-26 P54x/EN PD/Nd5

Self-Testing and Diagnostics (PD) 10 Product Design

In the unlikely event that one of the checks detects an error in the relay’s subsystems, the platform software is notified and it will attempt to log a maintenance record in battery backed-up SRAM. If the problem is with the battery status or the IRIG-B board, the relay continues in operation. However, for problems detected in any other area the relay shuts down and reboots. This result in a period of up to 5 seconds when protection is unavailable, but the complete restart of the relay including all initializations should clear most problems that could occur. An integral part of the start-up procedure is a thorough diagnostic self-check. If this detects the same problem that caused the relay to restart, the restart has not cleared the problem and the relay takes itself permanently out of service. This is indicated by the Healthy LED on the front of the relay which goes OFF, and the watchdog contact that goes ON.

P54x/EN PD/Nd5 Page (PD) 10-27

(PD) 10 Product Design

Notes:

Self-Testing and Diagnostics

Page (PD) 10-28 P54x/EN PD/Nd5

MiCOM P54x (P543, P544, P545 & P546) (CM) 11 Commissioning

P54x/EN CM/Nd5

COMMISSIONING

CHAPTER 11

Page (CM) 11-1

(CM) 11 Commissioning MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (CM) 11-2 P54x/EN CM/Nd5

Contents

CONTENTS

1 Introduction

2 Commissioning Test Menu

2.9

2.10

2.11

2.12

2.13

2.14

2.15

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

Opto I/P Status

Relay O/P Status

Test Port Status

Red and Green LED Status

Monitor Bits 1 to 8

Test Mode

Test Pattern

Contact Test

Test LEDs

Test Auto-Reclose

Static Test Mode

Loopback Mode

IM64 Test Pattern

IM64 Test Mode

Using a Monitor/Download Port Test Box

3 Setting Familiarization

4 Equipment Required for Commissioning

4.1

4.2

Minimum Equipment Required

Optional Equipment

5 Product Checks

5.1

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.2

5.2.1

5.2.2

5.2.3

5.2.3.1

5.2.3.2

5.2.4

5.2.4.1

5.2.4.2

With the Relay De-Energized

Visual Inspection

Current Transformer Shorting Contacts (Optional Check)

Insulation

External Wiring

Watchdog Contacts

Auxiliary Supply

With the Relay Energized

Watchdog Contacts

Liquid Crystal Display (LCD) Front Panel Display

Date and Time

With an IRIG-B Signal

Without an IRIG-B Signal

Light Emitting Diodes (LEDs)

Testing the Alarm and Out of Service LEDs

Testing the Trip LED

P54x/EN CM/Nd5

(CM) 11 Commissioning

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24

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10

13

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(CM) 11 Commissioning

5.2.4.3

5.2.5

5.2.6

5.2.7

5.2.8

5.2.8.1

5.2.8.2

5.2.8.3

5.2.9

5.2.9.1

5.2.9.2

5.2.9.3

5.2.10

5.2.11

Testing the User-Programmable LEDs

Field Voltage Supply

Input Opto-Isolators

Output Relays

Rear Communications Port

Courier Communications

IEC 60870-5-103 (VDEW) Communications

DNP3.0 Communications Interface

Second Rear Communications Port

K-Bus Configuration

EIA(RS)485 Configuration

EIA(RS)232 Configuration

Current Inputs

Voltage Inputs

6 Protection Communications Loopback

6.1

6.1.1

6.1.1.1

6.1.1.2

6.1.2

6.1.3

6.1.5.5

6.1.5.6

6.1.5.7

6.1.5.8

6.1.5.9

6.1.6

6.1.6.1

6.1.6.2

6.1.6.3

6.1.6.4

6.1.6.5

6.1.6.6

6.1.4

6.1.4.1

6.1.4.2

6.1.4.3

6.1.4.4

6.1.4.5

6.1.4.6

6.1.4.7

6.1.4.8

6.1.4.9

6.1.5

6.1.5.1

6.1.5.2

6.1.5.3

6.1.5.4

Protection Communications

Communications Loopback Setting

Channel 1 Transmit Power Level

Channel 2 Transmit Power Level

Loopback Communications Configuration

Fiber Connection

Communications using P591 Interface Units (G.703)

P591 Visual Inspection

P591 Insulation

P591 External Wiring

P591 Auxiliary Supply

P591 Light Emitting Diode (LED)

P591 Optical Received Signal Level

P591 Loopback

P591 Optical Transmitter Signal Level

P54x Optical Received Signal Level from P591

Communications using P592 Interface Units (V.35)

P592 Visual Inspection

P592 Insulation

P592 External Wiring

P592 Auxiliary Supply

P592 Light Emitting Diodes (LEDs)

P592 Optical Received Signal Level

P592 Loopback

P592 Optical Transmitter Signal Level

P54x Optical Received Signal Level from P592

Communications using P593 Interface Units (X.21)

P593 Visual Inspection

P593 Insulation

P593 External Wiring

P593 Auxiliary Supply

P593 Light Emitting Diodes (LEDs)

P593 Optical Received Signal Level

Page (CM) 11-4

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P54x/EN CM/Nd5

Contents (CM) 11 Commissioning

6.1.6.7

6.1.6.8

6.1.6.9

6.1.7

P593 Loopback Test

P593 Optical Transmitter Signal Level

P54x Optical Received Signal Level From P593

Loopback Test

7 GPS Synchronization

7.1.1

7.1.2

7.1.3

7.1.4

7.1.5

Commission the P594

P594 Optical Signal Strength at P54x Relay

Check Synchronization Signal at P54x Relay

Check GPS Failure Condition

Restore GPS

8.1

8.1.1

8.1.2

8.2

8.4

8.4.1

8.4.2

8.4.2.1

8.4.2.2

8.4.2.3

8.4.2.4

8.4.2.5

8.4.2.6

8.4.2.7

8.4.2.8

8.4.3

8.4.3.1

8.4.3.2

8.4.3.3

8.4.3.4

8.4.4

8.4.4.1

8.4.4.2

8.4.4.3

8.4.4.4

8.4.4.5

8.4.5

8.3

8.3.1

8.3.1.1

8.3.1.2

8.3.1.3

8.3.2

8.3.2.1

8.3.2.2

8.3.2.3

8 Setting Checks 45

Apply Application-Specific Settings

Protection Communications Loopback

Reset Statistics

Demonstrate Correct Relay Operation

Demonstrate Correct Relay Operation - Current Differential Elements 46

Current Differential Bias Characteristic

Connect the Test Circuit

Lower Slope

Upper Slope

Current Differential Operation and Contact Assignment

Phase A

Phase B

Phase C

46

46

47

48

49

49

49

49

45

46

46

46

Demonstrate Correct Relay Operation - Non-Current Differential Elements49

Protection Dependencies 49

Distance Protection Single-End Testing

Connection and Preliminaries

Zone 1 Reach Check

Zone 2 Reach Check

Zone 3 Reach Check

Zone 4 Reach Check (if Enabled)

Zone P Reach Check (if Enabled)

Resistive Reach (Quadrilateral Characteristics only)

Load Blinder

Distance Protection Operation and Contact Assignment

Phase A

Phase B

Phase C

Time Delay Settings tZ1 Ph, and tZ2 - tZ4

Distance Protection Scheme Testing

Scheme Trip Test for Zone 1 Extension Only

Scheme Trip Tests for Permissive Schemes (PUR/POR only)

Scheme Trip Tests for Blocking Scheme Only

Signal Send Test for Permissive Schemes (PUR/POR Only)

Signal Send Test for Blocking Scheme Only

Scheme Timer Settings

50

50

51

51

51

52

52

52

52

52

52

53

53

53

53

54

54

55

55

55

56

44

44

44

44

44

44

42

43

43

43

P54x/EN CM/Nd5 Page (CM) 11-5

(CM) 11 Commissioning

8.4.6

8.4.6.1

8.4.6.2

8.4.6.3

8.4.7

8.4.7.1

8.4.7.2

8.4.7.3

8.4.8

8.4.8.1

8.4.8.2

Delta Directional Comparison

Connection and Preliminaries

Single-Ended Injection Test

Forward Fault Preparation

Delta Directional Comparison Operation and Contact Assignment

Phase A

Phase B

Phase C

Delta Directional Comparison Scheme Testing

Signal Send Test for Permissive Schemes (POR/POTT Only)

Signal Send Test FOR Blocking Schemes Only

8.4.9

8.4.9.1

8.4.9.2

8.4.9.3

8.4.9.4

Out-of-Step Protection (OST) Protection (if Enabled)

Predictive OST Setting

OST Setting

Predictive and OST Setting

‘Tost’ Timer Test

8.4.10

8.4.11

Directional Earth Fault Aided Scheme (Ground Current Pilot Scheme)

8.4.10.1

Connect the Test Circuit

8.4.10.2

DEF Aided Scheme - Forward Fault Trip Test

DEF Aided Scheme - Scheme Testing

8.4.11.1

Signal Send Test for Permissive Schemes (POR/POTT Only)

8.4.11.2

Signal Send Test for Blocking Schemes Only

8.4.12

Backup Phase Overcurrent Protection

8.4.12.1

Connect the Test Circuit

8.4.12.2

Perform the Test

8.4.12.3

Check the Operating Time

8.4.13

Restoration of Communications and Clearing VTS

8.5

Check Trip and Auto-Reclose Cycle

9 End-to-End Protection Communication Tests

9.1

9.1.1

9.1.1.1

9.1.1.2

9.1.2

9.1.3

9.1.4

9.2

9.2.1

9.2.2

Remove Local Loopbacks

Direct Fiber and C37.94 Connections

Direct Fiber Connections

Fiber Connections to C37.94

Communications using P591 Interface Units

Communications using P592 Interface Units

Communications using P593 Interface Units

Remote Loopback Removal

Remove Loopbacks at Remote Terminal Connected to Channel 1

Remove Loopbacks at Remote Terminal Connected to Channel 2

9.3

9.3.1

9.3.2

Verify Communications between Relays

Communications Statistics and Status - Non-GPS Synchronised

Communications Statistics and Status - GPS Synchronised with P594

10 End-to-End Scheme Tests

10.1

Signaling Channel Check

10.1.1

Aided Scheme 1

10.1.1.1

Remote End Preparation to Observe Channel Arrival

Contents

67

67

67

67

68

68

69

69

69

69

70

70

70

70

71

71

71

71

61

61

62

62

62

62

59

60

60

60

60

63

63

64

64

65

57

57

58

58

58

58

58

56

56

56

57

66

Page (CM) 11-6 P54x/EN CM/Nd5

Tables (CM) 11 Commissioning

10.1.1.2

Application of the Test

10.1.1.3

Channel Check in the Opposite Direction

10.1.2

Aided Scheme 2

11 On-Load Checks

11.1

11.1.1

11.1.2

Confirm Current and Voltage Transformer Wiring

Voltage Connections

Current Connections

11.2

11.3

11.4

11.5

11.6

Measure Capacitive Charging Current

Check Differential Current

Check Consistency of Current Transformer Polarity

On Load Directional Test

Signaling Channel Check (if Not Already Completed)

12 Final Checks

TABLES

71

72

72

73

73

73

74

74

75

75

75

75

76

Table 1 - Commission tests

Table 2 - Current transformer shorting contact locations

Table 3 - Watchdog contact status

Table 4 - Operational range of auxiliary supply Vx

Table 5 - Field voltage terminals

Table 6 - EIA(RS)485 terminals

Table 7 - 2 nd

rear communications port K-Bus terminals

Table 8 - Second rear communications port EIA(RS)232 terminals

Table 9 - CT ratio settings

Table 10 - Voltage input terminals

Table 11 - Voltage ratio settings

Table 12 - Record the transmit power level.

Table 13 - Bias and differential currents (lower slope)

Table 14 - Bias and differential currents (upper slope)

Table 15 - Tripping and single/double circuit breakers

Table 16 - Tripping and single/double circuit breakers

Table 17 - Fault types and responses

Table 18 - Relay responses

Table 19 - Tripping and single/double circuit breakers

Table 20 - Predictive OST state sequence

Table 21 - OST state sequence

Table 22 - Relay responses

Table 23 - Characteristic operating times for I>1

Page (CM) 11-

54

57

58

60

34

36

47

48

49

52

10

21

22

23

26

29

31

32

33

34

60

62

64

P54x/EN CM/Nd5 Page (CM) 11-7

(CM) 11 Commissioning FiguresIntroduction

Table 24 - Measurement values

Table 25 – Maximum/Minimum transmitter power

Table 26 - Test port status responses

Table 27 - Measured voltages and VT ratio settings

FIGURES

Figure 1 - Auto-reclose default PSL - P543 & P545 SW ver 44 and 54

Figure 2 - Auto-reclose default PSL - P544 & P546 SW ver 45 and 55

Figure 3 - Rear terminal blocks on size 80TE case

Figure 4 - Location of securing screws for heavy duty terminal blocks

Figure 5 - Connection for bias characteristic testing

Figure 6 - Four state impedances

Page (CM) 11-

14

14

20

21

47

59

68

68

72

74

Page (CM) 11-8 P54x/EN CM/Nd5

Introduction

1

(CM) 11 Commissioning

INTRODUCTION

MiCOM P40 relays are fully numerical in their design, implementing all protection and non-protection functions in software. The relays use a high degree of self-checking and give an alarm in the unlikely event of a failure. Therefore, the commissioning tests do not need to be as extensive as with non-numeric electronic or electro-mechanical relays.

To commission numeric relays, it is only necessary to verify that the hardware is functioning correctly and the application-specific software settings have been applied to the relay. It is considered unnecessary to test every function of the relay if the settings have been verified by one of the following methods:

Extracting the settings applied to the relay using appropriate setting software

(preferred method)

Using the operator interface

To confirm that the product is operating correctly once the application-specific settings have been applied, perform a test on a single protection element.

Unless previously agreed to the contrary, the customer is responsible for determining the application-specific settings to be applied to the relay and for testing any scheme logic applied by external wiring or configuration of the relay’s internal programmable scheme logic.

Blank commissioning test and setting records are provided within this manual for completion as required.

As the relay’s menu language is user-selectable, the Commissioning Engineer can change it to allow accurate testing as long as the menu is restored to the customer’s preferred language on completion.

To simplify the specifying of menu cell locations in these Commissioning Instructions, they are given in the form [courier reference: COLUMN HEADING, Cell Text]. For example, the cell for selecting the menu language (first cell under the column heading) is in the System Data column (column 00) so it is given as [0001: SYSTEM DATA,

Language].

P54x/EN CM/Nd5 Page (CM) 11-9

(CM) 11 Commissioning

2

Commissioning Test Menu

COMMISSIONING TEST MENU

To help minimize the time needed to test MiCOM relays the relay provides several test facilities under the ‘ COMMISSION TESTS ’ menu heading. There are menu cells which allow the status of the opto-isolated inputs, output relay contacts, internal Digital Data

Bus (DDB) signals and user-programmable LEDs to be monitored. Additionally there are cells to test the operation of the output contacts, user-programmable LEDs and, where available, the auto-reclose cycles.

The following table shows the relay menu of commissioning tests, including the available setting ranges and factory defaults. Each of the main menu tests are described in more detail in the following sections.

Menu text Default setting DDB Settings

COMMISSION TESTS

Opto I/P Status

Relay O/P Status

Test Port Status

LED Status

Monitor Bit 1

Monitor Bit 2

Monitor Bit 3

Monitor Bit 4

Monitor Bit 5

Monitor Bit 6

Monitor Bit 7

Monitor Bit 8

Test Mode

Test Pattern

Contact Test

Test LEDs

Test Auto-reclose

Static Test

Loopback Mode

IM64 TestPattern

1060: LED_CON_R1

1062: LED_CON_R2

1064: LED_CON_R3

1066: LED_CON_R4

1068: LED_CON_R5

1070 :LED_CON_R6

1072: LED_CON_R7

1074: LED_CON_R8

Disabled

All bits set to 0

No Operation

No Operation

No Operation

Disabled

Disabled

All bits set to 0

IM64 Test Mode Disabled

Table 1 - Commission tests

0 to 1791

See Relay Menu Database

( P54x/EN MD ) for details of digital data bus signals

Disabled

Test Mode

Contacts Blocked

0 = Not Operated

1 = Operated

No Operation

Apply Test

Remove Test

No Operation

Apply Test

No Operation

3 Pole Test

Pole A Test

Pole B Test

Pole C Test

Enabled, Disabled

Disabled, Internal, External

0 = Not Operated

1 = Operated

Disabled or Enabled

Page (CM) 11-10 P54x/EN CM/Nd5

Commissioning Test Menu

2.1

2.2

2.3

2.4

(CM) 11 Commissioning

Opto I/P Status

This menu cell displays the status of the relay’s opto-isolated inputs as a binary string, a

‘ 1 ’ indicating an energized opto-isolated input and a ‘ 0 ’ a de-energized one. If the cursor is moved along the binary numbers the corresponding label text will be displayed for each logic input.

It can be used during commissioning or routine testing to monitor the status of the optoisolated inputs whilst they are sequentially energized with a suitable dc voltage.

Relay O/P Status

This menu cell displays the status of the Digital Data Bus (DDB) signals that result in energization of the output relays as a binary string, a ‘ 1 ’ indicating an operated state and

‘ 0 ’ a non-operated state. If the cursor is moved along the binary numbers the corresponding label text will be displayed for each relay output.

The information displayed can be used during commissioning or routine testing to indicate the status of the output relays when the relay is ‘ in service ’. Additionally fault finding for output relay damage can be performed by comparing the status of the output contact under investigation with it’s associated bit.

Note When the ‘Test Mode’ cell is set to ‘Enabled’ this cell will continue to indicate which contacts would operate if the relay was in-service, it does not show the actual status of the output relays.

Test Port Status

This menu cell displays the status of the eight Digital Data Bus (DDB) signals that have been allocated in the ‘ Monitor Bit ’ cells. If the cursor is moved along the binary numbers the corresponding DDB signal text string will be displayed for each monitor bit.

By using this cell with suitable monitor bit settings, the state of the DDB signals can be displayed as various operating conditions or sequences are applied to the relay. Thus the

Programmable Scheme Logic (PSL) can be tested.

Red and Green LED Status

P145, P24x, P34x, P44y, P54x, P547 or P841

The ‘Red LED Status’ and ‘Green LED Status’ cells are 18-bit binary strings that indicate which of the user-programmable LEDs on the relay are illuminated when accessing the relay from a remote location, a ‘1’ indicating a particular LED is lit and a ‘0’ not lit. When the status of a particular LED in both cells is ‘1’, this indicates the LEDs illumination is yellow.

P54x/EN CM/Nd5 Page (CM) 11-11

(CM) 11 Commissioning

2.5

Commissioning Test Menu

Monitor Bits 1 to 8

The eight ‘ Monitor Bit ’ cells allow the user to select the status of which digital data bus signals can be observed in the ‘ Test Port Status ’ cell or via the monitor/download port.

Each ‘ Monitor Bit ’ is set by entering the required Digital Data Bus (DDB) signal number from the list of available DDB signals in the Programmable Logic chapter. The pins of the monitor/download port used for monitor bits are given in the following table. The signal ground is available on pins 18, 19, 22 and 25.

Note The required Digital Data Bus (DDB) signal numbers are as follows:

0 - 1022 for P14x/P24x 0 - 2027 for P34x

0 - 1791 for P44y/P445/P54x/P547/P841

0 - 2047 for P44x

0 – 511 for P64x

Monitor bit

Monitor/download port pin

1

11

2

12

3

15

4

13

5

20

6

21

7

23

8

24

2.6 Test Mode

2.7

Page (CM) 11-12

Test Pattern

The ‘ Test Pattern ’ cell is used to select the output relay contacts that will be tested when the ‘ Contact Test ’ cell is set to ‘ Apply Test ’. The cell has a binary string with one bit for each user-configurable output contact which can be set to ‘ 1 ’ to operate the output under test conditions and ‘ 0 ’ to not operate it.

P54x/EN CM/Nd5

Commissioning Test Menu

2.8

2.9

(CM) 11 Commissioning

Contact Test

When the ‘ Apply Test ’ command in this cell is issued the contacts set for operation (set to ‘ 1 ’) in the ‘ Test Pattern ’ cell change state. After the test has been applied the command text on the LCD will change to ‘ No Operation ’ and the contacts will remain in the Test State until reset issuing the ‘ Remove Test ’ command. The command text on the

LCD will again revert to ‘ No Operation ’ after the ‘ Remove Test ’ command has been issued.

Note When the ‘Test Mode’ cell is set to ‘Enabled’ the ‘Relay O/P Status’ cell does not show the current status of the output relays and hence can not be used to confirm operation of the output relays. Therefore it will be necessary to monitor the state of each contact in turn.

Test LEDs

When the ‘ Apply Test ’ command in this cell is issued the eight/eighteen userprogrammable LEDs will illuminate for approximately 2 seconds before they extinguish and the command text on the LCD reverts to ‘ No Operation ’.

P54x/EN CM/Nd5 Page (CM) 11-13

(CM) 11 Commissioning

2.10

Commissioning Test Menu

Test Auto-Reclose

Where the relay provides an auto-reclose function, this cell will be available for testing the sequence of circuit breaker trip and auto-reclose cycles with the settings applied.

Issuing the command ‘3 Pole Trip’ will cause the relay to perform the first three phase trip/reclose cycle so that associated output contacts can be checked for operation at the correct times during the cycle. Once the trip output has operated the command text will revert to ‘No Operation’ whilst the rest of the auto-reclose cycle is performed. To test subsequent three phase auto-reclose cycles repeat the ‘3 Pole Trip’ command.

Similarly, where single pole auto-reclosing is available, the cycles for each single pole can be checked by sequentially issuing the ‘Pole A Test’, ‘Pole B Test’ or ‘Pole C Test’, as appropriate.

Note The default settings for the relay’s programmable scheme logic has the ‘AR

Trip Test’ signals mapped to the ‘Trip Input’ signals as shown in the “Autoreclose default PSL - P543 & P545 SW ver 44 and 54” diagram (P543 &

P545 software version 54) and in the “Auto-reclose default PSL - P544 &

P546 SW ver 45 and 55” diagram (P544 & P546 software version 55). If the programmable scheme logic has been changed, it is essential that these signals retain this mapping for the ‘Test Auto-reclose’ facility to work.

AR Trip Test A

DDB #577

AR Trip Test B

DDB #578

AR Trip Test C

DDB #579

AR Trip Test

DDB #576

Trip Inputs A

DDB #530

Trip Inputs B

DDB #531

Trip Inputs C

DDB #532

Trip Inputs 3Ph

DDB #529

Figure 1 - Auto-reclose default PSL - P543 & P545 SW ver 44 and 54

P4350ENa

AR Trip Test A

DDB #577

AR Trip Test B

DDB #578

AR Trip Test C

DDB #579

Trip Inputs A

DDB #530

Trip Inputs B

DDB #531

Trip Inputs C

DDB #532

Figure 2 - Auto-reclose default PSL - P544 & P546 SW ver 45 and 55

P4351ENa

Page (CM) 11-14 P54x/EN CM/Nd5

Commissioning Test Menu

2.11

2.12

(CM) 11 Commissioning

Static Test Mode

Modern dynamic secondary injection test sets are able to accurately mimic real power system faults. The test sets mimic an instantaneous fault “shot”, with the real rate of rise of current, and any decaying DC exponential component, according to the point on

(voltage) wave of fault inception. Injections for all three phases provide a six signal set of analog inputs: Va, Vb, Vc, Ia, Ib, Ic. Such injection test sets can be used with the P44y

(P443/P446), P445, P54x, with no special testing limitations.

Conversely, older test sets may not properly simulate:

A healthy prefault voltage memory

A real fault shot (instead a gradually varying current or voltage may be used)

The rate of rise of current and DC components

A six signal set of analog inputs (instead, these may offer for example: Va, Vb, Ia,

Ib only, to test for an A-B injection)

Such injection sets may be referred to as “Static” simulators.

As the P44y (P443/P446), P445 and P54x relies on voltage memories and delta step changes as would happen on a real power system, certain functions within the relay must be disabled or bypassed to allow injection testing. Selecting the Static Mode test option serves to bypass the delta phase selectors, and power swing detection.

For the tests, the delta directional line is also replaced by a conventional distance directional line, and the digital filtering slows to use a fixed one cycle window. Memory polarizing is replaced by cross-polarizing from unfaulted phases.

The Static Test mode allows older injection test sets to be retained, and used to commission and test the P44y, P445 & P54x.

Note Trip times may be up to ½ cycle longer when tested in the static mode, due to the nature of the test voltage and current, and the slower filtering. This is normal, and perfectly acceptable.

Loopback Mode

If the P54x relay is used as a current differential relay, i.e. [090F Phase Diff] within [09

CONFIGURATION] is enabled, the loopback test facilities provide to the user with the ability to check the current differential protection. On the other hand, if the P54x relay is not used as a current differential relay, i.e. [090F Phase Diff] is disabled and [0941

InterMiCOM

64

Fiber] is enabled within [09 CONFIGURATION], the loopback test facilities, provide to the user with the ability to check the InterMiCOM

64

signaling.

Note Selecting the [0F13 Loopback Mode] to Internal, only the internal software of the relay is checked whereas External will check both the software and hardware.

When the relay is switched into either ‘Loopback Mode’, the relay will automatically use generic addresses (address 0-0) and will respond as if it is connected to a remote relay with the current at the remote end equal to and in phase with the current injected at the local end. The signals sent and received (IM64) continue to be routed to and from the signals defined in the programmable logic.

P54x/EN CM/Nd5 Page (CM) 11-15

(CM) 11 Commissioning

2.13

2.14

2.15

Commissioning Test Menu

IM64 Test Pattern

The [0F14 IM64Test Pattern] cell is used in conjunction with the [IM64 Test Mode] cell to set a 16-bit pattern (8 bits per channel) that is transmitted by the InterMiCOM

64

message whilst ever the ‘IM64 Test Mode’ cell is set to ‘Enable’. The ‘IM64 Test Pattern’ cell has a binary string with one bit for each User Defined Inter-Relay Commands which can be set to ‘1’ to operate the IM64 output under test conditions and ‘0’ to not operate it.

IM64 Test Mode

When the Enable command in this cell [0F15] is issued, the InterMiCOM

64

commands change to reflect the state to the values set in the ‘IM64 Test Pattern’ cell. If set to

‘Disable’, the InterMiCOM

64

commands reflect the state of the signals generated by the protection and control functionality of the relay.

Using a Monitor/Download Port Test Box

A monitor/download port test box containing 8 LEDs and a switchable audible indicator is available from Schneider Electric, or one of their regional sales offices. It is housed in a small plastic box with a 25-pin male D-connector that plugs directly into the relay’s monitor/download port. There is also a 25-pin female D-connector which allows other connections to be made to the monitor/download port whilst the monitor/download port test box is in place.

Each LED corresponds to one of the monitor bit pins on the monitor/download port with

‘ Monitor Bit 1 ’ being on the left hand side when viewing from the front of the relay. The audible indicator can either be selected to sound if a voltage appears on any of the eight monitor pins or remain silent so that indication of state is by LED alone.

Page (CM) 11-16 P54x/EN CM/Nd5

Setting Familiarization

3

(CM) 11 Commissioning

SETTING FAMILIARIZATION

When first commissioning a relay, allow sufficient time to become familiar with how to apply the settings.

The Relay Menu Database document and the Introduction or Settings chapters contain a detailed description of the menu structure of Schneider Electric relays. The relay menu database is a separate document which can be downloaded from our website: www.schneider-electric.com

With the secondary front cover in place, all keys except the  key are accessible. All menu cells can be read. LEDs and alarms can be reset. However, no protection or configuration settings can be changed, or fault and event records cleared.

Removing the secondary front cover allows access to all keys so that settings can be changed, LEDs and alarms reset, and fault and event records cleared. However, to make changes to menu cells, the appropriate user role and password is needed.

Alternatively, if a portable PC with suitable setting software is available (such as MiCOM

S1 Studio), the menu can be viewed one page at a time, to display a full column of data and text. This PC software also allows settings to be entered more easily, saved to a file for future reference, or printed to produce a settings record. Refer to the PC software user manual for details. If the software is being used for the first time, allow sufficient time to become familiar with its operation.

P54x/EN CM/Nd5 Page (CM) 11-17

(CM) 11 Commissioning

4

4.1

4.2

Equipment Required for Commissioning

EQUIPMENT REQUIRED FOR COMMISSIONING

Minimum Equipment Required

The minimum equipment needed varies slightly, depending on the features provided by

• each type of MiCOM product. The list of minimum equipment is given below:

Multifunctional dynamic current and voltage injection test set.

Multimeter with suitable ac current range, and ac and dc voltage ranges of 0 -

440V and 0 - 250V respectively.

Continuity tester (if not included in multimeter).

Phase angle meter.

Phase rotation meter.

Note Modern test equipment may contain many of the above features in one unit.

Fiber optic power meter.

Fiber optic test leads (type and number according to application).

P594 Commissioning Instructions. If the scheme features P594 time synchronizing devices, these will need commissioning. Separate documentation containing commissioning instructions is available for the P594.

Overcurrent test set with interval timer

110 V ac voltage supply (if stage 1 of the overcurrent function is set directional)

100

precision wire wound or metal film resistor, 0.1% tolerance (0°C ±2°C)

Optional Equipment

Multi-finger test plug type Easergy test plug (if Easergy test block type is installed)

An electronic or brushless insulation tester with a dc output not exceeding 500 V

(for insulation resistance testing when required)

A portable PC, with appropriate software (enabling the rear communications port to be tested, if this is to be used, and saves considerable time during commissioning)

K-Bus to EIA(RS)232 protocol converter (if the first rear EIA(RS)485 K-Bus port or second rear port configured for K-Bus is being tested and one is not already installed)

EIA(RS)485 to EIA(RS)232 converter (if first rear EIA(RS)485 port or second rear port configured for EIA(RS)485 is being tested)

A printer, for printing a setting record from the portable PC

Page (CM) 11-18 P54x/EN CM/Nd5

Product Checks

5

(CM) 11 Commissioning

PRODUCT CHECKS

These product checks cover all aspects of the relay that need to be checked to ensure:

• that it has not been physically damaged before commissioning that it is functioning correctly and

• that all input quantity measurements are within the stated tolerances

If the application-specific settings have been applied to the relay before commissioning, it is advisable to make a copy of the settings to allow their restoration later.

If Programmable Scheme Logic (PSL) (other than the default settings with which the relay was supplied) has been applied, the default settings should be restored before commissioning. This can be done by:

Obtaining a setting file from the customer. This requires a portable PC with appropriate setting software for transferring the settings from the PC to the relay.

Extracting the settings from the relay itself. This requires a portable PC with appropriate setting software.

Manually creating a setting record. This could be done by stepping through the front panel menu using the front panel user interface.

5.1

If password protection is enabled, and the customer has changed password 2 that prevents unauthorized changes to some of the settings, either the revised password 2 should be provided, or the customer should restore the original password before testing is started.

Note If the password has been lost, a recovery password can be obtained from

Schneider Electric by quoting the serial number of the relay. The recovery password is unique to that relay and will not work on any other relay.

With the Relay De-Energized

The following group of tests should be carried out without the auxiliary supply applied to the relay and with the trip circuit isolated.

Before inserting the test plug, refer to the scheme diagram to ensure this will not cause damage or a safety hazard. For example, the test block may be associated with protection current transformer circuits. Before the test plug is inserted into the test block, make sure the sockets in the test plug which correspond to the current transformer secondary windings are linked.

P54x/EN CM/Nd5 Page (CM) 11-19

(CM) 11 Commissioning Product Checks

5.1.1

If a test block is not provided, isolate the voltage transformer supply to the relay using the panel links or connecting blocks. Short-circuit and disconnect the line current transformers from the relay terminals. Where means of isolating the auxiliary supply and trip circuit (such as isolation links, fuses and MCB) are provided, these should be used. If this is impossible, the wiring to these circuits must be disconnected and the exposed ends suitably terminated to prevent them from being a safety hazard.

Visual Inspection

5.1.2

Carefully examine the relay to see that no physical damage has occurred since installation.

Ensure that the case earthing connections, at the bottom left-hand corner at the rear of the relay case, are used to connect the relay to a local earth bar using an adequate conductor.

Current Transformer Shorting Contacts (Optional Check)

If required, the current transformer shorting contacts can be checked to ensure that they close when the heavy duty terminal block shown in the following figure(s)is disconnected from the current input PCB. Except as stated below, the heavy duty terminal block is shown as block reference C.

Page (CM) 11-20

Figure 3 - Rear terminal blocks on size 80TE case

P54x/EN CM/Nd5

Product Checks (CM) 11 Commissioning

Heavy duty terminal blocks are fastened to the rear panel using four crosshead screws.

These are at the top and bottom between the first and second, and third and fourth, columns of terminals (see the Location of Securing Screws for Terminal Blocks diagram below).

Note Use a magnetic-bladed screwdriver to avoid losing screws or leaving them in the terminal block.

Pull the terminal block away from the rear of the case and check with a continuity tester that all the shorting switches being used are closed. The following table(s) shows the terminals between which shorting contacts are fitted.

Current input P543

Shorting contact between terminals

P544 P545

1 A - common - 5 A

P546

I

A

I

B

I

C

I

A

(CT2)

I

B

(CT2)

I

C

(CT2)

C3 - C2 - C1

C6 - C5 - C4

C9 - C8 - C7

Not applicable

Not applicable

C3 - C2 - C1

C6 - C5 - C4

C9 - C8 - C7

E3 - E2 - E1

E6 - E5 - E4

D3 - D2 - D1

D6 - D5 - D4

D9 - D8 - D7

Not applicable

Not applicable

D3 - D2 - D1

D6 - D5 - D4

D9 - D8 - D7

F3 - F2 - F1

F6 - F5 - F4

Not applicable E9 - E8 - E7 Not applicable F9 - F8 - F7

I

SEF

I

M

C15 - C14 - C13 C15 - C14 - C13 D15 - D14 - D13 D15 - D14 - D13

C12 - C11 - C10 C12 - C11 - C10 D12 - D11 - D10 D12 - D11 - D10

Table 2 - Current transformer shorting contact locations

P54x/EN CM/Nd5

Heavy duty terminal block

P1042ENa

Figure 4 - Location of securing screws for heavy duty terminal blocks

Page (CM) 11-21

(CM) 11 Commissioning

5.1.3

5.1.4

Product Checks

Insulation

Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they haven’t been performed during installation.

Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a dc voltage not exceeding 500 V. Terminals of the same circuits should be temporarily connected together.

The main groups of relay terminals are: a) Voltage transformer circuits b) Current transformer circuits c) Auxiliary voltage supply d) Field voltage output and opto-isolated control inputs e) Relay contacts f) EIA(RS)485 communication port g) Case earth

The insulation resistance should be greater than 100 M

at 500 V.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the unit.

External Wiring

5.1.5

Page (CM) 11-22

If a MiCOM P991 or an Easergy test block is provided, check the connections against the wiring diagram. It is recommended that the supply connections are to the live side of the test block (colored orange with the odd numbered terminals 1, 3, 5, 7, and so on). The auxiliary supply is normally routed through terminals 13 (supply positive) and 15 (supply negative), with terminals 14 and 16 connected to the relay’s positive and negative auxiliary supply terminals respectively. However, check the wiring against the schematic diagram for the installation to ensure compliance with the customer’s normal practice.

Watchdog Contacts

Using a continuity tester, check that the watchdog contacts are in the states shown in the

Watchdog contact statu s table for a de-energized relay.

Terminals Contact state

Relay de-energized Relay energized

J11 - J12

J13 - J14

M11 - M12

M13 - M14

(P543 & P544)

(P543 & P544)

(P545 & P546)

(P545 & P546)

Closed

Open

Closed

Open

Open

Closed

Open

Closed

Table 3 - Watchdog contact status

P54x/EN CM/Nd5

Product Checks

5.1.6 Auxiliary Supply

(CM) 11 Commissioning

Nominal Supply Rating dc ac

24 - 48 V [-]

48 - 110 V

110 - 250 V

[40 - 100 V]

[100 - 240 V] dc

19 to 65 V

37 to 150 V

87 to 300 V

Table 4 - Operational range of auxiliary supply Vx

Operating Ranges

-

32 - 110 V

80 to 265 V ac

P54x/EN CM/Nd5 Page (CM) 11-23

5.2.1

5.2.2

(CM) 11 Commissioning

5.2

Product Checks

With the Relay Energized

The following group of tests verify that the relay hardware and software is functioning correctly and should be carried out with the auxiliary supply applied to the relay.

Watchdog Contacts

Using a continuity tester, check that the watchdog contacts are in the states shown in the

Watchdog contact statu s table for an energized relay.

Liquid Crystal Display (LCD) Front Panel Display

The Liquid Crystal Display (LCD) is designed to operate in a wide range of substation ambient temperatures. For this purpose, the Px40 relays have an LCD Contrast setting.

This allows the user to adjust the lightness or darkness of the displayed characters. The contrast is factory preset to account for a standard room temperature, however it may be necessary to adjust the contrast to give the best in-service display. To change the contrast, at the bottom of the CONFIGURATION column, use cell [09FF: LCD Contrast] to increment (darker) or decrement (lighter), as required.

5.2.3

Page (CM) 11-24

Date and Time

Before setting the date and time, ensure that the factory-fitted battery isolation strip that prevents battery drain during transportation and storage has been removed. With the lower access cover open, the presence of the battery isolation strip can be checked by a red tab protruding from the positive side of the battery compartment. Lightly pressing the battery to prevent it falling out of the battery compartment, pull the red tab to remove the isolation strip.

The data and time should now be set to the correct values. The method of setting depends on whether accuracy is being maintained through the optional inter-range instrumentation group standard B (IRIG-B) port on the rear of the relay.

P54x/EN CM/Nd5

Product Checks

5.2.3.1

5.2.3.2

5.2.4

(CM) 11 Commissioning

With an IRIG-B Signal

Note For P741 the IRIG-B signal may apply to the Central Unit only.

If a satellite time clock signal conforming to IRIG-B is provided and the relay has the optional IRIG-B port fitted, the satellite clock equipment should be energized.

To allow the relay’s time and date to be maintained from an external IRIG-B source cell

[DATE and TIME, IRIG-B Sync.] must be set to Enabled .

Ensure the relay is receiving the IRIG-B signal by checking that cell [DATE and TIME,

IRIG-B Status] reads Active .

Once the IRIG-B signal is active, adjust the time offset of the universal coordinated time

(satellite clock time) on the satellite clock equipment so that local time is displayed.

Check the time, date and month are correct in cell [0801: DATE and TIME, Date/Time].

The IRIG-B signal does not contain the current year so needs to be set manually in this cell.

If the auxiliary supply fails, with a battery fitted in the compartment behind the bottom access cover, the time and date is maintained. Therefore, when the auxiliary supply is restored, the time and date are correct and need not be set again.

To test this, remove the IRIG-B signal, then remove the auxiliary supply from the relay.

Leave the relay de-energized for approximately 30 seconds. On re-energization, the time in cell [DATE and TIME, Date/Time] should be correct. Then reconnect the IRIG-B signal.

Without an IRIG-B Signal

Note For P741 the IRIG-B signal may not apply to the Central Unit only. For the

P742/P743 it may apply to the Peripheral Unit only.

If the time and date is not being maintained by an IRIG-B signal, ensure that cell [0804:

DATE and TIME, IRIG-B Sync.] is set to Disabled .

Set the date and time to the correct local time and date using cell [0801: DATE and TIME,

Date/Time].

If the auxiliary supply fails, with a battery fitted in the compartment behind the bottom access cover, the time and date are maintained. Therefore when the auxiliary supply is restored, the time and date are correct and need not be set again.

To test this, remove the auxiliary supply from the relay for approximately 30 seconds. On re-energization, the time in cell [0801: DATE and TIME, Date/Time] should be correct.

Light Emitting Diodes (LEDs)

On power-up, the green LED should switch on and stay on, indicating that the relay is healthy. The relay has non-volatile memory which stores the state (on or off) of the alarm, trip and, if configured to latch, user-programmable LED indicators when the relay was last energized from an auxiliary supply. Therefore, these indicators may also switch on when the auxiliary supply is applied.

If any of these LEDs are on, reset them before proceeding with further testing. If the LED successfully resets (the LED switches off), there is no testing required for that LED because it is known to be operational.

Note It is likely that alarms related to the communications channels will not reset at this stage.

P54x/EN CM/Nd5 Page (CM) 11-25

(CM) 11 Commissioning

5.2.4.1

5.2.4.2

5.2.4.3

5.2.5

5.2.6

Product Checks

Testing the Alarm and Out of Service LEDs

The alarm and out of service LEDs can be tested using the COMMISSIONING TESTS menu column. Set cell [0F0D: COMMISSIONING TESTS, Test Mode] to Contacts

Blocked . Check that the out of service LED is on continuously and the alarm LED flashes.

It is not necessary to return cell [0F0D: COMMISSIONING TESTS, Test Mode] to

Disabled at this stage because the test mode will be required for later tests.

Testing the Trip LED

The trip LED can be tested by initiating a manual circuit breaker trip from the relay.

However, the trip LED will operate during the setting checks performed later. Therefore, no further testing of the trip LED is required at this stage.

Testing the User-Programmable LEDs

To test the user-programmable LEDs set cell [0F10: COMMISSIONING TESTS, Test

LEDs] to Apply Test . Check that all the programmable LEDs on the relay switch on.

Field Voltage Supply

The relay generates a field voltage of nominally 48 V that can be used to energize the opto-isolated inputs (alternatively the substation battery may be used).

Measure the field voltage across terminals 7 and 9 on the terminal block shown in the following table. Check that the field voltage is in the range 40 V to 60 V when no load is connected and that the polarity is correct.

Repeat for terminals 8 and 10

+ve

-ve

+ve

-ve

Supply rail

J7 & J8

J9 & J10

M7 & M8

M9 & M10

Terminal

P543 & P544

Product

P543 & P544

P545 & P546

P545 & P546

Table 5 - Field voltage terminals

Input Opto-Isolators

This test checks that all the opto-isolated inputs on the relay are functioning correctly.

P543 and P544 have 16 opto inputs

P545 and P546 have 24 opto inputs

Page (CM) 11-26 P54x/EN CM/Nd5

Product Checks (CM) 11 Commissioning

Energize the opto-isolated inputs one at a time; see the external connection diagrams in the Connection Diagrams chapter for terminal numbers. Ensure that the correct opto input nominal voltage is set in the Opto Config . Menu. Ensure correct polarity and connect the field supply voltage to the appropriate terminals for the input being tested.

Each opto input also has selectable filtering. This allows use of a pre-set filter of ½ cycle that renders the input immune to induced noise on the wiring.

Note The opto-isolated inputs may be energized from an external dc auxiliary supply (such as the station battery) in some installations. Check that this is not the case before connecting the field voltage, otherwise damage to the relay may result. If an external 24/27 V, 30/34 V, 48/54 V, 110/125 V,

220/250 V supply is being used it will be connected to the relay's optically isolated inputs directly. If an external supply is used it must be energized for this test, but only after confirming that it is suitably rated, with less than 12% ac ripple.

The status of each opto-isolated input can be viewed using either cell [0020: SYSTEM

DATA, Opto I/P Status] or [0F01: COMMISSIONING TESTS, Opto I/P Status], a 1 indicating an energized input and a 0 indicating a de-energized input. When each optoisolated input is energized, one of the characters on the bottom line of the display changes, to indicate the new state of the inputs.

P54x/EN CM/Nd5 Page (CM) 11-27

(CM) 11 Commissioning

5.2.7

Product Checks

Output Relays

This test checks that all the output relays are functioning correctly.

P543 and P544

P545

P546

P547

Model Outputs

14 standard or

Combination of 7 + 4 High-Break

32 standard or

Combination of 16 + 8 High-Break

32 standard OR

Combination of 16 + 8 High-Break OR

Combination of 8 + 12 High-Break

16 and 32

Note The high break output contacts fitted to I/O options “C” and “D” are polarity sensitive. External wiring should, wherever possible, be verified against polarity requirements described in the external connection diagram to ensure correct high break operation when in service.

Ensure that the cell [xxxx: COMMISSIONING TESTS, Test Mode] is set to Contacts

Blocked . (xxxx = 0F0E for P44x/P44y, 0F0D for P14x, P24x, P34x, P54x, P547, P64x or

P841).

The output relays should be energized one at a time. To select output relay 1 for testing, set cell [xxxx: COMMISSIONING TESTS, Test Pattern] to

00000000000000000000000000000001. (xxxx = 0F0F for P44x/P44y, 0F0E for P14x,

P24x, P34x, P445, P54x, P547, P64x or P841).

Connect a continuity tester across the terminals corresponding to output relay 1 as shown in the relevant external connection diagram in the Installation chapter.

To operate the output relay, set cell [xxxx: COMMISSIONING TESTS, Contact Test] to

Apply Test . Operation is confirmed by the continuity tester operating for a normally open contact and ceasing to operate for a normally closed contact. Measure the resistance of the contacts in the closed state. (xxxx = 0F11 for P44x, 0F0F for P14x, P24x, P34x,

P44y, P445, P54x, P547, P64x or P841).

Reset the output relay by setting cell [xxxx: COMMISSIONING TESTS, Contact Test] to

Remove Test . (xxxx = 0F11 for P44x, 0F0F for P14x, P24x, P34x, P44y, P445, P54x,

P547 or P64x).

Note Ensure that the thermal ratings of anything connected to the output relays during the contact test procedure are not exceeded by the associated output relay being operated for too long. Keep the time between application and removal of contact test to a minimum.

Repeat the test for the rest of the relays (the numbers depend on the model).

Return the relay to service by setting cell [0F0D: COMMISSIONING TESTS, Test Mode] to Disabled .

Page (CM) 11-28 P54x/EN CM/Nd5

Product Checks (CM) 11 Commissioning

5.2.8

5.2.8.1

5.2.8.2

P54x/EN CM/Nd5

Rear Communications Port

This test should only be performed where the relay is to be accessed from a remote location and varies depending on the communications standard adopted.

It is not the intention of the test to verify the operation of the complete system from the relay to the remote location, just the relay’s rear communications port and any protocol converter necessary.

A variety of communications protocols may be available. For further details, please see whichever of these sections are relevant for the device you are commissioning:

Courier Communications

If a K-Bus to EIA(RS)232 KITZ protocol converter is installed, connect a portable PC running the appropriate software (such as MiCOM S1 Studio or PAS&T) to the incoming

(remote from relay) side of the protocol converter.

If a KITZ protocol converter is not installed, it may not be possible to connect the PC to the relay installed. In this case a KITZ protocol converter and portable PC running appropriate software should be temporarily connected to the relay’s first rear K-Bus port.

The terminal numbers for the relay’s first rear K-Bus port are shown in the following table.

However, as the installed protocol converter is not being used in the test, only the correct operation of the relay’s K-Bus port will be confirmed.

Connection Terminal

K-Bus IEC 60870-5-103 or DNP3.0 P54x Product

Screen

1

2

Screen

1

2

Screen

+ve

-ve

Screen

+ve

-ve

M16

M17

M18

J16

J17

J18

P545, P546

P545, P546

P545, P546

P543, P544

P543, P544

P543, P544

Table 6 - EIA(RS)485 terminals

Ensure that the communications baud rate and parity settings in the application software are set the same as those on the protocol converter (usually a KITZ but could be a

SCADA RTU). The relay’s Courier address in cell [0E02: COMMUNICATIONS, Remote

Address] must be set to a value between 1 and 254.

Check that communications can be established with this relay using the portable PC.

IEC 60870-5-103 (VDEW) Communications

If the relay has the optional fiber optic communications port fitted, the port to be used should be selected by setting cell [0E07: COMMUNICATIONS, Physical Link] to Fiber

Optic or EIA(RS)485 .

IEC60870-5-103/VDEW communication systems are designed to have a local Master

Station and this should be used to verify that the relay’s rear fiber optic or EIA(RS)485 port, as appropriate, is working.

Ensure that the relay address and baud rate settings in the application software are set the same as those in cells [0E02: COMMUNICATIONS, Remote Address] and [0E04:

COMMUNICATIONS, Baud Rate] of the relay.

Check, using the Master Station, that communications with the relay can be established.

Page (CM) 11-29

(CM) 11 Commissioning

5.2.8.3

Product Checks

DNP3.0 Communications Interface

Connect a portable PC running the appropriate DNP3.0 Master Station Software to the relay’s first rear EIA(RS)485 port using an EIA(RS)485 to EIA(RS)232 interface converter.

The terminal numbers for the relay’s EIA(RS)485 port are shown in the EIA(RS)485 terminals table.

Ensure that the relay address, baud rate and parity settings in the application software are set the same as those in cells [0E02: COMMUNICATIONS, Remote address], [0E04:

COMMUNICATIONS, Baud Rate] and [0E05: COMMUNICATIONS, Parity] of the relay.

Check that communications with this relay can be established.

If the relay has the optional fiber optic communications port fitted, the port to be used should be selected by setting cell [0E07: COMMUNICATIONS, Physical Link] to Fiber

Optic . Ensure that the relay address and baud rate settings in the application software are set the same as those in cell [0E04: COMMUNICATIONS, Baud Rate] of the relay.

Check that, using the Master Station, communications with the relay can be established.

Page (CM) 11-30 P54x/EN CM/Nd5

Product Checks

5.2.9

5.2.9.1

5.2.9.2

(CM) 11 Commissioning

Second Rear Communications Port

This test should only be performed where the relay is to be accessed from a remote location and varies depending on the communications standard being adopted.

It is not the intention of the test to verify the operation of the complete system from the relay to the remote location, just the relay’s rear communications port and any protocol converter necessary.

A variety of communications protocols may be available. For further details, please see whichever of these sections are relevant for the device you are commissioning:

K-Bus Configuration

If a K-Bus to EIA(RS)232 KITZ protocol converter is installed, connect a portable PC running the appropriate software (MiCOM S1 Studio or PAS&T) to the incoming (remote from relay) side of the protocol converter.

If a KITZ protocol converter is not installed, it may not be possible to connect the PC to the relay installed. In this case a KITZ protocol converter and portable PC running appropriate software should be temporarily connected to the relay’s second rear communications port configured for K-Bus. The terminal numbers for the relay’s K-Bus port are shown in the following table. However, as the installed protocol converter is not being used in the test, only the correct operation of the relay’s K-Bus port is confirmed.

Pin* Connection

4

7

EIA(RS)485 - 1 (+ ve)

EIA(RS)485 - 2 (- ve)

* All other pins unconnected.

Table 7 - 2 nd

rear communications port K-Bus terminals

Ensure that the communications baud rate and parity settings in the application software are set the same as those on the protocol converter (usually a KITZ but could be a

SCADA RTU). The relay’s Courier address in cell [0E90: COMMUNICATIONS, RP2

Address] must be set to a value between 1 and 254. The second rear communication’s port configuration [0E88: COMMUNICATIONS RP2 Port Config.] must be set to K-Bus.

Check that communications can be established with this relay using the portable PC.

EIA(RS)485 Configuration

If an EIA(RS)485 to EIA(RS)232 converter (Schneider Electric CK222) is installed, connect a portable PC running the appropriate software (MiCOM S1 Studio) to the

EIA(RS)232 side of the converter and the second rear communications port of the relay to the EIA(RS)485 side of the converter.

The terminal numbers for the relay’s EIA(RS)485 port are shown in the Second rear communications port EIA(RS)232 terminals table.

Ensure that the communications baud rate and parity settings in the application software are the same as those in the relay. The relay’s Courier address in cell [0E90:

COMMUNICATIONS, RP2 Address] must be set to a value between 1 and 254. The second rear communications port’s configuration [0E88: COMMUNICATIONS RP2 Port

Config.] must be set to EIA(RS)485.

Check that communications can be established with this relay using the portable PC.

P54x/EN CM/Nd5 Page (CM) 11-31

(CM) 11 Commissioning

5.2.9.3

5.2.10

Product Checks

EIA(RS)232 Configuration

Connect a portable PC running the appropriate software (MiCOM S1 Studio) to the rear

EIA(RS)232 port of the relay. This port is actually compliant with EIA(RS)574; the 9-pin version of EIA(RS)232, see www.tiaonline.org

.

The second rear communications port connects using the 9-way female D-type connector

(SK4). The connection is compliant with EIA(RS)574.

Pin Connection

1

2

3

4

5

No Connection

RxD

TxD

DTR

#

Ground

6

7

8

No Connection

RTS

#

CTS

#

9 No Connection

#

These pins are control lines for use with a modem.

Table 8 - Second rear communications port EIA(RS)232 terminals

Connections to the second rear port configured for EIA(RS)232 operation can be made using a screened multi-core communication cable up to 15 m long, or a total capacitance of 2500 pF. Terminate the cable at the relay end with a 9-way, metal-shelled, D-type male plug. The terminal numbers for the relay’s EIA(RS)232 port are shown in the previous table.

Ensure that the communications baud rate and parity settings in the application software are set the same as those in the relay. The relay’s Courier address in cell [0E90:

COMMUNICATIONS, RP2 Address] must be set to a value between 1 and 254. The second rear communication’s port configuration [0E88: COMMUNICATIONS RP2 Port

Config] must be set to EIA(RS)232.

Check that communications can be established with this relay using the portable PC.

Current Inputs

This test verifies that the accuracy of current measurement is within acceptable tolerances.

All relays leave the factory set for operation at a system frequency of 50 Hz. If operation at 60 Hz is required, this must be set in cell [0009: SYSTEM DATA, Frequency].

Caution To avoid spurious operation of protection elements during injection testing, ensure that current operated elements are disabled.

Page (CM) 11-32 P54x/EN CM/Nd5

Product Checks (CM) 11 Commissioning

Apply current equal to the line current transformer secondary winding rating to each current transformer input of the corresponding rating in turn, checking its magnitude using a multimeter. Refer to the Current input terminals table for the corresponding reading in the relay’s MEASUREMENTS 1 columns, as appropriate, and record the value displayed.

The measured current values displayed on the relay LCD, or on a portable PC connected to the front communication port, are either in primary or secondary Amperes. If cell [0D02:

MEASURE’T SETUP, Local Values] is set to Primary , the values displayed should be equal to the applied current multiplied by the corresponding current transformer ratio set in the CT and VT RATIOS menu column (see the CT ratio settings table). If cell [0D02:

MEASURE’T SETUP, Local Values] is set to Secondary , the value displayed should be equal to the applied current.

Note If a PC connected to the relay’s rear communications port is used to display the measured current, the process is similar. However, the setting of cell

[0D03: MEASURE’T SETUP, Remote Values] determines whether the displayed values are in primary or secondary Amperes.

The measurement accuracy of the relay is ±1% (5% for P741/P742/P743/P746).

However, an additional allowance must be made for the accuracy of the test equipment being used.

Current

Input

P543 P544 P545 P546 P547

I

A

I

B

I

C

I

M

I

SEF

I

A2

C3 - C2 - C1

C6 - C5 - C4

Shorting Contact Between Terminals 1A - Common - 5A

C3 - C2 - C1

C6 - C5 - C4

C9 - C8 - C7 C9 - C8 - C7

D3 - D2 - D1

D6 - D5 - D4

D9 - D8 - D7

D3 - D2 - D1

D6 - D5 - D4

D9 - D8 - D7

D3 - D2 - D1

D6 - D5 - D4

D9 - D8 - D7

C15 - C14 - C13 C15 - C14 - C13 D15 - D14 - D13 D15 - D14 - D13 D15 - D14 - D13

I

B2

I

C2

I

A

(CT2)

I

B

(CT2)

E3 - E2 - E1

E6 - E5 - E4

F3 - F2 - F1

F6 - F5 - F4

I

I

C

(CT2)

M

E9 - E8 - E7 F9 - F8 - F7

C12 - C11 - C10 C12 - C11 - C10 D12 - D11 - D10 D12 - D11 - D10 D12 - D11 - D10

Menu cell

P54x

Corresponding CT ratio

(in VT and CT RATIO column (0A) of menu)

[0201: IA Magnitude]

[0203: IB Magnitude]

[0205: IC Magnitude]

Table 9 - CT ratio settings

[0A07 : Phase CT Primary ]

[0A08 : Phase CT Secondary ]

P54x/EN CM/Nd5 Page (CM) 11-33

(CM) 11 Commissioning

5.2.11

Product Checks

Voltage Inputs

This test verifies the accuracy of voltage measurement is within the acceptable tolerances.

Apply rated voltage to each voltage transformer input in turn, checking its magnitude using a multimeter. Refer to the Voltage Input Terminals table for the corresponding reading in the relay’s MEASUREMENTS 1 column and record the value displayed.

Cell in

Measurements 1

Column (02)

[021A: VAN Magnitude]

[021C: VBN Magnitude]

[021E: VCN Magnitude]

[022E: (CB1) Voltage Mag]

[024C: CB2 CS Volt Mag]

* Voltage reference for synchrocheck

P543 & P544

C19-C22

C20-C22

C21-C22

C23 - C24

N/A

Voltage applied to

P545 & P546

D19 - D22

D20 - D22

D21 - D22

D23 - D24

F23 - F24

Table 10 - Voltage input terminals

The measured voltage values displayed on the relay LCD or a portable PC connected to the front communication port are either in primary or secondary volts. If cell [0D02:

MEASURE’T SETUP, Local Values] is set to Primary , the values displayed should be equal to the applied voltage multiplied by the corresponding voltage transformer ratio set in the VT and CT RATIOS menu column (see the following VT ratio settings table). If cell

[0D02: MEASURE’T SETUP, Local Values] is set to Secondary , the value displayed should be equal to the applied voltage.

Note

The measurement accuracy of the relay is ±1%. However, an additional allowance must be made for the accuracy of the test equipment being used.

Cell in MEASUREMENTS 1 column

(02)

Corresponding CT ratio (in ‘CT and VT RATIOS‘ column (0A) of menu)

P54x

[021A: VAN Magnitude]

[021C: VBN Magnitude]

[021E: VCN Magnitude]

[022E: Voltage Mag]

If a PC connected to the relay’s rear communications port is used to display the measured voltage, the process is similar. However, the setting of cell

[0D03: MEASURE’T SETUP, Remote Values] determines whether the displayed values are in primary or secondary volts.

[024C: CB2 CS Volt Mag]

(P544 & P546 only)

[0A01 : Main CT Primary]

[0A02 : Main CT Secondary]

[0A03 : C/S VT Primary]

[0A04 : C/S VT Secondary]

[0A05 : CB2 CS VT Prim’y]

[0A06 : CB2 CS VT Sec’y]

Table 11 - Voltage ratio settings

Page (CM) 11-34 P54x/EN CM/Nd5

Protection Communications Loopback

6

6.1

(CM) 11 Commissioning

PROTECTION COMMUNICATIONS LOOPBACK

If the MiCOM relay is being used in a scheme with phase differential or InterMiCOM

64 communications it will be necessary to configure a loopback on the communications. If this is not the case, skip to the Setting Checks section.

Unless direct fiber optic communications are being used, the loopback should be made as close as possible to where the communication link leaves the substation such that as much of the wiring as possible and all associated communication signal converters are included in the test.

Protection Communications

This test verifies that the relay’s fiber optic protection signaling ports together with any associated P590 interface units are operating correctly.

A number of different fiber-optic interfaces are available. These are described in detail in the Operations (OP) and Applications (AP) sections of this manual. In general, 1300 nm fiber optics (either single-mode or multi-mode) and 1550 nm fiber optics are used for direct fiber optic connections. 850 nm multi-mode fiber optic connections are employed in conjunction with multiplexing telecommunications equipment. It is important that any optical fibers used for testing are correct for the interface(s) specified. Optical fibers should be terminated with BFOC2.5 (ST2.5) connectors. For multi-mode applications the use of 50/125 µm cored fiber is recommended. Any fiber-optic test leads used for measurements should be sufficiently long to assure mode stripping, and a minimum length of 10 m (30ft) is recommended to achieve this.

A P590 unit will be situated near the multiplexer in applications where communications between P54x relays is via multiplexed electrical communication channels and the PCM multiplexer is installed remote from the relay room. This unit provides bi-directional optical to electrical signal conversion between the cross-site optical fiber from the relay and the electrical interface of the multiplexer.

Using the relay menu structure, ensure either

The current differential protection is enabled by setting the [090F Phase Diff] cell in the configuration column, or if the current differential protection is not being used,

The InterMiCOM

64

communications is enabled by setting the [0941 InterMiCOM64] cell in the configuration column,

The method of testing is similar whether communications between relays is via dedicated optical fibers, using a P590 unit to interface the relay’s fiber optic communications channel to a multiplexer, or direct fiber connection to a multiplexer supporting the IEEE

C37.94 standard. However, where P590 interface units are being used, there are a number of extra tests on the P590 units that need to be performed refer to the following sections:

6.1.4 - Communications using P591 Interface Units (G.703)

6.1.5 - Communications using P592 Interface Units (V.35)

6.1.6 - Communications using P593 Interface Units (X.21)

If the relay is to be connected to a multiplexer supporting the IEEE C37.94 standard, the loopback testing is performed exactly the same as for a direct fiber connection described in the Loopback Communications Configuration section.

Note It is possible that two channels may have different implementations and the sections describing the commissioning of the interfaces and the loopback tests should be used as relevant to each channel.

P54x/EN CM/Nd5 Page (CM) 11-35

(CM) 11 Commissioning

6.1.1

Protection Communications Loopback

Caution When connecting or disconnecting optical fibers care should be taken not to look directly into the transmit port or end of the optical fiber.

Communications Loopback Setting

The loopback test can be used to establish correct operation of the local communication interface.

6.1.1.1

6.1.1.2

6.1.2

Page (CM) 11-36

Set cell [0F13 Test Loopback] to ‘External’.

Channel 1 Transmit Power Level

Using an appropriate fiber optic cable, connect the Channel 1 transmitter (TX1) to an optical power meter. Check the average power transmitted is in the range in the following table.

Relays manufactured pre April 2008

850 nm multi-mode

1300 nm multi-mode

1300 nm single-mode

Maximum transmitter power (average value)

Minimum transmitter power (average value)

Relays manufactured post April 2008

Maximum transmitter power (average value)

Minimum transmitter power (average value)

Table 12 - Record the transmit power level

-19.8 dBm

-22.8 dBm

850 nm multi-mode

-19.8 dBm

-22.8 dBm

-7 dBm

-13 dBm

1300 nm multi-mode

-7 dBm

-13 dBm

1300 nm single-mode

-3 dBm

-9 dBm

-3 dBm

-9 dBm

Channel 2 Transmit Power Level

Repeat section 6.1.1.1 for channel 2 (if fitted).

Loopback Communications Configuration

A communications loopback will need to be made on the protection signaling communications. Either one or two channels will be fitted according to specification. A combination of direct fiber connection or multiplexed (using P59x units) connection can be used on each of the channels. The following sections describe how the various loopback are made:

6.1.3 - Fiber Connection

6.1.4 - Communications using P591 Interface Units (G.703)

6.1.5 - Communications using P592 Interface Units (V.35)

6.1.6 - Communications using P593 Interface Units (X.21)

P54x/EN CM/Nd5

Protection Communications Loopback

6.1.3

6.1.4

6.1.4.1

6.1.4.2

6.1.4.3

(CM) 11 Commissioning

They should be followed as appropriate to configure the loopback on channel 1 and the loopback on channel 2 (if fitted), before proceeding to the loopback test described in the

Loopback Test section.

If the communications is being realized using P590 interface units, then start by connecting the appropriate optical fiber(s) between the channel transmitter(s) on the

P54x that will be used to make connection to the P590 optical receiver(s) and then proceed to the relevant sections below that describe the commissioning of the P590 interface units.

Fiber Connection

Where direct fiber connections are being used (or where multiplexer channels conforming to the IEEE C37.94 standard are being used), using an appropriate optical fiber cable, connect the channel transmitter to the channel receiver port on the rear of the relay.

Communications using P591 Interface Units (G.703)

P591 Visual Inspection

Carefully examine the unit to see that no physical damage has occurred since installation.

The rating information given under the top access cover on the front of the unit should be checked to ensure it is correct for the particular installation.

Ensure that the case earthing connection, top left-hand corner at the rear of the case, is used to connect the unit to a local earth bar using an adequate conductor.

P591 Insulation

Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they haven’t been performed during installation.

Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a dc voltage not exceeding 500 V. The auxiliary dc supply terminals should be temporarily connected together.

The insulation resistance should be greater than 100 M

at 500 V.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the P591.

P591 External Wiring

Check that the external wiring is correct to the relevant connection diagram or scheme diagram. The connection diagram number appears on the rating label under the top access cover on the front of the P591. The corresponding connection diagram will have been supplied with the Schneider Electric order acknowledgement for the P591.

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(CM) 11 Commissioning

6.1.4.4

Protection Communications Loopback

P591 Auxiliary Supply

P591 units operate from a dc only auxiliary supply within the operative range of 19 V to

65 V for a 24 - 48 V version and 87.5 V to 300 V for a 110 - 250 V version.

Without energizing the P591 units measure the auxiliary supply to ensure it is within the operating range.

It should be noted that the P591 interface unit is designed to withstand an ac ripple component of up to 12% of the normal dc auxiliary supply. However, in all cases the peak value of the dc supply must not exceed the maximum specified operating limit.

6.1.4.5

6.1.4.6

6.1.4.7

6.1.4.8

6.1.4.9

Page (CM) 11-38

P591 Light Emitting Diode (LED)

On power up the green ‘SUPPLY HEALTHY’ LED should have illuminated and stayed on, therefore indicating that the P591 is healthy.

P591 Optical Received Signal Level

With an optical cable connected to the P54x optical transmitter as instructed in the

Loopback Communications Configuration section, disconnect the other end of the cable from the P591 receiver (RX) and use an optical power meter to measure the received signal strength. The value should be in the range -16.8 dBm to -25.4 dBm. Record the measured value and replace the connector to the P591 receiver.

P591 Loopback

It is necessary to loop the transmitted electrical G.703 signal presented on terminals 3 and 4 of the P591 to the received signal presented on terminals 7 and 8. If test links have been designed into the scheme to facilitate this they should be used. Alternatively, remove any external wiring from terminals 3, 4, 7 and 8 at the rear of each P591 unit.

Loopback the G.703 signals on each unit by connecting a wire link between terminals 3 and 7, and a second wire between terminals 4 and 8.

P591 Optical Transmitter Signal Level

Using an appropriate fiber optic cable, connect the optical transmitter (TX) to an optical power meter. Check that the average power transmitted is within the range -16.8 dBm to

-22.8 dBm.

Record the transmit power level.

Connect the appropriate optical fiber to connect the P591 transmitter to the P54x optical receiver and return to the P54x relay.

P54x Optical Received Signal Level from P591

Return to the P54x relay. Disconnect the fiber from the P54x optical receiver that connects to the optical transmitter of the P591 and measure the received signal level.

The value should be in the range -16.8 dBm to -25.4 dBm. Record the measurement and then reconnect the fiber to the optical receiver.

P54x/EN CM/Nd5

Protection Communications Loopback

6.1.5

6.1.5.1

6.1.5.2

(CM) 11 Commissioning

Communications using P592 Interface Units (V.35)

Before loopback testing can begin, some other checks must be completed.

P592 Visual Inspection

Carefully examine the unit to see that no physical damage has occurred since installation.

The rating information given under the top access cover on the front of the unit should be checked to ensure it is correct for the particular installation.

Ensure that the case earthing connection, top left-hand corner at the rear of the case, is used to connect the unit to a local earth bar using an adequate conductor.

P592 Insulation

Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they haven’t been performed during installation.

Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a dc voltage not exceeding 500 V. The auxiliary dc supply terminals should be temporarily connected together.

6.1.5.3

6.1.5.4

P54x/EN CM/Nd5

The insulation resistance should be greater than 100 M

at 500 V.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the P592.

P592 External Wiring

Check that the external wiring is correct to the relevant connection diagram or scheme diagram. The connection diagram number appears on the rating label under the top access cover on the front of the P592. The corresponding connection diagram will have been supplied with the Schneider Electric order acknowledgement for the P592.

P592 Auxiliary Supply

P592 units operate from a dc only auxiliary supply within the operative range of 19 V to

300 V.

Without energizing the P592 units measure the auxiliary supply to ensure it is within the operating range.

It should be noted that the P592 interface unit is designed to withstand an ac ripple component of up to 12% of the normal dc auxiliary supply. However, in all cases the peak value of the dc supply must not exceed the maximum specified operating limit.

Page (CM) 11-39

(CM) 11 Commissioning Protection Communications Loopback

6.1.5.5

6.1.5.6

6.1.5.7

6.1.5.8

6.1.5.9

P592 Light Emitting Diodes (LEDs)

On power up the green ‘SUPPLY HEALTHY’ LED should have illuminated and stayed on indicating that the P592 is healthy.

The four red LED’s can be tested by appropriate setting of the DIL switches on the unit’s front plate. Set the data rate switch according to the communication channel bandwidth available. Set all other switches to 0. To illuminate the ‘DSR OFF’ and ‘CTS OFF’ LED’s, disconnect the V.35 connector from the rear of the P592 and set the ‘DSR’ and ‘CTS’ switches to ‘0’. The ‘OPTO LOOPBACK’ and ‘V.35 LOOPBACK’ LED’s can be illuminated by setting their corresponding switches to ‘1’.

Once operation of the LED’s has been established set all DIL switches, except for the

‘OPTO LOOPBACK’ switch, to ‘0’ and reconnect the V.35 connector.

P592 Optical Received Signal Level

With an optical cable connected to the P54x optical transmitter as instructed in the

Loopback COmmunications Configuration section, disconnect the other end of the cable from the P592 receiver (RX) and use an optical power meter to measure the received signal strength. The value should be in the range -16.8 dBm to -25.4 dBm. Record the measured value and replace the connector to the P592 receiver.

P592 Loopback

With the ‘OPTO LOOPBACK’ switch in the ‘1’ position the receive and transmit optical ports are electrically connected together. This allows the optical fiber communications between the P443 relay and the P592 to be tested, but not the internal circuitry of the

P592 itself.

P592 Optical Transmitter Signal Level

Using an appropriate fiber optic cable, connect the optical transmitter (TX) to an optical power meter. Check that the average power transmitted is within the range -16.8 dBm to -

22.8 dBm.

Record the transmit power level.

Connect the appropriate optical fiber to connect the P592 transmitter to the P54x optical receiver and return to the P54x relay.

P54x Optical Received Signal Level from P592

Return to the P54x relay. Disconnect the fiber from the P54x optical receiver that connects to the optical transmitter of the P592 and measure the received signal level.

The value should be in the range -16.8 dBm to -25.4 dBm. Record the measurement and then reconnect the fiber to the optical receiver.

Page (CM) 11-40 P54x/EN CM/Nd5

Protection Communications Loopback

6.1.6

6.1.6.1

(CM) 11 Commissioning

Communications using P593 Interface Units (X.21)

Before loopback testing can begin, some other checks must be completed.

P593 Visual Inspection

6.1.6.2

If applicable replace the secondary front cover from the unit

.

Carefully examine the unit to see that no physical damage has occurred since installation.

The rating information given under the top access cover on the front of the unit should be checked to ensure it is correct for the particular installation.

Ensure that the case earthing connection, top left-hand corner at the rear of the case, is used to connect the unit to a local earth bar using an adequate conductor.

P593 Insulation

Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they have not been performed during installation.

Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a dc voltage not exceeding 500 V. The auxiliary dc supply terminals should be temporarily connected together.

6.1.6.3

The insulation resistance should be greater than 100 M

at 500 V.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the P593.

P593 External Wiring

Check that the external wiring is correct to the relevant connection diagram or scheme diagram. The connection diagram number appears on the rating label under the top access cover on the front of the P593. The corresponding connection diagram will have been supplied with the Schneider Electric order acknowledgement for the P593.

P54x/EN CM/Nd5 Page (CM) 11-41

(CM) 11 Commissioning

6.1.6.4

Protection Communications Loopback

P593 Auxiliary Supply

P593 units operate from a dc only auxiliary supply within the operative range of 19.5 V to

300 V.

Without energizing the P593 units measure the auxiliary supply to ensure it is within the operating range.

It should be noted that the P593 interface unit is designed to withstand an ac ripple component of up to 12% of the normal dc auxiliary supply. However, in all cases the peak value of the dc supply must not exceed the maximum specified operating limit.

6.1.6.5

6.1.6.6

6.1.6.7

P593 Light Emitting Diodes (LEDs)

On power up the green ‘SUPPLY’ LED should have illuminated and stayed on indicating that the P593 is healthy.

Set the ‘X.21 LOOPBACK’ switch to ‘ON’. The green ‘CLOCK’ and red ‘X.21 LOOPBACK’

LED’s should illuminate. Reset the ‘X.21 LOOPBACK’ switch to the ‘OFF’ position.

Set the ‘OPTO LOOPBACK’ switch to ‘ON’. The red ‘OPTO LOOPBACK’ LED should illuminate. Do not reset the “OPTO LOOPBACK’ switch as it is required in this position for the next test.

P593 Optical Received Signal Level

With an optical cable connected to the P54x optical transmitter as instructed in the Loop, disconnect the other end of the cable from the P593 receiver (RX) and use an optical power meter to measure the received signal strength. The value should be in the range -

16.8 dBm to -25.4 dBm. Record the measured value and replace the connector to the

P593 receiver.

P593 Loopback Test

With the ‘OPTO LOOPBACK’ switch in the ‘ON’ position the receive and transmit optical ports are electrically connected together. This allows the optical fiber communications between the P443 relay and the P593 to be tested, but not the internal circuitry of the

P593 itself.

Set the ‘OPTO LOOPBACK’ switch to ‘OFF’ and ‘X.21 LOOPBACK’ switch to ‘ON’ respectively. With the ‘X.21 LOOPBACK’ switch in this position the ‘Receive Data’ and

‘Transmit Data’ lines of the X.21 communication interface are connected together. This allows the optical fiber communications between the P443 relay and the P593, and the internal circuitry of the P593 itself to be tested.

Page (CM) 11-42 P54x/EN CM/Nd5

Protection Communications Loopback

6.1.6.8

6.1.6.9

6.1.7

(CM) 11 Commissioning

P593 Optical Transmitter Signal Level

Using an appropriate fiber optic cable, connect the P593 optical transmitter (TX) to an optical power meter. Check that the average power transmitted is within the range -16.8 dBm to -22.8 dBm.

Record the transmit power level.

Connect the appropriate optical fiber to connect the P592 transmitter to the P54x optical receiver and return to the P54x relay.

P54x Optical Received Signal Level From P593

Return to the P54x relay. Disconnect the fiber from the P54x optical receiver that connects to the optical transmitter of the P593 and measure the received signal level.

The value should be in the range -16.8 dBm to -25.4 dBm. Record the measurement and then reconnect the fiber to the optical receiver.

Loopback Test

Set cell [0F14 IM64 Test Mode] to ‘Enabled’, and use cell [0F15 IM64 Test Pattern] to set a bit pattern to be sent via the InterMiCOM

64

loopback. To verify the correct operation of loopback test, check in the [MEASUREMENTS 4] column that the contents of cell ‘IM64

Rx Status’ matches with the test pattern set. The communication statistics will indicate the number of valid and any errored messages received, note that the propagation delay measurement will not be valid in this mode of operation. The relay will now respond as if it is connected to a remote relay. The relay will indicate a loopback alarm which can only be cleared by setting the ‘Test Loopback’ to disabled.

P54x/EN CM/Nd5 Page (CM) 11-43

(CM) 11 Commissioning

7

7.1.1

7.1.2

7.1.3

7.1.4

7.1.5

GPS Synchronization

GPS SYNCHRONIZATION

The P54x has a feature whereby the timing information used to align the local and remote current vectors used in the phase differential algorithm can be very accurately synchronized via the Global Positioning Satellite (GPS) system. If specified, a P594 GPS synchronizing unit is employed to decipher GPS signals and provide the P54x relay with a suitable synchronizing signal.

If the P54x is using GPS synchronization to enhance the phase current differential protection, then the associated P594 unit will need to be commissioned in accordance with the relevant commissioning instructions. The P594 commissioning instructions can be found in the Commissioning chapter of the P594 Technical Manual.

If P594 synchronizing units are not employed, go to the Setting Checks section.

Commission the P594

The commissioning instructions and record sheets for the P594 GPS synchronization are available in the P594 Technical Manual. The P594 should be commissioned as per the instructions for a P594 being used to synchronize a P54x relay.

P594 Optical Signal Strength at P54x Relay

With the interconnecting optical fiber connected to the optical transmitter of the P594 prescribed by the scheme, and with the P594 in ‘Test Cycle Mode’, at the P54x end, measure the received signal strength. The value should be in the range

-16.8 dBm to -25.4 dBm. Record the value.

Check Synchronization Signal at P54x Relay

Disable the ‘Test Cycle Mode’ at the P594. Connect the fiber from the P594 to the GPS synchronizing input of the P54x relay. Enable GPS synchronization in [201A: PROT

COMMS/IM64, GPS Sync Enabled] menu cell of the relay. Check that the relay is recognizing the GPS synchronization in [0507 MEASUREMENTS 4, Channel Status] of the relay

If the GPS synchronization signal is being received, with the communications configured for loopback, the ‘Local GPS’ and Remote GPS’ bits should both be set in the channel status such that the display reads **11******** (* is ‘don’t care’ state for the purpose of this test).

Check GPS Failure Condition

Disconnect the fiber from the P594 and check that the display reverts to **00********.

Restore GPS

Reconnect the fiber and check again that the display reads **11********.

Page (CM) 11-44 P54x/EN CM/Nd5

Setting Checks

8

(CM) 11 Commissioning

SETTING CHECKS

The setting checks ensure that all of the application-specific relay settings (both the relay’s function and Programmable Scheme Logic (PSL) settings) for the particular installation have been correctly applied to the relay.

If the application-specific settings are not available, ignore sections 8.1 and 8.2.

8.1 Apply Application-Specific Settings

There are different methods of applying the settings:

Transferring settings from a pre-prepared setting file to the relay using a portable

PC running the appropriate software (such as MiCOM S1 Studio). Use the front

EIA(RS)232 port (under the bottom access cover), or the first rear communications port (Courier protocol with a KITZ protocol converter connected), or the second rear communications port. This is the preferred method for transferring function settings as it is much faster and there is less margin for error. If PSL other than the default settings with which the relay is supplied is used, this is the only way of changing the settings.

If a setting file has been created for the particular application and provided on a memory device, the commissioning time is further reduced, especially if application-specific PSL is applied to the relay.

Enter the settings manually using the relay’s operator interface. This method is not suitable for changing the PSL.

Note If, as a result of applying the application settings, the communication mode

[2010 Comms Mode] has been changed, then a ‘comms changed’ alarm will be raised on the user interface. This alarm can only be cleared by power cycling the relay. If the alarm appears, remove and then re-apply the auxiliary supply to the relay.

P54x/EN CM/Nd5 Page (CM) 11-45

(CM) 11 Commissioning

8.1.1

8.1.2

8.2

8.3

8.3.1

8.3.1.1

Setting Checks

Protection Communications Loopback

If the phase differential protection is enabled, and/or InterMiCOM

64

is being used for the signalling channel, the communication loopbacks that were tested earlier need to be maintained whilst scheme testing is being performed. Cell [0F13 Test Loopback] of the

COMMISSIONING TEST column should be set to ‘External’, the contents of cell [0F15

IM64 TestPattern] should have all bits set to 0 initially, and cell [0F15 IM64 Test Mode] should be set to ‘Enabled’.

Reset Statistics

The protection communications / InterMiCOM communications statistics should be reset at this point. For MODEM InterMiCOM the [1531 Reset Statistics] in the InterMiCOM

COMMS column of the menu is used. For InterMiCOM

64

the [0530 Clear Statistics] cell in the MEASUREMENTS 4 column should be used.

Demonstrate Correct Relay Operation

The Current Inputs and Voltage Inputs tests have already demonstrated that the relay is

• within calibration, thus the purpose of these tests is as follows:

To determine that the primary protection function of the relay, current differential or distance can trip according to the correct application settings

To verify correct setting of any aided scheme DEF (ground overcurrent) protection

To verify correct assignment of the trip contacts, by monitoring the response to a selection of fault injections.

Demonstrate Correct Relay Operation - Current Differential Elements

Current Differential Bias Characteristic

If the phase differential elements are enabled, they should be tested.

If the phase differential elements are not being used, proceed to the Demonstrate Correct

Relay Operation - Non-Current Differential Elements section.

To avoid spurious operation of any distance, overcurrent, earth fault or breaker fail elements, these should be disabled for the duration of the differential element tests. This is done in the relay’s CONFIGURATION column. Ensure that cells [090B: Distance],

[090C: Directional E/F], [0910: Overcurrent], [0913: Earth Fault] and [0920: CB Fail] are all set to “Disabled”. Make a note of which elements need to be re-enabled after testing.

The relay should also be set to loopback mode isolating it from the remote end. Refer to the Communications Loopback Setting section.

Connect the Test Circuit

The following tests require a variable transformer and two resistors connected as shown in the

Connection for bias characteristic testing

diagram. Alternatively an injection test set can be used to supply Ia and Ib.

Page (CM) 11-46 P54x/EN CM/Nd5

Setting Checks

8.3.1.2

(CM) 11 Commissioning

P540 relay

Ra

A

I a

L

Ph a

Rb

A

I b

Ph b

N

P1043ENa

Figure 5 - Connection for bias characteristic testing

A current is injected into the A phase which is used as the bias current and another current is injected into the B phase which is used as differential current. Ia is always greater than Ib.

Lower Slope

If three LEDs have been assigned to give phase segregated trip information, Trip A, Trip

B and Trip C, these may be used to indicate correct per-phase operation. If not, monitor options will need to be used - see the next paragraph.

Go to the COMMISSION TESTS column in the menu, scroll down and change cells

[0F05: Monitor Bit 1] to 523, [0F06: Monitor Bit 2] to 524 and [0F07: Monitor Bit 3] to 525.

Doing so, cell [0F04: Test Port Status] will appropriately set or reset the bits that now represent Trip Output A (DDB #523), Trip Output B (DDB #524) and Trip Output C (DDB

#525) with the rightmost bit representing Phase A Trip. From now on you should monitor the indication of [0F03: Test Port Status]. Also make sure that the relay is in loopback mode by setting cell [0F13 Test Loopback] to ‘External’ and applying either a loop-back fiber on the relay or loopback is selected on the P590 as described in the

Communications Loopback Setting section. Alternatively setting cell [0F13 Test

Loopback] to ‘Internal’.

Adjust the variac and the resistor to give a bias current of 1pu in the A-phase.

(NOTE: 1pu = 1A into terminals C3-C2 for 1 A applications; or 1 pu = 5 A into terminals

C1-C2 for 5 A applications). The relay will trip and any contacts associated with the Aphase will operate, and bit 1 (rightmost) of [0F03: Test Port Status] will be set to 1. Some

LEDs, including the yellow alarm LED, will go off, but ignore them for the moment.

When the current in A Phase is established, close the switch and slowly increase the current in the B phase from zero until Phase B trips (bit 2 of [0F03: Test Port Status] is set to 1). Record the phase B current magnitude and check that it corresponds to the information overleaf.

Switch OFF the ac supply, read and clear all alarms.

Bias current

Differential current

Phase

Magnitude of differential current

Phase

A

Magnitude

1pu B 2 Terminal & Dual Redundant 0.25 pu +/-10%

3 Terminal

Assumption:

Ι s1

= 0.2 pu, k

1

= 30%,

Ι s2

= 2.0 pu

0.216 pu +/-10%

Table 13 - Bias and differential currents (lower slope)

For other differential settings or current injected into A phase ( I a

), the formula below can be used (enter slope in pu form, i.e. percentage/100):

P54x/EN CM/Nd5 Page (CM) 11-47

(CM) 11 Commissioning

8.3.1.3

Setting Checks

2 Terminal & Dual Redundant:

B phase operate current is 0.5 x [

Ι s1

+ [ I a

x k

1

)] pu +/- 10% -

3 Terminal:

B phase operate current is 0.333 x [

Ι s1

+ (1.5 x I a

x k

1

)] pu +/- 10% -

Ensure that I a

< I

S2

Upper Slope

Repeat the test in the previous Lower Slope section with the bias current set in the Aphase to be 3pu.

When the current in A Phase is established, close the switch and slowly increase the current in the B phase from zero until phase B trips (bit 2 of [0F03: Test Port Status] is set to 1). Record the phase B current magnitude and check that it corresponds to the information below.

Switch OFF the ac supply and reset the alarms.

Bias current

Differential current

Magnitude of differential current

A

Phase Magnitude

3pu B

Phase

2 Terminal & Dual

Redundant k

2

150% 1.15pu +/-10%

3 Terminal

100% 0.9pu +/-10%

150% 1.51pu +/-10%

Assumption:

Ι s1

= 0.2pu, k

1

= 30%,

Ι s2

= 2.0pu, k

2

as above

100% 1.1pu +/-10%

Table 14 - Bias and differential currents (upper slope)

For other differential settings or current injected into A phase ( I a

), the formula below can be used (enter slopes in pu form, i.e. percentage/100):

2 Terminal & Dual Redundant:

Operate current is 0.5 x [( I a

x k

2

) - {(k

2

- k

1

) x

Ι s2

} +

Ι s1

] pu +/- 20%

3 Terminal:

Operate current is 0.333 x [(1.5 x I a

x k

2

) - {(k

2

- k

1

) x

Ι s2

} +

Ι s1

] pu +/- 20%

Ensure that I a

> I

S2

Note For 5 A applications the duration of current injections should be short to avoid overheating of the variac or injection test set.

Page (CM) 11-48 P54x/EN CM/Nd5

Setting Checks

8.3.2

8.3.2.1

8.3.2.2

8.3.2.3

8.4

8.4.1

(CM) 11 Commissioning

Current Differential Operation and Contact Assignment

Phase A

Retaining the same test circuit as before, prepare for an instantaneous injection of 3 pu current in the A phase, with no current in the B phase (B phase switch open). Connect a timer to start when the fault injection is applied, and to stop when the trip occurs. To verify correct output contact mapping use the trip contacts that would be expected to trip the circuit breaker(s), as shown in the table. For two breaker applications, stop the timer once both CB1 and CB2 trip contacts have closed. This can be achieved by connecting the contacts in series to stop the timer.

Single breaker Two circuit breakers

Three Pole Tripping

Single Pole Tripping

Any Trip

Trip A

Any Trip (CB1) and Any Trip (CB2)

Trip A (CB1) and Trip A (CB2)

Table 15 - Tripping and single/double circuit breakers

Phase B

Reconfigure the test equipment to inject fault current into the B phase. Repeat the test in the above Phase A section, this time ensuring that the breaker trip contacts relative to B phase operation close correctly. Record the phase B trip time. Switch OFF the ac supply and reset the alarms.

Phase C

Repeat the steps described in Phase B for the C phase.

The average of the recorded operating times for the three phases should be less than 40 ms for 50 Hz, and less than 35 ms for 60 Hz when set for instantaneous operation.

Switch OFF the ac supply and reset the alarms.

Note For applications using magnetizing inrush current restraint, use a test current higher than the [3313: Inrush High] setting to obtain fast operating times. At least twice setting is recommended.

Where an IDMT or definite time delay is set in the GROUP 1 PHASE DIFF menu column, the expected operating time is typically within +/- 5% of that for the curve equation plus the “instantaneous” delay quoted above.

On completion of the tests any distance, overcurrent, earth fault or breaker fail elements which were disabled for testing purposes must have their original settings restored in the

CONFIGURATION column.

Demonstrate Correct Relay Operation - Non-Current Differential

Elements

Protection Dependencies

The principle non-differential protection elements (distance, overcurrent, and earth fault) can be set to have dependencies the availability of the phase differential and the status of the Voltage Transformer Supervision (VTS) Function.

The distance protection can be permanently enabled, or it can be set so that it is only enabled in the event of a failure of the protection communications channel(s).

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(CM) 11 Commissioning

8.4.2

8.4.2.1

Setting Checks

The overcurrent and earth faults elements can be permanently enabled, or can be set so that they are only enabled in the event of a failure of the protection communications channel(s), or can be set that they are only enabled in the event of a VTS alarm, or can be set so that they are enabled according to a logical combination of both conditions.

If these elements are enabled with a dependency upon the above conditions, then it will be necessary to simulate the condition in order to test the correct operation of the protection function.

Communications failure can be achieved by setting cell [0F13: Test Loopback] to

“Disabled” and observing that the relay raises a Comms Fail alarm.

Note If forcing a communication failure is necessary, it will be necessary to clear communications alarms and reset the statistics at the end of the tests.

VTS alarm can be raised by applying a 3-phase voltage to the VT inputs and then removing one phase voltage for a duration exceeding the VTS Time Delay setting. At the end of the tests, it will be necessary to ensure that the VTS alarm is cleared.

Distance Protection Single-End Testing

Refer to the previous Protection Dependencies section, check for any possible dependency conditions and simulate as appropriate.

If the distance protection function is being used, the reaches and time delays should be tested. If not, skip to the Scheme Timer Settings section.

To avoid spurious operation of overcurrent, DEF/earth fault or breaker fail elements, these should be disabled for the duration of the distance element tests. This is done in the relay’s CONFIGURATION column. Ensure that cells [090C: Directional E/F DEF],

[0910: Overcurrent], [0913: Earth Fault] and [0920: CB Fail] are all set to Disabled . If the distance element is enabled without qualification of communication channel failure, then the current differential element [090F: Phase Diff], should be disabled. If the distance protection is enabled on communication channel failure, then the differential element should remain enabled and the communication should be disrupted to cause a suitable failure of the phase differential protection.

Connection and Preliminaries

The relay should now be connected to equipment able to supply phase-phase and phaseneutral volts with current in the correct phase relation for a particular type of fault on the selected relay characteristic angle. The facility for altering the loop impedance (phase-toground fault or phase-phase) presented to the relay is essential.

It is recommended that a three phase digital/electronic injection test set is used for ease of commissioning. If this is not available, two setting changes may need to be made on the relay, for the duration of testing:

Page (CM) 11-50 P54x/EN CM/Nd5

Setting Checks

8.4.2.2

8.4.2.3

8.4.2.4

(CM) 11 Commissioning

Connect the test equipment to the relay via the test block(s) taking care not to opencircuit any CT secondary. If Easergy test blocks are used, the live side of the test plug must be provided with shorting links before it is inserted into the test block.

Zone 1 Reach Check

The zone 1 element is set to be directional forward.

Apply a dynamic A phase to neutral fault, slightly in excess of the expected reach. The duration of the injection should be in excess of the tZ1 timer setting, but less than tZ2

(settings found in the DISTANCE menu column). Observe that no trip should occur, and the red Trip LED remains extinguished.

Reduce the impedance and reapply this to the relay. This procedure should be repeated until a trip occurs. The display will show Alarms/Faults present and the Alarm and Trip

LEDs will illuminate. To view the alarm message press the read key  , repeat presses of this key should be used to verify that phase A was the “Start Element”. Keep pressing the  key until the yellow alarm LED changes from flashing to being steadily on. To reset the alarms press the C key. This will clear the fault record from the display.

Record the impedance at which the relay tripped. The measured impedance should be within +/- 10% of the expected reach.

Modern injection test sets usually calculate the expected fault loop impedance from the relay settings, for those that do not:

Connections for an A-N fault. The appropriate loop impedance is given by the vector sum:

Z1 + Z1 residual = Z1 + (Z1 x kZN Res Comp

∠ kZN Angle)

.

Zone 2 Reach Check

The zone 2 element is set to be directional forward.

Apply a dynamic B-C fault, slightly in excess of the expected reach. The duration of the injection should be in excess of the tZ2 timer setting, but less than tZ3. Repeat as in the

Zone 1 Reach Check section to find the zone reach.

Record the impedance at which the relay tripped. The measured impedance should be within +/- 10% of the expected reach. Read and reset the alarms.

Modern injection test sets usually calculate the expected fault loop impedance from the relay settings, for those that do not:

Connections for a B-C fault. The reach for phase-phase should be checked and the operation of the appropriate contacts confirmed. The appropriate loop impedance is now given by:

2 x Z2

Zone 3 Reach Check

The zone 3 element is set to be directional forward.

Apply a dynamic C-A fault, slightly in excess of the expected reach. The duration of the injection should be in excess of the tZ3 timer setting (typically tZ3 + 100ms). Repeat as in the Zone 1 Reach Check section to find the zone reach.

Record the impedance at which the relay tripped. The measured impedance should be within +/- 10% of the expected reach. Read and reset the alarms.

Only a visual check that the correct reverse offset (Z3’) has been applied is needed. The setting is found in cell [3143: Z3’ Ph Rev Reach] and [31A3: Z3’ Gnd Rev Reach].

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(CM) 11 Commissioning

8.4.2.5

8.4.2.6

8.4.2.7

8.4.2.8

8.4.3

8.4.3.1

Setting Checks

Zone 4 Reach Check (if Enabled)

The zone 4 element is set to be directional reverse.

Apply a dynamic B-N fault, slightly in excess of the expected reach. The duration of the injection should be in excess of the tZ4 timer setting (typically tZ4 + 100 ms). Repeat as in the Zone 1 Reach Check section to find the zone reach.

Record the impedance at which the relay tripped. The measured impedance should be within +/- 10% of the expected reach. Read and reset the alarms.

Zone P Reach Check (if Enabled)

The zone P element can be set to be forward or reverse directional. The current injected must be in the appropriate direction to match the setting in the “ DISTANCE SETUP ” menu column (cells [3151] and [31B1]).

Apply a dynamic C-N fault, slightly in excess of the expected reach. The duration of the injection should be in excess of the tZP timer setting (typically tZP + 100ms). Repeat as in the Zone 1 Reach Check section to find the zone reach.

Record the impedance at which the relay tripped. The measured impedance should be within +/- 10% of the expected reach. Read and reset the alarms.

Resistive Reach (Quadrilateral Characteristics only)

Only a visual check that the correct settings for phase and ground element resistive reaches have been applied is needed. The relevant settings are R1Ph, R2Ph, R3Ph,

R3Ph reverse, R4Ph and RP Ph for phase fault zones. The settings are R1Gnd, R2Gnd,

R3Gnd, R3Gnd reverse, R4Gnd and RP Gnd for ground fault zones.

Note Zone 3 has an independent setting for the forward resistance reach (righthand resistive reach line), and the reverse resistance reach (left-hand resistive reach line).

Load Blinder

Only a visual check that the correct settings for the load blinder have been applied is needed. The settings are found at the end of the DISTANCE SETUP menu column, cells

[31D4] to [31D6]. It must be verified that [31D5: Load B/Angle] is set at least 10 degrees less than the [3004: Line Angle] setting in the LINE PARAMETERS menu column.

Distance Protection Operation and Contact Assignment

Phase A

Prepare a dynamic A phase to neutral fault, at half the Zone 1 reach. Connect a timer to start when the fault injection is applied, and to stop when the trip occurs. To verify correct output contact mapping use the trip contacts that would be expected to trip the circuit breaker(s), as shown in the table. For two breaker applications, stop the timer once CB1 and CB2 trip contacts have both closed, monitored by connecting the contacts in series to stop the timer if necessary.

Single Breaker Two Circuit Breakers

Three Pole Tripping Any Trip Any Trip (CB1) and Any Trip (CB2)

Single Pole Tripping Trip A Trip A (CB1) and Trip A (CB2)

Table 16 - Tripping and single/double circuit breakers

Apply the fault and record the phase A trip time. Switch OFF the ac supply and reset the alarms.

Page (CM) 11-52 P54x/EN CM/Nd5

Setting Checks

8.4.3.2

8.4.3.3

8.4.3.4

8.4.4

(CM) 11 Commissioning

Phase B

Reconfigure to test a B phase fault. Repeat the test in the Phase A section, this time ensuring that the breaker trip contacts relative to B phase operation close correctly.

Record the phase B trip time. Switch OFF the ac supply and reset the alarms.

Phase C

Repeat Phase B for the C phase.

The average of the recorded operating times for the three phases should typically be less than 20ms for 50Hz, and less than 16.7ms for 60Hz when set for instantaneous operation. Switch OFF the ac supply and reset the alarms.

Where a non-zero tZ1 Gnd time delay is set in the DISTANCE menu column, the expected operating time is typically within +/- 5% of the tZ1 setting plus the

“ instantaneous ” delay quoted above.

Time Delay Settings tZ1 Ph, and tZ2 - tZ4

Only a visual check that the correct time delay settings have been applied is needed. The relevant settings in the SCHEME LOGIC column are:

[3409: tZ1 Ph Time Delay]

[3411: tZ2 Ph Time Delay] and [3412: tZ2 Gnd Time Delay]

[3419: tZ3 Ph Time Delay] and [341A: tZ3 Gnd Time Delay]

[3421: tZP Ph Time Delay] and [3422: tZP Gnd Time Delay]

[3429: tZ4 Ph Time Delay] and [342A: tZ4 Gnd Time Delay]

Note The P54x allows separate time delay settings for phase (“Ph”) and ground

(“Gnd”) fault elements. BOTH must be checked to ensure that they have been set correctly.

Distance Protection Scheme Testing

The relay will be tested for it’s response to internal and external fault simulations, but the engineer must note that the response will depend upon the aided channel (pilot) scheme that is selected. For a conventional signaling scheme, the table overleaf indicates the expected response for various test scenarios, according to the scheme selection, and status of the opto-input that is assigned to the “ Aided Receive Ext ” channel receive for the distance scheme. The response to the “ Reset Z1 Extension ” opto is shown in the case of a Zone 1 Extension scheme.

Testing of the P54x distance scheme is detailed in the case of conventional signaling scheme implementation as it is expected that the signaling will be independent to that of the communication for the phase differential protection. In the case where an

InterMiCOM

64

scheme is being employed to provide the signaling, it may be that the scheme logic does not use opto-inputs for the aided scheme implementation and that internal logic signals (DDBs) will need to be set/reset in order to test the operation of the protection scheme. The IM64 Test Mode in conjunction with the IM64 Test Pattern should be used to assert/monitor the relevant signals.

Ensure that the injection test set timer is still connected to measure the time taken for the relay to trip. A series of fault injections will be applied, with a Zone 1, end-of-line, or Zone

4 fault simulated. At this stage, merely note the method in which each fault will be applied, but do not inject yet:

P54x/EN CM/Nd5 Page (CM) 11-53

(CM) 11 Commissioning

8.4.4.1

8.4.4.2

Setting Checks

Zone 1 fault A dynamic forward A-B fault at half the Zone 1 reach will be simulated.

End of line fault A dynamic forward A-B fault at the remote end of the line will be simulated. The fault impedance simulated should match the [3003:

Line Impedance] setting in the LINE PARAMETERS menu column.

Zone 4 fault A dynamic reverse A-B fault at half the Zone 4 reach will be simulated.

RELAY RESPONSE

Fault Type

Simulated

Forward Fault in

Zone 1

Forward Fault at

End of Line

(Within Z1X/Z2)

Reverse Fault in

Zone 4

Signal Receive

Opto

ON

Zone 1

Extension

Trip

Blocking

Scheme

Permissive

Scheme

(PUR/PUTT)

Permissive

Scheme

(POR/POTT)

Trip,

No signal send

OFF

Trip

Trip,

No signal send

Trip,

Signal send

Trip,

Signal send

ON

No trip

No trip,

No signal send

Trip,

No signal send

OFF

Trip

Trip,

No signal send

Trip,

No signal send

ON

No trip

No trip,

Signal send

No trip,

No signal send

Trip,

Signal send

Trip,

Signal send

Trip,

Signal send

No trip,

Signal send

No trip,

No signal send

OFF

No trip

No trip,

Signal send

No trip,

No signal send

No trip,

No signal send

Table 17 - Fault types and responses

Scheme Trip Test for Zone 1 Extension Only

The Reset Zone 1 Extension opto input should first be ON (energized). This should be performed by applying a continuous DC voltage onto the required opto input, either from the test set, station battery, or relay field voltage (commissioning engineer to ascertain the best method).

With the opto energized, inject an end of line fault. The duration of injection should be set to 100 ms. No Trip should occur.

De-energize the Reset Z1X opto (remove the temporary energization link, to turn it OFF).

Repeat the test injection, and record the operating time. This should typically be less than

20ms for 50Hz, and less than 16.7ms for 60Hz when set for instantaneous operation.

Switch OFF the ac supply and reset the alarms.

Where a non-zero tZ1 Ph time delay is set in the DISTANCE menu column, the expected operating time is typically within +/- 5% of the tZ1 setting plus the

“instantaneous” delay quoted above.

Scheme Trip Tests for Permissive Schemes (PUR/POR only)

This test applies to both Permissive Underreach, and Permissive Overreach aided scheme applications.

As in the table, for a Permissive scheme the Signal Receive opto input will need to be ON

(energized). This should be performed by applying a continuous DC voltage onto the required opto input, either from the test set, station battery, or relay field voltage

(commissioning engineer to ascertain the best method).

Page (CM) 11-54 P54x/EN CM/Nd5

Setting Checks

8.4.4.3

8.4.4.4

8.4.4.5

(CM) 11 Commissioning

With the opto energized, inject an end of line fault, and record the operating time. The measured operating time should typically be less than 20ms for 50Hz, and less than

16.7ms for 60Hz when set for instantaneous operation. Switch OFF the ac supply and reset the alarms.

Where a non-zero Distance Dly time delay is set in the DISTANCE menu column, the expected operating time is typically within +/- 5% of the tZ1 setting plus the

“instantaneous” delay quoted above.

De-energize the channel received opto (remove the temporary energization link, to turn it

OFF).

Scheme Trip Tests for Blocking Scheme Only

The Signal Receive opto input should first be ON (energized). This should be performed by applying a continuous DC voltage onto the required opto input, either from the test set, station battery, or relay field voltage (commissioning engineer to ascertain the best method).

With the opto energized, inject an end of line fault. The duration of injection should be set to 100ms. No trip should occur.

De-energize the channel received opto (remove the temporary energization link, to turn it

OFF).

Repeat the test injection, and record the operating time. Switch OFF the ac supply and reset the alarms.

For blocking schemes, a non-zero Distance Dly time delay is set, so the expected operating time is typically within +/- 5% of the delay setting plus the P54x

“instantaneous” operating delay. The trip time should thus be less than 20 ms for

50 Hz, and less than 16.7 ms for 60 Hz, plus 1.05 x Delay setting.

Signal Send Test for Permissive Schemes (PUR/POR Only)

This test applies to both Permissive Underreach, and Permissive Overreach scheme applications.

Firstly, reconnect the test set so that the timer is no longer stopped by the Trip contact, but is now stopped by the Signal Send contact (the contact that would normally be connected to the pilot/signaling channel).

Inject a Zone 1 fault, and record the signal send contact operating time. The measured operating time should typically be less than 20ms for 50Hz, and less than 16.7ms for

60Hz applications. Switch OFF the ac supply and reset the alarms.

Signal Send Test for Blocking Scheme Only

Firstly, reconnect the test set so that the timer is no longer stopped by the Trip contact, but is now stopped by the Signal Send contact (the contact that would normally be connected to the pilot/signaling channel).

Inject a Zone 4 fault, and record the signal send contact operating time. The measured operating time should typically be less than 20ms for 50Hz, and less than 16.7ms for

60Hz applications. Switch OFF the ac supply and reset the alarms.

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(CM) 11 Commissioning

8.4.5

Setting Checks

Scheme Timer Settings

Only a visual check that the correct time delay settings have been applied is needed. The relevant settings in the AIDED SCHEMES column are:

[344A: tRev. Guard]

[344B: Unblocking Delay]

[3453: WI Trip Delay] if applicable/visible if applicable/visible if applicable/visible

8.4.6

8.4.6.1

8.4.6.2

Page (CM) 11-56

Delta Directional Comparison

If the delta directional comparison aided scheme is being used, the operation should be tested. If not, skip to the Directional Earth Fault Aided Scheme (Ground Current Pilot

Scheme) section.

To avoid spurious operation of any distance, overcurrent, DEF/earth fault or breaker fail elements, these should be disabled for the duration of the delta element tests. This is done in the relay’s CONFIGURATION column. Ensure that cells [090B: Distance], [090F] differential, [090C: DEF], [0910: Overcurrent], [0913: Earth Fault] and [0920: CB Fail] are all set to Disabled . Make a note of which elements need to be re-enabled after testing.

Connection and Preliminaries

It is recommended that a 3-phase digital/electronic injection test set is used for ease of commissioning.

Connect the test equipment to the relay via the test block(s) taking care not to opencircuit any CT secondary. If Easergy test blocks are used, the live side of the test plug must be provided with shorting links before it is inserted into the test block.

Single-Ended Injection Test

This set of injection tests aims to determine that a single MiCOM relay, at one end of the scheme is performing correctly. The relay is tested in isolation, with the communications channel to the remote line terminal disconnected. Verify that the MiCOM relay cannot send or receive channel scheme signals to/from the remote line end.

The relay will be tested for it’s response to forward and reverse fault injections, but the engineer must note that the response will depend upon the aided channel (pilot) scheme that is selected. For a conventional signaling scheme, the Relay responses table shows the expected response for various test scenarios, according to the scheme selection, and status of the opto-input that is assigned to the Aided Receive Ext channel receive for the delta scheme.

P54x/EN CM/Nd5

Setting Checks

8.4.6.3

8.4.7

8.4.7.1

(CM) 11 Commissioning

Testing of the P54x directional comparison scheme is described for a conventional signaling scheme as it is expected that the signaling will be independent of the communication for the phase differential protection. Where an InterMiCOM

64

scheme is being used to provide the signaling, it may be that the scheme logic does not use optoinputs for the aided scheme implementation and that internal logic signals (DDBs) will need to be set/reset in order to test the operation of the protection scheme. The IM64

Test Mode in conjunction with the IM64 Test Pattern should be used to assert/monitor the relevant signals.

Direction of fault test injection

RELAY RESPONSE

Forward fault Reverse fault

Signal receive opto

Blocking scheme

Permissive scheme

(POR/POTT)

ON

No Trip,

No Signal Send

Trip,

Signal Send

OFF

Trip,

No Signal Send

No Trip,

Signal Send

ON

No Trip,

Signal Send

No Trip,

No Signal Send

OFF

No Trip,

Signal Send

No Trip,

No Signal Send

Table 18 - Relay responses

Forward Fault Preparation

Configure the test set to inject a dynamic sequence of injection, as follows:

Step 1:

Step 2:

Simulate a healthy 3-phase set of balanced voltages, each of magnitude Vn.

No load current should be simulated. The duration of injection should be set to 1 second. Step 1 thus mimics a healthy unloaded line, prior to the application of a fault

Simulate a forward fault on the A-phase. The A-phase voltage must be simulated to drop by 3 times the [3313:

V Fwd] setting, i.e:

Va = Vn - 3 x

V Fwd

The fault current on the A-phase should be set to 3 times the [3315:

I Fwd] setting, lagging Va by a phase angle equal to the line angle, i.e:

Ia = 3 x

I Fwd

-

θ

Line

Phases B and C should retain their healthy prefault voltage, and no current. The duration of injection should be set to 100 ms longer than the Delta Dly time setting.

Delta Directional Comparison Operation and Contact Assignment

A forward fault will be injected as described above, with the intention to cause a scheme trip. As in the table, for a Permissive scheme the Signal Receive opto input will need to be ON (energized). This should be performed by applying a continuous DC voltage onto the required opto input, either from the test set, station battery, or relay field voltage

(commissioning engineer to ascertain the best method).

For a Blocking scheme, the opto should remain de-energized (“OFF”).

Phase A

Prepare a dynamic A phase to neutral fault, as detailed above. Ensure that the test set is simulating Steps 1 and 2 as one continuous transition. Connect a timer to start when the fault injection (Step 2) is applied, and to stop when the trip occurs. To verify correct output contact mapping use the trip contacts that would be expected to trip the circuit breaker(s), as shown in the following table. For two breaker applications, stop the timer once CB1 and CB2 trip contacts have both closed, monitored by connecting the contacts in series to stop the timer if necessary.

P54x/EN CM/Nd5 Page (CM) 11-57

(CM) 11 Commissioning

8.4.7.2

8.4.7.3

8.4.8

8.4.8.1

8.4.8.2

Setting Checks

Three Pole Tripping

Single Pole Tripping

Single breaker

Any Trip

Trip A

Two circuit breakers

Any Trip (CB1) and Any Trip (CB2)

Trip A (CB1) and Trip A (CB2)

Table 19 - Tripping and single/double circuit breakers

Apply the fault and record the phase A trip time. Switch OFF the ac supply and reset the alarms.

Phase B

Reconfigure to test a B phase fault. Repeat the test in Phase A above, this time ensuring that the breaker trip contacts relative to B phase operation close correctly. Record the phase B trip time. Switch OFF the ac supply and reset the alarms.

Phase C

Repeat Phase B for the C phase.

The average of the recorded operating times for the three phases should typically be less than 20 ms for 50 Hz, and less than 16.7 ms for 60 Hz when set for instantaneous operation, as in Permissive schemes. Switch OFF the ac supply and reset the alarms.

For Blocking schemes, where a non-zero Delta Dly time delay is set, the expected operating time is typically within +/- 5% of the delay setting plus the “instantaneous” delay quoted above.

Delta Directional Comparison Scheme Testing

Signal Send Test for Permissive Schemes (POR/POTT Only)

Firstly, reconnect the test set so that the timer is no longer stopped by the Trip contact, but is now stopped by the Signal Send contact (the contact that would normally be connected to the pilot/signaling channel).

Repeat the forward fault injection, and record the signal send contact operating time. The measured operating time should typically be less than 20 ms for 50 Hz, and less than

16.7 ms for 60 Hz applications. Switch OFF the ac supply and reset the alarms.

Signal Send Test FOR Blocking Schemes Only

Configure the test set to inject a dynamic sequence of injection, as follows:

Step 1: Simulate a healthy 3-phase set of balanced voltages, each of magnitude

Vn. No load current should be simulated. The duration of injection should be set to 1 second. Step 1 therefore mimics a healthy unloaded line, prior to the application of a fault

Step 2: Simulate a reverse fault on the A-phase. The A-phase voltage must be simulated to drop by 3 times the [3314:

V Rev] setting, i.e.:

Va = Vn - 3 x

V Rev

The fault current on the A-phase should be set to 3 times the [3316:

I

Rev] setting, and in antiphase to the forward injections, i.e:

Ia = 3 x

I Rev

180

˚ - θ

Line

Phases B and C should retain their healthy prefault voltage, and no current. The duration of injection should be set to 100 ms.

Page (CM) 11-58 P54x/EN CM/Nd5

Setting Checks (CM) 11 Commissioning

Prepare the dynamic A phase reverse fault, as detailed above. Ensure that the test set is simulating Steps 1 and 2 as one continuous transition. Connect a timer to start when the fault injection (Step 2) is applied, and to stop when the Delta scheme Signal Send contact closes. Apply the test, and record the signal send contact response time. Switch

OFF the ac supply and reset the alarms.

The recorded operating time should typically be less than 20 ms for 50 Hz, and less than

16.7 ms for 60 Hz applications.

8.4.9

P54x/EN CM/Nd5

Out-of-Step Protection (OST) Protection (if Enabled)

If the Out-of-Step Tripping (OST) protection function is being used, it should be tested. If not, skip to the Directional Earth Fault Aided Scheme (Ground Current Pilot Scheme) section.

Out-of-Step Tripping (OST) protection applies only to MiCOM relays with hardware version J or later, and with software version 33 or later.

This test is suitable for injection sets with a state sequencer function as dynamic impedance conditions are going to be tested. Up to four states impedances that will be applied during the Out of Step commissioning are presented in the following diagram.

+jX

Z6

Z5

State 4

State 3

State 2

State 1

R

R6' R5' R5 R6

?R

Z5'

Z6'

Figure 6 - Four state impedances

Depending on the Out of Step settings, follow one of these options.

Predictive OST Setting

OST Setting

Predictive and OST Setting

P1982ENa

Page (CM) 11-59

(CM) 11 Commissioning

8.4.9.1

8.4.9.2

8.4.9.3

8.4.9.4

Setting Checks

‘Tost’ Timer Test

Predictive OST Setting

Clear all alarms. Set Tost to zero. Based on healthy voltages (VA = VB = VC = 57.8V) calculate the currents to generate the impedances as shown in the following Predictive

OST state sequence table:

Apply IA = IB = IC =

State 1

57.8

1.1 * R6

State 2 State 3

Table 20 - Predictive OST state sequence

Now apply the 3 state sequence to the relay under test and observe that the relay has tripped 3 phase and that an associated ‘Predictive OST’ alarm is displayed on the local

LCD.

Clear all alarms.

OST Setting

Clear all alarms. Set Tost to zero. Based on healthy voltages (VA = VB = VC = 57.8 V) calculate the currents to generate the impedances as shown in the following OST state sequence table:

Apply IA = IB = IC =

State 1

57.8

1.1 * R6

State 2 State 3 State 4

Table 21 - OST state sequence

Now apply the 4 state sequence to the relay under test and observe that the relay has tripped 3 phase and that an associated ‘OST’ alarm is displayed on the local LCD.

Predictive and OST Setting

As per ‘Predictive OST’ above.

‘Tost’ Timer Test

Repeat the test as for ‘Predictive OST’ and observe that the 3-phase tripping will come up after ‘Tost’ set time delay. Record the operating time in the commissioning record sheet.

Page (CM) 11-60 P54x/EN CM/Nd5

Setting Checks

8.4.10

8.4.10.1

(CM) 11 Commissioning

Directional Earth Fault Aided Scheme (Ground Current Pilot Scheme)

If the Aided DEF protection function is being used, it should be tested.

If not, skip to the Backup Phase Overcurrent Protection section.

Refer to the Protection Dependencies section, and check for any possible dependency conditions and simulate as appropriate.

To avoid spurious operation of any phase diff, distance, overcurrent, earth fault or breaker fail elements, these should be disabled for the duration of the DEF tests. This is done in the relay’s CONFIGURATION column. If the earth fault element is enabled without qualification of communication channel failure, then the current differential element [090F: Phase Diff], should be disabled. If the earth fault protection is enabled on communication channel failure, then the differential element should remain enabled and the communication should be disrupted to cause a suitable failure of the phase differential protection. Make a note of which elements need to be re-enabled after testing.

Testing of the P54x DEF scheme is detailed in the case of conventional signaling scheme implementation as it is expected that the signaling will be independent to that of the communication for the phase differential protection. In the case where an InterMiCOM

64 scheme is being employed to provide the signaling, it may be that the scheme logic does not use opto-inputs for the aided scheme implementation and that internal logic signals

(DDBs) will need to be set/reset in order to test the operation of the protection scheme.

The InterMiCOM

64

Test Mode in conjunction with the IM64 Test Pattern should be used to assert/monitor the relevant signals.

This set of injection tests aims to determine that a single relay, at one end of the scheme is performing correctly. The relay is tested in isolation, with the communications channel to the remote line terminal disconnected. Verify that the relay cannot send or receive channel scheme signals to/from the remote line end.

Connect the Test Circuit

Determine which output relay(s) has/have been selected to operate when a DEF trip occurs by viewing the relay’s Programmable Scheme Logic (PSL).

If the trip outputs are phase-segregated (i.e. a different output relay allocated for each phase), the relay assigned for tripping on ‘A’ phase faults should be used.

Connect the output relay so that its operation will Trip the test set and stop the timer.

Ensure that the timer is reset, and prepare the test shot below:

Simulate a forward fault on the A-phase. The A-phase voltage must be simulated to drop by 4 times the [3905] or [3906] : “DEF Vpol” setting, i.e.:

Va = Vn - (4 x DEF Vpol)

The fault current on the A-phase should be set to 2 times the [3907: DEF Threshold] setting, and in the forward direction. For a forward fault, the current Ia should lag the voltage Va by the DEF Char Angle setting, i.e.:

Ia = 2 x IN

DEF Threshold

∠ θ

DEF

Phases B and C should retain their healthy prefault voltage, and no current. The duration of the injection should be in excess of the DEF Delay setting (typically tDEF Delay + 100 ms).

P54x/EN CM/Nd5 Page (CM) 11-61

(CM) 11 Commissioning

8.4.10.2

8.4.11

8.4.11.1

8.4.11.2

Setting Checks

Direction of fault test injection

Signal Receive

Opto

ON

Forward fault

Blocking Scheme

No Trip,

No Signal Send

Permissive

Scheme

(POR/POTT)

Trip,

Signal Send

Trip,

RELAY RESPONSE

OFF

No Signal Send

No Trip,

Signal Send

ON

No Trip,

Signal Send

No Trip,

Reverse fault

No Signal Send

OFF

No Trip,

Signal Send

No Trip,

No Signal Send

Table 22 - Relay responses

A forward fault will be injected as described, with the intention to cause a scheme trip. As shown in the above Relay responses table, for a Permissive scheme the

Signal Receive opto input will need to be ON (energized). This should be performed by applying a continuous DC voltage onto the required opto input, either from the test set, station battery, or relay field voltage (commissioning engineer to ascertain the best method).

For a blocking scheme, the opto should remain de-energized (“OFF”).

DEF Aided Scheme - Forward Fault Trip Test

Apply the fault and record the (phase A) Trip time. Switch OFF the ac supply and reset the alarms.

The aided ground fault (DEF) scheme Trip time for POR schemes should be less than 40 ms

For blocking schemes, where a non-zero DEF Dly time delay is set, the expected operating time is typically within +/- 5% of the delay setting plus the “instantaneous”

(40 ms) delay quoted above.

There is no need to repeat the test for phases B and C, as these Trip assignments have already been proven by the distance/delta Trip tests.

DEF Aided Scheme - Scheme Testing

Signal Send Test for Permissive Schemes (POR/POTT Only)

Firstly, reconnect the test set so that the timer is no longer stopped by the Trip contact, but is now stopped by the

Signal Send contact

(the contact that would normally be connected to the pilot/signaling channel).

Repeat the forward fault injection, and record the signal send contact operating time. The measured operating time should typically be less than 40ms. Switch OFF the ac supply and reset the alarms.

Signal Send Test for Blocking Schemes Only

Firstly, reconnect the test set so that the timer is no longer stopped by the Trip contact, but is now stopped by the Signal Send contact (the contact that would normally be connected to the pilot/signaling channel).

Secondly, reverse the current flow direction on the “A” phase, to simulate a reverse fault.

Page (CM) 11-62 P54x/EN CM/Nd5

Setting Checks (CM) 11 Commissioning

Perform the reverse fault injection, and record the signal send contact operating time.

The measured operating time should typically be less than 40 ms. Switch OFF the ac supply and reset the alarms.

8.4.12

8.4.12.1

Backup Phase Overcurrent Protection

If the overcurrent protection function is being used, the

Ι

>1 element should be tested. If not, skip to the Restoration of Communications and Clearing VTS section.

Refer to the Protection Dependencies section, check for any possible dependency conditions and simulate as appropriate.

To avoid spurious operation of any distance, DEF, earth fault or breaker fail elements, these should be disabled for the duration of the overcurrent tests. This is done in the relay’s CONFIGURATION column. If the overcurrent element is enabled without qualification of communication channel failure, then the current differential element [090F:

Phase Diff], should be disabled. If the overcurrent protection is enabled on communication channel failure, then the differential element should remain enabled and the communication should be disrupted to cause a suitable failure of the phase differential protection. Make a note of which elements need to be re-enabled after testing.

Connect the Test Circuit

Determine which output relay has been selected to operate when an

Ι

>1 trip occurs by viewing the relay’s PSL.

The relay assigned for Trip Output A (DDB 523) faults should be used.

Stage 1 should be mapped directly to an output relay in the PSL. If default PSL is used,

Relay 3 can be used as I1> is mapped to Trip inputs 3 Ph (DDB 529) that in turn is internally mapped to Any Trip (DDB 522) mapped to relay 3 (see trip conversion logic on chapter P54x/EN OP ).

Connect the output relay so that its operation will trip the test set and stop the timer.

P54x/EN CM/Nd5

Note If the timer does not stop when the current is applied and stage 1 has been set for directional operation, the connections may be incorrect for the direction of operation set. Try again with the current connections reversed.

Page (CM) 11-63

(CM) 11 Commissioning

8.4.12.2

8.4.12.3

Setting Checks

Perform the Test

Ensure that the timer is reset.

Apply a current of twice the setting in cell [3504: GROUP 1 OVERCURRENT,

Ι

>1 Current

Set] to the relay and note the time displayed when the timer stops.

Check that the red trip LED has illuminated.

Check the Operating Time

Check that the operating time recorded by the timer is in the range shown in the

Characteristic operating times for I>1 table below.

Note Except for the definite time characteristic, the operating times given in the table are for a time multiplier or time dial setting of 1. Therefore, to obtain the operating time at other time multiplier or time dial settings, the time given in Table 14 must be multiplied by the setting of cell [3506: GROUP 1

OVERCURRENT,

Ι

>1 TMS] for IEC and UK characteristics or cell [3507:

GROUP 1 OVERCURRENT, Time Dial] for IEEE and US characteristics.

In addition, for definite time and inverse characteristics there is an additional delay of up to 0.02 second and 0.08 second respectively that may need to be added to the relay’s acceptable range of operating times.

For all characteristics, allowance must be made for the accuracy of the test equipment being used.

Characteristic

Operating time at twice current setting and time multiplier/ time dial setting of 1.0

DT

IEC S Inverse

IEC V Inverse

IEC E Inverse

UK LT Inverse

Nominal (seconds)

[3505: I>1 Time Delay] setting

10.03

13.50

26.67

120.00

IEEE M Inverse 3.8

IEEE V Inverse 7.03

IEEE E Inverse 9.50

US Inverse

US ST Inverse

2.16

12.12

Range (seconds)

Setting ±2%

9.53 - 10.53

12.83 - 14.18

24.67 – 28.67

114.00 - 126.00

3.61 – 4.0

6.68 - 7.38

9.02 – 9.97

2.05 - 2.27

11.51 - 12.73

Table 23 - Characteristic operating times for I>1

Page (CM) 11-64 P54x/EN CM/Nd5

Setting Checks

8.4.13

(CM) 11 Commissioning

Restoration of Communications and Clearing VTS

If, during the testing described in the Demonstrate Correct Relay Operation - Non-

Current Differential Element section, it was necessary to create communication failure conditions and/or VTS alarm conditions, these should be cleared now. If communications failure was achieved by setting cell [0F13: Test Loopback] to Disabled , then this should be reset to Enabled .

Reset the protection communications statistics.

P54x/EN CM/Nd5 Page (CM) 11-65

(CM) 11 Commissioning

8.5

Setting Checks

Check Trip and Auto-Reclose Cycle

If the auto-reclose function is being used, the circuit breaker trip and auto-reclose cycle can be tested automatically at the application-specific settings.

In order to test the trip and close operation without operating the breaker, the following criterion must be satisfied:

The “CB Healthy” DDB should not be mapped, or if it is mapped, it must be asserted high.

The CB status inputs (52 A, etc.) should not be mapped, or if they are mapped, they should be activated so as to mimic the circuit breaker operation.

If configured for single pole tripping, either the VT Connected setting should be set to No , or appropriate voltage signals need to be applied to prevent the pole dead logic from converting to 3-pole tripping.

To test the first three-phase auto-reclose cycle, set cell [0F11: COMMISSION TESTS,

Test Auto-reclose] to ‘3 Pole Test’. The relay will perform a trip/reclose cycle. Repeat this operation to test the subsequent three-phase auto-reclose cycles.

Check all output relays used for circuit breaker tripping and closing, blocking other devices, etc. operate at the correct times during the trip/close cycle.

The auto-reclose cycles for single phase trip conditions can be checked one at a time by sequentially setting cell [0F11: COMMISSION TESTS, Test Auto-reclose] to ‘Pole A Test’,

‘Pole B Test’ and ‘Pole C Test’.

Page (CM) 11-66 P54x/EN CM/Nd5

End-to-End Protection Communication Tests

9

9.1

9.1.1

9.1.1.1

(CM) 11 Commissioning

END-TO-END PROTECTION COMMUNICATION TESTS

If, as is likely to be the case, the P54x relay is being used in a scheme with phase differential or InterMiCOM

64

communications it will be necessary to perform end-to-end tests of the protection communications channels. If this is not the case, skip to the On-

Load Checks section.

In the Communications Loopback section, InterMiCOM communications loopbacks were applied to enable completion of the local end tests. In this section any loopbacks are removed and, if possible, satisfactory communications between line ends of the MiCOM relays in the scheme will be confirmed.

Note

Note

End-to-end communication requires the provision of a working telecommunication channel between line ends (which may be a multiplexed link or may be a direct connection). If the telecommunication channel is not available, it will not be possible to establish end-to end communication.

Nonetheless unless otherwise directed by local operational practice, the instructions in the End-To-End Protection Communications Tests section should be followed such that the scheme is ready for full operation when the telecommunications channels becomes available.

The trip circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker.

Remove Local Loopbacks

As well as removing the loopback test, this section checks that all wiring and optical fibers are reconnected. If P592 or P593 interface units are installed the application-specific settings will also be applied.

Check the alarm records to ensure that no communications failure alarms have occurred whilst the loopback test has been in progress.

Note If it was necessary to ‘fail’ the communications whilst testing the non-current differential elements, it may be prudent to observe the communications behavior for a few minutes before proceeding to remove the loopbacks.

Set cell [0F15 Test Mode] to Disabled .

Set cell [0F13 Loopback Mode] to Disabled .

Restore the communications channels as per the appropriate sub-section below.

Direct Fiber and C37.94 Connections

In the InterMiCOM64 Fiber Communications section, most of the required optical signal power levels were measurements were taken. If all signaling uses P59x interface units, then no further measurements are required. If direct fiber or C37.94 communications are used then it will be necessary to make further measurements.

Direct Fiber Connections

It is necessary to check the optical power level received from the remote relay(s).

Remove the loopback test fiber(s) and at both ends of each channel used, reconnect the fiber optic cables for communications between relays, ensuring correct placement.

P54x/EN CM/Nd5 Page (CM) 11-67

(CM) 11 Commissioning End-to-End Protection Communication Tests

9.1.1.2

For each channel fitted, in turn, remove the fiber connecting to the optical receiver (RX) and, using an optical power meter measure the strength of the signal received from the remote relay. The measurements should be within the values shown in the tables below:

Relays Manufactured

Pre April 2008

850nm multi-mode

1300nm multi-mode

1300nm single-mode

Maximum Transmitter Power (Average Value)

Minimum Transmitter Power (Average Value)

-16.8dBm

-25.4dBm

-6dBm

-49dBm

-6dBm

-49dBm

Relays Manufactured

Post April 2008

Maximum Transmitter Power (Average Value)

Minimum Transmitter Power (Average Value)

850nm multi-mode

-16.8dBm

-25.4dBm

1300nm multi-mode

-7dBm

-37dBm

1300nm single-mode

-7dBm

-37dBm

Table 24 - Measurement values

Record the received power level(s).

Reconnect the fiber(s) to the MiCOM receiver(s).

Fiber Connections to C37.94

It is necessary to check the optical power level received from the MiCOM at the C37.94 multiplexer, as well as that received by the MiCOM from the C37.94 multiplexer.

Remove the loopback test fibers and at both ends of each channel used , reconnect the fiber optic cables for communications between relays and the C37.94 compatible multiplexer, ensuring correct placement.

9.1.2

Page (CM) 11-68

In a similar manner to that described in the Direct Fiber Connections section, check that the value received from the MiCOM at the C37.94 multiplexer, as well as that received by the MiCOM from the C37.94 multiplexer are in the range presented in the table below:

Maximum Transmitter Power (Average Value) -16.8dBm

Minimum Transmitter Power (Average Value) -25.4dBm

Table 25 – Maximum/Minimum transmitter power

Record the received power level(s).

Reconnect the fiber(s).

Communications using P591 Interface Units

Return to the P591 units.

P54x/EN CM/Nd5

End-to-End Protection Communication Tests (CM) 11 Commissioning

9.1.3

9.1.4

9.2

9.2.1

If applicable, replace the secondary front cover on the P591 units.

Communications using P592 Interface Units

Return to the P592 units.

Set the ‘ V.35 LOOPBACK ’ switch to the ‘ 0 ’ position.

Set the ‘ CLOCK SWITCH ’, ‘ DSR ’, ‘ CTS ’ and ‘ DATA RATE ’ DIL switches on each unit to the positions required for the specific application and ensure the ‘ OPTO LOOPBACK ’ switch is in the ‘ 0 ’ position.

If applicable, replace the secondary front cover on the P592 units.

Communications using P593 Interface Units

Return to the P592 units.

Set the ‘ X.21 LOOPBACK ’ switch to the ‘ OFF ’ position and ensure the ‘ OPTO

LOOPBACK ’ switch is also in the ‘ OFF ’ position.

If applicable, replace the secondary front cover on the P593 units.

Remote Loopback Removal

Remove Loopbacks at Remote Terminal Connected to Channel 1

Repeat the following sections as needed at the remote end relay connected to channel 1.

Direct Fiber and C37.94 Connections

Communications using P591 Interface Units

Communications using P592 Interface Units

Communications using P593 Interface Units

P54x/EN CM/Nd5 Page (CM) 11-69

(CM) 11 Commissioning

9.2.2

9.3

9.3.1

9.3.2

End-to-End Protection Communication Tests

Remove Loopbacks at Remote Terminal Connected to Channel 2

Repeat the following sections as needed at the remote end relay connected to channel 2.

Direct Fiber and C37.94 Connections

Communications using P591 Interface Units

Communications using P592 Interface Units

Communications using P593 Interface Units

Verify Communications between Relays

Communications Statistics and Status - Non-GPS Synchronised

Reset any alarm indications and check that no further communications failure alarms are raised.

Check channel status and propagation delays in [MEASUREMENTS 4] column for channel1 (and channel 2 where fitted).

Specifically check that the first two bits in ‘Channel Status’ (Rx and Tx) are displaying ‘1’ i.e. 11************ (where * indicates a ‘don’t care’ state).

Clear the statistics and record the number of valid messages and the number of errored messages after a minimum period of 1 hour.

Check that the ratio of errored/good messages is better than 10

-4

.

Record the measured message propagation delays for channel 1, and channel 2 (if fitted).

Communications Statistics and Status - GPS Synchronised with P594

Reset any alarm indications and check that no further communications failure alarms are raised.

Check channel status and propagation delays in [MEASUREMENTS 4] column for channel1 (and channel 2 where fitted).

Specifically check that the first four bits in ‘Channel Status’ (Rx, Tx, Local GPS, and remote GPS) are displaying ‘1’ i.e. 1111********** (where * indicates a ‘don’t care’ state).

Clear the statistics and record the number of valid messages and the number of errored messages after a minimum period of 1 hour.

Check that the ratio of errored/good messages is better than 10

-4

.

Record the measured message propagation delays for channel 1, and channel 2 (if fitted).

Page (CM) 11-70 P54x/EN CM/Nd5

End-to-End Scheme Tests

10

10.1

10.1.1

10.1.1.1

10.1.1.2

(CM) 11 Commissioning

END-TO-END SCHEME TESTS

If an external signalling channel is being employed to provide aided scheme signaling

(i.e. an aided protection scheme is being realised without InterMiCOM protection signaling, it should be tested. If only basic schemes are being used, or if InterMiCOM is being used to realise the schemes, skip to the Modem InterMiCOM Scheme Testing section.

Signaling Channel Check

This section aims to check that the signaling channel is able to transmit the ON/OFF signals used in aided schemes between the remote line ends. Before testing, check that the channel is healthy (for example, if a power line carrier link is being used, it may not be possible to perform the tests until the protected circuit is live and has in-service). If the channel tests must be postponed, make a note to perform them as described in the On-

Load Checks section.

Aided Scheme 1

If Aided Scheme 1 is enabled, it must be tested. This is achieved by operating output contacts as in the Output Relays section to mimic the relay sending an aided channel signal.

Put the relay in test mode by setting cell [0F0D: COMMISSION TESTS, Test Mode] to

Blocked .

Record which contact is assigned as the Signal Send 1 output. Select this output contact as the one to test. And advise the remote end engineer that the contact is about to be tested.

Remote End Preparation to Observe Channel Arrival

At the remote end, the engineer must confirm the assignment of the Monitor Bits in the

COMMISSION TESTS column in the menu, in order to be able to see the aided channel on arrival. Scroll down and ensure cells are set: [0F05: Monitor Bit 1] to 493, and [0F09:

Monitor Bit 5] to 507. In doing so, cell [0F03: Test Port Status] will appropriately set or reset the bits that now represent Aided 1 Scheme Receive (DDB #493), and Aided 2

Scheme Receive (DDB #507), with the rightmost bit representing Aided Channel 1. From now on the remote end engineer should monitor the indication of [0F03: Test Port Status].

Application of the Test

At the local end, to operate the output relay set cell [0F0F: COMMISSION TESTS,

Contact Test] to ‘Apply Test’.

Reset the output relay by setting cell [0F0F: COMMISSION TESTS, Contact Test] to

Remove Test .

Note It should be ensured that thermal ratings of anything connected to the output relays during the contact test procedure are not exceeded by the associated output relay being operated for too long. It is therefore advised that the time between application and removal of the contact test is kept to the minimum.

Check with the engineer at the remote end that the Aided Channel 1 signal did change state as expected. The Test Port Status should have responded as in the table below:

P54x/EN CM/Nd5 Page (CM) 11-71

(CM) 11 Commissioning

10.1.1.3

10.1.2

End-to-End Scheme Tests

DDB No.

Monitor Bit

Contact Test OFF

Contact Test Applied (ON)

Test OFF

Note

X

X

X

8

X

X

X

7

“x” = Wildcard/denotes don’t care

X

X

X

6

X

X

X

507

5

X

X

X

4

X

X

X

3

X

X

X

2

0

1

0

493

1

Table 26 - Test port status responses

Return the relay to service by setting cell [0F0D: COMMISSION TESTS, Test Mode] to

‘Disabled’.

Channel Check in the Opposite Direction

Repeat the aided scheme 1 test procedure, but this time to check that the channel responds correctly when keyed from the remote end. The remote end commissioning engineer should perform the contact test, with the Monitor Option observed at the local end.

Aided Scheme 2

If applicable, now repeat the test for Aided Channel 2. Repeat as per the Channel Check in the Opposite Direction section above, checking that Monitor Bit 5 responds correctly for channel transmission in both directions (from the local end to the remote end, and vice versa).

Return the relay to service by setting cell [0F0D: COMMISSION TESTS, Test Mode] to

Disabled .

Page (CM) 11-72 P54x/EN CM/Nd5

On-Load Checks

11

(CM) 11 Commissioning

ON-LOAD CHECKS

The objectives of the on-load checks are to:

Confirm the external wiring to the current and voltage inputs is correct.

Measure the magnitude of capacitive current

Ensure the on-load differential current is well below the relay setting

Check the polarity of the line current transformers at each end is consistent.

Directionality check for directional elements.

However, these checks can only be carried out if there are no restrictions preventing the energization of the plant being protected and the other P54x relays in the group have been commissioned.

11.1

11.1.1

Confirm Current and Voltage Transformer Wiring

Voltage Connections

Compare the values of the secondary phase voltages with the relay’s measured values, which can be found in the MEASUREMENTS 1 menu column.

If cell [0D02: MEASURE’T SETUP, Local Values] is set to Secondary , the values displayed on the relay LCD or a portable PC connected to the front EIA(RS)232 communication port should be equal to the applied secondary voltage. The values should be within 1% of the applied secondary voltages/currents (5% for P74x). However, an additional allowance must be made for the accuracy of the test equipment being used.

If cell [0D02: MEASURE’T SETUP, Local Values] is set to Primary , the values displayed should be equal to the applied secondary voltage multiplied the corresponding voltage transformer ratio set in the CT & VT RATIOS menu column (see the following table).

Again, the values should be within 1% of the expected value (5% for P74x), plus an additional allowance for the accuracy of the test equipment being used.

P54x/EN CM/Nd5 Page (CM) 11-73

(CM) 11 Commissioning

11.1.2

11.2

On-Load Checks

V

AB

V

BC

V

CA

V

AN

V

BN

V

CN

Voltage

V

CHECKSYNC.

V

CHECKSYNC2

(NOT P445/P841 A)

Cell in MEASUREMENTS 1

Column (02)

[0214: V

AB

Magnitude]

[0216: V

BC

Magnitude]

[0218: V

CA

Magnitude]

[021A: V

AN

Magnitude]

[021C: V

BN

Magnitude]

[021E: V

CN

Magnitude]

Corresponding VT Ratio in ‘VT and CT

RATIO‘ Column (0A) of Menu)

[0A01 : Main VT Primary]

[0A02 : Main VT Secondary]

[022E: CB1 CS Volt Mag.]

[0A03 : (CB1) CS VTPrim’y]

[0A04 : (CB1) CS VT Sec’y]

[024C: CB2 CS2 Volt Mag]

(NOT P443/P445)

[0A05 : CB2 CS VTPrim’y]

[0A06 : CB2 CS VT Sec’y]

Table 27 - Measured voltages and VT ratio settings

Current Connections

Caution Measure the current transformer secondary values for each input using a multimeter connected in series with corresponding relay current input.

Check that the current transformer polarities are correct by measuring the phase angle between the current and voltage, either against a phase meter already installed on site and known to be correct or by determining the direction of power flow by contacting the system control center.

Caution Ensure the current flowing in the neutral circuit of the current transformers is negligible.

Compare the values of the secondary phase currents (and any phase angle) with the relay’s measured values, which can be found in the MEASUREMENTS 1 menu column.

If cell [0D02: MEASURE’T SETUP, Local Values] is set to Secondary , the current displayed on the relay LCD or a portable PC connected to the front EIA(RS)232 communication port should be equal to the applied secondary current. The values should be within 1% (5% for the P741/P742/P743/P746) of the applied secondary currents.

However, an additional allowance must be made for the accuracy of the test equipment being used.

If cell [0D02: MEASURE’T SETUP, Local Values] is set to Primary , the current displayed should be equal to the applied secondary current multiplied by the corresponding current transformer ratio set in the CT & VT RATIOS menu column (see the Measured Voltages and VT Ratio Settings table). Again the values should be within 10% (1% for the P34x,

5% for the P741/P742/P743/P746) of the expected value, plus an additional allowance for the accuracy of the test equipment being used.

Measure Capacitive Charging Current

With the feeder energized from one end only, compare the local and remote measured currents in the MEASUREMENTS 3 menu column to confirm that the feeder capacitive charging current is similar to that expected on all three phases.

Check that the setting of cell [3302: GROUP 1 PHASE DIFF, Phase

Ι s1] is higher than

2.5 times the capacitive charging current. If this is not the case, notify the Engineer who determined the original settings of the setting required to ensure stability under normal operating conditions.

Page (CM) 11-74 P54x/EN CM/Nd5

On-Load Checks

11.3

11.4

11.5

11.6

(CM) 11 Commissioning

Check Differential Current

With the feeder supplying load current check that the relay measurements in the

MEASUREMENTS 3 menu column are as expected and that the differential current is similar to the value of capacitive charging current previously measured for all.

Check Consistency of Current Transformer Polarity

The load current should be high enough to be certain beyond doubt that the main current transformers are connected with the same polarity to each relay in the group.

There is a possibility on cable circuits with high line capacitance that the load current could be masked by the capacitive charging current. If necessary reverse the connections to the main current transformers and check that the ‘A’ phase differential current in cell

[0419: MEASUREMENTS 3,

Ι

A Differential] is significantly higher than for the normal connection. If the differential current falls with the connection reversed, the main current transformers may not be correct and should be thoroughly checked. Repeat the test for phases ‘B’ and ‘C’ using cells [0420: MEASUREMENTS 3,

Ι

B Differential] and [0419:

MEASUREMENTS 3,

Ι

C Differential] respectively.

On Load Directional Test

This test is important to ensure that directionalized overcurrent and fault locator functions have the correct forward/reverse response to fault and load conditions.

Firstly the actual direction of power flow on the system must be ascertained, using adjacent instrumentation or protection already in-service, or a knowledge of the prevailing network operation conditions.

For load current flowing in the Forward direction - i.e. power export to the remote line end, cell [0301: MEASUREMENTS 2, A Phase Watts] should show positive power signing

For load current flowing in the Reverse direction - i.e. power import from the remote line end, cell [0301: MEASUREMENTS 2, A Phase Watts] should show negative power signing

Note The check above applies only for Measurement Modes 0 (default), and 2.

This should be checked in [0D05: MEASURE’T. SETUP, Measurement

Mode = 0 or 2]. If measurement modes 1 or 3 are used, the expected power flow signing would be opposite to that shown in the bullets above.

In the event of any uncertainty, check the phase angle of the phase currents with respect to their phase voltage.

Signaling Channel Check (if Not Already Completed)

If the aided scheme signaling channel(s) was/were not tested already in the Signalling

Channel Check section they should be tested now. This test may be avoided only with the agreement of the customer, or if only the basic scheme is used.

P54x/EN CM/Nd5 Page (CM) 11-75

(CM) 11 Commissioning

12

Final Checks

FINAL CHECKS

The tests are now complete.

Caution Remove all test or temporary shorting leads. If it has been necessary to disconnect any of the external wiring from the relay to perform the wiring verification tests, make sure all connections are replaced according to the relevant external connection or scheme diagram.

Ensure that the relay is restored to service by checking that cell [0F0F:

COMMISSIONING TESTS, Test Mode] and [0F12: COMMISSION TESTS, Static Test] are set to ‘ Disabled ’ (0F0D (not 0F0F) for P14x/P24x/P34x/P341/P44y/P54x/P841).

The settings applied should be carefully checked against the required application-specific settings to ensure that they are correct, and have not been mistakenly altered during testing.

There are two methods of checking the settings:

Extract the settings from the relay using a portable PC running the appropriate software via the front EIA(RS)232 port, located under the bottom access cover, or rear communications port (with a KITZ protocol converter connected). Compare the settings transferred from the relay with the original written application-specific setting record. (For cases where the customer has only provided a printed copy of the required settings but a portable PC is available).

Step through the settings using the relay’s operator interface and compare them with the original application-specific setting record. Ensure that all protection elements required have been ENABLED in the CONFIGURATION column.

For P14x, P34x, P341, P44x, P44y, P445, P54x, P547 OR P841, if the relay is in a new installation or the circuit breaker has just been maintained, the circuit breaker maintenance and current counters should be zero. These counters can be reset using cell [xxxx: CB CONDITION, Reset All Values]. If the required access level is not active, the relay will prompt for a password to be entered so that the setting change can be made.

(xxxx = 0609 for P14x/P841A, P44y or P54x, xxx = 0606 for P24x/P34x/P341, xxxx =

0608 for P44x, 0619 for P841B).

If the menu language was changed to allow accurate testing, it must now be restored to the customer’s preferred language.

If a MiCOM P991 or Easergy test block is installed, remove the MiCOM P992 or Easergy test plug and replace the test block cover so that the protection is put into service.

Ensure that all event records, fault records, disturbance records, alarms and LEDs have been reset before leaving the relay.

If applicable, replace the secondary front cover on the relay.

Page (CM) 11-76 P54x/EN CM/Nd5

MiCOM P54x (P543, P544, P545 & P546) (RC) 12 Test and Settings Records

TEST AND SETTINGS RECORDS

CHAPTER 12

P54x/EN RC/Nd5 Page (RC) 12-1

(RC) 12 Test and Settings Records MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (RC) 12-2 P54x/EN RC/Nd5

Contents (RC) 12 Test and Settings Records

CONTENTS

1 Commissioning Test Record

1.1

1.2

1.3

1.4

1.5

About this Chapter

Date Record

Front Plate Information

Test Equipment Used

Product Checks

2 Creating a Setting Record

2.1

2.2

Extract Settings from a MiCOM Px40 Device

Send Settings to a MiCOM Px40 Device

Page (RC) 12-

18

18

19

5

5

5

5

5

6

P54x/EN RC/Nd5 Page (RC) 12-3

(RC) 12 Test and Settings Records

Notes:

ContentsCommissioning Test Record

Page (RC) 12-4 P54x/EN RC/Nd5

Commissioning Test Record (RC) 12 Test and Settings Records

1 COMMISSIONING TEST RECORD

1.1 About this Chapter

The Commissioning chapter provides instructions on how to commission the relay – including how to calibrate the it and how to establish that it is functioning as intended.

This chapter provides you with a series of templates. You can use this to record the tests which have been made and the settings which have been used. You should use this chapter in conjunction with the Commissioning chapter and any work instructions you have as to what functionality and settings the relay should use.

1.2 Date Record

Date:

Station:

VT Ratio: ……… / ……… V

Engineer:

Circuit:

System Frequency: ……… Hz

CT Ratio (tap in use): ……… /A

1.3

Relay type

Model number

Serial number

Rated current In

Rated voltage Vn

Auxiliary voltage Vx

Front Plate Information

MiCOM P…………

1.4 Test Equipment Used

This section should be completed to allow future identification of protective devices that have been commissioned using equipment that is later found to be defective or incompatible but may not be detected during the commissioning procedure.

Overcurrent test set

Injection test set

Phase angle meter

Phase rotation meter

Optical power meter

Insulation tester

Setting software:

Model:

Serial No:

Model:

Serial No:

Model:

Serial No:

Model:

Serial No:

Model:

Serial No:

Model:

Serial No:

Type:

Version:

P54x/EN RC/Nd5 Page (RC) 12-5

(RC) 12 Test and Settings Records Commissioning Test Record

1.5

5.2.6

5.

5.1

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.2

5.2.1

5.2.2

5.2.3

5.2.4

5.2.4.1

5.2.4.3

5.2.5

Product Checks

Have all relevant safety instructions been followed?

Product checks

With the relay de-energized

Visual inspection

Relay damaged?

Rating information correct for installation?

Case earth installed?

Current transformer shorting contacts close?

Insulation resistance >100M Ω at 500V dc

External wiring

Wiring checked against diagram?

Test block connections checked?

Watchdog contacts (auxiliary supply off)

Terminals 11 and 12 Contact closed?

Terminals 13 and 14 Contact open?

Measured auxiliary supply

With the relay energized

Watchdog contacts (auxiliary supply on)

Terminals 11 and 12 Contact open?

Terminals 13 and 14 Contact closed?

LCD front panel display

LCD contrast setting used

Date and time

Clock set to local time?

Time maintained when auxiliary supply removed?

Light emitting diodes

Alarm (yellow) LED working?

Out of service (yellow) LED working?

All 18 programmable LEDs working?

Field supply voltage

Value measured between terminals 8 and 9

Input opto-isolators

Opto input 1

Opto input 2

Opto input 3

Opto input 4

Opto input 5 working? working? working? working? working?

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

V ac/dc*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

V dc

*Delete as appropriate

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

Not checked*

Not tested*

N/A*

No*

No*

No*

No*

No*

Page (RC) 12-6 P54x/EN RC/Nd5

Commissioning Test Record

5.2.7

Opto input 6

Opto input 7

Opto input 8

Opto input 9

Opto input 10

Opto input 11

Opto input 12

Opto input 13

Opto input 14

Opto input 15

Opto input 16

Opto input 17

Opto input 18

Opto input 19

Opto input 20

Opto input 21

Opto input 22

Opto input 23

Opto input 24

Opto input 25

Opto input 26

Opto input 27 working? working? working? working? working? working? working? working?

Opto input 28

Opto input 29

Opto input 30 working? working? working?

Opto input 31

Opto input 32 working? working?

Standard output relays

Relay 1 working? working? working? working? working? working? working? working? working? working? working? working? working? working? working?

Relay 2 working?

Relay 3 working?

Relay 4 working?

Relay 5 working?

Relay 6 working?

Relay 7 working?

Relay 8 working?

Relay 9 working?

Relay 10 working?

Relay 11 working?

Relay 12 working?

Relay 13 working?

Relay 14 working?

Relay 15 working?

Relay 16 working?

P54x/EN RC/Nd5

(RC) 12 Test and Settings Records

*Delete as appropriate

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No*

No*

No*

No*

No*

No*

No*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Page (RC) 12-7

(RC) 12 Test and Settings Records

P543 &

P544 option

P545 &

P546 option

I

P546 option

S

Relay 17 working?

Relay 18 working?

Relay 19 working?

Relay 20 working?

Relay 21 working?

Relay 22 working?

Relay 23 working?

Relay 24 working?

Relay 25 working?

Relay 26 working?

Relay 27 working?

Relay 28 working?

Relay 29 working?

Relay 30 working?

Relay 31 working?

Relay 32 working?

High break Relay 8

External wiring polarity check?

High break Relay 9

External wiring polarity check?

High break Relay 10

External wiring polarity check?

High break Relay 11

External wiring polarity check?

High break Relay 17

External wiring polarity check?

High break Relay 18

External wiring polarity check?

High break Relay 19

External wiring polarity check?

High break Relay 20

External wiring polarity check?

High break Relay 21

External wiring polarity check?

High break Relay 22

External wiring polarity check?

High break Relay 23

External wiring polarity check?

High break Relay 24

External wiring polarity check?

High break Relay 9

External wiring polarity check?

High break Relay 10

External wiring polarity check?

High break Relay 11

External wiring polarity check?

Page (RC) 12-8

Commissioning Test Record

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

*Delete as appropriate

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

No*

No*

No*

N/A*

N/A*

N/A*

P54x/EN RC/Nd5

Commissioning Test Record

5.2.8

5.2.9

5.2.10

5.2.11

High break Relay 12

External wiring polarity check?

High break Relay 13

External wiring polarity check?

High break Relay 14

External wiring polarity check?

High break Relay 15

External wiring polarity check?

High break Relay 16

External wiring polarity check?

High break Relay 17

External wiring polarity check?

High break Relay 18

External wiring polarity check?

High break Relay 19

External wiring polarity check?

High break Relay 20

External wiring polarity check?

Communication standard

Communications established?

Ι

Ι

Ι

Ι A

Ι B

Ι C

Protocol converter tested?

Second rear communication interface

Communications established?

Current inputs

Displayed current

Phase CT ratio

Mutual CT ratio

Input CT Applied Value

A

A2

B2

Ι C2

A

A

A N/A*

A N/A*

SEF

Ι M

Voltage inputs

A N/A*

A

A N/A*

Displayed voltage

Main VT ratio

C/S VT ratio

Input VT

VAN

VBN

Applied Value

V

V

P54x/EN RC/Nd5

(RC) 12 Test and Settings Records

Yes*

Yes*

Yes*

Yes*

*Delete as appropriate

No* N/A*

No* N/A*

No*

No*

N/A*

N/A*

Yes*

Yes*

Yes*

No* N/A*

No* N/A*

No* N/A*

Yes* No* N/A*

Yes* No* N/A*

Courier* IEC 60870-5-103* DNP3.0*

Yes* No*

Yes* No* N/A*

K-Bus* EIA485* EIA232*

Yes* No*

Primary*

Displayed Value

A

Secondary*

N/A*

N/A*

A

A

A N/A*

A N/A*

A N/A*

A N/A*

A N/A*

Primary*

Displayed value

V

V

Secondary*

N/A*

N/A*

Page (RC) 12-9

(RC) 12 Test and Settings Records Commissioning Test Record

6

6.1

6.1.1

6.1.1.1

6.1.1.2

6.1.2

6.1.3

6.1.n

6.1.n.1

6.1.n.2

6.1.n.3

6.1.n.4

6.1.n.5

6.1.n.6

6.1.n.7

VCN

C/S voltage

CB2 CS voltage

V

V N/A*

V N/A*

Protection Communications Loopback

Protection communications

Test Loopback set to External?

Channel 1 transmit power level

Channel 2 transmit power level

Loopback communications configuration

Type of fiber optic connection for channel 1

Fiber connections made with P59x unit on Ch 1?

Type of fiber optic connection for channel 2

Fiber connections made with P59x unit on Ch 2?

Fiber loopback connection made for ‘Direct’ or ‘C37.94’ on Ch 1?

Fiber loopback connection made for ‘Direct’ or ‘C37.94’ on Ch 2?

Communications using P59x units n=4 for P591 n=5 for P592 n=6 for P593

Apply to MiCOM Ch1 and/or Ch2 as appropriate

Visual inspection (P59x units only) Ch1

Ch 1 unit damaged?

Ch 1 rating information correct?

Ch 1 earthed?

Insulation resistance (P59x units only)

Ch 1 unit

External wiring (P59x units only)

Ch 1 unit checked against diagram?

Measured auxiliary supply (P59x units only)

Ch 1 unit

Light emitting diodes (P59x units only)

Ch 1 unit LED’s working?

P59x optical received signal level

Signal strength received by P59x connected to Ch 1

P59x loopback configured?

*Delete as appropriate

V

V

V

Yes*

dBm

dBm N/A*

Direct* C37.94*

P591* P592* P593*

Yes* N/A*

Direct* C37.94*

P591* P592* P593* N/A*

Yes* N/A*

Yes* N/A*

Yes* N/A*

Yes*

Yes*

Yes*

No*

No*

No*

N/A*

N/A*

N/A*

Yes* No* Not tested N/A*

Yes* No* N/A*

Vdc/ac N/A*

Yes* No* N/A*

dBm

Yes*

N/A*

N/A*

Page (RC) 12-10 P54x/EN RC/Nd5

Commissioning Test Record (RC) 12 Test and Settings Records

7.1.4

7.1.5

8

8.1

6.1.n.6

6.1.n.7

6.1.n.8

6.1.n.9

6.1.7

7

7.1.1

7.1.2

6.1.n.8

6.1.n.9

6.1.n.1

6.1.n.2

6.1.n.2

6.1.n.4

6.1.n.5

7.1.3

Signal strength received by P59x connected to Ch 1

Signal strength transmitted by P59x on Ch 1

MiCOM optical received signal level Ch 1 from P59x

Visual inspection (P59x units only) Ch2

Ch 2 unit damaged?

Ch 2 rating information correct?

Ch 2 earthed?

Insulation resistance (P59x units only)

Ch 2 unit

External wiring (P59x units only)

Ch 2 unit checked against diagram?

Measured auxiliary supply (P59x units only)

Ch 2 unit

Light emitting diodes (P59x units only)

Ch 2 unit LED’s working?

P59x optical received signal level

Signal strength received by P59x connected to Ch 2

P59x loopback configured?

Signal strength received by P59x connected to Ch 2

Signal strength transmitted by P59x on Ch 2

MiCOM optical received signal level Ch2 from P59x

Loopback test

IM64 Test Pattern set

IM64 Rx Status observed

GPS Synchronization

P594 commissioned?

P594 optical signal strength at P54x relay

Check synchronization signal at P54x relay

Bit pattern **11********** ?

Check GPS failure condition

Bit pattern **00********** ?

Restore GPS

Bit pattern **11********** ?

Setting checks

Application-specific function settings applied?

Application-specific programmable scheme logic settings applied?

Yes*

Yes*

Yes*

Yes*

dBm

dBm

dBm

*Delete as appropriate

N/A*

N/A*

N/A*

Yes* No* N/A*

Yes* No* N/A*

Yes* No* N/A*

Yes* No* Not tested N/A*

Yes* No* N/A*

Vdc/ac N/A*

Yes* No* N/A*

dBm

Yes*

dBm

dBm

dBm

N/A*

N/A*

N/A*

N/A*

N/A*

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

Yes* N/A*

dBm N/A*

Yes* N/A*

N/A*

N/A*

No*

No* N/A*

P54x/EN RC/Nd5 Page (RC) 12-11

(RC) 12 Test and Settings Records Commissioning Test Record

8.3.1.2

8.3.1.3

8.3.2.1

8.3.2.2

8.3.2.3

8.4.1

8.4.2

8.4.2.1

8.1.1

8.1.2

8.3

8.3.1.1

8.4.2.8

8.4.3.1

8.4.3.2

8.4.3.3

8.4.3.4

8.4.4

8.4.4.1

8.4.2.2

8.4.2.3

8.4.2.4

8.4.2.5

8.4.2.6

8.4.2.7

Relay power-off and on if Comms Mode changed?

Loopback Mode and Test Pattern configured?

Communication statistics reset?

Testing the current differential protection

Elements to be re-enabled after testing

(mark any that have been temporarily disabled)

Current differential lower slope pickup

Current differential upper slope pickup

Current differential phase A contact routing OK?

Current differential phase A trip time

Current differential phase B contact routing OK?

Current differential phase B trip time

Current differential phase C contact routing OK?

Current differential phase C trip time

Average trip time, phases A, B and C

Protection dependencies noted & preparations made?

Injection testing - distance zones

Elements to be re-enabled after testing

(mark any that have been temporarily disabled)

Zone 1 reach check - impedance at trip

Zone 2 reach check - impedance at trip

Zone 3 reach check - impedance at trip

Zone 4 reach check - impedance at trip

Zone P reach check - impedance at trip

Resistive reach

Visual inspection

Phase & ground element resistive reach settings are correct?

Load blinder

Visual inspection

Load blinder settings are correct?

Load blinder angle applied

Distance phase A contact routing OK?

Distance phase A trip time

Distance phase B contact routing OK?

Distance phase B trip time

Distance phase C contact routing OK?

Distance phase C trip time

Average trip time, phases A, B and C

Time delay settings tZ1 Ph, and tZ2 - tZ4

Visual inspection

Time delay settings are correct?

Distance protection scheme testing

Scheme trip zone 1 extension scheme

Yes*

˚

Yes*

ms

Yes*

ms

Yes*

ms

ms

Yes*

Yes*

Yes*

Yes*

Yes*

*Delete as appropriate

N/A*

N/A*

N/A*

Distance Earth fault

Overcurrent DEF CB fail Na*

A

A

Yes* No*

s

s

s

s

Yes*

Yes*

No*

No*

Yes* N/A*

Current diff Earth fault Overcurrent

DEF CB fail Na*

Ω Not measured*

Ω Not measured*

Ω Not measured*

Ω Not measured*

Ω Not measured*

No*

No* N/A*

N/A*

No*

No*

No*

No*

Page (RC) 12-12 P54x/EN RC/Nd5

Commissioning Test Record

8.4.7.1

8.4.7.2

8.4.7.3

8.4.8.1

8.4.8.2

8.4.9

8.4.9.1

8.4.9.2

8.4.9.3

8.4.4.2

8.4.4.3

8.4.4.4

8.4.4.5

8.4.5

8.4.6

(RC) 12 Test and Settings Records

No trip for fault with reset Z1X energized

Trip time with reset Z1X de-energized

Scheme trip permissive schemes (PUR/POR)

Trip time with signal receive energized

Scheme trip blocking scheme

No trip for fault with signal receive energized

Trip time with signal receive de-energized

Signal send test for permissive schemes

Signal send operate time

Signal send blocking schemes

Signal send operate time

Scheme timer settings

Visual inspection

Time delays settings are correct?

All disabled elements which were noted/circled previously are restored?

Delta directional comparison

Elements to be re-enabled after testing (circle any that have been temporarily disabled)

Directional comparison protection Phase A contact routing OK?

Directional comparison protection Phase A trip time

Directional comparison protection Phase B contact routing OK?

Directional comparison protection Phase B trip time

Directional comparison protection Phase C contact routing OK?

Directional comparison protection phase C trip time

Average trip time, phases A, B and C

Signal send test for permissive schemes

Signal send operate time

Signal send blocking schemes

Signal send operate time

All disabled elements which were noted/circled previously are restored?

Out of step protection

Predictive OST

Operated correctly?

Operating time

OST

Operated correctly?

Operating time

Predictive and OST

Operated correctly?

Operating time

Yes*

ms

ms

Yes*

ms

ms

ms

Yes*

*Delete as appropriate

No*

No*

Yes*

No*

No*

Current diff Distance Earth fault

Overcurrent CB fail Na*

No* Yes*

ms

Yes* No*

ms

Yes*

ms

ms

ms

ms

No*

Yes* No*

Enabled* N/A*

Yes*

ms

No*

Enabled*

Yes*

ms

Enabled*

Yes*

ms

N/A*

No*

N/A*

No*

P54x/EN RC/Nd5 Page (RC) 12-13

(RC) 12 Test and Settings Records Commissioning Test Record

8.4.9.4

8.4.10

8.4.10.2

8.4.11.1

8.4.11.2

8.4.12

8.4.12.3

8.4.12.4

8.5

9

9.1

9.1.1.1

9.1.1.2

Tost timer test

Trip time

Injection testing - DEF aided scheme

Elements to be re-enabled after testing

(mark any that have been temporarily disabled)

DEF aided scheme trip time

DEF signal send time permissive scheme

DEF signal send time blocking scheme

All disabled elements which were noted/circled previously are restored?

Backup phase overcurrent protection

Elements to be re-enabled after testing (circle any that have been temporarily disabled)

Overcurrent type (set in cell [ Ι >1 Direction])

Applied voltage

Applied current

Expected operating time

Measured operating time

All disabled elements which were noted/circled previously are restored?

Restore Communications and clear VTS?

Trip and auto-reclose cycle checked

3 pole cycle tested?

Pole A cycle tested?

Pole B cycle tested?

Pole C cycle tested?

END-TO-END PROTECTION COMMUNICATION

TESTS

Communication Alarm Check

Any Ch 1 communication alarm?

Any Ch 2 communication alarm?

Restore Communications Channels

Direct fiber connection

Optical received signal level Ch 1

Optical received signal level Ch 2

Fiber connections to C37.94

Optical received signal level from C37.94 Ch 1

*Delete as appropriate

ms

Current diff Distance Earth fault

Overcurrent CB fail Na*

ms

ms

ms

Yes* No*

Current diff Distance Earth fault

DEF CB fail Na*

Directional* Non-directional*

V/na*

A

s

s

Yes* No*

Yes* N/A*

Yes*

Yes*

No* N/A*

No* N/A*

Yes*

Yes*

No*

No*

N/A*

N/A*

Yes*

Yes*

No*

No*

dBm N/A*

dBm N/A*

dBm N/A*

N/A*

Page (RC) 12-14 P54x/EN RC/Nd5

Commissioning Test Record (RC) 12 Test and Settings Records

10

10.1

10.1.1.1

10.1.1.2

10.1.1.3

10.1.2

9.1.1 –

9.1.4

9.2.1

9.2.2

9.3

Optical received signal level at C37.94 Ch 1

Optical received signal level from C37.94 Ch 1

Optical received signal level at C37.94 Ch 1

All local connections restored?

Local Ch 1

Local Ch 2

Application-specific settings applied? (P592 only)

Local Ch 1

Local Ch 2

Cover replaced? (P59x only)

Local Ch 1

Local Ch 2

All connections restored at relay connected to Ch1?

All connections restored at relay connected to Ch2 ?

Verify communications between relays

Alarms reset?

Ch 1 propagation time delay

Ch 2 propagation time delay

Enter 14 bits channel 1 status from MEASUREMENTS

4

Enter 14 bits channel 2 status from MEASUREMENTS

4

Statistics reset at (time)

Statistics measured at (reset time + 1 hr minimum)

Statistics measurements

Ch 1 No. valid messages

Ch 1 No. err messages

Ch 1 errored/valid

Ch 1 errored/valid < 10-4

Ch 2 No. valid messages

Ch 2 No. err messages

Ch 2 errored/valid

Ch 2 errored/valid < 10-4

END-TO-END SCHEME TESTS

Signaling channel check

Aided scheme 1 signaling channel test

Local - remote end signal received

Remote - local end signal received

Aided scheme 2 signaling channel test

Local - remote end signal received

Remote - local end signal received

*Delete as appropriate

dBm N/A*

dBm N/A*

dBm N/A*

Yes*

Yes*

Yes*

Yes*

No*

No*

No*

No*

N/A*

N/A*

N/A*

Yes*

Yes*

No*

No*

N/A*

N/A*

Yes*

Yes*

ms

Yes*

ms N/A*

No*

No* N/A*

No*

____ : ____ : ____

____ : ____ : ____

N/A*

N/A*

N/A*

N/A*

Yes*

Yes*

Yes*

Yes*

No* N/A*

No* N/A*

No* N/A*

No* N/A*

P54x/EN RC/Nd5 Page (RC) 12-15

(RC) 12 Test and Settings Records

12

11.3

11.4

11.5

11.6

11.

11.1.1

11.1.2

11.2

On-load checks

Test wiring removed?

Voltage inputs and phase rotation OK?

Current inputs and polarities OK?

Capacitive charging current checked?

Differential current checked?

CT polarity consistency checked?

On-load test performed?

(If “No”, give reason why) …

Relay is correctly directionalized?

Signaling channel check

Final checks

All test equipment, leads, shorts and test blocks removed safely?

Disturbed customer wiring re-checked?

All commissioning tests disabled?

Application settings checked?

Circuit breaker operations counter reset?

Current counters reset?

Event records reset?

Fault records reset?

Disturbance records reset?

Alarms reset?

LEDs reset?

Communications statistics reset?

Secondary front cover replaced?

Commissioning Test Record

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

Yes*

N/A*

*Delete as appropriate

No*

No*

No*

No* N/A*

No* N/A*

No* N/A*

No*

No* N/A*

Tested in 10*

No*

No* N/A*

No*

No*

No* N/A*

No* N/A*

No*

No*

No*

No*

No*

No*

No* N/A*

Page (RC) 12-16 P54x/EN RC/Nd5

Commissioning Test Record (RC) 12 Test and Settings Records

COMMENTS #

(# Optional, for site observations or utility-specific notes).

Commissioning Engineer

Date:

Customer Witness

Date:

P54x/EN RC/Nd5 Page (RC) 12-17

(RC) 12 Test and Settings Records

2

2.1

Creating a Setting Record

CREATING A SETTING RECORD

You often need to create a record of what settings have been applied to a device. In the past, you could have used paper printouts of all the available settings, and mark up the ones you had used. Keeping such a paper-based Settings Records can be timeconsuming and prone to error (e.g. due to being settings written down incorrectly).

The MiCOM S1 Studio software lets you read from or write to MiCOM devices.

• Extract lets you download all the settings from a MiCOM Px40 device. A summary is given in Extract Settings from a MiCOM Px40 Device below.

• Send lets you send the settings you currently have open in MiCOM S1 Studio. A summary is given in Send Settings to a MiCOM Px40 Device below.

The MiCOM S1 Studio product is updated periodically. These updates provide support for new features (such as allowing you to manage new MiCOM products, as well as using new software releases and hardware suffixes). The updates may also include fixes.

Accordingly, we strongly advise customers to use the latest Schneider Electric version of MiCOM S1 Studio.

In most cases, it will be quicker and less error prone to extract settings electronically and store them in a settings file on a memory stick. In this way, there will be a digital record which is certain to be accurate. It is also possible to archive these settings files in a repository; so they can be used again or adapted for another use.

Full details of how to do these tasks is provided in the MiCOM S1 Studio help.

A quick summary of the main steps is given below.

In each case you need to make sure that:

• Your computer includes the MiCOM S1 Studio software.

Your computer and the MiCOM device are powered on.

You have used a suitable cable to connect your computer to the MiCOM device

(Front Port, Rear Port, Ethernet port or Modem as available).

Extract Settings from a MiCOM Px40 Device

Full details of how to do this is provided in the MiCOM S1 Studio help.

As a quick guide, you need to do the following:

1. In MiCOM S1 Studio, click the Quick Connect… button.

2. Select the relevant Device Type in the Quick Connect dialog box.

3. Click the relevant port in the Port Selection dialog box.

4. Enter the relevant connection parameters in the Connection Parameters dialog box and click the Finish button

5. MiCOM S1 Studio will try to communicate with the Px40 device. It will display a connected message if the connection attempt is successful.

6. The device will appear in the Studio Explorer pane on the top-left of the interface.

7. Click the + button to expand the options for the device, then click on the Settings folder.

8. Right-click on Settings and select the Extract Settings link to read the settings on

9. the device and store them on your computer or a memory stick.

After retrieving the settings file, close the dialog box by clicking the Close button.

Page (RC) 12-18 P54x/EN RC/Nd5

Creating a Setting Record

2.2

(RC) 12 Test and Settings Records

Send Settings to a MiCOM Px40 Device

Full details of how to do this is provided in the MiCOM S1 Studio help.

As a quick guide, you need to do the following:

1. In MiCOM S1 Studio, click the Quick Connect… button.

2. Select the relevant Device Type in the Quick Connect dialog box.

3. Click the relevant port in the Port Selection dialog box.

4. Enter the relevant connection parameters in the Connection Parameters dialog box and click the Finish button

5. MiCOM S1 Studio will try to communicate with the Px40 device. It will display a connected message if the connection attempt is successful.

6. The device will appear in the Studio Explorer pane on the top-left hand side of the interface.

7. Click the + button to expand the options for the device, then click on the Settings link.

8. Right-click on the device name and select the Send link.

Note When you send settings to a MiCOM Px40 device, the data is stored in a temporary location at first. This temporary data is tested to make sure it is complete. If the temporary data is complete, it will be programmed into the

MiCOM Px40 device. This avoids the risk of a device being programmed with incomplete or corrupt settings.

9. In the Send To dialog box, select the settings file(s) you wish to send, then click the

Send button.

10. Close the the Send To dialog box by clicking the Close button.

P54x/EN RC/Nd5 Page (RC) 12-19

(RC) 12 Test and Settings Records

Notes:

Creating a Setting Record

Page (RC) 12-20 P54x/EN RC/Nd5

MiCOM Px4x (MT) 13 Maintenance

Px4x/EN MT/H53

MAINTENANCE

CHAPTER 13

Page (MT) 13-1

(MT) 13 Maintenance MiCOM Px4x

Date:

Products covered by this chapter:

Hardware suffix:

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

11/2015

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

All MiCOM Px4x products

Software version: All MiCOM Px4x products

Connection diagrams: P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x (P441, P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (MT) 13-2 Px4x/EN MT/H53

Contents

CONTENTS

1 Maintenance Period

2 Maintenance Checks

2.1

2.2

2.3

2.4

Alarms

Opto-Isolators

Output Relays

Measurement Accuracy

3 Method of Repair

3.1

3.2

Replacing the Complete Equipment IED/Relay

Replacing a PCB

4 Re-Calibration

5 Changing the Battery

5.1

5.2

5.3

Instructions for Replacing the Battery

Post Modification Tests

Battery Disposal

6 Cleaning

(MT) 13 Maintenance

Page (MT) 13-

5

6

6

6

6

6

7

8

9

10

11

11

11

11

12

Px4x/EN MT/H53 Page (MT) 13-3

(MT) 13 Maintenance

Notes:

Contents

Page (MT) 13-4 Px4x/EN MT/H53

Maintenance Period

1

(MT) 13 Maintenance

MAINTENANCE PERIOD

Warning Before inspecting any wiring, performing any tests or carrying out any work on the equipment, you should be familiar with the contents of the Safety Information and

Technical Data sections and the information on the equipment’s rating label.

It is recommended that products supplied by Schneider Electric receive periodic monitoring after installation. In view of the critical nature of protective and control equipment, and their infrequent operation, it is desirable to confirm that they are operating correctly at regular intervals.

Schneider Electric protection and control equipment is designed for a life in excess of 20 years.

MiCOM relays are self-supervizing and so require less maintenance than earlier designs.

Most problems will result in an alarm so that remedial action can be taken. However, some periodic tests should be done to ensure that the equipment is functioning correctly and the external wiring is intact.

If the customer’s organization has a preventative maintenance policy, the recommended product checks should be included in the regular program. Maintenance periods depend on many factors, such as:

The operating environment

The accessibility of the site

The amount of available manpower

The importance of the installation in the power system

The consequences of failure

Px4x/EN MT/H53 Page (MT) 13-5

(MT) 13 Maintenance

2

2.1

2.2

2.3

2.4

Maintenance Checks

MAINTENANCE CHECKS

Although some functionality checks can be performed from a remote location by using the communications ability of the equipment, these are predominantly restricted to checking that the equipment, is measuring the applied currents and voltages accurately, and checking the circuit breaker maintenance counters. Therefore it is recommended that maintenance checks are performed locally (i.e. at the equipment itself).

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/safety guide SFTY/4LM/C11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

Warning If a P391 is used, you should also be familiar with the ratings and warning statements in the P391 technical manual.

Alarms

The alarm status LED should first be checked to identify if any alarm conditions exist. If so, press the read key (  ) repeatedly to step through the alarms.

Clear the alarms to extinguish the LED.

Opto-Isolators

The opto-isolated inputs can be checked to ensure that the equipment responds to energization by repeating the commissioning test detailed in the Commissioning chapter.

Output Relays

The output relays can be checked to ensure that they operate by repeating the commissioning test detailed in the Commissioning chapter.

Measurement Accuracy

If the power system is energized, the values measured by the equipment can be compared with known system values to check that they are in the approximate range that is expected. If they are, the analog/digital conversion and calculations are being performed correctly by the relay. Suitable test methods can be found in the

Commissioning chapter.

Alternatively, the values measured by the equipment can be checked against known values injected via the test block, if fitted, or injected directly into the equipment terminals.

Suitable test methods can be found in the Commissioning chapter. These tests will prove the calibration accuracy is being maintained.

Page (MT) 13-6 Px4x/EN MT/H53

Method of Repair

3

(MT) 13 Maintenance

METHOD OF REPAIR

If the equipment should develop a fault whilst in service, depending on the nature of the fault, the watchdog contacts will change state and an alarm condition will be flagged.

Due to the extensive use of surface-mount components, faulty Printed Circuit Boards

(PCBs) should be replaced, as it is not possible to perform repairs on damaged PCBs.

Therefore either the complete equipment module or just the faulty PCB (as identified by the in-built diagnostic software), can be replaced. Advice about identifying the faulty PCB can be found in the Troubleshooting chapter.

The preferred method is to replace the complete equipment module as it ensures that the internal circuitry is protected against electrostatic discharge and physical damage at all times and overcomes the possibility of incompatibility between replacement PCBs.

However, it may be difficult to remove installed equipment due to limited access in the back of the cubicle and the rigidity of the scheme wiring.

Replacing PCBs can reduce transport costs but requires clean, dry conditions on site and higher skills from the person performing the repair. If the repair is not performed by an approved service center, the warranty will be invalidated.

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/safety guide SFTY/4LM/C11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

This should ensure that no damage is caused by incorrect handling of the electronic components.

Px4x/EN MT/H53 Page (MT) 13-7

(MT) 13 Maintenance

3.1

Method of Repair

Replacing the Complete Equipment IED/Relay

The case and rear terminal blocks have been designed to facilitate removal of the

IED/relay should replacement or repair become necessary without having to disconnect the scheme wiring.

Warning Before working at the rear of the equipment, isolate all voltage and current supplies to the equipment.

Note The MiCOM range has integral current transformer shorting switches which will close when the heavy duty terminal block is removed.

1. Disconnect the equipment’s earth, IRIG-B and fiber optic connections, as appropriate, from the rear of the device.

There are two types of terminal block used on the equipment, medium and heavy duty, which are fastened to the rear panel using crosshead screws. The P64x range also includes an RTD/CLIO terminal block option. These block types are shown in the Commissioning chapter.

Important The use of a magnetic bladed screwdriver is recommended to minimize the risk of the screws being left in the terminal block or lost.

2. Without exerting excessive force or damaging the scheme wiring, pull the terminal blocks away from their internal connectors.

3. Remove the screws used to fasten the equipment to the panel, rack, etc. These are the screws with the larger diameter heads that are accessible when the access covers are fitted and open.

Warning If the top and bottom access covers have been removed, do not remove the screws with the smaller diameter heads which are accessible. These screws secure the front panel to the equipment.

4. Withdraw the equipment carefully from the panel, rack, etc. because it will be heavy due to the internal transformers.

To reinstall the repaired or replacement equipment, follow the above instructions in reverse, ensuring that each terminal block is relocated in the correct position and the case earth, IRIG-B and fiber optic connections are replaced. To facilitate easy identification of each terminal block, they are labeled alphabetically with ‘A’ on the lefthand side when viewed from the rear.

Once reinstallation is complete, the equipment should be re-commissioned using the instructions in the Commissioning chapter.

Page (MT) 13-8 Px4x/EN MT/H53

Method of Repair

3.2

(MT) 13 Maintenance

Replacing a PCB

Replacing PCBs and other internal components must be undertaken only by Service

Centers approved by Schneider Electric. Failure to obtain the authorization of Schneider

Electric after sales engineers prior to commencing work may invalidate the product warranty.

Warning Before removing the front panel to replace a PCB, remove the auxiliary supply and wait at least 30 seconds for the capacitors to discharge.

We strongly recommend that the voltage and current transformer connections and trip circuit are isolated.

Schneider Electric support teams are available world-wide. We strongly recommend that any repairs be entrusted to those trained personnel. For this reason, details on product disassembly and re-assembly are not included here.

Px4x/EN MT/H53 Page (MT) 13-9

(MT) 13 Maintenance

4

Re-Calibration

RE-CALIBRATION

Re-calibration is not required when a PCB is replaced unless it happens to be one of the boards in the input module; the replacement of either directly affects the calibration.

Warning Although it is possible to carry out re-calibration on site, this requires test equipment with suitable accuracy and a special calibration program to run on a PC. It is therefore recommended that the work be carried out by the manufacturer, or entrusted to an approved service center.

Page (MT) 13-10 Px4x/EN MT/H53

Changing the Battery

5

(MT) 13 Maintenance

CHANGING THE BATTERY

Each relay/IED has a battery to maintain status data and the correct time when the auxiliary supply voltage fails. The data maintained includes event, fault and disturbance records and the thermal state at the time of failure.

This battery will periodically need changing, although an alarm will be given as part of the relay’s/IED’s continuous self-monitoring in the event of a low battery condition.

If the battery-backed facilities are not required to be maintained during an interruption of the auxiliary supply, the steps below can be followed to remove the battery, but do not replace with a new battery.

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/safety guide SFTY/4LM/C11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

5.1

5.2

5.3

Instructions for Replacing the Battery

1. Open the bottom access cover on the front of the equipment.

2. Gently extract the battery from its socket. If necessary, use a small, insulated screwdriver to prize the battery free.

3. Ensure that the metal terminals in the battery socket are free from corrosion, grease and dust.

4. The replacement battery should be removed from its packaging and placed into the battery holder, taking care to ensure that the polarity markings on the battery agree with those adjacent to the socket.

Note Only use a type ½AA Lithium battery with a nominal voltage of 3.6 V and safety approvals such as UL (Underwriters Laboratory), CSA (Canadian

Standards Association) or VDE (Vereinigung Deutscher

Elektrizitätswerke).

5. Ensure that the battery is securely held in its socket and that the battery terminals are making good contact with the metal terminals of the socket.

6. Close the bottom access cover.

Post Modification Tests

To ensure that the replacement battery will maintain the time and status data if the auxiliary supply fails, check cell [0806: DATE and TIME, Battery Status] reads ‘Healthy’.

If further confirmation that the replacement battery is installed correctly is required, the commissioning test is described in the Commissioning chapter, ‘Date and Time’, can be performed.

Battery Disposal

The battery that has been removed should be disposed of in accordance with the disposal procedure for Lithium batteries in the country in which the equipment is installed.

Px4x/EN MT/H53 Page (MT) 13-11

(MT) 13 Maintenance

6

Cleaning

CLEANING

Warning Before cleaning the equipment ensure that all ac and dc supplies, current transformer and voltage transformer connections are isolated to prevent any chance of an electric shock whilst cleaning.

The equipment may be cleaned using a lint-free cloth moistened with clean water. The use of detergents, solvents or abrasive cleaners is not recommended as they may damage the relay’s surface and leave a conductive residue.

Page (MT) 13-12 Px4x/EN MT/H53

MiCOM Px4x (TS) 14 Troubleshooting

Px4x/EN TS/If7

TROUBLESHOOTING

CHAPTER 14

Page (TS) 14-1

(TS) 14 Troubleshooting MiCOM Px4x

Date:

Products covered by this chapter:

Hardware Suffix:

Software Version:

Connection

Diagrams:

11/2015

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

P14x (P141, P142, P143 & P145) J

P241

P242/P243

P342

P343/P344/P345

P391

P445

P44x (P441, P442 & P444)

P44x (P442 & P444)

P44y (P443 & P446)

J

K

J

K

A

J

J & K

M

K

P547 K

P54x (P543, P544, P545 & P546) K

P642

P643

P645

P74x (P741, P742 & P743)

P746

P841

P849

J & L

K & M

K & M

J & K

K & M

K

K

P14x (P141, P142, P143 & P145) 43, 44 & 46

P24x (P241, P242 & P243):

P342, P343, P344, P345 & P391 36

P445

P44x (P441, P442 & P444)

P44x (P442 & P444)

P44y (P443 & P446)

P445:

10P445xx (xx = 01 to 04)

P44x(P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

57

35 & 36

C7.x, D4.x,

D5.x & D6.x,

E0

55

P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P547 57

P54x (P543, P544, P545 & P546) 45 & 55

P64x (P642, P643 & P645)

P74x (P741, P742 & P743)

P746

P841

P849

04, A0 & B1

51, A0 & B1

A0, B1, B2, C1 & C2

45 & 55

A0

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (TS) 14-2 Px4x/EN TS/If7

Contents

CONTENTS

1 Introduction

2 Initial Problem Identification

3 Power Up Errors

4 Error Message/Code on Power-up

5 Out of Service LED illuminated on Power Up

6 Error Code During Operation

7 Mal-Operation of the Relay during Testing

7.1

7.2

7.3

7.4

7.4.1

7.4.2

Failure of Output Contacts

Failure of Opto-Isolated Inputs

Incorrect Analog Signals

PSL Editor Troubleshooting

Diagram Reconstruction after Recover from Relay

PSL Version Check

8 Repair and Modification Procedure

REPAIR/MODIFICATION RETURN AUTHORIZATION FORM

TABLES

Table 1 - Problem identification

Table 2 - Failure of relay to power up

Table 3 - Power-up self-test error

Table 4 - Out of service LED illuminated

Table 5 - Failure of output contacts

(TS) 14 Troubleshooting

Page (TS) 14-

6

7

8

9

11

Page (TS) 14-

7

8

9

10

11

11

11

12

12

12

12

5

6

13

15

Px4x/EN TS/If7 Page (TS) 14-3

(TS) 14 Troubleshooting

Notes:

Tables

Page (TS) 14-4 Px4x/EN TS/If7

Introduction

1 INTRODUCTION

(TS) 14 Troubleshooting

The purpose of this chapter of the service manual is to allow an error condition on the relay to be identified so that appropriate corrective action can be taken.

If the relay has developed a fault, it should be possible in most cases to identify which relay module requires attention. The Maintenance chapter advises on the recommended method of repair where faulty modules need replacing. It is not possible to perform an on-site repair to a faulted module.

In cases where a faulty relay/module is being returned to the manufacturer or one of their approved service centers, completed copy of the Repair/Modification Return

Authorization Form located at the end of this chapter should be included.

Px4x/EN TS/If7 Page (TS) 14-5

(TS) 14 Troubleshooting

2

Initial Problem Identification

INITIAL PROBLEM IDENTIFICATION

Consult the following table to find the description that best matches the problem experienced, then consult the section referenced to perform a more detailed analysis of the problem.

Symptom

Relay fails to power up

Relay powers up - but indicates error and halts during power-up sequence

Relay Powers up but Out of Service LED is illuminated

Error during normal operation

Mal-operation of the relay during testing

Refer To

Power-Up Errors section

Error Message/Code On Power-Up section

Out of Service LED illuminated on

Power Up section

Error Code During Operation section

Mal-Operation of the Relay during

Testing section

Table 1 - Problem identification

Page (TS) 14-6 Px4x/EN TS/If7

Power Up Errors

3

(TS) 14 Troubleshooting

POWER UP ERRORS

If the relay does not appear to power up then the following procedure can be used to determine whether the fault is in the external wiring, auxiliary fuse, power supply module of the relay or the relay front panel.

1

Test Check Action

Measure auxiliary voltage on terminals

1 and 2; verify voltage level and polarity against rating the label on front.

Terminal 1 is –dc, 2 is +dc

If auxiliary voltage is present and correct, then proceed to test 2. Otherwise the wiring/fuses in auxiliary supply should be checked.

2

3

Do LEDs/and LCD backlight illuminate on power-up, also check the N/O watchdog contact for closing.

Check Field voltage output

(nominally 48V DC)

Table 2 - Failure of relay to power up

If they illuminate or the contact closes and no error code is displayed then error is probably in the main processor board (front panel). If they do not illuminate and the contact does not close then proceed to test 3.

If field voltage is not present then the fault is probably in the relay power supply module.

Px4x/EN TS/If7 Page (TS) 14-7

(TS) 14 Troubleshooting Error Message/Code on Power-up

4 ERROR MESSAGE/CODE ON POWER-UP

During the power-up sequence of the relay self-testing is performed as indicated by the messages displayed on the LCD. If an error is detected by the relay during these selftests, an error message will be displayed and the power-up sequence will be halted. If the error occurs when the relay application software is executing, a maintenance record will be created and the relay will reboot.

1

Test

2

Check

Is an error message or code permanently displayed during power up?

Record displayed error, then remove and reapply relay auxiliary supply.

Action

If relay locks up and displays an error code permanently then proceed to test 2.

If the relay prompts for input by the user proceed to test 4.

If the relay re-boots automatically then proceed to test 5.

Record whether the same error code is displayed when the relay is rebooted. If no error code is displayed then contact the local service center stating the error code and relay information. If the same code is displayed proceed to test 3.

These messages indicate that a problem has been detected on the main processor board of the relay (located in the front panel).

3 Error code Identification

Following text messages (in English) will be displayed if a fundamental problem is detected preventing the system from booting:

Bus Failaddress lines

SRAM Fail

FLASH Fail

FLASH Fail

Code Verify data lines format error checksum

Fail

These hex error codes relate to errors detected in specific relay modules:

0c140005/0c0d0000

0c140006/0c0e0000

Last 4 digits provide details on the actual error.

4

5

Relay displays message for corrupt settings and prompts for restoration of defaults to the affected settings.

Relay resets on completion of power up - record error code displayed

Table 3 - Power-up self-test error

The power up tests have detected corrupted relay settings, it is possible to restore defaults to allow the power-up to be completed. It will then be necessary to re-apply the application-specific settings.

Error 0x0E080000, Programmable Scheme Logic (PSL) error due to excessive execution time. Restore default settings by performing a power up with  and  keys depressed, confirm restoration of defaults at prompt using (  ) key. If relay powers up successfully, check PSL for feedback paths.

Other error codes will relate to software errors on the main processor board, contact Schneider Electric.

Input Module (inc. Opto-isolated inputs)

Output Relay Cards

Other error codes relate to problems within the main processor board hardware or software. It will be necessary to contact Schneider

Electric with details of the problem for a full analysis.

Page (TS) 14-8 Px4x/EN TS/If7

Out of Service LED illuminated on Power Up

5

(TS) 14 Troubleshooting

OUT OF SERVICE LED ILLUMINATED ON POWER UP

1

Test

2

Check

Using the relay menu confirm whether the Commission Test/Test Mode setting is Contact Blocked. Otherwise proceed to test 2.

Select and view the last maintenance record from the menu (in the View

Records).

Action

If the setting is Contact Blocked then disable the test mode and, verify that the Out of Service LED is extinguished.

Check for H/W Verify Fail this indicates a discrepancy between the relay model number and the hardware; examine the “ Maint. Data ”, this indicates the causes of the failure using bit fields:

Bit Meaning

0

1

2

3

4

5

6

7

8

The application type field in the model number does not match the software ID

The application field in the model number does not match the software ID

The variant 1 field in the model number does not match the software ID

The variant 2 field in the model number does not match the software ID

The protocol field in the model number does not match the software ID

The language field in the model number does not match the software ID

The VT type field in the model number is incorrect (110V VTs fitted)

The VT type field in the model number is incorrect (440V VTs fitted)

The VT type field in the model number is incorrect (no VTs fitted)

Table 4 - Out of service LED illuminated

Px4x/EN TS/If7 Page (TS) 14-9

(TS) 14 Troubleshooting

6

Error Code During Operation

ERROR CODE DURING OPERATION

The relay performs continuous self-checking, if an error is detected then an error message will be displayed, a maintenance record will be logged and the relay will reset

(after a 1.6 second delay). A permanent problem (for example due to a hardware fault) will generally be detected on the power up sequence, following which the relay will display an error code and halt. If the problem was transient in nature then the relay should reboot correctly and continue in operation. The nature of the detected fault can be determined by examination of the maintenance record logged.

There are also two cases where a maintenance record will be logged due to a detected error where the relay will not reset. These are detection of a failure of either the field voltage or the lithium battery, in these cases the failure is indicated by an alarm message, however the relay will continue to operate.

If the field voltage is detected to have failed (the voltage level has dropped below threshold), then a scheme logic signal is also set. This allows the scheme logic to be adapted in the case of this failure (for example if a blocking scheme is being used).

In the case of a battery failure it is possible to prevent the relay from issuing an alarm using the setting under the Date and Time section of the menu. This setting ‘ Battery

Alarm ’ can be set to ' Disabled ' to allow the relay to be used without a battery, without an alarm message being displayed.

In the case of an RTD board failure, an alarm "RTD board fail" message is displayed, the

RTD protection is disabled, but the operation of the rest of the relay functionality is unaffected.

Page (TS) 14-10 Px4x/EN TS/If7

Mal-Operation of the Relay during Testing

7

7.1

7.2

(TS) 14 Troubleshooting

MAL-OPERATION OF THE RELAY DURING TESTING

Failure of Output Contacts

An apparent failure of the relay output contacts may be caused by the relay configuration; the following tests should be performed to identify the real cause of the failure.

1

Test

2

3

4

Note The relay self-tests verify that the coil of the contact has been energized, an error will be displayed if there is a fault in the output relay board.

Check

If the relevant bits of the contact status are operated, proceed to test 4, if not proceed to test 3.

Action

Is the Out of Service LED illuminated? Illumination of this LED may indicate that the relay is Contact Blocked or that the protection has been disabled due to a hardware verify error

(see the Out of service LED illuminated table..

Examine the Contact status in the

Commissioning section of the menu.

Verify by examination of the fault record or by using the test port whether the protection element is operating correctly.

If the protection element does not operate verify whether the test is being correctly applied.

If the protection element does operate, it will be necessary to check the PSL to ensure that the mapping of the protection element to the contacts is correct.

Using the Commissioning/Test mode function apply a test pattern to the relevant relay output contacts and verify whether they operate (note the correct external connection diagram should be consulted). A continuity tester can be used at the rear of the relay for this purpose.

If the output relay does operate, the problem must be in the external wiring to the relay. If the output relay does not operate this could indicate a failure of the output relay contacts (note that the self-tests verify that the relay coil is being energized). Ensure that the closed resistance is not too high for the continuity tester to detect.

Table 5 - Failure of output contacts

Failure of Opto-Isolated Inputs

The opto-isolated inputs are mapped onto the relay internal signals using the PSL. If an input does not appear to be recognized by the relay scheme logic the Commission

Tests/Opto Status menu option can be used to verify whether the problem is in the optoisolated input itself or the mapping of its signal to the scheme logic functions. If the optoisolated input does appear to be read correctly then it will be necessary to examine its mapping within the PSL.

Ensure the voltage rating for the opto inputs has been configured correctly with applied voltage. If the opto-isolated input state is not being correctly read by the relay the applied signal should be tested. Verify the connections to the opto-isolated input using the correct wiring diagram and the correct nominal voltage settings in any standard or custom menu settings. Next, using a voltmeter verify that 80% opto setting voltage is present on the terminals of the opto-isolated input in the energized state. If the signal is being correctly applied to the relay then the failure may be on the input card itself. Depending on which opto-isolated input has failed this may require replacement of either the complete analog input module (the board within this module cannot be individually replaced without re-calibration of the relay) or a separate opto board.

Px4x/EN TS/If7 Page (TS) 14-11

(TS) 14 Troubleshooting

7.3

7.4

7.4.1

7.4.2

Mal-Operation of the Relay during Testing

Incorrect Analog Signals

The measurements may be configured in primary or secondary to assist. If it is suspected that the analog quantities being measured by the relay are not correct then the measurement function of the relay can be used to verify the nature of the problem. The measured values displayed by the relay should be compared with the actual magnitudes at the relay terminals. Verify that the correct terminals are being used (in particular the dual rated CT inputs) and that the CT and VT ratios set on the relay are correct. The correct 120 degree displacement of the phase measurements should be used to confirm that the inputs have been correctly connected.

PSL Editor Troubleshooting

A failure to open a connection could be because of one or more of the following:

• The relay address is not valid (note: this address is always 1 for the front port).

Password is not valid

Communication Set-up - COM port, Baud rate, or Framing - is not correct

Transaction values are not suitable for the relay and/or the type of connection

Modem configuration is not valid. Changes may be necessary when using a modem

The connection cable is not wired correctly or broken. See MiCOM S1 connection configurations

The option switches on any KITZ101/102 that is in use may be incorrectly set

Diagram Reconstruction after Recover from Relay

Although the extraction of a scheme from a relay is supported, the facility is provided as a way of recovering a scheme in the event that the original file is unobtainable.

The recovered scheme will be logically correct, but much of the original graphical information is lost. Many signals will be drawn in a vertical line down the left side of the canvas. Links are drawn orthogonally using the shortest path from A to B.

Any annotation added to the original diagram (titles, notes, etc.) are lost.

Sometimes a gate type may not be what was expected, e.g. a 1-input AND gate in the original scheme will appear as an OR gate when uploaded. Programmable gates with an inputs-to-trigger value of 1 will also appear as OR gates.

PSL Version Check

The PSL is saved with a version reference, time stamp and CRC check. This gives a visual check whether the default PSL is in place or whether a new application has been downloaded.

Page (TS) 14-12 Px4x/EN TS/If7

Repair and Modification Procedure

8

(TS) 14 Troubleshooting

REPAIR AND MODIFICATION PROCEDURE

Please follow these steps to return an Automation product to us:

1. Get the Repair and Modification Authorization Form (RMA).

A copy of the RMA form is shown at the end of this section.

2. Fill in the RMA form.

Fill in only the white part of the form.

Please ensure that all fields marked (M) are completed such as:

Equipment model

Model No. and Serial No.

Description of failure or modification required (please be specific)

Value for customs (in case the product requires export)

Delivery and invoice addresses

Contact details

3. Receive from local service contact, the information required to ship the product.

Your local service contact will provide you with all the information:

Pricing details

RMA No

Repair center address

If required, an acceptance of the quote must be delivered before going to next stage.

4. Send the product to the repair center.

Address the shipment to the repair center specified by your local contact.

Ensure all items are protected by appropriate packaging: anti-static bag and foam protection.

Ensure a copy of the import invoice is attached with the unit being returned.

Ensure a copy of the RMA form is attached with the unit being returned.

E-mail or fax a copy of the import invoice and airway bill document to your local contact.

Px4x/EN TS/If7 Page (TS) 14-13

(TS) 14 Troubleshooting

Notes:

Repair and Modification Procedure

Page (TS) 14-14 Px4x/EN TS/If7

REPAIR/MODIFICATION RETURN AUTHORIZATION FORM

FIELDS IN GREY TO BE FILLED IN BY SCHNEIDER ELECTRIC PERSONNEL ONLY

Reference RMA:

Repair Center Address (for shipping) Service Type

Retrofit

Warranty

Paid service

Under repair contract

Wrong supply

Schneider Electric - Local Contact Details

Name:

Telephone No.:

Fax No.:

E-mail:

IDENTIFICATION OF UNIT

Fields marked (M) are mandatory, delays in return will occur if not completed.

Model No./Part No.: (M)

Manufacturer Reference: (M)

Serial No.: (M)

Software Version:

Quantity:

FAULT INFORMATION

Site Name/Project:

Commissioning Date:

Under Warranty:

Additional Information:

Customer P.O (if paid):

Date:

LSC PO No.:

Yes No

Type of Failure

Hardware fail

Mechanical fail/visible defect

Software fail

Other:

Fault Reproducibility

Fault persists after removing, checking on test bench

Fault persists after re-energization

Intermittent fault

Found Defective

During FAT/inspection

On receipt

During installation/commissioning

During operation

Other:

Px4x/EN TS/If7 Page (TS) 14-15

Description of Failure Observed or Modification Required - Please be specific (M)

FOR REPAIRS ONLY

Would you like us to install an updated firmware version after repair?

CUSTOMS & INVOICING INFORMATION

Required to allow return of repaired items

Value for Customs (M)

Customer Invoice Address ((M) if paid)

Yes

Customer Return Delivery Address

(full street address) (M)

Part shipment accepted

OR Full shipment required

Yes

Yes

No

No

No

Contact Name:

Telephone No.:

Fax No.:

E-mail:

REPAIR TERMS

Contact Name:

Telephone No.:

Fax No.:

E-mail:

1. Please ensure that a copy of the import invoice is attached with the returned unit, together with the airway bill document. Please fax/e-mail a copy of the appropriate documentation (M) .

2. Please ensure the Purchase Order is released, for paid service, to allow the unit to be shipped.

3. Submission of equipment to Schneider Electric is deemed as authorization to repair and acceptance of quote.

4. Please ensure all items returned are marked as Returned for ‘Repair/Modification’ and protected by appropriate packaging (anti-static bag for each board and foam protection).

Page (TS) 14-16 Px4x/EN TS/If7

MiCOM P540d (P44y (P443/P446), P54x (P543/P544/P545/P546),

P445 & P841)

(SC) 15 SCADA Communications

SCADA COMMUNICATIONS

CHAPTER 15

P540d/EN SC/A01 Page (SC) 15-1

(SC) 15 SCADA Communications MiCOM P540d (P44y (P443/P446), P54x (P543/P544/P545/P546),

P445 & P841)

Date:

Products covered by this chapter:

Hardware Suffixes:

Software Versions:

Connection Diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

L (P445), M (P44y, P54x & P841)

P44y includes P443 and P446

P54x includes P543, P544, P545 and P546

P841 includes P841A and P841B

H4 (P44y, P546), J4 (P445), G4 (P841A) & H4 (P841B)

P44y includes P443 and P446

P54x includes P543, P544, P545 and P546

P841 includes P841A and P841B

For P54x, older software versions include:

45 P54x (P543, P544, P545 & P546 without Distance protection)

55

B0

P54x (P543, P544, P545 & P546 with Distance protection)

P54x (P543, P544, P545 & P546)

B0 P54x (P543, P544, P545 & P546)

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

10P445xx (xx = 01 to 04)

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

Page (SC) 15-2 P540d/EN SC/A01

Contents (SC) 15 SCADA Communications

CONTENTS

Page (SC) 15-

1 Introduction

2 Connections to the Communications Ports

2.1

2.2

2.3

2.3.1

2.3.1.1

2.3.1.2

2.3.2

2.4

2.4.1

2.4.2

2.4.3

2.4.3.1

2.4.4

Front Port

Rear Communication Port - EIA(RS)-485

Second Rear Communications Port (RP2) (Courier)

Courier Protocol

Event Extraction

Disturbance Record Extraction

Connection to the Second Rear Port

EIA(RS)-485 Bus

EIA(RS)-485 Bus Termination

EIA(RS)-485 Bus Connections & Topologies

EIA(RS)-485 Biasing

K-Bus Connections

Courier Communication

3 Configuring the Communications Ports

3.4

3.5

3.6

3.7

3.8

3.1

3.1.1

3.1.2

3.1.3

3.1.4

3.1.4.1

3.1.4.2

3.1.5

3.2

3.3

Introduction

Configuring the Front Courier Port

Configuring the First Rear Courier Port (RP1)

Configuring the IEC 60870-5 CS 103 Rear Port, RP1

Configuring the DNP3.0 Rear Port, RP1 and Optional DNP3.0 over Ethernet

Configuring the DNP3.0 Communication Rear Port, RP1

Configuring the (Optional) DNP3.0 over Ethernet Port

Configuring the Second Rear Communication Port SK4 (where fitted)

Configuring the Second Rear Courier Port, RP2 (Where Fitted)

Ethernet Communication (Option)

Fiber Optic Converter (option)

Second Rear Port K-Bus Application

Second Rear Port EIA(RS)-485 Example

Second Rear Port EIA(RS)-232 Example

SK5 Port Connection

4 Courier Interface

4.1

4.2

4.3

4.4

4.5

4.5.1

Courier Protocol

Front Courier Port

Supported Command Set

Courier Database

Setting Changes

Method 1

14

26

27

27

28

28

14

14

14

17

19

19

22

23

25

26

29

29

29

30

30

31

31

7

8

8

8

10

10

11

11

12

12

9

9

9

9

10

P540d/EN SC/A01 Page (SC) 15-3

(SC) 15 SCADA Communications

4.5.2

4.5.3

4.5.4

4.6

4.6.1

4.6.2

4.6.3

4.6.4

4.7

4.8

Method 2

Relay Settings

Setting Transfer Mode

Event Extraction

Automatic Event Extraction

Event Types

Event Format

Manual Event Record Extraction

Disturbance Record Extraction

Programmable Scheme Logic (PSL) Settings

5 IEC60870-5-103 Interface

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.10

5.11

Physical Connection and Link Layer

Initialization

Time Synchronization

Spontaneous Events

General Interrogation (GI)

Cyclic Measurements

Commands

Test Mode

Disturbance Records

Blocking of Monitor Direction

Setting Changes through IEC103 Protocol

6 DNP3.0 Interface

6.1

6.2

6.3

6.4

6.5

6.6

6.7

6.8

DNP3.0 Protocol

DNP3.0 Menu Setting

Object 1 Binary Inputs

Object 10 Binary Outputs

Object 20 Binary Counters

Object 30 Analog Input

Object 40 Analog Output

DNP3.0 Configuration using MiCOM S1 Studio

7 IEC 61850 Ethernet Interface

7.1

7.2

7.2.1

7.2.2

Introduction

What is IEC 61850?

Interoperability

Data Model

7.3

7.3.1

7.3.2

7.3.2.1

7.3.2.2

7.4

IEC 61850 in MiCOM Relays

Capability

IEC 61850 Configuration

Configuration Banks

Network Connectivity

Data Model of MiCOM Relays

Page (SC) 15-4

Contents

35

36

36

36

36

35

35

35

36

36

37

37

38

40

41

41

42

38

38

39

39

43

43

43

43

44

45

45

47

48

48

48

31

31

32

32

32

32

33

33

33

34

P540d/EN SC/A01

Figures (SC) 15 SCADA Communications

7.5

7.6

7.6.1

7.6.2

7.6.3

7.7

7.7.1

7.7.2

7.7.3

Communication Services of MiCOM Relays

Peer-to-Peer (GSE) Communications

Scope

Simulation GOOSE Configuration

High Performance GOOSE

Ethernet Functionality

Ethernet Disconnection

Redundant Ethernet Communication Ports (optional)

Loss of Power

FIGURES

Figure 1 - EIA(RS)-485 bus connection arrangements

Figure 2 – K-bus remote communication connection arrangements

Figure 3 - Second rear port K-Bus application

Figure 4 - Second rear port EIA(RS)-485 example

Figure 5 - Second rear port EIA(RS)-232 example

Figure 6 - Behavior when control input is set to pulsed or latched

Figure 7 - Data model layers in IEC 61850

TABLES

Page (SC) 15-

11

13

27

27

28

40

44

Table 1 - Port configurations and communication protocols

Table 2 - Pin connections over EIA(RS)-232 and EIS(RS)-485

Table 3 - DNP3.0 menu in the Communications column

Table 4 - DNP3.0 over Ethernet option settings

Page (SC) 15-

9

10

38

39

49

49

49

50

50

51

51

51

51

P540d/EN SC/A01 Page (SC) 15-5

(SC) 15 SCADA Communications

Notes:

Tables

Page (SC) 15-6 P540d/EN SC/A01

Introduction

1

(SC) 15 SCADA Communications

INTRODUCTION

This chapter describes the remote interfaces of the MiCOM relay in enough detail to allow integration in a substation communication network. The relay supports a choice of one of a number of protocols through the rear 2-wire EIA(RS)485 communication interface, selected using the model number when ordering. This is in addition to the front serial interface and second rear communications port, which supports the Courier protocol only.

According to the protocol and hardware options selected, the interface may alternatively be presented over an optical fiber interface, or via an Ethernet connection.

The supported protocols include:

Courier

IEC-60870-5-103

DNP3.0

The protocol implemented in the relay can be checked in the relay menu in the

‘COMMUNICATIONS’ column. Using the keypad and LCD, firstly check that the ‘Comms.

Settings’ cell in the ‘CONFIGURATION’ column is set to ‘Visible’, then move to the

‘COMMUNICATIONS’ column. The first cell down the column shows the communication protocol being used by the rear port.

Note The IEC 60870-5-103 standard is sometimes abbreviated to IEC 870-5-103,

IEC 60870, or even -103. It may be described as the ‘VDEW’ standard.

The Courier rear port interface may present as EIA(RS)485, or, using the same connection, it may present a K-Bus standard compliant interface.

The rear port (RP1), is complemented by the front serial interface, and an optional second rear communications interface, RP2, both of which have fixed protocol support for

Courier only.

The implementation of both Courier and IEC 60870-5-103 on RP1 can also, optionally, be presented over fiber as well as EIA(RS)485.

The DNP3.0 implementation is available via EIA(RS)485 port or over Ethernet port.

The rear EIA(RS)-485 interface is isolated and is suitable for permanent connection whichever protocol is selected. The advantage of this type of connection is that up to 32 relays can be daisy-chained together using a simple twisted-pair electrical connection.

Note The second rear Courier port and the fiber optic interface are mutually exclusive as they occupy the same physical slot.

An outline of the connection details for each of the communications ports is provided here. The ports are configurable using settings - a description of the configuration follows the connections part. Details of the protocol characteristics are also shown.

For each of the protocol options, the supported functions and commands are listed with the database definition. The operation of standard procedures such as extraction of event, fault and disturbance records, or setting changes is also described.

The descriptions in this chapter do not aim to fully describe the protocol in detail. Refer to the relevant documentation protocol for this information. This chapter describes the specific implementation of the protocol in the relay.

P540d/EN SC/A01 Page (SC) 15-7

(SC) 15 SCADA Communications

2

2.1

2.2

Connections to the Communications Ports

CONNECTIONS TO THE COMMUNICATIONS PORTS

Front Port

The front communications port is not intended for permanent connection. The front communications port supports the Courier protocol and is implemented on an

EIA(RS)232 connection. A 9-pin connector type, as described in the ‘Getting Started’

(GS) chapter of this manual, is used, and the cabling requirements are detailed in the

‘Connection Diagrams’ (CD) chapter of this manual.

Rear Communication Port - EIA(RS)-485

The rear EIA(RS)-485 communication port is provided by a 3-terminal screw connector on the back of the relay. See the Connection Diagrams chapter for details of the connection terminals. The rear port provides K-Bus/EIA(RS)-485 serial data communication and is intended for use with a permanently-wired connection to a remote control center. Of the three connections, two are for the signal connection, and the other is for the earth shield of the cable.

If the IEC60870-5-103, or the DNP3.0 protocols are specified as the interface for the rear port, then connections conform entirely to the EIA(RS)485 standards outline below. If, however, the Courier protocol is specified as the rear port protocol, then the interface can be set either to EIA(RS)485 or K-Bus. The configuration of the port as either EIA(RS)485 or K-Bus is described later together with K-Bus details, but as connection to the port is affected by this choice, the following points should be noted:

Connection to an EIA(RS)485 device is polarity sensitive, whereas K-Bus connection is not.

Whilst connection to between an EIA(RS)485 port and an EIA(RS)232 port on, say, a PC might be implemented using a general purpose EIA(RS)485 to EIA(RS)232 converter, connection between an EIA(RS)232 port and K-Bus requires a KITZ101,

KITZ102 or KITZ201

Unless the K-Bus option is chosen for the rear port, correct polarity must be observed for the signal connections. In all other respects (bus wiring, topology, connection, biasing and termination) K-Bus can be considered the same as EIA(RS)485.

All rear port communication interfaces are fully isolated and suitable for permanent connection. EIA(RS)485 (and K-Bus) connections allow up to 32 devices to be ‘daisychained’ together using a simple twisted pair electrical connection.

The protocol provided by the relay is indicated in the relay menu in the Communications column. Using the keypad and LCD, first check that the Comms. settings cell in the

Configuration column is set to Visible , then move to the Communications column. The first cell down the column shows the communication protocol that is being used by the rear port.

Note Unless the K-Bus option is chosen for the rear port, correct polarity must be observed for the signal connections. In all other respects (bus wiring, topology, connection, biasing and termination) K-Bus can be considered the same as EIA(RS)485.

Page (SC) 15-8 P540d/EN SC/A01

Connections to the Communications Ports

2.3

2.3.1

2.3.1.1

2.3.1.2

(SC) 15 SCADA Communications

Second Rear Communications Port (RP2) (Courier)

Relays with Courier, MODBUS, IEC60870-5-103 or DNP3.0 protocol on the first rear communications port have the option of a second rear port, running the Courier language.

The second port is intended typically for dial-up modem access by protection engineers or operators, when the main port is reserved for SCADA communication traffic.

Communication is through one of three physical links: K-Bus, EIA(RS)-485 or EIA(RS)-

232. The port supports full local or remote protection and control access using MiCOM S1

Studio.

When changing the port configuration between K-Bus, EIA(RS)-485 and EIA(RS)-

232, reboot the relay to update the hardware configuration of the second rear port.

The EIA(RS)-485 and EIA(RS)-232 protocols can be configured to operate with a modem, using an IEC60870 10-bit frame.

If both rear communications ports are connected to the same bus, make sure their address settings are not the same to avoid message conflicts.

K-Bus

Port Configuration

EIA(RS)-232

EIA(RS)-485

Valid Communication Protocol

K-Bus

IEC60870 FT1.2, 11-bit frame

IEC60870, 10-bit frame

IEC60870 FT1.2, 11-bit frame

IEC60870, 10-bit frame

Table 1 - Port configurations and communication protocols

Courier Protocol

The second rear communications port is functionally the same as described in the previous section for a Courier rear communications port, with the following exceptions:

Event Extraction

Automatic event extraction is not supported when the first rear port protocol is Courier,

MODBUS or CS103. It is supported when the first rear port protocol is DNP3.0.

Disturbance Record Extraction

Automatic disturbance record extraction is not supported when the first rear port protocol is Courier, MODBUS or CS103. It is supported when the first rear port protocol is

DNP3.0.

P540d/EN SC/A01 Page (SC) 15-9

(SC) 15 SCADA Communications Connections to the Communications Ports

2.3.2 Connection to the Second Rear Port

The second rear Courier port connects using the 9-way female D-type connector (SK4) in the middle of the card end plate (between the IRIG-B connector and lower D-type).

The connection complies with EIA(RS)-574.

For IEC60870-5-2 over EIA(RS)-232

Pin

1

2

Connection

No Connection

RxD

For K-bus or IEC60870-5-2 over EIA(RS)-485

Pin* Connection

3

4

5

6

7

TxD

DTR#

Ground

No Connection

RTS#

4

7

EIA(RS)-485 - 1 (+ ve)

EIA(RS)-485 - 2 (- ve)

8 CTS#

9 No Connection

#

- These pins are control lines for use with a modem.

* - All other pins unconnected.

Notes Connector pins 4 and 7 are used by both the EIA(RS)-232and EIA(RS)-

485 physical layers, but for different purposes. Therefore, the cables should be removed during configuration switches.

When using the EIA(RS)-485 protocol, an EIA(RS)-485 to EIA(RS)-232 converter is needed to connect the relay to a modem or PC running

MiCOM S1 Studio. A Schneider Electric CK222 is recommended.

EIA(RS)-485 is polarity sensitive, with pin 4 positive (+) and pin 7 negative (-).

The K-Bus protocol can be connected to a PC using a KITZ101 or 102.

Table 2 - Pin connections over EIA(RS)-232 and EIS(RS)-485

2.4

2.4.1

EIA(RS)-485 Bus

The EIA(RS)-485 two-wire connection provides a half-duplex fully isolated serial connection to the product. The connection is polarized and while the product’s connection diagrams show the polarization of the connection terminals, there is no agreed definition of which terminal is which. If the master is unable to communicate with the product and the communication parameters match, make sure the two-wire connection is not reversed.

EIA(RS)-485 provides the capability to connect multiple devices to the same two-wire bus. MODBUS is a master-slave protocol, so one device is the master, and the remaining devices are slaves. It is not possible to connect two masters to the same bus, unless they negotiate bus access.

EIA(RS)-485 Bus Termination

The EIA(RS)-485 bus must have 120

Ω (Ohm) ½ Watt terminating resistors fitted at either end across the signal wires, see the EIA(RS)-485 bus connection arrangements diagram below. Some devices may be able to provide the bus terminating resistors by different connection or configuration arrangements, in which case separate external components are not needed. However, this product does not provide such a facility, so if it is located at the bus terminus, an external termination resistor is needed.

Page (SC) 15-10 P540d/EN SC/A01

Connections to the Communications Ports

2.4.2

2.4.3

(SC) 15 SCADA Communications

EIA(RS)-485 Bus Connections & Topologies

The EIA(RS)-485 standard requires each device to be directly connected to the physical cable that is the communications bus. Stubs and tees are expressly forbidden, as are star topologies. Loop bus topologies are not part of the EIA(RS)-485 standard and are forbidden by it.

Two-core screened cable is recommended. The specification of the cable depends on the application, although a multi-strand 0.5 mm

2

per core is normally adequate. Total cable length must not exceed 1000 m. The screen must be continuous and connected at one end, normally at the master connection point. It is important to avoid circulating currents, especially when the cable runs between buildings, for both safety and noise reasons.

This product does not provide a signal ground connection. If the bus cable has a signal ground connection, it must be ignored. However, the signal ground must have continuity for the benefit of other devices connected to the bus. For both safety and noise reasons, the signal ground must never be connected to the cable’s screen or to the product’s chassis.

EIA(RS)-485 Biasing

It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal level has an indeterminate state because the bus is not being actively driven.

This can occur when all the slaves are in receive mode and the master is slow to switch from receive mode to transmit mode. This may be because the master purposefully waits in receive mode, or even in a high impedance state, until it has something to transmit.

Jabber causes the receiving device(s) to miss the first bits of the first character in the packet, which results in the slave rejecting the message and consequentially not responding. Symptoms of this are poor response times (due to retries), increasing message error counters, erratic communications, and even a complete failure to communicate.

Biasing requires that the signal lines are weakly pulled to a defined voltage level of about

1 V. There should only be one bias point on the bus, which is best situated at the master connection point. The DC source used for the bias must be clean, otherwise noise is injected. Some devices may (optionally) be able to provide the bus bias, in which case external components are not required.

6-9V DC

180 Ohm Bias

Master 120 Ohm

180 Ohm Bias

0V

Slave

Figure 1 - EIA(RS)-485 bus connection arrangements

Slave

120 Ohm

Slave

P1622ENa

P540d/EN SC/A01 Page (SC) 15-11

(SC) 15 SCADA Communications

2.4.3.1

2.4.4

Connections to the Communications Ports

It is possible to use the product’s field voltage output (48 V DC) to bias the bus using values of 2.2 k

Ω (½W) as bias resistors instead of the 180 Ω resistors shown in the

EIA(RS)-485 bus connection arrangements diagram. Note these warnings apply:

Warnings It is extremely important that the 120

Ω termination resistors are fitted. Otherwise the bias voltage may be excessive and may damage the devices connected to the bus.

As the field voltage is much higher than that required,

Schneider Electric cannot assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage.

Ensure the field voltage is not used for other purposes, such as powering logic inputs, because noise may be passed to the communication network.

K-Bus Connections

K-Bus is a robust signaling method based on EIA(RS)485 voltage levels. K-Bus incorporates message framing and uses a 64 kbits/s synchronous HDLC protocol with

FM0 modulation to increase speed and security. For this reason is not possible to use a standard EIA(RS)232 to EIA(RS)485 converter to connect with K-Bus devices. Nor is it possible to connect K-Bus to an EIA(RS)485 computer port. A KITZ protocol converter needs to be employed for this purpose.

Please consult Schneider Electric for information regarding the specification and supply of KITZ devices.

As K-Bus is implemented on an EIA(RS)485 layer, the connection details are very similar to those described in the previous sections. A typical connection arrangement, incorporating a KITZ, is shown in the K-bus remote communication connection arrangements diagram below. As with EIA(RS)485, each spur of the K-Bus twisted pair wiring can be up to 1000 m in length and have up to 32 relays connected to it.

Courier Communication

Courier is the communication language developed to allow remote interrogation of its range of protection relays. Courier uses a master and slave. EIA(RS)-232 on the front panel allows only one slave but EIA(RS)-485 on the back panel allows up to 32 daisychained slaves. Each slave unit has a database of information and responds with information from its database when requested by the master unit.

The relay is a slave unit that is designed to be used with a Courier master unit such as

MiCOM S1 Studio, MiCOM S10, PAS&T or a SCADA system. MiCOM S1 Studio is compatible is specifically designed for setting changes with the relay.

To use the rear port to communicate with a PC-based master station using Courier, a

KITZ K-Bus to EIA(RS)-232 protocol converter is needed. This unit (and information on how to use it) is available from Schneider Electric. A typical connection arrangement is shown in the K-bus remote communication connection arrangements diagram below. For more detailed information on other possible connection arrangements, refer to the manual for the Courier master station software and the manual for the KITZ protocol converter. Each spur of the K-Bus twisted pair wiring can be up to 1000 m in length and have up to 32 relays connected to it.

Page (SC) 15-12 P540d/EN SC/A01

Connections to the Communications Ports

Twisted pair ‘K-Bus’ communications link

(SC) 15 SCADA Communications

Micom relay Micom relay Micom relay

PC

Serial

Port

RS232

Public

Switched

Telephone

Network

(PSTN)

Modem

PC

Courier master station e.g. substation control room

PC

Remote Courier master station

e.g. area control centre

Modem

Figure 2 – K-bus remote communication connection arrangements

K-Bus

KITS protocol converter

P0109ENe

P540d/EN SC/A01 Page (SC) 15-13

(SC) 15 SCADA Communications

3

3.1

3.1.1

3.1.2

Configuring the Communications Ports

CONFIGURING THE COMMUNICATIONS PORTS

Introduction

Courier works on a master/slave basis where the slave units contain information in the form of a database, and respond with information from the database when it is requested by a master unit.

The relay is a slave unit that is designed to be used with a Courier master unit such as

MiCOM S1 Studio, PAS&T or a SCADA system.

Configuring the Front Courier Port

The front EIA(RS)232 9-pin port supports the Courier protocol for one-to-one communication. It is designed for use during installation, commissioning and maintenance and is not suitable for permanent connection. Since this interface is not intended to link the relay to a substation communication system, not all of the features of the Courier interface are supported; the port is not configurable and the following parameters apply:

Physical presentation

Frame format

Address

Baud rate

EIA(RS)232 via 9-pin connector

IEC60870-5 FT1.2 = 11-bit (8 Even 1)

1

19200 bps

Note As part of the limited implementation of Courier on the front port, neither automatic extraction of event and disturbance records, nor busy response are supported.)

Configuring the First Rear Courier Port (RP1)

Once the physical connection is made to the relay, configure the relay’s communication settings using the keypad and LCD user interface.

1. In the relay menu, select the Configuration column, then check that the Comms. settings cell is set to Visible .

2. Select the Communications column. Only two settings apply to the rear port using

Courier, the relay’s address and the inactivity timer. Synchronous communication uses a fixed baud rate of 64 kbits/s.

3. Move down the Communications column from the column heading to the first cell down. This shows the communication protocol.

RP1 Protocol

Courier

4. The next cell down the column controls the address of the relay. As up to 32 relays can be connected to one K-Bus spur, each relay must have a unique address so messages from the master control station are accepted by one relay only. Courier uses an integer (from 0 to 254) for the relay address that is set with this cell.

Important: no two relays should have the same Courier address. The master station uses the Courier address to communicate with the relay.

Page (SC) 15-14 P540d/EN SC/A01

Configuring the Communications Ports (SC) 15 SCADA Communications

RP1 Address

1

5. The next cell down controls the inactivity timer.

RP1 Inactiv timer

10.00 mins.

The inactivity timer controls how long the relay waits without receiving any messages on the rear port before it reverts to its default state, including revoking any password access that was enabled. For the rear port this can be set between 1 and 30 minutes.

Note Protection and disturbance recorder settings that are modified using an online editor such as PAS&T must be confirmed with a write to the ‘Save changes’ cell of the ‘Configuration’ column. Off-line editors such as MiCOM

S1 Studio do not require this action for the setting changes to take effect.

The next cell down controls the physical media used for the communication.

RP1 Physical link

Copper

The default setting is to select the electrical (copper) connection. If the optional fiber optic interface is fitted to the relay, then this setting can be changed to ‘ Fiber optic ’. This cell is invisible if a second rear communications port or an Ethernet card is fitted, as they are mutually exclusive and occupy the same physical location.

6. If the Physical link selection is copper, the next cell down becomes visible to further define the configuration:

RP1 Port Config

KBus

The setting choice is between K-Bus and EIA(RS)485. Selecting K-Bus allows connection with K-series devices, but means that a KITZ converter must be used to make a connection. If the EIA(RS)485 selection is made, direct connections can be made to proprietary equipment such as MODEMs. If the EIA(RS)485 selection is made, then two further cells become visible to control the frame format and the communication speed:

7. The frame format is selected in the RP1 Comms mode setting:

RP1 Comms Mode

IEC60870 FT1.2

The standard default is the IEC 60870-FT1.2. This is an 11-bit framing.

Alternatively, a 10-bit framing may be selected for use with MODEMs that do not support 11-bit framing.

8. The final RP1 cell controls the communication speed or baud rate:

P540d/EN SC/A01 Page (SC) 15-15

(SC) 15 SCADA Communications Configuring the Communications Ports

RP1 Baud Rate

19200 bits/s

Courier communications is asynchronous and three baud rate selections are available to allow the relay communication rate to be matched to that of the connected equipment. Three baud rates are supported by the relay, ‘9600 bits/s’,

‘19200 bits/s’ and ‘38400 bits/s’.

Important If you modify protection and disturbance recorder settings using an on-line editor such as PAS&T, you must confirm them.

To do this, from the Configuration column select the Save changes cell. Off-line editors such as MiCOM S1 Studio do not need this action for the setting changes to take effect.

Page (SC) 15-16 P540d/EN SC/A01

Configuring the Communications Ports

3.1.3

(SC) 15 SCADA Communications

Configuring the IEC 60870-5 CS 103 Rear Port, RP1

The IEC specification IEC 60870-5-103: Telecontrol Equipment and Systems, Part 5:

Transmission Protocols Section 103 defines the use of standards IEC 60870-5-1 to

IEC 60870-5-5 to perform communication with protection equipment. The standard configuration for the IEC 60870-5-103 protocol is to use a twisted pair connection over distances up to 1000 m. As an option for IEC 60870-5-103, the rear port can be specified to use a fiber optic connection for direct connection to a master station. The relay operates as a slave in the system, responding to commands from a master station. The method of communication uses standardized messages which are based on the VDEW communication protocol.

To use the rear port with IEC 60870-5-103 communication, configure the relay’s communication settings using the keypad and LCD user interface.

1. In the relay menu, select the Configuration column, then check that the Comms. settings cell is set to Visible .

2. Select the Communications column. Four settings apply to the rear port using IEC

60870-5-103 that are described below.

Move down the ‘COMMUNICATIONS’ column from the column heading to the first cell to confirm the communication protocol:

RP1 Protocol

IEC60870-5-103

3. The next cell sets the address of the relay on the IEC 60870-5-103 network:

RP1 Address

162

Up to 32 relays can be connected to one IEC 60870-5-103 spur, and therefore it is necessary for each relay to have a unique address so that messages from the master control station are accepted by one relay only. IEC 60870-5-103 uses an integer number between 0 and 254 for the relay address. It is important that no two relays have the same address. The address is then used by the master station to communicate with the relay.

4. The next cell down the column controls the baud rate to be used:

RP1 Baud rate

9600 bits/s

IEC 60870-5-103 communication is asynchronous. Two baud rates are supported by the relay, ‘9600 bits/s’ and ‘19200 bits/s’. It is important that whatever baud rate is selected on the relay is the same as that set on the IEC 60870-5-103 master station.

5. The next cell down controls the period between IEC 60870-5-103 measurements:

RP1 Meas period

30.00 s

P540d/EN SC/A01 Page (SC) 15-17

(SC) 15 SCADA Communications Configuring the Communications Ports

The IEC 60870-5-103 protocol allows the relay to supply measurements at regular intervals. The interval between measurements is controlled by this cell, and can be set between 1 and 60 seconds.

6. An optional fiber optic card is available in the relay to allow optical connection to the IEC 60870-5-103 communication to be made over an optical connection.

When fitted, it converts between EIA(RS)485 signals and fiber optic signals and the following cell is visible in the menu column:

RP1 Physical link

Copper

The default setting is to select the electrical (copper) connection. If the optional fiber optic interface is fitted to the relay, then this setting can be changed to ‘Fiber optic’. This cell is invisible if a second rear communications port or an Ethernet card is fitted, as they are mutually exclusive and occupy the same physical location.

7. The following cell which may be displayed, is not currently used but is available for future expansion.

RP1 InactivTimer

8. The next cell down can be used for monitor or command blocking:

RP1 CS103Blocking

There are three settings associated with this cell; these are:

Disabled

No blocking selected.

Monitor Blocking

When the monitor blocking DDB Signal is active high, either by energizing an opto input or control input, reading of the status information and disturbance records is not permitted. When in this mode the relay returns a “Termination of general interrogation” message to the master station.

Command Blocking

When the command blocking DDB signal is active high, either by energizing an opto input or control input, all remote commands are ignored, such as CB

Trip/Close or change setting group. When in this mode the relay returns a negative acknowledgement of command message to the master station.

Page (SC) 15-18 P540d/EN SC/A01

Configuring the Communications Ports (SC) 15 SCADA Communications

3.1.4

3.1.4.1

P540d/EN SC/A01

Configuring the DNP3.0 Rear Port, RP1 and Optional DNP3.0 over Ethernet

Important DNP3.0 is not available for all MiCOM products. DNP3.0 availability is shown in the Supported Protocols table.

The DNP3.0 protocol is defined and administered by the DNP User Group. Information about the user group, DNP3.0 in general and protocol specifications can be found on their website: www.dnp.org

The DNP3.0 implementation in the MiCOM P841 can be presented on an EIA(RS)485 physical layer, and/or on an Ethernet connection according to the options selected.

The relay operates as a DNP3.0 slave and supports subset Level 2 of the protocol plus some of the features from Level 3.

Configuring the DNP3.0 Communication Rear Port, RP1

Important DNP3.0 is not available for all MiCOM products. DNP3.0 availability is shown in the Supported Protocols table.

The DNP3.0 protocol is defined and administered by the DNP User Group. Information about the user group, DNP3.0 in general and protocol specifications can be found on their website: www.dnp.org

The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol plus some of the features from level 3. DNP3.0 communication is achieved using a twisted pair connection to the rear port and can be used over a distance of 1000 m with up to 32 slave devices.

1. To use the rear port with DNP3.0 communication, configure the relay’s communication settings using the keypad and LCD user interface.

2. In the relay menu, select the Configuration column, then check that the Comms. settings cell is set to Visible .

3. Four settings apply to the rear port using IEC 60870-5-103 that are described below.

4. Move down the ‘COMMUNICATIONS’ column from the column heading to the first cell that indicates the communications protocol:

RP1 Protocol

DNP3.0

5. The next cell sets the device address on the DNP3.0 network:

RP1 Address

232

Up to 32 devices can be connected to one DNP3.0 spur, and therefore it is necessary for each device to have a unique address so that messages from the master control station are accepted by only one device. DNP3.0 uses a decimal number between 1 and 65519 for the device address. It is important that no two devices have the same address. The address is then used by the DNP3.0 master station to communicate with the relay.

6. The next cell sets the baud rate to be used:

Page (SC) 15-19

(SC) 15 SCADA Communications Configuring the Communications Ports

RP1 Baud Rate

9600 bits/s

DNP3.0 communication is asynchronous. Six baud rates are supported by the relay ‘1200bits/s’, ‘2400bits/s’, ‘4800bits/s’, ’9600bits/s’, ‘19200bits/s’ and

‘38400bits/s’. It is important that whatever baud rate is selected on the relay is the same as that set on the DNP3.0 master station.

7. The next cell controls the parity format used in the data frames:

RP1 Parity

None

The parity can be set to be one of None , Odd or Even.

It is important that whatever parity format is selected on the relay is the same as that set on the

DNP3.0 master station.

An optional fiber optic card is available in the relay to allow optical connection to the IEC 60870-5-103 communication to be made over an optical connection.

When fitted, it converts between EIA(RS)485 signals and fiber optic signals and the following cell is visible in the menu column.

8. The next cell down the column controls the physical media used for the communication.

RP1 Physical link

Copper

The default setting is to select the electrical (copper) connection. If the optional fiber optic interface is fitted to the relay, then this setting can be changed to Fiber optic . This cell is invisible if a second rear communications port or an Ethernet card is fitted, as they are mutually exclusive and occupy the same physical location.

9. The next cell down the column sets the time synchronization request from the master by the relay:

RP1 Time Sync.

Enabled

The time synchronization can be set to either enabled or disabled. If enabled it allows the DNP3.0 master to synchronize the time.

10. Analogue values can be set to be reported in terms of primary, secondary or normalized (with respect to the CT/VT ratio setting) values:

Meas Scaling

Primary

11. A message gap setting is provided:

Message Gap

φ

Page (SC) 15-20 P540d/EN SC/A01

Configuring the Communications Ports (SC) 15 SCADA Communications

This allows a gap between message frames to be set to enable compatibility with different master stations.

The setting for enabling/disabling DNP3.0 time synchronization is described above.

When DNP3.0 time sync is enabled, the required rate of synchronization, known as the “need time”, needs to be set.

12. A setting allows different “need time” to be set with setting range from

1 - 30 minutes, step of 1 minute and default at 10 minutes:

DNP Need Time

10mins

The transmitted application fragment size can be set to ensure that a Master

Station cannot be held too long before a complete reply is received and allow it to move on to next IED in a token ring polling setup.

13. The maximum overall response message length can be configured:

DNP App Fragment

2048

A single fragment size is 249. Depending on circumstances, a user may set the fragment size as a multiple of 249 in order to optimize segment packing efficiency in fragments. However it can also be useful to allow "odd" sizes for users to choose under specific circumstances, such as if sending data inside SMS frames, through packet radios, etc. In such cases it can be useful to select the fragment size such that each packet occupies a single "transmission media frame".

In some cases, communication to the outstation is made over slow, packetswitched networks which can add seconds to the communication latency.

14. A setting is provided to allow the application layer timeout to be set:

DNP App Timeout

2s

15. Select Before Operate (SBO) timeouts can be set.

If the DNP3.0 “Select a trip command” causes the relay’s internal logic to block automatic tripping, then a corruption of the DNP3.0 “Operate” message could delay the trip. The delay of tripping can be set:

DNP SBO Timeout

10s

16. The DNP link timeout can be set:

DNP Link Timeout

10s

P540d/EN SC/A01 Page (SC) 15-21

(SC) 15 SCADA Communications

3.1.4.2

Configuring the Communications Ports

Configuring the (Optional) DNP3.0 over Ethernet Port

When DNP3.0 is provided over Ethernet, settings similar to those described above for the

EIA(RS)485 connection are provided for the following :-

Time Sync.

Meas. Scaling

DNP Need Time

DNP App Fragment

DNP App Timeout

DNP SBO Timeout

For these settings, please refer to the descriptions provided in the previous section.

As well as these, other settings as described below are provided to complete the configuration of the DNP3.0 over Ethernet configuration.

A timeout setting is added that defines how long the device will wait before an inactive tunnel connection to the master station is reset:

NIC Tunl Timeout

5mins

The NIC Link Report configures how a failed/disconnected network link (copper or fiber) is reported. Options are to report an alarm, an event, or nothing:

NIC Link Report

Alarm

The duration of time elapsed, after a failed network link is detected and before communication by the alternative media interface is attempted, can be set:

NIC Link Timeout

60s

The rate at which the SNTP server is polled can be set:

SNTP Poll Rate

64s

Page (SC) 15-22 P540d/EN SC/A01

Configuring the Communications Ports

3.1.5

(SC) 15 SCADA Communications

Configuring the Second Rear Communication Port SK4 (where fitted)

For relays with Courier, MODBUS, IEC60870-5-103 or DNP3.0 protocol on the first rear communications port there is the hardware option of a second rear communications port, which runs the Courier language. This can be used over one of three physical links: twisted pair K-Bus (non-polarity sensitive), twisted pair EIA(RS)-485 (connection polarity sensitive) or EIA(RS)-232.

The settings for this port are immediately below those for the first port. See the

Connection Diagrams chapter.

Once the physical connection is made to the relay, configure the relay’s communication settings using the keypad and LCD user interface.

1. In the relay menu, select the Configuration column, then check that the Comms. settings cell is set to Visible .

2. Select the Communications column. Only two settings apply to the rear port using

Courier, the relay’s address and the inactivity timer. Synchronous communication uses a fixed baud rate of 64 kbits/s.

3. Move down the Communications column from the column heading to the first cell down. This shows the communication protocol.

RP1 Protocol

Courier

4. The next cell down the column controls the address of the relay. As up to 32 relays can be connected to one K-Bus spur, each relay must have a unique address so messages from the master control station are accepted by one relay only. Courier uses an integer (from 0 to 254) for the relay address that is set with this cell.

Important: no two relays should have the same Courier address. The master station uses the Courier address to communicate with the relay.

RP1 Address

1

5. The next cell down controls the inactivity timer.

RP1 Inactiv timer

10.00 mins.

The inactivity timer controls how long the relay waits without receiving any messages on the rear port before it reverts to its default state, including revoking any password access that was enabled. For the rear port this can be set between 1 and 30 minutes.

Note Protection and disturbance recorder settings that are modified using an online editor such as PAS&T must be confirmed with a write to the ‘Save changes’ cell of the ‘Configuration’ column. Off-line editors such as MiCOM

S1 Studio do not require this action for the setting changes to take effect.

The next cell down controls the physical media used for the communication.

P540d/EN SC/A01 Page (SC) 15-23

(SC) 15 SCADA Communications Configuring the Communications Ports

RP1 Physical link

Copper

The default setting is to select the electrical (copper) connection. If the optional fiber optic interface is fitted to the relay, then this setting can be changed to ‘ Fiber optic ’. This cell is invisible if a second rear communications port or an Ethernet card is fitted, as they are mutually exclusive and occupy the same physical location.

6. If the Physical link selection is copper, the next cell down becomes visible to further define the configuration:

RP1 Port Config

KBus

The setting choice is between K-Bus and EIA(RS)485. Selecting K-Bus allows connection with K-series devices, but means that a KITZ converter must be used to make a connection. If the EIA(RS)485 selection is made, direct connections can be made to proprietary equipment such as MODEMs. If the EIA(RS)485 selection is made, then two further cells become visible to control the frame format and the communication speed:

7. The frame format is selected in the RP1 Comms mode setting:

RP1 Comms Mode

IEC60870 FT1.2

The standard default is the IEC 60870-FT1.2. This is an 11-bit framing.

Alternatively, a 10-bit framing may be selected for use with MODEMs that do not support 11-bit framing.

8. The final RP1 cell controls the communication speed or baud rate:

RP1 Baud Rate

19200 bits/s

Courier communications is asynchronous and three baud rate selections are available to allow the relay communication rate to be matched to that of the connected equipment. Three baud rates are supported by the relay, ‘9600 bits/s’,

‘19200 bits/s’ and ‘38400 bits/s’.

Important If you modify protection and disturbance recorder settings using an on-line editor such as PAS&T, you must confirm them.

To do this, from the Configuration column select the Save changes cell. Off-line editors such as MiCOM S1 Studio do not need this action for the setting changes to take effect.

Page (SC) 15-24 P540d/EN SC/A01

Configuring the Communications Ports

3.2

(SC) 15 SCADA Communications

Configuring the Second Rear Courier Port, RP2 (Where Fitted)

For relays having the second rear (Courier) communications port fitted, the settings are located immediately below the ones for the first port described above. The second rear communications port only supports the Courier protocol and the settings are similar to those for Courier RP1. The first cell displays:

1. Move down the settings until the following sub heading is displayed.

Rear Port 2 (RP2)

2. The next cell defines the protocol, which is fixed at Courier for RP2.

RP2 protocol

Courier

3. The following cell indicates the status of the hardware.

RP2 card status

EIA(RS)232 OK

4. The following cell allows for selection of the port configuration.

RP2 port config.

EIA(RS)232

5. The port can be configured for EIA(RS)232, EIA(RS)485 or K-Bus.

As in the case of the first rear Courier port, if K-Bus is not selected certain other cells to control the communication mode and speed become visible. If either

EIA(RS)232 or EIA(RS)485 is selected for the port configuration, the next cell is visible and selects the communication mode.

RP2 comms. Mode

IEC60870 FT1.2

6. The standard default is the IEC 60870 FT1.2 for normal operation with 11-bit modems. Alternatively, a 10-bit framing with no parity bit can be selected for special cases.

7. The next cell down sets the communications port address.

RP2 address

255

Since up to 32 devices can be connected to one K-bus spur, it is necessary for each device to have a unique address so that messages from the master control station are accepted by one device only. Courier uses an integer number between

0 and 254 for the device address that is set with this cell. It is important that no two devices have the same Courier address. The Courier address is then used by the master station to communicate with the device. The default value is 255 and must be changed to a value in the range 0 to 254 before use.

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(SC) 15 SCADA Communications

3.3

3.4

Configuring the Communications Ports

8. The following cell controls the inactivity timer.

RP2 InactivTimer

15 mins.

9. The inactivity timer controls how long the relay will wait without receiving any messages on the rear port before it reverts to its default state. This includes revoking any password access that was enabled. The inactivity timer can be set between 1 and 30 minutes.

10. If either EIA(RS)232 or EIA(RS)485 is selected for the port configuration, the following cell is visible and selects the communication speed (baud rate):

RP2 baud rate

19200

Courier communications is asynchronous and three selections are available to allow the relay communication rate to be matched to that of the connected equipment. The three baud rates supported by the relay are: ‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’.

Ethernet Communication (Option)

It is possible to communicate through an Ethernet network using a Schneider Electric

I4XS4UE (refer to Px4x/EN REB user guide for Redundant Ethernet board connections).

Connection for Ethernet communication can be made either by standard RJ45 electrical connections or by multi-mode optical fibers suitable for 1310 nm transmission and terminated with BFOC/2.5 (ST) connectors.

Fiber Optic Converter (option)

An optional fiber optic card is available in this product. This converts the EIA(RS)485 protocols into a fiber optic output. This communication card is available for use on

Courier, MODBUS (for products listed in the Supported Protocols table), IEC60870-5-103 and DNP3.0 it adds the following setting to the communication column.

This controls the physical media used for the communication:

Physical link

Copper

The default setting is to select the electrical EIA(RS)485 connection. If the optional fiber optic connectors are fitted to the relay, then this setting can be changed to ‘ Fiber optic ’.

This cell is also invisible if a second rear comms. port, or Ethernet card is fitted, as it is mutually exclusive with the fiber optic connectors, and occupies the same physical location.

Where this is used, connection should be made using either 50/125µm or 62.5/125µm multi-mode optical fibers terminated with BFOC/2.5 (ST) connectors.

Page (SC) 15-26 P540d/EN SC/A01

Configuring the Communications Ports

3.5 Second Rear Port K-Bus Application

(SC) 15 SCADA Communications

Figure 3 - Second rear port K-Bus application

3.6 Second Rear Port EIA(RS)-485 Example

Figure 4 - Second rear port EIA(RS)-485 example

P540d/EN SC/A01 Page (SC) 15-27

(SC) 15 SCADA Communications

3.7 Second Rear Port EIA(RS)-232 Example

Configuring the Communications Ports

Figure 5 - Second rear port EIA(RS)-232 example

3.8 SK5 Port Connection

The lower 9-way D-type connector (SK5) is currently unsupported.

Do not connect to this port.

Page (SC) 15-28 P540d/EN SC/A01

Courier Interface

4

4.1

4.2

(SC) 15 SCADA Communications

COURIER INTERFACE

Courier Protocol

Courier is a Schneider Electric communication protocol. The concept of the protocol is that a standard set of commands is used to access a database of settings and data in the relay. This allows a generic master to be able to communicate with different slave devices. The application-specific aspects are contained in the database rather than the commands used to interrogate it, so the master station does not need to be preconfigured.

The same protocol can be used through two physical links K-Bus or EIA(RS)-232.

K-Bus is based on EIA(RS)-485 voltage levels with HDLC FM0 encoded synchronous signaling and its own frame format. The K-Bus twisted pair connection is unpolarized, whereas the EIA(RS)-485 and EIA(RS)-232 interfaces are polarized.

The EIA(RS)-232 interface uses the IEC60870-5 FT1.2 frame format.

The relay supports an IEC60870-5 FT1.2 connection on the front-port. This is intended for temporary local connection and is not suitable for permanent connection. This interface uses a fixed baud rate, 11-bit frame, and a fixed device address.

The rear interface is used to provide a permanent connection for K-Bus and allows multidrop connection. Although K-Bus is based on EIA(RS)-485 voltage levels, it is a synchronous HDLC protocol using FM0 encoding. It is not possible to use a standard

EIA(RS)-232 to EIA(RS)-485 converter to convert IEC60870-5 FT1.2 frames to K-Bus.

Also it is not possible to connect K-Bus to an EIA(RS)-485 computer port. A protocol converter, such as the KITZ101, should be used for this purpose.

For a detailed description of the Courier protocol, command-set and link description, see the following documentation:

R6509 K-Bus Interface Guide

R6510 IEC60870 Interface Guide

R6511 Courier Protocol

R6512 Courier User Guide

Alternatively for direct connections, the fiber optic converter card may be used to convert the rear EIA(RS)485 port into a fiber optic (ST) port. See the Fiber Optic Converter

(option) section for more information.

Front Courier Port

The front EIA(RS)-232 9 pin port supports the Courier protocol for one-to-one communication. This port complies with EIA(RS)-574; the 9-pin version of EIA(RS)-232, see www.tiaonline.org

. It is designed for use during installation and commissioning/maintenance and is not suitable for permanent connection. Since this interface is not used to link the relay to a substation communication system, some of the features of Courier are not implemented. These are as follows:

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(SC) 15 SCADA Communications

4.3

4.4

Courier Interface

Automatic extraction of Event Records:

 Courier Status byte does not support the Event flag.

 Send Event/Accept Event commands are not implemented.

Automatic extraction of Disturbance records:

 Courier Status byte does not support the Disturbance flag.

Busy Response Layer:

 Courier Status byte does not support the Busy flag, the only response to a request is the final data.

Fixed Address:

 The address of the front Courier port is always 1; the Change Device address command is not supported.

Fixed Baud Rate:

19200 bps.

Although automatic extraction of event and disturbance records is not supported, it is possible to manually access this data through the front port.

Supported Command Set

The following Courier commands are supported by the relay:

Protocol Layer:

Reset Remote Link

Poll Status

Poll Buffer*

Setting Changes:

Enter Setting Mode

Preload Setting

Abort Setting

Execute Setting

Reset Menu Cell

Set Value

Control Commands:

Select Setting Group

Change Device Address*

Set Real Time

Low Level Commands:

Send Event*

Accept Event*

Send Block

Store Block Identifier

Store Block Footer

Menu Browsing:

Get Column Headings

Get Column Text

Get Column Values

Get Strings

Get Text

Get Value

Get Column Setting Limits

Note Commands marked with an asterisk

(*) are not supported through the front Courier port.

Courier Database

The Courier database is two-dimensional. Each cell in the database is referenced by a row and column address. Both the column and the row can take a range from 0 to 255.

Addresses in the database are specified as hexadecimal values, for example, 0A02 is column 0A (10 decimal) row 02. Associated settings or data are part of the same column.

Row zero of the column has a text string to identify the contents of the column and to act as a column heading.

Page (SC) 15-30 P540d/EN SC/A01

Courier Interface

4.5

4.5.1

4.5.2

4.5.3

(SC) 15 SCADA Communications

The Relay Menu Database document contains the complete database definition for the relay. For each cell location the following information is stated:

Cell Text

Cell Data type

Cell value

Whether the cell is settable, if so

Minimum value

Maximum value

Step size

Password Level required to allow setting changes

String information (for Indexed String or Binary flag cells)

Setting Changes

(See R6512, Courier User Guide - Chapter 9)

Courier provides two mechanisms for making setting changes, both of these are supported by the relay. Either method can be used for editing any of the settings in the relay database.

Method 1

This uses a combination of three commands to perform a settings change:

Enter Setting Mode Checks that the cell is settable and returns the limits.

Preload Setting Places a new value to the cell. This value is echoed to ensure that setting corruption has not taken place. The validity of the setting is not checked by this action.

Execute Setting Confirms the setting change. If the change is valid, a positive response is returned. If the setting change fails, an error response is returned.

Abort Setting This command can be used to abandon the setting change.

This is the most secure method. It is ideally suited to on-line editors because the setting limits are taken from the relay before the setting change is made. However, this method can be slow if many settings are being changed because three commands are required for each change.

Method 2

The Set Value command can be used to directly change a setting, the response to this command is either a positive confirm or an error code to indicate the nature of a failure.

This command can be used to implement a setting more rapidly than the previous method, however the limits are not extracted from the relay. This method is most suitable for off-line setting editors such as MiCOM S1 Studio, or for issuing preconfigured

(SCADA) control commands.

Relay Settings

There are three categories of settings in the relay database:

Control and support

Disturbance recorder

Protection settings group

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(SC) 15 SCADA Communications

4.5.4

4.6

4.6.1

4.6.2

Courier Interface

Setting changes made to the control and support settings are implemented immediately and stored in non-volatile memory. Changes made to either the Disturbance recorder settings or the Protection Settings Groups are stored in a ‘scratchpad’ memory and are not immediately implemented by the relay.

To action setting changes stored in the scratchpad the Save Changes cell in the

Configuration column must be written to. This allows the changes to either be confirmed and stored in non-volatile memory, or the setting changes to be aborted.

Setting Transfer Mode

If it is necessary to transfer all of the relay settings to or from the relay, a cell in the

Communication System Data column can be used. This cell (location BF03) when set to 1 makes all of the relay settings visible. Any setting changes made with the relay set in this mode are stored in scratchpad memory, including control and support settings. When the value of BF03 is set back to 0, any setting changes are verified and stored in nonvolatile memory.

Event Extraction

Events can be extracted either automatically (rear port only) or manually (either Courier port). For automatic extraction all events are extracted in sequential order using the standard Courier event mechanism, this includes fault/maintenance data if appropriate.

The manual approach allows the user to select events, faults, or maintenance data at random from the stored records.

Automatic Event Extraction

(See Chapter 7 Courier User Guide, publication R6512).

This method is intended for continuous extraction of event and fault information as it is produced. It is only supported through the rear Courier port.

When new event information is created, the Event bit is set in the Status byte. This indicates to the Master device that event information is available. The oldest, unextracted event can be extracted from the relay using the Send Event command. The relay responds with the event data, which is either a Courier Type 0 or Type 3 event. The Type

3 event is used for fault records and maintenance records.

Once an event has been extracted from the relay, the Accept Event can be used to confirm that the event has been successfully extracted. If all events have been extracted, the event bit is reset. If there are more events still to be extracted, the next event can be accessed using the Send Event command as before.

Event Types

Events are created by the relay under these circumstances:

Change of state of output contact

Change of state of opto input

Protection element operation

Alarm condition

Setting change

Password entered/timed-out

Fault record (Type 3 Courier Event)

Maintenance record (Type 3 Courier Event)

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Courier Interface (SC) 15 SCADA Communications

4.6.3

4.6.4

4.7

P540d/EN SC/A01

Event Format

The Send Event command results in these fields being returned by the relay:

Cell reference

Time stamp

Cell text

Cell value

The Relay Menu Database document for the relevant product , contains a table of the events created by the relay and indicates how the contents of the above fields are interpreted. Fault records and Maintenance records return a Courier Type 3 event, which contains the above fields with two additional fields:

Event extraction column

Event number

These events contain additional information that is extracted from the relay using the referenced extraction column. Row 01 of the extraction column contains a setting that allows the fault/maintenance record to be selected. This setting should be set to the event number value returned in the record. The extended data can be extracted from the relay by uploading the text and data from the column.

Manual Event Record Extraction

Column 01 of the database can be used for manual viewing of event, fault, and maintenance records. The contents of this column depend on the nature of the record selected. It is possible to select events by event number and to directly select a fault record or maintenance record by number.

Event Record selection (Row 01)

This cell can be set to a value between 0 to 249 to select from 250 stored events. 0 selects the most recent record and 249 the oldest stored record. For simple event records, (Type 0) cells 0102 to 0105 contain the event details. A single cell is used to represent each of the event fields. If the event selected is a fault or maintenance record (Type 3), the remainder of the column contains the additional information.

Fault Record Selection (Row 05)

This cell can be used to select a fault record directly, using a value between 0 and

4 to select one of up to five stored fault records. (0 is the most recent fault and 4 is the oldest). The column then contains the details of the fault record selected.

Maintenance Record Selection (Row F0)

This cell can be used to select a maintenance record using a value between 0 and

4. This cell operates in a similar way to the fault record selection.

If this column is used to extract event information from the relay, the number associated with a particular record changes when a new event or fault occurs.

Disturbance Record Extraction

The stored disturbance records in the relay are accessible in a compressed format through the Courier interface. The records are extracted using column B4. Cells required for extraction of uncompressed disturbance records are not supported.

Select Record Number (Row 01)

This cell can be used to select the record to be extracted. Record 0 is the oldest unextracted record, already extracted older records are assigned positive values, and negative values are used for more recent records. To help automatic extraction through the rear port, the Disturbance bit of the Status byte is set by the relay whenever there are unextracted disturbance records.

Page (SC) 15-33

(SC) 15 SCADA Communications

4.8

Courier Interface

Once a record has been selected, using the above cell, the time and date of the record can be read from cell 02. The disturbance record can be extracted using the block transfer mechanism from cell B00B. The file extracted from the relay is in a compressed format. Use MiCOM S1 Studio to decompress this file and save the disturbance record in the COMTRADE format.

As has been stated, the rear Courier port can be used to extract disturbance records automatically as they occur. This operates using the standard Courier mechanism, see

Chapter 8 of the Courier User Guide . The front Courier port does not support automatic extraction although disturbance record data can be extracted manually from this port.

Programmable Scheme Logic (PSL) Settings

The Programmable Scheme Logic (PSL) settings can be uploaded from and downloaded to the relay using the block transfer mechanism defined in the Courier User Guide.

These cells are used to perform the extraction:

B204 Domain Used to select either PSL settings (upload or download) or PSL configuration data (upload only)

B208 Sub-Domain Used to select the Protection Setting Group to be uploaded or downloaded.

B20C Version Used on a download to check the compatibility of the file to be downloaded with the relay.

B21C Transfer Mode

B120 Data Transfer Cell

Used to set up the transfer process.

Used to perform upload or download.

The PSL settings can be uploaded and downloaded to and from the relay using this mechanism. If it is necessary to edit the settings, MiCOM S1 Studio must be used because the data is compressed. MiCOM S1 Studio also performs checks on the validity of the settings before they are downloaded to the relay.

Page (SC) 15-34 P540d/EN SC/A01

IEC60870-5-103 Interface (SC) 15 SCADA Communications

5

5.1

5.2

5.3

P540d/EN SC/A01

IEC60870-5-103 INTERFACE

The IEC60870-5-103 interface is a master/slave interface with the relay as the slave device. The relay conforms to compatibility level 2; compatibility level 3 is not supported.

These IEC60870-5-103 facilities are supported by this interface:

Initialization (Reset)

Time Synchronization

Event Record Extraction

General Interrogation

Cyclic Measurements

General Commands

Disturbance Record Extraction

Private Codes

Physical Connection and Link Layer

Two connection options are available for IEC60870-5-103, either the rear EIA(RS)-485 port or an optional rear fiber optic port. If the fiber optic port is fitted, the active port can be selected using the front panel menu or the front Courier port. However the selection is only effective following the next relay power up.

For either of the two connection modes, both the relay address and baud rate can be selected using the front panel menu or the front Courier port. Following a change to either of these two settings a reset command is required to re-establish communications, see the description of the reset command in the Initialization section.

Initialization

Whenever the relay has been powered up, or if the communication parameters have been changed, a reset command is required to initialize the communications. The relay responds to either of the two reset commands (Reset CU or Reset FCB). However, the

Reset CU clears any unsent messages in the relay’s transmit buffer.

The relay responds to the reset command with an identification message ASDU 5. The

Cause Of Transmission (COT) of this response is either Reset CU or Reset FCB depending on the nature of the reset command. For information on the content of

ASDU 5 see section IEC60870-5-103 in the Relay Menu Database document .

In addition to the ASDU 5 identification message, if the relay has been powered up it also produces a power-up event.

Time Synchronization

The relay time and date can be set using the time synchronization feature of the

IEC60870-5-103 protocol. The relay corrects for the transmission delay as specified in

IEC60870-5-103. If the time synchronization message is sent as a send / confirm message, the relay responds with a confirm. Whether the time-synchronization message is sent as a send / confirm or a broadcast (send / no reply) message, a time synchronization Class 1 event is generated.

If the relay clock is synchronised using the IRIG-B input, it is not possible to set the relay time using the IEC60870-5-103 interface. If the time is set using the interface, the relay creates an event using the current date and time from the internal clock, which is synchronised to IRIG-B.

Page (SC) 15-35

(SC) 15 SCADA Communications

5.4

5.5

5.6

5.7

5.8

5.9

IEC60870-5-103 Interface

Spontaneous Events

Events are categorized using the following information:

Function Type

Information Number

The IEC60870-5-103 profile in the Relay Menu Database document , contains a complete listing of all events produced by the relay.

General Interrogation (GI)

The General Interrogation (GI) request can be used to read the status of the relay, the function numbers, and information numbers that are returned during the GI cycle. See the

IEC60870-5-103 profile in the Relay Menu Database document .

Cyclic Measurements

The relay produces measured values using ASDU 9 cyclically. This can be read from the relay using a Class 2 poll (note ADSU 3 is not used). The rate at which the relay produces new measured values can be controlled using the Measurement Period setting.

This setting can be edited from the front panel menu or the front Courier port and is active immediately following a change.

The measurands transmitted by the relay are sent as a proportion of 2.4 times the rated value of the analog value.

Commands

A list of the supported commands is contained in the Relay Menu Database document .

The relay responds to other commands with an ASDU 1, with a Cause of Transmission

(COT) indicating ‘negative acknowledgement’.

Test Mode

Using either the front panel menu or the front Courier port, it is possible to disable the relay output contacts to allow secondary injection testing to be performed. This is interpreted as ‘test mode’ by the IEC60870-5-103 standard. An event is produced to indicate both entry to and exit from test mode. Spontaneous events and cyclic measured data transmitted while the relay is in test mode has a COT of ‘test mode’.

Disturbance Records

For Software Releases prior to B0 (i.e. 57 and earlier):

The disturbance records are stored in uncompressed format and can be extracted using the standard mechanisms described in IEC60870-5-103.

Note IEC60870-5-103 only supports up to 8 records.

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IEC60870-5-103 Interface

5.10

5.11

(SC) 15 SCADA Communications

For Software Release B0 - A & B:

The disturbance records are stored in uncompressed format and can be extracted using the standard mechanisms described in IEC60870-5-103. The Enhanced Disturbance

Recorder software releases mean the relay can store a minimum of 15 records, each of

1.5 seconds duration.

Using relays with IEC 60870-5 CS 103 communication means they can store the same total record length. However, the IEC 60870-5 CS 103 communication protocol dictates that only 8 records (of 3 seconds duration) can be extracted via the rear port.

Blocking of Monitor Direction

The relay supports a facility to block messages in the Monitor direction and in the

Command direction. Messages can be blocked in the Monitor and Command directions using the menu commands, Communications - CS103 Blocking -

Disabled / Monitor Blocking / Command Blocking or DDB signals Monitor Blocked and

Command Blocked.

Setting Changes through IEC103 Protocol

The IEC 870-5-103 Standard suggests using the generic services for read/write operations on the proprietary data of different manufacture protection equipments, the directory structure specified by the standard for accessing the generic data is the same as the Px40 setting structure. With the generic services selected in the Platform Software full access to the relay’s database is possible over the first rear communications port using the IEC608070-5-103 protocol with Level 3 compatibility.

Each cell in the database has an attribute that defines whether it is included in the list of cells that are subject to a General Interrogation of Generic data.

The following Group 1,2,3 and 4 settings will be included in the GGI:

Overcurrent, Neg Seq O/C, Broken Conductor, Earth Fault 1 and 2,

SEF/REF Prot'n, Residual O/V NVD, Thermal Overload, NEG Sequence O/V,

Cold Load Pickup, Selective Logic, Admit Protection, Power Protection,

Volt Protection, Freq Protection, CB FAIL & I<, Supervision,

Fault Locator, System Checks, Autoreclose, ADV.Frequency.

P540d/EN SC/A01 Page (SC) 15-37

(SC) 15 SCADA Communications DNP3.0 Interface

6 DNP3.0 INTERFACE

6.1 DNP3.0 Protocol

The DNP3.0 protocol is defined and administered by the DNP Users Group. For information on the user group, DNP3.0 in general and the protocol specifications, see www.dnp.org

The descriptions given here are intended to accompany the device profile document that is included in the Relay Menu Database document.

The DNP3.0 protocol is not described here, please refer to the documentation available from the user group. The device profile document specifies the full details of the DNP3.0 implementation for the relay. This is the standard format DNP3.0 document that specifies which objects; variations and qualifiers are supported. The device profile document also specifies what data is available from the relay using DNP3.0. The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of the features from level 3.

DNP3.0 communication uses the EIA(RS)-485 communication port at the rear of the relay. The data format is 1 start bit, 8 data bits, an optional parity bit and 1 stop bit. Parity is configurable (see menu settings below).

6.2 DNP3.0 Menu Setting

The following settings are in the DNP3.0 menu in the Communications column.

Setting Range

Remote Address 0 - 65534

Baud Rate

Parity

1200, 2400, 4800,

9600, 19200, 38400

None, Odd, Even

DNP App Fragment 1 - 2048 bytes

DNP App Timeout 1 -120 s

DNP SBO Timeout 1 - 10 s

DNP3.0 address of relay (decimal)

Description

Selectable baud rate for DNP3.0 communication

Time Sync. Enabled, Disabled

RP1 Physical Link Copper or Fiber Optic

This cell defines whether an electrical EIA(RS)485 or fiber optic connection is being used for communication between the master station and relay. If Fiber

Optic is selected, the optional fiber optic communications board is required.

Meas Scaling

Primary, Secondary or Normalized

Setting to report analog values in terms of primary, secondary or normalized (with respect to the CT/VT ratio setting) values.

Message Gap

DNP Need Time

0 - 50 msec

1 - 30 mins

Parity setting

Enables or disables the relay requesting time sync. from the master using IIN bit 4 word 1

Setting to allow the master station to have an interframe gap.

The length of time waited before requesting another time sync from the master.

The maximum message length (application fragment size) transmitted by the relay.

The length of time waited after sending a message fragment and waiting for a confirmation from the master.

The length of time waited after receiving a select command and waiting for an operate confirmation from the master.

DNP Link Timeout 0 - 120 s

The length of time the relay waits for a Data Link Confirm from the master. A value of 0 means data link support disabled and 1 to 120 seconds is the timeout setting.

Table 3 - DNP3.0 menu in the Communications column

Page (SC) 15-38 P540d/EN SC/A01

DNP3.0 Interface (SC) 15 SCADA Communications

If the DNP3.0 over Ethernet option is selected, further settings are shown in this table.

Setting

IP Address

Subnet mask

-

-

NIC MAC Address -

Gateway

DNP Time Sync.

-

Range

Disabled or

Enabled

Description

Indicates the IP (Internet Protocol) address of the rear Ethernet port. This address is formatted as a six-byte hexadecimal number, and is unique.

Displays the sub-network that the relay is connected to.

Indicates the MAC (Media Access Control) address of the rear Ethernet port. This address is formatted as a six-byte hexadecimal number, and is unique.

Displays the IP address of the gateway (proxy) that the relay is connected to, if any.

If set to Enabled the DNP3.0 master station can be used to synchronize the time on the relay. If set to Disabled, either the internal free running clock or the IRIG-B input are used.

Meas Scaling

Primary,

Secondary or

Normalized

NIC Tunl Timeout 1 - 30 mins

Setting to report analog values in terms of primary, secondary or normalized values, with respect to the CT/VT ratio setting.

NIC Link Report

Alarm, Event or

None

NIC Link Timeout 0.1 - 60 s

Time waited before an inactive tunnel to a master station is reset.

Configures how a failed or unfitted network link (copper or fiber) is reported:

Alarm - an alarm is raised for a failed link

Event - an event is raised for a failed link

None - nothing reported for a failed link

Time waited, after failed network link is detected, before communication by the alternative media interface is attempted.

Table 4 - DNP3.0 over Ethernet option settings

6.3

6.4

Object 1 Binary Inputs

Object 1, binary inputs, contains information describing the state of signals in the relay, which mostly form part of the Digital Data Bus (DDB). In general these include the state of the output contacts and input optos, alarm signals and protection start and trip signals.

The ‘DDB number’ column in the device profile document provides the DDB numbers for the DNP3.0 point data. These can be used to cross-reference to the DDB definition list.

See the Relay Menu Database document . The binary input points can also be read as change events using object 2 and object 60 for class 1-3 event data.

Object 10 Binary Outputs

Object 10, binary outputs, contains commands that can be operated using DNP3.0.

Therefore the points accept commands of type pulse on [null, trip, close] and latch on/off as detailed in the device profile in the Relay Menu Database document and execute the command once for either command. The other fields are ignored (queue, clear, trip/close, in time and off time).

There is an additional image of the control inputs. Described as alias control inputs, they reflect the state of the control input, but with a dynamic nature.

If the Control Input DDB signal is already SET and a new DNP SET command is sent to the Control Input, the Control Input DDB signal goes momentarily to RESET and then back to SET.

If the Control Input DDB signal is already RESET and a new DNP RESET command is sent to the Control Input, the Control Input DDB signal goes momentarily to SET and then back to RESET.

P540d/EN SC/A01 Page (SC) 15-39

(SC) 15 SCADA Communications DNP3.0 Interface

DNP Latch

ON

DNP Latch

ON

DNP Latch

OFF

DNP Latch

OFF

6.5

Control Input

(Latched)

Aliased Control

Input (Latched)

Control Input

(Pulsed)

Aliased Control

Input (Pulsed)

'Behaviour of Control Inputs

Existing with Pulsed/Latched Setting

Aliased Control Inputs with Pulsed/Latched Setting

Note: The pulse width is equal to the duration of one protection iteration (½ cycle for P14x/P341, ¼ cycle for P342/3/4/5, P64x)'

P4218ENi

Figure 6 - Behavior when control input is set to pulsed or latched

Many of the relay’s functions are configurable so some of the object 10 commands described in the following sections may not be available. A read from object 10 reports the point as off-line and an operate command to object 12 generates an error response.

Examples of object 10 points that maybe reported as off-line are:

Activate setting groups Ensure setting groups are enabled

CB trip/close Ensure remote CB control is enabled

Reset NPS thermal

Reset thermal O/L

Reset RTD flags

Control inputs

Ensure NPS thermal protection is enabled

Ensure thermal overload protection is enabled

Ensure RTD Inputs is enabled

Ensure control inputs are enabled

Object 20 Binary Counters

Object 20, binary counters, contains cumulative counters and measurements. The binary counters can be read as their present ‘running’ value from object 20, or as a ‘frozen’ value from object 21. The running counters of object 20 accept the read, freeze and clear functions. The freeze function takes the current value of the object 20 running counter and stores it in the corresponding object 21 frozen counter. The freeze and clear function resets the object 20 running counter to zero after freezing its value.

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DNP3.0 Interface

6.6

6.7

(SC) 15 SCADA Communications

Binary counter and frozen counter change event values are available for reporting from object 22 and object 23 respectively. Counter change events (object 22) only report the most recent change, so the maximum number of events supported is the same as the total number of counters. Frozen counter change events (object 23) are generated when ever a freeze operation is performed and a change has occurred since the previous freeze command. The frozen counter event queues will store the points for up to two freeze operations.

Object 30 Analog Input

Object 30, analog inputs, contains information from the relay’s measurements columns in the menu. All Object 30 points can be reported as 16 or 32-bit integer values with flag, 16 or 32-bit integer values without flag, as well as short floating point values.

Analogue values can be reported to the master station as primary, secondary or normalized values (which takes into account the relay’s CT and VT ratios) and this is settable in the DNP3.0 Communications Column in the relay. Corresponding deadband settings can be displayed in terms of a primary, secondary or normalized value.

Deadband point values can be reported and written using Object 34 variations.

The deadband is the setting used to determine whether a change event should be generated for each point. The change events can be read using Object 32 or Object 60.

These events are generated for any point which has a value changed by more than the deadband setting since the last time the data value was reported.

Any analog measurement that is unavailable when it is read is reported as offline. For example, the frequency when the current and voltage frequency is outside the tracking range of the relay or the thermal state when the thermal protection is disabled in the configuration column. All Object 30 points are reported as secondary values in DNP3.0

(with respect to CT and VT ratios).

The following fault data can be mapped in DNP3.0 protocol in serial and Ethernet connections:

Fault voltages

Fault currents

Fault location

Operating time of relay

Operating time of breaker

Fault time

Fault date

The latest fault records only will be retrieved over DNP3.0.

Object 40 Analog Output

The conversion to fixed-point format requires the use of a scaling factor, which is configurable for the various types of data within the relay such as current, voltage, and phase angle. All Object 40 points report the integer scaling values and Object 41 is available to configure integer scaling quantities.

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(SC) 15 SCADA Communications

6.8

DNP3.0 Interface

DNP3.0 Configuration using MiCOM S1 Studio

A PC support package for DNP3.0 is available as part of MiCOM S1 Studio to allow configuration of the relay’s DNP3.0 response. The PC is connected to the relay using a serial cable to the 9-pin connector on the front of the relay, see the Introduction chapter.

The configuration data is uploaded from the relay to the PC in a block of compressed format data and downloaded to the relay in a similar manner after modification. The new

DNP3.0 configuration takes effect in the relay after the download is complete. To restore the default configuration at any time, from the Configuration column, select the Restore

Defaults cell then select All Settings .

In MiCOM S1 Studio, the DNP3.0 data is shown in four main folders, one folder each for the point configuration, integer scaling, default variation (data format) and DNP over

Ethernet. The point configuration also includes screens for binary inputs, binary outputs, counters and analogue input configuration. Note that if the DNP3.0 over Ethernet plus

IEC61850 option is chosen, DNP over Ethernet configuration will be used to configure

DNP3.0 over Ethernet, and this part of configuration will be ignored by DNP3.0 serial.

For the IP configuration of DNP over Ethernet, please refer to the DNP3.0 over Ethernet runs concurrently with IEC61850 section.

Important At most 10 clients are supported to connect to device at the same time in DNP3.0 over Ethernet protocol.

Page (SC) 15-42 P540d/EN SC/A01

IEC 61850 Ethernet Interface

7

7.1

7.2

7.2.1

(SC) 15 SCADA Communications

IEC 61850 ETHERNET INTERFACE

Introduction

IEC 61850 is the international standard for Ethernet-based communication in substations.

It enables integration of all protection, control, measurement and monitoring functions in a substation, and provides the means for interlocking and inter-tripping. It combines the convenience of Ethernet with the security which is essential in substations today.

The MiCOM protection relays can integrate with the PACiS substation control systems, to complete Schneider Electric's offer of a full IEC 61850 solution for the substation. The majority of MiCOM Px3x and Px4x relay types can be supplied with Ethernet, in addition to traditional serial protocols. Relays which have already been delivered with UCA2.0 on

Ethernet can be easily upgraded to IEC 61850.

What is IEC 61850?

IEC 61850 is a 14-part international standard, which defines a communication architecture for substations. It is more than just a protocol and provides:

Standardized models for IEDs and other equipment in the substation

Standardized communication services (the methods used to access and exchange data)

Standardized formats for configuration files

Peer-to-peer (for example, relay to relay) communication

The standard includes mapping of data onto Ethernet. Using Ethernet in the substation offers many advantages, most significantly including:

High-speed data rates (currently 100 Mbits/s, rather than tens of kbits/s or less used by most serial protocols)

Multiple masters (called “clients”)

Ethernet is an open standard in every-day use

Schneider Electric has been involved in the Working Groups which formed the standard, building on experience gained with UCA2.0, the predecessor of IEC 61850.

Interoperability

A major benefit of IEC 61850 is interoperability. IEC 61850 standardizes the data model of substation IEDs which simplifies integration of different vendors’ products. Data is accessed in the same way in all IEDs, regardless of the vendor, even though the protection algorithms of different vendors’ relays may be different.

IEC 61850-compliant devices are not interchangeable, you cannot replace one device with another (although they are interoperable). However, the terminology is predefined and anyone with knowledge of IEC 61850 can quickly integrate a new device without mapping all of the new data. IEC 61850 improves substation communications and interoperability at a lower cost to the end user.

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(SC) 15 SCADA Communications

7.2.2

IEC 61850 Ethernet Interface

Data Model

To ease understanding, the data model of any IEC 61850 IED can be viewed as a hierarchy of information. The categories and naming of this information is standardized in the IEC 61850 specification. stVal

Pos

LN1 (XCBR)

A

PhA

LN2 (MMXU)

Logical Device (IED1)

Data Attribute

Data Object

Logical Node

(1 to n)

Logical Device

(1 to n)

Physical Device

Physical Device (network address)

P1445ENb

Figure 7 - Data model layers in IEC 61850

The levels of this hierarchy can be described as follows:

Physical Device Identifies the actual IED in a system. Typically the device’s name or IP address can be used (for example Feeder_1 or

10.0.0.2

).

Logical Device Identifies groups of related Logical Nodes inthe Physical

Device. For the MiCOM relays, five Logical Devices exist:

Control, Measurements, Protection, Records, System .

Wrapper/Logical Node Instance

Identifies the major functional areas in the IEC 61850 data model. Either 3 or 6 characters are used as a prefix to define the functional group (wrapper) while the actual functionality is identified by a 4 character Logical Node name, suffixed by an instance number. For example,

XCBR1 (circuit breaker), MMXU1 (measurements),

FrqPTOF2 (overfrequency protection, stage 2).

Data Object This next layer is used to identify the type of data presented. For example, Pos (position) of Logical Node type XCBR .

Data Attribute This is the actual data (such as measurement value, status, and description). For example, stVal (status value) indicates the actual position of the circuit breaker for Data

Object type Pos of Logical Node type XCBR .

Page (SC) 15-44 P540d/EN SC/A01

IEC 61850 Ethernet Interface

7.3

7.3.1

(SC) 15 SCADA Communications

IEC 61850 in MiCOM Relays

IEC 61850 is implemented in MiCOM relays by use of a separate Ethernet card. This card manages the majority of the IEC 61850 implementation and data transfer to avoid any impact on the performance of the protection.

To communicate with an IEC 61850 IED on Ethernet, it is necessary only to know its IP address. This can then be configured into either:

An IEC 61850 or HMI, or client (or master ), for example a PACiS computer (MiCOM C264)

An MMS browser , with which the full data model can be retrieved from the IED, without any prior knowledge

Capability

The IEC 61850 interface provides these capabilities:

Read access to measurements

All measurands are presented using the measurement Logical Nodes, in the

Measurements Logical Device. Reported measurement values are refreshed by the relay once per second, in line with the relay user interface.

Generation of unbuffered reports on change of status/measurement

Unbuffered reports, when enabled, report any change of state in statuses and measurements (according to deadband settings).

Support for time synchronization over an Ethernet link

Time synchronization is supported using SNTP (Simple Network Time Protocol).

This protocol is used to synchronize the internal real time clock of the relays.

GOOSE peer-to-peer communication

GOOSE communications of statuses are included as part of the IEC 61850 implementation. See Peer-to-Peer (GSE) Communications for more details.

Disturbance record extraction

Disturbance records can be extracted from MiCOM relays by file transfer, as ASCII format COMTRADE files.

Controls

The following control services are available:

Direct Control

Direct Control with enhanced security

Select Before Operate (SBO) with enhanced security

Controls are applied to open and close circuit breakers using XCBR.Pos and

DDB signals ‘Control Trip’ and ‘Control Close’.

 System/LLN0. LLN0.LEDRs are used to reset any trip LED indications.

Setting changes (e.g. of protection settings) are not supported in the current IEC 61850 implementation. In order to keep this process as simple as possible, such setting changes are done using MiCOM S1 Studio Settings & Records program. This can be done as previously using the front port serial connection of the relay, or now optionally over the Ethernet link if preferred (this is known as “tunneling”).

P540d/EN SC/A01 Page (SC) 15-45

(SC) 15 SCADA Communications IEC 61850 Ethernet Interface

Reports

Reports only include data objects that have changed and not the complete dataset.

The exceptions to this are a General Interrogation request and integrity reports.

Buffered Reports

Eight Buffered Report Control Blocks, (BRCB), are provided in SYSTEM/LLN0 in

Logical Device ‘System’.

Buffered reports are configurable to use any configurable dataset located in the same Logical device as the BRCB (SYSTEM/LLN0).

Unbuffered Reports

Sixteen Unbuffered Report Control Blocks (URCB) are provided in SYSTEM/LLN0 in Logical Device ‘System’.

Unbuffered reports are configurable to use any configurable dataset located in the same Logical device as the URCB (SYSTEM/LLN0).

Configurable Data Sets

It is possible to create and configure datasets in any Logical Node using the IED

Configurator. The maximum number of datasets will be specified in an IED’s ICD file. An IED is capable of handling 100 datasets.

Published GOOSE message

Eight GOCBs are provided in SYSTEM/LLN0.

Uniqueness of control

The Uniqueness of control mechanism is implemented to be consistent with the

PACiS mechanism. This requires the relay to subscribe to the OrdRun signal from all devices in the system and be able to publish such a signal in a GOOSE message.

Select Active Setting Group

Functional protection groups can be enabled or disabled using private mod/beh attributes in the Protection/LLN0.OcpMod object. Setting groups are selectable using the Setting Group Control Block class, (SGCB). The Active Setting Group can be selected using the System/LLN0.SP.SGCB.ActSG data attribute in Logical

Device ‘System’.

Quality for GOOSE

It is possible to process the quality attributes of any Data Object in an incoming

GOOSE message. Devices that do not support IEC61850 quality flags send quality attributes as all zeros. The supported quality attributes for outgoing GOOSE messages are described in the Protocol Implementation eXtra Information for

Testing (PIXIT) document.

Address List

An Address List document (to be titled ADL) is produced for each IED which shows the mapping between the IEC61850 data model and the internal data model of the

IED. It includes a mapping in the reverse direction, which may be more useful. This document is separate from the PICS/MICS document.

Originator of Control

Originator of control mechanism is implemented for operate response message and in the data model on the ST of the related control object, consistent with the

PACiS mechanism.

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IEC 61850 Ethernet Interface

7.3.2

(SC) 15 SCADA Communications

Metering

MMTR (metering) logical node is implemented in P14x products. All metered values in the MMTR logical node are of type BCR. The actVal attribute of the BCR class is of type INT128, but this type is not supported by the SISCO MMSLite library. Instead, an INT64 value will be encoded for transmission.

A SPC data object named MTTRs has been included in the MMTR logical node.

This control will reset the demand measurements. A SPC data object named

MTTRs is also included in the PTTR logical node. This control will reset the thermal measurements.

Scaled Measurements

The Unit definition, as per IEC specifies an SI unit and an optional multiplier for each measurement. This allows a magnitude of measurement to be specified e.g. mA, A, kA, MA.

The multiplier will always be included in the Unit definition and will be configurable in

SCL, but not settable at runtime. It will apply to the magnitude, rangeC.min & rangeC.max attributes. rangeC.min & rangeC.max will not be settable at runtime to be more consistent with Px30 and to reduce configuration problems regarding deadbands.

Setting changes, such as changes to protection settings, are done using MiCOM S1

Studio. These changes can also be done using the relay’s front port serial connection or the relay’s Ethernet link, and is known as “tunneling”.

IEC 61850 Configuration

One of the main objectives of IEC 61850 is to allow IEDs to be directly configured from a configuration file generated at system configuration time. At the system configuration level, the capabilities of the IED are determined from an IED capability description file

(ICD), which is provided with the product. Using a collection of these ICD files from different products, the entire protection of a substation can be designed, configured and tested (using simulation tools) before the product is even installed into the substation.

To help this process, the MiCOM S1 Studio Support Software provides an IEC61850 IED

Configurator tool. Select Tools > IEC61850 IED Configurator . This tool allows the preconfigured IEC 61850 configuration file (SCD or CID) to be imported and transferred to the IED. The configuration files for MiCOM relays can also be created manually, based on their original IED Capability Description (ICD) file.

Other features include the extraction of configuration data for viewing and editing, and a sophisticated error-checking sequence. The error checking ensures the configuration data is valid for sending to the IED and ensures the IED functions correctly in the substation.

To help the user, some configuration data is available in the IED CONFIGURATOR column of the relay user interface, allowing read-only access to basic configuration data.

P540d/EN SC/A01 Page (SC) 15-47

(SC) 15 SCADA Communications

7.3.2.1

7.3.2.2

7.4

IEC 61850 Ethernet Interface

Configuration Banks

To promote version management and minimize down-time during system upgrades and maintenance, the MiCOM relays have incorporated a mechanism consisting of multiple configuration banks. These configuration banks are categorized as:

Active Configuration Bank

Inactive Configuration Bank

Any new configuration sent to the relay is automatically stored in the inactive configuration bank, therefore not immediately affecting the current configuration. Both active and inactive configuration banks can be extracted at any time.

When the upgrade or maintenance stage is complete, the IED Configurator tool can be used to transmit a command to a single IED. This command authorizes the activation of the new configuration contained in the inactive configuration bank, by switching the active and inactive configuration banks. This technique ensures that the system down-time is minimized to the start-up time of the new configuration. The capability to switch the configuration banks is also available using the IED CONFIGURATOR column.

For version management, data is available in the IED CONFIGURATOR column in the relay user interface, displaying the SCL Name and Revision attributes of both configuration banks.

Network Connectivity

Note This section presumes a prior knowledge of IP addressing and related topics. Further details on this topic may be found on the Internet (search for

IP Configuration) and in numerous relevant books.

Configuration of the relay IP parameters (IP Address, Subnet Mask, Gateway) and SNTP time synchronization parameters (SNTP Server 1, SNTP Server 2) is performed by the

IED Configurator tool. If these parameters are not available using an SCL file, they must be configured manually.

If the assigned IP address is duplicated elsewhere on the same network, the remote communications do not operate in a fixed way. However, the relay checks for a conflict at power up and every time the IP configuration is changed. An alarm is raised if an IP conflict is detected.

Use the Gateway setting to configure the relay to accept data from networks other than the local network.

Data Model of MiCOM Relays

The data model naming adopted in the Px30 and Px40 relays has been standardized for consistency. The Logical Nodes are allocated to one of the five Logical Devices, as appropriate, and the wrapper names used to instantiate Logical Nodes are consistent between Px30 and Px40 relays.

The data model is described in the Model Implementation Conformance Statement

(MICS) document, which is available separately. The MICS document provides lists of

Logical Device definitions, Logical Node definitions, Common Data Class and Attribute definitions, Enumeration definitions, and MMS data type conversions. It generally follows the format used in Parts 7-3 and 7-4 of the IEC 61850 standard.

Page (SC) 15-48 P540d/EN SC/A01

IEC 61850 Ethernet Interface

7.5

7.6

7.6.1

(SC) 15 SCADA Communications

Communication Services of MiCOM Relays

The IEC 61850 communication services which are implemented in the Px30 and Px40 relays are described in the Protocol Implementation Conformance Statement (PICS) document, which is available separately. The PICS document provides the Abstract

Communication Service Interface (ACSI) conformance statements as defined in Annex A of Part 7-2 of the IEC 61850 standard.

Peer-to-Peer (GSE) Communications

The implementation of IEC 61850 Generic Substation Event (GSE) sets the way for cheaper and faster inter-relay communications. The generic substation event model provides fast and reliable system-wide distribution of input and output data values. The generic substation event model is based on autonomous decentralization This provides an efficient method of allowing simultaneous delivery of the same generic substation event information to more than one physical device, by using multicast services.

The use of multicast messaging means that IEC 61850 GOOSE uses a publishersubscriber system to transfer information around the network*. When a device detects a change in one of its monitored status points, it publishes (sends) a new message. Any device that is interested in the information subscribes (listens) to the data message.

Note* Multicast messages cannot be routed across networks without specialized equipment.

Each new message is retransmitted at user-configurable intervals until the maximum interval is reached, to overcome possible corruption due to interference and collisions. In practice, the parameters which control the message transmission cannot be calculated.

Time must be allocated to the testing of GSE schemes before or during commissioning; in just the same way a hardwired scheme must be tested.

Scope

A maximum of 32 virtual outputs and 64 virtual inputs are available within the PSL which can be mapped directly to a published dataset in a GOOSE message (only 1 fixed dataset is supported). All published GOOSE signals are BOOLEAN values.

Note Previous releases of this product could use up to 32 virtual outputs. The B0 release allows you to use up to 64 virtual inputs.

Note Analogue Goose subscribing: A new GGIO3 is provided for analogue value subscribing, the received analogue values will not be sent to the main card.

The values will be stored only on the IEC 61850 data mode.

Each GOOSE signal contained in a subscribed GOOSE message can be mapped to any of the 32 virtual outputs and 64 virtual inputs within the PSL. The virtual inputs allow the mapping to internal logic functions for protection control, directly to output contacts or

LEDs for monitoring.

P540d/EN SC/A01 Page (SC) 15-49

(SC) 15 SCADA Communications

7.6.2

IEC 61850 Ethernet Interface

The MiCOM relay can subscribe to all GOOSE messages but only these data types can be decoded and mapped to a virtual input:

BOOLEAN

BSTR2

INT16

INT32

INT8

UINT16

UINT32

UINT8

Simulation GOOSE Configuration

From MiCOM S1 Studio select Tools > IEC 61850 IED Configurator (Ed.2). Make sure the configuration is correct as this ensures efficient GOOSE scheme operation.

The relay can be set to publish/subscribe simulation/test GOOSE; it is important that this setting is returned to publish/receive normal GOOSE messages after testing to permit normal operation of the application and GOOSE messaging.

The relay provides a single setting to receive Simulated GOOSE, however it manages each subscribed GOOSE signal independently when the setting is set to simulated

GOOSE. Each subscription (virtual input) will continue to respond to GOOSE messages without the simulation flag set; however once the relay receives a GOOSE for a subscription with the simulation flag set, it will respond to this and ignore messages without the simulation flag set. Other subscriptions (virtual inputs) which have not received a GOOSE message with the simulation flag will continue to operate as before.

When the setting is reset back to normal GOOSE messaging the relay will ignore all

GOOSE messages with the simulation flag set and act on GOOSE messages without the simulation flag.

7.6.3 High Performance GOOSE

In addition, the Px40 device is designed to provide maximum performance through an optimized publishing mechanism. This optimized mechanism is enabled so that the published GOOSE message is mapped using only the data attributes rather than mapping a complete data object. If data objects are mapped, the GOOSE messaging will operate correctly; but without the benefit of the optimized mechanism.

A pre-configured dataset named as "HighPerformGOOSE" is available in Ed.2 ICD template, which include all data attributes of all virtual outputs. We recommend using this dataset to get the benefit of better GOOSE performance. The optimized mechanism also applies to Ed.1 but without such a pre-configured dataset.

Page (SC) 15-50 P540d/EN SC/A01

IEC 61850 Ethernet Interface

7.7

7.7.1

7.7.2

7.7.3

(SC) 15 SCADA Communications

Ethernet Functionality

Settings relating to a failed Ethernet link are available in the ‘COMMUNICATIONS’ column of the relay user interface.

Note Setting relating to the failed link is removed for the new Ethernet and the behaviour is fixed as Event.

Ethernet Disconnection

IEC 61850 ‘Associations’ are unique and made to the relay between the client (master) and server (IEC 61850 device). If the Ethernet is disconnected, such associations are lost and must be re-established by the client. The TCP_KEEPALIVE function is implemented in the relay to monitor each association and terminate any which are no longer active.

Redundant Ethernet Communication Ports (optional)

For information regarding the Redundant Ethernet communication ports, refer to the stand alone document Px4x/EN REB/B11 .

Loss of Power

If the relay's power is removed, the relay allows the client to re-establish associations without a negative impact on the relay’s operation. As the relay acts as a server in this process, the client must request the association. Uncommitted settings are cancelled when power is lost. Reports requested by connected clients are reset and must be reenabled by the client when the client next creates the new association to the relay.

P540d/EN SC/A01 Page (SC) 15-51

(SC) 15 SCADA Communications

Notes:

IEC 61850 Ethernet Interface

Page (SC) 15-52 P540d/EN SC/A01

MiCOM Px4x (IN) 16 Installation

INSTALLATION

CHAPTER 16

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-1

(IN) 16 Installation MiCOM Px4x

Date (month/year): 07/2016

Products covered by this chapter:

Hardware suffix:

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

P14x (P141, P142, P143 & P145) J

P241 J

P242 & P243

P342

P343 & P344 & P345

P391

K

J

K

A

P445

P44x (P441, P442 & P444)

P44x (P442 & P444)

P44y (P443 & P446)

J & L

J & K

M

K & M

P547

P54x (P543, P544, P545 & P546) K & M

P642

P643

P645

P74x (P741, P742 & P743)

P746

P841

P849

K

J & L

K & M

K & M

J & K

K & M

K & M

K

Software version: P14x (P141, P142, P143 & P145) 43, 44 & 46

P24x (P241, P242 & P243): 57

P342, P343, P344, P345 & P391 36

P445 35 & 36 & J4

P44x (P441, P442 & P444) C7.x, D4.x,

D5.x & D6.x,

P44x (P442 & P444)

P44y (P443 & P446)

E0

55 & H4

P547 57

P54x (P543, P544, P545 & P546) 45 & 55 & H4

P64x (P642, P643 & P645)

P74x (P741, P742 & P743)

P746

P841

P849

04, A0 & B1

51, A0 & B1

A0, B1, B2, C1 & C2

45 & 55 & G4 & H4

A0

Connection diagrams:

P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x (P441, P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (IN) 16-2 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Contents (IN) 16 Installation

CONTENTS

1 Introduction to MiCOM Range

2 Receipt, Handling, Storage and Unpacking Relays

2.1

2.2

2.3

2.4

Receipt of Relays

Handling of Electronic Equipment

Storage

Unpacking

3 Relay Mounting

3.1

3.2

Rack Mounting

Panel Mounting

4 Relay Wiring

4.1

4.2

4.3

4.4

4.5

4.6

Medium and Heavy Duty Terminal Block Connections

EIA(RS)485 Port

Current Loop Input Output (CLIO) Connections (if applicable)

IRIG-B Connections (if applicable)

EIA(RS)232 Port

Optical Fiber Connectors (when applicable)

4.7

4.7.1

4.7.2

Ethernet Port for IEC 61850 and/or DNP3.0 (where applicable)

Fiber Optic (FO) Port

RJ-45 Metallic Port

4.8

4.9

RTD Connections (if applicable)

Download/Monitor Port

4.10

Second EIA(RS)232/485 Port

4.10.1

Connection to the Second Rear Port

4.10.1.1

For IEC 60870-5-2 over EIA(RS)232/574

4.10.1.2

For K-bus or IEC 60870-5-2 over EIA(RS)485

4.11

4.12

4.12.1

Earth Connection (Protective Conductor)

P391 Rotor Earth Fault Unit (REFU) Mounting

Medium Duty Terminal Block Connections

5 Case Dimensions

5.1

5.2

5.3

40TE Case Dimensions

60TE Case Dimensions

80TE Case Dimensions

Page (IN) 16-

8

9

11

12

14

14

14

14

15

15

16

16

16

17

17

17

12

13

13

13

13

13

5

6

6

6

7

7

19

20

21

22

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-3

(IN) 16 Installation Tables

TABLES

Table 1 - Products, sizes and part numbers

Table 2 - Blanking plates

Table 3 - IP52 sealing rings

Table 4 - M4 90° crimp ring terminals

Table 5 - Signals on the Ethernet connector

Table 6 - Pin connections for IEC 60870-5-2 over EIA(RS)232/574

Table 7 - Pin connections for K-bus or IEC 60870-5-2 over EIA(RS)485

Table 8 - Products and case sizes

Page (IN) 16-

14

16

16

19

8

10

11

12

FIGURES

Figure 1 - Location of battery isolation strip

Figure 2 - Rack mounting of relays

Figure 3 - 40TE Case Dimensions

Figure 4 - 60TE Case Dimensions

Figure 5 - 80TE Case Dimensions

Page (IN) 16-

9

10

20

21

22

Page (IN) 16-4 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Introduction to MiCOM Range

1

(IN) 16 Installation

INTRODUCTION TO MICOM RANGE

About MiCOM Range

MiCOM is a comprehensive solution capable of meeting all electricity supply requirements. It comprises a range of components, systems and services from Schneider

Electric.

Central to the MiCOM concept is flexibility. MiCOM provides the ability to define an application solution and, through extensive communication capabilities, integrate it with your power supply control system.

The components within MiCOM are:

P range protection relays;

C range control products;

M range measurement products for accurate metering and monitoring;

S range versatile PC support and substation control packages.

MiCOM products include extensive facilities for recording information on the state and behaviour of the power system using disturbance and fault records. They can also provide measurements of the system at regular intervals to a control centre enabling remote monitoring and control to take place.

For up-to-date information, please see: www.schneider-electric.com

MiCOM Px4x Products

The MiCOM Px4x series of protection devices provide a wide range of protection and control functions and meet the requirements of a wide market segment.

Different parts of the Px4x range provide different functions. These include:

P14x Feeder Management relay suitable for MV and HV systems

P24x Motors and rotating machine management relay for use on a wide range of synchronous and induction machines

P34x Generator Protection for small to sophisticated generator systems and interconnection protection

P44x

P54x

Full scheme Distance Protection

Line Differential

relays for MV, HV and EHV systems

protection relays for HV/EHV systems with multiple communication options and phase comparison protection for use with PLC

P74x

P84x

Numerical Busbar Protection

Breaker Failure

for use on MV, HV and EHV busbars protection relays

Note During 2011, the International Electrotechnical Commission classified the voltages into different levels (IEC 60038). The IEC defined LV, MV, HV and

EHV as follows: LV is up to 1000V. MV is from 1000V up to 35 kV. HV is from 110 kV or 230 kV. EHV is above 230 KV.

There is still ambiguity about where each band starts and ends. A voltage level defined as LV in one country or sector, may be described as MV in a different country or sector. Accordingly, LV, MV, HV and EHV suggests a possible range, rather than a fixed band. Please refer to your local

Schneider Electric office for more guidance.

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-5

(IN) 16 Installation

2

2.1

2.2

Receipt, Handling, Storage and Unpacking Relays

RECEIPT, HANDLING, STORAGE AND UNPACKING

RELAYS

Receipt of Relays

Protective relays, although generally of robust construction, require careful treatment prior to installation on site.

Upon receipt, relays should be examined immediately to ensure no external damage has been sustained in transit. If damage has been sustained, a claim should be made to the transport contractor and Schneider Electric should be promptly notified.

Relays that are supplied unmounted and not intended for immediate installation should be returned to their protective polythene bags and delivery carton. See the Storage section for more information about the storage of relays.

Handling of Electronic Equipment

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/Safety Guide SFTY/5L M/L11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

A person’s normal movements can easily generate electrostatic potentials of several thousand volts. Discharge of these voltages into semiconductor devices when handling electronic circuits can cause serious damage which, although not always immediately apparent, will reduce the reliability of the circuit. This is particularly important to consider where the circuits use Complementary Metal Oxide Semiconductors (CMOS), as is the case with these relays.

The electronic circuits inside the relay are protected from electrostatic discharge when housed in the case. Do not expose them to risk by removing the front panel or Printed

Circuit Boards (PCBs) unnecessarily.

Each PCB incorporates the highest practicable protection for its semiconductor devices.

However, if it becomes necessary to remove a PCB, the following precautions should be taken to preserve the high reliability and long life for which the relay has been designed and manufactured.

Before removing a PCB, ensure that you are at the same electrostatic potential as

• the equipment by touching the case.

Handle analogue input modules by the front panel, frame or edges of the circuit boards. PCBs should only be handled by their edges. Avoid touching the electronic

• components, printed circuit tracks or connectors.

Do not pass the module to another person without first ensuring you are both at the same electrostatic potential. Shaking hands achieves equipotential.

Place the module on an anti-static surface, or on a conducting surface which is at the same potential as yourself.

If it is necessary to store or transport printed circuit boards removed from the case, place them individually in electrically conducting anti-static bags.

In the unlikely event that you are making measurements on the internal electronic circuitry of a relay in service, it is preferable that you are earthed to the case with a conductive wrist strap. Wrist straps should have a resistance to ground between 500k

Ω to

10MΩ. If a wrist strap is not available you should maintain regular contact with the case to prevent a build-up of electrostatic potential. Instrumentation which may be used for making measurements should also be earthed to the case whenever possible.

Page (IN) 16-6 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Receipt, Handling, Storage and Unpacking Relays

2.3

2.4

(IN) 16 Installation

More information on safe working procedures for all electronic equipment can be found in

IEC 61340-5-1. It is strongly recommended that detailed investigations on electronic circuitry or modification work should be carried out in a special handling area such as described in the aforementioned Standard document.

Storage

If relays are not to be installed immediately upon receipt, they should be stored in a place free from dust and moisture in their original cartons. Where de-humidifier bags have been included in the packing they should be retained. The action of the de-humidifier crystals will be impaired if the bag is exposed to ambient conditions and may be restored by gently heating the bag for about an hour prior to replacing it in the carton.

To prevent battery drain during transportation and storage a battery isolation strip is fitted during manufacture. With the lower access cover open, presence of the battery isolation strip can be checked by a red tab protruding from the positive side.

Care should be taken on subsequent unpacking that any dust which has collected on the carton does not fall inside. In locations of high humidity the carton and packing may become impregnated with moisture and the de-humidifier crystals will lose their efficiency.

Prior to installation, relays should be stored at a temperature of between -40°C to +70°C

(-13°F to +158°F).

Unpacking

Care must be taken when unpacking and installing the relays so that none of the parts are damaged and additional components are not accidentally left in the packing or lost.

Make sure that any user’s CDROM or technical documentation is NOT discarded, and accompanies the relay to its destination substation.

Note With the lower access cover open, the red tab of the battery isolation strip will be seen protruding from the positive side of the battery compartment.

Do not remove this strip because it prevents battery drain during transportation and storage and will be removed as part of the commissioning tests.

Relays must only be handled by skilled persons.

The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust and excessive vibration. This particularly applies to installations which are being carried out at the same time as construction work.

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-7

(IN) 16 Installation

3

Relay Mounting

RELAY MOUNTING

MiCOM relays are dispatched either individually or as part of a panel/rack assembly.

Individual relays are normally supplied with an outline diagram showing the dimensions for panel cut-outs and hole centres. This information can also be found in the product publication.

Secondary front covers can also be supplied as an option item to prevent unauthorised changing of settings and alarm status. They are available in sizes 40TE and 60TE. The

60TE cover also fits the 80TE case size of the relay.

Product Size Part No

P14x

P24xxxxxxxxxxxA

P24xxxxxxxxxxxC

P24xxxxxxxxxxxJ

P24xxxxxxxxxxxK

40TE

60TE / 80TE

40TE

60TE / 80TE

40TE

60TE / 80TE

GN0037 001

GN0038 001

GN0037 001

GN0038 001

GN0242 001

GN0243 001

P34xxxxxxxxxxxA

P34xxxxxxxxxxxC

P34xxxxxxxxxxxJ

P34xxxxxxxxxxxK

P44x

P44y

P445

P54x

P547

P64xxxxxxxxxxxA/B/C

P64xxxxxxxxxxxJ/K

P74x

P74x

P746

P841

P849

40TE

60TE / 80TE

40TE

60TE / 80TE

40TE

60TE / 80TE

60TE / 80TE

40TE

60TE / 80TE

60TE / 80TE

60TE / 80TE

40TE

60TE / 80TE

40TE

60TE / 80TE

40TE

60TE

80TE

60TE / 80TE

80TE

GN0037 001

GN0038 001

GN0242 001

GN0243 001

GN0037 001

GN0038 001

GN0038 001

GN0037001

GN0038 001

GN0038 001

GN0038 001

GN0037 001

GN0038 001

GN0242 001

GN0243 001

GN0037 001

GN0038 001

GN0038 001

GN0038 001

GN0038 001

Note The Part Numbers suitable for rack-mounting have an “N” as the 10 th

The Part Numbers suitable for panel-mounting have an “M” as the 10

digit. th digit.

Table 1 - Products, sizes and part numbers

The design of the relay is such that the fixing holes in the mounting flanges are only accessible when the access covers are open and hidden from sight when the covers are closed.

If a MiCOM P991 or Easergy test block is to be included with the relays, we recommend you position the test block on the right-hand side of the associated relays (when viewed from the front). This minimises the wiring between the relay and test block, and allows the correct test block to be easily identified during commissioning and maintenance tests.

Page (IN) 16-8 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Relay Mounting (IN) 16 Installation

3.1

P0146ENc

Figure 1 - Location of battery isolation strip

If you need to test correct relay operation during the installation, the battery isolation strip can be removed but should be replaced if commissioning of the scheme is not imminent.

This will prevent unnecessary battery drain during transportation to site and installation.

The red tab of the isolation strip can be seen protruding from the positive side of the battery compartment when the lower access cover is open. To remove the isolation strip, pull the red tab whilst lightly pressing the battery to prevent it falling out of the compartment. When replacing the battery isolation strip, ensure that the strip is refitted as shown in the Location of battery isolation strip diagram, i.e. with the strip behind the battery with the red tab protruding.

Rack Mounting

Virtually all MiCOM relays (apart from P445) can be rack mounted using single tier rack frames (part number FX0021 101), see the Rack mounting of relays diagram below.

These frames have dimensions in accordance with IEC 60297 and are supplied preassembled ready to use. On a standard 483 mm rack this enables combinations of case widths up to a total equivalent of size 80TE to be mounted side-by-side.

The two horizontal rails of the rack frame have holes drilled at approximately 26 mm intervals and the relays are attached via their mounting flanges using M4 Taptite selftapping screws with captive 3 mm thick washers (also known as a SEMS unit). These fastenings are available in packs of 5 (part number ZA0005 104).

Once the tier is complete, the frames are fastened into the racks using mounting angles at each end of the tier.

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-9

(IN) 16 Installation Relay Mounting

5TE

10TE

15TE

20TE

25TE

30TE

35TE

P0147ENd

Figure 2 - Rack mounting of relays

Relays can be mechanically grouped into single tier (4U) or multi-tier arrangements by the rack frame. This enables schemes using MiCOM products to be pre-wired together prior to mounting.

Use blanking plates if there are empty spaces. The spaces may be for future installation of relays or because the total size is less than 80TE on any tier. Blanking plates can also be used to mount ancillary components. The following Blanking plates table shows the sizes that can be ordered.

Note Blanking plates are only available in black.

Case size summation Blanking plate part number

40TE

Table 2 - Blanking plates

GJ2028 101

GJ2028 102

GJ2028 103

GJ2028 104

GJ2028 105

GJ2028 106

GJ2028 107

GJ2028 108

Page (IN) 16-10 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Relay Mounting

3.2

(IN) 16 Installation

Panel Mounting

The relays can be flush mounted into panels using M4 SEMS Taptite self-tapping screws with captive 3 mm thick washers (also known as a SEMS unit). These fastenings are available in packs of 5 (part number ZA0005 104).

20TE

25TE

30TE

35TE

40TE

45TE

50TE

55TE

60TE

65TE

70TE

75TE

Alternatively tapped holes can be used if the panel has a minimum thickness of 2.5 mm.

For applications where relays need to be semi-projection or projection mounted, a range of collars are available from the Schneider Electric Contracts Department.

If several relays are mounted in a single cut-out in the panel, mechanically group them together horizontally or vertically to form rigid assemblies prior to mounting in the panel.

Note Fastening MiCOM relays with pop rivets is not advised because this does not allow easy removal if repair is necessary.

Rack-mounting panel-mounted versions : it is possible to rack-mount some relay versions which have been designed to be panel-mounted. The relay is mounted on a single-tier rack frame, which occupies the full width of the rack. To make sure a panelmounted relay assembly complies with BS EN60529 IP52, fit a metallic sealing strip between adjoining relays (Part No GN2044 001) and a sealing ring from the following

IP52 sealing rings table around the complete assembly.

Width Single tier Double tier

10TE

15TE

GJ9018 002

GJ9018 003

GJ9018 018

GJ9018 019

GJ9018 004

GJ9018 005

GJ9018 006

GJ9018 007

GJ9018 008

GJ9018 009

GJ9018 010

GJ9018 011

GJ9018 012

GJ9018 013

GJ9018 014

GJ9018 015

80TE

Table 3 - IP52 sealing rings

GJ9018 016

GJ9018 020

GJ9018 021

GJ9018 022

GJ9018 023

GJ9018 024

GJ9018 025

GJ9018 026

GJ9018 027

GJ9018 028

GJ9018 029

GJ9018 030

GJ9018 031

GJ9018 032

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(IN) 16 Installation

4

4.1

Relay Wiring

RELAY WIRING

This section serves as a guide to selecting the appropriate cable and connector type for each terminal on the MiCOM relay.

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/Safety Guide SFTY/5L M/L11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

Medium and Heavy Duty Terminal Block Connections

Key:

Heavy duty terminal block: CT and VT circuits, terminals with “D” prefix

Medium duty: All other terminal blocks (grey color)

Loose relays are supplied with sufficient M4 screws for making connections to the rear mounted terminal blocks using ring terminals, with a recommended maximum of two ring terminals per relay terminal.

If required, Schneider Electric can supply M4 90° crimp ring terminals in three different sizes depending on wire size (see the M4 90° crimp ring terminals table). Each type is available in bags of 100.

Part number Wire size Insulation colour

ZB9124 901

ZB9124 900

ZB9124 904

0.25 – 1.65mm

2

(22 – 16AWG)

1.04 – 2.63mm

2

(16 – 14AWG)

2.53 – 6.64mm

2

(12 – 10AWG)

Red

Blue

Uninsulated*

Note * To maintain the terminal block insulation requirements for safety, fit an insulating sleeve over the ring terminal after crimping.

Table 4 - M4 90° crimp ring terminals

The following minimum wire sizes are recommended:

Current Transformers 2.5mm

2

Auxiliary Supply Vx 1.5mm

2

RS485 Port See separate section

Rotor winding to P391 1.0mm

2

Other circuits 1.0mm

2

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of the medium or heavy duty terminals is 6.0mm

2

using ring terminals that are not preinsulated. Where it required to only use pre-insulated ring terminals, the maximum wire size that can be used is reduced to 2.63mm

2

per ring terminal. If a larger wire size is required, two wires should be used in parallel, each terminated in a separate ring terminal at the relay.

The wire used for all connections to the medium and heavy duty terminal blocks, except the RS485 port, should have a minimum voltage rating of 300Vrms.

It is recommended that the auxiliary supply wiring should be protected by a 16A High

Rupture Capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must never be fused. Other circuits should be appropriately fused to protect the wire used.

Note The high-break contacts optional fitted to P44y (P443/P446) and P54x relays are polarity sensitive. External wiring must respect the polarity requirements which are shown on the external connection diagram to ensure correct operation.

Page (IN) 16-12 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Relay Wiring

4.2

4.3

4.4

4.5

4.6

(IN) 16 Installation

Each opto input has selectable filtering. This allows use of a pre-set filter of ½ cycle which renders the input immune to induced noise on the wiring: although this method is secure it can be slow, particularly for intertripping. This can be improved by switching off the ½ cycle filter in which case one of the following methods to reduce ac noise should be considered. The first method is to use double pole switching on the input, the second is to use screened twisted cable on the input circuit. The recognition time of the opto inputs without the filtering is <2 ms and with the filtering is <12 ms.

EIA(RS)485 Port

Connections to the first rear EIA(RS)485 port use ring terminals. 2-core screened cable is recommended with a maximum total length of 1000m or 200nF total cable capacitance.

A typical cable specification would be:

Each core:

Nominal conductor area:

16/0.2mm copper conductors. PVC insulated

0.5mm

2

per core

Screen: Overall braid, PVC sheathed

See the SCADA Communications chapter for details of setting up an EIA(RS)485 bus.

Current Loop Input Output (CLIO) Connections (if applicable)

Where current loop inputs and outputs are available on a MiCOM relay, the connections are made using screw clamp connectors, as per the RTD inputs, on the rear of the relay which can accept wire sizes between 0.1 mm

2

and 1.5 mm

2

. It is recommended that connections between the relay and the current loop inputs and outputs are made using a screened cable. The wire should have a minimum voltage rating of 300 Vrms.

IRIG-B Connections (if applicable)

The IRIG-

B input and BNC connector have a characteristic impedance of 50Ω. It is recommended that connections between the IRIG-B equipment and the relay are made using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.

EIA(RS)232 Port

Short term connections to the RS232 port, located behind the bottom access cover, can be made using a screened multi-core communication cable up to 15m long, or a total capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug. The Getting Started chapter of this manual details the pin allocations.

Optical Fiber Connectors (when applicable)

Warning LASER LIGHT RAYS: Where fibre optic communication devices are fitted, never look into the end of a fiber optic due to the risk of causing serious damage to the eye.

Optical power meters should be used to determine the operation or signal level of the device. Non-observance of this rule could possibly result in personal injury.

If electrical to optical converters are used, they must have management of character idle state capability (for when the fibre optic cable interface is "Light off").

Specific care should be taken with the bend radius of the fibres, and the use of optical shunts is not recommended as these can degrade the transmission path over time.

The relay uses 1310nm multi mode 100BaseFx and BFOC 2.5 - (ST/LC according to the

MiCOM model) connectors (one Tx – optical emitter, one Rx – optical receiver).

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-13

(IN) 16 Installation

4.7

4.7.1

4.7.2

4.8

Relay Wiring

Ethernet Port for IEC 61850 and/or DNP3.0 (where applicable)

Fiber Optic (FO) Port

The relays can have 100 Mbps Ethernet port. Fibre Optic (FO) connection is recommended for use in permanent connections in a substation environment. The

100 Mbit port uses a type ST/LC connector (according to the MiCOM model), compatible with fiber multimode 50/125 µm or 62.5/125 µm to 1310 nm.

Note The new LC fiber optical connector can be used with the Px40 Enhanced

Ethernet Board.

RJ-45 Metallic Port

3

4

5

6

7

The user can connect to either a 10Base-T or a 100Base-TX Ethernet hub; the port will automatically sense which type of hub is connected. Due to possibility of noise and interference on this part, it is recommended that this connection type be used for shortterm connections and over short distance. Ideally, where the relays and hubs are located in the same cubicle.

The connector for the Ethernet port is a shielded RJ-45. The following Signals on the

Ethernet connector table shows the signals and pins on the connector.

Pin Signal name Signal definition

1

2

TXP

TXN

Transmit (positive)

Transmit (negative)

RXP

-

-

RXN

-

8 -

Table 5 - Signals on the Ethernet connector

Receive (positive)

Not used

Not used

Receive (negative)

Not used

Not used

RTD Connections (if applicable)

Where RTD inputs are available on a MiCOM relay, the connections are made using screw clamp connectors on the rear of the relay that can accept wire sizes between

0.1 mm

2

and 1.5 mm

2

. The connections between the relay and the RTDs must be made using a screened 3-core cable with a total resistance less than 10

Ω. The cable should have a minimum voltage rating of 300 Vrms.

A 3-core cable should be used even for 2-wire RTD applications, as it allows for the cable’s resistance to be removed from the overall resistance measurement. In such cases the third wire is connected to the second wire at the point the cable is joined to the

RTD.

The screen of each cable must only be earthed at one end, preferably at the relay end and must be continuous. Multiple earthing of the screen can cause circulating current to flow along the screen, which induces noise and is unsafe.

It is recommended to minimize noise pick-up in the RTD cables by keeping them close to earthed metal casings and avoiding areas of high electromagnetic and radio interference.

The RTD cables should not be run adjacent to or in the same conduit as other high voltage or current cables.

A typical cable specification would be:

Each core:

Nominal conductor area:

Screen:

7/0.2 mm copper conductors heat resistant PVC insulated

0.22 mm

2

per core

Nickel-plated copper wire braid heat resistant PVC sheathed

Page (IN) 16-14 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Relay Wiring (IN) 16 Installation

4.9

4.10

The extract below may be useful in defining cable recommendations for the RTDs:

Noise pick-up by cables can be categorized in to three types:

Resistive

Capacitive

Inductive

Resistive coupling requires there to be an electrical connection to the noise source.

So assuming that the wire and cable insulation is sound and that the junctions are clean then this can be dismissed.

Capacitive coupling requires there to be sufficient capacitance for the impedance path to the noise source to be small enough to allow for significant coupling. This is a function of the dielectric strength between the signal cable on the noise source and the potential (i.e. power) of the noise source.

Inductive coupling occurs when the signal cable is adjacent to a cable/wire carrying the noise or it is exposed to a radiated EMF.

Standard screened cable is normally used to protect against capacitively coupled noise, but in order for it to be effective the screen must only be bonded to the system ground at one point, otherwise a current could flow and the noise would be coupled in to the signal wires of the cable. There are different types of screening available, but basically there are two types: aluminum foil wrap and tin-copper braid.

Foil screens are good for low to medium frequencies and braid is good for high frequencies. High-fidelity screen cables provide both types.

Protection against magnetic inductive coupling requires very careful cable routing and magnetic shielding. The latter can be achieved with steel-armored cable and the use of steel cable trays. It is important that the armor of the cable is grounded at both ends so that the EMF of the induced current cancels the field of the noise source and hence shields the cables conductors from it. (However, the design of the system ground must be considered and care taken to not bridge two isolated ground systems since this could be hazardous and defeat the objectives of the original ground design). The cable should be laid in the cable trays as close as possible to the metal of the tray and under no circumstance should any power cable be in or near to the tray. (Power cables should only cross the signal cables at 90 degrees and never be adjacent to them).

Both the capacitive and inductive screens must be contiguous from the RTD probes to the relay terminals.

The best types of cable are those provided by the RTD manufactures. These tend to be three conductors (a so-called "triad") which are screened with foil. Such triad cables are available in armored forms as well as multi-triad armored forms.

Download/Monitor Port

Short term connections to the download/monitor port, located behind the bottom access cover, can be made using a screened 25-core communication cable up to 4m long. The cable should be terminated at the relay end with a 25-way, metal shelled, D-type male plug.

The Getting Started and Commissioning chapters this manual details the pin allocations.

Second EIA(RS)232/485 Port

Relays with Courier, MODBUS, IEC 60870-5-103 or DNP3 protocol on the first rear communications port have the option of a second rear port, running Courier language.

The second rear communications port can be used over one of three physical links:

• twisted pair K-Bus (non-polarity sensitive),

• twisted pair EIA(RS)485 (connection polarity sensitive) or

EIA(RS)232. This EIA(RS)232 port is actually compliant to EIA(RS)574; the 9-pin version of EIA(RS)232, see www.tiaonline.org

.

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-15

(IN) 16 Installation

4.10.1

4.10.1.1

4.10.1.2

Relay Wiring

Connection to the Second Rear Port

The second rear Courier port connects via a 9-way female D-type connector (SK4) in the middle of the card end plate (in between IRIG-B connector and lower D-type). The connection is compliant to EIA(RS)574.

For IEC 60870-5-2 over EIA(RS)232/574

Pin Connection

1

2

3

4

5

6

No Connection

RxD

TxD

DTR#

Ground

No Connection

7

8

9

RTS #

CTS #

No Connection

# - These pins are control lines for use with a modem.

Table 6 - Pin connections for IEC 60870-5-2 over EIA(RS)232/574

Connections to the second rear port configured for EIA(RS)232 operation can be made using a screened multi-core communication cable up to 15 m long, or a total capacitance of 2500 pF. The cable should be terminated at the relay end with a 9-way, metal shelled,

D-type male plug. The table above details the pin allocations.

For K-bus or IEC 60870-5-2 over EIA(RS)485

Pin*

4

7

EIA(RS)485 - 1 (+ ve)

EIA(RS)485 - 2 (- ve)

* - All other pins unconnected.

Connection

Note Connector pins 4 and 7 are used by both the EIA(RS)232/574 and EIA(RS)485 physical layers, but for different purposes. Therefore, the cables should be removed during configuration switches.

For the EIA(RS)485 protocol an EIA(RS)485 to EIA(RS)232/574 converter will be required to connect a modem or PC running MiCOM S1 Studio, to the relay. A

Schneider Electric CK222 is recommended.

EIA(RS)485 is polarity sensitive, with pin 4 positive (+) and pin 7 negative (-).

The K-Bus protocol can be connected to a PC via a KITZ101 or 102.

It is recommended that a 2-core screened cable be used. To avoid exceeding the second communications port flash clearances it is recommended that the length of cable between the port and the communications equipment should be less than

300 m. This length can be increased to 1000 m or 200nF total cable capacitance if the communications cable is not laid in close proximity to high current carrying conductors. The cable screen should be earthed at one end only.

Table 7 - Pin connections for K-bus or IEC 60870-5-2 over EIA(RS)485

A typical cable specification would be:

Each core:

Nominal conductor area:

Screen:

16/0.2mm copper conductors. PVC insulated

0.5mm

2

per core

Overall braid, PVC sheathed

Page (IN) 16-16 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Relay Wiring

4.11

4.12

(IN) 16 Installation

Earth Connection (Protective Conductor)

Every relay must be connected to the local earth bar using the M4 earth studs in the bottom left hand corner of the relay case. The minimum recommended wire size is

2.5mm

2

and should have a ring terminal at the relay end.

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of the medium or heavy duty terminals is 6.0mm

2

per wire. If a greater cross-sectional area is required, two parallel connected wires, each terminated in a separate ring terminal at the relay, or a metal earth bar could be used.

Note To prevent any possibility of electrolytic action between brass or copper earth conductors and the rear panel of the relay, precautions should be taken to isolate them from one another. This could be achieved in a number of ways, including placing a nickel-plated or insulating washer between the conductor and the relay case, or using tinned ring terminals.

Warning Before carrying out any work on the equipment, you should be familiar with the contents of the Safety

Information chapter/Safety Guide SFTY/5L M/L11 or later issue, the Technical Data chapter and the ratings on the equipment rating label.

P391 Rotor Earth Fault Unit (REFU) Mounting

Under rotor earth fault conditions, DC currents of up to 29mA can appear in the earth circuit. Accordingly, the P391 must be permanently connected to the local earth via the protective conductor terminal provided.

This section serves as a guide to selecting the appropriate cable and connector type for each terminal on the P391 unit.

4.12.1 Medium Duty Terminal Block Connections

Information about the medium duty terminal block connections is described in the

Medium and Heavy Duty Terminal Block Connections section.

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-17

(IN) 16 Installation Relay Wiring

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of the medium terminals is 6.0 mm

2

using ring terminals that are not pre-insulated

(protective conductor terminal (PCT) only). All P391 terminals, except PCT shall be preinsulated ring terminals, the maximum wire size that can be used is reduced to 2.63 mm

2 per ring terminal.

Wiring between the DC rotor winding and the P391 shall be suitably rated to withstand at least twice the rotor winding supply voltage to earth. The wire used for other P391 connections to the medium duty terminal blocks should have a minimum voltage rating of

300 Vrms.

The dielectric withstand of P391 injection resistor connections (A16, B16, A8, B8) to earth is 5.8 kV rms, 1 minute.

It is recommended that the auxiliary supply wiring should be protected by a High Rupture

Capacity (HRC) fuse of type NIT or TIA, rated between 2 A and 16 A. Other circuits should be appropriately fused to protect the wire used.

Page (IN) 16-18 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Case Dimensions

5

(IN) 16 Installation

CASE DIMENSIONS

The MiCOM range of products are available in a series of different case sizes.

The case sizes available for each product are shown here:

Range Case Size

P14x

P24x

P34x

P441

P44x

P44y

P445

40TE

P141, P142

P241

P341, P342

P441

P541

P542

P54x

P547

P445

P541

P64x

P74x

P746

P841

P642

P742

P849

Table 8 - Products and case sizes

60TE

P143, P145

P242

P341, P342, P343

P442

P445

P542

P543, P544

P643, P645

P743

P841

80TE

P143

P243

P343, P344, P345

P444

P443, P446

P545, P546

P547

P645

P741

P746

P841

P849

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-19

(IN) 16 Installation

5.1 40TE Case Dimensions

Case Dimensions

Figure 3 - 40TE Case Dimensions

P1647ENe

Page (IN) 16-20 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

Case Dimensions

5.2 60TE Case Dimensions

(IN) 16 Installation

P1616ENi

Figure 4 - 60TE Case Dimensions

P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03 Page (IN) 16-21

(IN) 16 Installation

5.3 80TE Case Dimensions

Case Dimensions

P1616ENj

Figure 5 - 80TE Case Dimensions

Page (IN) 16-22 P14x, P24x, P34x, P44x, P44y, P445, P54x, P547, P74x, P746, P841 and P849/EN IN/A03

MiCOM P54x (P543, P544, P545 & P546) (CD) 17 Connection Diagrams

P54x/EN CD/Nd5

CONNECTION DIAGRAMS

CHAPTER 17

Page (CD) 17-1

(CD) 17 Connection Diagrams MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (CD) 17-2 P54x/EN CD/Nd5

Contents (CD) 17 Connection Diagrams

CONTENTS

1 Communication Options

2 P543 External Connection Diagrams

3 P544 External Connection Diagrams

4 P545 External Connection Diagrams

5 P546 External Connection Diagrams

Page (CD) 17-

11

16

22

5

7

FIGURES

Page (CD) 17-

Figure 1 - Comms. Options MiCOM Px40 platform

Figure 2 – External communications option MiCOM Px40 platform

Figure 3 - P543 - external connection diagram - standard outputs

Figure 4 - P543 - inputs/outputs default mapping - standard outputs

Figure 5 - P543 - high break outputs

Figure 6 - P543 - inputs/outputs default mapping - high-break outputs

Figure 7 - P544 - external connection diagram - standard outputs

Figure 8 - P544 - 16 inputs/outputs default mapping - 14 standard outputs

Figure 9 - P544 - 16 inputs/outputs default mapping - 14 standard outputs

Figure 10 - P544 - 16 inputs/outputs default mapping - 7 standard & 4 high-break outputs 14

Figure 11 - P544 - 16 inputs/outputs default mapping - 7 standard & 4 high-break outputs 15

Figure 12 - P545 - external connection diagram - standard outputs

Figure 13 - P545 - inputs/outputs default mapping - standard outputs

Figure 14 - P545 - 16 standard and 8 high-break outputs

16

17

18

Figure 15 - P545 - 24 inputs/outputs default mapping - 16 standard and 8 high-break outputs 19

Figure 16 - P545 - 32 optos, 32 relays, Distance, 1 or 3 Pole Tripping, Auto-Reclose and Chk Sync Sheet 1

Figure 17 - P545 - 32 optos, 32 relays, Distance, 1 or 3 Pole Tripping, Auto-Reclose

20 and Chk Sync Sheet 2

Figure 18 - P546 - external connection diagram - standard outputs

Figure 19 - P546 - 24 inputs/32 outputs default mapping - standard & high-break outputs 23

Figure 20 - P546 - 24 opto inputs/32 outputs default mapping - standard & highbreak outputs

21

22

24

9

10

11

12

13

5

6

7

8

P54x/EN CD/Nd5 Page (CD) 17-3

(CD) 17 Connection Diagrams Figures

Figure 21 - P546 - 24 inputs/outputs default mapping – 16 standard & 8 high-break outputs 25

Figure 22 - P546 - 24 inputs/outputs default mapping – 16 standard & 8 high-break outputs 26

Figure 23 - P546 - 24 inputs/outputs default mapping – 8 Standard & 12 high-break outputs 27

Figure 24 - P546 - 24 inputs/outputs default mapping – 8 Standard & 12 high-break outputs 28

Figure 25 - P546 Final assembly drawing 29

Page (CD) 17-4 P54x/EN CD/Nd5

Communication Options

1 COMMUNICATION OPTIONS

(CD) 17 Connection Diagrams

16 SC

Figure 1 - Comms. Options MiCOM Px40 platform

P54x/EN CD/Nd5

P1727ENb

Page (CD) 17-5

(CD) 17 Connection Diagrams Communication Options

Figure 2 – External communications option MiCOM Px40 platform

10Px4001_2_A P1727ENh

Page (CD) 17-6 P54x/EN CD/Nd5

P543 External Connection Diagrams

2

(CD) 17 Connection Diagrams

P543 EXTERNAL CONNECTION DIAGRAMS

Figure 3 - P543 - external connection diagram - standard outputs

P54x/EN CD/Nd5

10P54302 Sheet 1 Issue B

P2291ENa

Page (CD) 17-7

(CD) 17 Connection Diagrams P543 External Connection Diagrams

Figure 4 - P543 - inputs/outputs default mapping - standard outputs

10P54302 Sheet 2 Issue D

P2292ENa

Page (CD) 17-8 P54x/EN CD/Nd5

P543 External Connection Diagrams (CD) 17 Connection Diagrams

Figure 5 - P543 - high break outputs

P54x/EN CD/Nd5

10P54303 Sheet 1 Issue B

P2293ENa

Page (CD) 17-9

(CD) 17 Connection Diagrams P543 External Connection Diagrams

Figure 6 - P543 - inputs/outputs default mapping - high-break outputs

10P54303 Sheet 2 Issue B

P2294ENa

Page (CD) 17-10 P54x/EN CD/Nd5

P544 External Connection Diagrams

3

(CD) 17 Connection Diagrams

P544 EXTERNAL CONNECTION DIAGRAMS

Figure 7 - P544 - external connection diagram - standard outputs

10P54400 Sheet 1 Issue B

P2295ENa

P54x/EN CD/Nd5 Page (CD) 17-11

(CD) 17 Connection Diagrams P544 External Connection Diagrams

Figure 8 - P544 - 16 inputs/outputs default mapping - 14 standard outputs

10P54404 Sheet 1 Issue B

P2296ENa

Page (CD) 17-12 P54x/EN CD/Nd5

P544 External Connection Diagrams (CD) 17 Connection Diagrams

Figure 9 - P544 - 16 inputs/outputs default mapping - 14 standard outputs

10P54404 Sheet 2 Issue A.3

P2297ENa

P54x/EN CD/Nd5 Page (CD) 17-13

(CD) 17 Connection Diagrams P544 External Connection Diagrams

10P54405 Sheet 1 Issue B

P2298ENa

Figure 10 - P544 - 16 inputs/outputs default mapping - 7 standard & 4 high-break outputs

Page (CD) 17-14 P54x/EN CD/Nd5

P544 External Connection Diagrams (CD) 17 Connection Diagrams

10P54405 Sheet 2 Issue B

P2299ENa

Figure 11 - P544 - 16 inputs/outputs default mapping - 7 standard & 4 high-break outputs

P54x/EN CD/Nd5 Page (CD) 17-15

(CD) 17 Connection Diagrams

4

P545 External Connection Diagrams

P545 EXTERNAL CONNECTION DIAGRAMS

Figure 12 - P545 - external connection diagram - standard outputs

Page (CD) 17-16

10P54502 Sheet 1 Issue B

P2300ENa

P54x/EN CD/Nd5

P545 External Connection Diagrams (CD) 17 Connection Diagrams

Figure 13 - P545 - inputs/outputs default mapping - standard outputs

10P54502 Sheet 2 Issue C

P2301ENa

P54x/EN CD/Nd5 Page (CD) 17-17

(CD) 17 Connection Diagrams P545 External Connection Diagrams

Figure 14 - P545 - 16 standard and 8 high-break outputs

Page (CD) 17-18

10P54503 Sheet 1 Issue B

P2302ENa

P54x/EN CD/Nd5

P545 External Connection Diagrams (CD) 17 Connection Diagrams

10P54503 Sheet 2 Issue B

P2303ENa

Figure 15 - P545 - 24 inputs/outputs default mapping - 16 standard and 8 high-break outputs

P54x/EN CD/Nd5 Page (CD) 17-19

(CD) 17 Connection Diagrams P545 External Connection Diagrams

A

P2

B

S2

C

PARALLEL LINE

PROTECTION

S1

P1

NOTES 1.

(a)

(b)

A

DIRECTION OF FORWARD CURRENT F

A

P2

B

S2

C

S1

C B

PHASE RO TA TION

NOTE 6 a

A B C b c

N n

NOTE 5.

NOTE 2.

P1

A

I N

SENSITIVE

I

M

NOTE

4.

C B

PHASE ROTATION

SEE NOTE 6

D1 5A

MiCOM P545 (PART)

I A

D2

D3

D4

1A

5A

I

B

D5

D6

D7

1A

5A

I C

D8

D9

D10

D11

D12

D13

1A

5A

1A

5A

D14

D15

1A

V A

D19

C.T. SHORTING LINKS

PINTERMINAL (P.C.B.TYPE)

2. USED FOR SEF P

DRIVEN FROM ACORE BALANCECTWHEN SENSITIVE

IN LINEPARAMETERS.

8. WITH C.T. POLARITY SETTING 'STANDARD'.

V BUSBAR

(SEE NOTE 3.)

V B D20

V C D21

VN

D22

D23

D24

F4

F5

F6

F7

F8

F9

F10

F11

F12

F13

F14

F15

F16

F17

F18

F1

F2

F3

G15

G16

G17

G18

G2

G3

G4

G5

G6

G7

G8

C17

C18

G1

G9

G10

G11

G12

G13

G14

E1

E2

E3

E4

E5

E6

E7

E8

E9

E10

E11

E12

E13

E14

C2

C3

C4

C5

C6

C7

C8

C9

C10

C11

E15

E16

E17

E18

C1

C12

C13

C14

C15

C16

-

+

-

+

-

+

-

+

-

-

+

+

-

+

-

+

-

-

+

-

+

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

+

-

-

+

-

+

-

+

-

+

-

+

+

-

+

-

-

+

-

+

-

+

OPTO 1

OPTO 2

OPTO 3

OPTO 4

OPTO 5

OPTO 6

OPTO 7

OPTO 8

COMMON

CONNECTION

OPTO 9

OPTO 10

OPTO 11

OPTO 12

OPTO 13

OPTO 14

OPTO 15

OPTO 16

COMMON

CONNECTION

OPTO 17

OPTO 18

OPTO 19

OPTO 20

OPTO 21

OPTO 22

OPTO 23

OPTO 24

COMMON

CONNECTION

OPTO 25

OPTO 26

OPTO 27

OPTO 28

OPTO 29

OPTO 30

OPTO 31

OPTO 32

COMMON

CONNECTION

RELAY 25

RELAY 26

RELAY 27

RELAY 28

RELAY 29

RELAY 30

RELAY 31

RELAY 32

EIA485/

PORT

-

+

M17

M18

M16

SCN

V x

AC OR DC

AUX SUPPLY

48V DC FIELD

VOLTAGE OUT

CASE

EARTH

-

+

-

+

-

+

M1

M2

M7

M8

M9

M10

*

H1

H2

H3

H4

H5

H6

H7

H8

H9

H10

H11

H12

H13

H14

H15

H16

H17

H18

MiCOM P545 (PART)

NOTE 7

*

K1

K2

K3

K4

K5

K6

K7

K8

K9

K10

K11

K12

K13

K14

K15

K16

K17

K18

J5

J6

J7

J8

J9

J10

J1

J2

J3

J4

J11

J12

J13

J14

J15

J16

J17

J18

L9

L10

L11

L12

L13

L14

L15

L16

L17

L18

M11

M12

M13

M14

L1

L2

L3

L4

L5

L6

L7

L8

TX1

RX1

TX2

RX2

RX1

WATCHDOG

CONTACT

RELAY 1

RELAY 2

RELAY 3

RELAY 4

RELAY 5

RELAY 6

RELAY 7

RELAY 8

RELAY 9

RELAY 10

RELAY 11

RELAY 12

RELAY 13

RELAY 14

RELAY 15

RELAY 16

RELAY 17

RELAY 18

RELAY 19

RELAY 20

RELAY 21

RELAY 22

RELAY 23

RELAY 24

FIBRE OPTIC

CATION

CURR DIFF

CONNECTTO P594

10P54504-1 A.1 18/04/2007

P0694ENa

Figure 16 - P545 - 32 optos, 32 relays, Distance, 1 or 3 Pole Tripping, Auto-Reclose and Chk Sync Sheet 1

Page (CD) 17-20 P54x/EN CD/Nd5

P545 External Connection Diagrams (CD) 17 Connection Diagrams

CUSTOMER SETTING DEFAULT SETTING

INHIBIT DIFF

RECON INTERLOCK

AID 1 RECEIVE

AID 1 COS/LGS

RESET LEDs

EXT TRIP A

EXT TRIP B

EXT TRIP C

CB AUXA 52-B

CB AUXB 52-B

CB AUXC 52-B

MCB/VTS

CB CLOSE MAN

RESET LCKOUT

CB HEALTHY

BAR

PIT

PROP DLY EQ

IM64 1

IM64 2

IM64 3

IM64 4

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

OPTO 1

OPTO 2

OPTO 3

OPTO 4

OPTO 5

OPTO 6

OPTO 7

OPTO 8

COMMON

CONNECTION

OPTO 9

OPTO 10

OPTO 11

OPTO 12

OPTO 13

OPTO 14

OPTO 15

OPTO 16

COMMON

CONNECTION

OPTO 17

OPTO 18

OPTO 19

OPTO 20

OPTO 21

OPTO 22

OPTO 23

OPTO 24

COMMON

CONNECTION

OPTO 25

OPTO 26

OPTO 27

OPTO 28

OPTO 29

OPTO 30

OPTO 31

OPTO 32

G15

G16

G17

G18

F1

F2

F3

F4

F5

F6

F7

F8

F9

F10

F11

F12

F13

F14

F15

F16

F17

F18

G1

G2

G3

G4

G5

G6

G7

G8

G9

G10

G11

G12

G13

G14

E1

E2

E3

E4

E5

E6

E7

E8

E9

E10

E11

E12

E13

E14

E15

E16

E17

E18

C1

C2

C3

C4

C5

C6

C7

C8

C9

C10

C11

C12

C13

C14

C15

C16

C17

C18

+

-

+

-

+

-

-

+

-

+

-

+

-

+

-

+

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

-

+

SEE NOTE 1

SEE NOTE 1

SEE NOTE 1

MiCOM P545

(PART)

SEE NOTE 1

SEE NOTE 1

SEE NOTE 1

SEE NOTE 1

SEE NOTE 1

-

L15

L16

L17

L18

L3

L4

L5

L6

L7

L8

L9

L10

L11

L12

L13

L14

M11

M12

M13

M14

L1

L2

K1

K2

K3

K4

K5

K6

K7

K8

K9

K10

K11

K12

K13

K14

K15

K16

K17

K18

J1

J2

J3

J4

J5

J6

J7

J8

J9

J10

J11

J12

J13

J14

J15

J16

J17

J18

H1

H2

H3

H4

H5

H6

H7

H8

H9

H10

H11

H12

H13

H14

H15

H16

H17

H18

WATCHDOG

CONTACT

RELAY 1

RELAY 2

RELAY 3

RELAY 4

RELAY 5

RELAY 6

RELAY 7

RELAY 8

RELAY 9

RELAY 10

RELAY 11

RELAY 12

RELAY 13 SUCCESSFU L CLOSE

RELAY 14

AR LOCKOU T

RELAY 15

RELAY 16

RELAY 17

RELAY 18

RELAY 19

RELAY 20

RELAY 21

RELAY 22

RELAY 23

RELAY 24

RELAY 25

RELAY 26

RELAY 27

RELAY 28

RELAY 29

RELAY 30

RELAY 31

RELAY 32

DEFAULT SETTING

TRIP Z1

SIGNALING FAIL

ANY TRIP

GENERA L ALARM

IM64 1

CB FAIL TIME 1

CNTL CB CLOSE

CNTL CB TRIP

TRIP A

TRIP B

TRIP C

AR IN PROG

AR INSERVICE

BAR

TRIP A

TRIP B

TRIP C

DIST INS TRP

DIST DLY TRP

AID DEF TRIP

ANY START

AID 1 SEND

GPS FAIL

DIFF TRIP

VTS

PSB

IM64 2

IM64 3

IM64 4

NOT USED

CUSTOMER SETTING

NOTE1:

ONLY FOR RELAYS WITH DISTANCE PROTECTION OPTION.

10P54504-2 A.1 18/04/2007

P0695ENa

Figure 17 - P545 - 32 optos, 32 relays, Distance, 1 or 3 Pole Tripping, Auto-Reclose and Chk Sync Sheet 2

P54x/EN CD/Nd5 Page (CD) 17-21

(CD) 17 Connection Diagrams

5

P546 External Connection Diagrams

P546 EXTERNAL CONNECTION DIAGRAMS

Figure 18 - P546 - external connection diagram - standard outputs

10P54600 Sheet 1 Issue B

P2304ENa

Page (CD) 17-22 P54x/EN CD/Nd5

P546 External Connection Diagrams (CD) 17 Connection Diagrams

10P54604 Sheet 1 Issue B

P2305ENa

Figure 19 - P546 - 24 inputs/32 outputs default mapping - standard & high-break outputs

P54x/EN CD/Nd5 Page (CD) 17-23

(CD) 17 Connection Diagrams P546 External Connection Diagrams

10P54604 Sheet 2 Issue B

P2306ENa

Figure 20 - P546 - 24 opto inputs/32 outputs default mapping - standard & high-break outputs

Page (CD) 17-24 P54x/EN CD/Nd5

P546 External Connection Diagrams (CD) 17 Connection Diagrams

10P54605 Sheet 1 Issue B

P2307ENa

Figure 21 - P546 - 24 inputs/outputs default mapping – 16 standard & 8 high-break outputs

P54x/EN CD/Nd5 Page (CD) 17-25

(CD) 17 Connection Diagrams P546 External Connection Diagrams

10P54605 Sheet 2 Issue B

P2438ENa

Figure 22 - P546 - 24 inputs/outputs default mapping – 16 standard & 8 high-break outputs

Page (CD) 17-26 P54x/EN CD/Nd5

P546 External Connection Diagrams (CD) 17 Connection Diagrams

10P54606 Sheet 1 Issue B

P2439ENa

Figure 23 - P546 - 24 inputs/outputs default mapping – 8 Standard & 12 high-break outputs

P54x/EN CD/Nd5 Page (CD) 17-27

(CD) 17 Connection Diagrams P546 External Connection Diagrams

10P54606 Sheet 2 Issue B

P2440ENa

Figure 24 - P546 - 24 inputs/outputs default mapping – 8 Standard & 12 high-break outputs

Page (CD) 17-28 P54x/EN CD/Nd5

P546 External Connection Diagrams (CD) 17 Connection Diagrams

Figure 25 - P546 Final assembly drawing

P54x/EN CD/Nd5

GN0364 – Sheet 1 – Issue E

P2441ENa

Page (CD) 17-29

(CD) 17 Connection Diagrams

Notes:

P546 External Connection Diagrams

Page (CD) 17-30 P54x/EN CD/Nd5

MiCOM Px4x (CS) 18 Cyber Security

Px4x/EN CS/A14

CYBER SECURITY

CHAPTER 18

Page (CS) 18-1

(CS) 18 Cyber Security MiCOM Px4x

Date (month/year):

Products covered by this chapter:

Software Version:

Hardware Suffix:

06/2016

G4

H4

J4

L

M

L/M

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

P14x = P141, P142, P143 & P145

P44x = P442 & P444

P44y = P443 & P446

P54x = P543, P544, P545 & P546

P445

P64x = P642, P643 & P645

P74x = P741, P742 & P743

P746

P841 = P841A & P841B (P841A = one circuit breaker) (P841B = two circuit breakers)

P849

B1A

B2A

B3A/C3A

E1A

P34x

P74x

P849

P14x

P64x

P746

P44x

P841A

P44y

P54x

P841B

P445

P445

P14x

P44x

P64x

P74x

P746

P849

P44y

P54x

P841A

P841B

Note This chapter covers the combinations of Products, Software

Versions and Hardware Suffixes identified in this table. If you are using earlier software or hardware suffixes, please refer to the

Schneider Electric Customer Care Centre (www.schneiderelectric.com/ccc) for details of which version of this Cyber Security chapter you need to refer to.

Page (CS) 18-2 Px4x/EN CS/A14

Contents (CS) 18 Cyber Security

CONTENTS

Page (CS) 18-

1 Overview

1.1

1.2

1.3

1.3.1

1.3.2

1.3.3

1.3.4

Definition

Introduction to Cyber Security

Roles, Rights and relationship between IEC62351 and MiCOM Px4x

Role Based Access Control (RBAC)

User Roles

Rights

Roles and their Access Rights

1.4

Security Administration Tool (SAT) Software

2 MICOM Px4x Cyber Security Implementation

2.1

2.1.1

2.1.2

2.1.3

2.1.4

2.1.5

2.1.5.1

2.1.5.2

2.1.6

2.1.7

2.1.8

2.1.9

2.1.10

2.2

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

MiCOM Px4x with CSL1 - Advance Cyber Security

Password Management

RBAC Management (via the SAT)

User Locking

Inactivity Timer

RBAC Recovery

Generate Security Code

Entry of the Recovery Password

Port Disablement (Equipment Hardening)

Simple Network Management Protocol (SNMP)

Security Logs

Common Cyber Security Settings

Local Default Access

MiCOM Px4x with CSL0- Simple Password Management

Password Management

Fixed Factory RBAC

Security Logs/SNMP Services

Cyber Security Settings

Disable/Blank Password

3 How to Use Cyber Security Features

3.1

3.1.1

3.1.2

3.1.3

How to Login

Local Default Access

Auto Login

Login with Prompt User List

3.2

3.2.1

3.2.2

3.3

3.4

How to Logout

How to Logout at the IED

How to Logout at MiCOM S1 Studio

How to Disable a Physical Port

How to Disable a Logical Port

13

21

21

21

21

21

21

13

17

18

20

20

13

14

15

15

16

16

16

17

22

22

22

22

22

23

23

23

23

24

5

5

5

7

7

8

9

11

11

Px4x/EN CS/A14 Page (CS) 18-3

(CS) 18 Cyber Security Tables

3.5

How to Secure a Function key

4 Glossary for Cyber Security

24

25

TABLES

Table 1 – RBAC object, subject, rights and roles definitions

Table 2 – RBAC permission and authorization rules

Table 3 – Default user roles summary for MiCOM Px4x

Table 4 – Pre-defined rights for IEC 62351-8

Table 5 – Specific rights for MiCOM Px4x

Table 6 – Pre-defined roles (and rights) for IEC 62351-8 and MiCOM Px4x

Table 7 – Main SAT user functions

Table 8 – MiCOM Px4x protocol options for cyber security options

Table 9 – Factory RBAC

Table 10 - Port hardening settings

Table 11 – Security logs recorded

Table 12 – Configurable cyber security settings

Table 13 – Un-configurable cyber security settings

Table 14 – Auto Login process

Table 15 – Glossary for cyber security

Page (CS) 18-

12

13

14

17

7

8

8

9

10

11

19

20

20

22

25

FIGURES

Figure 1 – Associated topics

Figure 2 – Continuous improvement process

Figure 3 - RBAC Role structure

Page (CS) 18-

5

6

7

Page (CS) 18-4 Px4x/EN CS/A14

Overview

1

1.1

1.2

(CS) 18 Cyber Security

OVERVIEW

Definition

Cyber security is a domain that addresses attacks on or by computer systems and through computer networks that can result in accidental or intentional disruptions.

Cyber security addresses not only deliberate attacks, such as from disgruntled employees, industrial espionage, and terrorists, but also inadvertent compromises of the information infrastructure due to user errors, equipment failures, and natural disasters.

Introduction to Cyber Security

The objective of cyber security is to provide increased levels of protection for information and physical assets from theft, corruption, misuse, or accidents while maintaining access for their intended users.

To achieve this objective the owner of the grid must take into account Cyber Security at every level of his organization by the management of an ongoing process that encompasses procedures, policies, technical (software, and hardware asset) and regulatory constraints.

The following diagram outlines some of the associated topics.

Process

Technical

Secure Network Communications

Security Secured

Protocols Communication

Access Control

Security Infrastructure Components

Firewall

IDS/

IPS

Virus

Protection

Fence Locks

Tamper

Resistant HW

Organizational

RBAC

Risk

Assessment

Trained

People

Personnel

Security

Incident

Response

Audit and

Accountability

Credential

Management

Monitoring &

Logging

Patch + Update

Management

Regulatory Constraints

Separation of

Duty

Security Policy

Laws Regulations

P0691ENa

Figure 1 – Associated topics

The asset owner needs to run a continuous improvement process as outlined here:

Px4x/EN CS/A14 Page 18-5

(CS) 18 Cyber Security Overview

Security is a Continuous

Improvement Process

Risk

Assessment

Correction Patch

Management

Technical & organization solution

Incident

Response Plan

Audit Monitoring

P0692ENa

Figure 2 – Continuous improvement process

No single solution can provide adequate protection against all cyber attacks on the control network. Schneider Electric recommends employing a “defense in depth” approach using multiple security techniques to help mitigate risk.

A secured system is to offer:

Detective controls: Monitor and record specific types of events: Security logs,

Intrusion, detection systems, Video Surveillance etc.

Preventive controls: Help blocking or controlling specific event : Antivirus, White listing, Firewall etc.

Recovery controls: Help achieve Business continuity and Disaster recovery planning objectives in case of an incident: Backup and Restore solution.

As protective relay vendor, Schneider Electric helps the grid owner to achieve by providing technical features inside the IED, described in the next chapters.

Important This product contains a cyber-security function, which manages the encryption of the data exchanged through some of the communication channels. The aim is to protect the data

(configuration and process data) from any corruption, malice, attack. Subsequently, this product might be subject to control from customs authorities. It might be necessary to request special authorization from these customs authorities before any export/import operation. For any technical question relating to the characteristics of this encryption please contact your Customer Care Centre - www.schneider-electric.com/ccc.

Page 18-6 Px4x/EN CS/A14

Overview

1.3

1.3.1

(CS) 18 Cyber Security

Roles, Rights and relationship between IEC62351 and MiCOM Px4x

Role Based Access Control (RBAC)

The Role Based Access Control (RBAC) is a method to restrict resource access to authorized users. RBAC is an alternative to traditional Mandatory Access Control (MAC) and Discretionary Access Control (DAC).

A key feature of RBAC model is that all access is through roles. A role is essentially a collection of permissions, and all users receive permissions only through the roles to which they are assigned, or through roles they inherit through the role hierarchy.

Figure 3 - RBAC Role structure

Roles are created for various job activities. The Permissions , to perform certain operations, are assigned to specific roles. Users are assigned particular roles, and through those role assignments acquire the computer permissions to perform particular computer-system functions. Since users are not assigned permissions directly, but only acquire them through their role (or roles), management of individual user rights becomes a matter of simply assigning appropriate roles to the user's account; this simplifies common operations, such as adding a user, or changing user's account.

RBAC defines four different concepts:

RBAC Standard

Definition

Description

Object

Subject

Right

An object can represent information containers (e.g. files, directories in an operating system, tables and views in a database management system) or device resources, such as IEDs.

A subject is a user of the system. Note that a subject can be a person, or an automated agent / device.

A right is the ability to access an object in order to perform certain operations

(e.g. setting a data or reading a file)

Role

A role defines a certain authority level in the system. Rights are assigned to roles.

Table 1 – RBAC object, subject, rights and roles definitions

Px4x/EN CS/A14 Page 18-7

(CS) 18 Cyber Security

1.3.2

Overview

RBAC defines three primary rules:

RBAC Rule Description

Role assignment

A subject can exercise a permission only if the subject has selected or been assigned a role.

Role authorization

A subject's active role must be authorized for the subject. With rule 1 above, this rule ensures that users can take on only roles for which they are authorized.

Permission authorization

A subject can exercise permission only if the permission is authorized for the subject's active role. With rules 1 and 2, this rule ensures that users can exercise only permissions for which they are authorized.

Table 2 – RBAC permission and authorization rules

User Roles

Different named roles are associated with different access rights. Roles and Rights are setup in a pre-defined arrangement, according to the IEC62351 standard, but customized to the MiCOM Px4x equipment.

When the user tries to access an IED, they need to login using their own username and their own password. The username/password combination is then checked against the records stored on the IED. If they are allowed to login, a message appears which shows them what Role they have been assigned to. It is the role that defines their access to the relevant parts of the system.

The default user roles for MiCOM Px4x are shown here:

Role

VIEWER

Description

Can View what objects are present within a Logical-Device by presenting the type

ID of those objects.

OPERATOR

An Operator can view what objects and values are present within a Logical-Device by presenting the type ID of those objects as well as perform control actions.

ENGINEER

An Engineer can view what objects and values are present within a Logical-Device by presenting the type ID of those objects. Moreover, an engineer has full access to

Datasets and Files and can configure the server locally or remotely.

SECADM

SECAUD Security Auditor can view audit logs

Table 3 – Default user roles summary for MiCOM Px4x

Each authorized user must be placed into at least ONE of these roles that most suits their job description. It is possible to assign a user into a different role; and/or to change the rights associated with a particular role. This means that the administrator can change the access rights for one role; and this will affect ALL the users who are assigned to that role.

It is possible for MiCOM Px4x to create the customized user roles.

Security Administrator can change subject-to-role assignments (outside the device) and role-to-right assignment (inside the device) and security policy setting; change security setting such as certificates for subject authentication and access token verification.

Page 18-8 Px4x/EN CS/A14

Overview

1.3.3

(CS) 18 Cyber Security

Rights

In a similar way in which a set of pre-defined Roles have been created, a pre-defined set of Rights have been created.

These Rights give different permissions to look at what devices may be present, what those devices may contain, manage data within those devices (directly or by using files) and configure rights for other people.

A list of the pre-defined Rights for IEC 62351-8 is given here:

Right Description

VIEW

READ

Allows the subject/role to discover what objects are present within a Logical-

Device by presenting the type ID of those objects. If this right is not granted to a subject/role, the Logical-Device for which the View right has not been granted shall not appear

Allows the subject/role to obtain all or some of the values in addition to the type and ID of objects that are present within a Logical-Device;

DATASET

REPORTING

FILEREAD

Allows the subject/role to have full management rights for both permanent and non-permanent Datasets;

Allows a subject/role to use buffered reporting as well as un-buffered reporting;

Allows the subject/role to have read rights for file objects;

FILEWRITE

CONTROL

Allows the subject/role to have write rights for file objects. This right includes the FILEREAD right

Allows a subject to perform control operations;

CONFIG Allows a subject to locally or remotely configure certain aspects of the server;

SETTINGGROUP Allows a subject to remotely configure Settings Groups;

FILEMNGT

Allows the role to transfer files to the Logical-Device, as well as delete existing files on the Logical-Device;

SECURITY

Allows a subject/role to perform security functions at both a Server/Service

Access Point and Logical-Device basis. To add Information about the concept of Rights.

Table 4 – Pre-defined rights for IEC 62351-8

The specific Rights for MiCOM Px4x are listed below. These are dependent on the IED data type. Please refer to each product MD file (Menu Database) for the IED data type.

Px4x/EN CS/A14 Page 18-9

(CS) 18 Cyber Security Overview

Rights

Authorized Actions to IED

Read Only

(SAT default_access_right)

IED Configuration

(SAT configuration_right)

HMI Display Settings

(SAT display_action_right)

Read

Write

Read/write/upload/do wnload

Read/write/select x x x x x x x x

Protection Configuration

(SAT protection_configuration_right)

Read/write

IED Commands

(SAT control_right)

Reading of Records & Events

(SAT audit_read_right)

Extraction of Records and Events

(SAT audit_write_right) x

Read/write/clear/reset

/select x

Read/select/upload

Send/accept x x

IED Function Key

(SAT fn_key_access_right)

IED Records Clear

(SAT clear_right)

Write

Read/write/clear x x

Table 5 – Specific rights for MiCOM Px4x

Page 18-10 Px4x/EN CS/A14

Overview

1.3.4

(CS) 18 Cyber Security

1.4

Px4x/EN CS/A14

Roles and their Access Rights

A complete list of the Roles and their access Rights is shown in this table:

Roles

VIEWER OPERATOR ENGINEER SECADM

Rights

VIEW

READ

DATASET

REPORTING

X

X

X

X

X

X

X

X

X

X

X

FILEREAD

FILEWRITE

FILEMNGT

X

X

X

X

CONTROL

CONFIG

SETTINGGROUP

LOGS

X

X

X

X

X

X

SECURITY X

Read Only

X X

X

X

X

X

IED Configuration

HMI Display Settings

Protection Configuration X

IED Commands

Reading of Records and

X X

X X X

Events

Extraction of Records and Events

X X

IED Function Key

X X

IED Clear

X

Table 6 – Pre-defined roles (and rights) for IEC 62351-8 and MiCOM Px4x

SECAUD

X

X

X

X

X

X

X

X

Important The reason why these are described as Default, is that it is possible to change the definitions of Roles and Rights, using the full version of the SAT software. Depending on the work done by the system administrator, it is possible that your own situation may vary from these initial recommendations.

Security Administration Tool (SAT) Software

Important This can only be used with Px4x relays with cyber security

CSL1 features.

Important For Dual Ethernet cards the SAT functionality is available on

Ethernet port 1.

Page 18-11

(CS) 18 Cyber Security Overview

The Security Administration Tool (SAT) is the security configuration tool of MiCOM Px4x equipment. It allows the security administrator to define the security policy to the IEDs.

The Security Administrator manages RBAC and security policies data. Security

Administrator defines needs to protect devices in accordance with user privileges. Thus, the system security can be configured easily and precisely.

The SAT is used by the Security Administrator to manage the system’s security database and deploys security configurations to IED(s).

The SAT allows to Manage User Accounts, Roles, Permission, Elements to Secure (ETS) and Security Server parameters without connection with devices. Information is store on the MS SQL database. This is the Offline mode. SAT allows devices management connected on network. This is the online mode.

The Role Based Access Control (RBAC) is a method to restrict resource access to authorized users. Please refer to this documentation on section “ System RBAC

Management ” for more details.

The following table contains the main user main functions of the SAT:

Category

Offline General

Administration

User Function

User Accounts Management User Account Functions:

* Creation

* Viewing

* Edition

* Sorting

Server Configuration

Offline Advanced

Administration

Users Accounts & Roles association Management

Roles Management

Associate a role to the user account

Element To Secure (ETS)

Management

Note

* Suppress

* Filtering

Roles Functions:

* Creation

* Viewing

* Edition

* Sorting

* Suppress

Define ETS which are in fact the PACiS assets present in the project (C264, PACiS Gateway,

ECOSUI, IED and SAM).

Add, Suppress and Sort permissions associated with the ETS.

Global Security Management The Global Security allows scope(s) and associate or disassociate role(s) management for each user account. The security administrator manages the current scope by the Roles:

* View Roles List, User Account List and associations User-Roles or Role-Users

* Associate / dissociate role(s) for each User Account

* Add / Suppress User account(s) for each Role

Permission access

Communication Refresh IED list

Display IED Logs

Display SAM Logs

Push RBAC and Security

Policies

Table 7 – Main SAT user functions

Define parameters:

* Password validity

* Automatic logout period

* Inactivity period

* Maximum attempts of login and lockout period

Send Security Configuration to all Devices integrating Security features.

The details of how to use the SAT are provided in the SAT documentation:

SAT (Security Administration Tool) Documentation - User Guide

This is available from the Schneider Electric website: www.schneider-electric.com.

Page 18-12 Px4x/EN CS/A14

MICOM Px4x Cyber Security Implementation

2

2.1

2.1.1

(CS) 18 Cyber Security

MICOM PX4X CYBER SECURITY IMPLEMENTATION

7

B

G

H

2

3

4

6

Schneider Electric MiCOM Px4x IEDs have always been and will continue to be equipped with state-of-the-art security measures. Due to the ever-evolving communication technology and new threats to security, this requirement is not static. Hardware and software security measures are continuously being developed and implemented to mitigate the associated threats and risks.

Considered some users may not want to use the cyber security, Schneider Electric offers

MiCOM Px4x relays with CSL0 and CSL1 as below:

CSL0: Simple password management, No SAT required.

CSL1: Advanced cyber security, SAT required.

This depends on the model number, as CSL1 is depend on the Ethernet communication. Hence if the IED if supports only legacy protocol this will be CLS0 default as. The digit position number 9 (protocol options) in the Cortec / model number is used to distinguish it.

Protocol Option

Number

Protocol options

Cyber Security options

1 K-Bus/Courier CSL0

Modbus

IEC 60870 -5 - 103

CSL0

CSL0

DNP3.0 CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 CSL0

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485

IEC 61850 Edition 1 / 2 and DNP3oE and DNP Serial

CSL0

CSL0

IEC 61850 Edition 1 / 2 and Courier via rear K-Bus/RS485 CSL1

IEC 61850 Edition 1 / 2 and CS103 via rear port RS485 CSL1

L IEC 61850 Edition 1 / 2 and DNP3oE and DNP3 serial

Table 8 – MiCOM Px4x protocol options for cyber security options

CSL1

MiCOM Px4x with CSL1 - Advance Cyber Security

For MiCOM Px4x IEDs which support CSL1, this means the IED supports advanced user account right management. Moreover, the IED supports security logs/events and secure administration capability.

If you want to use cyber security, you need to order the IED that supports CSL1. In this case, the Security Administration Tool (SAT) is required for RBAC configuration.

At the IED level, these cyber security features have been implemented:

Passwords management (via the SAT)

RBAC Management (via the SAT)

User Locking

Inactivity Timer

RBAC recovery

Port Disablement (via S1 Studio or the front panel)

Simple Network Management Protocol (SNMP)

Security Logs

Password Management

For the IED if CSL1 supported, there are two types of password possible for the IED access: alphanumeric password or Arrow Key password.

Px4x/EN CS/A14 Page 18-13

(CS) 18 Cyber Security

2.1.2

MICOM Px4x Cyber Security Implementation

The alphanumeric password is only settable via the SAT:

Passwords may be any length between 1 and 32 characters long

Passwords may contain any ASCII character in the range ASCII code 33 (21 Hex) to ASCII code 122 (7A Hex) inclusive

Passwords may or may not be NERC/IEEE 1686 compliant

The alphanumeric password will used for courier client access

For more details about NERC/IEEE 1686 password compliant, please check the standard.

The Arrow Key password is only settable via the SAT:

The Arrow Key password is a combination of the four arrow keys on the front panel

The Arrow Key password may be any length between 1 and 8 of arrow keys long

The Arrow Key password can only used in the front panel

The user also can disable the Arrow Key password by not setting it

Important If the Arrow Key password is not configured, the alphanumeric password will be used for the front panel access. In this case, alphanumeric passwords longer than 16 characters are not allowed.

MiCOM S1 Studio and the front panel are not allowed to change the password.

RBAC Management (via the SAT)

By default, the IED includes a factory RBAC which has three users, and for each user, the

Rights depend on the user Role. Please refer to the Roles and their Access Rights section for more details.

Username Role Default password

SecurityAdmin

EngineerLevel

SECADM

ENGINEER

AAAAAAAA

AAAA

OperatorLevel

Table 9 – Factory RBAC

OPERATOR AAAA

A Local Default Access function also available for the default RBAC, with the VIEWER role, which allows everyone login the IED in the front panel with VIEWER role. For more details about the Local Default Access function, please refer to the Local Default Access section.

For more information about how the SAT management the RBAC and cyber security policies, please see the Security Administration Tool (SAT) section.

Page 18-14 Px4x/EN CS/A14

MICOM Px4x Cyber Security Implementation

2.1.3

2.1.4

(CS) 18 Cyber Security

User Locking

The user is locked out temporarily, after a defined number of failed password entry attempts.

Important If a user is locked out, the block is applied to that named user and to the all IED interfaces. The blocking of one user, does not apply blocks to others.

If the user entry is blocked, recover the RBAC or push a new

RBAC will not reset the blocked user entry, but IED reboot will reset the blocking time and attempts count, so the user entry will be unblocked.

The first invalid password entry sets the attempts count (actual text here) to 1 and initiates an 'attempts timer'. Further invalid passwords during the timed period increments the attempts count. When the maximum number of attempts has been reached, access is blocked. If the attempts timer expires, or the correct password is entered before the

'attempt count' reaches the maximum number, then the 'attempts count' is reset to 0.

Once the user entry is blocked, a 'blocking timer' is initiated. Attempts to access the interface whilst the 'blocking timer' is running results in an error message, irrespective of whether the correct password is entered or not. Only after the 'blocking timer' has expired will access to the interface be unblocked, whereupon the attempts counter is reset to zero.

Attempts to write to the password entry whilst it is blocked results in the following message, which is displayed for 2 seconds.

LOGIN FAILED

INCORRECT PASSWORD

Appropriate responses achieve the same result if the password is written through a communications port.

The attempts count, attempts timer and blocking timer are configurable at the SAT (not by the IED). Attempts remain and blocking time remain information also are visible in IED.

Refer to the Configurable cyber security settings table for more details about the settings.

Inactivity Timer

The MiCOM device runs an inactivity timer, which means that it records the last time an action was taken by a user who was logged in.

If the user does not perform an action within a pre-defined interval, the user will be logged off. This is to reduce the risk that a device can accidentally be left open to access by unauthorized people.

The inactivity timer is separate for each interface.

The inactivity timer is configurable by using the SAT.

Important In case of a connection through an Ethernet interface, the actual inactive time depends on the setting value of both

"Minimum inactivity period" & "[0E A7] ETH Tunl Timeout", the smaller value of both timers will be applied.

Refer to the Table 12 for more details about the settings.

Px4x/EN CS/A14 Page 18-15

(CS) 18 Cyber Security

2.1.5

2.1.5.1

2.1.5.2

MICOM Px4x Cyber Security Implementation

RBAC Recovery

RBAC recovery is the means by which the device can be reset to the factory RBAC settings if required. To obtain the recovery password, the customer must go to www.schneider-electric.com/ccc to raise a recovery password request and supply the IED

Security Code .

Caution The “recovery” password gives you access to the Factory

RBAC Configuration. This action deletes all existing users (and their passwords), and restores to Factory RBAC Configuration.

Recover the RBAC does not affect relay proper settings and does not provoke reboot of the relay - the protection functions of the relay are always maintained.

Generate Security Code

The security code is a 16-character ASCII string. It is a read-only parameter. The IED generates its own random security code. This is when a new code is generated:

On power up

On expiry of validity timer (see below)

When the recovery password is entered

As soon as the security code is first displayed on the LCD display, a validity timer is started. This validity timer is set to 120 hours and is not configurable. The validity timer is not reset if you request a subsequent code within the 120 hour period.

To prevent accidental reading of the IED security code the cell will initially display a warning message on the front panel of the IED:

PRESS ENTER TO

READ SEC. CODE

The security code will be displayed on confirmation, whereupon the validity timer will be started. Note that the security code can only be read from the front panel.

Important The recover password will be invalid once the new Security

Code is generated, so please make sure the IED is always powered on before you get the reover password, and make sure you input the recover password within 120 hours.

Entry of the Recovery Password

The “recovery” password is intended for recovery only. It is not a replacement password that can be used continually. It can only be used once – for password recovery.

Entry of the recovery password is done at the local front panel and it causes the IED to reset the RBAC back to default.

On this action, the following message is displayed on the front panel of the IED:

RBAC reset done

Press any key

Page 18-16 Px4x/EN CS/A14

MICOM Px4x Cyber Security Implementation

2.1.6

2.1.7

(CS) 18 Cyber Security

Port Disablement (Equipment Hardening)

The availability of unused ports could provide a security risk. Hence, unused ports can be disabled (also known as equipment hardening) – either via the front panel or by MiCOM

S1 Studio. An Engineer role is needed to perform this action.

These physical ports and logical ports can be enabled/disabled:

Port types Menu text Col Row Default Setting Available Value

Physical Ports

Front port

Rear Port 1

Rear Port 2

Ethernet Port 1

Ethernet Port 1/2

Ethernet Port 2/3

Ethernet Port 3

Logical Ports

Courier Tunnel

IEC61850

25

25

DNP3oE

Table 10 - Port hardening settings

25

25

25

25

25

25

25

25

05

06

07

08

09

0A

0B

0C

0D

0E

Enable

Enable

Enable

Enable

Enable

Enable

Enable

Enable

Enable

Enable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Enable/Disable

Note The port disabling setting cells are not provided in the settings file. In addition, it is not possible to disable simultaneously more than one physical port or Logical port.

New redundant Ethernet boards have three physical ports but total two interfaces. The actual disabled physical port is depended on the redundant communication mode (PRP, HSR or Dual IP). Refer to the Dual Redundant

Ethernet Board (Upgrade) (DREB) chapter (Px4x/EN EB) for more details.

When the Ethernet board related physical ports or logical ports are disabled or enabled, the Ethernet card will reboot. The status of the ports will be available after reboot of the Ethernet board.

For more details about how to disable/enable the unused ports, please see sections:

How to Disable a Physical Port

How to Disable a Logical Port

Simple Network Management Protocol (SNMP)

Simple Network Management Protocol (SNMP) allows security monitoring of events and alarms. Standard third-party SNMP client software can be used to access the log of these events and alarms. Access to the SNMP MIB is given on a read-only basis. For further details of gaining access to the MIB, please contact Schneider Electric.

Px4x/EN CS/A14 Page 18-17

(CS) 18 Cyber Security

2.1.8

MICOM Px4x Cyber Security Implementation

Security Logs

The Security Logs needs to store logs from each item of equipment. These logs are generated by the system, and cannot be edited by the user. A variety of different items are recorded, including: bad/faulty access attempts, login attempts, authentication errors, changes to roles, users and access control lists, network backup and configuration changes, communication failures and so on.

Security logs emissions depend on the security standards that are configurable by the

SAT.

The security logs will push to a Syslog server if the Syslog server IP address and Syslog server IP port are configured and connected.

SAT also can be used to explore the security logs but MiCOM S1 studio is not supported.

The settings for the security log standards and Syslog server IP address and ports are listed in the Configurable cyber security settings table. For more detail about the security log configuration, please refer to the SAT documentation.

Note The Security logs time stamp may be time shifted by several milliseconds compared with local event log.

The security logs will not be generated if the Ethernet card is starting up.

If the Syslog server is unavailable, the new logs will be stored and overwriting the oldest logs.

This table lists the security logs categories available for each standard.

Page 18-18 Px4x/EN CS/A14

MICOM Px4x Cyber Security Implementation (CS) 18 Cyber Security

Standards

Log ID Additional field Explanation Level

CONNECTION_SUCCESS

CONNECTION_FAILURE

CONNECTION_FAILURE_

AND_BLOCK

CONNECTION_FAILURE_

ALREADY_BLOCKED

DISCONNECTION

DISCONNECTION_TIMEOUT

CONTROL_OPERATION

Successful connection

Failed connection (wrong credentials)

The additional field will contain the issuer of the connection: LOCAL or NETWORK

Failed connection (wrong credentials) triggering the blocking of the account on the IED

Failed connection because of a blocked userID on this IED

Type & Data associated to the control

Disconnection triggered by a timeout

Trace and control / override of real data from a peer

INFO

DANGER

DANGER

Disconnection triggered by the peer /user INFO

INFO

INFO x x x x x

WARNING x x x x x x x x x x x x x x x x x x x x x x x x x x

CONFIGURATION_

DOWNLOAD

RBAC_UPDATE

SEC_LOGS_RETRIEVAL

TIME_CHANGE

REBOOT_ORDER

PORT_MANAGEMENT

AUTHORIZATION_REQ

Version

CONFIGURATION_UPLOAD Version

Download of the configuration file from the device - Files include PSL, Courier setting, DNP setting, MCL/CID and user curves (crv)

INFO

Upload of a new configuration file into the device - Files include PSL,

INFO

Courier setting, DNP setting, MCL and user curves (crv) x x

Version

Version

New & Old time

Update of the RBAC cache in the IED INFO

Retrieval of the security logs of the IED

INFO

Modification of the time of the IED

INFO x x x x

None

Reboot order sent to the IED / IED start up

DANGER

Port, action (enable

/ disable)

Any comms port enabled / disabled

Action, object

INFO

Any authorization request sent to the CS brick

INFO x x x x x x

Table 11 – Security logs recorded

Px4x/EN CS/A14 Page 18-19

(CS) 18 Cyber Security MICOM Px4x Cyber Security Implementation

2.1.9 Common Cyber Security Settings

The System Administrator can customize the cyber security settings at the SAT. The following table shows the common cyber security settings. Parts of settings also are visible on the IED with specific Courier cells but not editable in IED or MiCOM S1 Studio.

These are shown in the right hand columns of this table:

Default Setting Available Value Menu in IED Col Row Setting in SAT

Minimum inactivity period 15 1 to 99 Minutes

If the user does not perform any action within this interval, the user will be logged off.

Allow user locking Yes Yes/No

-

-

-

-

-

-

Option allows user account locking

Maximum login attempts 5 1 to 99

The maximum failed password entry attempts, the user will lock once the attempts reached.

Attempts Limit 25 02

Password attempts timer 3 1 to 30 Minutes Attempts timer 25 03

The time for reset the attempts count to 0. The user got to maximum login attempts.

Automatic user account unlocking Yes Yes/No

Enable/disable the attempts times aromatic reset function.

Locking period duration 240 1 to 86400 Seconds

The Locking period duration (seconds)

Password Complexity None

Set the password compliant standard.

None / IEEE1686/ NERC

-

Blocking timer

-

-

25

-

-

04

-

Log and monitoring standard BDEW

BDEW / E3 /NERC-CIP / IEE1686 /

IEC62351/ CS_PH1

- - -

Setup security log emission standard

Syslog server IP address 0.0.0.0

Syslog server IP address

- - -

Syslog server IP port

Syslog server IP port

SNMP client IP address

601 1 to 65535 - - -

0.0.0.0 - - -

SNMP client IP address

Table 12 – Configurable cyber security settings

These settings show some common information about cyber security, which are not configurable whether by SAT, or MiCOM S1 Studio or the front panel.

Menu in IED Col Row Description

User Banner 25 01

Attempts remain 25 11

Blk time remain

User Name

25 12

Show user banner information: ACCESS ONLY FOR AUTHORITY USERS

Show the remains attempt times for user login.

Show the remains time for blocked user to unlock

25 21~2F Configured user name ( in SAT)

Security Code 25 FE The security code used to recovery the password.

RBAC Password 25 FF Enter 16 characters recover password to recovery password

Table 13 – Un-configurable cyber security settings

2.1.10 Local Default Access

Local Default Access function can be disabled/enabled in the SAT.

Page 18-20 Px4x/EN CS/A14

MICOM Px4x Cyber Security Implementation

2.2

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

(CS) 18 Cyber Security

The intention for Local Default Access function is to allow the user easy to access the

IED from the front panel and without any authorization required. This means if the Local

Default Access function is enabled, everyone will be authorized to access the front panel with associated Rights.

By default, the Local Default Access has the VIEWER role, it is also possible to associate the other Roles to the Local Default Access, which is configurable in the SAT.

Local Default Access function is only available in the front panel.

The Local Default Access login/logout process is invisible for the user.

MiCOM Px4x with CSL0- Simple Password Management

For MiCOM Px4x IED with CSL0, as the Security Administration Tool (SAT) is not supported, all the cyber security features which need SAT support will not be available.

This section describes the different implementations by comparing with CLS1.

The cyber security features that are not mentioned in this section will default to be the same as CSL1.

Password Management

For MiCOM Px4x IED with CSL0, SAT is not supported for the configuration, so only

• the alphanumeric password can be used.

The alphanumeric password is settable via MiCOM S1 Studio and the Front panel

Passwords may be any length between 1 and 16 characters long

Passwords may contain any ASCII character in the range ASCII code 33 (21 Hex) to ASCII code 122 (7A Hex) inclusive

No password compliance is required

The alphanumeric password will used for Courier access and the front panel access

Arrow key password is not available for IED with CLS0.

Fixed Factory RBAC

For MiCOM Px4x IED with CSL0, the user list and its role/right will be fixed as factory

RBAC and not configurable. Refer to the Factory RBAC table for more details.

Security Logs/SNMP Services

The security logs/SNMP services are not available for MiCOM Px4x IED with CSL0.

Cyber Security Settings

For MiCOM Px4x IED with CSL0, all cyber security settings are fixed as default setting and un-configurable. Refer to the Configurable cyber security settings table for the default settings.

Disable/Blank Password

For MiCOM Px4x IED with CSL0, it is possible to remove the user password. In MiCOM

S1 Studio, this is achieved by click the BOX “Disable the password”. In the IED, this is achieved by setting the password as blank.

Once the password is disabled/blank, the user can login to the IED directly and there is no need to enter the password.

Px4x/EN CS/A14 Page 18-21

(CS) 18 Cyber Security

3

3.1

3.1.1

3.1.2

3.1.3

How to Use Cyber Security Features

HOW TO USE CYBER SECURITY FEATURES

These sections shows the most common tasks associated with Cyber Security features.

For many of these tasks, the steps you take are the same as you have performed previously; with the main changes being in the steps you use to login and/or logout.

How to Login

Local Default Access

If the Local Default Access is enabled, the user may login the front panel with associated roles.

See Table 14 for the applied cases.

Auto Login

Auto login means the user will login the IED automatically and no need to select the user name and enter the password. In this case, the user will be authorized with relevant rights. The auto login will be applied in these cases:

CS

Version

CSL1

Interface

Front panel

RBAC/PW

Cases

Factory

RBAC

Auto login with

Login Process

EngineerLevel

Customized

RBAC

Local Default Access Enabled: Login with Local Default

Access

Local Default Access Disabled: Login with Prompt User

List

Courier

Interface

All cases Login with Prompt User List

Factory

RBAC

Auto login with EngineerLevel

EngineerLevel password is “AAAA” or is disabled/blank:

Auto login with EngineerLevel

OperatorLevel password is “AAAA” or is disabled/blank:

Auto login with OperatorLevel

EngineerLevel and OperatorLevel password changed:

Auto login with ViewerLevel Access

CSL0

Front panel Password changed

Factory

RBAC

Auto login with EngineerLevel

Courier

Interface Password changed

EngineerLevel password is “AAAA” or is disabled/blank:

Auto login with EngineerLevel

OperatorLevel password is “AAAA” or is disabled/blank:

Auto login with OperatorLevel

EngineerLevel and OperatorLevel password changed:

Login with Prompt User List

Table 14 – Auto Login process

For more details about the Factory RBAC, please refer to Table 9.

Login with Prompt User List

This login process will happen if:

The Auto login process is not applied.

Or high authorization is required for the current operation.

In this case, the IED will prompt the user list, and the user needs to select proper user name and enter the password to login.

Page 18-22 Px4x/EN CS/A14

How to Use Cyber Security Features

3.2

3.2.1

3.2.2

3.3

How to Logout

(CS) 18 Cyber Security

How to Logout at the IED

For security consideration, it would be better to “logout' the IED once the configuration done. You can do this by going up to the default display. W hen you are at the default display and you press the ‘Cancel’ button, you may be prompted to log out with the following display:

ENTER TO LOGOUT

CLEAR TO CANCEL

You will be asked this question if you are logged in.

If you confirm, the following message is displayed for 2 seconds:

LOGGED OUT

User Name

If you decide not to log out (i.e. you cancel), the following message is displayed for 2 seconds.

LOGOUT CANCELLED

User Name

Note The MiCOM IED runs a timer, which logs the user out after a period of inactivity. For more details, refer to the Inactivity Timer section.

How to Logout at MiCOM S1 Studio

Right-click on the device name and select Log Off.

In the Log Off confirmation dialog click Yes.

How to Disable a Physical Port

Using MiCOM S1 Studio or the front panel it is possible to disable unused physical ports.

This can not be done by the SAT. An Engineer-role is needed to perform this action.

To prevent accidental disabling of a port, a warning message is displayed according to whichever port is required to be disabled. For example if rear port 1 is to be disabled, the following message appears:

REAR PORT 1 TO BE

DISABLED.CONFIRM

There are between two and four ports eligible for disablement:

Front port

Rear port 1

Rear port 2 (available in the specific models)

Ethernet port (available in the specific models)

Important It is not possible to disable a port from which the disabling port command originates.

Px4x/EN CS/A14 Page 18-23

(CS) 18 Cyber Security

3.4

How to Use Cyber Security Features

How to Disable a Logical Port

Using MiCOM S1 Studio or the front panel it is possible to disable unused logical ports.

This can’t be done by the SAT. An Engineer-role is needed to perform this action.

3.5

If it is not desirable to disable the Ethernet port, it is possible to disable selected protocols on the Ethernet card and leave others functioning.

These protocols can be disabled:

IEC61850 (available in the specific models)

Courier Tunnelling (available in the specific models)

DNP3 Over Ethernet (available in the specific models)

How to Secure a Function key

In cyber security implementation, this function has been linked to the front panel authorization.

When the function key pressed, if there is no user login in the front panel or the logged- in user is not authorized, a prompt message will be raised in the front panel to ask the user to login. Once the user is logged-in, they need to press the function key again to execute the command.

If the user is already logged in and the authorization is OK, the command will be executed immediately.

By default, the OPERATOR or ENGINEER Roles are able to operate the function keys.

The function key will be executed immediately if the auto login process is applied and the user is authorized.

If unauthorized users press the Function Key during the setting change, they need to commit the changes first then login with authorized user to operate the function key.

Page 18-24 Px4x/EN CS/A14

Glossary for Cyber Security (CS) 18 Cyber Security

4 GLOSSARY FOR CYBER SECURITY

DCS

HMI

IED

Term

CIP Standards

Meaning

Critical Infrastructure Protection standards. NERC CIP standards have been given the force of law by the

Federal Energy Regulatory Commission (FERC)

Distributed Control System

Human Machine Interface

Intelligent Electronic Device.

It is a power industry term to describe microprocessor-based controllers of power system equipments (e.g.

Circuit breaker, transformer, etc)

LOGS

All the operations related to the security (connection, configuration…) are automatically caught in events that are logged in order to provide a good visibility of the previous actions to the security administrators.

Management Information Base MIB

NERC

RBAC

Roles

North American Electric Reliability Corporation

Role Based Access Control. Authentication and authorization mechanism based on roles granted to a user.

Roles are made of rights, themselves being actions that can be applied on objects. Each user’s action is authorized or not based on his roles

A role is a logical representation of a person activity. This activity authorizes or forbids operations within the tool suite thanks to permissions that are associated to the role. A role needs to be attached to a user account to have a real purpose.

Security Administration Module. Device in charge of security management on an IP-over-Ethernet network. SAM

SAT Security Administration Tool TSF based application used to define and create security configuration

Secured IED Devices embedding security mechanisms defined in the security architecture document

Security

Administrator

A user of the system granted to manage its security

SNMP

Simple Network Management Protocol (SNMP) is an "Internet-standard protocol for managing devices on IP networks

TAT Transfer Administration Tool

Unsecured IED Relay/IEDs with no security mechanisms.

Table 15 – Glossary for cyber security

Px4x/EN CS/A14 Page 18-25

(CS) 18 Cyber Security

Notes:

Glossary for Cyber Security

Page 18-26 Px4x/EN CS/A14

MiCOM Px4x (EB) 19 DREB

DUAL REDUNDANT ETHERNET

BOARD (UPGRADE) (DREB)

CHAPTER 19

Px4x/EN EB/F22 Page (EB) 19-1

(EB) 19 DREB MiCOM Px4x

Date (month/year):

Products covered by this chapter:

Software Version:

Hardware Suffix:

08/2015

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

B0

P14x (P141/P142/P143/P145), P34x (P342/P343/P344/P345 & P391), P74x (P741/P742/P743),

P849

B1

P64x (P642, P643 & P645), P746

C1

P746

D0

P24x (P241/P242/P243)

E0

P44x (P442 & P444)

A

P391

K

P44x (P441, P442, P444), P445, P74x (P741, P743)

L

P141/P142/P143, P241, P342, P642, P742

M

P145, P242, P243, P343, P344, P345, P44x (P442, P444), P44y (P443, P446), P54x (P543, P544,

P545, P546), P547, P643, P645, P741, P743, P746, P841, P849

Page (EB) 19-2 Px4x/EN EB/F22

Contents (EB) 19 DREB

CONTENTS

1 Introduction

1.1

Standard Safety Statements

2 Hardware Description

2.1

2.2

2.3

IRIG-B Connector

LEDs

Optical Fiber Connectors

3 Redundancy Protocols

3.1

3.1.1

3.1.2

3.2

3.2.1

3.2.2

3.3

3.3.1

3.3.2

3.3.2.1

3.3.3

3.3.4

3.3.4.1

3.3.4.2

3.3.4.3

Parallel Redundancy Protocol (PRP)

PRP Network Structure

Example Configuration

High-availability Seamless Redundancy (HSR)

HSR Network Structure

Example Configuration

Generic Functions for all Redundant Ethernet Boards

Priority Tagging

Simple Network Management Protocol (SNMP)

Redundant Ethernet Board MIB Structure

Simple Network Time Protocol (SNTP)

Dual Ethernet Communication (Dual IPs)

Dual IP Introduction

Dual IP in MiCOM

Typical User Cases

4 Configuration

4.1

4.2

4.3

4.4

Configuring Ethernet Communication Mode

Configuring the IED Communication Parameters

Configuring GOOSE Publish Parameters

Redundant Agency Device Configuration

5 Commissioning

5.1

5.2

PRP Star Connection

HSR Ring Connection

6 Technical Data

6.1

6.1.1

6.1.2

6.1.3

6.1.4

Board Hardware

100 Base TX Communications Interface (in accordance with IEEE802.3 and IEC

61850)

100 Base FX Communications Interface (in accordance with IEEE802.3 and IEC

61850)

Transmitter Optical Characteristics

Receiver Optical Characteristics

Page (EB) 19-

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15

15

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10

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Px4x/EN EB/F22 Page (EB) 19-3

(EB) 19 DREB

6.4

6.4.1

6.4.2

6.4.3

6.5

6.5.1

6.5.2

6.5.3

6.5.4

6.6

6.6.1

6.6.2

6.6.3

6.1.5

6.1.5.1

6.1.5.2

6.1.5.3

6.2

6.2.1

6.2.2

6.2.3

6.2.4

6.3

6.3.1

6.3.2

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

6.3.8

6.3.9

6.3.10

6.3.11

6.3.12

6.3.13

6.3.14

7 Cortec

IRIG-B and Real-Time Clock

Performance

Features

Self-adapted Rear IRIG-B interface (Modulated or Unmodulated)

Type Tests

Insulation

Creepage Distances and Clearances

High Voltage (Dielectric) Withstand

Impulse Voltage Withstand Test

ElectroMagnetic Compatibility (EMC)

1 MHz Burst High Frequency Disturbance Test

100 kHz and 1MHz Damped Oscillatory Test

Immunity to Electrostatic Discharge

Electrical Fast Transient or Burst Requirements

Surge Withstand Capability

Surge Immunity Test

Conducted/Radiated Immunity

Immunity to Radiated Electromagnetic Energy

Radiated Immunity from Digital Communications

Radiated Immunity from Digital Radio Telephones

Immunity to Conducted Disturbances Induced by Radio Frequency Fields

Power Frequency Magnetic Field Immunity

Conducted Emissions

Radiated Emissions

Environmental Conditions

Ambient Temperature Range

Ambient Humidity Range

Corrosive Environments

EU Directives

EMC Compliance

Product Safety

R&TTE Compliance

Other Approvals

Mechanical Robustness

Vibration Test

Shock and Bump

Seismic Test

Contents

30

30

30

31

31

30

30

30

30

30

31

31

31

26

26

27

27

27

29

29

29

29

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29

28

28

28

29

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27

28

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26

26

26

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26

32

Page (EB) 19-4 Px4x/EN EB/F22

Figures (EB) 19 DREB

FIGURES

Figure 1 - Ethernet board connectors (3 RJ45 or 2 LC + RJ45 or 1 RJ45)

Figure 2 - PRP example of general redundant network

Figure 3 - PRP Relay Configuration

Figure 4 - HSR example of ring configuration for multicast traffic

Figure 5 - HSR example of ring configuration for unicast traffic

Figure 6 - HSR Relay Configuration

Figure 7 – PRP + Dual IP (Ethernet Mode PRP)

Figure 8 – HSR + Dual IP (Ethernet Mode HSR)

Figure 9 – Dual IP (Ethernet Mode Dual IP)

Figure 10 - Communication Parameters for two Interfaces

Figure 11 - Goose Publish Parameters for two Interfaces

Figure 12 - PRP star connection

Figure 13 - HSR ring topology

Page (EB) 19-

13

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20

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11

11

12

20

21

22

23

24

TABLES

Table 1 - LED functionality

Table 2 - Optical fiber connector functionality

Table 3 - Redundant Ethernet board MIB Structure

Table 4 - Ethernet ports operation mode

Table 5 - Ethernet communication mode setting

Table 6 - First three bytes for default IP address

Table 7 - 100 Base TX interface

Table 8 - 100 Base FX interface

Table 9 - Tx optical characteristics

Table 10 - Rx optical characteristics

Page (EB) 19-

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9

18

19

25

26

Px4x/EN EB/F22 Page (EB) 19-5

(EB) 19 DREB

Notes:

Tables

Page (EB) 19-6 Px4x/EN EB/F22

Introduction

1

1.1

(EB) 19 DREB

INTRODUCTION

The redundant Ethernet board assures redundancy at IED level. It is fitted into the following MiCOM IEDs from Schneider Electric.

P141, P142, P143, P145

P241, P242, P243

P341, P342, P343, P344, P345

P442, P443, P444, P445, P446

P543, P544, P545, P546, P547

P642, P643, P645

P741, P743, P746

P841, P849

Standard Safety Statements

For safety information please see the Safety Information chapter of the relevant Px4x

Technical Manual.

Px4x/EN EB/F22 Page (EB) 19-7

(EB) 19 DREB

2

Hardware Description

HARDWARE DESCRIPTION

IEC 61850 work over Ethernet. Three boards are available:

• 1RJ45 Port Ethernet Board

• 3RJ45 Ports Redundant Ethernet Board

• 2LC+1RJ45 Ports Redundant Ethernet Board.

All are required for communications but 3RJ45 Ports and 2LC+1RJ45 Ports Redundant

Ethernet Board allow an alternative path to be always available, providing bumpless redundancy.

Industrial network failure can be disastrous. Redundancy provides increased security and reliability, but also devices can be added to or removed from the network without network downtime.

The following list shows Schneider Electric’s implementation of Ethernet redundancy, which has two variants with embedded IEC 61850 over Ethernet, plus PRP and HSR redundancy protocols.

• Parallel Redundancy Protocol (PRP)/High-availability Seamless Redundancy

(HSR) with 1310 nm multi mode 100BaseFx fiber optic Ethernet ports (LC connector) and modulated/un- modulated IRIG-B input. Part number 2072069A01.

Note The board offers compatibility with any PRP/HSR device.

Parallel Redundancy Protocol (PRP)/High-availability Seamless Redundancy

(HSR) with 100BaseTx Ethernet ports (RJ45) and modulated/un- modulated IRIG-

B input. Part number 2072071A01.

Note The board offers compatibility with any PRP/HSR device.

The redundant Ethernet board is fitted into Slot A of the IED, which is the optional communications slot. Each Ethernet board has three MAC addresses for two groups, one group (PORT 1) including one host MAC address, the other group (PORT 2 & 3) used for redundant application, including one host MAC address and one redundant agency device MAC address. Two host MAC addresses of the IED are printed on the rear panel of the IED.

In additional above for HSR/PRP redundant protocols, the redundant Ethernet board also can be operate on Dual IP mode. In this case, each Ethernet board has two host MAC addresses.

Page (EB) 19-8 Px4x/EN EB/F22

Hardware Description (EB) 19 DREB

MAC ADDRESS/

SOFTWARE REF.

LABEL TO BE FITTED

AT FINAL TEST TO

ETHERNET COMMS

ONLY.

RJ45 port

(10/100

Base-TX)

MAC ADDRESS/

SOFTWARE REF.

LABEL TO BE FITTED

AT FINAL TEST TO

ETHERNET COMMS

ONLY.

2 RJ45 ports

(10/100

Base-TX)

RJ45 port

(10/100

Base-TX)

2 LC ports

(100

Base-FX)

RJ45 port

(10/100

Base-TX)

MAC ADDRESS/

SOFTWARE REF.

LABEL TO BE FITTE

AT FINAL TEST TO

ETHERNET COMMS

ONLY.

2.1

2.2

2.3

Px4x/EN EB/F22

3 RJ45 Ports

Ethernet Board

(2072071A01)

2LC + 1RJ45 Ports

Ethernet Board

(2072069A01)

1 RJ45 Port

Ethernet Board

(2072101A01)

2072071A01

2072069A01

2072101A01

DRG00000001

Doc.Rev. B Sheet 1/1

Note: The 3 RJ45 and the 2LC+1RJ45 port versions provide redundant Ethernet functions . The 1RJ45 port

version does not provide redundant Ethernet functions . It is shown for illustration purposes only.

Figure 1 - Ethernet board connectors (3 RJ45 or 2 LC + RJ45 or 1 RJ45)

P1980ENe

IRIG-B Connector

Available as a modulated/un-modulated input. See section 6.1.

LEDs

LED

Green

Yellow

Function

Link

Activity

Table 1 - LED functionality

On

Link ok

Off

Link broken

Flashing

Traffic activity

Optical Fiber Connectors

Use 1310 nm multi mode 100BaseFx and LC connectors. See Figure 1 and section 6.1.

HSR Connector PRP

3

3

2

2

R

X

T

X

R

X

T

X

Table 2 - Optical fiber connector functionality

R

X

T

X

R

X

T

X

Page (EB) 19-9

(EB) 19 DREB

3

3.1

3.1.1

Redundancy Protocols

REDUNDANCY PROTOCOLS

There are two redundancy protocols available:

• PRP (Parallel Redundancy Protocol)

• HSR (High-availability Seamless Redundancy)

Parallel Redundancy Protocol (PRP)

When the upper protocol layers send a data packet, the PRP interface creates a “twin packet” from this. The PRP interface then transmits redundant data packet of the twin pair to each participating LAN simultaneously. As they are transmitted via different LANs, the data packets may have different run times.

The receiving PRP interface forwards the first packet of a pair towards the upper protocol layers and discards the second packet. When viewed from the application, a PRP interface functions like a standard Ethernet interface.

The PRP interface or a Redundancy Box (RedBox) injects a Redundancy Control Trailer

(RCT) into each packet. The RCT is a 48-bit identification field and is responsible for the identification of duplicates. This field contains, LAN identification (LAN A or B), information about the length of the payload, and a 16-bit sequence number. The PRP interface increments the sequence number for each packet sent. Using the unique attributes included in each packet, such as Physical MAC source address and sequence number, the receiving RedBox or Double Attached Node (DAN) interface identifies and discards duplicates.

Depending on the packet size, with PRP it attains a throughput of 93 to 99% of the available bandwidth.

PRP Network Structure

PRP uses two independent LANs. The topology of each of these LANs is arbitrary, and ring, star, bus and meshed topologies are possible.

The main advantage of PRP is loss-free data transmission with an active (transit) LAN.

When the terminal device receives no packets from one of the LANs, the second (transit)

LAN maintains the connection. As long as 1 (transit) LAN is available, repairs and maintenance on the other (transit) LAN have no impact on the data packet transmission.

The elementary devices of a PRP network are known as RedBox (Redundancy Box) and

DANP (Double Attached Node implementing PRP).

Both devices have one connection each to the (transit) LANs.

The devices in the (transit) LAN are conventional switches that do not require any PRP support. The devices transmit PRP data packets transparently, without evaluating the

RCT information.

Terminal devices that are connected directly to a device in the (transit) LAN are known as

SAN (Single Attached Node). If there is an interruption, these terminal devices cannot be reached via the redundant line. To use the uninterruptible redundancy of the PRP network, you integrate your device into the PRP network via a RedBox.

Page (EB) 19-10 Px4x/EN EB/F22

Redundancy Protocols (EB) 19 DREB

Figure 2 - PRP example of general redundant network

3.1.2 Example Configuration

Network A

Switch

C264 Network B

Switch

P2770ENa

3.2

Px4x/EN EB/F22

P40 Relay with PRP P40 Relay with PRP P40 Relay with PRP

P2771ENa

Figure 3 - PRP Relay Configuration

High-availability Seamless Redundancy (HSR)

High-availability Seamless Redundancy (HSR) is typically used in a ring topology, This

Clause describes the application of the PRP principles (Clause 4) to implement a Highavailability Seamless Redundancy (HSR), retaining the PRP property of zero recovery time, applicable to any topology, in particular rings and rings of rings. With respect to

PRP, HSR allows you to roughly have the network infrastructure. With respect to rings based on IEEE 802.1D (RSTP), IEC 62439-2 (MRP), IEC 62439-6 (DRP) or IEC 62439-7

Page (EB) 19-11

(EB) 19 DREB

3.2.1

Redundancy Protocols

(RRP), the available network bandwidth for network traffic is somewhat reduced depending on the type of traffic. Nodes within the ring are restricted to be HSR-capable bridging nodes, thus avoiding the use of dedicated bridges. Singly Attached Nodes

(SANs) such as laptops or printers cannot be attached directly to the ring, but need attachment through a RedBox (redundancy box).

HSR Network Structure

As in PRP, a node has two ports operated in parallel; it is a DANH (Doubly Attached

Node with HSR protocol).

A simple HSR network consists of doubly attached bridging nodes, each having two ring

ports, interconnected by full-duplex links, as shown in the example of Figure 4 (multicast)

and Figure 5 (unicast) for a ring topology.

P2772ENa

Figure 4 - HSR example of ring configuration for multicast traffic

A source DANH sends a frame passed from its upper layers (“C” frame), prefixes it by an

HSR tag to identify frame duplicates and sends the frame over each port (“A”-frame and

“B”-frame). A destination DANH receives, in the fault-free state, two identical frames from each port within a certain interval, removes the HSR tag of the first frame before passing it to its upper layers (“D”-frame) and discards any duplicate.

The nodes support the IEEE 802.1D bridge functionality and forward frames from one port to the other, except if they already sent the same frame in that same direction.

In particular, the node will not forward a frame that it injected into the ring.

Page (EB) 19-12 Px4x/EN EB/F22

Redundancy Protocols (EB) 19 DREB

P2773ENa

Figure 5 - HSR example of ring configuration for unicast traffic

A destination node of a unicast frame does not forward a frame for which it is the only destination, except for testing.

Frames circulating in the ring carry the HSR tag inserted by the source, which contains a sequence number. The doublet {source MAC address, sequence number} uniquely identifies copies of the same frame.

Singly Attached Nodes (SAN), for instance maintenance laptops or printers cannot be inserted directly into the ring since they have only one port and cannot interpret the HSR tag in the frames. SANs communicate with ring devices through a RedBox (redundancy box) that acts as a proxy for the SANs attached to it, as shown in Figure. Connecting non-

HSR nodes to ring ports, breaking the ring, is allowed to enable configuration. Non-HSR traffic within the closed ring is supported in an optional mode.

Px4x/EN EB/F22 Page (EB) 19-13

(EB) 19 DREB

3.2.2 Example Configuration

Redundancy Protocols

Figure 6 - HSR Relay Configuration

P2769ENa

Page (EB) 19-14 Px4x/EN EB/F22

Redundancy Protocols (EB) 19 DREB

3.3

3.3.1

3.3.2

3.3.2.1

SNMP OID

1

1

1.0.62439

1.0.62439.2

1.0.62439.2.0

1.0.62439.2.1

1.0.62439.2.1.0

1.0.62439.2.1.0.0

1.0.62439.2.1.0.0.1

1.0.62439.2.1.0.0.2

1.0.62439.2.1.0.1

1.0.62439.2.1.0.1.0

1.0.62439.2.1.0.1.0.1

1.0.62439.2.1.0.1.0.1.1

1.0.62439.2.1.0.1.0.1.1.1

1.0.62439.2.1.0.1.0.1.1.2

1.0.62439.2.1.0.1.0.1.1.3

1.0.62439.2.1.0.1.0.1.1.4

1.0.62439.2.1.0.1.0.1.1.5

1.0.62439.2.1.0.1.0.1.1.6

1.0.62439.2.1.0.1.0.1.1.7

Generic Functions for all Redundant Ethernet Boards

The following apply to the redundant Ethernet protocols (PRP and HSR).

Priority Tagging

802.1p priority is enabled on all ports.

Simple Network Management Protocol (SNMP)

Simple Network Management Protocol (SNMP) is the network protocol developed to manage devices in an IP network. SNMP relies on a Management Information Base

(MIB) that contains information about parameters to supervise. The MIB format is a tree structure, with each node in the tree identified by a numerical Object IDentifier (OID).

Each OID identifies a variable that can be read or set using SNMP with the appropriate software. The information in the MIBs is standardized.

Redundant Ethernet Board MIB Structure

The IEC 62439-3 MIB provides the following objects available at the OID = .1.0.62439:

Parameter name iso std iec62439 prp linkRedundancyEntityNotifications linkRedundancyEntityObjects lreConfiguration lreConfigurationGeneralGroup lreManufacturerName lreInterfaceCount lreConfigurationInterfaceGroup lreConfigurationInterfaces lreInterfaceConfigTable lreInterfaceConfigEntry lreInterfaceConfigIndex lreRowStatus lreNodeType lreNodeName lreVersionName lreMacAddress lrePortAdminStateA

Description

Specifies the name of the LRE device manufacturer

Total number of LREs present in this system

List of PRP/HSR LREs. Each entry corresponds to one PRP/HSR Link

Redundancy Entity (LRE), each representing a pair of LAN ports A and B. Basic devices supporting PRP/HSR may have only one LRE and thus one entry in the table, while more complex devices may have several entries for multiple LREs

Each entry contains management information

A unique value for each LRE

Indicates the status of the LRE table entry

Specifies the operation mode of the LRE: PRP mode 1 (1) HSR mode (2). Note:

PRP mode 0 is considered deprecated and is not supported by this revision of the MIB"

Specifies this LRE's node name

Specifies the version of this LRE's software

Specifies the MAC address to be used by this LRE. MAC addresses are identical for all ports of a single LRE

Specifies whether the port A shall be active or not Active through administrative action (Default: active)

Px4x/EN EB/F22 Page (EB) 19-15

(EB) 19 DREB Redundancy Protocols

SNMP OID

1.0.62439.2.1.0.1.0.1.1.8

1.0.62439.2.1.0.1.0.1.1.9

1.0.62439.2.1.0.1.0.1.1.10

1.0.62439.2.1.0.1.0.1.1.11

1.0.62439.2.1.0.1.0.1.1.12

Parameter name lrePortAdminStateB lreLinkStatusA lreLinkStatusB lreDuplicateDiscard lreTransparentReception

1.0.62439.2.1.0.1.0.1.1.13

1.0.62439.2.1.0.1.0.1.1.14

1.0.62439.2.1.0.1.0.1.1.15

1.0.62439.2.1.0.1.0.1.1.16

1.0.62439.2.1.0.1.0.1.1.17

1.0.62439.2.1.0.1.0.1.1.18

1.0.62439.2.1.1

1.0.62439.2.1.1.1

1.0.62439.2.1.1.1.0

1.0.62439.2.1.1.1.0.1

1.0.62439.2.1.1.1.0.1.1

1.0.62439.2.1.1.1.0.1.1.1

1.0.62439.2.1.1.1.0.1.1.2 lreHsrLREMode lreSwitchingEndNode lreRedBoxIdentity lreEvaluateSupervision lreNodesTableClear lreProxyNodeTableClear lreStatistics lreStatisticsInterfaceGroup lreStatisticsInterfaces lreInterfaceStatsTable lreInterfaceStatsEntry lreInterfaceStatsIndex lreCntTxA

Description

Specifies whether the port B shall be active or not Active through administrative action (Default: active)

Shows the actual link status of the LRE's port A

Shows the actual link status of the LRE's port B

Specifies whether a duplicate discard algorithm is used at reception (Default: discard)

If removeRCT is configured, the RCT is removed when forwarding to the upper layers, only applicable for PRP LRE (Default: removeRCT)

This enumeration is only applicable if the LRE is an HSR bridging node or

RedBox. It shows the mode of the HSR LRE:

(1) Default mode: The HSR LRE is in mode h and bridges tagged HSR traffic

(2) Optional mode: The HSR LRE is in mode n and bridging between its HSR ports is disabled. Traffic is HSR tagged

(3) Optional mode: The HSR LRE is in mode t and bridges non-tagged HSR traffic between its HSR ports

(4) Optional mode: The HSR LRE is in mode u and behaves like in mode h, except it does not remove unicast messages

(5) Optional mode: The HSR LRE is configured in mixed mode. HSR frames are handled according to mode h. Non-HSR frames are handled according to 802.1D bridging rules

This enumeration shows which feature is enabled in this particular LRE:

(1): an unspecified non-bridging node, e.g. SRP.

(2): an unspecified bridging node, e.g. RSTP.

(3): a PRP node/RedBox.

(4): an HSR RedBox with regular Ethernet traffic on its interlink.

(5): an HSR switching node.

(6): an HSR RedBox with HSR tagged traffic on its interlink.

(7): an HSR RedBox with PRP traffic for LAN A on its interlink.

(8): an HSR RedBox with PRP traffic for LAN B on its interlink.

Applicable to RedBox HSR-PRP A and RedBox HSR-PRP B. One ID is used by one pair of RedBoxes (one configured to A and one configured to B) coupling an

HSR ring to a PRP network. The integer value states the value of the path field a

RedBox inserts into each frame it receives from its interlink and injects into the

HSR ring. When interpreted as binary values, the LSB denotes the configuration of the RedBox (A or B), and the following 3 bits denote the identifier of a RedBox pair.

True if the LRE evaluates received supervision frames. False if it drops the supervision frames without evaluating. Note: LREs are required to send supervision frames, but reception is optional. Default value is dependent on implementation.

Specifies that the Node Table is to be cleared

Specifies that the Proxy Node Table is to be cleared

List of PRP/HSR LREs. Each entry corresponds to one PRP/HSR Link

Redundancy Entity (LRE), each representing a pair of LAN ports A and B and a port C towards the application/interlink. Basic devices supporting PRP/HSR may have only one LRE and thus one entry in the table, while more complex devices may have several entries for multiple LREs.

An entry containing management information applicable to a particular LRE

A unique value for each LRE

Number of frames sent over port A that are HSR tagged or fitted with a PRP

Redundancy Control Trailer. Only frames that are HSR tagged or do have a PRP

RCT are counted. Initial value = 0.

Page (EB) 19-16 Px4x/EN EB/F22

Redundancy Protocols (EB) 19 DREB

SNMP OID

1.0.62439.2.1.1.1.0.1.1.3

1.0.62439.2.1.1.1.0.1.1.4

1.0.62439.2.1.1.1.0.1.1.5

1.0.62439.2.1.1.1.0.1.1.6

1.0.62439.2.1.1.1.0.1.1.7

1.0.62439.2.1.1.1.0.1.1.8

1.0.62439.2.1.1.1.0.1.1.9

1.0.62439.2.1.1.1.0.1.1.10

1.0.62439.2.1.1.1.0.1.1.11

1.0.62439.2.1.1.1.0.1.1.12

1.0.62439.2.1.1.1.0.1.1.13

1.0.62439.2.1.1.1.0.1.1.14

1.0.62439.2.1.1.1.0.1.1.15

1.0.62439.2.1.1.1.0.1.1.16

1.0.62439.2.1.1.1.0.1.1.17

1.0.62439.2.1.1.1.0.1.1.18

1.0.62439.2.1.1.1.0.1.1.19

1.0.62439.2.1.1.1.0.1.1.20

1.0.62439.2.1.1.1.0.1.1.21

1.0.62439.2.1.1.1.0.1.1.22

1.0.62439.2.1.1.1.0.1.1.23

1.0.62439.2.1.1.1.0.1.1.24

Parameter name lreCntTxB lreCntTxC lreCntErrWrongLanA lreCntErrWrongLanB lreCntErrWrongLanC lreCntRxA lreCntRxB lreCntRxC lreCntErrorsA lreCntErrorsB lreCntErrorsC lreCntNodes lreCntProxyNodes lreCntUniqueRxA lreCntUniqueRxB lreCntUniqueRxC lreCntDuplicateRxA lreCntDuplicateRxB lreCntDuplicateRxC lreCntMultiRxA lreCntMultiRxB lreCntMultiRxC

1.0.62439.2.1.1.1.0.1.1.25 lreCntOwnRxA

Description

Number of frames sent over port B that are HSR tagged or fitted with a PRP

Redundancy Control Trailer. Only frames that are HSR tagged or do have a PRP

RCT are counted. Initial value = 0."

Number of frames sent towards the application interface of the DANP or DANH or over the interlink of the RedBox. All frames (with our without PRP RCT or HSR tag) are counted. Initial value = 0

Number of frames with the wrong LAN identifier received on LRE port A. Initial value = 0. Only applicable to PRP ports.

Number of frames with the wrong LAN identifier received on LRE port B. Initial value = 0. Only applicable to PRP ports

Number of frames with the wrong LAN identifier received on the interlink of a

RedBox. Only applicable to HSR RedBoxes in HSR-PRP configuration

(hsrredboxprpa and hsrredboxprpb).

Number of frames received on a LRE port A. Only frames that are HSR tagged or fitted with a PRP Redundancy Control Trailer are counted. Initial value = 0.

Number of frames received on a LRE port B. Only frames that are HSR tagged or fitted with a PRP Redundancy Control Trailer are counted. Initial value = 0

Number of frames received from the application interface of a DANP or DANH or the number of number of frames received on the interlink of a RedBox. All frames

(with our without PRP RCT or HSR tag) are counted. Initial value = 0.

Number of frames with errors received on this LRE port A. Initial value = 0

Number of frames with errors received on this LRE port B. Initial value = 0

Number of frames with errors received on the application interface of a DANP or

DANH or on the interlink of a RedBox. Initial value = 0.

Number of nodes in the Nodes Table

Number of nodes in the Proxy Node Table. Only applicable to RedBox. Initial value = 0.

Number of entries in the duplicate detection mechanism on port A for which no duplicate was received. Initial value = 0

Number of entries in the duplicate detection mechanism on port B for which no duplicate was received. Initial value = 0

Number of entries in the duplicate detection mechanism on the application interface of the DAN or the interlink of the RedBox for which no duplicate was received. Initial value = 0

Number of entries in the duplicate detection mechanism on port A for which one single duplicate was received. Initial value = 0.

Number of entries in the duplicate detection mechanism on port B for which one single duplicate was received. Initial value = 0.

Number of entries in the duplicate detection mechanism on the application interface of the DAN or the interlink of the RedBox for which one single duplicate was received. Initial value = 0.

Number of entries in the duplicate detection mechanism on port A for which more than one duplicate was received. Initial value = 0.

Number of entries in the duplicate detection mechanism on port B for which more than one duplicate was received. Initial value = 0

Number of entries in the duplicate detection mechanism on the application interface of the DAN or the interlink of the RedBox for which more than one duplicate was received. Initial value = 0

Number of HSR tagged frames received on Port A that originated from this device. Frames originate from this device if the source MAC matches the MAC of the LRE, or if the source MAC appears in the proxy node table (if implemented).

Applicable only to HSR. Initial value = 0.

Px4x/EN EB/F22 Page (EB) 19-17

(EB) 19 DREB Redundancy Protocols

SNMP OID

1.0.62439.2.1.1.1.0.1.1.26

1.0.62439.2.1.1.1.0.2

1.0.62439.2.1.1.1.0.2.1

1.0.62439.2.1.1.1.0.2.1.1

1.0.62439.2.1.1.1.0.2.1.2

1.0.62439.2.1.1.1.0.2.1.3

1.0.62439.2.1.1.1.0.2.1.4

1.0.62439.2.1.1.1.0.2.1.5

1.0.62439.2.1.1.1.0.3

1.0.62439.2.1.1.1.0.3.1

1.0.62439.2.1.1.1.0.3.1.1

1.0.62439.2.1.1.1.0.3.1.2

Parameter name lreCntOwnRxB lreNodesTable lreNodesEntry lreNodesIndex lreNodesMacAddress lreTimeLastSeenA lreTimeLastSeenB lreRemNodeType lreProxyNodeTable lreProxyNodeEntry lreProxyNodeIndex lreProxyNodeMacAddress

1.0.62439.2.2 linkRedundancyEntityConformance

Table 3 - Redundant Ethernet board MIB Structure

Description

Number of HSR tagged frames received on Port B that originated from this device. Frames originate from this device if the source MAC matches the MAC of the LRE, or if the source MAC appears in the proxy node table (if implemented).

Applicable only to HSR. Initial value = 0.

The node table (if it exists on that node) contains information about all remote

LRE, which advertised themselves through supervision frames

Each entry in the node table (if it exists) contains information about a particular remote LRE registered in the node table, which advertised itself through supervision frames.

Unique value for each node in the LRE's node table

Each MAC address corresponds to a single Dual Attached Node

Time in TimeTicks (1/100s) since the last frame from this remote LRE was received over LAN A. Initialized with a value of 0 upon node registration in the node table

Time in TimeTicks (1/100s) since the last frame from this remote LRE was received over LAN B. Initialized with a value of 0 upon node registration in the node table.

DAN type, as indicated in the received supervision frame

The proxy node table (if implemented) contains information about all nodes, for which the LRE acts as a connection to the HSR/PRP network.

Each entry in the proxy node table contains information about a particular node for which the LRE acts as a connection to the HSR/PRP network.

A unique value for each node in the LRE's proxy node table.

Each entry contains information about a particular node for which the LRE acts as a proxy for the HSR/PRP network.

*Port number: 1 to 6 for the RJ45, port 7 management, port 8 ring

Various SNMP client software tools can be used with the MiCOM Px4x, C264 and Hx5x range. Schneider Electric recommends using an SNMP MIB browser which can perform the basic SNMP operations such as GET, GETNEXT, and RESPONSE.

Redundant agency device configuration will be required to access SNMP, refer to section

4.4 for more details.

3.3.3

3.3.4

3.3.4.1

Simple Network Time Protocol (SNTP)

Simple Network Time Protocol (SNTP) is supported by both the IED and the redundant

Ethernet switch. SNTP is used to synchronize the clocks of computer systems over packet-switched, variable-latency data networks. A jitter buffer is used to reduce the effects of variable latency introduced by queuing in packet switched networks, ensuring a continuous data stream over the network.

The IED receives the synchronization from the SNTP server. This is done using the IP address of the SNTP server entered into the IED from the IED Configurator software.

Dual Ethernet Communication (Dual IPs)

Dual IP Introduction

Dual IP means the IED provides two independent IEC 61850 interfaces, and both these interfaces support MMS and Goose message.

Page (EB) 19-18 Px4x/EN EB/F22

Redundancy Protocols

3.3.4.2

(EB) 19 DREB

The IED which supports Dual IP can provide the customer with more flexible network connections: two fully segregated Station BUS networks, or one Station Bus and one

Process Bus (for Goose message transmission).

Dual IP is not mutually exclusive with PRP/HSR - Dual IP is automatically supported even if the IED is operate under HSR/PRP mode.

Dual IP in MiCOM

Dual IP is only supported for devices with the new Ethernet board assembly. This is shown by the model number, where the 7 th digit is either hardware option Q or R. These

boards have three Ethernet ports, as shown in Figure 1.

A setting is provided in the HMI to switch the operation mode between PRP/HSR/Dual IP.

Operation mode

PRP

HSR

Dual IP

Port 1

Interface 1

Port 2

Interface 2 (PRP)

Interface 1 Interface 2 (HSR)

* Interface 1 on Port 1 or Port 2

Port3

Interface 2 (PRP)

Interface 2 (HSR)

Interface 2

* Note In Dual IP mode, interface 1 can be available on port 1 or port 2. If both of port 1 and port 2 are connected, only port 1 will work.

Table 4 - Ethernet ports operation mode

For each interface, the fully IEC 61850 functions (GOOSE and MMS services) are supported independently.

For outgoing GOOSE messages, you need to configure whether a message is to be transmitted across one or both Ethernet connections. You also need to configure the destination parameters such as multicast MAC address, AppID, VLAN, etc.

Two communication parameters also need to be configured for each interface (IP address, MAC address, subnet mask). For the CID which is exported from SCD file, the second interface communication parameters are not configured. This needs to be done by manually editing in the IED configurator (this being invisible by the SCD file). This process needs to be completed before the exported CID file is downloaded to the IED.

(this being invisible by the SCD file).

Px4x/EN EB/F22 Page (EB) 19-19

(EB) 19 DREB

3.3.4.3

Redundancy Protocols

Typical User Cases

Below for Interface 1 and Interface 2, from a functional point of view it is same. The customer has flexibility to define the functionality according their requirements.

Both for Station Bus to have duplicated network for DCS.

One for Station Bus and one for process bus (Goose message)

Figure 7 – PRP + Dual IP (Ethernet Mode PRP)

P2775ENa

Figure 8 – HSR + Dual IP (Ethernet Mode HSR)

P2776ENa

Page (EB) 19-20

Figure 9 – Dual IP (Ethernet Mode Dual IP)

P2777ENa

Px4x/EN EB/F22

Configuration

4

4.1

4.2

(EB) 19 DREB

CONFIGURATION

The new redundant Ethernet board supports three communication operation modes.

These can be achieved by change the setting in HMI. It is not necessary to flash the firmware.

Also for the two interfaces, the communication parameters need to be configured. These include the IP address, MAC address, and subnet mask, etc.

For redundant protocols, the communication parameters for redundant agency device also need to be configured.

Configuring Ethernet Communication Mode

Menu Text

ETH COMM Mode

Cell Add.

0016

Default Setting

Dual IP

Available Setting

Dual IP, PRP, HSR

This setting can only be change using the HMI, and the setting change will cause the Ethernet board reboot. Restore default setting does not apply to this setting.

Table 5 - Ethernet communication mode setting

Configuring the IED Communication Parameters

The communication parameter for each interface is configured using the IED Configurator software in MiCOM S1 Studio. Customers can configure these parameters according to their needs, but the IP address for these two interfaces should not be in the same subnet.

Px4x/EN EB/F22

P2778ENa

Figure 10 - Communication Parameters for two Interfaces

To use the device configuration with Courier Tunneling, for each interface, a default IP address has been applied. The default IP address for the first three bytes is fixed for each interface as below,

Interface 1

Interface 2

Interface

169.254.0.xxx

First three Bytes for IP address

169.254.1.yyy

Note xxx = Mod(The last byte MAC1 address, 128) + 1 yyy = Mod(The last byte MAC2 address, 128) + 1

Table 6 - First three bytes for default IP address

Page (EB) 19-21

(EB) 19 DREB

4.3

Configuration

The default IP address can be found in the IED CONFIGURATOR column. Also, you can also calculate it according the MAC address label which is mounted on the rear panel of the Ethernet card.

Configuring GOOSE Publish Parameters

For outgoing GOOSE messages, you need to configure whether a message is to be transmitted over one or both Ethernet connections. You also need to configure the destination parameters including multicast MAC address, AppID, VLAN, etc.

4.4

P2779ENa

Figure 11 - Goose Publish Parameters for two Interfaces

Redundant Agency Device Configuration

The redundant agency device configuration is used by the SNMP server and only available for the device which works on PRP/HSR mode. The SNMP server can only be connected with Interface 2 (HSR/PRP port).

The following settings need to be configured in setting files:

IP address

Subnet Mask

• Gateway.

The MAC address is set when the device is manufactured. Also, the default IP is applied and linked to the MAC address. This default IP address can be seen in the HMI, in the

Communication settings section.

The default IP address is 169.254.2.zzz. zzz = Mod (The last byte MAC3 address, 128) + 1

Page (EB) 19-22 Px4x/EN EB/F22

Commissioning

5

5.1

(EB) 19 DREB

COMMISSIONING

PRP Star Connection

The following diagram shows the Px4x IEDs with the PRP variant of Redundant Ethernet boards connected in a STAR topology. The STAR topology can have one or more highend PRP-enabled Ethernet switches to interface with another network. The Ethernet switch is an HSR-enabled switch with a higher number of ports, which should be configured as the root bridge.

The number of IEDs that can be connected in the STAR can be up to 128.

Tx

Rx

LINK A

Px4x – IED 1

Tx

LINK B

Rx

Tx

LINK A

Rx

Px4x – IED 2

Tx

Rx

LINK B

Tx Rx Tx Rx

Ethernet switch A

Figure 12 - PRP star connection

Tx Rx Tx Rx

Ethernet switch B

P4404ENd

Px4x/EN EB/F22 Page (EB) 19-23

(EB) 19 DREB

5.2

Commissioning

HSR Ring Connection

The following diagram shows the Px4x IEDs (Px4x – IED 1 to IED N) with the HSR variant of redundant Ethernet boards connected in a ring topology. The ring topology can have one or more high-end HSR-enabled Ethernet switches to interface with another network or a control center. The Ethernet switch is an HSR enabled switch with a higher number of ports.

The Ethernet switch, which is connected to the controlling PC, should be configured as the root bridge.

The number of IEDs that can be connected in the ring can be up to 128.

PC

Tx1 Rx1

Switch

Tx2 Rx2

Px4x - IED 1

Tx1 Rx1 Tx2 Rx2

Px4x – IED 2

Tx1 Rx1 Tx2 Rx2

Tx1 Rx1 Tx2 Rx2

Px4x – IED n

Tx1 Rx1 Tx2 Rx2

Px4x – IED n-1

Tx1 Rx1 Tx2 Rx2

Px4x – IED n-2

P4408ENc

Figure 13 - HSR ring topology

The number of IEDs that can be connected in the ring can be up to 128.

Page (EB) 19-24 Px4x/EN EB/F22

Technical Data

6

6.1

6.1.1

6.1.2

6.1.3

(EB) 19 DREB

TECHNICAL DATA

The technical data applies to a Redundant Ethernet board fitted into these MiCOM products.

P141, P142, P143, P145

P241, P242, P243

P341, P342, P343, P344, P345

P442, P443, P444, P445, P446

P543, P544, P545, P546, P547

P642, P643, P645

P741, P743, P746

P841, P849

Board Hardware

100 Base TX Communications Interface (in accordance with IEEE802.3 and

IEC 61850)

Cable type

Connector type

Maximum distance

Full Duplex

Table 7 - 100 Base TX interface

RJ45

100m

100 Mbps

Screened Twisted Pair (STP)

100 Base FX Communications Interface (in accordance with IEEE802.3 and

IEC 61850)

Optical fiber cable

Center wavelength

Connector type

Maximum distance

Full Duplex

Table 8 - 100 Base FX interface

Multi-mode 50/125 μm or 62.5/125 μm

1310 nm

LC

2 km

100 Mbps

Transmitter Optical Characteristics

(TA = -40° C to 85° C, Single +3.3 V power supply)

Parameter Sym

Output Optical Power 62.5/125 µm, NA = 0.275 Fiber PO

Output Optical Power 50/125 µm, NA = 0.20 Fiber

Optical Extinction Ratio

Output Optical Power at Logic “0” State

PO

PO (“0”)

Min.

-20

-23.5

Table 9 - Tx optical characteristics

Typ.

-17.0

-20.0

Max.

-14

-14

10

-45

Unit dBm avg. dBm avg. dB dBm avg.

Px4x/EN EB/F22 Page (EB) 19-25

(EB) 19 DREB

6.1.4

6.1.5

6.1.5.1

6.1.5.2

6.1.5.3

6.2

6.2.1

6.2.2

Technical Data

Receiver Optical Characteristics

(TA = -40° C to 85° C, Single +3.3 V power supply)

Input Optical Power

Parameter Sym

PIN -31

Min. Typ.

Note: The 10BaseFL connection will no longer be supported as IEC 61850 does not specify this interface.

Max.

-14

Table 10 - Rx optical characteristics

Unit dBm avg.

IRIG-B and Real-Time Clock

Performance

Year 2000:

Real time accuracy:

External clock synchronization:

Compliant

< ± 2 seconds / day

Conforms to IRIG standard 200-98, format B

Features

Real time 24 hour clock settable in hours, minutes and seconds

Calendar settable from January 1994 to December 2092

Clock and calendar maintained via battery after loss of auxiliary supply

Internal clock synchronization using IRIG-B Interface for IRIG-B signal is BNC

Self-adapted Rear IRIG-B interface (Modulated or Unmodulated)

BNC plug

Isolation to SELV level

50 ohm coaxial cable

Type Tests

Insulation

Per EN / IEC 60255-27:

Insulation resistance > 100 M Ω at 500 Vdc

(Using only electronic/brushless insulation tester).

Creepage Distances and Clearances

Per EN / IEC 60255-27:

Pollution degree 3, Overvoltage category III,

Page (EB) 19-26 Px4x/EN EB/F22

Technical Data

6.2.3

6.2.4

6.3

6.3.1

6.3.2

(EB) 19 DREB

High Voltage (Dielectric) Withstand

(EIA RS-232 ports excepted and normally-open contacts of output relays excepted).

(i) As for EN / IEC 60255-27:

2 kV rms AC, 1 minute:

Between all independent circuits.

Between independent circuits and case earth (ground).

1 kV rms AC for 1 minute, across open watchdog contacts.

1 kV rms AC for 1 minute, across open contacts of changeover output relays.

1 kV rms AC for 1 minute for all D-type EIA(RS)-232 or EIA(RS)-485 ports between the communications port terminals and protective (earth) conductor terminal.

1 kV rms AC for 1 minute between RJ45 ports and the case earth (ground).

(ii) As for ANSI/IEEE C37.90:

1.5 kV rms AC for 1 minute, across open contacts of normally open output relays.

1 kV rms AC for 1 minute, across open watchdog contacts.

1 kV rms AC for 1 minute, across open contacts of changeover output relays.

Impulse Voltage Withstand Test

As for EN / IEC 60255-27:

(i) Front time: 1.2 µs, Time to half-value: 50 µs,

Peak value: 5 kV, 0.5 J

Between all independent circuits.

Between independent circuits and case earth ground.

(ii) Front time: 1.2 μs, Time to half value: 50 μs,

Peak value: 1.5kV, 0.5 J

Between RJ45 ports and the case earth (ground).

EIA(RS)-232 & EIA(RS)-485 ports and normally open contacts of output relays excepted.

ElectroMagnetic Compatibility (EMC)

1 MHz Burst High Frequency Disturbance Test

As for EN / IEC 60255-22-1, Class III,

Common-mode test voltage:

Differential test voltage:

Test duration:

Source impedance:

(EIA(RS)-232 ports excepted).

2.5 kV,

1.0 kV,

2 s,

200 Ω

100 kHz and 1MHz Damped Oscillatory Test

EN / IEC 61000-4-18:

Common mode test voltage:

Differential mode test voltage:

Level 3

2.5 kV

1 kV

Px4x/EN EB/F22 Page (EB) 19-27

(EB) 19 DREB

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

Technical Data

Immunity to Electrostatic Discharge

As for EN / IEC 60255-22-2, EN / IEC 61000-4-2:

15kV discharge in air to user interface, display, communication ports and exposed metalwork.

6kV contact discharge to the screws on the front of the front communication ports.

8kV point contact discharge to any part of the front of the product.

Electrical Fast Transient or Burst Requirements

As for EN / IEC 60255-22-4, Class B:

±4.0 kV, 5kHz and 100kHz applied to all inputs / outputs excluding communication ports

±2.0 kV, 5kHz and 100kHz applied to all communication ports

As for EN / IEC 61000-4-4, severity level 4:

±2.0 kV, 5kHz and 100kHz applied to all inputs / outputs and communication ports excluding power supply and earth.

±4.0 kV, 5kHz and 100kHz applied to all power supply and earth port

Rise time of one pulse:

Impulse duration (50% value):

Burst duration:

Burst cycle:

Source impedance:

5 ns

50 ns

15 ms or 0.75ms

300 ms

50 Ω

Surge Withstand Capability

As for IEEE/ANSI C37.90.1:

4 kV fast transient and 2.5 kV oscillatory applied directly across each output contact, optically isolated input, and power supply circuit.

Surge Immunity Test

As for EN / IEC 61000-4-5, EN / IEC 60255-26:

Time to half-value: 1.2 to 50 μs,

Amplitude:

Amplitude:

Amplitude:

4 kV between all groups and case earth (ground),

2 kV between terminals of each group.

1kV for LAN ports

Conducted/Radiated Immunity

For RTDs used for tripping applications the conducted and radiated immunity performance is guaranteed only when using totally shielded RTD cables (twisted leads).

Page (EB) 19-28 Px4x/EN EB/F22

6.3.10

6.3.11

6.3.12

Technical Data

6.3.8

6.3.9

6.3.13

6.3.14

(EB) 19 DREB

Immunity to Radiated Electromagnetic Energy

Per EN / IEC 61000-4-3 and EN / IEC 60255-22-3, Class 3

Test field strength, frequency band 80 to 1000 MHz and

1.4 GHz to 2.7GHz: 10 V/m,

Test using AM: 1 kHz / 80%, Spot tests at 80, 160, 450, 900, 1850, 2150 MHz

Per IEEE/ANSI C37.90.2:

80MHz to 1000MHz, zero and 100% square wave modulated.

Field strength of 35V/m.

Radiated Immunity from Digital Communications

As for EN / IEC61000-4-3, Level 4:

Test field strength, frequency band 800 to 960 MHz, and 1.4 to 2.0 GHz: 30 V/m, Test using AM: 1 kHz/80%.

Radiated Immunity from Digital Radio Telephones

As for EN / IEC 61000-4-3: 10 V/m, 900 MHz and 1.89 GHz.

Immunity to Conducted Disturbances Induced by Radio Frequency Fields

As for EN / IEC 61000-4-6, Level 3, Disturbing test voltage: 10 V.

Power Frequency Magnetic Field Immunity

As for EN / IEC 61000-4-8, Level 5,

100 A/m applied continuously, 1000 A/m applied for 3 s.

As for EN / IEC 61000-4-9, Level 5,

1000 A/m applied in all planes.

As for EN / IEC 61000-4-10, Level 5,

100 A/m applied in all planes at 100 kHz and 1 MHz with a burst duration of 2 s.

Conducted Emissions

As for CISPR 22 Class A:

Power supply:

0.15 - 0.5 MHz, 79 dBμV (quasi peak) 66 dBμV (average)

0.5 - 30 MHz, 73 dBμV (quasi peak) 60 dBμV (average)

Permanently connected communications ports:

0.15 - 0.5MHz, 97dBμV (quasi peak) 84dBμ V (average)

0.5 - 30MHz, 87dBμV (quasi peak) 74dBμV (average)

Radiated Emissions

As for CISPR 22 Class A:

30 to 230 MHz, 40 dBμV/m at 10m measurement distance

230 to 1 GHz, 47 dBμV/m at 10 m measurement distance.

1 – 3GHz, 76dBμV/m (peak), 56dBμV/m (average) at 3m measurement distance.

3 – 5GHz, 80dBμV/m (peak), 60dBμV/m (average) at 3m measurement distance.

Px4x/EN EB/F22 Page (EB) 19-29

(EB) 19 DREB

6.4

6.4.1

6.4.2

6.4.3

6.5

6.5.1

6.5.2

Technical Data

Environmental Conditions

Ambient Temperature Range

Per EN 60068-2-1 & EN / IEC 60068-2-2

Operating temperature range:

Storage and transit:

-25°C to +55°C (or -13°F to +131°F)

-25°C to +70°C (or -13°F to +158°F)

Ambient Humidity Range

Per EN /IEC 60068-2-78:

56 days at 93% relative humidity and +40 °C

Per EN / IEC 60068-2-14

5 cycles, -25°C to +55 °C

1°C / min rate of change

Per EN / IEC 60068-2-30

Damp heat cyclic, six (12 + 12) hour cycles, +25 to +55°C

Corrosive Environments

Per EN / IEC 60068-2-60, Part 2, Test Ke, Method (class) 3

Industrial corrosive environment/poor environmental control, mixed gas flow test.

21 days at 75% relative humidity and +30 ° C

Exposure to elevated concentrations of H

Per EN / IEC 60068-2-52 Salt mist (7 days)

Per EN / IEC 60068-2-43 for H

2

2

S, (100 ppb), NO

2

, (200 ppb) & Cl

2

(20 ppb).

Per EN / IEC 60068-2-42 for SO

S (21 days), 15 ppm

2

(21 days), 25 ppm

EU Directives

EMC Compliance

As for 2004/108/EC:

Compliance to the European Commission Directive on EMC is demonstrated using a Technical File. Product Specific Standards were used to establish conformity:

EN 60255-26

Product Safety

6.5.3

Page (EB) 19-30

R&TTE Compliance

Radio and Telecommunications Terminal Equipment (R&TTE) directive 99/5/EC.

Compliance demonstrated by compliance to both the EMC directive and the Low voltage directive, down to zero volts.

Applicable to rear communications ports.

Px4x/EN EB/F22

Technical Data

6.5.4

6.6

6.6.1

6.6.2

6.6.3

(EB) 19 DREB

Compliance demonstrated by Notified Body certificates of compliance.

Other Approvals

For ATEX Potentially Explosive Atmospheres directive 94/9/EC compliance, consult

Schneider Electric.

For other approvals such as UL / CUL / CSA, consult Schneider Electric.

Mechanical Robustness

Vibration Test

Per EN / IEC 60255-21-1 Response Class 2

Endurance Class 2

Shock and Bump

Per EN / IEC 60255-21-2 Shock response Class 2

Shock withstand Class 1

Bump Class 1

Seismic Test

Per EN / IEC 60255-21-3: Class 2

Px4x/EN EB/F22 Page (EB) 19-31

(EB) 19 DREB Cortec

7 CORTEC

This is a generic Cortec to cover all IEDs using the Redundant Ethernet boards.

Variants

MiCOM Protection

Application/Platform:

Feeder Management:

Motor Protection:

Generator Protection Relay:

Distance Protection Relay:

Current Differential:

Transformer:

Busbar:

Breaker Fail:

Vx Aux Rating:

24 - 32 Vdc

48 - 110 Vdc

110 - 250 Vdc (100 - 240 Vac)

Order Number

In/Vn Rating:

HV-LV (In = 1A/5A), (Vn = 100/120V) (8CT/1VT)

HV-LV (In = 1A/5A), (Vn = 100/120V) (8CT/2VT)

Hardware Options:

Standard - no options

IRIG-B only (modulated)

Fibre optic converter only

IRIG-B (modulated) & fibre optic converter

Ethernet with 100Mits/s fibre-optic port

Second Rear Comms Port (Courier EIA232/EIA485/k-bus)

Second Rear Comms Port + IRIG-B (modulated) (Courier EIA232/EIA485/k-bus)

Ethernet (100Mbit/s) + IRIG-B (modulated)

Ethernet (100Mbit/s) + IRIG-B (unmodulated)

Redundant Ethernet Self-Healing Ring, 2 multi-mode fibre ports + Modulated IRIG-B

1

P

2 3 4

1 4 *

2 4 *

3 4 *

4 4 *

5

5

6

7

8

4

4

4

4

*

*

*

*

9

2

3

6

Redundant Ethernet Self-Healing Ring, 2 multi-mode fibre ports + Unmodulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode fibre ports + Modulated IRIG-B

Redundant Ethernet RSTP, 2 multi-mode fibre ports + Unmodulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode fibre ports + Modulated IRIG-B

Redundant Ethernet Dual-Homing Star, 2 multi-mode fibre ports + Unmodulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode fibre ports + Modulated IRIG-B

Redundant Ethernet Parallel Redundancy Protocol (PRP), 2 multimode fibre ports + Unmodulated IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 2 LC ports + 1 RJ45 port + Modulated/Unmodulated

IRIG-B

Redundant Ethernet (100Mbit/s) PRP or HSR and Dual IP, 3 RJ45 ports + Modulated/Unmodulated IRIG-B

1

2

1

2

3

4

6

7

8

A

B

G

Ethernet (100Mbit/s), 1 RJ45 port + Modulated/Unmodulated IRIG-B

Product Specific Options :

Size 8 (40TE) Case, 8 Optos + 8 Relays

Size 8 (40TE) Case, 8 Optos + 8 Relays + RTD

Size 8 (40TE) Case, 8 Optos + 8 Relays + CLIO (mA I/O)

Size 8 (40TE) Case, 12 Optos + 12 Relays

Size 8 (40TE) Case, 8 Optos + 12 Relays (including 4 High Break)

Protocol Options:

K-Bus/Courier

Modbus

IEC60870-5-103 (VDEW)

DNP3.0

7 8 9 10 11 12 13 14 15

H

J

K

L

M

N

P

Q

R

S

A

B

C

D

E

1

2

3

4

Page (EB) 19-32 Px4x/EN EB/F22

Cortec (EB) 19 DREB

UCA2 + Courier via rear RS485 port

IEC 61850 over Ethernet and Courier via rear K-Bus/RS485 OR

IEC 61850 Edition 1 and Edition 2 and Courier via rear K-Bus/RS485

IEC 61850 over ethernet with CS103 rear port RS485 protocol OR

IEC 61850 Edition 1 and Edition 2 and CS103 via rear port RS485

DNP3.0 over Ethernet and Courier via rear K-Bus/RS485

IEC 61850 Edition 1 and Edition 2 and DNP3 via rear port RS485

Mounting Options:

Panel Mounting

Language Options:

English, French, German, Spanish

English, French, German, Russian

Chinese, English or French via HMI, with English or French only via Communications port

Software Version:

Customisation:

Default

Customer Settings

Design Suffix:

5

6

7

8

9

M

0

5

C

* *

0

A

*

Px4x/EN EB/F22 Page (EB) 19-33

(EB) 19 DREB

Notes:

Cortec

Page (EB) 19-34 Px4x/EN EB/F22

MiCOM Px4x (PR) 20 PRP Notes

Px4x/EN PR/D22

PRP NOTES

CHAPTER 20

Page (PR) 20-1

(PR) 20 PRP Notes MiCOM Px4x

Date (month/year): 11/2015

Products covered by this chapter:

Hardware Suffix:

Connection

Diagrams:

This chapter covers the specific versions of the MiCOM products listed below. This includes only

Software Version: B0

the following combinations of Software Version and Hardware Suffix.

B1

B2

C1

C2

D0

E0

P14x (P141/P142/P143/P145), P34x (P342/P343/P344/P345 & P391),

P74x (P741/P742/P743), P849

P64x (P642, P643 & P645), P746

P746

P746

P746

P24x (P241/P242/P243)

P44x (P442 & P444)

A

K

L

M

P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

P391

P44x (P441, P442, P444), P445, P74x (P741, P743)

P141/P142/P143, P241, P342, P642, P742

P145, P242, P243, P343, P344, P345, P44x (P442, P444), P44y (P443, P446), P54x (P543,

P544, P545, P546), P547, P643, P645, P741, P743, P746, P841, P849

10P445xx (xx = 01 to 04)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P44x(P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (PR) 20-2 Px4x/EN PR/D22

Contents

CONTENTS

1 Parallel Redundancy Protocol (PRP) Notes

1.1

1.2

1.3

1.4

1.5

1.6

1.7

Introduction to PRP

Protocols

PRP Summary (IEC 62439-3 Clause 4)

Example of a PRP Network

Structure of a DAN

Communication between SANs and DANs

PRP Technical Data

2 PRP and MiCOM Functions

2.1

2.2

2.3

2.4

2.5

2.6

2.6.1

MiCOM Products and PRP

MiCOM S1 Studio Software and the PRP Function

MiCOM Relay Configuration and the PRP Function

Hardware Changes for PRP Protocol

PRP Parameters

Product Implementation Features

Abbreviations and Acronyms

TABLES

Table 1 - MiCOM model numbers for PRP options

Table 2 - PRP parameter values (for PRP Protocol Version 1)

FIGURES

Figure 1 - PRP Redundancy Network

Figure 2 –Communication between two DANs (in PRP)

Figure 3 - Frames without and with RCT and padding

(PR) 20 PRP Notes

Page (PR) 20-

11

12

Page (PR) 20-

6

7

9

Page (PR) 20-

5

7

8

10

5

5

5

6

11

11

11

11

11

12

13

14

Px4x/EN PR/D22 Page (PR) 20-3

(PR) 20 PRP Notes

Notes:

Figures

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Parallel Redundancy Protocol (PRP) Notes

1

1.1

1.2

1.3

(PR) 20 PRP Notes

PARALLEL REDUNDANCY PROTOCOL (PRP) NOTES

Introduction to PRP

This section gives an introduction to the Parallel Redundancy Protocol (PRP); and how it is implemented on MiCOM-based products manufactured by Schneider Electric.

Protocols

Industrial real-time Ethernets typically need much better levels of availability and uninterrupted operation than normal office-type Ethernet solutions. For power networks, even a short loss of connectivity may result in a significant loss of functionality or impaired safety. To recover from a network failure, various redundancy schemes have been considered, including: Rapid Spanning Tree Protocol (RSTP), Media Redundancy

Protocol (MRP) and Parallel Redundancy Protocol (PRP). The key properties of these are as follows:

RSTP

MRP this uses mesh-based topologies or ring topology and computes a tree, based on path costs and priorities. In case of network failure, a typical reset time for RSTP-based system is normally a few seconds.

This uses ring-based topologies. In case of network failure, the network is broken into two separate lines, which are reconnected by de-blocking the previously blocked part. The guaranteed reset time for MRP protocolbased systems is typically around 100ms.

PRP this does not change the active topology as it uses two independent networks. Each message is replicated and sent over both networks. The first network node to receive it acts on it, with all later copies of the message being discarded. Importantly, these details are controlled by the low-level PRP layer of the network architecture, with the two networks being hidden from the higher level layers. Consequently, PRP-based networks are continuously available.

Power networks need to be able to respond to problems very quickly (typically in less than 10ms), and PRP is an available protocol which is robust enough to achieve this. The

PRP protocol used in the MiCOM relay/IEDs is defined in the IEC62439-3 (2012) standard and is configured using the existing redundant Ethernet card(s).

PRP Summary (IEC 62439-3 Clause 4)

A summary of the main PRP features is given below:

Ethernet redundancy method independent of any Ethernet protocol or topology

(tree, ring or mesh)

Seamless switchover and recovery in case of failure, which supports real-time communication

Supervises redundancy continuously for better management of network devices

Suitable for hot swap - 24 hour/365 day operation in substations

Allows the mixing of devices with single and double network attached nodes on the same Local Area Network (LAN)

Allows laptops and workstations to be connected to the network with standard

Ethernet adapters (on double or single attached nodes)

• Particularly suited for substation automation, high-speed drives and transportation

Px4x/EN PR/D22 Page (PR) 20-5

(PR) 20 PRP Notes Parallel Redundancy Protocol (PRP) Notes

1.4 Example of a PRP Network

Essentially a PRP network is a pair of similar Local Area Networks (LANs) which can be

any topology (tree, ring or mesh). An example of a PRP network is shown in Figure 1:

PRP Redundancy Network

DAN

(D3)

SAN

(A1)

DAN

(D1)

DAN

(D2)

SAN

(B2)

LAN_A

SAN

(B1)

RedBox

VDAN

LAN_B

VDAN

VDAN

P0299ENb

Figure 1 - PRP Redundancy Network

Figure 1 shows two similar Local Area Networks (LANs) which have various Nodes in

common. The key features of these networks include:

• With the exception of a RedBox (see below), no direct cable connections can be made between the two LANs.

Each of these LANs can have one or more Single Attached Nodes (SANs). These are normally non-critical devices that are attached only to a single network. SANs can talk to one another, but only if they are on the same LAN.

Matched pairs of devices which are critical to the operation of the overall scheme are connected one to each network as Doubly Attached Nodes (DANs).

To be sure that network messages (also known as frames) are transferred correctly to each DAN, each DAN must have the same Media Access Control (MAC) code and Internet Protocol (IP) address. This will also mean that TCP/IP traffic will automatically communicate with both of the paired devices, so it will be unaware of any two-layer redundancy or frame duplication issues.

A Redundancy Box (RedBox) is used when a single interface node has to be connected to both networks. The RedBox can talk to all other nodes. So far as other nodes are concerned, the RedBox behaves like a DAN, so a SAN that is connected through a RedBox is also called a Virtual Doubly Attached Node

(VDAN). The RedBox must have its own unique IP address.

• Transmission delays can be different between related Nodes of the two LANs.

• Each LAN (i.e. LAN_A and LAN_B) must be powered from a different power source and must be failure independent.

The two LANs can differ in terms of performance and topology. The redundant Ethernet interface can be made using an optical fiber connection with an LC or ST connector type or with RJ45 copper connector type. There is no need for an optical interface away from the relay.

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Parallel Redundancy Protocol (PRP) Notes (PR) 20 PRP Notes

1.5 Structure of a DAN

A MiCOM P40 relay working in PRP Mode works as a DAN within the overall network topology. Each DAN has two ports that operate in parallel. They are attached to the upper layers of the communications stack through the Link Redundancy Entity (LRE) as in

Figure 2:

Doubly Attached Node (DAN1) Doubly Attached Node (DAN2)

Structure of a

Doubly Attached

Node

(DAN)

Upper Layers Upper Layers

Tx

Link Redundancy Entity (LRE)

Port A

Rx Tx

Port B

Rx Tx

Link Redundancy Entity (LRE)

Port A

Rx Tx

Port B

Rx

LAN_A

LAN_B

P0298ENe

Figure 2 –Communication between two DANs (in PRP)

The LRE has two main tasks:

• handling message frames and management of redundancy

When an upper layer sends a frame to the LRE, the LRE replicates the frame and sends it through both its ports at nearly the same time. The two frames move through the two

LANs with slightly different delays, ideally arriving at the destination node within a small time window.

When receiving frames, the LRE forwards the first frame it received to its upper layers and then discards the duplicate.

As both DAN nodes have the same MAC and IP addresses, this makes redundancy transparent to the upper layers. This allows the Address Resolution Protocol (ARP) to work in the same way as with a SAN. Accordingly, to the upper layers of a DAN, the LRE layer shows the same interface as the network adapter of a non-redundant adapter.

To manage redundancy, the LRE:

• Adds a 32-bit Redundancy Check Tag (RCT) to each frame it sends and

• Removes the RCT from each frame it receives

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(PR) 20 PRP Notes

1.6

Parallel Redundancy Protocol (PRP) Notes

Communication between SANs and DANs

A SAN can be connected to any LAN and can communicate with any other SAN on the same LAN or any DAN. However, a SAN which connected to one LAN can not communicate directly to a SAN which is connected to the other LAN.

A DAN is connected to both LANs and can communicate with any RedBox or any other

DANs or any SANs on either network. For communication purposes, a DAN “views” a

SAN connected through a RedBox as a VDAN.

When a SAN generates a basic frame, it sends the frame only onto the LAN to which it is connected.

Originating at the SAN, a typical frame contains these parameters: dest_addr src_addr

Destination Address

Source Address

• type data

Type

• fcs Frame Check Sequence (i.e. extra checksum characters added to allow error detection and correction)

The frame from the SAN is then received by the DAN; which sends the frame to its upper layers, which act accordingly.

When a DAN generates a frame, it needs to send the frame onto both of the LANs to which it is connected. When it does this, it extends the frame by adding the 32-bit

Redundancy Control Trailer (RCT) into the frame.

The RCT consists of these parameters:

16-bit Sequence Number

4-bit LAN identifier, 1010 (0xA) for LAN_A and 1011 (0xB) for LAN_B

12-bit frame size

PRP suffix

Note The Sequence number is a measure of the number of messages which have been sent since the last system reset. Each time the link layer sends a frame to a particular destination the sender increases the sequence number corresponding to that destination and sends the (nearly) identical frames over both LANs.

Accordingly, originating at the DAN, a typical frame then contains these parameters:

• dest_addr src_addr type

Destination Address

Source Address

Type lsdu

Padding

Link Service Data Unit if needed

RCT data:

 16-bit sequence number:

4-bit LAN identifier

12-bit frame size

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Parallel Redundancy Protocol (PRP) Notes (PR) 20 PRP Notes

 fcs

LSDU

16-bit PRP suffix (0X88 0XFB)

Frame Check Sequence

Padding

Size

The Link Service Data Unit (LSDU) data allows PRP frames to be distinguished from none-PRP frames.

After the LSDU data, there may be some data padding. This is added to frames which would otherwise be too short for conventional network traffic

(minimum frame size is 64 octets).

The frame size will vary depending on the contents of the frame and how it has been tagged by the various SANs and DANs. In VLANs, frame tags may be added or removed during transit through a switch. To make the length field independent of tagging, only the LSDU and the RCT are considered in the size.

Figure 3 shows the frame types with different types of data.

Basic Frame dest_addr src_addr type FCS

Frame extended by an RCT

(Redundancy Control Trailer) dest_addr src_addr type LSDU SeqNr LANId Size FCS

RCT

Frame extended by an RCT plus padding to take it up to the minimum size dest_addr src_addr type LSDU padding SeqNr LANId Size FCS

P0300ENa

Figure 3 - Frames without and with RCT and padding

The key points about these differing frame structures is that:

• SANs do not implement any redundancy features, so they generate basic frames which SANs and DANs can understand.

SANs can still understand the frames that come from DANs, as SANs ignore the

RCT components in frames which come from DANs (a SAN cannot distinguish the

RCT from the IEEE802.3 padding)

If a DAN receives a frame which does not include the RCT component, it sends a single copy of the frame to its upper layers.

If a DAN receives a frame which does include the RCT component, it does not send a duplicate copy of the frame to its upper layers.

• If a DANP cannot identify that the remote Node is a DAN, it inserts no RCT.

When using a Single Attached Nodes connected to the IED, a redbox is suggested to handle the case when the TPDU size for the client has been set above than 1024.

Px4x/EN PR/D22 Page (PR) 20-9

(PR) 20 PRP Notes

1.7

Parallel Redundancy Protocol (PRP) Notes

PRP Technical Data

• One VLAN tag supported.

128 publishers supported per receiver.

Up to 100Mbit/s full duplex Ethernet.

Dynamic frame memory allocation (page manager).

Configurable duplicate detection.

Wishbone interface for configuration and status registers.

CPU port interface - Ethernet or Wishbone.

Support for link-local protocols - CPU may send to specific ports only - CPU knows receive port.

Configurable frame memory and queue length.

Duplicate detection with configurable size and aging time.

• MAC address filtering (8 filter masks for interlink, 6 for CPU).

• Support for interfaces with or without Ethernet preamble.

Maximum Transmission Unit

According to the IEC 8802-3, the MTU (Ethernet maximum packet size) is:

• 1518 bytes without VLAN and without PRP

• 1522 bytes with VLAN and without PRP

• 1524 bytes without VLAN and with PRP

• 1528 bytes with VLAN and with PRP

Note: Check that the LAN switches setting for the MTU is at least 1528 bytes

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PRP and MiCOM Functions

2

2.1

2.2

2.3

2.4

(PR) 20 PRP Notes

PRP AND MICOM FUNCTIONS

MiCOM Products and PRP

The PRP functions being introduced as part of the overall MiCOM product range provide additional functionality, which is backwards compatible with existing Schneider Electric

MiCOM equipment. This means that existing MiCOM relays/IEDS can be used on networks which use PRP functions, with no changes being made to those relays/IEDs.

The new MiCOM products that use the PRP, will interrogate other equipment to determine the equipment model number, and then use the model number to decide (at runtime), whether that particular item of equipment can support PRP or not.

MiCOM models which include the following Ethernet board assembly provide the possibility of PRP function support. This is denoted by Digit 7 where the Hardware option

is N, P, Q or R, as shown in Table 1:

Hardware Option Type

“ N ” at Digit No 7 2 ST ports redundant Ethernet board

(Modulated IRIG-B)

“ P ” at Digit No 7

Q ” at Digit No 7

2 ST ports redundant Ethernet board

(Un-modulated IRIG-B)

2 LC + 1 RJ45 ports redundant Ethernet board

(Modulated/ Un-modulated IRIG-B)

“ R ” at Digit No 7 3 RJ45 ports redundant Ethernet board

(Modulated/ Un-modulated IRIG-B)

Model No format

Px4xxx N x6Mxxx8K

Px4xxx P x6Mxxx8K

Px4xxx Q x6Mxxx8M

Px4xxx R x6Mxxx8M

Table 1 - MiCOM model numbers for PRP options

The MiCOM relay/IED firmware has been modified to allow the PRP options to be accepted for the power-up tests in addition to the implementation of the supervision frame transmission.

MiCOM S1 Studio Software and the PRP Function

The addition of this function has no impact of the MiCOM S1 Studio support files so there is no need to upgrade any MiCOM S1 Studio software.

MiCOM Relay Configuration and the PRP Function

There is no need to change the configuration of any relay (as relays which include support for this function will be able to recognize other devices which support it).

Hardware Changes for PRP Protocol

This protocol is implemented using the existing redundant Ethernet and dual redundant

Ethernet card as a starting point. The Frame management is achieved by reprogramming the Field-Programmable Gate Array (FPGA).

The low-level management of the redundant frames is performed within the FPGA; this being defined as the Link Redundancy Entity (LRE). This will involve the addition of the

Redundancy Check Tag (RCT) to a frame to be transmitted; this identifies the LAN and the sequence number of the message over the two networks. The FPGA is also responsible for the stripping of the RCT from received frames and discarding the duplicated messages such that only a single application frame is received by the Ethernet processor.

The LRE functionality of the supervision frame transmission is performed by the Ethernet processor card.

Px4x/EN PR/D22 Page (PR) 20-11

(PR) 20 PRP Notes

2.5

PRP and MiCOM Functions

PRP Parameters

The Redundant Ethernet standard (IEC 62439-3:2012) defines several parameters for the

PRP protocol; these being fixed at a default value within this release. The following values are set:

Parameter

Supervision Frame

Multicast Address

Life Check Interval

Value Description

PRP Mode

Node Forget Time

Entry Forget Time

2 seconds

Duplicate Discard

60 s

400 ms

Node Reboot Interval 500ms

Period between transmission of supervision frames

This is normal PRP mode, Duplicate address will not be supported.

This is the time after which a node entry is cleared.

Duration that the received message Sequence number will be held to discard a duplicate message.

Duration following reboot for which no PRP frames should be transmitted.

Table 2 - PRP parameter values (for PRP Protocol Version 1)

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PRP and MiCOM Functions

2.6

(PR) 20 PRP Notes

Product Implementation Features

Here is a list of the main Product Requirements for MiCOM products which support PRP:

The MiCOM relay/IED provides two redundant Ethernet ports using PRP.

The MiCOM relay/IED must be connected to the redundant Ethernet network as a

Double Attached Node (DAN) using PRP (DAN using PRP is known as DANP)

The redundant Ethernet interface can be made using an RJ45 or an optical fibre connection with an LC or ST connector type (Ethernet card dependent).

The management of the PRP redundancy is transparent to the application data provided via the Ethernet interface.

The PRP option is available with any of the existing protocol options via the

Ethernet Interface (IEC61850)

Loss of one of the LAN connections to the device does not cause any loss or degradation to the Application data over the Ethernet interface.

The MiCOM relay/IED supports the transmission of the PRP Supervision frame at a fixed time period (LifeCheckInterval) of 2s (+/- 100ms)

Each supervision frame includes a sequence number as defined in the IEC 62439-

3:2012 specification. This is incremented for each supervision message and the value starts from zero following a system restart.

The MiCOM relay/IED does not process received supervision frames to provide supervision of the redundant network.

The MiCOM relay/IED does not provide for the PRP management to be configured

(via either the MiCOM relay/IED HMI or the Ethernet interface). Accordingly, the default values (as defined within this document) are used for all PRP parameters.

The performance of the Ethernet Interface is not degraded by using the PRP interface.

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(PR) 20 PRP Notes

2.6.1

PRP and MiCOM Functions

Abbreviations and Acronyms

Abbreviations / Acronyms

CRC

DAN

DANP

FPGA

HMI

IED

IP

LAN

LRE

MAC

MRP

PRP

RCT

RedBox

RSTP

SAN

TCP

VDAN

Meaning

Cyclic Redundancy Check

Doubly Attached Nodes

Doubly Attached Node implementing PRP

Field-Programmable Gate Array

Human Machine Interface

Intelligent Electronic Devices

Internet Protocol

Local Area Network

Link Redundancy Entity

Media Access Control

Media Redundancy Protocol

Parallel Redundancy Protocol

Redundancy Check Tag

Redundancy Box

Rapid Spanning Tree Protocol

Singly Attached Node

Transmission Control Protocol

Virtual Doubly Attached Node

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MiCOM Px4x (HS) 21 HSR Notes

Px4x/EN HS/B21

HSR NOTES

CHAPTER 21

Page (HS) 21-1

(HS) 21 HSR Notes MiCOM Px4x

Date (month/year): 11/2015

Products covered by this chapter:

Hardware Suffix:

Software Version:

A:

K:

L:

M:

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

P391

P44x (P441, P442, P444), P445, P74x (P741, P743)

P141/P142/P143, P241, P342, P642, P742

P145, P242, P243, P343, P344, P345, P44x (P442, P444), P44y (P443, P446), P54x (P543,

P544, P545, P546), P547, P643, P645, P741, P743, P746, P841, P849

B0:

B1:

B2:

P14x (P141/P142/P143/P145), P34x (P342/P343/P344/P345 & P391), P74x

(P741/P742/P743), P849

P64x (P642, P643 & P645), P746

P746

C1: P746

C2: P746

D0: P24x (P241/P242/P243)

E0: P44x (P442 & P444)

Connection Diagrams: P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx = 01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x(P442 & P444):

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x (P741, P742 & P743):

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (HS) 21-2 Px4x/EN HS/B21

Contents (HS) 21 HSR Notes

CONTENTS

1 Introduction to HSR

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

Introduction to High-availability Seamless Redundancy (HSR)

Protocols

HSR Summary (IEC 62439-3 Clause 5)

Example of an HSR Network

Structure of a DAN

Structure of a RedBox

Communication between SANs, DANs and RedBoxs

HSR Technical Data

2 HSR and MiCOM Functions

2.1

2.2

2.3

2.4

2.5

2.6

2.6.1

MiCOM Products and HSR

MiCOM S1 Studio Software and the HSR Function

MiCOM Relay Configuration and the HSR Function

Hardware Changes for HSR Protocol

HSR Parameters

Product Implementation Features

Abbreviations and Acronyms

Page (HS) 21-

12

12

12

12

12

13

14

15

5

7

8

9

11

5

5

6

6

TABLES

Table 1 – Hardware option numbers with HSR functions

Table 2 - HSR parameter values

Page (HS) 21-

12

13

FIGURES

Figure 1 - HSR Redundancy Network

Figure 2 - DAN communication between two paths (in HSR)

Figure 3 - HSR frame without a VLAN tag

Figure 4 - HSR frame with VLAN tag

Page (HS) 21-

6

7

10

10

Px4x/EN HS/B21 Page (HS) 21-3

(HS) 21 HSR Notes

Notes:

Figures

Page (HS) 21-4 Px4x/EN HS/B21

Introduction to HSR

1

1.1

1.2

(HS) 21 HSR Notes

INTRODUCTION TO HSR

Introduction to High-availability Seamless Redundancy (HSR)

This section gives an introduction to the High-availability Seamless Redundancy (HSR); and how it is implemented on MiCOM-based products manufactured by Schneider

Electric.

Protocols

Industrial real-time Ethernets typically need much better levels of availability and uninterrupted operation than normal office-type Ethernet solutions. For power networks, even a short loss of connectivity may result in a significant loss of functionality or impaired safety. To recover from a network failure, various redundancy schemes have been considered, including: Rapid Spanning Tree Protocol (RSTP), Media Redundancy

Protocol (MRP), High-availability Seamless Redundancy (HSR). The key properties of these are as follows:

RSTP

MRP

This uses mesh-based topologies or ring topology and computes a tree, based on path costs and priorities. In case of network failure, a typical reset time for RSTP-based system is normally a few seconds.

This uses ring-based topologies. In case of network failure, the network is broken into two separate lines, which are reconnected by de-blocking the previously blocked part. The guaranteed reset time for MRP protocolbased systems is typically around 100ms.

HSR HSR basically uses ring topology, This Clause describes the application of the HSR principles (Clause 5) to implement a High-availability Seamless

Redundancy (HSR), retaining the PRP property of zero recovery time, applicable to any topology, in particular rings and rings of rings. With respect to PRP, HSR allows to roughly halve the network infrastructure.

With respect to rings based on IEEE 802.1D (RSTP), IEC 62439-2 (MRP),

IEC 62439-6 (DRP) or IEC 62439-7 (RRP), the available network bandwidth for network traffic is somewhat reduced depending on the type of traffic. Nodes within the ring are restricted to be HSR-capable bridging nodes, thus avoiding the use of dedicated bridges. Singly Attached Nodes

(SANs) such as laptops or printers cannot be attached directly to the ring, but need attachment through a RedBox (redundancy box).

Power networks need to be able to respond to problems very quickly (typically in less than 10ms), and HSR is an available protocol which is robust enough to achieve this. The

HSR protocol used in the MiCOM relay/IED is defined in the IEC62439-3 (2012) standard and is configured using the existing redundant Ethernet card(s).

Px4x/EN HS/B21 Page (HS) 21-5

(HS) 21 HSR Notes

1.3

1.4

Introduction to HSR

HSR Summary (IEC 62439-3 Clause 5)

A summary of the main HSR features is given below:

• HSR Ethernet redundancy method independent of any industrial Ethernet protocol and typically used in a ring topology

• Seamless switchover and recovery in case of failure, which supports real-time communication

Supervises redundancy continuously for better management of network devices

Suitable for hot swap, 24 hour/365 day operation in substations

Allows laptops and workstations to be connected to the network with HSR Redbox

Particularly suited for substation automation, high-speed drives and transportation

Example of an HSR Network

Essentially a HSR network is a ring topology. An example of a HSR network is shown in

Figure 1:

HSR Redundancy Network

DAN

(D1)

DAN

(D2)

DAN

(D3)

RING

RedBox

SAN

(A1)

RedBox

SAN

(A2)

VDAN

VDAN

SAN

(A3)

VDAN

SANs are seen as VDANs

Figure 1 - HSR Redundancy Network

Figure 1 shows typical ring networks that have various Nodes in common.

P0387ENb

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Introduction to HSR

1.5

(HS) 21 HSR Notes

The key features of the network include:

Nodes within the ring are restricted to be HSR-capable bridging nodes, thus avoiding the use of dedicated bridges

Singly Attached Nodes (SANs) such as laptops or printers cannot be attached directly to the ring, but need attachment through a RedBox (redundancy box)

A simple HSR network consists of doubly attached bridging nodes, each having two ports, interconnected by full-duplex link

A source DANH sends a frame passed from its upper layers, prefixes it by an HSR tag to identify frame duplicates and sends the frame over each port

• A destination DANH receives, in the fault-free state, two identical frames from each port within a certain interval, if it is a multicast frame, it instantaneously forwards it on the ring*, removes the HSR tag of the first frame before passing it to its upper layers and discards any duplicate.

*:In particular, the node will not forward a frame that it injected into the ring.

*:A destination node of a unicast frame does not forward a frame for which it is the only destination, except for testing.

Structure of a DAN

A MiCOM P40 relay working in HSR Mode works as a DAN within the overall network

topology. Each DAN has two ports that operate in parallel. As in Figure 2, The two HSR

ports A and B and the device port C are connected by the LRE, which includes a switching matrix allowing to forward frames from one port to the other. The switching matrix allows cut-through bridging. The Link Redundancy Entity (LRE) presents to the higher layers the same interface as a standard Ethernet transceiver would do.

Doubly Attached Node (DAN)

Upper Layers

Structure of a

Doubly

Attached Node

(DAN)

Link

Redundancy

Entity (LRE)

Tx_C Rx_C

Tx_A Rx_A Tx_B Rx_B

Px4x/EN HS/B21

LAN_A

Figure 2 - DAN communication between two paths (in HSR)

LAN_A

P0298ENd

Page (HS) 21-7

(HS) 21 HSR Notes

1.6

Introduction to HSR

DAN node is operable in HSR-tagged forwarding mode, the DAN inserts the HSR tag on behalf of its host and forwards the ring traffic, except for frames sent by the node itself.

Duplicate frames and frames where the node is the unicast destination is not forwarded.

Structure of a RedBox

The RedBox has a LRE that performs the duties of the HSR protocol, in particular:

• forwards the frames received from one HSR port to the other HSR port, unless the frame receives frames addressed to its own upper protocols

• prefixes the frames sent by its own upper layers with the corresponding HSR tag before sending two copies over its HSR ports

The switching logic is incorporated into the RedBox, so interlink becomes an internal connection.

A simple RedBox is present in every node, since the LRE makes a transition to a single non-HSR host. In addition, it is usual to have more than one host in a node, since a port for maintenance often exists.

A node does not send over a port a frame that is a duplicate of a frame previously sent over that port in that same direction.

For the purpose of Duplicate Discard, a frame is identified by:

• its source MAC address;

• its sequence number.

The Duplicate Discard method forgets an entry identified by <Source MAC

Address><Sequence number> after a time EntryForgetTime.

Page (HS) 21-8 Px4x/EN HS/B21

Introduction to HSR

1.7

(HS) 21 HSR Notes

Communication between SANs, DANs and RedBoxs

Singly Attached Nodes (SANs), for instance maintenance laptops or printers cannot be inserted directly into the ring since they have only one port and cannot interpret the HSR tag in the frames. SANs communicate with ring devices through a RedBox (Redundancy

Box) that acts as a proxy for the SANs attached to it.

A source DANH sends a frame passed from its upper layers, and prefixes it by an HSR tag to identify frame duplicates and sends the frame over both ports.

A destination DANH receives, in the fault-free state, two identical frames from each port within a certain interval, if it is a multicast frame, it instantaneously forwards it on the ring*,, removes the HSR tag of the first frame before passing it to its upper layers (“D”frame) and discards any duplicate.

A typical frame contains these parameters:

• dest_addr src_addr type data

Destination Address

Source Address

Type

• fcs Frame Check Sequence (i.e. extra checksum characters added to allow error detection and correction)

HSR frames are identified uniquely by their HSR tag.

The HSR tag consists of these parameters:

16-bit Ethertype (HSR_EtherType = 0x892F)

4-bit path identifier (PathId), 0000 for both HSR nodes A and B, and 0010-1111 for one of 7 PRP networks (A/B).

12-bit frame size (LSDUsize)

16-bit Sequence Number (SeqNr)

Note The 4-bit PathId field prevents reinjection of frames coming from one PRP network to another PRP network.

Accordingly, a typical HSR frame then contains these parameters:

• dest_addr Destination Address src_addr

HSR tag data:

Source Address

16-bit Ethertype (HSR_EtherType = 0x892F)

4-bit path identifier

12-bit frame size

16-bit sequence number: type payload

Padding fcs

Type

Payload if needed

Frame Check Sequence

Px4x/EN HS/B21 Page (HS) 21-9

(HS) 21 HSR Notes Introduction to HSR

Padding After the payload data, there may be some data padding. This is added to frames which would otherwise be too short for conventional network traffic

(minimum frame size is 70 octets).

Size The frame size will vary depending on the contents of the frame and how it has been tagged by the various SANs and DANs. In VLANs, frame tags may be added or removed during transit through a switch. To make the length field independent of tagging, only the original LPDU and the HSR tag are considered in the size.

Figure 3 and Figure 4 shows the frame types with different types of data.

Octet position preamble

0 destination

6 source

12

HSR

_ET

14

LSDU size

16

SeqNr

18

LT

HSR tag payload

Original LPDU

Figure 3 - HSR frame without a VLAN tag

FCS time

P0388ENa

Octet position 0 preamble destination

6 source

12

8100 VLAN

16

HSR

_ET

18

LSDU size

20

SeqNr

22

LT payload FCS time

VLAN tag HSR tag Original LPDU

P0389ENb

Figure 4 - HSR frame with VLAN tag

The key points about these differing frame structures are that:

Unlike PRP, SANs cannot be attached directly to such a duplicated network unless they are able to interpret the HSR tag.

In particular, the node will not forward a frame that it injected into the ring.

A destination node of a unicast frame does not forward a frame for which it is the only destination, except for testing.

DANH receiving from an HSR port, if this frame is not HSR-tagged and is a link local traffic, consume the frame and do not forward it.

DANH receiving from an HSR port, if this frame is HSR-tagged and this node is not a destination, do not pass the frame to the link layer interface.

A node accepts an HSR tagged frame also if the LanId does not correspond to the

PortId and if the LSDUsize does not match the frame size.

Page (HS) 21-10 Px4x/EN HS/B21

Introduction to HSR

1.8

(HS) 21 HSR Notes

HSR Technical Data

• One VLAN tag supported

Up to 128 devices supported

Up to 100Mbit/s full duplex Ethernet

Dynamic frame memory allocation (page manager)

Configurable duplicate detection

Wishbone interface for configuration and status registers

CPU port interface - Wishbone

Support for link-local protocols - CPU may send to specific ports only - CPU knows receive port

Configurable frame memory and queue length

Duplicate detection with configurable size and aging time

MAC address filtering (8 filter masks for interlink port, 6 for CPU port)

Support for interfaces with or without Ethernet preamble

Limitations:

Number of IEDs on a same ring at 100Mbit/s:

Each hop (IED or RedBox) not only carries its own messages but also all the other IED messages thus the bandwidth used is proportional to the number of IEDs.

The maximum number of hops is around 20 when the GOOSE messages are highly used or 40 if the number and importance of GOOSE messages is not high.

When Precision Time Protocol («IEEE1588/IEC 61588») is used:

As the GPS receiver inaccuracy is 200ns and as each hop (IED or RedBox) can add a 50ns inaccuracy, the maximum number of hops is 16 if 1µs accuracy is required (PMU application or Process Bus)

Px4x/EN HS/B21 Page (HS) 21-11

(HS) 21 HSR Notes

2

2.1

2.2

2.3

2.4

HSR and MiCOM Functions

HSR AND MICOM FUNCTIONS

MiCOM Products and HSR

The HSR functions being introduced as part of the overall MiCOM product range provide additional functionality, which is backwards compatible with existing Schneider Electric

MiCOM equipment. This means that existing MiCOM relays/IEDS can be used on networks, which use HSR functions, with no changes being made to those relays/IEDs.

The new MiCOM products that use the HSR, will interrogate other equipment to determine the equipment model number, and then use the model number to decide (at runtime), whether that particular item of equipment can support HSR or not.

MiCOM models which include the following Ethernet board assembly provide the possibility of HSR function support. This is denoted by Digit 7 where the Hardware option is Q or R, as shown below:

Hardware Option

“ Q ” at Digit No 7

“ R ” at Digit No 7

Type

2 LC + 1 RJ45 ports redundant Ethernet board

(Modulated/ Un-modulated IRIG-B)

3 RJ45 ports redundant Ethernet board

(Modulated/ Un-modulated IRIG-B)

Table 1 – Hardware option numbers with HSR functions

Model No format

Px4xxx Q x6Mxxx8M

Px4xxx R x6Mxxx8M

The MiCOM relay/IED firmware has been modified to allow the HSR options to be accepted for the power-up tests in addition to the implementation of the supervision frame transmission.

MiCOM S1 Studio Software and the HSR Function

The addition of this function has no impact of the MiCOM S1 Studio support files so there is no need to upgrade any MiCOM S1 Studio software.

MiCOM Relay Configuration and the HSR Function

There is no need to change the configuration of any relay (as relays which include support for this function will be able to recognize other devices which support it).

Hardware Changes for HSR Protocol

This protocol is implemented using the redundant Ethernet card as a starting point. The

Frame management is achieved by programming the Field-Programmable Gate Array

(FPGA).

The low-level management of the redundant frames is performed within the FPGA; this being defined as the Link Redundancy Entity (LRE). This will add the HSR tag to a frame to be transmitted. The FPGA is also responsible for the stripping of the HSR tag from received frames and discarding the duplicated messages so that only a single application frame is received by the Ethernet processor.

The LRE functionality of the supervision frame transmission is performed by the NIOS II.

The new version of the redundant Ethernet card is based on the 2072069A01 and

2072071A01 (both have modulated and un-modulated IRIG-B).

Page (HS) 21-12 Px4x/EN HS/B21

HSR and MiCOM Functions

2.5

(HS) 21 HSR Notes

HSR Parameters

The Redundant Ethernet standard (IEC 62439-3:2012/FDIS) defines several parameters for the HSR protocol; these being fixed at a default value within this release. The following values are set:

Parameter

Supervision Frame

Multicast Address

Life Check Interval

Value

2 seconds

Description

HSR Mode

Node Forget Time

Entry Forget Time

Duplicate Discard

60 s

400 ms

Node Reboot Interval 500ms

Period between transmission of supervision frames

This is normal HSR mode, Duplicate address will not be supported.

This is the time after which a node entry is cleared.

Duration that the received message Sequence number will be held to discard a duplicate message.

Duration following reboot for which no HSR frames should be transmitted.

Number of multicast addresses to be filtered MulticastFilterSize 16

Table 2 - HSR parameter values

Px4x/EN HS/B21 Page (HS) 21-13

(HS) 21 HSR Notes

2.6

HSR and MiCOM Functions

Product Implementation Features

Here is a list of the main Product Requirements for MiCOM products that support HSR:

The MiCOM relay/IED provides two redundant Ethernet ports using HSR.

The MiCOM relay/IED must be connected to the redundant Ethernet network as a

Double Attached Node (DAN) using HSR (DAN using HSR is known as DANH)

The redundant Ethernet interface can be made using an RJ45 or an optical fibre connection with an LC connector type.

The management of the HSR redundancy is transparent to the application data provided via the Ethernet interface.

The HSR option is available with any of the existing protocol options via the

Ethernet Interface (IEC61850)

Loss of one of the Node connections to the device does not cause any loss or degradation to the Application data over the Ethernet interface.

The MiCOM relay/IED supports the transmission of the HSR Supervision frame at a fixed time period (LifeCheckInterval) of 2s (+/- 100ms)

Each supervision frame includes a sequence number as defined in the

IEC 62439-3:2012/FDIS specification. This will be incremented for each supervision message and the value will start from zero following a system restart.

The MiCOM relay/IED support SNMP.

The MiCOM relay/IED does not provide for the HSR management to be configured

(via either the MiCOM relay/IED HMI or the Ethernet interface). Accordingly, the default values (as defined within this document) are used for all HSR parameters.

The performance of the Ethernet Interface is not degraded by using the HSR interface.

Page (HS) 21-14 Px4x/EN HS/B21

HSR and MiCOM Functions

2.6.1 Abbreviations and Acronyms

Abbreviations / Acronyms

CRC

DAN

DANH

FPGA

HMI

HSR

IED

IP

LAN

LRE

MAC

MRP

PRP

HSR

RedBox

RSTP

SAN

TCP

VDAN

Meaning

Cyclic Redundancy Check

Doubly Attached Nodes

Doubly Attached Node implementing HSR

Field-Programmable Gate Array

Human Machine Interface

High-availability Seamless Redundancy

Intelligent Electronic Devices

Internet Protocol

Local Area Network

Link Redundancy Entity

Media Access Control

Media Redundancy Protocol

Parallel Redundancy Protocol

High-availability Seamless Redundancy

Redundancy Box

Rapid Spanning Tree Protocol

Singly Attached Node

Transmission Control Protocol

Virtual Doubly Attached Node

(HS) 21 HSR Notes

Px4x/EN HS/B21 Page (HS) 21-15

(HS) 21 HSR Notes

Notes:

HSR and MiCOM Functions

Page (HS) 21-16 Px4x/EN HS/B21

MiCOM P54x (P543, P544, P545 & P546) (VH) 22 Version History

P54x/EN VH/Nd5

VERSION HISTORY

CHAPTER 22

Page (VH) 22-1

(VH) 22 Version History MiCOM P54x (P543, P544, P545 & P546)

Date:

Products covered by this chapter:

Hardware suffix:

Software version:

Connection diagrams:

06/2016

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

M

H4

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

Page (VH) 22-2 P54x/EN VH/Nd5

Contents

CONTENTS

1 Software Version

2 Relay Software and Setting File Software Version

3 Relay Software and PSL File Software Version

4 Relay Software and Menu Text File Software Version

TABLES

Table 1 - Software and Hardware Versions

Table 2 - Relay software and PSL file software version

Table 3 - Relay software and PSL file software version

Table 4 - Relay software and menu text file software version

(VH) 22 Version History

Page (VH) 22-

5

51

52

53

Page (VH) 22-

50

51

52

53

P54x/EN VH/Nd5 Page (VH) 22-3

(VH) 22 Version History

Notes:

Tables

Page (VH) 22-4 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

1 SOFTWARE VERSION

02

03

03

A

A

B

A

A

A

Software version

Major Minor

01 A A

Hard- ware suffix

The MiCOM S1 Studio product is updated periodically. These updates provide support for new features (such as allowing you to manage new MiCOM products, as well as using new software releases and hardware suffixes). The updates may also include fixes.

Accordingly, we strongly advise customers to use the latest Schneider Electric version of MiCOM S1 Studio.

The following table shows the Software Version together with the Hardware Suffix the particular software runs on. The changes introduced by each Software Version are shown with each change on one row.

Original date of issue

Description of changes

Feb 2000 First release to production

S1 compat- ibility

V1.07 or

Later

Technical document- ation

TG8613A

Mar 2000 PSB. Three settings added to set zone 6 to increase flexibility.

Protection address. Universal address added.

SEF & EF. Polarizing voltage setting range increased.

Thermal. Setting range increased.

V1.08 or

Later

TG8613B

Trip conversion logic. 3 DDB signals added to simplify logic for users.

Distance. Min polarizing voltage increased to prevent tripping for close up three phase faults.

Check sync. angle measurement improved.

PSB. Text for power swing indication improved.

Include pole discrepancy logic to P543.

Susceptance setting corrected

May 2000 German text changed.

Spanish text changed.

Changes to DDB names & properties.

Improvements in auto-reclose and reset from lockout code.

Changes to pole dead & trip conversion logic.

Changes to P544 circuit breaker fail logic.

Added DDB for CS103 test mode.

Recommend upgrading to 03B software or later

Feb 2002 All builds released for maintenance upgrades.

Resolved possible reboot caused by disturbance recorder.

Resolved possible reboot caused by invalid MODBUS requests.

Resolved a loss of measurements (column 3 & 4) problem that can occur in 3 terminal applications.

Problem whereby MiCOM S1 could only set group 1 line length corrected.

Fixed capacitive charging current compensation in P544.

Corrected P544 display of phase C current phase angle.

IDMT curves improvements.

Removed rounding error in calculation of tp.

V1.09 or

Later

V1.09 or

Later

TG8613B

TG8613B

P54x/EN VH/Nd5 Page (VH) 22-5

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

04

04

04

04

05

05

05

A

B

C

D

A

B

C

A

A

A

A

A

A

A

Original date of issue

Description of changes

Menu dependence using ripple bit corrected.

Directional/non-direction earth fault fixed.

Battery fail alarm improvements.

Power measurements read over MODBUS may be incorrect.

Resolved problem caused by rapid changing self resetting alarm resetting the relay when read key pressed.

Prevented software errors from clearing event log

S1 compat- ibility

Aug 2000 Trip conversion logic moved from internal fixed logic to PSL

Mar 2001 Only P543 CS103 builds released.

Improvements to the CS103 time synchronization

Jun 2001 Only P543 CS103 builds released. Based on 04B.

V1.10 or

Later

V1.10 or

Later

V1.10 or

Later

Resolved a loss of measurements (columns 3 & 4) problem that can occur in

3 terminal applications

Jun 2001 Only P543 CS103 build released. Based on 04C.

Prevents a reboot on power-up when battery is removed

Sep 2000 Internal release for validation only.

Includes DNP3.0.

Courier bay module compatibility modification.

MODBUS bay module compatibility modification.

Distance - Z3 selectable forward/reverse.

Spanish text corrected.

Menu dependence using ripple bit corrected.

MODBUS problem reading negative values of fault location corrected.

RDF file modified.

Directional/non-direction earth fault fixed.

Battery fail alarm corrected.

Very low fault location could be shown incorrectly as negative.

Some MODBUS address changed

Oct 2000 Released to production.

Includes all of 05A changes.

Requirement to use relays 8, 9 & 10 for Trip A, B & C removed.

MODBUS communication problem when used with P140 fixed.

Power measurements read over MODBUS may be incorrect.

MODBUS status register reports disturbance records incorrectly following power cycle

V2.0 or

Later

V1.10 or

Later

V2.0 or

Later

Mar 2001 Only P543 & P544 builds released for customer tests.

PSB now works with single pole open

V2.0 or

Later

Technical document- ation

TG8613B

TG8613B

TG8613B

TG8613B

TG8613B

TG8613B

TG8613B

Page (VH) 22-6 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

05

05

05

05

05

05

Software version

Major Minor

05

05

05

D

E

F

A

A

A

Hard- ware suffix

Original date of issue

Description of changes

May 2001 Only P543 & P544 builds released for customer tests.

S1 compat- ibility

New PSL will be required

Distance directional line fixed at -30º.

PSB block issued when impedance passes into any Z1, Z2 or Z3.

PSB unblock via negative sequence current now done via PSL

Jun 2001 All builds released to production. Based on 05B software.

V2.0 or

Later

Resolved a loss of measurements (column 3 & 4) problem that can occur in 3 terminal applications.

Recommended upgrading to 05K or later

Sep 2001 All builds released to production. Based on 05E software.

Problem whereby MiCOM S1 could only set group 1 line length corrected.

Fixed capacitive charging current compensation in P544.

Corrected P544 display of phase C current phase angle.

IDMT curves improvements.

V2.0 or

Later

Removed rounding error in calculation of tp.

Fixed problems caused by changes to DNP3.0 address.

Recommended upgrading to 05K or later

-

Technical document- ation

TG8613B

TG8613B

G A TG8613B

H

I

J

K

L

A

A

A

A

A

Resolved possible reboot caused by disturbance recorder.

Problem in MODBUS build which can cause a reboot.

Recommended upgrading to 05K or later

Jan 2002 All builds released to production. Based on 05G software.

Resolved possible reboot caused by invalid MODBUS requests.

Recommended upgrading to 05K or later

Oct 2002 Limited release - not released to production. Based on 05H software.

Correct the format used to display frequency over the MODBUS interface.

Recommended upgrading to 05K or later

Nov 2002 All builds released to production. Based on 05I software.

Resolved incorrect operation of C diff failure alarm in 3 terminal schemes.

Correct operation of capacitive charging current compensation in 3 terminal schemes.

V2.0 or

Later

Resolved problem which caused short duration current differential trips in some applications.

Recommended upgrading to 05K or later

Feb 2003 All builds released to production. Based on 05I software.

Resolved problem with IEC 60870-5-103 time synchronization

Jan 2004 Maintenance release based on 05K (not formally released).

V2.0 or

Later

V2.0 or

Later

V2.0 or

Later

V2.0 or

Later

TG8613B

TG8613B

TG8613B

TG8613B

TG8613B

P54x/EN VH/Nd5 Page (VH) 22-7

(VH) 22 Version History Software Version

07

10

A

06

Software version

Major Minor

Hard- ware suffix

05

05

M

N

A

A

Original date of issue

Description of changes

Prevents compressed disturbance recorder stalling.

Prevent a maintenance record when reading from an inaccessible MODBUS register

S1 compat- ibility

Technical document- ation

Jun 2004 Maintenance release based on 05L.

Improved self-checking of analogue data acquisition.

Improved self checking of SRAM.

Reception of MODBUS frame improved.

Rejection of spurious messages injected onto RS485 network improved.

Permissive intertrip in dual redundant schemes corrected

Jun 2005 Maintenance release based on 05M.

Changed MODBUS driver

V2.0 or

Later

V2.0 or

Later

TG8613B

TG8613B

06 A A - -

B A

In non GPS mode the char modification timer has been made visible in

P545/P546.

The char modification timer setting was not being seen by the co-processor board.

GPS detected flag was not cleared when switching from GPS to non GPS mode.

Equal prop delay command was not resetting inhibit following a comms. switch.

Problem displaying Rx & Tx when comms. path was short fixed.

Note: Non of the above are relevant to software in production

A

A

B

Prevent loss of measurements in 3 ended schemes.

Added a 1s drop off timer to C diff inhibit.

Changed max value of char mod timer to 2s.

Increased number of PSL timers to 16 (all models).

Corrected PSL default reference.

Added a setting to P543/5 AR to select which edge of trip initiates AR.

Added 3 DDB signals to block distance.

Removed force 3 pole trip DDB.

Note: Non of the above are relevant to software in production

Additional check sync signals added to PSL

GPS synchronization.

-

V2.08 or

Later

-

No official release to support this version. Will need V2 to extract PSL files

-

-

Page (VH) 22-8 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

10

10

Software version

Major Minor

Hard- ware suffix

10 A B

Original date of issue

Description of changes

Flexible intertripping.

Signaling message format changed.

S1 compat- ibility

Models 5 & 6 (but limited to 16 optos & 14 relays).

Remains of neutral C diff removed.

Event optimization & filtering.

Watt hour measurement correction.

Addition of digital opto filtering control.

Changes & additions to error codes.

Increase in protection signaling address.

DDB increased in size to 1022 and also support functions changed.

Support for universal optos (model number suffix B).

Support for new output relays added

Feb 2001 Internal loopback setting added (not full functional).

PSL references added.

Reset LEDs DDB name change.

Text for cells 0F20 - 0F2F changed.

Problem whereby MiCOM S1 could only set group 1 line length corrected.

Control inputs added.

Restore defaults now restores DNP3.0 cells correctly.

Prevent non DNP3.0 builds generating fatal error when S1 request DNP3.0 upload.

MODBUS enabling/disabling of IRIG-B now works.

No official release to support this version. Will need V2 to extract PSL files

-

Technical document- ation

Courier/MODBUS event bit functionality corrected.

DNP3.0 & MODBUS address are compatible but there are several new ones.

Software is not compatible with previous software (signaling message)

B B

Fixed a reset indications problem in CS103 build.

Fixed a problem with P544 display of phase C current phase angle.

Setting relay address via rear port corrupted other setting ranges

As per 10A -

C B

Support for new co-processor board added.

In non GPS mode the char modification timer has been made visible in

P545/P546.

The char modification timer setting was not being seen by the co-processor board.

GPS detected flag was not cleared when switching from GPS to non GPS mode.

As per 10A -

P54x/EN VH/Nd5 Page (VH) 22-9

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

10

10.

10

D

E

F

B

B

B

Original date of issue

Opto filtering corrected.

Description of changes

Equal prop delay command was not resetting inhibit following a comms. switch.

Problem displaying Rx & Tx when comms. path was short fixed.

Note: Non of the above are relevant to software in production

S1 compat- ibility

Prevent loss of measurements in 3 ended schemes.

Added a 1s drop off timer to C diff inhibit.

Changed max value of char mod timer to 2s.

Increased number of PSL timers to 16 (all models).

Corrected PSL default reference.

Added a setting to P543/5 AR to select which edge of trip initiates AR.

Added 3 DDB signals to block distance.

Removed force 3 pole trip DDB.

Resolved problem caused by rapid changing self resetting alarm resetting the relay when read key pressed.

Note: Non of the above are relevant to software in production

V2.01b

(not issued)

-

Fixed capacitive charging current compensation in P544 & P546.

Fixed fast operating times for IDMT at a particular multiply of setting.

Added MODBUS control of opto filter cell.

Removed the quick start up for GPS because it was causing general startup problems.

Fixed the GPS inhibit in dual redundant mode.

Fixed an error in GPS synchronization when a timer wraps round.

Fixed comms. delay equal command in 3 terminal schemes.

CS103 time sync modified not to generate courier events.

Note: Non of the above are relevant to software in production

Internal release for validation only - runs on phase 2 hardware with a new coprocessor board.

Added CS103 private codes.

Added uncompressed disturbance recorder to CS103 build.

Added translations for filter control.

Fixed the GI list for P545 & P546.

Fixed the incorrect response in three terminal mode with GPS present and running on a split path followed by a power cycle at one end.

Fixed the occasional incorrect calculation of tp being caused by rounding errors.

Fixed the incorrect response in dual redundant schemes with GPS failure followed by a switch to a split path on one channel and a comms. failure on the other.

Prevented software errors from clearing event log.

V2.01b

(not issued)

-

V2.01b

(not issued) -

Technical document- ation

Page (VH) 22-10 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

11

11

11

11.

Software version

Major Minor

Hard- ware suffix

A

B

C

D

B

B

B

B

Original date of issue

Description of changes

Unextracted disturbance records now set the courier status flag on power up.

S1 compat- ibility

Added support for MODBUS function code 7.

Corrected the MODBUS status bit 0.

Corrected the OTEV bit in the status of fault in IEC60870-5-103.

Menu text files do not contain the additional translations.

Note: Non of the above are relevant to software in production

Sep 2001 First phase 2 release to production.

V2.03 or

Later

Includes all of 10F.

Added CS103 monitor/command blocking.

PSB now uses 6 comparators.

Distance directional line fixed at -30º.

PSB block issued when impedance passes into any Z1, Z2 or Z3.

PSB unblock via negative sequence current now done via PSL.

Modified co-processor initiation to run on 1 wait state (memory access problem).

Fixed a problem with P545 & P546 opto & relay labels in disturbance record.

Fixed the GPS inhibit.

Recommended upgrading to 11G or later

Oct 2001 All builds released to production. Based on 11A software.

V2.03 or

Later

Modified the co-processor start-up routine to work with alternative types of

SRAM.

Improved response to a CS103 poll class 1 when monitor blocked was active.

Resolved a time alignment problem which resulted in C diff failure alarms being raised.

Corrected some MODBUS address for P545 & P546.

Fixed a problem with the relays response to MODBUS commands read coils and read inputs.

Fixed an incorrect response to a DNP3.0 command.

Recommended upgrading to 11G or later

Dec 2001 All builds released to production. Based on 11B software.

V2.03 or

Later

Fixed a problem in P541 & P542 CS103 builds where the voltage and power measurements were not being marked as invalid.

Fixed a problem in P544 & P546 where the SEF current measurement was incorrect when set to 1A & 60 Hz.

Recommended upgrading to 11G or later

Jan 2002 All builds released to production. Based on 11C software.

Resolved possible reboot caused by disturbance recorder.

Resolved possible reboot caused by invalid MODBUS requests.

Resolved problem when internal loopback was selected with external clocks.

Resolved a problem which caused the loss of IEC 60870-5-103 class 1 messages.

V2.03 or

Later

Technical document- ation

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(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

11

11.

11

11

11

11

E

F

G

H

I

J

B

B

B

B

B

B

Original date of issue

Description of changes

Recommended upgrading to 11G or later

Oct 2002 All builds released to production. Based on 11D software.

Resolved incorrect operation of C diff failure alarm in 3 terminal schemes.

Correct operation of capacitive charging current compensation in 3 terminal schemes.

Resolved problem which caused short duration GPS failure alarms.

Recommended upgrading to 11G or later

Feb 2003 All builds ready. Based on 11E software.

V2.03 or

Later

Resolved several problems related to the IEC 60870-5-103 protocol.

Resolved problem which may cause short duration current differential trips.

Corrected the format used to display frequency over the MODBUS interface.

Recommended upgrading to 11G or later

May 2003 All builds ready. Based on 11F software.

V2.03 or

Later

Changes to clock recovery circuits to improve operation with multiplexers.

PSL logic for user defined intertrips corrected P545 & P546.

Permissive intertrip in dual redundant schemes corrected.

Prevented unwanted comms. delay alarms

Sept 2003 All builds ready. Based on 11G software.

Prevents compressed disturbance recorder stalling.

Prevents CS103 reporting more non-compressed disturbance records than actually present

V2.03 or

Later

S1 compat- ibility

V2.03 or

Later

Oct 2004 All builds released to production. Based on 11G software.

V2.03 or

Later

Improved self-checking of analogue data acquisition.

Differential intertrip in IEC 60870-5-103 reported with correct FAN.

SRAM self checking added to co-processor board.

Reception of MODBUS frame improved.

Rejection of spurious messages injected onto RS485 network improved.

Improved self checking of SRAM.

Fixed an incorrect response of the summertime time bit in IEC 60870-5-103 protocol.

Prevented incorrect behavior of P545/P546 when one relay is energized when there is noise on the signaling channel.

Status of local GPS reported incorrectly in dual redundant schemes.

Setting “Char Mod Time” was missing on P541 - P544.

Prevent a maintenance record when reading from an inaccessible MODBUS register.

Prevents relay crashing when phase 2 software used with phase 1 optos.

Cell 0709 now replies OK change

Jul 2005 All builds released to production. Based on 11I software.

V2.03 or

Later

Technical document- ation

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Software Version (VH) 22 Version History

12

Software version

Major Minor

Hard- ware suffix

12.

A

B

B

B

B

B

Original date of issue

Description of changes

Changed MODBUS driver

Mar 2002 Released for validation testing only.

2nd rear comms. added.

Alarms increased to 64 with user programmable alarms.

Enhancements and corrections to CS103.

Prevented additional events being generated on power up.

French language text improvements.

Prevent a maintenance record when reading from an inaccessible MODBUS register.

Setting “Char Mod Time” was missing on P541 - P544.

Prevents relay crashing when phase 2 software used with phase 1 optos.

Cell 0709 now replies OK change.

Maximum pre-trigger time for disturbance recorder in IEC 870-103-5 builds reduced to allow extraction via rear port

Nov 2002 All builds released to production. Based on 12A software.

V2.05 or

Later

Resolved incorrect operation of C diff failure alarm in 3 terminal schemes.

Correct operation of capacitive charging current compensation in 3 terminal schemes.

Resolved problem which caused short duration GPS failure alarms.

Resolved problem selecting setting group via optos.

Resolved a circuit breaker lockout problem.

Corrected the thermal measurement displayed when thermal protection is disabled.

Spanish text for user defined alarms contained an extra letter.

Blocked overcurrent elements now generate events.

Correct DNP3.0 operation of object 10

Nov 2002 Resolved problem with P541 & P542 IEC 60870-5-103 builds not running.

Resolved a problem with IEC 60870-5-103 class 1 polling.

Resolved a problem with IEC 60870-5-103 ASDU2 events which occurred prior to a start event.

Correct the format used to display frequency over the MODBUS interface.

Resolved problem related to incorrect CB trip/close commands via MODBUS.

V2.05 or

Later

Resolved problem related to CB trip/close commands via MODBUS being accepted when not selected.

Resolved a problem which prevented protection setting being saved after control and support setting had been saved.

Corrected the saving of fault locator settings in groups 2, 3, 7

& 4 when made via user interface.

Added object 10 to DNP3.0 class 0 poll.

Corrected the way DNP3.0 handled the season bit in the time

& date.

Recommended upgrading to 12D or later

S1 compat- ibility

V2.05 or

Later

Technical document- ation

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P54x/EN VH/Nd5 Page (VH) 22-13

(VH) 22 Version History Software Version

Software version

Major Minor

12 C B

Hard- ware suffix

12

12

12

12.

12

12

13

D

E

F

G

H

I

A

B

B

B

B

B

B

B

Original date of issue

Description of changes

Mar 2003 All builds released to production. Based on 12B software.

Resolved several problems related to the IEC 60870-5-103 protocol.

Resolved problem which may cause short duration current differential trips.

S1 compat- ibility

V2.05 or

Later

Improved self diagnostics relating to input module clock.

Modified courier block transfer mechanism so it can handle more than 255 blocks.

Intermittent loss of data from 2nd rear comms. port corrected.

PSL logic for user defined intertrips corrected P545 & P546.

Permissive intertrip in dual redundant schemes corrected.

Recommended upgrading to 12D or later

Jun 2003 All builds released to production. Based on 12C software.

Changes to clock recovery circuits to improve operation with multiplexers.

Prevented unwanted comms. delay alarms

Sept 2003 All builds released to production. Based on 12D software.

Prevents compressed disturbance recorder stalling.

Correction to operation of reset relays/LEDs opto.

Prevents CS103 reporting more non-compressed disturbance records than actually present

V2.05 or later

V2.05 or later

Improved self-checking of analogue data acquisition.

Differential intertrip in IEC 60870-5-103 reported with correct FAN

Oct 2004 All builds released to production. Based on 12E software.

V2.05 or

Later

V2.05 or

Later

Improved self-checking of analogue data acquisition.

Differential intertrip in IEC 60870-5-103 reported with correct FAN.

SRAM self checking added to co-processor board.

Reception of MODBUS frame improved.

Rejection of spurious messages injected onto RS485 network improved.

Improved self checking of SRAM.

Fixed an incorrect response of the summertime time bit in IEC 60870-5-103 protocol.

Prevented incorrect behavior of P545/P546 when one relay is energized when there is noise on the signaling channel.

Status of local GPS reported incorrectly in dual redundant schemes

May 2005 All builds released to production. Based on 12G software.

Changed MODBUS driver

May 2006 All builds released to production. Based on 12G software.

Improvements to the distance protection

Apr 2004 All builds released to production. Based on 12E software.

V2.05 or

Later

V2.05 or

Later

V2.10 or later

Technical document- ation

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Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

13

13

13

B

C

D

B

B

B

Original date of issue

Description of changes

Control inputs enhancements including non-volatile, latched, pulsed and support for DNP3.0 pulsed.

Enhanced DNP3.0.

Distance Residual compensation angle range extended.

Display of number of good messages via MODBUS is corrected.

Prevented DNP3.0 time sync causes relay to reboot when IRIG-B is active.

Improved self-checking of analogue data acquisition.

Improved self checking of SRAM.

Added TRIP & ALARM to MODBUS status word.

Addition of MODBUS only setting to allow transmission of IEC time format in reverse IEC byte order.

Reception of MODBUS frame improved.

S1 compat- ibility

Rejection of spurious messages injected onto RS485 network improved.

Handling of FAN in IEC 60870-5-103 improved.

Differential intertrip in IEC 60870-5-103 reported with correct FAN

Aug 2004 All builds released to production. Based on 13A software.

SRAM self checking added to co-processor board.

Fault location & cumulative broken current measurements reported over

DNP3.0.

Accuracy of MODBUS time sync improved.

Invalid MODBUS register 4x00966 removed.

Reception of MODBUS frame improved

Oct 2004 All builds released to production. Based on 13B software.

Resolved a problem relating to co-processor SRAM checking.

Fixed an incorrect response of the summertime time bit in IEC 60870-5-103 protocol.

Prevented incorrect behavior of P545/P546 when one relay is energized when there is noise on the signaling channel.

Status of local GPS reported incorrectly in dual redundant schemes

Mar 2005 All builds released to production. Based on 13C software.

V2.10 or

Later

(DNP3.0 files) different to

13A

Correction to single pole auto-reclose.

Remapped fun/inf. 192/130 in P543 & P545.

Display of no. valid messages on LCD corrected.

V2.10 or

Later

(DNP3.0 files) different to

13A

V2.10 or

Later

(DNP3.0 files) different to

13A

Technical document- ation

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(VH) 22 Version History Software Version

20 A

Software version

Major Minor

Hard- ware suffix

Original date of issue

Description of changes

DNP3.0 improved binary scanning.

Operation of CB maintenance alarm corrected.

Corrections to allow extended courier characters to be used in string setting cells for courier and MODBUS.

Corrected default display of neutral current for 5A CTs.

Prevented a reboot for DNP3.0 versions when control & support settings are changed rapidly.

Changes to co-processor start-up to eliminate a timing problem

13

13

E

F

B

B

Apr 2005 All builds released to production. Based on 13D software.

Changed MODBUS driver

Jun 2006 All builds released to production. Based on 13E software.

Improvements to the distance protection.

Add interframe gap to DNP3.0.

Corrections to IRIG-B.

Vector group compensations for YY2 and YY10 corrected.

Corrected reporting of distance & C diff stars over CS103.

Reports the correct COT for reset LEDs command sent via S1.

Corrected a problem which occurs when two relays power up when one is configured out

S1 compat- ibility

Technical document- ation

V2.10 or

Later

(DNP3.0 files) different to

13A

V2.10 or

Later

(DNP3.0 files) different to

13A

P54x/EN T/E21

P54x/EN T/E21

16 A B Jul 2006 Release of P543 CS103 for Germany only. Based on 13F.

CS103/Auto-reclose modifications

Patch for

V2.12

-

P54x/EN T/E21

G

UCA2 option added.

Russian text added (not complete).

Added fault location to for IEC 60870-5-103.

Added TRIP & ALARM to MODBUS status word.

Distance direction setting added.

Distance residual compensation angle range extended.

Indication of password status on DDB (code added but not run).

Improvements to auto-reclose.

Alarms increased to 96.

Corrected the response to courier SEND EVENT.

Improved self diagnostics relating to input module clock.

Removed the setting for IEC 60870-5-103 over fiber when hardware not present.

-

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Software Version (VH) 22 Version History

20

20

20

20

20

20

Software version

Major Minor

Hard- ware suffix

B

B

C

D

E

F

G

G

G

G

G

G

Original date of issue

Description of changes

Resolved problem related to CB trip/close commands via MODBUS being accepted when not selected.

Corrected the saving of fault locator settings in groups 2, 3 & 4 when made via user interface.

S1 compat- ibility

Added object 10 to DNP3.0 class 0 poll.

Corrected the way DNP3.0 handled the season bit in the time & date

Apr 2003 Internal release for validation only. Based on 20A.

Enhanced check synchronization feature.

Control inputs enhancements including non-volatile, latched, pulsed and support for DNP3.0 pulsed.

BBRAM used in disturbance recorder optimized.

-

Resolved several problems related to the IEC 60870-5-103 protocol.

Resolved problem which may cause short duration current differential trips.

Improved self diagnostics relating to input module clock.

Modified courier block transfer mechanism so it can handle more than 255 blocks

Apr 2003 PSL logic for user defined intertrips corrected P545 & P546.

Permissive intertrip in dual redundant schemes corrected.

-

Operation of manual reset alarms corrected.

A number of bug fixes relating to CPU2

Apr 2003 Internal release for validation only. Based on 20B.

CB control via hot keys.

A number of bug fixes relating to CPU2

Jul 2003 Internal release for validation only. Based on 20C.

-

V2.09 or

Later

Changes to clock recovery circuits to improve operation with multiplexers.

Prevented unwanted comms. delay alarms.

Enhanced auto-reclose feature added.

Alarms handled better in CS103 GI.

Time synchronization via opto added.

Platform alarms copied to DDB.

Correction to operation of reset relays/LEDs opto.

Backup protection run if co-processor fails to start up on power on.

Correction to cell 0B25.

A number of bug fixes relating to CPU2

Oct 2003 Limited release for NiCAP + selected others.

V2.09 or

Later

Extraction of disturbance recorder over MODBUS added.

Resolve nucleus missing HISR problems.

Enhancements to IDMT curves.

Display of number of good messages via MODBUS is corrected.

A number of bug fixes relating to CPU2

Feb 2004 Release to production.

V2.09 or

Later

-

-

-

Technical document- ation

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(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

20

20

20

G

H

I

G

G

G

Original date of issue

Description of changes

UCA2: Increase max. pending requests & max. connected clients.

Enhanced DNP3.0.

S1 compat- ibility

Prevented DNP3.0 time sync causes relay to reboot when IRIG-B is active.

Corrected cause of transmission which may be returned for "Fault Location".

Prevents relay rebooting during EMC ANSI fast transient and IEC high frequency.

A number of bug fixes relating to CPU2

Jun 2004 Release to production. Based on 20F software.

V2.09 or

Later

Prevented repeated downloads of GSL files without Ethernet card restart rebooting Ethernet card.

Correction to uploading of disturbance records over UCA2.

Corrected operation of Ethernet card link LED for 10 Base-FL.

Closed UCA2 association after "dirty" client disconnection.

Made UCA2 disturbance record directory service compatible with PACiS.

Corrected under and over voltage blocking of check sync.

Improved self-checking of analogue data acquisition.

Handling of FAN in IEC 60870-5-103 improved.

Differential intertrip in IEC 60870-5-103 reported with correct FAN.

Prevented C diff fail alarm occurs before signaling fail alarm for loss of communications.

Improved self checking of SRAM

Oct 2004 Release to production. Based on 20G software.

SRAM self checking added to co-processor board.

Fixed an incorrect response of the summertime time bit in IEC 60870-5-103 protocol.

Prevented incorrect behavior of P545/P546 when one relay is energized when there is noise on the signaling channel.

Status of local GPS reported incorrectly in dual redundant schemes.

Accuracy of MODBUS time sync improved.

V2.09 or

Later

Fixed an incorrect response of the summertime time bit in IEC 60870-5-103 protocol.

Prevented Ethernet card restarting after approximately 20 hours when no connection made.

Improvements to time sync for courier, CS103 and DNP3.0.

Invalid MODBUS register 4x00966 removed

Nov 2004 Release to production. Based on 20G software.

Display of no. valid messages on LCD corrected.

Operation of CB maintenance alarm corrected.

V2.09 or

Later

Corrections to allow extended courier characters to be used in string setting cells for courier and MODBUS.

Corrected default display of neutral current for 5A CTs.

Prevented a reboot for MODBUS versions during event extraction when messages where close together.

Technical document- ation

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Software Version (VH) 22 Version History

20

20

20

20

Software version

Major Minor

Hard- ware suffix

20

30

J

K

L

M

A

G

G

G

G

G

J

Original date of issue

Description of changes

Correction to prevent the 2nd rear comms. locking up

Apr 2006 Release to production. Based on 20G software.

Correction to IEEE/US inverse reset setting.

Changes to co-processor start-up to eliminate a timing problem

Apr 2006 Release to production. Based on 20G software.

Improvements to the distance protection.

Add interframe gap to DNP3.0.

Corrections to IRIG-B.

Vector group compensations for YY2 and YY10 corrected.

Corrected reporting of distance & C diff stars over CS103.

Reports the correct COT for reset LEDs command sent via S1.

Corrected a problem which occurs when two relays power up when one is configured out

P545 Release to Production. Based on 20K software.

Resolved a problem which interrupted the UCA2 communications periodically.

V2.09 or

Later

Resolved a problem relating to CT Ratio’s not being restored when restoring default settings.

Resolved a problem with the Disturbance Recorder which saturates for High current levels into 5A CT.

Resolved problem with relay recognising non zero entry in 14th position of model number

V2.09 or

Later

S1 compat- ibility

V2.09 or

Later

Technical document- ation

P54x/EN T/G42

P54x/EN T/G42

P54x/EN T/G42

Nov 2009 Release to Production. Based on 20L software.

Improvements to the GPS code.

Improvements in the clock recover circuits used by the Differential Comms.

Correction to the way latched LED/Relays are cleared.

Correction to autoreclose operation for switch on to fault condition.

Prevented CB Operating Time displaying 4.295Ms.

Bug Fixes

V2.09 or

Later

Release to Production. Based on 20M software.

V2.09 or

Later

P54x/EN T/G42

P54x/EN T/G42

Prevented the Differential protection inhibiting in three terminal schemes when

GPS is enabled and loopback mode selected.

Fault locator measurements in ohms corrected when 5A CT used or displayed in primary.

Sep 2004 Released to selected customers only. Based on 20G.

V2.09 or

Later (No language file support)

P54x/EN T/G42

Interface to optical multiplexer (IEEE standard C37.94).

SRAM checking in co-processor.

Dual range optos.

AREVA livery & software changes.

P54x/EN VH/Nd5 Page (VH) 22-19

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

30

30

30

30

30

30

30

30

B

C

D

E

F

G

H

I

J

J

J

J

J

J

J

J

Original date of issue

Description of changes

S1 compat- ibility

Extended residual angle in fault locator to match distance.

Rename GOOSE signals in line with P443.

Add virtual signals, control inputs & user alarms to DR in line with P443.

Relay settings shall be stored in FLASH EEPROM instead of EEPROM memory.

Extend range of time dial to line up with P140.

Accuracy of MODBUS time sync improved.

Invalid MODBUS register 4x00966 removed.

Improvements to time sync for courier, CS103 and DNP3.0.

Addition of MODBUS only time and date format setting to common courier settings for access from the other interfaces.

Vector group compensations for YY2 and YY10 corrected.

Dec 2004 Released to production. Based on 30C.

Prevented Ethernet card restarting after approximately 20 hours when no connection made.

Prevented incorrect behavior of P545/P546 when one relay is energized when there is noise on the signaling channel

Nov 2004 Released to production but held. Based on 30A.

Courier, MODBUS & DNP3.0 communications over Fiber added

Nov 2004 Released to production. Based on 30B.

Correction to prevent the 2nd rear comms. locking up.

Correction to prevent the front panel UI and comms. lockup after continued operation.

V2.11 or

Later

V2.11 or

Later

Changes to co-processor start-up to eliminate a timing problem

V2.11 or

Later

Improvements to operation when subjected to multiple communication switches when operating in non-GPS mode

Jan 2005 Released to production. Based on 30D.

V2.11 or

Later

VTS enhanced to restore 3 software version 20 performance for three pole tripping whist keeping the improvements for 1 pole tripping added at 30B

Mar 2005 Released to production. Based on 30E.

V2.11 or

Later

Enhancements to the current differential performance under switched communication channels.

Correction to the CS103 mapping for platform alarms

May 2005 Released to production. Based on 30G.

Improvements to the distance protection.

Add interframe gap to DNP3.0.

Corrections to IRIG-B.

V2.11 or

Later

V2.11 or

Later

V2.11 or

Later

Technical document- ation

P54x/EN T/H53

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Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

40

41

41

41

A

C

D

E

K

K

K

K

Original date of issue

Description of changes

Vector group compensations for YY2 and YY10 corrected.

Corrected reporting of distance & C diff stars over CS103.

Reports the correct COT for reset LEDs command sent via S1.

Corrected a problem which occurs when two relays power up when one is configured out.

Modification to allow individual MODBUS register access

Definitive time directional negative sequence overcurrent I2>.

GPS synchronization of current differential in all models.

P543 and P545 now facilitate in zone transformer-feeder applications.

All models support ABC and ACB phase rotation.

Standard and Inverted CT polarity setting for each set of CTs in the relay.

User interface with tri colored LED and function keys.

InterMiCOM64.

Voltage protection.

Backwards compatibility mode

S1 compat- ibility

IEC 61850-8-1.

High break options.

Unmodulated IRIG-B options.

Reduction of distance minimum reach settings to 0.05 ohm.

Permissive trip reinforcement.

Poledead modifications for Hydro Quebec.

CS103/auto-reclose modifications

Prevents a possible reboot 15 minutes after browsing the front courier port but not making a setting change i.e. browsing using PAS&T.

Patch for

V2.12

Extended GOOSE Enrolment Capability.

Correction to ICD files, Enumeration (value) and Fixed data Mapping

Patch for

V2.12

Prevent a reboot in 61850 builds when NIC link is inactive and avalanche of

DDB activity.

Correctly report a fatal error generated by the sampling call-back.

Correct the operation of the GOOSE messaging and a problem with the download of an IED Configuration file.

Correct the operation of the check sync.

Correct the operation of the overcurrent reset curves.

Removed check on the14th position of model number.

Fixed Telegrams for public inf 64-67.

SOTF can operate even when it is disabled

Patch for

V2.12

Patch for

V2.12

Technical document- ation

P54x/EN M/I64

P54x/EN M/J74

P54x/EN M/J74

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P54x/EN VH/Nd5 Page (VH) 22-21

(VH) 22 Version History Software Version

Software version

Major Minor

41 F K

Hard- ware suffix

41

41

42

G

H

A

K

K

K

Original date of issue

Description of changes

Prevent a fatal error from an incorrect DNP address in not using DNP evolutions platform.

Default setting for 450B 'I< Current Set' reduced to 50mA.

French Translations for DDBs 1368-1371corrected.

Fun & INF values related to CS103 Command Blocking corrected.

Angle for negative sequence phase overcurrent setting corrected.

Corrected operation when using MiCOM S1 is used to activate Settings group by right clicking on the group.

Corrected the latching of Function Key DDB signals on relay power up.

S1 compat- ibility

Patch for

V2.12

Corrected Disturbance recorder scaling to prevent high current levels into 5A

CT causing the Disturbance Recorder to saturate.

Restring defaults appears not to change the 1/5A CT selection.

Corrected the performance of the IM64 Direct mode.

CB control via Direct access does not work with 2CB versions of P540D.

Autoreclose dead time/close cycle continues even if AR switched out of service.

Ch2 Statistics may not be displayed

P543, P544, P545 & P546 non 61850 builds without distance protection based on 41F was approved for release but withdrawn before release.

Corrections to enable/disable of Autoreclose

Corrections to enable/disable of Autoreclose

Patch for

V2.12

Patch for

V2.12

Release of P543, P544, P545 & P546 without distance protection.

Patch for

V2.12

Technical document- ation

P54x/EN M/J74

P54x/EN M/J74

P54x/EN M/J74

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

Chinese interface.

Replacing the existing DNP3 with the DNP3 evolutions.

Replacement of existing negative sequence overcurrent with multi stage (2

IDMT + 2 DT) negative sequence overcurrent..

Addition of IDG curve, commonly used in Sweden, to Earth Fault & Sensitive

Earth Fault (involves moving settings).

Reduction of all TMS step sizes to 0.005.

Addition of Channel propagation delay Statistics and Alarms.

Changes to CTS so both techniques can be selected together.

Regrouping of CTS settings.

Addition of four stages of under frequency protection and two stages of

Overfrequency protection.

Addition of df/dt protection.

Changes to Under and Overvoltage to enable each stage to be independently set.

Extensions to the checksync VT position setting.

Page (VH) 22-22 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

42

42

42

42

42

42

B

D

E

F

G

H

K

K

K

K

K

K

Original date of issue

Description of changes

Changes to Permissive Inter Trip (PIT) logic to enable the user to select either local or remote current to be used.

S1 compat- ibility

Includes local time zone settings for Date & Time.

Reduced minimum setting for IN> I2pol Set.

Addition of propagation delay times to Fault Record.

Default setting for 450B 'I< Current Set' reduced to 50mA.

Enhancement to self checking of output relays.

Change tunnelled courier address to follow the 1st Rear Port’s KBUS or

CS103 address.

Improvements to VTS.

Corrections to enable/disable of Autoreclose.

Resolved a problem relating to CT Ratio’s not being restored when restoring default settings.

Resolved a problem with the Disturbance Recorder which saturates for High current levels into 5A CT.

Patch for

V2.12

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

Fixed a number of 61850/Goose problems.

Minor correction to fault record.

Corrections to over voltage stage 2 inhibit.

Fixed the max prop alarm.

Corrected some DDB German text

Fixed a number of 61850 problems.

Improved co-processor error reporting.

Fixed Inhibit CB Fail Protection in P544/6

Not released to production. Based on 42E.

Correction to autoreclose operation for switch on to fault condition.

Prevented CB Operating Time displaying 4.295Ms.

Bug fixes

Correction to the distance cross polarising when the memory expires

Corrected some menu translations.

Patch for

V2.12

Patch for

V2.12

Patch for

V2.12

Patch for

V2.12

Patch for

V2.12

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x/EN VH/Nd5 Page (VH) 22-23

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

44

44

A

B

K

K

Original date of issue

Description of changes

Corrected Breaker Fail - WI Aided1 trips so they can be disabled via setting

"WI Prot Reset".

Timestamp in fault record adjusted for the local time setting.

Corrected P543 default PSL.

Corrections to the Current Differential Inhibit when the GPS synchronisation is disabled.

Corrected Thermal State measurement via DNP3.

Correction to the way latched LED/Relays are cleared.

Correction to Negative sequence overcurrent settings when 5A input used.

Correction to P545/P541 compatibility when used in transformer compensation mode.

S1 compat- ibility

Improvements to the GPS code.

Prevented CTS generating events when CTS is disabled.

Prevent Z5 from setting slow swing when PSB is disabled.

Fixed problem which prevented residual overvoltage from initiating CB Fail.

Various improvements to DNP, CS103 & IEC61850 protocols.

Bug fixes

Positional information added to PSL.

DNP 3.0 Over Ethernet protocol added.

Patch for

V2.14

First release of

Studio

Extended I/O – status inputs increased from 24 to 32.

Compensated overvoltage protection added.

IEC-103 Generic Services Measurements added.

Set/Reset Latch Logic Gates added to PSL.

Fault record to include current differential currents recorded at the time of the current differential trip in addition to the existing data from 1 cycle later.

Fault record increased max number of fault records to 15.

GPS Alarm modifications.

DNP enhancements for SSE.

Bug fixes

Fixed a number of 61850 problems.

Improved co-processor error reporting.

Fixed Inhibit CB Fail Protection in P544/6.

Corrected some French and German text.

Prevented CB Operating Time displaying 4.295Ms.

Fixed a problem which prevented extraction of dnp3 setting files from dnp3 over Ethernet variants.

Patch for

V2.14

First release of

Studio

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

Page (VH) 22-24 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

44

Software version

Major Minor

44

44

44

45

45

D

E

F

B

C

K

K

K

U/V/W/X K

K

K

Hard- ware suffix

Original date of issue

Description of changes

Corrections to the Current Differential Inhibit when the GPS synchronization is disabled.

S1 compat- ibility

Patch for

V2.14

First release of

Studio

Corrected Thermal State measurement via DNP3.

Timestamp in fault record adjusted for the local time setting.

Corrected Breaker Fail - WI Aided1 trips so they can be disabled via setting

"WI Prot Reset"

Patch for

V2.14

First release of

Studio

Prevents the loss of IEC61850 messages and fixed the handling of the ACD flag during GI.

Improved the Ethernet card boot code

Corrected some menu translations.

Corrected P543 default PSL.

Correction to the way latched LED/Relays are cleared.

Correction to Negative sequence overcurrent settings when 5A input used.

Correction to P545/P541 compatibility when used in transformer compensation mode.

Patch for

V2.14

First release of

Studio

Improvements to the GPS code.

Prevented CTS generating events when CTS is disabled.

Fixed problem which prevented residual overvoltage from initiating CB Fail.

Various improvements to DNP, CS103 & IEC61850 protocols.

Bug fixes

June 2012 Release of P54x (P543/P54/P545/P546) based on 44/54G.

CS103 for CB Monitor functions (CB1 only).

Software re-branded from Areva to Schneider Electric.

Autoreclose, Check Sync and CB Monitoring added to P544 & P546

Improvements to the Ethernet card startup and configuration.

Patch for

V2.12

Patch for

V2.14

Studio ftp server

Patch for

V2.14

Studio ftp server

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x/EN M/Ka4

P54x/EN M/KA4

P54x/EN M/KA4

P54x/EN VH/Nd5 Page (VH) 22-25

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

45

47

47

47

50

D

A

B

V/W/X K

A

K

K

K

K

Original date of issue

Description of changes

Correction to Negative sequence overcurrent settings when 5A input used.

S1 compat- ibility

Correction to P545/P541 compatibility when used in transformer compensation mode.

Correction to the way latched LED/Relays are cleared.

Corrections to menu text.

Improvements to the GPS code.

Bug Fixes

Improvements to the GPS code.

Improvements in the clock recover circuits used by the Differential Comms.

Bug Fixes

Patch for

V2.14

Studio ftp server

Release of P543, P544, P545 & P546 without distance protection based on

45D.

Patch for

V2.14

Studio ftp server

IEC-61850 phase 2 and 2.1 implemented.

Application for Inzone Transformers (2nd and 5th Harmonic

Blocking/restraint).

Differential Highset can be disabled when Inrush protection is enabled.

Restricted Earth Fault Protection (REF).

Modification to Char Mod timer functionality.

Separate measurements for each set of CT’s.

Interrupt Driven InterMiCOM in all models.

Read Only Mode

Prevented the Differential protection inhibiting in three terminal schemes when

GPS is enabled and loopback mode selected.

Patch for

V2.14

Studio ftp server

Fault locator measurements in ohms corrected when 5A CT used or displayed in primary.

Frequency measurement in DNP3 fault record corrected

June 2012 Release of P54x (P543/P54/P545/P546) based on 47/57U.

Patch for

V2.14

Studio ftp server

First release of CS103 for CB Monitor functions (CB1 only).

CB Fail Improvements.

May 2006 Release of P543, P544, P545 & P546 with distance protection.

Distance protection from P443.

DEF from P443.

Aided distance & DEF schemes from P443.

Patch for

V2.12

Technical document- ation

P54x/EN M/KA4

P54x/EN M/KA4

+ addendum

P54x/EN AD/KB4

P54x/EN M/KA4

+ addendum

P54x/EN AD/KB4

P54x/EN M/Ka4

P54x/EN M/I64

Page (VH) 22-26 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

50

51

Software version

Major Minor

Hard- ware suffix

51

51

51

A

C

D

E

F

K

K

K

K

K

Original date of issue

CTS

Description of changes

May 2006 Definitive time directional negative sequence overcurrent I2>.

GPS synchronization of current differential in all models.

P543 and P545 now facilitate in zone transformer-feeder applications.

All models support ABC and ACB phase rotation.

Standard and inverted CT polarity setting for each set of CTs in the relay.

User interface with tri colored LED and function keys.

InterMiCOM64.

Voltage protection.

Backwards compatibility mode

Patch for

V2.12

High break options.

Unmodulated IRIG-B options.

Reduction of distance minimum reach settings to 0.05 ohm.

Permissive trip reinforcement.

Poledead modifications for Hydro Quebec.

CS103/auto-reclose modifications.

Out of step tripping

Aug 2006 Release of P543, P544, P545 & P546 with distance protection based on 51C.

Prevents a possible reboot 15 minutes after browsing the front courier port but not making a setting change i.e. browsing using PAS&T.

Patch for

V2.12

V2.13 or

Later

Extended GOOSE Enrolment Capability.

Correction to ICD files, Enumeration (value) and Fixed data Mapping

S1 compat- ibility

Patch for

V2.12

Nov 2006 Release of P543, P544, P545 & P546 with distance protection based on 51D.

Patch for

V2.12

V2.13 or

Later

Prevent a reboot in 61850 builds when NIC link is inactive and avalanche of

DDB activity.

Correctly report a fatal error generated by the sampling call-back.

Correct the operation of the GOOSE messaging and a problem with the download of an IED Configuration file.

Correct the operation of the check sync.

Correct the operation of the overcurrent reset curves.

Removed check on the14th position of model number.

Fixed Telegrams for public inf 64-67.

SOTF can operate even when it is disabled

Patch for

V2.12

V2.13 or

Later

Technical document- ation

P54x/EN M/I64

P54x/EN M/J74

P54x_EN_MJ74

P54x_EN_MJ74

P54x_EN_MJ74

P54x/EN VH/Nd5 Page (VH) 22-27

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

51

51

52

G

H

A

K

K

K

Original date of issue

Description of changes

Prevent a fatal error from an incorrect DNP address in not using DNP evolutions platform.

Default setting for 450B 'I< Current Set' reduced to 50 mA.

French Translations for DDBs 1368-1371corrected.

Dependencies for cells 3242 & 3245 corrected.

Fun & INF values related to CS103 Command Blocking corrected.

Angle for negative sequence phase overcurrent setting corrected.

Corrected operation when using MiCOM S1 is used to activate Settings group by right clicking on the group.

Corrected the latching of Function Key DDB signals on relay power up.

Corrected Disturbance recorder scaling to prevent high current levels into 5A

CT causing the Disturbance Recorder to saturate.

Restring defaults appears not to change the 1/5A CT selection.

Corrected the performance of the IM64 Direct mode.

CB control via Direct access does not work with 2CB versions of P540D.

Autoreclose dead time/close cycle continues even if AR switched out of service.

Distance setting are not updated in simple setting mode in setting groups other than the active one.

Ch2 Statistics may not be displayed

P543, P544, P545 & P546 non 61850 builds with distance protection based on 51F was approved for release but withdrawn before release.

Corrections to enable/disable of Autoreclose

S1 compat- ibility

Patch for

V2.12

Patch for

V2.12

Corrected power swing detection when both distance and current differential enabled.

Corrections to enable/disable of Autoreclose

Release of P543, P544, P545 & P546 with distance protection.

Chinese interface.

Patch for

V2.14

Technical document- ation

P54x_EN_MJ74

P54x_EN_MJ74

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

Replacing the existing DNP3 with the DNP3 evolutions.

Addition of a current but no volts trip option to Switch on to Fault and Trip on

Reclose feature (SOTF/TOR).

Replacement of existing negative sequence overcurrent with multi stage (2

IDMT + 2 DT) negative sequence overcurrent.

Addition of IDG curve, commonly used in Sweden, to Earth Fault & Sensitive

Earth Fault (involves moving settings).

Reduction of all TMS step sizes to 0.005.

Addition of Channel propagation delay Statistics and Alarms.

Changes to CTS so both techniques can be selected together.

Regrouping of CTS settings.

Addition of four stages of under frequency protection and two stages of

Overfrequency protection.

Addition of df/dt protection.

Changes to Under and Overvoltage to enable each stage to be independently set.

Page (VH) 22-28 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

52

52

Software version

Major Minor

Hard- ware suffix

52

52

52

A

B

C

D

E

K

K

K

K

K

Original date of issue

Description of changes

Extensions to the checksync VT position setting.

Replacing fixed Trip on Close (TOC) Delay with a setting.

Improvements to slow power swing detection.

Changes to distance count strategy to restore the same operating time when phase differential protection is enabled.

Changes to Permissive Inter Trip (PIT) logic to enable the user to select either local or remote current to be used.

Includes local time zone settings for Date & Time

S1 compat- ibility

Addition of flexible settings for distance quadrilateral top line.

Reduced minimum setting for IN> I2pol Set.

Addition of propagation delay times to Fault Record.

Default setting for 450B 'I< Current Set' reduced to 50mA.

Enhancement to self checking of output relays.

Change tunnelled courier address to follow the 1st Rear Port’s KBUS or

CS103 address.

July 2007 Release of P543, P544, P545 & P546 with distance protection based on 52A.

Phase comparison protection P547 added to range.

Improvements to VTS.

Improvements to slow power swing detection.

Corrected power swing detecting when both distance and current differential enabled.

Corrections to enable/disable of Autoreclose.

Resolved a problem relating to CT Ratio’s not being restored when restoring default settings.

Resolved a problem with the Disturbance Recorder which saturates for High current levels into 5A CT.

Technical document- ation

P54x_EN_AD_J84

Tilt angle of ground quadrilateral Characteristic corrected.

Minor correction to fault record.

Corrections to over voltage stage 2 inhibit

Fixed a number of 61850/Goose problems.

Fixed a problem in P547 related o the transient starters.

Fixed the max prop alarm.

Corrected some DDB German text.

Fixed a problem with week infeed inhibit.

Fixed a SOTF problem when there is a short duration pre-fault.

Fixed a primary scaling issue relating to Zone 5 & 6

Fixed a number of 61850 problems.

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x/EN VH/Nd5 Page (VH) 22-29

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

52

52

52

53

F

G

H

A

K

K

K

K

Original date of issue

Description of changes

Improved co-processor error reporting.

Fix to Blocking scheme.

Fixed Inhibit CB Fail Protection in P544/6

Not released to production. Based on 52E.

Correction to autoreclose operation for switch on to fault condition.

Prevented CB Operating Time displaying 4.295Ms.

Bug fixes

Correction to the distance cross polarising when the memory expires

Corrected some menu translations.

Corrected Breaker Fail - WI Aided1 trips so they can be disabled via setting

"WI Prot Reset".

Timestamp in fault record adjusted for the local time setting.

Corrections to the Current Differential Inhibit when the GPS synchronisation is disabled.

Corrected Thermal State measurement via DNP3.

Correction to the way latched LED/Relays are cleared.

Correction to Negative sequence overcurrent settings when 5A input used.

Correction to P545/P541 compatibility when used in transformer compensation mode.

Improvements to the GPS code.

Prevented CTS generating events when CTS is disabled.

Prevent Z5 from setting slow swing when PSB is disabled.

Resolved problem in P543/P545 which prevent correct reporting of fault record over 61850.

Fixed problem which prevented residual overvoltage from initiating CB Fail.

Various improvements to DNP, CS103 & IEC61850 protocols.

Bug fixes

Patch for

V2.14

First release of

Studio

Extended I/O – status inputs increased from 24 to 32.

Positional information added to PSL.

Bug fixes

S1 compat- ibility

Patch for

V2.14

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J84

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

Page (VH) 22-30 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

53

54

54

54

B

A

B

C

K

K

K

K

Hard- ware suffix

Original date of issue

Description of changes

Tilt angle of ground quadrilateral Characteristic corrected

Minor correction to fault record

Corrections to over voltage stage 2 inhibit

Mar 2008 Release of P543, P544, P545 & P546 with distance protection based on 52D.

S1 compat- ibility

Patch for

V2.14

First release of

Studio

Patch for

V2.14

First release of

Studio

Positional information added to PSL.

DNP 3.0 Over Ethernet protocol added.

Extended I/O – status inputs increased from 24 to 32.

Compensated overvoltage protection added.

IEC-103 Generic Services Measurements added.

Set/Reset Latch Logic Gates added to PSL.

Improved Sensitivity Range for DEF.

Fault record to include current differential currents recorded at the time of the current differential trip in addition to the existing data from 1 cycle later.

Fault record increased max number of fault records to 15.

GPS Alarm modifications.

Scheme Delta from P443 included.

DNP enhancements for SSE.

Bug fixes

June 2008 Release of P543, P544, P545 & P546 with distance protection based on 54A.

Fixed a number of 61850 problems.

Improved co-processor error reporting.

Fix to Blocking scheme.

Fix for DEF reverse operation.

Fixed Inhibit CB Fail Protection in P544/6.

Corrected some French and German text.

Patch for

V2.14

First release of

Studio

Prevented CB Operating Time displaying 4.295Ms.

Fixed a problem which prevented extraction of dnp3 setting files from dnp3 over Ethernet variants.

Bug fixes

June 2008 Release of P543 & P545 with distance protection based on 54B.

Patch for

V2.14

First release of

Studio

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x/EN VH/Nd5 Page (VH) 22-31

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

54

54

54

54

D

E

F

G

K

K

K

K

Original date of issue

Description of changes

Correction to autoreclose operation for switch on to fault condition

Jan 2009 Release of P543, P544, P545 & P546 with distance protection based on 54C.

Correction to the distance cross polarizing when the memory expires.

Corrections to the Current Differential Inhibit when the GPS synchronization is disabled.

S1 compat- ibility

Patch for

V2.14

First release of

Studio

Corrected Thermal State measurement via DNP3.

Timestamp in fault record adjusted for the local time setting.

Corrected Breaker Fail - WI Aided1 trips so they can be disabled via setting

"WI Prot Reset"

20/03/2009 Release of P543, P544, P545 & P546 with distance protection based on 54D.

Patch for

V2.14

First release of

Studio

Prevents the loss of IEC61850 messages and fixed the handling of the ACD flag during GI.

Improved the Ethernet card boot code

21/09/2009 Release of P543, P544, P545 & P546 with distance protection based on 54E.

Corrected some menu translations.

Correction to the way latched LED/Relays are cleared.

Correction to Negative sequence overcurrent settings when 5A input used.

Correction to P545/P541 compatibility when used in transformer compensation mode.

Patch for

V2.14

First release of

Studio

Improvements to the GPS code.

Prevented CTS generating events when CTS is disabled.

Prevent Z5 from setting slow swing when PSB is disabled.

Resolved problem in P543/P545 which prevent correct reporting of fault record over 61850.

Fixed problem which prevented residual overvoltage from initiating CB Fail.

Various improvements to DNP, CS103 & IEC61850 protocols.

Bug fixes

19/10/2010 Release of P543, P544, P545 & P546 with distance protection based on 54F.

Patch for

V2.14

First release of

Studio

Time stamping and status of IEC61850 Data attribute sofPSOF1.ST.general.Op improved

Fixed a 61850 issue which blocked clients when one was disconnected

Enhanced the OST feature to make it more stable when currents are low

Improved the distance performance for cross country faults

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

Page (VH) 22-32 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

54

54

54

54

55

55

H

U

V

W

B

C

K

K

K

K

K

K

Original date of issue

Description of changes

Improvements to Fault record display over courier and dnp3

Bug fixes

S1 compat- ibility

11/01/2011 Release of P543, P544, P545 & P546 with distance protection based on 54G.

Patch for

V2.14

First release of

Studio

Rebranded as Alstom. Minor change to software number plus changes to

61850 (New ICD files required)

18/04/2011 Release of P543, P544, P545 & P546 with distance protection based on 54G.

Patch for

V2.14

First release of

Studio

Rebranded as Schneider Electric. Minor change to software number plus changes to 61850 (New ICD files required).

Additional CB Monitoring data provided over CS103

OST sensitivity now 60mA (was previously 180mA).

DEF Aided and Delta Aided setting 3 pole / 1 and 3 pole visibility corrected.

Bug Fixes

15/12/2011 Release of P543, P544, P545 & P546 with distance protection based on 54U.

Improved IEC61850 Status reporting of DDB signal changes.

Protection communications Invalid Message Format Alarm Implementation corrected.

Patch for

V2.14

First release of

Studio

The default PSL of P546 with 12 high break outputs could not upload from relay correctly. The options with 20 relays outputs associate the default PSL with 32 relays outputs.

Bug Fixes

Patch for

V2.14

First release of

Studio

March

2009

Dual CB Variants (P446/P544/P546/P841B) - Aided Scheme Echo on dual

CB variants.

Software re-branded from Areva to Schneider Electric.

Release of P543, P544, P545 & P546 with distance protection based on 54E.

Patch for

V2.14

Studio ftp server

Autoreclose, Check Sync and CB Monitoring added to P544 & P546

15/05/2009 Release of P543, P544, P545 & P546 with distance protection based on 55B.

Patch for

V2.14

Studio ftp server

Improvements to the Ethernet card startup and configuration.

Technical document- ation

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_AD_K94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_AD_K94

P54x_EN_MJ74

+ addendum

P54x_EN_AD_J94

P54x_EN_AD_K94

P54x/EN M/KA4

P54x/EN M/KA4

P54x/EN VH/Nd5 Page (VH) 22-33

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

55

55

57

57

57

D

E

A

B

C

K

K

K

K

K

Original date of issue

Description of changes

Correction to Negative sequence overcurrent settings when 5A input used.

S1 compat- ibility

Correction to P545/P541 compatibility when used in transformer compensation mode.

Correction to the way latched LED/Relays are cleared.

Corrections to menu text.

Improvements to the GPS code.

Bug Fixes

28/10/2009 Release of P543, P544, P545 & P546 with distance protection based on 55C.

Improvements to the GPS code.

Correction to slow power swing configuration.

Improvements in the clock recover circuits used by the Differential Comms.

Patch for

V2.14

Studio ftp server

Prevent Z5 from setting slow swing when PSB is disabled.

Bug Fixes

28/10/2009 Release of P543, P544, P545 & P546 with distance protection based on 55D

Patch for

V2.14

Studio ftp server

Rebranded as Alstom. Minor change to software number plus changes to

61850 (New ICD files required)

Patch for

V2.14

Studio ftp server

IEC-61850 phase 2 and 2.1 implemented.

Application for Inzone Transformers (2nd and 5th Harmonic

Blocking/restraint).

Differential Highset can be disabled when Inrush protection is enabled.

Restricted Earth Fault Protection (REF).

Modification to Char Mod timer functionality.

Separate measurements for each set of CT’s.

Interrupt Driven InterMiCOM in all models.

Read Only Mode

10/02/2010 Release of P543, P544, P545 & P546 with distance protection based on 57A.

Prevented the Differential protection inhibiting in three terminal schemes when

GPS is enabled and loopback mode selected.

Patch for

V2.14

Studio ftp server

Fault locator measurements in ohms corrected when 5A CT used or displayed in primary.

Frequency measurement in DNP3 fault record corrected

05/05/2010 Release of P543 61850 with distance protection based on 57B

Patch for

V2.14

Studio ftp server

Technical document- ation

P54x/EN M/KA4

P54x/EN M/KA4

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

Page (VH) 22-34 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

57

57

57

57

D

E

U

V

K

K

K

K

Original date of issue

Description of changes

Enhancement to GOOSE performance

Fixes to 61850.

S1 compat- ibility

Fixed Protection comms address problem in three ended scheme selected

Fixed dnp3 control of CB2

Fixed a small issue with the detection of slow swings

15/10/2010 Release of P543, P544, P545 & P546 with distance protection based on 57B

Patch for

V2.14

Studio ftp server

Enhancement to GOOSE performance

Fixes to 61850.

Fixed Protection comms address problem in three ended scheme selected

Fixed dnp3 control of CB2

Fixed a small issue with the detection of slow swings

Incorrect mapping of XCBR(n).CBOpCap.stVal data attribute corrected

Time stamping and status of IEC61850 Data attribute sofPSOF1.ST.general.Op improved

Enhanced the OST feature to make it more stable when currents are low

Improved the distance performance for cross country faults

Improvements to Fault record display over courier and dnp3

11/01/2011 Release of P543, P544, P545 & P546 with distance protection based on 57D

Patch for

V2.14

Studio ftp server

Rebranded as Alstom. Minor change to software number plus changes to

61850 (New ICD files required)

23/02/2011 Release of P543, P544, P545 & P546 with distance protection based on 57D

Patch for

V2.14

Studio ftp server

Rebranded as Schneider Electric.

Minor change to software number.

Changes to 61850 (New ICD files required). Changes to improve IEC61850 reporting on rapidly toggling status. Corrections to IEC61850 datamodel.

Improvements to processing of GOOSE messages when using managed

Ethernet switch parameterised for VLAN.

Improvements to PSL Operation when non-latched and latched LEDs are used together.

Improvements to copro configuration (settings) failure detection.

Improvements to Zone 1 Extension Reset.

P543 Software Version 47 only - Corrected PSL Reference Cell in the PSL

DATA menu column.

Bug Fixes.

17/06/2011 Release of P543, P544, P545 & P546 with distance protection based on 57U

Patch for

V2.14

Studio ftp server

Technical document- ation

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

P54x/EN M/KA4 + addendum

P54x/EN AD/KB4

P54x/EN M/KA4 + addendum

P54x/EN AD/LC4

P54x/EN VH/Nd5 Page (VH) 22-35

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

57

57

57

58

W

X

Y

C

K

K

K

K

Original date of issue

Description of changes

CB Fail reset time on fault clearance improvement.

CB Status monitoring improvement

27/12/2011 Release of P543, P544, P545 & P546 with distance protection based on 57V

Status report over IEC61850 not in line with DDB signals

OST sensitivity now 60mA (was previously 180mA).

Protection communications Invalid Message Format Alarm Implementation corrected.

Directional negative sequence overcurrent will only reset from the tripped state by loss of current and not incorrect direction.

Improved IEC61850 Status reporting of DDB signal changes.

The default PSL of P546 with 12 high break outputs could not upload from relay correctly. The options with 20 relays outputs associate the default PSL with 32 relays outputs.

P544/P546 57V IEC61850 + CS103 variant Download: Relay does not occasionally re-boot with error code 0X351f03f5.

BugFixes

15/05/2012 Release of P543, P544, P545 & P546 with distance protection based on 57W

Improved IEC61850 Goose Performance

Distance zone 1 may mal-trip when simulated three-phase VT fail condition is applied.

Improvements to IEC61850.

Bug Fixes.

Patch for

V2.14

Studio ftp server

Patch for

V2.14

Studio ftp server

S1 compat- ibility

Patch for

V2.14

Studio ftp server

Improved IEC61850 Goose Performance - During IEC61850 testing on P64x

04 software, buffered events cannot be sent to the client before GI reports

(MMSLITE_V5.1001i replaces MMSLITE_V5.1001D)

The high traffic of unicast (eventually multicast with the same MAC address as the goose subscirbtion) frames leads to blocking of the GOOSE subscription by the Px4 relays. GOOSE publishing and MMS services remains working correctly.

P54x Power Factor measurement can be displayed as greater than 1.000

Bug fixes

Patch for

V2.14

Studio ftp server

Replace the conventional analogue input module with the 9-2 LE NCIT module

Support P545 CIT/NCIT 2-ended schema with the introduction of current adjust algorithm

Technical document- ation

P54x/EN M/KA4 + addendum

P54x/EN AD/LC4

P54x/EN M/KA4 + addendum

P54x/EN AD/LC4

P54x/EN M/KA4 + addendum

P54x/EN AD/LC4

Page (VH) 22-36 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

Original date of issue

58

70

70

A0

F

A

U

A

K

M

M

K

Description of changes

S1 compat- ibility

Patch for

V2.14

Studio ftp server

Technical document- ation

Include v57 Functionality

Replace the conventional analogue input module with the 9-2 LE NCIT module

Support P545 CIT/NCIT 2-ended schema with the introduction of current adjust algorithm

Cyber Security included.

Rebranded as Schneider Electric. Minor change to software number plus changes to 61850 (New ICD files required).

Improved IEC61850 Goose Performance

Changes to improve IEC61850 reporting on rapidly toggling status.

Corrections to IEC61850 datamodel.

Status report over IEC61850 not in line with DDB signals

Improvements to IEC61850.

Protection communications Invalid Message Format Alarm Implementation corrected.

OST sensitivity now 60mA (was previously 180mA).

Improvements to PSL Operation when non-latched and latched LEDs are used together.

Improvements to copro configuration (settings) failure detection.

Improvements in PSL data models.

Improvements to processing of GOOSE messages when using managed

Ethernet switch parameterised for VLAN.

Minor bug fixes to distance protection.

Bug fixes

Change to Schneider-Electric Major release (alpha) software number plus changes to 61850 (New ICD files required). Changes to improve IEC61850 reporting on rapidly toggling status. Corrections to IEC61850 datamodel.

CB Fail reset time on fault clearance improvement.

Enhanced Disturbance Recorder - 20 Analog / 128 Digital Channels.

Additional Differential, Max Bias and 2nd Harmonic current data.

CT Ratio Enhancements (P544/P546 allow use of different CT1 and CT2

Ratios).

Additional CB Monitoring data provided over CS103

Protection communications Invalid Message Format Alarm Implementation corrected.

Studio ftp server

Studio ftp server

Studio ftp server

P54x/EN M/J74 + addendum

P54x/EN AD/J84

P54x/EN M/J74 + addendum

P54x/EN AD/J84

P54x/EN M/KA4 + addendum

P54x/EN AD/KB5

P54x/EN VH/Nd5 Page (VH) 22-37

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

A0 B K

Original date of issue

Description of changes

Language Text for "IED CONFIGURATOR" menu column header uses selected language (previously only English).

Bug Fixes

DR code optimize to release additional memory for DR pre-trigger time

Additional protocols release (DNP3, DNP3OE, IEC61850+IEC103) by compare with A0/B0A

Improved IEC61850 Goose Performance

Changes to improve IEC61850 reporting on rapidly toggling status.

Corrections to IEC61850 datamodel.

Improvements to IEC61850.

Status report over IEC61850 not in line with DDB signals

Directional negative sequence overcurrent will only reset from the tripped state by loss of current and not incorrect direction.

Schneider use alpha character for software release version. Major version is not compatible with letters of cs103 protocol, both IED code and tools.

P544/P546 57V IEC61850 + CS103 variant Download: Relay does not occasionally re-boot with error code 0X351f03f5.

Improvements in PSL data models.

Bug Fixes

S1 compat- ibility

Technical document- ation

Studio ftp server

P54x/EN M/KA4 + addendum

P54x/EN AD/J84

P54x/EN AD/KB5

P54x/EN AD/LC4

A0 D K

Correction in DNP3 OE TCP slave regarding event management.

IEC61850 minor bug corrections

The TrgOps GI is set by default after start-up

IED Subscribe GOOSE with inconformity AppID should be discarded.

IEC61850 corrections related to OrdRunGGIO LN.

A number 3600001 can be successfully set to BufTm.

Better GOOSE performance in case of high traffic of unicast (eventually multicast with the same MAC address as the goose subscirbtion) frames.

IEC61850 minor bug corrections in control model. Control the CB (via

IEC61850) to its opposite position, the position of the CB changed succeed, but the client will receive error report AddCause “Invalid –position”.

Improvements in IEC61850 data included in reports managing.

IEC61850 minor bug corrections in GOOSE model.

Minor DNP3 corrections regarding units of analogue values.

Corrections in DR checksum calculation.

IEC61850 minor corrections related to BCR (Binary Counter Reading).

Corrections in logical note of OptGGIO1.ST.

Corrections in IEC61850 related to deadbands.

Minor corrections related to units of analogue values shown in DR.

Studio ftp server

P54x/EN M/KA4 + addendum

P54x/EN AD/KB5

P54x/EN AD/LC4

Page (VH) 22-38 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

B0

B0

Software version

Major Minor

Hard- ware suffix

A K

Original date of issue

Description of changes

"GosGGIO1$DC" is readable when configure many datasets in IED dataset definitions.

Corrections in IEC61850 related to LN XCBR.POS.stVal.

Improvements in POR combined with Weak Infeed.

Bug fix related to C Diff failure alarm.

Bug fix related to Weak infeed detection function reduces ground fault current sensitivity/

IEC61850 interlocking control correction.

Corrections related to the manual close delay.

IEC61850 bug fixes related to intermediate state.

The maximum range of power factor in phase C is 660

P54x Power Factor greater than 1.000.

All relevant Changes in version B0C

Bug Fixes

S1 compat- ibility

Studio ftp server

Change to Schneider-Electric Major release (alpha) software number plus changes to 61850 (New ICD files required). Changes to improve IEC61850 reporting on rapidly toggling status. Corrections to IEC61850 datamodel.

CB Fail reset time on fault clearance improvement.

Enhanced Disturbance Recorder - 20 Analog / 128 Digital Channels.

Additional Differential, Max Bias and 2nd Harmonic current data.

CT Ratio Enhancements (P544/P546 allow use of different CT1 and CT2

Ratios).

Additional CB Monitoring data provided over CS103

OST sensitivity now 60mA (was previously 180mA).

Protection communications Invalid Message Format Alarm Implementation corrected.

Language Text for "IED CONFIGURATOR" menu column header uses selected language (previously only English).

Bug Fixes

Technical document- ation

B K

DR code optimize to release additional memory for DR pre-trigger time

Additional protocols release (DNP3, DNP3OE, IEC61850+IEC103) by compare with A0/B0A

Improved IEC61850 Goose Performance

Changes to improve IEC61850 reporting on rapidly toggling status.

Corrections to IEC61850 datamodel.

Improvements to IEC61850.

Status report over IEC61850 not in line with DDB signals

Directional negative sequence overcurrent will only reset from the tripped state by loss of current and not incorrect direction.

Minor bug fixes to distance protection.

P544/P546 57V IEC61850 + CS103 variant Download: Relay does not occasionally re-boot with error code 0X351f03f5.

P54x/EN VH/Nd5 Page (VH) 22-39

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

B0

B0

C

D

K

K

Original date of issue

Description of changes

Improvements in PSL data models.

Bug Fixes

Improved IEC61850 Goose Performance.

Improvements regarding the MMS communication of IEC61850.

Corrections in IEC61850 related to LN XCBR.POS.stVal

Dual CB Variants (P446/P544/P546/P841B) - Aided Scheme Echo on dual

CB variants.

General IEC61850 Improvements

IEC61850 Data Model Changes

Bug Fixes

Correction in DNP3 OE TCP slave regarding event management

IEC61850 minor bug corrections

The TrgOps GI is set by default after start-up

IED Subscribe GOOSE with inconformity AppID should be discarded.

IEC61850 corrections related to OrdRunGGIO LN.

A number 3600001 can be successfully set to BufTm.

Better GOOSE performance in case of high traffic of unicast (eventually multicast with the same MAC address as the goose subscription) frames.

IEC61850 minor bug corrections in control model.

Improvements in IEC61850 data included in reports managing.

IEC61850 minor bug corrections in GOOSE model.

Minor DNP3 corrections regarding units of analogue values.

Corrections in DR checksum calculation.

IEC61850 minor corrections related to BCR (Binary Counter Reading).

Corrections in logical note of OptGGIO1.ST.

Corrections in IEC61850 related to deadbands.

Minor corrections related to units of analogue values shown in DR.

"GosGGIO1$DC" is readable when configure many datasets in IED dataset definitions.

Corrections in IEC61850 related to LN XCBR.POS.stVal.

Improvements in POR combined with Weak Infeed.

Bug fix related to C Diff failure alarm.

Bug fix related to Weak infeed detection function reduces ground fault current sensitivity.

IEC61850 interlocking control correction.

Corrections related to the manual close delay.

IEC61850 bug fixes related to intermediate state.

The maximum range of power factor in phase C is 660

P54x Power Factor greater than 1.000.

All Changes in version B0C

Studio ftp server

S1 compat- ibility

Studio ftp server

Technical document- ation

Page (VH) 22-40 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

C0

C0

Software version

Major Minor

Hard- ware suffix

C0 A M

D

B M

M

Original date of issue

Bug Fixes

Description of changes

Downloaded the P546 version 57V IEC61850+CS103 variant to a relay, occasionally the relay re-boot with error code 0x351f03f5.

"GosGGIO1$DC" is readable when configure many datasets in IED dataset definitions

Corrections in IEC61850 related to LN XCBR.POS.stVal.

IEC61850 correction related to deadband.

Correction in DNP3 OE TCP slave regarding event management

S1 compat- ibility

Studio ftp server

Technical document- ation

P54x/EN M/Mc5

Change to Schneider-Electric Major release (alpha) software number plus changes to 61850 (New ICD files required). Changes to improve IEC61850 reporting on rapidly toggling status. Corrections to IEC61850 datamodel.

Improved IEC61850 Goose Performance

Status report over IEC61850 not in line with DDB signals

CB Fail reset time on fault clearance improvement.

Enhanced Disturbance Recorder - 20 Analog / 128 Digital Channels.

Additional Differential, Max Bias and 2nd Harmonic current data.

CT Ratio Enhancements (P544/P546 allow use of different CT1 and CT2

Ratios).

Additional CB Monitoring data provided over CS103

Protection communications Invalid Message Format Alarm Implementation corrected.

Language Text for "IED CONFIGURATOR" menu column header uses selected language (previously only English).

Improvements to processing of GOOSE messages when using managed

Ethernet switch parameterised for VLAN.

Some new Cyber Security Cells (BF15, 00E1) needs to be accessible even if read only mode is enabled.

Improvements in PSL data models.

Improvements to PSL Operation when non-latched and latched LEDs are used together.

Bug Fixes

Studio ftp server

Ethernet Parallel Redundancy Protocol (PRP) Functionality

TOMAS Request 255 - Delta-V, Delta-f and Delta-phi Check Synch

Measurements

IEC61850 bug fix related to buffered reports.

Minor IEC61850 bug fix related to "Quality" DO.

Minor bug correction related to the Logical Node System/ploGGIO1.

Corrections in default PSL Reference text string is not correct.

Bug fix related to IM64 Communications Max propagation delay.

Bug fixes related to the MiCOM S1 Language text files (.lng).

Bug Fixes

Studio ftp server

P54x/EN M/Mc5

P54x/EN M/Mc5

P54x/EN VH/Nd5 Page (VH) 22-41

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

C0

D0

E

A

M

M

Original date of issue

Description of changes

The TrgOps GI is set by default after start-up

IED Subscribe GOOSE with inconformity AppID should be discarded.

IEC61850 corrections related to OrdRunGGIO LN.

A number 3600001 can be successfully set to BufTm.

IEC61850 minor bug corrections in control model.

All question mark “?” is messy code in HMI, when language is Chinese.

Edit password level 2, 3, when input blank password, Chinese HMI display wrong langtxt.

IEC61850 minor bug corrections in GOOSE model.

Minor DNP3 corrections regarding units of analogue values.

Corrections in DR checksum calculation.

IEC61850 minor corrections related to BCR (Binary Counter Reading).

Improvements in IEC61850 data included in reports managing.

Improvements in POR combined with Weak Infeed.

Bug fix related to C Diff failure alarm.

Bug fix related to IM64 Communications Max propagation delay.

Bug fix related to Weak infeed detection function reduces ground fault current sensitivity/

IEC61850 interlocking control correction.

IEC61850 bug fixes related to intermediate state.

The maximum range of power factor in phase C is 660

All relevant changes in version D0C

Bug Fixes

29/02/2016 Restricted release of P545 without distance protection based on C0D

Added LN RFRE in Logic device Records.

Added DO SumSwARs in LN XCBR.

Bug fix related to DR list.

Bug fix related to The 'orCat' and 'orIdent' value of the PloGGIO1 in the urcb,brcb and GOOSE.

Bug fix related to trigger time is not extracted correctly via CS103 in the configuration file.

Minor bug correction related to the Logical Node System/ploGGIO1.

IED with 128 digital features. DR files extracted by IEC61850 are not the same with which extracted by MiCOM S1 studio.

Bug fix related to stateNumber increased even there is no status change after

IED rebooting/ MCL downloading.

Deadband read via DNP3 corrected to uint32.

IEC 61850 can read the current SGCB.actVal when selecting setting group via Opto.

Several IEC61850 minor bug fixes related to GOOSE and control model.

Bug fix related to MiCOM S1 Language text files (.lng)

Bug Fixes

Studio ftp server

Studio ftp server

S1 compat- ibility

Technical document- ation

P54x/EN M/Mc5

P54x/EN M/Mc5

Page (VH) 22-42 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

C1 B M

Hard- ware suffix

Original date of issue

Description of changes

Change to Schneider-Electric Major release (alpha) software number plus changes to 61850 (New ICD files required). Changes to improve IEC61850 reporting on rapidly toggling status. Corrections to IEC61850 datamodel.

Improved IEC61850 Goose Performance

Status report over IEC61850 not in line with DDB signals

CB Fail reset time on fault clearance improvement.

Enhanced Disturbance Recorder - 20 Analog / 128 Digital Channels.

Additional Differential, Max Bias and 2nd Harmonic current data.

CT Ratio Enhancements (P544/P546 allow use of different CT1 and CT2

Ratios).

Additional CB Monitoring data provided over CS103

OST sensitivity now 60mA (was previously 180mA).

Protection communications Invalid Message Format Alarm Implementation corrected.

Language Text for "IED CONFIGURATOR" menu column header uses selected language (previously only English).

Improvements to processing of GOOSE messages when using managed

Ethernet switch parameterised for VLAN.

Some new Cyber Security Cells (BF15, 00E1) needs to be accessible even if read only mode is enabled.

Improvements in PSL data models.

Improvements to PSL Operation when non-latched and latched LEDs are used together.

Bug Fixes

Mar 2016

An additional four DDB Group Nodes can be mapped to individual or multiple

DDBs in the PSL. These can be set to trigger the DR via the Disturbance

Record menu.

Disturbance Record Digital Input Label Operation. The digital input labels are available in the “DR CHAN LABELS” folder. The labels can be modified via the MiCOM P54X User Interface or MiCOM S1 Studio.

Reduced CT Requirements.

The CT saturation detection now uses a modified Phase Comparison algorithm to supervise the Current Differential operation. This now provides better immunity to CT saturation.

External DDB Reset for the CB Fail Function.

New DDB signals (SIngle CB: 1715 to 1719 and DualCB: 1715 to 1723) have been added to reset the individual CB phase failure logic triggers, a separate

DDB for all (i.e. three) phase triggers and a separate DDB for sensitive earth fault conditions. An additional four signals have been added for second circuit breaker for dual CB relay variants.

User Alarm Labels:

The SR User Alarm 1 to 4 and MR User Alarm 5 to 8 can now be renamed to suit your requirements. This is done using MiCOM S1 Studio.

S1 compat- ibility

Technical document- ation

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN VH/Nd5 Page (VH) 22-43

(VH) 22 Version History Software Version

D0

D0

D0 C

B

Software version

Major Minor

Hard- ware suffix

Original date of issue

Description of changes

Line Differential (Function 87L) Intertrip:

When a trip is issued by the differential element, in addition to tripping the local breaker, the relay will send a differential intertrip signal to the remote terminals. This will ensure tripping of all ends of the protected line, even for marginal fault conditions. The Line Differential communication channel can now be set using the Intertrip CH1/CH2 settings in the Group X Phase Diff menu.

Control Input Operation. In the P54x relay there are now 32 standard Control

Inputs and 16 additional Settable Control Inputs.

Line Differential (87L) conditioned to Overcurrent (50) release. In the P54x, it is sometimes required that there is a sufficient level of line current before allowing the differential protection to trip the circuit breakers. This can now be implemented using the OC Rel Status and I>Release settings in the

Phase Diff menu; and DDB Nos 1816, 1817 and 1818.

Overcurrent (50) backup to Line Differential (87L) in 13A for P54x. This has been modified for the CTS Block with new setting options for enabling different combinations of the VTS, CTS, Channel Failure. This uses a combination of DDB Nos 313, 316, 319, 332, 455, 1145 and 1146.

S1 compat- ibility

Technical document- ation

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

Auto-Reclose (AR) Skip Shot 1. DDb 1384 (AR Skip Shot 1) can now be mapped from opto to comms input. This means that the first AR cycle is skipped (missed), and so starts Dead Time 2 at the first reclose attempt.

Auto-Reclose (AR) Enable / Disable by using a DDB Setting. An output signal which is available in the PSL can now be mapped to an opto status input to enable the AT to continue as long as certain conditions are met. This new feature requires the use of DDB No 1384 (AR Enable); in combination with other settings.

Number of PSL Timers has increased from 16 to 32.

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

D

M

M

M

Ethernet Parallel Redundancy Protocol (PRP) Functionality

TOMAS Request 255 - Delta-V, Delta-f and Delta-phi Check Synch

Measurements

Minor IEC61850 bug fix related to "Quality" DO.

Minor bug correction related to the Logical Node System/ploGGIO1.

Corrections in default PSL Reference text string is not correct.

Bug fix related to IM64 Communications Max propagation delay.

Bug fixes related to the MiCOM S1 Language text files (.lng).

Bug Fixes

Better GOOSE performance in case of high traffic of unicast (eventually multicast with the same MAC address as the goose subscirbtion) frames.

P54x Power Factor measurement can be displayed as greater than 1.000

Dual CB Variants (P446/P544/P546/P841B) - Aided Scheme Echo on dual

CB variants.

Bug Fixes

Studio ftp server

Studio ftp server

P54x/EN M/Mc5

P54x/EN M/Mc5

P54x/EN M/Mc5

Page (VH) 22-44 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

D0

Software version

Major Minor

Hard- ware suffix

E M

Original date of issue

Description of changes

Downloaded the P546 version 57V IEC61850+CS103 variant to a relay, occasionally the relay re-boot with error code 0x351f03f5.

"GosGGIO1$DC" is readable when configure many datasets in IED dataset definitions

Corrections in IEC61850 related to LN XCBR.POS.stVal

IEC61850 correction related to deadband.

Correction in DNP3 OE TCP slave regarding event management

The TrgOps GI is set by default after start-up

IED Subscribe GOOSE with inconformity AppID should be discard.

IEC61850 corrections related to OrdRunGGIO LN.

A number 3600001 can be successfully set to BufTm.

IEC61850 minor bug corrections in control model.

All question mark “?” is messy code in HMI, when language is Chinese.

Edit password level 2, 3, when input blank password, Chinese HMI display wrong langtxt.

IEC61850 minor bug corrections in GOOSE model.

Minor DNP3 corrections regarding units of analogue values.

Corrections in DR checksum calculation.

IEC61850 minor corrections related to BCR (Binary Counter Reading).

Improvements in IEC61850 data included in reports managing.

Improvements in POR combined with Weak Infeed.

Bug fix related to C Diff failure alarm.

Bug fix related to IM64 Communications Max propagation delay.

Bug fix related to Weak infeed detection function reduces ground fault current sensitivity/

IEC61850 interlocking control correction.

The solution of CTCSE10202 will make four mandatory cases of IEC61850 conformance test fail, because of missing intermediate state.

The maximum range of power factor in phase C is 660.

All Changes in version D0C.

Bug Fixes

29/02/2016 Restricted release of P545 with distance protection based on D0D

Added LN RFRE in Logic device Records.

Added DO SumSwARs in LN XCBR.

P143 reboot was witnessed on commission test.

Bug fix related to DR list.

Bug fix related to The 'orCat' and 'orIdent' value of the PloGGIO1 in the urcb,brcb and GOOSE.

Bug fix related to trigger time is not extracted correctly via CS103 in the configuration file.

Minor bug correction related to the Logical Node System/ploGGIO1.

IED with 128 digital features. DR files extracted by IEC61850 are not the same with which extracted by MiCOM S1 studio.

S1 compat- ibility

Studio ftp server

Technical document- ation

P54x/EN M/Mc5

P54x/EN VH/Nd5 Page (VH) 22-45

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

D1 A M

Original date of issue

Description of changes

Bug fix related to stateNumber increased even there is no status change after

IED rebooting/ MCL downloading

Deadband read via DNP3 corrected to uint32."

IEC 61850 can read the current SGCB.actVal when selecting setting group via Opto

Several IEC61850 minor bug fixes related to GOOSE and control model.

Bug fix related to MiCOM S1 Language text files (.lng)

Bug Fixes

S1 compat- ibility

Studio ftp server

User Settable Labels for Virtual I/O

Lower CT Requirements for Line Diff (87L)

Line Differential (Function 87L) Intertrip feature selected by user

Setting File (Control) Inputs

DR- Force Disturbance Record

New Settings and DDB for check synchronism (25)

External DDB Reset for CB Fail Function

Line Differential (Function 87L) conditioned to OC (Function 50) release.

Overcurrent (50) enabled on additional conditions as backup to Line

Differential (87L).

Tripping Mode Selection for all Distance Zones (21)

DR-Customised Labels for digital channels

SEF Enhancement of setting range (stage 3 and 4 max current is 2.0A) –

Requested for P841, but added across P540D range (now consistent with

P14x).

IEC-103 (VDEW) Protocol New Signals (Protection Enable)

Increase the number of timers in the PSL (from 16 to 32)

IRIG-B Status in DDB & SCADA (VDEW)

Autoreclose Skip Shot 1 Functionality (DDB)

Slow operation of Reverse DEF element can lead to weak infeed echo for external faults

GPS / Protection communications drop-out improvements (when operating with some Multiplexer / radio links)

Better GOOSE performance in case of high traffic of unicast (eventually multicast with the same MAC address as the goose subscription) frames

Improved IEC61850 Goose Performance

Bug fixed related to MMS communication of IEC61850 of device may get lost after perform control operations (Control\XCBR1\Pos) for several times.

Bug fix related to XCBR1.POS.stVal reports unexpected status change during

CB status change

Dual CB Variants (P446/P544/P546/P841B) - Aided Scheme Echo on dual

CB variants.

General IEC61850 Improvements

IEC61850 Data Model Changes

P54x Power Factor measurement can be displayed as greater than 1.000

Bug Fixes

Technical document- ation

P54x/EN M/Mc5

Page (VH) 22-46 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

D1

Software version

Major Minor

D1

B

C M

M

Hard- ware suffix

Original date of issue

Description of changes

S1 compat- ibility

An additional four DDB Group Nodes can be mapped to individual or multiple

DDBs in the PSL. These can be set to trigger the DR via the Disturbance

Record menu.

Studio ftp server

Check Synch Adaptive mode should close as close to 0 Degrees as possible

Missing IEC61850 reports for short duration trips

Circuit Breaker Control (IEC61850), error report on IEC61850 after changing

CB position

Incorrect Mapping of I Diff >> Start B (DDB 1439) and I Diff >> Start C(DDB

1440) to started Phase "B" (DDB 957) and Started Phase "C" (DDB 958) in

Default P545 PSLs

Bug Fixes

Bug fix related to C Diff failure alarm.

Studio ftp server

Disturbance Record Digital Input Label Operation. The digital input labels are available in the “DR CHAN LABELS” folder. The labels can be modified via the MiCOM P54X User Interface or MiCOM S1 Studio.

Reduced CT Requirements.

The CT saturation detection now uses a modified Phase Comparison algorithm to supervise the Current Differential operation. This now provides better immunity to CT saturation.

Technical document- ation

P54x/EN M/Nd5

P54x/EN M/Mc5

External DDB Reset for the CB Fail Function.

New DDB signals (SIngle CB: 1715 to 1719 and DualCB: 1715 to 1723) have been added to reset the individual CB phase failure logic triggers, a separate

DDB for all (i.e. three) phase triggers and a separate DDB for sensitive earth fault conditions. An additional four signals have been added for second circuit breaker for dual CB relay variants.

User Alarm Labels:

The SR User Alarm 1 to 4 and MR User Alarm 5 to 8 can now be renamed to suit your requirements. This is done using MiCOM S1 Studio.

Line Differential (Function 87L) Intertrip:

When a trip is issued by the differential element, in addition to tripping the local breaker, the relay will send a differential intertrip signal to the remote terminals. This will ensure tripping of all ends of the protected line, even for marginal fault conditions. The Line Differential communication channel can now be set using the Intertrip CH1/CH2 settings in the Group X Phase Diff menu.

Control Input Operation. In the P54x relay there are now 32 standard Control

Inputs and 16 additional Settable Control Inputs.

Line Differential (87L) conditioned to Overcurrent (50) release. In the P54x, it is sometimes required that there is a sufficient level of line current before allowing the differential protection to trip the circuit breakers. This can now be implemented using the OC Rel Status and I>Release settings in the

Phase Diff menu; and DDB Nos 1816, 1817 and 1818.

Overcurrent (50) backup to Line Differential (87L) in 13A for P54x. This has been modified for the CTS Block with new setting options for enabling different combinations of the VTS, CTS, Channel Failure. This uses a combination of DDB Nos 313, 316, 319, 332, 455, 1145 and 1146.

P54x/EN VH/Nd5 Page (VH) 22-47

(VH) 22 Version History Software Version

Software version

Major Minor

D1 D M

Hard- ware suffix

Original date of issue

Description of changes

Tripping Modes for all Distance Zones (21). All distance zones can be configured to trip 1-pole or 3-pole schemes. This new feature means that the tripping zone selection can be made on an individual zone basis for each CB.

There are now new cells in the Group x Line Parameters menu.

Auto-Reclose (AR) Skip Shot 1. DDb 1384 (AR Skip Shot 1) can now be mapped from opto to comms input. This means that the first AR cycle is skipped (missed), and so starts Dead Time 2 at the first reclose attempt.

S1 compat- ibility

Technical document- ation

Auto-Reclose (AR) Enable / Disable by using a DDB Setting. An output signal which is available in the PSL can now be mapped to an opto status input to enable the AT to continue as long as certain conditions are met. This new feature requires the use of DDB No 1384 (AR Enable); in combination with other settings.

Number of PSL Timers has increased from 16 to 32.

Release of D1B (based on D1B) for P545 only. One minor bug fix release.

Bug Fixes

Bug fix related to DR list.

Bug fix related to The 'orCat' and 'orIdent' value of the PloGGIO1 in the urcb,brcb and GOOSE.

Bug fix related to trigger time is not extracted correctly via CS103 in the configuration file.

Minor bug correction related to the Logical Node System/ploGGIO1

IED with 128 digital features. DR files extracted by IEC61850 are not the same with which extracted by MiCOM S1 studio.

Deadband read via DNP3 corrected to uint32."

Virtual Input/Output Labels are available for non IEC61850 variants.

IEC 61850 can't read the current SGCB.actVal when selecting setting group via Opto

Corrections in IEC61850 related to LN XCBR.POS.stVal

IEC61850 interlocking control correction.

Bug fix related to Weak infeed detection function reduces ground fault current sensitivity/

The INT128 datatype seems impractical to implement on almost any computer, but especially on IEDs. There is no standard way to store INT128 values on any modern computer. And the maximum value of an INT128 is larger than anyone is likely to need. The maximum value for an unsigned 64bit integer is 18,446,744,073,709,551,615 (over 18 quintillion). An INT128 value would be roughly that number multiplied by itself. I won't attempt to even write it. Currently, INT128 is only used for the "actVal" and "frVal" of BCR

(Binary counter reading).

The maximum range of power factor in phase C is 660 mms service may crash when operate a control object rapid continuous

All Changes in version D1C

Bug Fixes

Studio ftp server

P54x/EN M/Mc5

D2 A M

Add DDB(361) for BBRAM failure indicator

P54x/EN M/Mc5

Page (VH) 22-48 P54x/EN VH/Nd5

Software Version (VH) 22 Version History

Software version

Major Minor

Hard- ware suffix

H0

H1

H2

H3

A

A

A

A

M

M

M

M

Original date of issue

Description of changes

Bug fix related to the same data set being used in a RCB and GOCB.

Bug fix related to time detected in IED Event list and IEC61850

Menu cell "RP2 Read Only" is visible for all protocol options

Bug fix related to DR_MEMORY_FULL_ALARM event is recorded.

Bug fix related to wrong value of menu cell I> Blocking is displayed on the

HMI. It is necessary to press the enter key to visualise the real settings for

I>Blocking in the relay display.

Bug fix related to CBF function starts/trips even if the protection element is not mapped in psl to the corresponding trip DDB signal.

Add DDB(1893) to configure the non-current protection trigging CB failure logic

Check Sync will not work for settings angles of 0 deg.

IEC61850 Bug fixes For IEC6150

Add Hysterisis to the UnderCurrent element. Fixed hysterysis threshold: 1.2

S1 compat- ibility

Mar 2016

Correction to communication interrupt of IEC61850

Bug fix to CDC mismatch in LN PTTR

Bug Fixes

Special restricted (P546 Only) Evaluation prototype release with rejuvenated

Ethernet card, IEC61850 Edition 2 + CS2 and runs differential / Distance up to

66Hz (Frequency Tracking improvements). Based on D1B.

Mar 2016

Special restricted (P546 Only) release with rejuvenated Ethernet card,

IEC61850 Edition 2 + CS2 additional features required for specific customer in

Spain. Based on D1B / H0A.

Mar 2016 Bug Fixes

Technical document- ation

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

P54x/EN M/Nd5

H4 B M P54x/EN M/Nd5

Virtual Input and Virtual Output labels included in all protocol options.

Protection performance – the frequency operating range is now up to 70 Hz

Distance protection protection will operate up to 65Hz.

Line Differential protection will operate up to 66Hz.

Backup functions (Volt, Current and Frequency) will operate up to 70Hz.

Protection Function Trip Supervision/Fault Detector Element available.

In-Zone transformer feature (from the P543/P545) is now included in

P544/P546.

Improvements in Zone 1 distance tripping time.

New distance zone Q available. New distance mode of operation available, new timers available.

Correction in the distance directional top line of P54x.

Distance phase selector correction.

“Is1 Step Size” setting range increased.

“PSB Unblock Dly” setting range increased.

P54x/EN VH/Nd5 Page (VH) 22-49

(VH) 22 Version History Software Version

Software version

Major Minor

Hard- ware suffix

Original date of issue

Description of changes

For a pair of P546 units, one Phase Overcurrent and one Neutral Overcurrent stage can now be associated with CT1 and CT2. New settings options mean that the overcurrent stages can not take into account each of the CT inputs; and not just the summation of both of them.

The pole discrepancy logic timer used to be fixed at 0.04s for all MiCOM

P54x relays. It is now configurable in the range 0s to 10s with a step of 0.01s for P546 relays only.

Protocols Mapping has been changed in this release. Details of the protocols used for each product are shown in the SCADA Communications chapter.

Product Ordering options have been changed for this release. For more details, see the Introduction chapter.

The rejuvenated Ethernet board as well as the Px40 rejuvenation project features (such as PRP/HSR, IEC61850 Ed2, Dual IP and Cyber Security) have been included in this release.

This includes new or replacement chapters for:

Installation

Cyber Security

Dual Redundant Ethernet Board

Parallel Redundancy Prococol (PRP) Notes

High-availablity Seamless Redundancy (HSR)

Some of the DDBs have been changed in order to show the Status of Auto-

Reclose (AR) (1P, 3P) in the MiCOM P54x relays.

Enhancement of Setting Ranges in Stage 3 and Stage 4 Current settings. The

Maximum Current in Stage 3 and Stage 4 Overcurrent settings has been changed, the range now being from 0.005 A to 2.00A.

GPS / Protection communications drop-out improvements (when operating with some Multiplexer / radio links).

Improvements in Check Synch Adaptive Mode.

In zone transformer application now supported in P544 and P546 devices.

Settings chapter updated.

S1 compat- ibility

Technical document- ation

DDB descriptions and numbers updated.

The 3V2 formula in the Settings chapter has now been corrected.

New Setting No BF if L No CS available.

H6/G6 A M P54x/EN M/Nd5

Table 1 - Software and Hardware Versions

The MiCOM S1 Studio product is updated periodically. These updates provide support for new features (such as allowing you to manage new MiCOM products, as well as using new software releases and hardware suffixes). The updates may also include fixes.

Accordingly, we strongly advise customers to use the latest Schneider Electric version of MiCOM S1 Studio.

If you need more information regarding bug fixes, please contact your Schneider

Electric local support.

Page (VH) 22-50 P54x/EN VH/Nd5

Relay Software and Setting File Software Version (VH) 22 Version History

2 RELAY SOFTWARE AND SETTING FILE SOFTWARE

VERSION

40

41

42

44

15

20

30

32

11

12

13

14

03

04

05

07

51

52

53

54

45

47

48

50

55

56

57

58

Relay Software Version

01 02 03 04 05 07 11 12 13 14 15 20 30 32 40 41 42 44 45 47 48 50 51 52 53 54 55 56 57 58 A0 B0 C0 D0 D1 D2 H4

01                                     

02                                     

   1

   

                          

2 2                         

                 3

                 5

                 

     4

5

                    5

            

                         4     

            

           

         

A0                                4

                                    

                              

        2

        2

2

2

 2

 2

           

                  

                  

     

         2  2                         

                                    

                              

3 3                 

                                    

                              

                     4

              5

               5

               

              

                      4        

                          4          

                            4        

                             4 

               

              

5         3     

                                    

                                    

                   5                 

B0                               5

    

  

C0                                  4

D0                                 5    

D1                                     

D2                                     

H4                                     

Notes:

1. Compatible except for Disturbance recorder digital channel selection

2. Additional functionality added such that setting files from earlier software versions will need additional settings to be made

3. Compatible except for Disturbance recorder digital channel selection & settings for additional functionality will be missing

4. Compatible except for the Disturbance recorder digital channel selection and the distance settings

5. Compatible except for Disturbance recorder digital channel selection & the setting file contains a large number of Distance setting which will each produce an error on download

Table 2 - Relay software and PSL file software version

P54x/EN VH/Nd5 Page (VH) 22-51

(VH) 22 Version History Relay Software and PSL File Software Version

3 RELAY SOFTWARE AND PSL FILE SOFTWARE VERSION

Relay Software Version

01 02 03 04 05 07 11 12 13 14 15 20 30 32 40 41 42 44 45 47 48 50 51 52 53 54 55 56 57 58 A0 B0 C0 D0 D1 D2 H4

01                                     

02                                     

03                                     

04                                     

05      1                               

07                                     

11            1

12            1

                

                

 

 

1

1

1

1

13            1 1 1                       

14                                     

15                                     

20             1                        

30                                     

32                                     

40                      2               

41                       2              

42                        2 2      

44                          2

     

45                          

          

2 2   

47                             2 2

2

     

      

48                             2       

50                                     

51                                     

52                                     

53                                     

54                                     

55                                     

56                                     

57                                     

58                                     

A0                                2     

B0                                     

   C0                                  2

D0                                     

D1                                     

D2                                     

H4                                     

Notes:

1. Additional DDBs were added such that PSL files from earlier software versions will not be able to access them

2. Additional DDB for the Distance protection will not be included

Table 3 - Relay software and PSL file software version

Page (VH) 22-52 P54x/EN VH/Nd5

Relay Software and Menu Text File Software Version (VH) 22 Version History

4 RELAY SOFTWARE AND MENU TEXT FILE SOFTWARE

VERSION

Relay Software Version

01 02 03 04 05 07 11 12 13 14 15 20 30 32 40 41 42 44 45 47 48 50 51 52 53 54 55 56 57 58 A0 B0 C0 D0 D1 D2 H4

01                                     

                                    

07

11

12

13

02

03

04

05

                              

                              

                              

                              

                              

                              

                              

50

51

52

53

44

45

47

48

32

40

41

42

14

15

20

30

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

                              

54

55

56

57

58

                              

                              

                              

                                    

                                    

A0                                     

B0                                     

C0                                     

D0                                     

D1                                     

D2                                     

H4                                     

Table 4 - Relay software and menu text file software version

P54x/EN VH/Nd5 Page (VH) 22-53

(VH) 22 Version History

Notes:

Relay Software and Menu Text File Software Version

Page (VH) 22-54 P54x/EN VH/Nd5

MiCOM Px4x (SG) Symbols and Glossary

Px4x/EN SG/A09

SYMBOLS AND GLOSSARY

CHAPTER SG

Page (SG)-1

(SG) Symbols and Glossary MiCOM Px4x

Date

Products covered by this chapter:

Hardware Suffix

12/2014

This chapter covers the specific versions of the MiCOM products listed below. This includes only the following combinations of Software Version and Hardware Suffix.

All MiCOM Px4x products

Software Version All MiCOM Px4x products

Connection Diagrams: P14x (P141, P142, P143 & P145):

10P141xx (xx = 01 to 07)

10P142xx (xx = 01 to 07)

10P143xx (xx = 01 to 07)

10P145xx (xx = 01 to 07)

P24x (P241, P242 & P243):

10P241xx (xx = 01 to 02)

10P242xx (xx = 01)

10P243xx (xx = 01)

P34x (P342, P343, P344, P345 & P391):

10P342xx (xx = 01 to 17)

10P343xx (xx = 01 to 19)

10P344xx (xx = 01 to 12)

10P345xx (xx = 01 to 07)

10P391xx (xx =01 to 02)

P445:

10P445xx (xx = 01 to 04)

P44x:

10P44101 (SH 1 & 2)

10P44201 (SH 1 & 2)

10P44202 (SH 1)

10P44203 (SH 1 & 2)

10P44401 (SH 1)

10P44402 (SH 1)

10P44403 (SH 1 & 2)

10P44404 (SH 1)

10P44405 (SH 1)

10P44407 (SH 1 & 2)

P44y (P443 & P446):

10P44303 (SH 01 and 03)

10P44304 (SH 01 and 03)

10P44305 (SH 01 and 03)

10P44306 (SH 01 and 03)

10P44600

10P44601 (SH 1 to 2)

10P44602 (SH 1 to 2)

10P44603 (SH 1 to 2)

P54x (P543, P544, P545 & P546):

10P54302 (SH 1 to 2)

10P54303 (SH 1 to 2)

10P54400

10P54404 (SH 1 to 2)

10P54405 (SH 1 to 2)

10P54502 (SH 1 to 2)

10P54503 (SH 1 to 2)

10P54600

10P54604 (SH 1 to 2)

10P54605 (SH 1 to 2)

10P54606 (SH 1 to 2)

P547:

10P54702xx (xx = 01 to 02)

10P54703xx (xx = 01 to 02)

10P54704xx (xx = 01 to 02)

10P54705xx (xx = 01 to 02)

P64x (P642, P643 & P645):

10P642xx (xx = 1 to 10)

10P643xx (xx = 1 to 6)

10P645xx (xx = 1 to 9)

P74x

10P740xx (xx = 01 to 07)

P746:

10P746xx (xx = 00 to 21)

P841:

10P84100

10P84101 (SH 1 to 2)

10P84102 (SH 1 to 2)

10P84103 (SH 1 to 2)

10P84104 (SH 1 to 2)

10P84105 (SH 1 to 2)

P849:

10P849xx (xx = 01 to 06)

Page (SG)-2 Px4x/EN SG/A09

Contents

CONTENTS

1 Acronyms and Abbreviations

2 Company Proprietary Terms

3 ANSI Terms

4 Concatenated Terms

5 Units for Digital Communications

6 American vs British English Terminology

7 Logic Symbols and Terms

8 Logic Timers

9 Logic Gates

TABLES

Table 1 - Acronyms and abbreviations

Table 2 - Company-proprietary terms

Table 3 - ANSI abbreviations

Table 4 - ANSI descriptions

Table 5 - Concatenated terms

Table 6 - Units for digital communications

Table 7 - American vs British English terminology

Table 8 - Logic Symbols and Terms

Table 9 - Logic Timers

FIGURES

Figure 1 - Logic Gates - AND Gate

Figure 2 - Logic Gates - OR Gate

Figure 3 - Logic Gates - R-S Flip-Flop Gate

Figure 4 - Logic Gates - Exclusive OR Gate

Figure 5 - Logic Gates - Programmable Gate

Figure 6 - Logic Gates - NOT Gate

(SG) Symbols and Glossary

Page SG-

20

21

22

27

29

14

15

16

19

Page SG-

21

22

23

28

30

5

15

16

20

Page SG-

30

30

30

30

31

31

Px4x/EN SG/A09 Page (SG)-3

(SG) Symbols and Glossary

Notes:

Figures

Page (SG)-4 Px4x/EN SG/A09

Acronyms and Abbreviations

1

(SG) Symbols and Glossary

ACRONYMS AND ABBREVIATIONS

Term

<

>

A

AA

AC / ac

ACSI

Description

Less than: Used to indicate an “under” threshold, such as undercurrent (current dropout).

Greater than: Used to indicate an “over” threshold, such as overcurrent (current overload)

Ampere

Application Association

Alternating Current

Abstract Communication Service Interface

ACSR

ALF

AM

ANSI

Aluminum Conductor Steel Reinforced

Accuracy Limit Factor

Amplitude Modulation

American National Standards Institute

AR

ARIP

ASCII

ATEX

Auto-Reclose

Auto-Reclose In Progress

American Standard Code for Information Interchange

ATEX is the Potentially Explosive Atmospheres directive 94/9/EC

AUX / Aux Auxiliary

AV

AWG

BAR

BCD

BCR

BDEW

BMP

BN>

Anti virus

American Wire Gauge

Block Auto-Reclose signal

Binary Coded Decimal

Binary Counter Reading

Bundesverband der Energie- und Wasserwirtschaft | Startseite (i.e. German Association of Energy and

Water Industries)

BitMaP – a file format for a computer graphic

Neutral over susceptance protection element:

Reactive component of admittance calculation from neutral current and residual voltage.

BOP

BPDU

BRCB

BRP

BU

Blocking Overreach Protection - a blocking aided-channel scheme.

Bridge Protocol Data Unit

Buffered Report Control Block

Beacon Redundancy Protocol

Backup: Typically a back-up protection element

Business

Service Layer

This layer coordinates the application, processes commands, make logical decision and calculation according to the business rules

C264

CA

CAT

C/O

CB

CB Aux.

CBF

MiCOM C264 is the latest generation of modular substation computers. In addition to the traditional

Input/Output (I/O) management, MiCOM C264 acts as a powerful communication gateway, an advanced measurement center and a fast automation processor.

As a remote terminal unit, bay controller or protocol converter, MiCOM C264 is the compact solution to countless applications installed in demanding electromagnetic conditions.

Also used to refer to a PACiS calculator.

Certification Authority

Computer (C264) Administration Tool , for replacing CMT

A ChangeOver contact having normally-closed and normally-open connections: Often called a “form C” contact.

Circuit Breaker

Circuit Breaker auxiliary contacts: Indication of the breaker open/closed status.

Circuit Breaker Failure protection

Px4x/EN SG/A09 Page (SG)-5

(SG) Symbols and Glossary Acronyms and Abbreviations

Term

CDC

CET

CF

Common Data Class

Sepam Configurator

Control Function

Description

Ch Channel: usually a communications or signaling channel

Check Synch Check Synchronizing function

CIFS

CIP

Standards

Common Internet File System. Microsoft protocol use to share resources on a network.

Critical Infrastructure Protection standards. NERC CIP standards have been given the force of law by the

Federal Energy Regulatory Commission (FERC)

CLIO

Current Loop Input Output:

0-1 mA/0-10 mA/0-20 mA/4-20 mA transducer inputs and outputs

CLI = current loop input - 0-1 mA/0-10 mA/0-20 mA/4-20 mA transducer input

CLO = current loop output - 0-1 mA/0-10 mA/0-20 mA/4-20 mA transducer output

CID

CIP

CLK / Clk

Cls

CMC

CMP

Configured IED Description

Critical Infrastructure Protection standards

Clock

Close - generally used in the context of close functions in circuit breaker control.

Certificates Management over CMS. An IETF RFC for distribution and registration of public keys and certificates

Certificates Management Protocol. An IETF RFC for distribution and registration of public keys and certificates (RFC 4210)

Complex Measured Value

Current No Volts

CMV

CNV

COMFEDE Common Format for Event Data Exchange

CPNI Centre for the Protection of National Infrastructure

CRC

CRL

Cyclic Redundancy Check

Certificates Revocation List. A list of revoked certificates. Theoretically still valid, but forbidden by the

Security Administrator or the Security Server

CRP

CRV

Cross-network Redundancy Protocol

Curve (file format for curve information)

CRx Channel Receive: Typically used to indicate a teleprotection signal received.

CZ

DA

DAN

DANH

DANP

CS

CSMS

CSV

CT

CTRL

CTS

CTx

CUL

CVT

Cyber Security or Check Synchronism.

Cyber Security Management System

Comma Separated Values (a file format for database information)

Current Transformer

Control - as used for the Control Inputs function

Current Transformer Supervision: To detect CT input failure.

Channel Transmit: Typically used to indicate a teleprotection signal send.

Canadian Underwriters Laboratory

Capacitor-coupled Voltage Transformer - equivalent to terminology CCVT.

Abbreviation of “Check Zone”:

Zone taking into account only the feeders.

Data Attribute

Dual Attached Node

Double or Dual Attached Node with HSR protocol

Double or Dual Attached Node implementing PRP

Page (SG)-6 Px4x/EN SG/A09

Acronyms and Abbreviations (SG) Symbols and Glossary

Term Description

DT

DTD

DTOC

DTS

DVC

DZ

DLLB

DLR

DLY / Dly

DMT

DNP

DO

DPWS

DR

DREB

DSP

DST

Diff

DIN

Dist

DITA

DLDB

DDR

DEF df/dt df/dt>1

DFT

DG

DHCP

DHM

DHP

DHS

DAU

DC

DC / dc

DCC

DCE

DCS

DDB

Data Acquisition Unit

Data Concentrator

Direct Current

An Omicron compatible format

Data Communication Equipment

Distributed Control System

Digital Data Bus within the programmable scheme logic: A logic point that has a zero or 1 status. DDB signals are mapped in logic to customize the relay’s operation.

Dynamic Disturbance Recorder

Directional Earth Fault protection: A directionalized ground fault aided scheme.

Rate of Change of Frequency

First stage of df/dt protection

Discrete Fourier Transform

Distributed Generation

Dynamic Host Configuration Protocol

Dual Homing Manager

Dual Homing Protocol

Dual Homing Star. Ethernet protocol allowing bumpless redundancy. Used with Redundant Ethernet board with dual homing protocol

Differential protection.

Deutsches Institut für Normung (German standards body)

Distance protection.

Darwinian Information Typing Architecture

Dead-Line Dead-Bus : In system synchronism check, indication that both the line and bus are deenergised.

Dead-Line Live-Bus : In system synchronism check, indication that the line is de-energised whilst the bus is energised.

Dynamic Line Rating

Time Delay

Definite Minimum Time

Distributed Network Protocol

Data Object

Device Profile for Web Services

Disturbance Record

Dual Redundant Ethernet Board

Digital Signal Processor

Daylight Saving Time

Definite Time: in the context of protection elements: An element which always responds with the same constant time delay on operation. Abbreviation of “Dead Time” in the context of auto-reclose:

Document Type Definition

Definite Time Overcurrent

Date and Time Stamp

Direct Variable Cost

Dead Zone. Area between a CT and an open breaker or an open isolator.

Px4x/EN SG/A09 Page (SG)-7

(SG) Symbols and Glossary Acronyms and Abbreviations

Term

EF or E/F

EIA

ELR

EMC

ENA

ER

ESD

ESP

ESS

Earth Fault (directly equivalent to Ground Fault)

Electronic Industries Alliance

Environmental Lapse Rate

ElectroMagnetic Compatibility

Energy Networks Association

Engineering Recommendation

ElectroStatic Discharge

Description

ETS

FAA

FCS

FFail

FFT

FIR

FLC

FLT / Flt

Fn or FN

FPGA

FPS

Electronic Security Perimeter

Embedded Security Server

Element To Secure. An ETS is an entity that represents a tool, utility or application function block that can be protected within the tool suite. It gathers a list of corresponding permissions with their set of values. This list is pre-defined and cannot be edited by any business user. A same ETS can be associated to many roles with different set of authorizations.

Ageing Acceleration Factor: Used by Loss of Life (LOL) element

Frame Check Sequence

A field failure (loss of excitation) element:

Could be labeled 40 in ANSI terminology.

Fast Fourier Transform

Finite Impulse Response

Full load current: The nominal rated current for the circuit.

Fault - typically used to indicate faulted phase selection.

Function

Field Programmable Gate Array

Frames Per Second

FTP

FTPS

Fusion

FWD, Fwd or

Fwd.

Gen Diff

Gen-Xformer

Diff

GI

GIF

File Transfer Protocol or Foil Twisted Pair

FTP over TLS protocol. The classic file transfer protocol (FTP) secured using TLS tunneling.

Project name for merge of previous ‘MIRROR’ and ‘New SEPAM’ projects

Indicates an element responding to a flow in the “Forward” direction

A generator differential element: Could be labeled 87G in ANSI terminology.

A generator-transformer differential element: Could be labeled 87GT in ANSI terminology.

General Interrogation

Graphic Interchange Format – a file format for a computer graphic

GN>

Neutral over conductance protection element:

Real component of admittance calculation from neutral current and residual voltage.

GND / Gnd Ground: used in distance settings to identify settings that relate to ground (earth) faults.

GoCB

GOOSE

GOOSE Control Block

Generic Object Oriented Substation Event

GPS Global Positioning System

GRP / Grp Group. Typically an alternative setting group.

GSE General Substation Event

GSSE

GUESS

GUI

HIPS

Generic Substation Status Event

Generator Unintentional Energization at StandStill.

Graphical User Interface

Host Intrusion Prevention System based on “white list” of accepted executables.

Page (SG)-8 Px4x/EN SG/A09

Acronyms and Abbreviations (SG) Symbols and Glossary

IED

IEEE

LD

LDAP

LDOV

LDUV

LED

IET

IETF

IID

IIR

Inh

Inst

IP

IRIG

ISA

ISA

ISO

JPEF

L

LAN

LCB

LCD

LLDB

Ln

LN

LOGS

Term

HMI

HSR

HTML

I

I/O

I/P

IANA

ICAO

ICD

ID

IDMT

IEC

Description

Human Machine Interface

High-Availability Seamless Ring or High Availability Seamless Redundancy

Hypertext Markup Language

Current

Input/Output

Input

Internet Assigned Numbers Authority

International Civil Aviation Organization

IED Capability Description

Identifier or Identification. Often a label used to track a software version installed.

Inverse Definite Minimum Time. A characteristic whose trip time depends on the measured input (e.g. current) according to an inverse-time curve.

International Electro-technical Commission

Intelligent Electronic Device - a term used to describe microprocessor-based controllers of power system equipment. Common types of IEDs include protective relaying devices, load tap changer controllers, circuit breaker controllers, capacitor bank switches, recloser controllers, voltage regulators, etc.

Institute of Electrical and Electronics Engineers

IED Engineering ToolSuite for FUSION project. Similar to SET but dedicated to IED. or

IED Engineering Tool.

Internet Engineering Task Force

Instantiated/Individual IED Description

Infinite Impulse Response

An Inhibit signal

An element with Instantaneous operation: i.e. having no deliberate time delay.

Internet Protocol

InterRange Instrumentation Group

International Standard Atmosphere

Instrumentation Systems and Automation Society

International Standards Organization

Joint Photographic Experts Group – a file format for a computer graphic

Live

Local Area Network

Log Control Block

Liquid Crystal Display: The front-panel text display on the relay.

Level Detector: An element responding to a current or voltage below its set threshold. Or

Logical Device

Lightweight Directory Access Protocol

Level Detector for OverVoltage

Level Detector for UnderVoltage

Light Emitting Diode: Red or green indicator on the front-panel.

Live-Line Dead-Bus : In system synchronism check, indication that the line is energized whilst the bus is de-energized.

Natural logarithm

Logical Node

All the operations related to the security (connection, configuration…) are automatically caught in events that are logged in order to provide a good visibility of the previous actions to the security administrators.

Px4x/EN SG/A09 Page (SG)-9

(SG) Symbols and Glossary Acronyms and Abbreviations

OCSP

OID

Opto

OSI

PAP

PCB

PCT

PDC

PDP

NXT o

O/C

O/P

OCB

NIC

NIST

NPS

NTP

NVD

MIB

MICS

MIDOS

MMF

MMS

MRP

MU

MV

Term

LoL

LPDU

LPHD

LRE

MAC

MC

MCB

N

N/A

N/C

N/O

NERC

NERO

PEP

Ph

Description

A Loss of Load scheme, providing a fast distance trip without needing a signaling channel.

Link Protocol Data Unit

Logical Physical Device

Link Redundancy Entity

Media Access Control or Mandatory Access Control.

MultiCast

Miniature Circuit Breaker

Management Information Base

Model Implementation Conformance Statement

Modular Integrated DrawOut System

Magneto-Motive Force

Manufacturing Message Specification

Media Redundancy Protocol

Merging Unit

Measured Value

Neutral

Not Applicable

A Normally Closed or “break” contact: Often called a “form B” contact.

A Normally Open or “make” contact: Often called a “form A” contact.

North American Reliability Corporation

NERC Electric Reliability Organization (ERO) certified by the Federal Energy Regulatory Commission to establish and enforce reliability standards for the bulk-power system.

Network Interface Card: i.e. the Ethernet card of the IED

National Institute of Standards and Technology

Negative Phase Sequence

The Network Time Protocol (NTP) is a protocol for synchronizing the clocks of computer systems.

Neutral Voltage Displacement: Equivalent to residual overvoltage protection.

Abbreviation of “Next”: In connection with hotkey menu navigation.

A small circle on the input or output of a logic gate: Indicates a NOT (invert) function.

Overcurrent

Output

Oil Circuit Breaker

Online Certificate Status Protocol. An IETF RFC for online verification of certificates by servers (RFC

2560).

Object IDentifier

An Optically coupled logic input. Alternative terminology: binary input.

Open Systems Interconnection

Policy Administration Point. Software entity that manage the security Policy

Printed Circuit Board

Protective Conductor Terminal (Ground)

Phasor Data Concentrator

Policy Decision Point. Software entity that evaluates the applicable policy and takes an authorization decision

Policy Enforcement Point. Software entity that performs access control and enforces authorization decision.

Phase - used in distance settings to identify settings that relate to phase-phase faults.

Page (SG)-10 Px4x/EN SG/A09

Acronyms and Abbreviations (SG) Symbols and Glossary

RBN

RBPh

RCA

RCB

RCT

REB

RedBox

REF

Rev.

Term

PICS

PIP

PKI

PMU

PNG

Pol

POR

POTT

PRP

PSB

PSlip

PSP

PSTN

PT

PTP

PUR

Q

Qx

R

RA

R&TTE

PSL

RBAC

RMS / rms

Description

Protocol Implementation Conformance Statement

Policy Information Point. Software entity acting as an information source for the PDP.

Public Key infrastructure

Phasor Measurement Unit

Portable Network Graphics – a file format for a computer graphic

Polarize - typically the polarizing voltage used in making directional decisions.

A Permissive OverReaching transfer trip scheme (alternative terminology: POTT).

A Permissive Overreaching Transfer Trip scheme (alternative terminology: POR).

Parallel Redundancy Protocol

Power Swing Blocking, to detect power swing/out of step functions (ANSI 78).

Programmable Scheme Logic: The part of the relay’s logic configuration that can be modified by the user, using the graphical editor within MiCOM S1 Studio software.

A Pole slip (out-of-step - OOS) element: could be labeled 78 in ANSI terminology.

Physical Security Perimeter

Public Switched Telephone Network (RTC in French)

Power Transformer

Precision Time Protocol

A Permissive UnderReaching transfer trip scheme (alternative terminology: PUTT).

Quantity defined as per unit value

Isolator number x (from 1 to 6).

Resistance

Registration Authority

Radio and Telecommunications Terminal Equipment

Role Based Access Control. Authentication and authorization mechanism based on roles granted to a user. Roles are made of rights, themselves being actions that can be applied on objects. Each user’s action is authorized or not based on his roles

Lead burden for the neutral.

Lead burden for the phases.

Relay Characteristic Angle - The center of the directional characteristic.

Report Control Block

Redundancy Control Trailer or Redundancy Check Tag

Redundant Ethernet Board

Redundancy Box

Restricted Earth Fault

Indicates an element responding to a flow in the “reverse” direction

Root mean square. The equivalent a.c. current: Taking into account the fundamental, plus the equivalent heating effect of any harmonics.

Roles

RP

RS232

RS485

A role is a logical representation of a person activity. This activity authorizes or forbids operations within the tool suite thanks to permissions that are associated to the role. A role needs to be attached to a user account to have a real purpose.

Rear Port: The communication ports on the rear of the IED

A common serial communications standard defined by the EIA

A common serial communications standard defined by the EIA (multi-drop)

RST or Rst Reset generally used in the context of reset functions in circuit breaker control.

RSTP

Rapid Spanning Tree Protocol.

Ethernet protocol allowing bumpless redundancy. Used with Redundant Ethernet board.

Px4x/EN SG/A09 Page (SG)-11

(SG) Symbols and Glossary Acronyms and Abbreviations

Term

RTCS

RTD

RTU

Rx

SAM

SAN

SAS

SAT

SAU

SBS

SC

SCADA

SCD

SHP

SHR

SIR

SLA

SMB

SMT

Description

Real Time Certificate Status. Facility. An IETF draft for online certificates validation.

Resistance Temperature Device

Remote Terminal Unit

Receive: Typically used to indicate a communication transmit line/pin.

Security Administration Module. Device in charge of security management on an IP-over-Ethernet network.

Singly or Single Attached Node

Substation Automation Solutions / System

Security Administration Tool TSF based application used to define and create security configuration

Security Administration Utility

Straight Binary Second

Synch-Check or system Synchronism Check.

Supervisory Control and Data Acquisition

Substation Configuration Description

SCEP

SCL

Scopes

SCSM

SET

SFTP

SGCB

SHM

Simple Certificate Enrollment Protocol. An IETF draft for distribution and registration of public keys and certificates

Substation Configuration Language. In IEC 61850, the definition of the configuration files.

The nodes of the hierarchy are viewed as scopes and can be secured independently. Each node could include some roles and user accounts defined in the tool suite and create a specific security policy.

Specific Communication Service Mappings: In IEC 61850, the SCSMs define the actual information exchange mechanisms currently used (e.g. MMS).

Substation Control Unit

Server-based Certificate Validation Protocol. An IETF RFC for online certificates validation.

SCU

SCVP

SDEF Sensitive Differential Earth Fault Protection

Secured IED Devices embedding security mechanisms defined in the security architecture document

Security

Administrator A user of the system granted to manage its security

SEF

Sen

Sensitive Earth Fault Protection

Sensitive

System Engineering Tools. New Tools in place of SCE and SMT, to deal with complete life cycle for

Systems (design, realization, testing, commissioning, maintenance).

A Secured File Transfer Protocol based on SSH.

Setting Group Control Block

Self-Healing Manager

Self Healing Protocol

Self Healing Ring: Ethernet protocol allowing bumpless redundancy. Used with Redundant Ethernet board with self-healing protocol.

Source Impedance Ratio

Service Level Agreement

Server Message Block. Microsoft protocol for network resources sharing. Called CIFS on NT

Substation Management Tool (previously used on PACIS project)

SMTP

SMV

SNMP

SNTP

Simple Mail Transfer Protocol (SMTP) is an Internet standard for electronic mail (e-mail) transmission across Internet Protocol (IP) networks.

Sampled Measured Values

Simple Network Management Protocol (SNMP) is an "Internet-standard protocol for managing devices on

IP networks

Simple Network Time Protocol

Page (SG)-12 Px4x/EN SG/A09

Acronyms and Abbreviations (SG) Symbols and Glossary

TLS

TMS

TOC

TOR

TP

TSF

TUC

TVE

Tx

SSO

STP

TAT

TBD

TCP

TCS

TCS

TD

TE

THD

TICS

TIFF

SUI

SV

SVC

SVM

TAF

Term

SOA

SOAP

SOC

SOTF

SP

SPAR

SPC

SPDT

SPS

SQRT

SSD

SSH

SSL

Description

Service Oriented Architecture

Simple Object Access Protocol

Second of Century

Switch on to Fault protection. Modified protection on manual closure of the circuit breaker.

Single pole.

Single pole auto-reclose.

Single Point Controllable

Single Pole Dead Time. The dead time used in single pole auto-reclose cycles.

Single Point Status

Square Root

Solid State Device

Secured Shell. A secured encrypted network protocol for remote administration of computers

Secured Socket Layer or Source Impedance Ratio or

See TLS (TLS is based on SSLv3).

Single Sign On

Shielded Twisted Pair or

Spanning Tree Protocol

Substation User Interface

Sampled Values

Sampled Value Model

Sampled Value Model

Turbine Abnormal Frequency

Transfer Administration Tool

To Be Defined

Transmission Control Protocol

Second of Century

Trip Circuit Supervision

Time Dial. The time dial multiplier setting: Applied to inverse-time curves (ANSI/IEEE).

Unit for case measurements: One inch = 5TE units

Total Harmonic Distortion

Technical Issues Conformance Statement

Tagged Image File Format – a file format for a computer graphic

Transport Layer Security network protocol successor to SSL. Or

Transport Layer Security. Creates encrypted tunnel for TCP connections. Can guarantee authentication when used in a PKI.

Time Multiplier Setting: Applied to inverse-time curves (IEC)

Trip On Close (“line check”) protection. Offers SOTF and TOR functionality.

Trip On Reclose protection. Modified protection on autoreclosure of the circuit breaker.

Two-Part

Tool Suite Foundation. Common framework for SET and IET. Mainly 3 parts Core, Workbench (for standardized HMI), Utilities (applicative components like trace viewer, installer)

Timed UnderCurrent

Total Vector Error

Transmit

Px4x/EN SG/A09 Page (SG)-13

(SG) Symbols and Glossary Acronyms and Abbreviations

UA

Term

UDP

UL

Unsecured

IED

UPCT

UTC

V

VA

VB

VC

VCO

VDAN

Description

User Account. A user account is a logical representation of a person with some configurable parameters.

It includes information about the user identity and gives him a login to be recognized within the tool suite.

A user account is principally interesting when it is associated to some roles that will grant him authorizations.

User Datagram Protocol

Underwriters Laboratory

Relay/IEDs with no security mechanisms.

User Programmable Curve Tool

Universal Time Coordinated

Voltage

Phase A voltage: Sometimes L1, or red phase

Phase B voltage: Sometimes L2, or yellow phase

Phase C voltage: Sometimes L3, or blue phase

Voltage Controlled Overcurrent element

Virtual Dual or Doubly Attached Node

VDR

VDS

V/Hz

Vk

VPN

VT

VTS

WAN

XACML

Xformer

XKMS

XML

XSD

Voltage Dependent Resistor

Virtual Device Solution

An overfluxing element, flux is proportional to voltage/frequency: could be labeled 24 in ANSI terminology.

IEC knee point voltage of a current transformer.

Virtual Private Network (a secure private connection established on a public network or other unsecured environment).

Voltage Transformer

Voltage Transformer Supervision: To detect VT input failure.

Wide Area Network eXtensible Access Control Markup Language. An OASIS standard defining an XML access control policy implementation.

Transformer

XML Keys Management Specifications. A 3C standard, XML based, for distribution and registration of public keys and certificates

Extensible Markup Language

XML Schema Definition

Table 1 - Acronyms and abbreviations

Page (SG)-14 Px4x/EN SG/A09

Company Proprietary Terms

2

(SG) Symbols and Glossary

COMPANY PROPRIETARY TERMS

Courier

Symbol

Metrosil

MiCOM

Description

Schneider Electric’s proprietary SCADA communications protocol

Brand of non-linear resistor produced by M&I Materials Ltd.

Schneider Electric’s brand of protection relays

Table 2 - Company-proprietary terms

Px4x/EN SG/A09 Page (SG)-15

(SG) Symbols and Glossary ANSI Terms

3 ANSI TERMS

ANSI no.

3PAR

3PDT

52a

52b

64R

64S

89a

89b

Description

Three pole auto-reclose.

Three pole dead time. The dead time used in three pole auto-reclose cycles.

A circuit breaker closed auxiliary contact: The contact is in the same state as the breaker primary contacts

A circuit breaker open auxiliary contact: The contact is in the opposite state to the breaker primary contacts

Rotor earth fault protection

100% stator earth (ground) fault protection using a low frequency injection method.

An Isolator closed auxiliary contact:

The contact is in the same state as the breaker primary contacts.

An Isolator open auxiliary contact:

The contact is in the opposite state to the breaker primary contacts.

Table 3 - ANSI abbreviations

ANSI no. Function

Current Protection Functions

50/51 Phase overcurrent

Description

50N/51N

50G/51G

50BF

46

Earth fault

Sensitive earth fault

Breaker failure

Negative sequence / unbalance

Three-phase protection against overloads and phase-to-phase short-circuits.

Earth fault protection based on measured or calculated residual current values:

• 50N/51N: residual current calculated or measured by 3 phase current sensors

Sensitive earth fault protection based on measured residual current values:

• 50G/51G: residual current measured directly by a specific sensor such as a core balance CT

If a breaker fails to be triggered by a tripping order, as detected by the non-extinction of the fault current, this backup protection sends a tripping order to the upstream or adjacent breakers.

Protection against phase unbalance, detected by the measurement of negative sequence current:

• sensitive protection to detect 2-phase faults at the ends of long lines

• protection of equipment against temperature build-up, caused by an unbalanced power supply, phase inversion or loss of phase, and against phase current unbalance

46BC

Broken conductor protection

Protection against phase imbalance, detected by measurement of I2/I1.

49RMS Thermal overload

Protection against thermal damage caused by overloads on machines (transformers, motors or generators).

The thermal capacity used is calculated according to a mathematical model which takes into account:

• current RMS values

• ambient temperature

• negative sequence current, a cause of motor rotor temperature rise

Re-Closer

79 Recloser

Automation device used to limit down time after tripping due to transient or semipermanent faults on overhead lines. The recloser orders automatic reclosing of the breaking device after the time delay required to restore the insulation has elapsed.

Recloser operation is easy to adapt for different operating modes by parameter setting.

Directional Current Protection

67N/67NC type 1 and

67

Directional phase overcurrent

Phase-to-phase short-circuit protection, with selective tripping according to fault current direction. It comprises a phase overcurrent function associated with direction detection, and picks up if the phase overcurrent function in the chosen direction (line or busbar) is activated for at least one of the three phases.

Page (SG)-16 Px4x/EN SG/A09

ANSI Terms (SG) Symbols and Glossary

ANSI no. Function

67N/67NC Directional earth fault

Description

Earth fault protection, with selective tripping according to fault current direction.

Three types of operation:

• Type 1: the protection function uses the projection of the I0 vector

• Type 2: the protection function uses the I0 vector magnitude with half-plane tripping zone

• Type 3: the protection function uses the I0 vector magnitude with angular sector tripping zone

67N/67NC type 1

67N/67NC type 2

Directional current protection

Directional current protection

Directional earth fault protection for impedant, isolated or compensated neutral systems, based on the projection of measured residual current.

Directional overcurrent protection for impedance and solidly earthed systems, based on measured or calculated residual current. It comprises an earth fault function associated with direction detection, and picks up if the earth fault function in the chosen direction

(line or busbar) is activated.

67N/67NC type 3

Directional current protection

Directional overcurrent protection for distribution networks in which the neutral earthing system varies according to the operating mode, based on measured residual current. It comprises an earth fault function associated with direction detection (angular sector tripping zone defined by 2 adjustable angles), and picks up if the earth fault function in the chosen direction (line or busbar) is activated.

Directional Power Protection Functions

32P

32Q/40

Directional active overpower

Directional reactive overpower

Two-way protection based on calculated active power, for the following applications:

• active overpower protection to detect overloads and allow load shedding

• reverse active power protection:

• against generators running like motors when the generators consume active power

• against motors running like generators when the motors supply active power

Two-way protection based on calculated reactive power to detect field loss on synchronous machines:

• reactive overpower protection for motors which consume more reactive power with field loss

• reverse reactive overpower protection for generators which consume reactive power with field loss.

Machine Protection Functions

37

66

Phase undercurrent

Starts per hour

Protection of pumps against the consequences of a loss of priming by the detection of motor no-load operation.

It is sensitive to a minimum of current in phase 1, remains stable during breaker tripping and may be inhibited by a logic input.

Protection of motors against overheating caused by:

• excessive motor starting time due to overloads (e.g. conveyor) or insufficient supply voltage.

The reacceleration of a motor that is not shut down, indicated by a logic input, may be considered as starting.

• locked rotor due to motor load (e.g. crusher):

• in normal operation, after a normal start

• directly upon starting, before the detection of excessive starting time, with detection of locked rotor by a zero speed detector connected to a logic input, or by the underspeed function.

Protection against motor overheating caused by:

• too frequent starts: motor energizing is inhibited when the maximum allowable number of starts is reached, after counting of:

• starts per hour (or adjustable period)

• consecutive motor hot or cold starts (reacceleration of a motor that is not shut down, indicated by a logic input, may be counted as a start)

• starts too close together in time: motor re-energizing after a shutdown is only allowed after an adjustable waiting time.

Px4x/EN SG/A09 Page (SG)-17

(SG) Symbols and Glossary ANSI Terms

ANSI no.

50V/51V

Function

Voltage-restrained overcurrent

Description

Phase-to-phase short-circuit protection, for generators. The current tripping set point is voltage-adjusted in order to be sensitive to faults close to the generator which cause voltage drops and lowers the short-circuit current.

26/63

38/49T

Temperature monitoring

Protection that detects abnormal temperature build-up by measuring the temperature inside equipment fitted with sensors:

• transformer: protection of primary and secondary windings

• motor and generator: protection of stator windings and bearings.

Voltage Protection Functions

27D

27R

27

59

Positive sequence undervoltage

Remanent undervoltage

Undervoltage

Overvoltage

Protection of motors against faulty operation due to insufficient or unbalanced network voltage, and detection of reverse rotation direction.

Protection used to check that remanent voltage sustained by rotating machines has been cleared before allowing the busbar supplying the machines to be re-energized, to avoid electrical and mechanical transients.

Protection of motors against voltage sags or detection of abnormally low network voltage to trigger automatic load shedding or source transfer. Works with phase-to-phase voltage.

Detection of abnormally high network voltage or checking for sufficient voltage to enable source transfer. Works with phase-to-phase or phase-to-neutral voltage, each voltage being monitored separately.

59N

Neutral voltage displacement

47

Negative sequence overvoltage

Frequency Protection Functions

Detection of insulation faults by measuring residual voltage in isolated neutral systems.

Protection against phase unbalance resulting from phase inversion, unbalanced supply or distant fault, detected by the measurement of negative sequence voltage.

81O

81U

Overfrequency

Underfrequency

Detection of abnormally high frequency compared to the rated frequency, to monitor power supply quality. Other organizations may use 81H instead of 81O.

Detection of abnormally low frequency compared to the rated frequency, to monitor power supply quality. The protection may be used for overall tripping or load shedding.

Protection stability is ensured in the event of the loss of the main source and presence of remanent voltage by a restraint in the event of a continuous decrease of the frequency, which is activated by parameter setting. Other organizations may use 81L instead of 81U.

81R

Rate of change of frequency

Protection function used for fast disconnection of a generator or load shedding control.

Based on the calculation of the frequency variation, it is insensitive to transient voltage disturbances and therefore more stable than a phase-shift protection function.

Disconnection

In installations with autonomous production means connected to a utility, the “rate of change of frequency” protection function is used to detect loss of the main system in view of opening the incoming circuit breaker to:

• protect the generators from a reconnection without checking synchronization

• avoid supplying loads outside the installation.

Load shedding

The “rate of change of frequency” protection function is used for load shedding in combination with the underfrequency protection to:

• either accelerate shedding in the event of a large overload

• or inhibit shedding following a sudden drop in frequency due to a problem that should not be solved by shedding.

Dynamic Line Rating (DLR) Protection Functions

Page (SG)-18 Px4x/EN SG/A09

ANSI Terms (SG) Symbols and Glossary

ANSI no.

49DLR

Function

Dynamic line rating

(DLR)

Description

Protection of overhead lines based on calculation of rating or ampacity to dynamically take into account the effect of prevailing weather conditions as monitored by external sensors for:

• Ambient Temperature

• Wind Velocity

• Wind Direction

• Solar Radiation

Table 4 - ANSI descriptions

Px4x/EN SG/A09 Page (SG)-19

(SG) Symbols and Glossary

4 CONCATENATED TERMS

Term

Undercurrent

Overcurrent

Overfrequency

Underfrequency

Undervoltage

Overvoltage

Table 5 - Concatenated terms

Concatenated Terms

Page (SG)-20 Px4x/EN SG/A09

Units for Digital Communications

5

(SG) Symbols and Glossary

UNITS FOR DIGITAL COMMUNICATIONS

Description Unit

Gb

Gbps

GB

Tb

Tbps

TB b

B kb kbps kB

Mb

Mbps

MB bit

Byte

Kilobit(s)

Kilobits per second

Kilobyte(s)

Megabit(s)

Megabits per second

Megabyte(s)

Gigabit(s)

Gigabits per second

Gigabyte(s)

Terabit(s)

Terabits per second

Terabyte(s)

Table 6 - Units for digital communications

Px4x/EN SG/A09 Page (SG)-21

(SG) Symbols and Glossary

6

American vs British English Terminology

AMERICAN VS BRITISH ENGLISH TERMINOLOGY

British English

…ae…

…ence

…ise

…oe…

…ogue

…our

…ourite

…que

…re

…yse

Aluminium

Centre

Earth

Fibre

Ground

Speciality

…e…

…ense

…ize

…e…

…og

…or

…orite

…ck

…er

…yze

Aluminum

Center

Ground

Fiber

Earth

Specialty

American English

Table 7 - American vs British English terminology

Page (SG)-22 Px4x/EN SG/A09

Logic Symbols and Terms (SG) Symbols and Glossary

7 LOGIC SYMBOLS AND TERMS

&

Σ

Symbol Description

Logical “AND”: Used in logic diagrams to show an AND-gate function.

“Sigma”: Used to indicate a summation, such as cumulative current interrupted.

τ

> o

ω

<

“Tau”: Used to indicate a time constant, often associated with thermal characteristics.

System angular frequency

1

ABC

ACB

C df/dt df/dt>1

F<

F>

Less than: Used to indicate an “under” threshold, such as undercurrent (current dropout).

Greater than: Used to indicate an “over” threshold, such as overcurrent (current overload)

A small circle on the input or output of a logic gate: Indicates a NOT (invert) function.

Logical “OR”: Used in logic diagrams to show an OR-gate function.

Clockwise phase rotation.

Anti-Clockwise phase rotation.

Capacitance

F<1

F>1 f max f min f n

I

Rate of Change of Frequency protection

First stage of df/dt protection

Underfrequency protection: Could be labeled 81-U in ANSI terminology.

Overfrequency protection: Could be labeled 81-O in ANSI terminology.

First stage of under frequency protection: Could be labeled 81-U in ANSI terminology.

First stage of over frequency protection: Could be labeled 81-O in ANSI terminology.

Maximum required operating frequency

I ∧

Minimum required operating frequency

Nominal operating frequency

Current

Current raised to a power: Such as when breaker statistics monitor the square of ruptured current squared ( ∧ power = 2).

Maximum internal secondary fault current (may also be expressed as a multiple of In) I’f

I<

I>>

I>

I>1

I>2

I>3

I>4

I>BB

I>DZ

An undercurrent element: Responds to current dropout.

Current setting of short circuit element

A phase overcurrent protection: Could be labeled 50/51 in ANSI terminology.

First stage of phase overcurrent protection: Could be labeled 51-1 in ANSI terminology.

Second stage of phase overcurrent protection: Could be labeled 51-2 in ANSI terminology.

Third stage of phase overcurrent protection: Could be labeled 51-3 in ANSI terminology.

Fourth stage of phase overcurrent protection: Could be labeled 51-4 in ANSI terminology.

Minimum pick-up phase threshold for the local trip order confirmation.

I

0

I

1

I

2

I2>

I2pol

I2therm>

IA

IB

Minimum pick-up phase threshold for the Dead Zone protection.

Earth fault current setting

Zero sequence current: Equals one third of the measured neutral/residual current.

Positive sequence current.

Negative sequence current.

Negative sequence overcurrent protection (NPS element).

Negative sequence polarizing current.

A negative sequence thermal element: Could be labeled 46T in ANSI terminology.

Phase A current: Might be phase L1, red phase.. or other, in customer terminology.

Phase B current: Might be phase L2, yellow phase.. or other, in customer terminology.

IbiasPh> Cur. SDEF blocking bias current threshold.

An

A

A

A

A

A

A

A

A

A

A

A

A

A

A

In

A

A

Units

Hz/s

Hz/s

Hz

Hz

Hz

Hz

Hz

Hz

Hz

A rad

A

Px4x/EN SG/A09 Page (SG)-23

(SG) Symbols and Glossary Logic Symbols and Terms

I/O

I/P

Iref

IREF>

IRm2

Is

IS1

IS2

I

SEF

>

Isn

Isp

Ist

K

IN

IN>

IN>1

IN>2

IN>BB

IN>DZ

Inst

IC

Symbol

ID>1

ID>2

IDCZ>2

Idiff

IDN>1

IDN>2

IDNCZ>2

IDZ

If

If max

If max int

If Z1

Ife

IfeZ1

Ifn

Ifp

I m

IM64

IMx

I n

Description

Phase C current: Might be phase L3, blue phase.. or other, in customer terminology.

Minimum pick-up phase circuitry fault threshold.

Minimum pick-up differential phase element for all the zones.

Minimum pick-up differential phase element for the Check Zone.

Current setting of biased differential element

Minimum pick-up neutral circuitry fault threshold.

Minimum pick-up differential neutral element for all the zones.

Minimum pick-up differential neutral element for the Check Zone.

Minimum pick-up differential neutral element for the Check Zone.

Maximum secondary through-fault current

Maximum secondary fault current (same for all feeders)

Maximum secondary contribution from a feeder to an internal fault

Maximum secondary phase fault current at Zone 1 reach point

Maximum secondary through fault earth current

Maximum secondary earth fault current at Zone 1 reach point

Maximum prospective secondary earth fault current or 31 x I> setting (whichever is lowest)

Maximum prospective secondary phase fault current or 31 x I> setting (whichever is lowest)

Mutual current

InterMiCOM64.

InterMiCOM64 bit (x=1 to 16)

Current transformer nominal secondary current.

The rated nominal current of the relay: Software selectable as 1 amp or 5 amp to match the line

CT input.

Neutral current, or residual current: This results from an internal summation of the three measured phase currents.

A neutral (residual) overcurrent element: Detects earth/ground faults.

First stage of ground overcurrent protection: Could be labeled 51N-1 in ANSI terminology.

A

A

Second stage of ground overcurrent protection: Could be labeled 51N-2 in ANSI terminology.

Minimum pick-up neutral threshold for the local trip order confirmation.

Minimum pick-up neutral threshold for the Dead Zone protection.

An element with “instantaneous” operation: i.e. having no deliberate time delay.

Inputs and Outputs - used in connection with the number of optocoupled inputs and output contacts within the relay.

Input

A

A

A

A

A

A

A

A

A

A

A

A

A

A

Reference current of P63x calculated from the reference power and nominal voltage A

A Restricted Earth Fault overcurrent element: Detects earth (ground) faults. Could be labeled 64 in

ANSI terminology.

A

Second knee-point bias current threshold setting of P63x biased differential element

Value of stabilizing current

Differential current pick-up setting of biased differential element

A

A

A

Bias current threshold setting of biased differential element

Sensitive Earth Fault overcurrent element.

Rated secondary current (I secondary nominal)

Stage 2 and 3 setting

Motor start up current referred to CT secondary side

Dimensioning factor

A

A

A

A

A

Units

Page (SG)-24 Px4x/EN SG/A09

Logic Symbols and Terms (SG) Symbols and Glossary

Rr

Rrn

Rrp

Rs

Rx

S<

R Gnd.

R Ph

Rct

RCT

Rl

S1 kZm

N

-P>

P>

P< kZN

L m1 m2 mi

P1

P2

P n

PN>

Q<

R

K

1

Symbol

K

2

KCZ

K e km

K max

KNCZ

K rpa

K s

K ssc

K t

Description

Lower bias slope setting of biased differential element

Higher bias slope setting of biased differential element

Slope of the differential phase element for the Check Zone.

Dimensioning factor for earth fault

Distance in kilometers

Maximum dimensioning factor

Slope of the differential neutral element for the Check Zone.

Dimensioning factor for reach point accuracy

Dimensioning factor dependent upon through fault current

Short circuit current coefficient or ALF

Dimensioning factor dependent upon operating time

The mutual compensation factor (mutual compensation of distance elements and fault locator for parallel line coupling effects).

The residual compensation factor: Ensuring correct reach for ground distance elements.

Inductance

Lower bias slope setting of P63x biased differential element

Higher bias slope setting of P63x biased differential element

Distance in miles.

Indication of “Neutral” involvement in a fault: i.e. a ground (earth) fault.

A reverse power (W) element: could be labeled 32R in ANSI terminology.

An overpower (W) element: could be labeled 32O in ANSI terminology.

A low forward power (W) element: could be labeled 32L in ANSI terminology.

Used in IEC terminology to identify the primary CT terminal polarity: Replace by a dot when using

ANSI standards.

Used in IEC terminology to identify the primary CT terminal polarity: The non-dot terminal.

Rotating plant rated single phase power

Wattmetric earth fault protection: Calculated using residual voltage and current quantities.

A reactive under power (VAr) element

Resistance ( Ω )

W

A

None

None

%

%

Units

A distance zone resistive reach setting: Used for ground (earth) faults.

A distance zone resistive reach setting used for Phase-Phase faults.

Secondary winding resistance

Current transformer secondary resistance

Resistance of single lead from relay to current transformer

Resistance of any other protective relays sharing the current transformer

Resistance of relay neutral current input

Resistance of relay phase current input

Value of stabilizing resistor

Receive: typically used to indicate a communication receive line/pin.

An apparent under power (VA) element

Used in IEC terminology to identify the secondary CT terminal polarity: Replace by a dot when using ANSI standards.

Px4x/EN SG/A09 Page (SG)-25

(SG) Symbols and Glossary Logic Symbols and Terms

V2 pol

V

A

V

B

V

C

Vf

Vin

VN

VN>

V n

Vn

VN>1

VN>2

V<

V<1

V<2

V>

V>1

V>2

V0

V1

V2

S2

Symbol

S2> t t’

T1

TF

Description

Used in IEC terminology to identify the secondary CT terminal polarity: The non-dot terminal.

Also used to signify negative sequence apparent power, S2 = V2 x I2.

A negative sequence apparent power element, S2 = V2 x I2.

A time delay.

Duration of first current flow during auto-reclose cycle

Primary system time constant

Through Fault monitoring tfr Auto-reclose dead time

Thermal I> A stator thermal overload element: could be labeled 49 in ANSI terminology.

Thru/TF tIdiff

Through Fault monitoring

Current differential operating time

Ts

Tx

V

Secondary system time constant

Transmit: typically used to indicate a communication transmit line/pin.

Voltage.

V2>

V k

Vres.

Vs

V x

VN3H>

VN3H<

An undervoltage element: could be labeled 27 in ANSI terminology

First stage of undervoltage protection: Could be labeled 27-1 in ANSI terminology.

Second stage of undervoltage protection: Could be labeled 27-2 in ANSI terminology.

An overvoltage element: could be labeled 59 in ANSI terminology

First stage of overvoltage protection: Could be labeled 59-1 in ANSI terminology.

Second stage of overvoltage protection: Could be labeled 59-2 in ANSI terminology.

Zero sequence voltage: Equals one third of the measured neutral/residual voltage.

Positive sequence voltage.

Negative sequence voltage.

A Negative Phase Sequence (NPS) overvoltage element: could be labeled 47 in ANSI terminology.

Negative sequence polarizing voltage.

Phase A voltage: Might be phase L1, red phase.. or other, in customer terminology.

Phase B voltage: Might be phase L2, yellow phase.. or other, in customer terminology.

Phase C voltage: Might be phase L3, blue phase.. or other, in customer terminology.

Theoretical maximum voltage produced if CT saturation did not occur

Input voltage e.g. to an opto-input

Required CT knee-point voltage.

IEC knee point voltage of a current transformer.

Neutral voltage displacement, or residual voltage.

A residual (neutral) overvoltage element: could be labeled 59N in ANSI terminology.

Nominal voltage

The rated nominal voltage of the relay: To match the line VT input.

First stage of residual (neutral) overvoltage protection.

Second stage of residual (neutral) overvoltage protection.

A 100% stator earth (ground) fault 3rd harmonic residual (neutral) overvoltage element: could be labeled 59TN in ANSI terminology.

A 100% stator earth (ground) fault 3rd harmonic residual (neutral) undervoltage element: could be labeled 27TN in ANSI terminology.

Neutral voltage displacement, or residual voltage.

Value of stabilizing voltage

An auxiliary supply voltage: Typically the substation battery voltage used to power the relay.

V

V

V

V

V

V

V

V

V

V

V

V

V

V

V

V s

V s s s s

V

V

V

V

V

V

V

V

V

Units

Page (SG)-26 Px4x/EN SG/A09

Logic Symbols and Terms (SG) Symbols and Glossary

WI

Symbol

X

X/R

Xe/Re

Xt

Y

YN>

Z2

Z2

ZP

Zs

Φal

Ψr

Ψs

Z

Z<

Z0

Z1

Z1

Z1X

Description

Weak Infeed logic used in teleprotection schemes.

Reactance

Primary system reactance/resistance ratio

Primary system reactance/resistance ratio for earth loop

Transformer reactance (per unit)

Admittance

Neutral overadmittance protection element:

Non-directional neutral admittance protection calculated from neutral current and residual voltage. p.u. p.u.

Impedance

An under impedance element: could be labeled 21 in ANSI terminology. p.u.

Units

None

None

None

Zero sequence impedance.

Positive sequence impedance.

Zone 1 distance protection.

Reach-stepped Zone 1X, for zone extension schemes used with auto-reclosure.

Negative sequence impedance.

Zone 2 distance protection.

Programmable distance zone that can be set forward or reverse looking.

Used to signify the source impedance behind the relay location.

Accuracy limit flux

Remanent flux

Saturation flux

Wb

Wb

Wb

Table 8 - Logic Symbols and Terms

Px4x/EN SG/A09 Page (SG)-27

(SG) Symbols and Glossary

8 LOGIC TIMERS

Logic symbols t

0

Explanation

Delay on pick-up timer, t

0 t

Delay on drop-off timer, t t1 t2

Delay on pick-up/drop-off timer

Pulse timer

Pulse pick-up falling edge

Pulse pick-up raising edge

Page (SG)-28

Time chart

Logic Timers

Px4x/EN SG/A09

Logic Timers

Logic symbols

Latching

Latch

Dwell

Timer

Dwell timer

Explanation

Straight

Straight (non latching):

Hold value until input reset signal

Table 9 - Logic Timers

(SG) Symbols and Glossary

Time chart

Px4x/EN SG/A09 Page (SG)-29

(SG) Symbols and Glossary Logic Gates

9 LOGIC GATES

A

B

Symbol

& Y

0

1

A

0

1

Truth Table

IN

1

0

1

OUT

0

0

1

A

B

AND GATE

Symbol Truth Table

OUT

& Y

0

1

A

0

1

IN

0

1

0

1

1

0

0

A

B

Symbol

& Y

0

1

A

0

1

Truth Table

IN

1

0

B

0

1

OUT

1

0

Y

1

1

P4424ENb

Figure 1 - Logic Gates - AND Gate

A

B

Symbol

1 Y

Truth Table

A

0

0

IN

0

1

0

OUT

1

1

1

A

B

OR GATE

Symbol Truth Table

1 Y

0

1

1

A

0

IN

1

0

1

OUT

1

1

A

B

Symbol

1 Y

0

1

1

A

0

Truth Table

IN

1

0

1

OUT

0

0

P4424ENc

Figure 2 - Logic Gates - OR Gate

A

B

Symbol

S

R

Q Y

Truth Table

A B

0 0

QN QN+

0

1

1

0

0 0

0

1

0

1

0

1

Active

Mode

Hold

Mode

Hold

Mode

Reset

Set

Hold

Mode

Inhibit

Mode

A

B

R – S FLIP-FLOP

Symbol Truth Table

S

R

Q Y

A

0

0

1

0

B QN QN+

0

1

0

1

0

1

- -

0

1

1

0

Active

Mode

Hold

Mode

Reset

Hold

Mode

Inhibit

Mode

Set

Hold

Mode

A

B

Symbol

S

RD

Q

* RD = Reset

Dominant

Y

Truth Table

A B QN QN+

0

0

1

1

0

1

0

1

0

1

1

Active

Mode

Hold

Mode

0

Set

Hold

Mode

0

P4424ENd

Figure 3 - Logic Gates - R-S Flip-Flop Gate

A

B

Symbol

XOR Y

Truth Table

A

0

0

IN

0

1

0

OUT

1

1

0

A

B

EXCLUSIVE OR GATE

Symbol Truth Table

OUT

XOR Y

A

0

0

IN

0

1

0

1

0

1

Symbol

A

B

XOR Y

A

0

0

Truth Table

IN

0

1

0

OUT

0

0

1

P4424ENe

Figure 4 - Logic Gates - Exclusive OR Gate

Page (SG)-30 Px4x/EN SG/A09

Logic Gates (SG) Symbols and Glossary

Symbol

A

B

C

2 Y

Truth Table

1

1

0

0

IN

A B C

OUT

Y

0 0 0 0

0 0

1

1

0

1 1 1

0 0 0

0

0

0 1 1

1 1 0 1

1 1 1 1

A

B

C

PROGRAMMABLE GATE

Symbol Truth Table

2 Y

1

1

0

0

IN

A B C

OUT

Y

0 0 0 0

0 0

1

1

0

1 1 1

0 0 0

1

1

0 1 0

1 1 0 0

1 1 1 1

Symbol

A

B

C

2 Y

Truth Table

0 0 0 1

0

0

0

1

1

IN

A B C

0

1

1

1

0

OUT

Y

1

1

1 0

0 0 1

0 1 0

1 1 0 0

1 1 1 0

P4424ENf

Figure 5 - Logic Gates - Programmable Gate

NOT GATE

Symbol

A

Inverter (NOT)

Y

Truth Table

IN OUT

A

0

1

Y

1

0

P4424ENg

Figure 6 - Logic Gates - NOT Gate

Px4x/EN SG/A09 Page (SG)-31

(SG) Symbols and Glossary

Notes:

Logic Gates

Page (SG)-32 Px4x/EN SG/A09

Customer Care Centre

http://www.schneider-electric.com/ccc

Schneider Electric

35 rue Joseph Monier

92506 Rueil-Malmaison

FRANCE

Phone: +33 (0) 1 41 29 70 00

Fax: +33 (0) 1 41 29 71 00 www.schneider-electric.com Publisher: Schneider Electric

Publication:

P54x/EN M/Nd5 Current Differential Protection Relay Software Version: H4 Hardware Suffix: M 06/2016

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