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UG0639
User Guide
Color Space Conversion
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50200639. 5.0 12/20
Contents
3.9
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Figures
Figure 10
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Tables
Table 10
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Revision History
1 Revision History
The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the current publication.
1.1
Revision 5.0
The following is a summary of the changes in this revision.
• Updated
• Updated
• Added figures to show system-level block diagram. See,
•
Added figure to show testbench results. See, Figure 8, page 8 and Figure 10, page 8.
• Added table for input and output ports of the RGB to YCbCr422 block. See,
• Resource Utilization tables were added. See,
Table 8, page 9 and Table 10, page 9.
• Added sections
Key Features, page 4, Supported Families, page 4,
License, page 7, Obfuscated, page 7, and RTL, page 7.
1.2
Revision 4.0
The following is a summary of the changes in this revision.
• IOs and equations were updated.
•
page 3 and Figure 3, page 4 were updated.
•
Input and Output Port were updated. See, Table 2,
•
Added figure to show Testbench results. See, Figure 7, page 8 and Figure 9, page 8.
•
Resource Utilization values were updated. See, Resource Utilizations, page 8.
1.3
Revision 3.0
Updated the Resource Utilization section and the Resource Utilization Report. See Resource
1.4
Revision 2.0
The following is a summary of the changes in this revision.
• The Testbench section was added to the document as per SAR 76100. For more information, see
•
Resource Utilization values were updated as per SAR 76100. For more information, see Resource
1.5
Revision 1.0
The first publication of this document.
Microsemi Proprietary UG0639 Revision 5.0
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Introduction
2 Introduction
A color space is a mathematical representation of a set of colors. The most popular color models are:
• RGB - Used in computer graphics
• YIQ, YUV, and YCbCr - Used in video compression
The red, green, and blue (RGB) color space is widely used in computer graphics. These are three primary additive colors and are represented by a three-dimensional, Cartesian coordinate system. These three colors are used to create any desired color. Therefore, the choice of the RGB color space simplifies the architecture and design of the system. Also, the system that is designed using the RGB color space takes advantage of the large number of existing software routines.
However, RGB is not very efficient in terms of bandwidth as all the three components have to be present in equal bandwidth to produce any color. So an RGB based frame buffer must have the same pixel depth and display resolution for each RGB component. Processing an image in RGB color space is usually not the most efficient method. For example: to modify the intensity or color of a given pixel, the three RGB values must be read from the frame buffer, the intensity or color calculated, desired modifications performed, new RGB values calculated, and written back into the frame buffer.
The same can be achieved if the image color properties are stored directly in intensity and color format.
Due to this reason, many video standards use luma and two color difference signals. One of the common color spaces in this format is the YCbCr color space format.
The YCbCr color space was developed as part of ITU-R VT.601 during the development of a worldwide digital component video standard. The luma component Y is defined to have a nominal 8-bit range of 16-
235 range of values. The color information is represented as Cb and Cr with a nominal 8-bit range of 16-
240 range of values. There are several YCbCr sampling formats such as 4:4:4, 4:2:2, 4:1:1, and 4:2:0.
Table 1 • YCbCr Sample Formats
YCbCr Sample
Format
4:4:4
4:2:2
4:1:1
4:2:0
Description
Each sample has a Y, a Cb, and a Cr value represented typically using 8-bits or 10-bits per component. Therefore, each sample in a 4:4:4 sampling format requires either 24-bits or 30 bits.
In 4:2:2 sampling format, for every two horizontal Y samples, there is one Cb and Cr value. Each component sample is typically represented as 8-bits or 10-bits. Therefore, each sample in a 4:2:2 sampling format requires either 16-bits or 20-bits.
In 4:1:1 sampling format, for every four horizontal Y samples, there is one Cb and Cr value. Each component sample is typically represented as 8-bits. Therefore, each sample in a 4:1:1 sampling format requires 12-bits.
In the 4:2:0 sampling format, the 2:1 reduction is done on both horizontal and vertical values. It is commonly used in video compression.
The advantages and disadvantages of various color space formats lead to requirements for the color space conversions. The objective is to convert the video inputs into the desired color space before performing any video processing on it. The RGB to YCbCr and vice-versa conversion is one such example.
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Hardware Implementation
3 Hardware Implementation
This section describes the implementation of the Color Space Conversion block.
3.1
Design Description
The Color space conversion IP block contains two modules — RGB to YCbCr and YCbCr to RGB. The
RGB to YCbCr Color Space Converter IP module implements the equations to convert 24-bit input RGB color samples to 24-bit YCbCr output samples. The YCbCr to RGB Color Space Converter IP module converts vice-versa of the RGB to YCbCr. Both the converters use a 4:4:4 sampling format.
Both the modules take data enable, as inputs and pipeline them accordingly to match the conversion video data outputs.
To convert the floating point constants into integer multiplication, the floating point constants are scaled by multiplying these constants with 2 8 = 256. Then after the computation of the above equations, the output is divided by the scaling factor 2 16 = 65536.
After scaling, the RGB to YCbCr equations are:
Y= 16 + 65.738*R/256 + 129.057*G/256 + 25.064*B/256
Cb = 128-37.945*R/256 - 74.494*G/256 + 112.439*B/256
Cr = 128+112.439*R - 94.154*G/256 - 18.285*B/256
After scaling, the YCbCr to RGB equations are:
R = 298.082*Y/256 + 408.583 * Cr/256 - 222.921
G = 298.082*Y/256 -100.291*Cb/256 - 208.120*Cr/256 + 135.576
B = 298.082*Y/256 + 516.412*Cb/256 - 276.836
The following figures show the system-level block diagrams of the RGB to YCbCr block.
Figure 1 • System-Level Block Diagram of RGB to YCbCr444
CLOCK_I
RESET_N_I
DATA_VALID_I
RED_I
GREEN_I
BLUE_I
RGB-to-YCbCr444
DATA_VALID_O
Y_O
Cb_O
Cr_O
Figure 2 • System-Level Block Diagram of RGB to YCbCr422
CLOCK_I
RESET_N_I
DATA_VALID_I
RED_I
GREEN_I
BLUE_I
RGB-to-YCbCr422
DATA_VALID_O
Y_OUT
C_OUT
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Hardware Implementation
The following figures show the system-level block diagrams of the YCbCr to RGB blocks.
Figure 3 • System-Level Block Diagram of YCbCr444 to RGB
CLOCK_I
RESET_N_I
DATA_VALID_I
Y_IN
Cb_IN
Cr_IN
YCbCr444-to-RGB
DATA_VALID_O
RED_O
GREEN_O
BLUE_O
Figure 4 • System-Level Block Diagram of YCbCr422toRGB
CLOCK_I
RESET_N_I
DATA_VALID_I
Y_I
C_I
YCbCr422-to-RGB
DATA_VALID_O
RED_O
GREEN_O
BLUE_O
3.2
Key Features
• Supports RGBtoYCbCr444 and RGBtoYCbCr422 upsampling color space conversion also supports
YCbCr444toRGB and YCbCr422toRGB downsampling color space conversion.
• Supports 8, 10, and 12 data width.
3.3
Supported Families
• PolarFire
• PolarFire
®
®
SoC
• RTG4 ™
• IGLOO ® 2
• SmartFusion ® 2
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Hardware Implementation
3.4
Inputs and Outputs
The following tables show the input and output ports of the RGB to YCbCr.
Table 2 • Input and Output Ports of the RGB to YCbCr444 Block
Signal Name
RESET_N_I
CLOCK_I
RED_I
Direction Width
Input -
Input
Input
-
Description
Active low asynchronous reset signal to design
System clock
[(G_RGB_DATA_BIT_WIDTH-1):0] Red pixel data input
GREEN_I
BLUE_I
Input
Input
DATA_VALID_I Input
Y_OUT_O Output
-
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
Green pixel data input
Blue pixel data input
Input data valid signal
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Y pixel data output
Cb_OUT_O
Cr_OUT_O
Output
Output
DATA_VALID_O Output -
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Cb pixel data output
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Cr pixel data output
Output data valid signal
Table 3 • Input and Output Ports of the RGB to YCbCr422 Block
Signal Name
RESET_N_I
CLOCK_I
RED_I
GREEN_I
BLUE_I
DATA_VALID_I
Y_OUT
Direction Width
Input
Input
Input
Input
Input
Input
Output
-
-
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
Description
Active low asynchronous reset signal to design
System clock
Red pixel data input
Green pixel data input
Blue pixel data input
Input data valid signal
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Y pixel data output
C_OUT Output
DATA_VALID_O Output -
[(G_YCbCr_DATA_BIT_WIDTH-1):0] C pixel data output
Output data valid signal
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Hardware Implementation
The following tables shows the input and output ports of the YCbCr to RGB blocks.
Table 4 • Input and Output Ports of the YCbCr444-to-RGB Block
Signal Name
RESET_N_I
CLOCK_I
Y_I
Direction Width
Input -
Input
Input
-
Description
Active low asynchronous reset signal to design
System clock
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Y pixel data input
Cb_I
Cr_I
Input
Input
DATA_VALID_I Input
RED_O Output
-
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Cb pixel data input
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Cr pixel data input
[(G_RGB_DATA_BIT_WIDTH-1):0]
Input data valid signal
Red pixel data output
GREEN_O
BLUE_O
Output
Output
DATA_VALID_O Output -
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
Green pixel data output
Blue pixel data output
Output data valid signal
Table 5 • Input and Output Ports of the YCbCr422 to RGB Block
Signal Name
RESET_N_I
CLOCK_I
Y_I
Direction Width
Input -
Input
Input
-
Description
Active low asynchronous reset signal to design
System clock
[(G_YCbCr_DATA_BIT_WIDTH-1):0] Y pixel data input
C_I Input
DATA_VALID_I Input
RED_O
GREEN_O
Output
Output
BLUE_O Output
DATA_VALID_O Output
-
-
[(G_YCbCr_DATA_BIT_WIDTH-1):0] C pixel data input
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
[(G_RGB_DATA_BIT_WIDTH-1):0]
Input data valid signal
Red pixel data output
Green pixel data output
Blue pixel data output
Output data valid signal
3.5
Configuration Parameters
The following table shows the configuration parameters used in the hardware implementation of RGB to
YCbCr and YCbCr to RGB blocks. These are generic parameters and can be varied as per the application requirements.
Table 6 • Configuration Parameters
Name
G_RGB_DATA_BIT_WIDTH
G_YCbCr_DATA_BIT_WIDTH
G_YCbCr_FORMAT
Description
RGB data bit width
YCbCr data bit width
YCbCr444 and YCbCr422
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Hardware Implementation
3.6
License
Color space conversion IP clear RTL is license locked and the obfuscated RTL available for free.
3.6.1
Obfuscated
Complete RTL code is provided for the core, allowing the core to be instantiated with the SmartDesign tool. Simulation, synthesis, and layout can be performed within Libero code for the core is obfuscated.
® System-on-Chip (SoC). The RTL
3.6.2
RTL
Complete RTL source code is provided for the core.
3.7
Timing Diagrams
The following figure shows the timing diagrams of RGB to YCbCr444.
Figure 5 • Timing Diagram of RGB to YCbCr444
CLOCK_I
DATA_VALID_I
RED_I
GREEN_I
BLUE_I
R0
G0
B0
R1 R2
G1
B1
G2
B2
R3
G3
B3
R4 R5
G4
B4
G5
B5
R6
G6
B6
Y_OUT_O
Cb_OUT_O
Y0 Y1 Y2 Y3
Cb0 Cb1 Cb2 Cb3
Y4 Y5 Y6
Cb4 Cb5 Cb6
Cr_OUT_O Cr0 Cr1 Cr2 Cr3 Cr4 Cr5 Cr6
DATA_VALID_O
The following figure shows the timing diagrams of YCbCr444 to RGB blocks.
Figure 6 • Timing Diagram of YCbCr444 to RGB
CLOCK_I
DATA_VALID_I
Y_I
Cb_I
Cr_I
Y0
Cb0
Y1 Y2
Cb1 Cb2
Y3
Cb3
Cr0 Cr1 Cr2 Cr3
Y4 Y5 Y6
Cb4 Cb5 Cb6
Cr4 Cr5 Cr6
RED_O
GREEN_O
R0
G0
R1 R2
G1 G2
R3
G3
R4
G4
R5 R6
G5 G6
B0 B1 B2 B3 B4 B5 B6 BLUE_O
DATA_VALID_O
Note:
All other input signals get delayed by the clock cycles as shown in Figure 6,
.
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Hardware Implementation
3.8
Testbench
A testbench is provided to check the functionality of Color Space Converter core. The following figure shows testbench result for RGB to YCbCr color space conversion.
Figure 7 • RGB to YCbCr444 Testbench Results
Figure 8 • RGB to YCbCr422 Testbench Results
The following figure shows testbench result for YCbCr to RGB color space conversion.
Figure 9 • YCbCr444 to RGB Testbench Results
Figure 10 • YCbCr422 to RGB Testbench Results
3.9
Resource Utilizations
The color space conversion block is implemented on an M2S150T SmartFusion following tables show the Resource Utilization of RGB to YCbCr.
® 2 System-on-Chip
(SoC) FPGA in the FC1152 package) and PolarFire FPGA (MPF300TS_ES - 1FCG1152E package). The
Table 7 • Resource Utilization of RGB to YCbCr444
Resource
DFFs
4-input LUTs
MACC
RAM1kx18
RAM64x18
Usage
51
86
9
0
0
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Hardware Implementation
Table 8 • Resource Utilization of RGB to YCbCr422
Resource
DFFs
4-input LUTs
MACC
RAM1kx18
RAM64x18
Usage
69
94
9
0
0
The following table shows the Resource Utilization of YCbCr to RGB.
Table 9 • Resource Utilization of YCbCr444 to RGB
Resource
DFFs
4-input LUTs
MACC 5
RAM1kx18
RAM64x18
0
0
Usage
85
134
5
Table 10 • Resource Utilization of YCbCr422 to RGB
Resource
DFFs
4-input LUTs
MACC 5
RAM1kx18
RAM64x18
Usage
87
137
5
0
0
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