STMicroelectronics STEVAL-WLC99RX User Manual

UM3262
User manual
STEVAL-WLC99RX wireless power receiver evaluation board
Introduction
The STEVAL-WLC99RX evaluation board, based on STWLC99, is designed for wireless power receiver applications, and allows
its users to quickly start their projects with up to 70 W charging using ST’s proprietary STSC protocol.
STEVAL-WLC99 requires only a few external components and offers great design flexibility. The board can be connected to a
PC using the STEVAL-USBI2CFT converter board, allowing the user to monitor and control the device via the STSWWPSTUDIO graphical user interface (GUI).
STEVAL-WLC99RX features several safety mechanisms providing over temperature (OVTP), overcurrent (OCP), and
overvoltage (OVP) protections as well as foreign object detection (FOD) for reliable designs.
Figure 1. STEVAL-WLC99RX evaluation board
UM3262 - Rev 1 - March 2024
For further information contact your local STMicroelectronics sales office.
www.st.com
UM3262
Get started
1
Get started
Example 1 :
To get started with STEVAL-WLC99RX, you need the following items to use the reference design kit:
•
Evaluation kit components:
•
–
STEVAL-WLC99RX board
–
STEVAL-USBI2CFT converter board
Additional hardware
–
•
STEVAL-WBC2TX70 for the best results for a 70 W turnkey wireless charging system or any other Qi
BPP compliant transmitter available on the market
–
Electronic load
–
Windows PC for measurements and configurations
Software:
–
•
–
I2C drivers
Technical documentation:
–
–
–
–
UM3262 - Rev 1
STSW-WPSTUDIO Wireless power studio PC GUI installation package
Coil selection guide [AN5961]
GUI guide [DB4993]
STSC application note
STSC FOD tuning guide
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Reference design specifications
2
Reference design specifications
Target specifications of the STEVAL-WLC99RX evaluation board are as follows:
Table 1. Target design specification
Parameter
Description
Qi compatibility
Qi 1.3 BPP protocol
Rx application PCB area
81 mm x 81 mm
Rx coil specifications
Inductance 4 uH, DCR 75 mOhm, ACR 95 mΩ
dimensions 58 mm x 58 mm x 0.5 mm
Output voltage (Vout, continuous
operation)
5 V baseline power profile / up to 20 V in STSC
Output current (Iout, Load)
The recommended current load range is 0 – 3.5 A
Host MCU
STM32 used as a reference, the reference I2C driver can be ported to any other MCU
family
USB to I2C converter
Separate dongle board
Efficiency
Applicable charging gap between Tx
and Rx coils
(z-distance)
87.8% for 70 W power transfer with STEVAL-WBC2TX70
88.2% peak efficiency (54 W) with STEVAL-WBC2TX70
Up to 12 mm for 70 W power transfer
Up to 19 mm for stable communication, may not reach the full output voltage range.
Misalignment between Tx and Rx coils Up to 10 mm for 70 W power transfer
(x-y offset from the center)
Up to 18 mm for stable communication, may not reach the full output voltage range.
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Transmitter mode
Supported, but not covered in this document
Ambient temperature
25°C
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Overview of the Board
3
Overview of the Board
The STEVAL-WLC99RX evaluation board is optimized for performance. The board features:
•
–
–
–
–
–
–
STWLC99 wireless power receiver chip with BPP (5 W) compliant firmware and STSC ready
Very few external components
On-chip high efficiency rectifier
Support for external NTC for thermal monitoring
On-chip thermal management and protections
Up to 70 W with ST proprietary protocol (STSC)
Figure 2. Main board elements
•
•
UM3262 - Rev 1
Series resonant capacitors (Ctank) and the receiving coil together form a resonant circuit. This circuit is in
charge of receiving the power signal, so any components/tracks involved should be rated accordingly
Red LED (D9) indicates STWLC99 core power status (theLED is on when the core is powered)
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Overview of the Board
3.1
Test points
STEVAL-WLC99RX features several headers and test points to provide easy access to key signals.
Figure 3. Headers and test points
Table 2. Header and test point description
Connector
UM3262 - Rev 1
Name
Description
4-pin header: for mounting Rx coil:
P1
Rx coil
J1 +J2
Rx coil
P16
Rectifier AC input
signals
P17
External NTC
2-pin header for external NTC connection, NTC connected between EXTMP chip pin and
ground
P4
VOUT
2-pin Header, power output
P21
GROUND
2-pin header, power output
J3 + J4
Power output
P20, P22
GROUND
GND test point
P9
I2C
6-pin header: connection to USB-I2C convertor, interrupt (INTN) and reset (WL_CTRL)
P24
I2C
3-pin header: I2C connection, connected to the pins of the same name on the header P9
P8
Analog
7-pin header: Outputs of internal LDOs, ADC input signal
P12
Digital
8-pin header: digital general IO pins, digital IO pins with predefined function
P7
VRECT SENSE
Pin 1, 2: AC2 signal; Pin 3, 4: AC1_COIL signal
2 mm banana terminal for Rx coil connection
J1: AC2 signal; J2: AC1_COIL signal
2-pin header:
Pin 1: AC1 signal, pin2: AC2 signal
2 mm banana terminals for load connection
J3: Vout; J4: GND
2-pin header:
Pin 1: Sensing the signal of Vrect on the chip pad, pin 2: GND
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Overview of the Board
Connector
P5
3.2
Name
VOUT SENSE
Description
2-pin header:
Pin 1: Sensing the signal of Vout on the chip pad, pin 2: GND
Basic operating modes
The receiver generally works in two modes - DC (also called standalone) mode and Rx mode.
DC mode is characterized by the wireless receiver being powered from an external DC power supply. This mode
is used for patch and configuration loading (described later). Before entering this mode, the device shall not be
powered from the power transmitter (the device is put away from the power transmitter, or the power transmitter is
being powered off).
RX mode is used when the wireless receiver is powered from a wireless power transmitter. A stable and ongoing
power transfer between the transmitter and the receiver is indicated by LED (D9). Make sure that Rx is not
powered by external DC power before entering this mode.
Note:
If the patch and/or configuration files are not loaded (missing or corrupted) the STWLC99 does not initiate
communication and power transfer will not be established. STWLC99 will be operating in DC mode.
Note:
If WLC99 is powered by DC voltage (to Vout) and then put onto power transmitter, the STWLC99 will not initiate
communication and power transfer will not be established. STWLC99 will continue to operate in DC mode.
3.3
Functional check
Figure 4. STEVAL-WLC99RX (left board) placed on transmitter coil of STEVAL-WBC2TX70 (right board)
The first sign of an ongoing power transfer is the D9 LED, as this LED indicates that the internal power supply of
the device is ready. A continuously shining LED indicates a stable power supply, while a blinking or inactive LED
indicates an unstable and/or insufficient power supply.
The LED D9 is permanently OFF means that there is no power transfer between the transmitter and the
receiver. Check if the power supply of the transmitter is connected and working properly. Power transfer
termination may also be caused by a large enough misalignment (from an ideal center-to-center position)
between receiver and transmitter coils. This issue is, to a certain degree, mitigated by an [ARC mode] feature,
which improves the spatial freedom of the charging.
The LED D9 is blinking means that some power is transferred, but the amount is insufficient, or the transfer is
unstable. One of the reasons for such instability may be the communication issue between the power transmitter
and the power receiver. The instability may as well be caused by one of the protections (OVP, OCP, OTP) being
triggered.
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Graphical user interface (GUI)
4
Graphical user interface (GUI)
STWLC99 (and other ST’s wireless charging devices) can be configured using STCHARGE Wireless Power
Studio GUI (STSW-WPSTUDIO). The GUI can also be used to control, monitor, and program the device.
For more information, please refer to the STCHARGE Wireless Power Studio User Manual.
4.1
Connecting STWLC99 to PC GUI
To connect the board to a PC, you will need a USB to I2C converter. ST offers STEVAL-USBI2CFT converter
board for this purpose.
Step 1.
Connect the STEVAL-WLC99RX SDA, SCL and GND signals to the SDA, SCL, and GND pins of the
converter board. Continue by connecting the converter board to your PC. The red PWR LED on the
converter board indicates that the converter is powered.
Step 2.
Power the STWLC99 before connecting to the GUI, this can be done in one of the following ways:
a. Placing it onto a power transmitter, the device operates in Rx mode
b. Switching it into DC mode by connecting a DC power supply to the STWLC99 VOUT pin. The
voltage must be higher than 3 V
c. Switching it into DC mode by connecting the STWLC99 Vout signal to the VBUS pin of the
converter board
Note:
Step 3.
Please note that Rx registers will be available only if device is operating in Rx mode, DC mode is
used mainly for updating patch and configuration file.
Click the Connection tab in the top menu.
Up to two devices can be connected at a time (one power receiver and one power transmitter).
Figure 5. PC GUI main screen
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Graphical user interface (GUI)
Step 4.
Select WLC99 as the Rx and click the Connection icon on the right side of the pop-up window. Once
the device is successfully connected, “Disconnected” label will change to “Connected”. If connection
was unsuccessful, an error message with a description will be displayed.
Figure 6. GUI device selection and connection
4.2
Patch and configuration files
Firmware of the device can be updated using a Patch file (a binary file in .memh format). The latest version of the
Patch can be found at STWLC99. Updating the firmware is not required but may improve the performance of the
board.
The device can be configured using a Configuration file, a binary file containing the settings of most registers,
which can be found in the GUI. The GUI can also be used to generate a custom Configuration file, making it
easier to quickly change configuration of the board and/or transfer the configuration to another board.
Modifications to the registers colored in RED will only take effect if a configuration file is generated and written
into device. Modifications to the registers colored in BLACK will take effect immediately and can be saved to
configuration file. During power-up, those registers are set to values defined in configuration file written in the
device. Registers which cannot be saved to configuration file and their value is lost upon reboot have this fact
noted in the description.
4.3
Configuration file generation
Only STSW-WPSTUDIO facilitates the generation of the configuration file.
UM3262 - Rev 1
Step 1.
First check that the device is operating in Rx mode. To make sure that the latest values are shown in
GUI it is recommended to use Read [RX]WLC99 button to dump values from device to GUI. Then the
required changes of register may be made. This shall be done especially when going from DC mode to
Rx mode.
Step 2.
Make required changes to registers. Every change must be confirmed by "W" button next to modified
register.
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Graphical user interface (GUI)
Step 3.
Click the Save [RX]button in the Rx registers tab or Communication tab.
Figure 7. Save Rx button to generate config file
Step 4.
Enter Configuration ID number (used for version control) and press OK.
Figure 8. Configuration ID field for version control
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Graphical user interface (GUI)
Step 5.
Note:
Choose your location for the save file. After choosing a location, the configuration will be saved as
a .memh file in the selected folder.
Modifications to registers colored in red only take effect if the configuration file is generated first and
then uploaded to the device. Those changes are preserved upon reboot.
Figure 9. Location to save the file
4.4
Header file
The GUI can also be used to generate a Header file, a binary .h file containing both Configuration and Patch files.
The Header file makes programming the device using a host MCU easier, as both Configuration and Patch can be
loaded at once by simply including the Header file in the host code.
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Graphical user interface (GUI)
4.5
Header file generation
A custom Header file can be generated in the Header Generator tab.
Step 1.
Start by selecting WLC99 in the top menu.
Figure 10. Header file generator device selection
Step 2.
Continue by selecting the patch and configuration files. Fill patch ID, config ID is filled automatically.
Figure 11. Memh file selection and patch version filling
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Graphical user interface (GUI)
Step 3.
Press Generate. A pop-up window appears, asking to confirm you have selected the correct patch
version.
Figure 12. Confirmation of patch version
Step 4.
Choose a save destination. After choosing a location, the header file will be saved as a .h file in the
selected folder.
Figure 13. Location to save header file
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Graphical user interface (GUI)
4.6
Programming the device
To program the device, the device must be switched into a so-called DC mode. Before switching to DC mode, first
make sure that power transfer is not active. The simplest way to achieve this is to either remove the receiver from
the transmitter or to power down the transmitter.
To enter DC mode, connect a DC power supply to the VOUT pins. The voltage must be higher than 3 V.
The device can be programmed in the following ways:
•
By using a header file that simultaneously loads the configuration and patch files
Step 1.
To load the Header file using the GUI, navigate to the Programming tab in the side menu.
Step 2.
Select WLC99 in the top menu and HEADER in the toggle selector.
Figure 14. Writing the header file to the device
Step 3.
Select the .h file which you want to write. The GUI will automatically identify the patch and configuration
files included in the header file.
Step 4.
Press the Write button to write the header file into the device.
•
By loading the two memh files separately
Step 1.
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To load the memh files (patch and configuration) using the GUI, navigate to the Programming tab in
the side menu.
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Graphical user interface (GUI)
Step 2.
Select WLC99 in the top menu and MEMH in the toggle selector.
Figure 15. Writing the memh files to the device
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Step 3.
Select the patch and configuration files you want to write.
Step 4.
Press the Write button to write .memh files into the device
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Device description and operation
5
Device description and operation
5.1
System block diagram
Figure 16. STWLC99 system block diagram
5.2
Integrated power rectifier
The synchronous rectifier is a key block in charge of converting the AC power signal from the receiving coil into a
DC supply rail for the following linear regulator. The rectifier consists of four N-channel MOSFET transistors
arranged into an H-bridge, conveniently driven by a control block that monitors the voltage at the AC1 and AC2
pins to optimize the switching. Different driving schemes for the rectifier switches are possible. The MCU core
dynamically selects the optimal one to maximize the overall efficiency as a function of the operating point.
When designing the filtering capacitor at the output of the synchronous rectifier, keep in mind that the capacitance
value should be designed large enough to minimize the residual AC voltage ripple and to provide sufficient energy
storage to sustain load transients and prevent the transients from impacting the ASK communication with the
transmitter.
Iload
To maintain rectifier stability and communication clarity providing a certain minimal load to the rectifier is
recommended. STWLC99 is equipped with Iload function, which draws sufficient current from the rectifier when
the load current is too small.
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Device description and operation
The Iload current value is fixed to 24 mA by default, and the function cannot be disabled in the GUI. However, the
Iload current value can be adjusted in the GUI in RX ILOAD BALAST register from 8 mA to 120 mA. The Iload is
enabled (drawing current) until output current reaches threshold (RX ILOAD DLOAD THRESHOLD), then Iload is
disabled. When output current falls below RX ILOAD DLOAD THRESHOLD – HYSTERESIS, Iload is enabled
again. Hysteresis has a fixed value of 40 mA.
5.3
Internal ADC channel monitor
STWLC99 allows the user to monitor key operational parameters using an internal ADC. Instantaneous values
can be displayed in the Charts tab of the GUI. Up to four graphs can be displayed at a time.
Figure 17. PC GUI charts
In addition to the values, which can be plotted in a graph, STWLC99 ADC is also measuring other signals as well
as external ADC inputs. Those values can be found in the GUI in Common registers -> Mode monitor.
5.3.1
ADCIN/EXTMP
This external ADC input is used to monitor temperature with help of an external temperature sensor (NTC). This
value is stored in a register labeled EXTMP. The GUI is always converting and displaying the value of this register
in mV. If external host MCU is used, it can read the value of this register and convert to volts using the following
formula:
EXTM_Voltage V =
RegisterValue
⋅ 1.35
211
0.25 ⋅ 16
Take note that the maximum voltage applied to this input shall not exceed 5 V. NTC over temperature protection is
monitoring this input, please find more information in the relevant section.
5.3.2
ADCIN2
This external ADC can be used for any purpose the application may require. Take note that the maximum voltage
applied to this input shall not exceed 5 V. This input is scanned periodically, and the value is stored in ADC IN
register. There is no action/protection tied to this register.
The GUI is always converting and displaying the value of this register in mV. If external host MCU is used, it can
read value of this register and convert to volts using the following formula:
ADCIN2_Voltage V =
UM3262 - Rev 1
RegisterValue
⋅ 1.35
211
0.25 ⋅ 16
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Device description and operation
5.4
Main LDO Regulator
The main LDO regulates the rectified voltage to a target value specified by user. The output voltage is
configurable in 3.5 V to 20 V range with a 25 mV step. The target value can be easily changed in the GUI (Rx
Configuration -> RX VOUT SET register) or by an external host controller. Default value is set to 5 V.
LDO Drop curve is set to define voltage margin across output current for main LDO regulation. This configuration
is tradeoff between efficiency and output voltage stability. For more details refer to Section 7.3: LDO configuration.
5.4.1
Regulation loops and protections
The main LDO regulator is equipped with two loops:
1. Input voltage loop (IVL): when the Vrect voltage falls below a set threshold, the Vout is temporarily limited until
the Vrect rises above the threshold again. The default threshold for this protection is 3.5 V but it can be set
from 3.5 V to 11 V in 0.5 V steps.
2. Output current loop (OCL): when the output current rises above set threshold, OCL can limit out value to
maintain output current below set threshold or trigger over current protection. The threshold can be adjusted
from 0.1 to 5.4 A.
There are also other protections related to main LDO, please refer to Section 5.10: Protections Overview.
5.4.2
Dload
To guarantee stability of the main LDO regulation loop, the device features dummy load (also known as dload)
connected between output of the main LDO and ground. Dload acts as a constant current load with a fixed 1 mA
load value. The Dload is enabled (drawing current) until output current reaches a set threshold (RX ILOAD
DLOAD THRESHOLD), then Dload is disabled. When output current falls below RX ILOAD DLOAD THRESHOLD
– HYSTERESIS, Dload is enabled again. Hysteresis has a fixed value of 40 mA.
5.5
Output current sensing
STWLC99 uses an external sense resistor to measure output current. Output current value is displayed in Charts
or in Mode monitor in ICUR register.
Please note that whenever output voltage falls below 3 V, output current sensing is deactivated and will report
0 mA as current value.
5.6
UVLO
STWLC99 is also equipped with a UVLO function. The UVLO is triggered when the digital core input voltage
(VRECT) drops below 3 V, which results in the device being powered down. Normal operation is resumed as soon
as the input voltage rises above 3 V.
Note:
UM3262 - Rev 1
This protection ensures that the core is powered by a sufficiently high voltage. Not to be confused with VOUT
UVLO, which will be described later.
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Device description and operation
5.7
Chip Enable
The device can be disabled (forced into reset state) by the WL_CTRL signal. During reset, AC1 and AC2 signals
are connected to ground (coil is shorted) to protect the device.
The WLPOLSEL signal level determines polarity of the WL_CTRL signal. If the WL_CTRL signal level matches
with the WLPOLSEL signal level, the device is enabled. Otherwise, the device is disabled. For more details,
please refer to the table below. LOW state means pulling the signal to ground, HIGH means pulling the signal to
1.8 V.
Table 3. WL_CTRL and WPOLSEL logic table
WL_CTRL
WLPOLSEL
Device state
LOW
LOW
Enable
LOW
HIGH
Disable
HIGH
LOW
Disable
HIGH
HIGH
Enable
Placing a power receiver with a shorted coil on the power transmitter will cause high current spikes in the
transmitter coil. An alternative way to ensure that power transfer will not start is to use a GPIO function called
IN_RX_DIS_COM (refer to Section 5.19: GPIOx and INTB pins). This function will disable ASK communication of
STWLC99. Since the power receiver must respond to the power transmitter in order to establish power transfer,
power transfer will not start.
5.8
Power Up Sequence
When the device is placed onto a power transmitter, and both Patch and Configuration files are loaded into the
device, the device will initiate communication with the transmitter and, after all the necessary steps described by
the Qi specification are completed, power transfer is established.
If Patch and/or Configuration files are not loaded, the device will not initialize the communication, therefore power
transfer will not be established. Please refer to Section 4.6: Programming the device for device programming
instructions. The communication will also not be initialized if either the Patch or Configuration or both files are
corrupted.
During the initial phase of the power transfer STWLC99 operates in ARC mode, ST’s proprietary mode, which
makes the power-up sequence smoother and more reliable. For more information see Section 5.16: Adaptive
Rectifier Configuration (ARC) Mode.
Once the VRECT voltage rises high enough, the internal power management system starts operating. The digital
core is powered up and ready to control the internal circuitry. Default device settings are used until the digital core
is woken up after which the firmware loads settings saved in the Configuration file. The device is now ready to
operate.
5.8.1
VOUT soft start
Once power transfer is established properly and VRECT voltage reaches the target value, power output is
enabled, connecting the load to the device. To eliminate high current spikes during load connection STWLC99 is
equipped with soft start functionality. Soft start limits the output current by lowering output voltage accordingly for
a certain time period once Vout is enabled. The output current limit is fixed to 200 mA during soft start and it’s
duration can be adjusted by RX VOUT SOFT START TIMER with respect to the following formula:
soft_start_duration ms = RX_VOUT_SET
* RX_VOUT_SOFT_START_TIMER
25
where:
•
•
•
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soft_start_duration is time duration of active soft start after Vout is enabled in ms
RX_VOUT_SET is value of Vout set in appropriate register (RX VOUT SET) in V
RX_VOUT_SOFT_START_TIMER is adjustable value in default units µs
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Device description and operation
Figure 18. Register for soft start period adjustment
For example, configuration with RX VOUT SET set to 5 V and RX VOUT SOFT START TIMER set to 63 µs will
result in 12.6 ms soft start duration. Example waveform with these settings is shown below.
Figure 19. Example of Vout soft start behavior with Vout set to 5 V and connected 9R resistive load
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Device description and operation
5.9
LDOs
The device is equipped with 2 internal low drop-out regulators (LDOs) – a 5 V and 1.8 V one, with the latter
deriving its power from the former.
The 1.8 V LDO powers the digital part of the IC, while the 5 V LDO powers the analog part of the IC but can also
be used to power external low-power circuitry (such as LEDs). The maximum current externally drawn from this
LDOs shall not exceed 100 mA.
External LDO capacitors should be placed as close to the IC as possible.
STWLC99 is most often being used in high power applications with output voltage close to 20 V. Deriving the 5 V
necessary for the internal circuitry may cause temperature rise in the device because of the power dissipated on
the internal LDO. To prevent this, external 5 V source can be used to supply the internal 5 V power rail. Please
refer guide in Section 7.4: External 5V provision.
5.10
Protections Overview
STEVAL-WLC99RX board uses both hardware and firmware protections to ensure safe operation of both the
device and the board. The purpose of these protections is to avoid damage caused by unexpected operating
conditions – over-voltage and/or over-current. Temperature is monitored as well – the device is equipped with
both internal temperature sensor and pins for external NTC connection.
Protections can be configured in the GUI and changes will be applied only if configuration file is generated and
programmed into the device. Each protection can also be configured to disable the device’s output and force the
receiver to send an EPT packet when triggered. If a transmitter receives this packet, it shall terminate power
transfer immediately.
As mentioned above protections are divided into two groups: hardware operated protections and firmwarecontrolled protections. Hardware protections are, in general, faster but have limited threshold settings in terms of
step size. In comparison firmware protections are using ADC sampled data and offer finer threshold setting but
their trigger time is slower. According to best practice lower threshold is usually set for firmware protection which
should in first place rise interrupt to inform host MCU and in case of deterioration of the condition hardware
protection can protect device with a stronger action (for example grounding AC1/AC2).
Below is overview of available protections. Detail description about each protection follows.
Over-voltage protections (OVP)
•
Fast Over-Voltage Protection (FOVP)
–
•
Protects the device against excessive rectifier voltage (VRECT) during the ping phase (first few
milliseconds after the power-up)
–
The threshold is set to 18 V and protection is released when the rectifier voltage drops below 13 V.
–
Gets disabled after the digital part of the device is powered up and before device is started with
OVPH properly activated
–
When triggered, AC1 and AC2 pins of the device are shorted to ground
–
Cannot be disabled, and the threshold cannot be adjusted
Two stage Soft Over-Voltage Protection (OVPS)
–
•
Connects external resistors between the VRECT node and ground when triggered. This causes the
VRECT voltage to drop, without dropping low enough to lose communication with the transmitter.
–
Released when Vrect drops by hysteresis value.
–
Hardware operated.
–
Can be configured to disable VOUT when triggered
–
Can also be configured to force the receiver to send EPT packet when triggered
–
The threshold of this protection is programmable from 22.5 V to 25 V
Hard Over-Voltage Protection (OVPH)
–
–
–
–
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Shorts AC1 and AC2 pins to ground when triggered, released when Vrect drops by hysteresis value.
Hardware operated
This protection can be configured to disable VOUT when triggered
The threshold of this protection is programmable 25V, 25.5V, 26V, 26.5V
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Device description and operation
•
Firmware Over-Voltage protection (ADC OVP)
•
–
This protection monitors Vrect voltage
–
This protection can be configured to disable VOUT when triggered
–
The protection can also be configured to force the receiver to send EPT packet when triggered
–
The threshold of this protection can be set in range of 0 to 25.5 V in 0.1 V step
Output Over-Voltage protection (VOUT OVP)
•
–
This protection is monitoring output voltage and has fixed threshold of 21 V
–
Hardware operated
–
This protection can be configured to disable VOUT when triggered
–
The protection can also be configured to force the receiver to send EPT packet when triggered
Input voltage loop (IVL)
–
•
Monitors the rectifier voltage and limits VOUT when VRECT drops below a set threshold. The
threshold can be set from 3 to 11 V with a 0.5 V step. The default value is 4 V.
Output Under-Voltage protection (VOUT UVLO)
–
–
–
–
–
Monitors the VRECT voltage and sets the interrupt bit when the VRECT voltage drops below a set
threshold.
Hardware operated
Can be configured to disable the output when Vout drops below a set threshold.
Can also be configured to send EPT packet.
The threshold can be set from 3.5 to 7.25 V with a 0.25 V step
Over-current protections (OCP)
•
Output current loop (OCL) with Over-Current protection (OCP)
–
–
–
Monitors the output current
If OCP is disabled, after output current reaches OCL threshold, main LDO will lower output voltage to
maintain output current below OCL threshold
If OCP is enabled, after reaching OCL threshold OCP interrupt bit is set and:
•
◦
OCP can be configured to also disable VOUT when triggered
◦
OCP can also be configured to force the receiver to send EPT packet when triggered
–
The threshold can be set from 0 to 5.4 A with 0.1 A step
Firmware Over-Current protection (ADC OCP)
•
–
Monitors the output current
–
Can be configured to disable VOUT when triggered
–
Can also be configured to force the receiver to send EPT packet when triggered
–
The threshold can be set from 0 to 5.4 A with a 0.1 A step
VOUT short protection (SCP)
–
–
–
Monitors if VOUT is shorted
Can be configured to disable VOUT when triggered
Can also be configured to force the receiver to send EPT packet when triggered
Over-temperature protections (OVTP)
•
Hardware thermal shutdown (TSHUT)
•
–
Monitors internal chip temperature
–
Can be configured to disable VOUT when triggered
–
Shorts AC1 and AC2 pins to ground when triggered
–
Internal temperature threshold can be set from 105 to 135 °C with a 10 °C step.
Firmware Over-Temperature protection (ADC OVTP)
–
–
–
–
UM3262 - Rev 1
Senses internal chip temperature
Can be configured to disable VOUT when triggered
Can also be configured to force the receiver to send EPT packet when triggered
The threshold can be set from 0 °C to 200 °C with a 0.1 °C step.
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Device description and operation
•
Firmware NTC Over-Temperature protection (ADC NTC)
–
–
–
–
5.10.1
Senses NTC voltage, usually used for coil temperature monitoring
Can be configured to disable VOUT when triggered
Can also be configured to force the receiver to send EPT packet when triggered
Threshold can be set from 0 V to 5 V with a 1 mV step.
Two-stage soft over-voltage protection (OVPS)
OVPS protects the device against excessive rectifier voltage. When VRECT rises above a set threshold, the
device will try to lower its value by connecting external power resistors (labeled IEXT) from VRECT to ground
through internal transistors. This approach should achieve lowering the rectifier voltage without losing
communication with the transmitter. Therefore, triggering this protection does not necessarily lead to regulation
failure or power transfer termination. The protection can also be configured to disable the output and/or force the
receiver to send EPT packet when triggered.
This protection has two stages - SOVP 1 and SOVP 2. SOVP 1 is triggered first, and if the VRECT voltage
continues to rise, SOVP 2 is triggered as well. (SOVP 1 must have lower threshold than SOVP 2):
•
•
SOVP 1: threshold can set either 24V, 23.5V, 23V, 22.5V
SOVP 2: threshold can set either 25V, 24.5V, 24V, 23.5V
Both stages are released after VRECT voltage falls below “SOVP 1 threshold – 1 V"
Figure 20. Two-stage OVPS protection threshold setting
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Device description and operation
Figure 21. Two-stage OVPS protection settings
5.10.2
Hard over-voltage protection (OVPH)
OVPH is the fastest (hardware) over-voltage protection, which prevents the rectifier voltage from rising above a
safe level. Triggering the protection causes the device to short AC1 and AC2 to ground, effectively shorting the
receiving coil. This protection should be used as the last measure, as shorting the receiving coil will cause the
transmitter current to rise dramatically. Therefore, the OVPH threshold should be set higher than any other overvoltage protection (but still lower than AMR listed in the datasheet).
The threshold value can be set to either 25.0V, 25.5V, 26.0V, 26.5V.
The release value is fixed to 19 V.
Figure 22. OVPH protection threshold setting
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Device description and operation
Figure 23. OVPH protection setting
Figure 24. Hard overvoltage protection (OVPH)
Typical voltage waveforms of AC1, AC2 (rectifier input) signals and Vrect (rectifier output) signal while the
protection is engaged: Cursors show Vrect voltage levels for protection engagement and disengagement.
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Device description and operation
5.10.3
Firmware over-voltage protection (ADC OVP)
ADC OVP is the slowest over-voltage protection monitoring the ADC sampled Vrect voltage. Therefore, it is
recommended to set its threshold as the lowest among the available over-voltage protections. It monitors the
rectifier voltage and can be configured to disable the device’s output and/or force the receiver to send an EPT
packet when triggered. The threshold can be adjusted from 0 to 25.5 V with a 0.1 V step.
Figure 25. ADC OVP protection threshold setting
Figure 26. ADC OVP protection setting
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Device description and operation
5.10.4
Output over-voltage protection (VOUT OVP)
Vout OVP is hardware over-voltage protection monitoring the Vout voltage. The threshold is fixed to 21 V and
cannot be changed. This protection can be configured to disable Vout and/or send EPT when triggered.
Figure 27. VOUT OVP protection setting
5.10.5
Input voltage loop (IVL)
Input voltage loop monitors the rectifier voltage and limits VOUT when VRECT drops below a set threshold. By
limiting VOUT, the output power is lowered as well and VRECT can rise to the threshold value.
The threshold can be set from 3.5 V to 11 V with a 0.5 V step by RX IVL THRES register. This protection is used
in situations where the power delivered from the power transmitter is insufficient in respect to the load. In such
cases, VRECT would drop below the UVLO threshold, causing STWLC99 digital core to be powered down and
power transfer to be terminated.
Example waveform of IVL functionality is shown in Figure 29. Example waveform when IVL is activated, when
power transmitter is transmitting the maximum power and the load on the power receiver is increased further,
which causes Vrect to drop. To prevent Vrect from falling below the RX IVL THRES, the Vout voltage is lowered,
effectively lowering the output power.
Please note that the setting of this feature is located in the Rx Configuration tab, rather than the Rx Protections
tab.
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Device description and operation
Figure 28. Input voltage loop threshold setting and enable option
Figure 29. Example waveform when IVL is activated
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Device description and operation
5.10.6
Output under-voltage protection (VOUT UVLO)
UVLO is a hardware operated protection which is monitoring the output voltage (Vout). Once Vout falls below a
given threshold, UVLO is triggered. It can be configured to disable the device’s output and/or force the receiver to
send an EPT packet when triggered. The threshold can be set from 3.5 V to 7.25 V.
Figure 30. VOUT UVLO protection threshold setting
Figure 31. VOUT UVLO protection settings
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Device description and operation
5.10.7
Output current loop (OCL) with over-current protection (OCP)
STWLC99 is equipped with an output current loop feature with a current threshold. Once the threshold is reached,
this feature starts to limit (lower) the Vout voltage to maintain output current equal or below the threshold.
Threshold can be set from 0 to 5.4 A with 0.1 A step in RX OCL THRES register.
The hardware OCP protection is tied to the OCL feature and also shares threshold with it. This protection can
generate interrupt, disable STWLC99 output and/or send EPT. Be aware, to enable OCP you have to enable OCL
first. Please find below the table with configuration combinations.
Table 4. Description of OCP protection behavior for combinations of all related setting registers
RX OCL EN
RX OCP EN
PROT
RX OCP VOUT
OFF
RX OCP EPT
Reaction if reaching threshold (RX OCL
THRES)
ENABLE(1)
DISABLE
X
X
When threshold is reached, main LDO will limit
(lower) output voltage to maintain output current
not exceeding the threshold.
ENABLE(1)
ENABLE(1)
DISABLE
DISABLE
When threshold is reached, main LDO will limit
(lower) output voltage to maintain output current
not exceeding the threshold. OCP will trigger
interrupt (depending on interrupt settings)
ENABLE(1)
ENABLE(1)
ENABLE(1)
DISABLE
When threshold is reached, OCP will turn off Vout,
it also can trigger interrupt (depending on interrupt
settings).
ENABLE(1)
ENABLE(1)
DISABLE
ENABLE(1)
When threshold is reached, main LDO lowers
output voltage to maintain output current below the
threshold and OCP will send EPT, it also can
trigger interrupt (depending on interrupt settings).
ENABLE(1)
ENABLE
ENABLE(1)
ENABLE(1)
When threshold is reached, OCP will send EPT
and turn off Vout, it also can trigger interrupt
(depending on interrupt settings).
DISABLE(1)
X
X
X
Nothing will happen
1. ”ENABLE” stands for log. 1 in given register, “DISABLE” stands for 0 in given register, “X” stand for does not matter.
As mentioned above, threshold of this OCP protection is shared with the OCL functionality. Please note that OCL
threshold is located in the Rx Configuration tab, rather than the Rx Protections tab.
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Device description and operation
Figure 32. Threshold setting for over current protection
Figure 33. OCP protection setting
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Device description and operation
5.10.8
Firmware over current protection (ADC OCP)
The firmware OCP threshold can be adjusted from 0 to 5.4 A with 0.1 A step. It can also be configured to disable
the device’s output and/or force the receiver to send an EPT packet when triggered. This protection is
independent of OCL functionality.
ADC sample value of current used by firmware OCP is for user accessible in Common Registers->Mode Monitor>ICUR.
Figure 34. ADC OCP protection threshold setting
Figure 35. ADC OCP protection setting
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Device description and operation
5.10.9
Hardware thermal shutdown (TSHUT)
The hardware OVTP (called TSHUT) monitors the internal temperature of STWLC99. Once the protection
threshold is reached, the AC1 and AC2 pins are shorted to ground effectively shorting the receiver coil. The
default threshold value is set to 135 °C, however the threshold can be adjusted in the GUI (possible options:
105 °C, 115 °C, 125 °C, 135 °C). To release the protection, temperature must fall to 10 °C below threshold. This
protection can be configured to also disable the device output when triggered.
Figure 36. TSHUT protection threshold setting
Figure 37. TSHUT protection setting
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Device description and operation
5.10.10
Firmware Over-Temperature protection (ADC OVTP)
The firmware OVTP can be adjusted from 0 °C to 200 °C (with a 0.1 °C step) and can be accessed in the GUI or
by a host controller. This protection can also be configured to disable the device’s output and/or force the receiver
to send an EPT packet when triggered.
Figure 38. ADC OVTP protection threshold setting
Figure 39. ADC OVTP protection setting
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Device description and operation
5.10.11
Firmware NTC Over-Temperature protection (ADC NTC)
An external NTC can be used to further monitor the operational temperature of the board. The user may choose a
component/board region to be monitored by placing the NTC on it/nearby, although monitoring the receiving coil is
presumably the most common practice.
Together with a pull-up resistor the NTC forms a voltage divider, which is connected to the STWLC99 NTC pin. It
is recommended to design the voltage divider (from 5 V voltage rail) to reach the (low) NTC threshold at the
highest allowed temperature.
Firmware operated NTC protection has a selectable threshold from 0 to 5 V with step of 1 mV. This threshold is
compared with the voltage fed by the NTC voltage divider to EXTMP pin. The protection is triggered when
EXTMP voltage falls below the protection threshold. This protection can be configured to rise interrupt and/or turn
off output and/or send EPT.
Figure 40. ADC NTC protection threshold setting
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Device description and operation
Figure 41. ADC NTC protection setting
5.11
Foreign Object Detection (FOD)
Foreign object is any object placed either on or near the transmitting coil, which is not considered a valid wireless
power receiver and is magnetically susceptible. Presence of the magnetic field generated by the transmitting coil
may cause eddy currents to form in the foreign object (such as coins, keys etc.), which in turn would heat the
object to potentially dangerous temperatures. To avoid possible damage to the device or even injury of the user,
the power transmitter must be able to detect presence of a foreign object. This detection can be implemented in
several different ways.
One of the most common way is estimating the amount of power lost in the system. The power receiver indicates
the total amount of received power from the power transmitter. This power consists of power available to the load
and power loss which occurs on the supporting circuitry. Power loss on the power receiver side may include:
•
•
•
•
•
the power loss in the receiving coil and series resonant capacitors,
the power loss in the rectifier,
the power loss in the post-regulation stage,
the power loss in tracks and cables,
and others.
A high power loss value could indicate presence of a foreign object.
STWLC99 uses precise internal AD converters to perform voltage and current measurements and a 32-bit
arithmetic to keep sufficient accuracy. STWLC99 then uses the measured values to create a mathematical model
to estimate the received power, which are then sent to the power transmitter for evaluation.
For more information regarding FOD please refer to the Qi specification, guide shown later in this document and
STSC FOD tuning application note.
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Device description and operation
5.12
WPC Qi Compliant Power Transfer Basics
The flowchart in the figure below shows steps required to reach power transfer in the Baseline Power Profile
(BPP) according to Qi 1.3.
Figure 42. Qi Baseline power Profile (BPP) flowchart
•
•
•
•
Selection: is the default state in which the power transmitter periodically scans its wireless power interface
for a potential power receiver. When a suitable power receiver is detected, the power transmitter proceeds
to the (digital) ping phase.
Digital ping: this phase is an interrogation session during which is the potential power receiver expected to
reply through amplitude shift-keying (ASK) modulation as defined by the Qi specification. After a valid
power receiver is detected, the transmitter proceeds to the Identification & Configuration phase.
Identification & Configuration: this phase is aiming to identify the receiver and to gather information
necessary for a stable and reliable power transfer, such as the maximum power or FSK communication
parameters. After receiving the information, the power transmitter creates a Power transfer contract,
basically a summary of the operational parameters. After the power receiver is identified and the power
transfer is created, the power transmitter proceeds to the power transfer itself.
Power transfer: this is the final step. The power transmitter initially increases and subsequently modulates
the transmitted power in response to control (feedback) data from the receiver. The receiver periodically
sends information to the power transmitter, such as required power (CEP), received power (RPP) etc.
which are used to maintain a closed control loop. If a critical event (e. g. over-voltage, over-current or overtemperature) occurs, the power transmitter shall terminate the power transfer immediately.
Important notes:
•
•
•
UM3262 - Rev 1
Changing the output voltage must respect the overall system design (selected coil, transmitter type etc.).
Output load transient response strongly depends on correct output capacitors design. Severe load
transients may lead to temporary output voltage collapse due to the overall TX-RX response time.
The initial load at power-up should not exceed 2.5 W, instead it should be ramped up smoothly to full power
after power transfer is established.
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Device description and operation
5.12.1
Wireless power interface
Wireless power interface is the area in which power transfer takes place. It consists of two parts – the transmitter
(primary) power interface and the receiver (secondary) power interface. The main component of the interfaces is
the transmitting/receiving coil. The user should avoid placing any objects which are magnetically active, yet are
not required for the power transfer itself, on or near the wireless power interface in order to avoid possible
damage or injury (see Section 5.11: Foreign Object Detection (FOD)). Detection of a valid receiver on the primary
wireless power interface is performed by two so-called pings – analog and digital.
Analog ping is a short burst generated by the power transmitter. The power transmitter then evaluates if the
resonant frequency and/or resonant circuit capacitance changed, as such change might indicate presence of a
potential power receiver. However, the burst does not carry sufficient energy to wake the power receiver.
Digital ping is a more energetic burst of power generated by the transmitter; its parameters are defined by the Qi
specification. The target of this burst is to generate enough power for the receiver to establish communication
between the transmitter and the receiver.
The Qi specification defines a specific way the receiver is expected to answer the digital ping. The reason is that
only a proper answer can inform the transmitter that a valid power receiver was placed on the wireless power
interface.
5.13
Bidirectional communication
The amount of power transmitted is (from a control standpoint) fully dependent on the operating conditions of the
power transmitter (i. e. its bridge voltage, operating frequency and duty cycle).
Since there is no direct electrical feedback from the load (system output) to the power transmitter, the power
receiver must establish communication with the power transmitter to provide this feedback instead.
To match load requirements and prevent excessive power transmission, the power receiver communicates to the
power transmitter the required power level using amplitude shift keying (ASK). This is done by the receiver
modulating the amount of power it draws from the power signal. The transmitter detects this as a modulation of
the voltage across and/or current through the transmitting coil and adjusts its operating conditions accordingly.
The power transmitter can communicate to the receiver as well, this time using frequency shift keying (FSK). This
is done by the power transmitter directly modulating the power signal. Communication in this direction enables
proprietary communication.
5.13.1
ASK communication
A state (either High or Low) is characterized by the amplitude being constant (with a certain variation Δ) for at
least 150 μs.
If the power receiver and the power transmitter coils are properly aligned, then for all appropriate loads at least
one of the following three conditions shall apply.
•
•
•
UM3262 - Rev 1
The difference of the amplitude of the transmitter coil current in the high and low state is at least 15 mA.
The difference of the amplitude of the transmitter coil voltage in the high and low state is at least 200 mV.
The difference of the transmitter coil current in the high and low state is at least 15 mA. The transmitter coil
current is measured at instants in time that correspond to one quarter of the cycle of the control signal
driving the half-bridge inverter.
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Device description and operation
Figure 43. HI and LO states in ASK communication
Table 5. HI and LO state parameters
Parameter
Symbol
Value
Unit
Maximum transition time
tT
100
µs
Minimum stable time
tS
150
µs
Current amplitude variation
∆
8
mA
Voltage amplitude variation
∆
110
mV
The power receiver uses a differential bi-phase encoding scheme to modulate the data bits onto the
power signal. The power signal is then demodulated by the power transmitter’s demodulation circuit and the
demodulated signal is processed.
The communication itself is carried out via packets. Each packet consists of 4 parts and each of those parts
consists of several bits/bytes.
Each communication bit is synchronized to the power receiver’s internal 2 kHz clock signal period. A ONE bit is
encoded as two transitions of the power signal, while a ZERO bit is encoded as a single transition.
Figure 44. Example of differential bi-phase encoding scheme
To transmit a single byte of data, the power receiver must send an 11-bit sequence. This sequence consists of a
START bit (ZERO), the 8 data bits of the byte (LSB first), a parity bit and a STOP bit (ONE). The parity is odd,
meaning an even number of ONE bits in the data byte results in the parity bit being equal to ONE, while an odd
number of ONE bits in the data byte results in the parity bit being equal to ZERO. An example of such message
can be seen in the picture below:
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Device description and operation
Figure 45. Example of asynchronous serial format
A packet consists of a preamble, header, message and checksum. The preamble contains 11 to 25 ONE bits and
enables the power transmitter to synchronize with the incoming data. The header, message and checksum are
sequence of three or more bytes. The header indicates the packet type while also implicitly providing the size of
the message. The checksum consists of a single byte. It is calculated as an exclusive-OR of both the header and
message bytes and enables the power transmitter to check for transmission errors.
For a more detailed explanation please refer to the Qi Specification, Section Power Receiver to Power Transmitter
communications interface.
STWLC99 uses integrated low resistance N-channel MOSFET transistors to modulate the power signal. The
internal switches are connected to the COMM1, CLAMP1, COMM2, and CLAMP2 pins. As shown below, these
pins are connected to the AC1 and AC2 nodes through external capacitors, therefore connecting those capacitors
modulates the impedance seen by the coil, which is reflected onto the primary (transmitter) coil as a change in
current and/or voltage.
STWLC99 is also equipped with so called resistive modulation circuit. This type of modulation is using internal
constant current sink (load) to create ASK modulation. This current sink is connected between the Vrect node and
ground and is connected when modulation edge should be created.
From application point of view physical layer of communication is handled by STWLC99 FW. Host MCU only fills
data to relevant register and updates relevant bit which commands STWLC99 to send given data.
Figure 46. ASK modulation capacitors block diagram
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Device description and operation
5.13.2
FSK communication
The power transmitter modulates the power signal by switching between its normal operating frequency fop and its
modulated frequency fmod. The difference between fop and fmod can be described by two parameters: polarity
and depth.
Polarity is given by the difference between fmod and fop – a positive polarity corresponds to a positive difference,
while a negative polarity corresponds to a negative difference.
Depth describes the magnitude of difference between fop and fmod. Please note that a negative polarity results in
a higher induced voltage on the power receiver coil and should therefore be used with care.
Both polarity and depth are set via configuration packet which power receiver sends during establishment of
power contract. Values of polarity and depth contained in configuration packet are defined by Qi specification for
BPP mode.
The FSK communication is executed via packets. Each packet consists of 3 parts – a header, a message and a
checksum. The header is a single byte which indicates the packet type, while also implicitly providing the size of
the message part. The message size can range from 1 up to 27 bytes. The checksum is a single byte which
provides a way to check for transmission errors. It is calculated as an exclusive-OR of the header bytes and the
message bytes.
Each FSK bit is aligned to 512 periods of the power signal. A ONE bit is represented by two transitions over the
512-period slot - the frequency change occurs at the very start of the slot and after 256 power signal periods
pass. A ZERO bit is represented by a single transition (at the start of the 512-period slot).
Figure 47. Example of differential bi-phase encoding
Each data byte is transferred as a sequence of 11-bits. The sequence consists of a start bit (ZERO), the data
byte itself, a parity bit and a stop bit (ONE). The parity used for byte encoding is even – the parity bit set to a ONE
if the data byte contains an odd number of ONE bits. If the data byte contains an even number of ONE bits, the
parity bit is set to a ZERO instead. This encoding scheme is used for all 3 parts of the FSK packet - the header,
message and checksum.
There is also an additional type of message which can be sent from the transmitter to the receiver – a response to
a receiver’s message. A response consists of 8 bits, so the receiver can use quite a simple logic to decode it. The
response can be either Acknowledge (ACK), Not-Acknowledge (NACK), Attention (ATN) or Not-Defined (ND).
ACK is encoded as a series of 8 ONE bits, NACK is encoded as 8 zero bits, ND is encoded as a series of 8 bit of
alternating ZERO and ONE bits (‘10101010’), ATN is encoded as alternating double bits of ZEROS and ONES
('11001100').
FSK response patterns are handled by STWLC99 FW. If any proprietary communication (proprietary message) is
received, it will be available in relevant register and host MCU will be notified by interrupt.
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Device description and operation
Figure 48. Example of different response patterns
For a more detailed explanation please refer to the Qi Specification, Section Power Transmitter to Power Receiver
communications interface.
5.13.3
Most common Qi communication packets
•
•
•
•
•
UM3262 - Rev 1
Control Error Packet (CEP) provides feedback from the power receiver to the power transmitter about the
amount of power required by the load. CEP is a two’s complement signed integer; its maximum range is
-128 to +127. Its value is calculated by the receiver as a portion of the currently transmitted power, by
which the current power level should be increased/decreased. A negative CEP indicates less power is
required, while a positive CEP indicates more power is required. CEP equal to zero indicates no changes
of the operation point are required. This packet is handled automatically by STWLC99 FW.
Received power packet (RPP) value is calculated by the power receiver as a portion of the maximum
power value contained in the configuration packet and is used to inform the transmitter about the amount of
power received by the receiver. This information is mainly used for foreign object detection. This packet is
handled automatically by STWLC99 FW.
Signal strength packet (SS) indicates the degree of coupling between the transmitting and receiving coils.
Its value is an unsigned integer, and it is calculated from the current power/voltage level as a portion of the
maximum expected power/voltage. This packet is handled automatically by STWLC99 FW.
Configuration packet (CFG) provides basic configuration to power transmitter: parameters governing
power transfer, FSK communication parameters and additional capabilities of power receiver. This packet
is sent at the beginning of power transfer, during the configuration step. This packet is handled
automatically by STWLC99 FW.
Proprietary packet (PP) enables sending custom messages between the transmitter and the receiver. Qi
standard defines different proprietary packet types, which can range in length from 1 to 20 bytes.
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Device description and operation
•
End power transfer (EPT) is used by the power receiver to request power transfer termination. The power
transmitter shall terminate the power transfer immediately after receiving an EPT packet. The EPT packet
should contain a message indicating the reason for the termination. The following table lists the codes used
for various reasons.
Table 6. EPT codes and explanation
5.14
Reason
Value
Recommended usage of the values (Informative)
EPT/nul
0x00
Use if none of the other codes is appropriate
EPT/cc
0x01
Charge complete; use to indicate that the battery is full
EPT/if
0x02
Internal fault; use if an internal logic error has been encountered
EPT/ot
0x03
Over-temperature, use if (e.g.) the battery temperature exceeds a limit.
EPT/ov
0x04
Over-voltage; use if a voltage exceeds a limit
EPT/oc
0x05
Over-current; use if the current exceeds a limit
EPT/bf
0x06
Battery failure: use if the battery cannot be charged
EPT/nr
0x08
No response: use if the target operating point cannot be reached
EPT/an
0x0A
Aborted negotiation: use if Power Transfer Contract cannot be negotiated
EPT/rst
0x0B
Restart; use to restart the power transfer
ST super charge (STSC)
STSC (ST Super charge) is a proprietary protocol developed by ST to enable power transfer above 5 W. This
protocol is using Qi specified proprietary packets to exchange the required data between the power transmitter
and the power receiver before increasing transferred power. A quick guide for STSC with the GUI can be found at
the end of this document, detailed information about STSC can be found in a corresponding Application note.
5.15
Sending a proprietary packet from STWLC99 to STWBC2
A proprietary packet can be sent from STWLC99 using the GUI. To send a proprietary packet, navigate to the
Communication section of the Common registers. First enter the message into the MSG SEND register. The
entered data should contain header and the payload, CRC is calculated automatically. After that execute RX
SEND MSG (tick box and press ‘W’ (write)). RX SEND MSG is cleared once operation is completed (press ‘R’ to
update value from device to check). If response from the power transmitter is expected, SEND MSG WAIT RPLY
should be used instead of RX SEND MSG. To be notified when reply is received, enable RX MSG RECVD
interrupt and make sure it is cleared before sending the message (for more information about interrupts, see
Section 5.20: Interrupt registers).
There are two possible options how to enter the data into the MSG SEND register.
The first option is to use the MSG SEND GUI line. However, only the first 11 bytes are accessible through this
method.
Zeroes for unused bytes
Data
Header
An example showing how to format a message with header 0x48 and payload 0xA5 0x01 0x77 0xCE is in the
image below:
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Device description and operation
Figure 49. GUI example message with header 0x48 and payload 0xA5 0x01 0x77 0xCE
The second option is to use the Step sequencer function (available in GUI in left menu), for more information
about this function, please refer to the GUI user manual. This method can access the whole register. Data are
filled by following order: Step sequencer works with two-byte register addresses. To get the correct address refer
to the STWLC99 datasheet. For this example, SEND MSG register starts at address 0x0200. Make sure you are
targeting the correct device (in this case [RX]WLC99) and are using the correct method (in this case Write) from
drop down menus. An example showing how to format a message with header 0x48 and payload 0xA5 0x01 0x77
0xCE is in the image below:
Figure 50. Step sequencer example message with header 0x48 and payload 0xA5 0x01 0x77 0xCE filled in
buffer
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Device description and operation
Send a message, the SEND MSG command must be executed. Its I2C address can be found in the device
datasheet – in this case it is 0x00A0 and it is the 3rd bit.
Figure 51. Step sequencer example - sending filled message
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Device description and operation
5.16
Adaptive Rectifier Configuration (ARC) Mode
ARC mode improves the ping-up and spatial freedom of the system in both X and Y directions during power
transfer, without any change in hardware or optimization of the coil. The feature mode can provide up to 7
additional millimeters of spatial freedom in the 4 basic spatial directions (up/down/left/right). The ARC mode
function can be configured to be deactivated by the firmware after the VRECT voltage rises above a set threshold
(default 10 V); the threshold can be configured in the GUI by the RX ARC THRES register.
If RX ARC EN bit is set to 0, the ARC mode is disabled once FW is initialized during start up without waiting for
Vrect to reach RX ARC THRES.
Figure 52. Startup waveform with ARC mode
ARC mode is a dedicated rectifier setting, which increases spatial freedom of charging. When ARC mode is
deactivated, the rectifier switches to regular full synchronous operation mode.
The table below shows how ARC mode improves the ping up spatial freedom.
Table 7. Improvement of possible Z distance with ARC mode
Distance(1) (mm)
Ping without ARC mode
Ping with ARC mode
0
OK
OK
4
OK
OK
9
OK
OK
12
Cannot ping up
OK
16
Cannot ping up
OK
18
Cannot ping up
OK
19
Cannot ping up
OK
20
Cannot ping up
Cannot ping up
1. Defined as coil to coil surface distance.
UM3262 - Rev 1
page 45/92
UM3262
Device description and operation
5.17
Transmitter (Tx) Mode
One of the main advantages of STWLC99 as a dual wireless power receiver is its ability to also work as a
wireless power transmitter. However, this manual is limited to receiver mode only, therefore wireless transmitter
(RTx) mode details are not going to be covered.
The purpose of the transmitter mode is having a low power transmitter which can charge other products, such as
wearables and other similar products demanding a small amount of charging power.
Figure 53. STEVAL-WLC99RX circuitry for Tx mode
To operate in the transmitter mode, the device requires an external ASK demodulation circuit. The demodulation
circuit can be seen in the figure above (labeled TX mode only). This circuit is essential for ASK communication
demodulation, as communication from the receiver to the transmitter is crucial in establishing a regulation loop.
Note:
5.18
Transmitter mode is not supported by default. Please contact local ST support team if the TX mode
implementation is required.
I2C interface
STWLC99 can operate fully independently i.e., without being interfaced with a host system. In applications in
which STWLC99 is a part of peripherals managed by the host system, the two SDA and SCL pins could be
connected to the existing I2C bus. The device works as an I2C slave and supports standard (100 kbps), fast
(400 kbps) data transfer modes.
The I2CSEL pin is used to select one of two available 7-bit I2C addresses. The address is selected based on the
voltage applied to the pin during power up. A HIGH input to the pin selects address 0x2B, LOW selects address
0x2C.
When the bus is idle, both SDA and SCL lines are pulled HIGH.
5.18.1
Data validity
The data on the SDA line shall remain stable during the high state of every SCL clock pulse. The high and low
states of the SDA line shall only change when the SCL clock signal is low.
5.18.2
Start and stop conditions
Both the SDA and the SCL lines remain high when the I2C bus is not busy. A START condition is indicated by a
high-to-low transition of the SDA line when SCL is HIGH, while the STOP condition is indicated by a low-to-high
transition of the SDA line when SCL is HIGH. A STOP condition must be sent before each START condition.
UM3262 - Rev 1
page 46/92
UM3262
Device description and operation
5.18.3
Byte format
Every byte transferred over the SDA line contains 8 bits. Each byte received by STWLC99 is generally followed
by an acknowledge (ACK) bit. The most significant bit (MSB) is transferred first. A single data bit is transferred
during each clock pulse.
The device generates an ACK signal (by pulling the SDA line low during the acknowledge clock pulse) to confirm
a correct device address or data bytes reception.
5.18.4
Interface protocol
The interface protocol is composed of:
•
•
•
•
•
•
A start condition (START)
A device address + R/W bit (read =1 / write =0)
A register H address byte
A Register L address byte
A sequence of n data bytes (each data byte must be acknowledged by the receiver)
A stop condition (STOP)
The register address byte determines the first register in which the read or write operation takes place. When a
read or write operation is finished, the register address is automatically incremented.
5.18.5
Writing to a single register
Writing to a single register begins with a START condition followed by the device address (7-bit device address
plus R/W bit cleared), two bytes of the register pointer and the data byte to be written in the destination register.
Each transmitted byte is acknowledged by the STWLC99 through an ACK signal.
Figure 54. Writing to single I2C register
UM3262 - Rev 1
page 47/92
UM3262
Device description and operation
5.18.6
Writing to multiple registers with incremental addressing
STWLC99 supports writing to multiple registers with auto-incremental addressing. When data is written into a
register, the register pointer is automatically incremented, therefore transferring data to a set of subsequent
registers (also known as page write) is a straightforward operation.
Figure 55. Writing to multiple I2C registers
5.18.7
Reading from a single register
Reading from a single register begins with a START condition followed by the device address byte (7-bit device
address plus R/W bit cleared) and two bytes of register pointer, then a restart condition is generated and the
device address (7-bit device address plus R/W bit asserted) is sent, followed by data reading. ACK pulse is
generated by STWLC99 at the end of each byte, but not for data bytes retrieved from the register. A STOP
condition is finally generated to terminate the operation.
Figure 56. Reading from single I2C register
5.18.8
Reading from multiple registers with incremental addressing
Similarly, to multiple bytes (page) writing, reading from subsequent registers relies on an auto-increment of the
register: The master can extend data reading to the following registers by generating and an ACK pulse at the
end of each byte. Data reading starts immediately, and the stream is terminated by a NAK at the end of the last
data byte, followed by a STOP condition.
Figure 57. Reading from multiple I2C registers
UM3262 - Rev 1
page 48/92
UM3262
Device description and operation
5.19
GPIOx and INTB pins
STWLC99 is equipped with 7 general purpose input/output pins. These pins can be configured as inputs or
outputs (push-pull or open-drain) and assigned various functions. Some GPIO pins may have predefined special
functions. Assigning different functions can be done in the GUI (Common Registers -> GPIO tab).
Table 8. GPIO pins overview
GPIOx
STEVAL signal label
GPIO0
IO0
Description
General purpose I/O
No special function, any function can be assigned
GPIO1
IO1
General purpose I/O
No special function, any function can be assigned
GPIO2
I2C_SEL
I2C 7-bit address selector (HIGH = 0x2B, LOW = 0x2C), latched upon power
up.
Once FW ready, any function can be assigned
General purpose I/O
GPIO3
PGN
GPIO4
LDOEN
GPIO5
LSEL
Default set as Input. Default function Disable ASK communication (0/LOW =
enable, 1/HIGH = disable). Function can be changed.
GPIO6
INTN
Default set as interrupt pin, function can be changed.
Default set as output, open drain. Default function Power output enabled
(0/LOW = is enabled, 1/HIGH = is disabled). Function can be changed.
General purpose I/O
Default set as Input. Default function Block main LDO (0/LOW = block, 1/HIGH
= unblock). Function can be changed.
General purpose I/O
Table 9. GPIO functions list
UM3262 - Rev 1
Code
Input/Output
Type
0x00
Input
Floating
No special function (GPIO configured as input floating)
0x01
Input
Pull-up
No special function (GPIO configured as input, internal pull-up)
0x02
Input
Pull-down
No special function (GPIO configured as input, internal pull-down)
0x03
Output
Push-pull
No special function (GPIO configured as output drive low)
0x04
Output
Push-pull
No special function (GPIO configured as output drive high)
0x05
Output
0x06
Output
Push-pull
High on firmware ready
0x07
Input
Floating
Block main LDO (output), 0/LOW = block, 1/HIGH = Unblock, if
blocked it cannot be enabled back by firmware or I2C command
0x08
Input
Floating
Disable ASK communication0/LOW = enable, 1/HIGH = disable.
STWLC99 shall be reset to restore ASK communication.
0x09
Output
Open drain
Power output (main LDO) enabled, 0/LOW = is enabled, 1/HIGH =
is disabled
0x0A
Output
Open drain
Power negotiated, 0/LOW = negotiated, 1/HIGH = unnegotiated
Open drain
pull-up
Function
Interrupt (0/LOW = active, 1/HIGH = inactive), internal pull-up
page 49/92
UM3262
Device description and operation
5.20
Interrupt registers
There are 4 bits (enable, clear, latch and status) assigned to each interrupt listed in separate tabs.
The enable tab can be used to either enable the corresponding interrupt (write), or to check whether the interrupt
is already enabled (read). Enable state is updated immediately and can be saved to configuration file.
The latch tab can be used to determine which interrupt has been triggered (read only). After being triggered, the
bit remains set to 1 until cleared by writing a 1 into the corresponding clear register (write only). The clear register
is cleared automatically.
The status tab can be used to determine which interrupt is being triggered at the moment (read only). The status
bit goes back to zero after the triggering condition is removed.
All Clear, Latch and Status register values are lost upon device reboot.
Figure 58. Interrupt settings page
UM3262 - Rev 1
page 50/92
UM3262
Device description and operation
Table 10. Interrupt description
Interrupt label
RX EXT 5V FAULT
Failure during connection or disconnection of external 5 V.
RX MSG RECVD
Proprietary packet received
RX NTC OVTP
Triggered by NTC protection, voltage on EXTMP pin falls below threshold, refer to
Section 5.10.11: Firmware NTC Over-Temperature protection (ADC NTC)
RX OCP
Triggered by OCP protection (Section 5.10.7: Output current loop (OCL) with over-current
protection (OCP)) or ADC OCP protection (Section 5.10.8: Firmware over current protection
(ADC OCP))
RX OUTPUT OFF
Output disabled (main LDO turned off)
RX OUTPUT ON
Output enabled (main LDO turned on)
RX OVP
Any enabled over voltage protection has triggered: OVPS, OVPH, ADC OVP, VOUT OVP. For
more information refer to relevant subsections of Section 5.10: Protections Overview
RX OVTP
Triggered by internal STWLC99 over temperature protection: ADC OVTP
(Section 5.10.10: Firmware Over-Temperature protection (ADC OVTP)) or TSHUT
(Section 5.10.9: Hardware thermal shutdown (TSHUT))
RX SEND PTK TO
RX SIG STR
UM3262 - Rev 1
Description
Response for proprietary packet not received (timeout)
Signal strength packet received, for more information about this packet refer to
Section 5.12: WPC Qi Compliant Power Transfer Basics
RX SYS ERROR
STWLC99 internal error occurred, please in GUI check Common registers -> System error
info tab for more details
RX TX REMOVAL
Power receiver removed from power transmitter or power transmitter removed power. Useful
when STWLC99 power by external 5 V
RX VRECT RDY
Vrect voltage reaches sufficient value for enabling Vout
page 51/92
UM3262 - Rev 1
6
STEVAL-WLC99RX description and operation
6.1
Schematics
Figure 59. STEVAL-WLC99RX schematic diagram
STWLC99JR
UM3262
STEVAL-WLC99RX description and operation
page 52/92
UM3262
STEVAL-WLC99RX description and operation
6.2
Bill of materials
Table 11. STEVAL-WLC99RX bill of materials
Item Q.ty
UM3262 - Rev 1
Ref.
1
13
P2, P4, P5, P6,
P7, P10, P14,
P16, P17, P19,
P20, P21, P22
2
12
CO1, CO2, CO3,
CO4, CR1, CR2,
CR3, CR4, CR5,
CR6, CR7, CR8
3
Part/value
Description
Manufacturer
Order code
Header, 2-Pin
Wurth
61300211121
Capacitor
Samsung
CL31B106KBHNNNE
12
R6, R8, R17, R18,
R20, R25, R29,
N.M.
R30, R31, R32,
R34, R37
Resistor, 1%
N.M.
N.M.
4
9
CS1, CS2, CS3,
CS4, CS5, CS6,
CS7, CS8, CS9
220nF
Capacitor
Samsung
CL10B224KB8NNNC
5
8
R4, R19, R28,
R33, R35, R36,
R38, R39
10k
Resistor, 1%
Uni-Royal
0603WAF1002T5E
6
7
J5, J6, J7, J8, J9,
J10, J11
N.M.
N.M.
7
5
C8, C9, C11,
CO5, CR9
100nF
Capacitor
Wurth
885012206095
8
4
CBT1, CBT2,
CL1, CL2
47nF
Capacitor
Wurth
885012206093
9
3
P24, P26, P27
Header, 3-Pin
Wurth
61300311121
10
3
R11, R13, R14
200R
Resistor, 5%
Panasonic
ERJP06J201V
11
3
CM1, CM2, C4
22nF
Capacitor
Wurth
885012206091
12
2
D1, D2
BAT41, SOD-523
Schottky diode
ST
BAT41KFILM
13
2
D10, D11
Zener/TVS diode
Littlefuse
SMAJ22A
14
2
J1, J2
2mm, banana
connector
Keystone
6057
15
2
P3
Header, 4-Pin
Wurth
61300411121
16
2
R40, R41
4k7
Resistor, 1%
Uni-Royal
0603WAF4701T5E
17
1
C1
470p
Capacitor
Wurth
885012206081
18
1
C3
3.3nF
Wurth
885012206086
19
1
P1
COIL connector
(pad 2 and 3)
N.A.
N.A.
20
1
C6
1.5nF
Capacitor
Wurth
885012206084
21
1
C7
1uF
Capacitor
Wurth
885012206002
22
1
C10
4.7uF
Capacitor
Samsung
CL10A475KO8NNNC
23
1
CBT
4n7
Capacitor
Wurth
885012206087
24
1
COR1
N.M.
Capacitor
N.M.
N.M.
25
1
COR2
N.M.
Capacitor
N.M.
N.M.
26
1
CPAR
8.2nF
Capacitor
Murata
GCM188R71H822KA37D
27
1
D3
Zener/TVS diode
N.M.
N.M.
10uF
page 53/92
UM3262
STEVAL-WLC99RX description and operation
Item Q.ty
UM3262 - Rev 1
Ref.
Part/value
Description
Manufacturer
Order code
28
1
D7
Zener Diode
Rohm
TFZVTR5.1B
29
1
D8
LED, Green
Kingbright
APHD1608LCGCK
30
1
D9
LED, Red
Kingbright
APHD1608LSURCK
31
1
J3
2mm, banana
connector
Keystone
6055
32
1
J4
2mm, banana
connector
Keystone
6056
33
1
P8
Header, 7-Pin
Wurth
61300711121
34
1
P9
Header, 6-Pin
Wurth
61300611121
35
1
P12
Header, 8-Pin
Wurth
61300811121
36
1
P13
Header, 2-Pin
N.M.
Solder-bridge
37
1
Q1
FET Transistor
Diodes
Incorporated
DMP6350S-7
38
1
R1
75R
Resistor, 1%
Uni-Royal
0603WAF750JT5E
39
1
R2
6k8
Resistor, 1%
Uni-Royal
0603WAF6801T5E
40
1
R3
5mR
Resistor, 1%
Bourns
CFN0603AFX-R005ELF
41
1
R5
220k
Resistor, 1%
Uni-Royal
0603WAF2203T5E
42
1
R7
0R
Resistor, 1%
Uni-Royal
0603WAF0000T5E
43
1
R9
30k
Resistor, 1%
Uni-Royal
0603WAF3002T5E
44
1
R12
200R
Resistor, 5%
Panasonic
ERJP06J201V
45
1
R15
100k
Resistor, 1%
Uni-Royal
0603WAF1003T5E
46
1
R26
100R
Resistor, 1%
Uni-Royal
0603WAF1000T5E
47
1
R27
220R
Resistor, 1%
Uni-Royal
0603WAF2200T5E
48
1
U1
U1, WLCSP121
4.859X4.859X0.47
0.4P 0
ST
STWLC99JR
49
4
Standoff
Wurth
970200365
50
1
Glue
Loctite
LOCTITE 454
51
1
Wires
CNC tech
610220
52
1
Plastic spacer
UL-94 V0 or V1
certified material
N.A.
N.A.
53
4
Screw
M3x6mm
Essentra
components
50M030050P006
54
1
COIL
4uH COIL
Luxshare
ICTC-50050-4R0
55
4
Screw with flat
head
M3x8mm flat head
Essentra
components
50M030050I008
M3x20mm
page 54/92
UM3262
STEVAL-WLC99RX description and operation
6.3
STEVAL-WLC99RX coil description
Table 12. Electrical characteristics of the receiver coil
Parameter
Specification
Part number
ICTC-50050-4R0
Vendor
Luxshare-ICT
Inductance (@ 100 kHz)
4.0 +/- 10% uH
DC resistance (DCR)
75mOhm (+/- 10%)
AC resistance (ACR)
95mOhm (+/- 10%)
Figure 60. Mechanical characteristics of the receiver coil
UM3262 - Rev 1
page 55/92
UM3262
STEVAL-WLC99RX description and operation
6.4
STEVAL-WLC99RX PCB layout
Figure 61. STEVAL-WLC99RX PCB layout top layer
Figure 62. STEVAL-WLC99RX PCB layout inner 1 layer
UM3262 - Rev 1
page 56/92
UM3262
STEVAL-WLC99RX description and operation
Figure 63. STEVAL-WLC99RX PCB layout inner 2 layer
Figure 64. STEVAL-WLC99RX PCB layout bottom layer
UM3262 - Rev 1
page 57/92
UM3262
STEVAL-WLC99RX description and operation
6.5
STWLC99 default configuration
Table 13. STWLC99 default configuration
Description
Output voltage (BPP)
5V
Guaranteed power (BPP)
5W
Guaranteed power (STSC)
70W
Input voltage loop (IVL)
3.5 V
Hardware over-current protection (OCP)
Disabled
Software over-current protection (ADC OCP)
5.3 A
Soft over-voltage protection stage 1 (OVPS1)
24 V
Soft over-voltage protection stage 2 (OVPS2)
25 V
Hard over-voltage protection (OVPH)
26.5 V
Software over-temperature protection (ADC OVTP)
125 °C
Hardware over-temperature protection (TSHUT)
135 °C
Iload
24 mA
ARC mode disable threshold
10 V
Vrect ready threshold (Vout is enabled)
Vout setting + 80 mV
Manufacturer ID
0x0016
I2C address
0x2C (7-bit address)
16bit register address
Note:
high-byte first
low-byte second
Frequency band: 139.24 kHz –146.56 kHz; H-field: -5.8 dBµA/m at 10 m (for EU/UK).
•
LDO setting (output current dependent)
–
–
UM3262 - Rev 1
Value
Highest LDO drop: 1024 mV
Lowest LDO drop: 80 mV
page 58/92
UM3262
STEVAL-WLC99RX description and operation
6.5.1
Power-up Waveforms
The following figure shows the power up waveforms (receiver side) of a STWLC99 (RX) and STEVAL-WBC2TX70
(TX) setup. Transmitter and Receiver coils are aligned; a 500 mA resistive load is connected to the receiver
output.
Figure 65. Power up waveforms of STEVAL-WLC99 when placed on STEVAL-WBC2TX70
6.5.2
Efficiency and spatial freedom in the XY plane
Efficiency is one of the most important metrics of wireless charging performance evaluation. Spatial freedom, size
of the area in which a power receiver can be placed on the power transmitter which still allows sufficient power to
be transmitted, is also an important metric.
Efficiency and spatial freedom of STEVAL-WLC99 were measured with STEVAL-WBC2TX70 as the transmitter.
The measurements was done in two situations, the first one is using common STSC sequence without fixing
frequency (PTx can use frequency for regulation). The second one, in addition to common STSC sequence, is
using STSC command to fix frequency of power. The efficiency was measured from the transmitter DC input to
the receiver DC output. The measurement does not include any power losses in the wall adapter or the cable.
The test setup comprised of:
•
•
•
•
•
•
•
UM3262 - Rev 1
120 W Baseus wall adapter, model CCGAN120E
USB-C power cable 100W capable, delivered in with wall adapter
STEVAL-WBC2TX70 as Transmitter
STEVAL-WLC99RX as Receiver
Electronic load in CC mode, model Itech IT8512A+
STEVAL-USBI2CFT converter to send STSC commands
Power transmitter input voltage 20 V, power receiver output voltage 20 V
page 59/92
UM3262
STEVAL-WLC99RX description and operation
Figure 66. Efficiency curves for various coil misalignments
Figure 67. Efficiency curves for various coil misalignment with PTx frequency fixed to 140 kHz
It follows from previous images that fixing operation frequency of power transmitter to 140 kHz results in increase
of efficiency but is tradeoff in decreasing maximum misalignment. For more details please see STSC quick step
guide section and STSC application note.
6.5.3
Spatial freedom in the Z-axis
Z-axis distance between the coils, also known as charging gap, is an additional parameter which significantly
affects charging performance. Therefore, STEVAL-WLC99RX was also tested at various charging gap distances.
The measurements was done in two situations, the first one is using common STSC sequence without fixing
frequency (PTx can use frequency for regulation). The second one, in addition to common STSC sequence, is
using STSC command to fix frequency of power. The measurements examined two key performance indicators –
efficiency and maximum delivered power.
The test setup comprised of:
•
•
•
•
•
•
•
UM3262 - Rev 1
120 W Baseus wall adapter, model CCGAN120E
USB-C power cable 100W capable, delivered in with wall adapter
STEVAL-WBC2TX70 as Transmitter
STEVAL-WLC99RX as Receiver
Electronic load in CC mode, model Itech IT8512A+
STEVAL-USBI2CFT converter to send STSC commands
Power transmitter input voltage 20 V, power receiver output voltage 20 V
page 60/92
UM3262
STEVAL-WLC99RX description and operation
Figure 68. Efficiency curves for various coil-to-coil distances
Figure 69. Efficiency curves for various coil-to-coil distance with PTx frequency fixed to 140 kHz
Note:
z+4 mm is the default distance when using the 1 mm spacer delivered with STEVAL-WLC99RX and the 3 mm
spacer delivered with STEVAL-WBC2TX70 kit.
Table 14. Maximum power for Z-axis gap (coil-to-coil distance)
Maximum power fixed
freq. 140 kHz [W]
Z gap [mm]
Maximum Power [W](1)
4
70
70
6
70
70
8
70
70
11
70
30
13
70
-
15
68
-
1. Please note that maximum power delivered may also be influenced also by power wall adapter. With increasing Z distance
or coil misalignment power transfer efficiency decreases, so more input power is required to deliver a given output power
which may cause power wall adapter overload.
UM3262 - Rev 1
page 61/92
UM3262
STEVAL-WLC99RX description and operation
It follows from previous images that fixing operation frequency of power transmitter to 140 kHz results in increase
of efficiency but is tradeoff in decreasing maximum coil-to-coil distance. As shown in Table 14 fixed frequency
lowers maximum coil-to-coil distance for delivering 70 W by 5 mm. In higher coil-to-coil distance maximum
delivered power is lower and above 11 mm power transfer is stable but output can not reach set output voltage
value when load is connected. For more details please see STSC quick step guide section and STSC application
note.
ARC mode also improves performance at higher Z-axis distances. The following waveform shows how STWLC99
is able to establish communication even at a high Z-distance (15 mm), and after reaching the default 10 V VRECT
threshold, switches to a different operating mode where output can be enabled.
Figure 70. STWLC99 communication performance during startup at high Z distance (15 mm coil-to-coil
distance)
UM3262 - Rev 1
page 62/92
UM3262
STEVAL-WLC99RX description and operation
6.5.4
Thermal performance
All thermal images were taken in ambient temperature of 25 °C.
Figure 71. STEVAL-WLC99RX thermal performance with a 5 W load (5 V/1 A) after 5 minutes
Figure 72. STEVAL-WLC99RX thermal performance with a 35 W load (20 V/1.75 A) after 5 minutes
UM3262 - Rev 1
page 63/92
UM3262
STEVAL-WLC99RX description and operation
Figure 73. STEVAL-WLC99RX thermal performance with a 70 W load (20 V/3.5 A) after 5 minutes
UM3262 - Rev 1
page 64/92
UM3262
Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7
Designing a wireless power receiver based on STEVAL-WLC99RX
evaluation board
The design should begin with external component selection, as those components have a significant impact on
the board performance. Modifications of the external components are also harder to implement after the board is
manufactured and assembled.
7.1
External component design
STWLC99 requires only a few external components to work properly. The design should begin with coil and series
resonant capacitor selection, as those are the crucial part of the design and affect most of the device’s functions.
7.1.1
Coil selection
Coil selection is a complex problem, as there are several factors which influence the resulting performance. When
selecting the coil, the designer should consider the coil’s inductance, DCR, ACR, current rating, dimensions,
maximum z-distance and layout.
DCR, ACR (DC and AC resistance) should be kept as low as possible to minimize power loss caused by the
current flowing through the coil.
Dimensions, maximum z-distance and coil layout must be considered to achieve the best coupling possible, as
better coupling results in higher efficiency. Similar sized coils might offer a higher coupling factor, on the other
hand a different sized RX/TX coil might offer greater freedom of positioning.
Using the default coil combination found in ST’s EVKs should be a good starting point. For more information
regarding coil selection, please refer to Coil selection guide.
7.1.2
Series and parallel resonant capacitor selection
Selection of the series and parallel capacitors is greatly influenced by the transmitting coil design. The value
should be selected so that the resulting circuit has its resonant peak located at, or very close to, 100 kHz. The
following formula can be used to calculate the series capacitance value:
f = 2 ⋅ π ⋅1 L ⋅ C
C=
1
L⋅ 2⋅π⋅f
2
The parallel capacitance can be omitted, as it is only used for backwards compatibility with certain power
transmitters (required during Qi certification). Theoretically may be omitted if no Qi certification is required.
Voltage rating of the capacitors should consider that during operation, voltage generated across the capacitors is
usually much higher than the input/output voltage of the system. Also, a quick movement of the receiving coil from
a misaligned position to the transmitting coil center may generate a voltage peak, as the regulation loop is quite
slow. Therefore, the minimum recommended voltage rating of the series resonant capacitors is 50 V. X5R/X7R
dielectric capacitors are recommended if price is the deciding factor, C0G dielectric capacitors are recommended
for better performance (lower derating caused by voltage biasing and temperature shift).
For more information regarding capacitor value selection, please refer to Wireless power consortium’s
documentation, which describes capacitors used in the Qi certified topologies.
7.1.3
VRECT and VOUT capacitors selection
VRECT and VOUT capacitor’s value selection is mostly a tradeoff between load transition response time and
capacitor cost and/or size. Capacitance of 40-50 uF VOUT node and 80 uF for VRECT node should be good
starting point.
The VRECT capacitor voltage rating should respect the maximum input voltage. Voltage peaks generated by
quick coil movements should also be a concern when determining the voltage rating. Leaving a greater margin is
advisable. The VOUT capacitor voltage rating is determined by the selected output voltage. Ceramic X5R or X7R
(preferred) dielectric capacitors are recommended for both VRECT and VOUT.
Capacitor derating caused by temperature shift and DC bias should also be considered, as the capacitance
decrease caused by those effects may be quite significant. Please refer to the capacitor datasheet for more
information.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.1.4
ASK modulation configuration
STEVAL-WLC99RX features two pairs of modulation capacitors, with each pair having a different capacitance
value – COM A: 22 nF connected to COMM pin, COM B: 47 nF connected to CLAMP pin. Each pair can operate
in different mode, see Table 15. Different operation modes of ASK modulation capacitor pairs for details.
The modulation capacitors used in STEVAL-WLC99RX were chosen to ensure good communication performance
under all operating conditions. Using a custom board design may require changing the COMM and CLAMP
capacitors.
The communication capacitors are used for power signal modulation. Although the modulation period is short, the
voltage drop it creates across the LDO must be considered, as this drop further increases overall losses of the
system. This is particularly important when the device is delivering a high load current.
The GUI allows the user to enable a particular pair to be active during different output current operation. The
same can be set for low/high VRECT voltage condition.
In addition to modulation using capacitors, STWLC99 is capable of resistive modulation. In this case, the
modulation is done by connecting and disconnecting internal constant current load. Its value can be specified by
the user for different load current and output voltage segments. Segments thresholds are shared with capacitor
modulation. It is recommended to use either resistive modulation or capacitor modulation.
Figure 74. ASK modulation configuration
Table 15. Different operation modes of ASK modulation capacitor pairs
Operation mode
Normal
Inverted
Modulation pair connected/disconnected(1)
Connected when modulation edge.
Disconnected otherwise
Disconnected when modulation edge.
Connected otherwise
OFF
Disconnected permanently (no participation in ASK modulation)
ON
Connected permanently (no participation in ASK modulation)
1. Modulation pair connected = modulation switch closed. Modulation pair disconnected = modulation switch opened.
The following waveforms show an example of RX VRECT, COM A (Rx communication capacitor), COM B (Rx
Communication capacitor) and TX AC1 coil sensing. In the pictures is demonstrated how the modulation
capacitors affect the Vrect voltage on Rx and coil voltage sense on coupled Tx.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
The modulation effect shall be considered in regard to the overall power loss, as the LDO voltage drop (Vrect –
Vout) multiplied by the output current adds additional power loss into the system.
Changing the modulation capacitor value may have an impact on the TX coil voltage sense. This voltage is used
as input for ASK demodulation circuit. The impact depends on various variables such as coil, coil-to-coil distance,
voltage, transferred power, misalignment and another parameters.
This should be considered when configuring the LDO drop curve (see Section 7.3: LDO configuration).
Figure 75. Example of waveform with no output load and COM A and COM B in normal mode
Figure 76. Example of waveform with 700 mA output load and COM A in normal mode and COM B turned
off
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.1.5
SOVP clamp resistor selection
SOVP clamp resistors, also known as IEXT resistors, are used as a part of the SOVP protection. When triggered,
STWLC99 pulls VRECT to ground through those resistors in an attempt to lower the VRECT voltage. Therefore,
the resistance value must be selected according to the selected SOVP threshold and power dissipation
capabilities of the resistors. IEXT pins’ current capabilities must also be considered, as the internal switches can
only withstand up to 300 mA of current.
7.1.6
ESD/TVS diodes
STEVAL-WLC99 also features two external TVS diodes which protect the STWLC99’s input pins (AC1 and AC2)
against excessive input voltage. The breakdown voltage of those diodes is 24.4 V.
7.1.7
NTC thermistor connection
The figure below shows external NTC connection. Together with the RHS pull-up resistor the NTC forms a voltage
divider, which is connected to the STWLC99 NTC pin. It is recommended to design the voltage divider to reach
the (low) NTC threshold at the highest allowed temperature. The NTC pin is 5 V tolerant. This should be
considered during NTC and pull-up resistor selection.
Note: in STEVAL-WLC99RX there is 100 kΩ resistor connected in parallel with NTC (EXTMP) terminal.
Figure 77. External NTC connection
7.1.8
External current sense resistor
The current sense resistor shall have value of 5 mΩ. During part selection, it is important to also consider
manufacturing tolerance and temperature coefficient. Maximum power rating depends on the expected maximum
output current. Considering the maximum output current of STWLC99, a 150 mW part should be sufficient. For
your reference, the table below lists parameters of the resistor assembled on STEVAL-WLC99RX:
Table 16. Parameters of recommended current sense resistor
Description
Resistance [mΩ]
5
Tolerance [%]
1
Temperature coefficient [ppm/°C]
100
Power rating [mW]
500
Operating temperature range [°C]
UM3262 - Rev 1
Value
from -55 to 155
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.2
PCB layout guidelines
•
•
•
•
•
•
•
•
•
7.3
Power tracks (AC1, AC2, VRECT, VOUT) and power ground tracks should be kept wide enough to sustain
high current. Duplicating these tracks in inner layers and adding vias is advisable wherever possible to
lower impedance as much as possible.
AC1, AC2, BOOT1, BOOT2, COMMx and CLAMPx nodes generate noise. Using shielding near those
signal tracks (by placing ground planes below) is recommended.
Power ground carries the sum of ripple current from VRECT/Cvrect and DC current from VOUT/Load.
Current return paths from LDO capacitors should be routed separately from the high current paths.
AC1 and AC2 tracks should be routed close together to minimize the area of the resulting loop.
Communication (I2C) and sensing signals should be routed far from noise generating nets (AC1, AC2,
COMMx, CLAMPx) to minimize the effects of interference induced from those high di/dt nets.
COMMx, CLAMPx, BOOT1 and BOOT2 capacitors should be placed as close to the device as possible.
VRECT and VOUT capacitors should be placed close to the device to minimize the area of high current
loops.
Auxiliary LDO capacitors should be placed as close to the device as possible.
Thermal performance and grounding can be enhanced by dedicating one layer as a ground plane. No
signal/power tracks should be routed on this layer to maximize ground integrity.
LDO configuration
Configuration of the LDO has a major impact on efficiency, as it directly affects the magnitude of the power loss
created by the passing current. Therefore, minimizing the voltage drop is desired when aiming for higher
efficiency.
However, a higher LDO drop improves communication stability and helps prevent negative modulation, which
might leak into the output voltage. Lastly, different rectifier operating modes also affect the VRECT waveform.
Therefore, LDO drop configuration is a tradeoff between efficiency and communication/output voltage stability.
During LDO drop selection, it shall be taken in account minimum achievable voltage drop due to electrical
limitations (internal resistance). For STWLC99 the internal resistance is 18 mΩ so minimal LDO drop for
maximum current in given segment is calculated using following formula:
VDROPmin mV = 18 ⋅ Imax A
The example LDO configuration is shown below:
Figure 78. LDO drop settings
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.4
External 5V provision
Please pay attention to the following conditions when using external 5V:
•
•
•
•
Connecting and disconnecting of the external 5V shall follow the procedure mentioned below.
External 5 V shall be provided to VDD pin of STWLC99 or the VDD header (P10) in case of STEVALWLC99. External 5 V can be provided to this pin permanently.
STWLC99 startup is possible only with 5 V internal LDO. External 5 V is disconnected automatically by
internal switch.
The external power supply circuit shall be able to provide a minimum of 30 mA, with the value increased
accordingly when powering any additional circuitry.
Before connecting the external power supply, it is highly recommended to:
•
•
Enable RX TX REMOVAL interrupt – this interrupt informs the host MCU that power from Tx was removed.
External 5V shall be disconnected by RX EXT 5V OFF command upon interrupt, effectively powering down
STWLC99.
Enable RX EXT 5V FAULT interrupt – this interrupt signals an issue during the external 5 V connecting/
disconnecting process.
Figure 79. Recommended interrupts to enable for using external 5 V
Procedure for connection of external 5 V to STWLC99:
1. Provide 5 V power to the VDD pin.
2. In the GUI, execute RX EXT 5V ON command (Rx Commands tab) or write 0x01 to address 0x00A1.
3. Upon connecting successfully, STWLC99 is now powered from external 5 V supply and its internal LDO is
disabled. Otherwise, RX EXT 5V FAULT interrupt is raised and STWLC99 is still powered by the internal LDO.
The host shall clear the RX EXT 5V FAULT interrupt before attempting the connection procedure again.
Unsuccessful connection may be caused by too low or unstable external power supply.
Procedure for disconnection of external 5 V from STWLC99:
1. In GUI execute RX EXT 5V OFF command (Rx Commands tab) or write 0x02 to address 0x00A1
2. STWLC99 is now powered by the internal LDO. Absent internal power (STWLC99 not being powered by
power transmitter) will cause STWLC99 to turn off.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.5
FOD tunning guide
STWLC99 uses precise internal AD converter to perform voltage and current measurements and a 32-bit
arithmetic to ensure sufficient accuracy. STWLC99 then uses the measured values to create a mathematical
model to estimate the received power, which is then sent to the power transmitter for evaluation. To make this
mathematical model precise enough, STWLC99 needs to estimate power loss in the system. So-called FOD
parameters, which are used in the estimation, can be used to fine-tune the calculation results, based on the
desired behaviour.
System losses can be influenced by many factors - for example coil type, PCB layout and mechanical structure of
the final product (screws and metal structures near coils). It means that FOD parameters adjustment (FOD tuning)
must be done with a final product. Process for FOD tuning in Qi BPP is described below. For tuning in high power
application with STSC, please refer to FOD tuning application note. Quick coarse method using STEVALWBC2TX70 as PTx is also mentioned below.
One more thing which may have impact on power loss is the operating point. Different loads (in fact different
output currents) are covered by segmenting FOD parameters into 9 current segments. These FOD parameters for
Qi BPP mode (5 V output voltage) can be saved in STWLC99‘s non-volatile memory by configuration file
(.memh). If the application requires use in high power mode (for example STSC mode), FOD parameters are no
longer stored in STWLC99 memory. FOD parameters shall be tuned for each voltage step in the STSC sequence
and stored in host MCU memory. Immediately after host MCU performs an STSC voltage changing step it shall
update FOD parameters in STWLC99 I2C register.
First parameter which should be set is RSER. Then power compensation curve should be tuned.
7.5.1
RSER
RSER value corresponds to resistance of the receiving coil and other resistive losses (for example PCB, cables).
Basically power loss, defined as RSER times the output current squared, is calculated. Then the result is added to
received power modification value defined by compensation curve (described below). RSER is valid for the whole
output current range. RSER value can be found in the GUI as FOD RSER register.
7.5.2
Power compensation curve
Power compensation curve is defined by FOD OFFSETx. To make tunning easier, the whole range of loads
(output currents) is divided into 9 segments bounded by FOD CUR THRx. FOD OFFSETx is defined for each
FOD CUR THRx (FOD OFFSET0 is defined for 0 mA). Basically, two boundary FOD OFFSETx values define a
linear dependency of power compensation constant on the output current for a given segment, see
Figure 80. FOD offset defined modification of receive power example diagram. The power compensation value
coming from this algorithm is added to the received power from STWLC99 together with RSER and it is sent in
receive power packet (RPP) to the power transmitter.
Figure 80. FOD offset defined modification of receive power example diagram
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7.5.3
Qi BPP FOD tuning
Note:
Prepare Qi compliant BPP power transmitter capable of reporting transmitted power.
Step 1.
Begin by setting all parameters to zero – put STWLC99 onto power transmitter and wait for power
transfer. Locate RX FOD Configuration tab and set all parameters to zero.
Figure 81. Cleared BPP FOD tuning registers
Step 2.
Generate new configuration file and write to STWLC99. Refer to section 3.3 for details.
Step 3.
Open FOD tunning tool by navigating to the RX FOD Tunning tab in the GUI.
Figure 82. Rx FOD tuning update table line
UM3262 - Rev 1
Step 4.
Place STWLC99 onto a Qi compliant power transmitter.
Step 5.
Connect electronic load to STWLC99 output (VOUT) and read received power (value held in POWER
RX register in Common Registers -> Mode Monitor) and output current (value held in ICUR register in
Common Registers -> Mode Monitor). Read trasmitted power value from Qi compliant power
transmitter. Write those values into the GUI FOD tuning table.
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Step 6.
Increase the load from 0 to 1000 mA (considering this is a 5 W setup). Record Transmitted power (from
PTx) and Received power from PRx and add it into the GUI FOD tuning table. A new line can be added
by the [+] button on left.
Figure 83. Filled table with data from different Rx loads
Step 7.
Navigate to second page of the tool (press round button number 2). The initial PRx/PTx power
difference (labeled as ∆P) is shown as green curve. The target of the tuning is to find compensation
values, which should move the blue (compensated ∆P) curve as close to the 200 mW (orange dashed
line) as possible. The Qi standard allows up to 350 mW power difference between PRx and PTx. The
default target of this tool is set to 200 mW (can be adjusted on right side).
Figure 84. FOD tuning with uncompensated/untuned power difference curve
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
Step 8.
Note:
By moving sliders on right side, adjust the "After compensation" curve (blue) to achieve a relatively flat
line as close to the target ∆P as possible.
Final CTC corresponds to FOD CUR THRx in Rx registers.
Final DCR corresponds to FOD RSER in Rx registers.
Final OLC corresponds to FOD OFFSETx in Rx registers.
Values Final CTC [1] – [8] shall be in ascending order.
Figure 85. Power difference curve after compensation (FOD tuning)
Step 9.
Navigate back to the first page of the tool and check compensated ∆P values – they should be around
the given threshold (200 mW in this case).
Figure 86. Compensated ∆P values
Step 10. Copy the compensation value to Rx Registers (Rx FOD Configuration) by clicking the „Write“ button on
top of Rx FOD Tuning page.
Step 11. To make the changes persistent, generate Configuration file (navigate to Rx Registers -> Rx FOD
Configuration and use „Save Rx“ button).
Step 12. Load configuration file to STWLC99.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
Step 13. Repeat previous measurement and check if results are approximately the same. Results will not be
exactly equal as there are a lot of variables which can influence power difference (for example X/Y
misaligment, Z gap, transmitter measurement accuracy).
Step 14. Repeat the test with 5 mm misaligment in X or Y axis. In this case FOD should not be triggered.
7.5.4
7.6
Quick coarse method for FOD tuning in STSC
Step 1.
Connect STEVAL-WLC99RX to a computer, open GUI. Prepare also power transmitter (Tx) and it is
proprietary GUI–this quick method is only valid with STEVAL-WBC2TX50 and STEVAL-WBC2TX70.
An optional step is to disable FOD in PTx (please refer to user manual)–this option will not stop
calculation of FOD but PTx will no longer terminate power transfer if FOD is triggered. FOD shall be
enabled back after tuning is completed.
Step 2.
Place power receiver coil onto power transmitter coil, in centered position, without foreign object (FO).
Wait for power transfer.
Step 3.
In PTx GUI there is a parameter called 'FOD margin'. This is a unitless metric for detecting FOD. The
goal of this tuning is to get this parameter to approximately 200.
Step 4.
Open the 'Rx FOD configuration' tab. For each current segment, adjust FOD OFFSET to get an FOD
margin approximately 200. The best way to achieve this is to adjust FOD OFFSET on loads, which are
near the edge of a given current segment. Then sweep the load across the current segment and check
if the FOD margin is consistent.
Step 5.
If there is any significant change or nonlinearity in the given current segment, adjust FOD CUR THR
segment threshold values to get a finer division in the problematic load current range.
STSC quick step guide
This step guide is intended to show how to get maximum power delivery (70 W) using STWLC99 as power
receiver and STWBC2 as power transmitter. Pre-made quick access toolbar buttons can be used to simplify the
process. For detailed information about STSC, packet payload and more STSC functionality, please refer to
STSC application note.
First, *.bin file containing the buttons for quick access toolbar must be downloaded from st.com. To import file to
GUI, navigate to Step sequencer button in left side menu. Then use load button and choose the downloaded bin
file. Buttons appear on the bottom of the page if import was succesfull.
Figure 87. GUI - importing quick access toolbar buttons.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
Each button is a set of read/write operations, which results in exchanging proprietray packet with power
transmitter and changing power receiver settings if needed. Response from power transmitter is always required
in STSC. Response should be checked after each step of the sequence. If response is not received, or is
incorrect, the given step shall be repeated. The receive buffer of STWLC99 is not cleared automatically, it is
recommended to clear it after data are read. For this purpose „Clear rcvd buffer“ button can be used.
First part of the sequence is used to setup STSC power transfer. Then second part with „STSC xx V“ is used to
change power transmitter input USB-PD voltage and power receiver output voltage. It is recommended to change
voltage step by step to prevent fast changes and potential risk of overvoltage. Sequence to get maximum power
(70 W) with 20 V output voltage is following:
1. STSC Authentication – power receiver authentication in power transmitter.
Response: 0x4F 0xAA 0x32 0x66 0x77 0xC6
2. STSC Request – power receiver request for STSC, power capability 70 W
Response: 0x1E 0x01 0x1F
3. STSC 24bits RPP Req (70W) – change of RPP to 24 bit STSC format
Response: 0x1E 0x01 0x1F
4. STSC Fixed Freq 140 kHz - request power transmitter to operate with fixed frequency (140 kHz). PTx will use
other parameters for regulation (bridge voltage, duty cycle). This fixed frequency request is recommended for
setup with STEVAL-WLC99RX. This request is taken in account by the PTx as soon as STSC voltage step (for
example STSC 9 V) is executed.
Response: 0x1E 0x01 0x1F
5. STSC 9 V – request for power transmitter to change USB-PD voltage to 9 V, power receiver output voltage set
to 9 V, FOD parameters updated.
Response: 0x1E 0x01 0x1F
6. STSC 12 V – request for power transmitter to change USB-PD voltage to 12 V, power receiver output voltage
set to 12 V, FOD parameters updated.
Response: 0x1E 0x01 0x1F
7. STSC 15 V - request for power transmitter to change USB-PD voltage to 15 V, power receiver output voltage
set to 15 V, FOD parameters updated.
Response: 0x1E 0x01 0x1F
8. STSC 20 V - request for power transmitter to change USB-PD voltage to 20 V, power receiver output voltage
set to 20 V, FOD parameters updated.
Response: 0x1E 0x01 0x1F
Note:
This quick step guide is updating FOD parameters during STSC voltage change. These FOD parameters are
valid only for STEVAL-WLC99RX and fixed frequency to 140 kHz. If fixed frequency is not used, FOD
parameters shall be retuned or, for prototyping purposes, it is possible to disable FOD in PTx. In final application
this shall be handled by host (MCU) and FOD parameters shall be tuned with final product. For more information
about FOD in STSC plase refer to FOD tuning section 6.5 and FOD tuning guide (application note).
Note:
Fixed frequency is tradeoff between efficiency, EM performance and spatial freedom. Several limitation should
be taken in account during system design, for more details refer to STSC application note.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
Figure 88. GUI - example of using STSC Authentication button and reading PTx response
Figure 89. GUI - example of using STSC 9 V button and reading PTx response
Note:
Some buttons in quick access toolbar may contain, in addition to I2C read/write operations, wait operation. This
wait operation basically instructs the GUI to wait for set time before proceeding with I2C operations. This is to
give enough time to STWLC99 to complete tasks (for example receive and decode packet). In a real device this
will be handled by host MCU and interrupt driven operation should be chosen instead of constant wait times.
7.7
Reference code with STM32 development boards
Description of reference code for uploading patch and configuration compiled into .h file to STWLC99 with
STM32. Please refer to Section 4.3: Configuration file generation for more information about patch, configuration
and .h file generation.
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Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.7.1
Overview
The STWLC99 memory is divided into 128 sectors (128 bytes per sector), with a total of 16 KB re-programmable
non-volatile memory.
The purpose of this chapter is to briefly explain how to integrate the NVM programming reference code into a
STM32 development board and how to use the provided APIs.
7.7.2
Hardware requirements
1. STM32 development board (e. g. STM32 Nucleo-144)
2. STEVAL-WLC99RX
7.7.3
Hardware connections
1. Connect the STWLC99’s I2C pins to the master I2C bus. These signals require pull-up resistors to work
properly!
2. Connect a 5 V power supply to STWLC99’s VOUT.
Figure 90. Pin connection between host and STWLC99 chip / evaluation board
7.7.4
Software requirements
1. Patch/Configuration data in header (.h) file format (STEVAL-WLC99RX)
2. STWLC NVM programming reference code (STEVAL-WLC99RX)
3. STM32CubeIDE (STM32CubeIDE)
7.7.5
Source files
The source files included in the reference code are listed below.
1. STWLC99.h
–
Provides NVM programming API and holds the structure and register definitions of STWLC99.
2. STWLC99.c
Main file which describes the NVM related programming sequences and I2C Write/WriteRead
operations.
3. nvm_data.h
–
–
7.7.6
Patch and Configuration data in header file format to be programmed into the chip.
Reference code porting procedure
1. Create a new project in the STM32CubeIDE with a STM32 development board. Visit the ST website for
STM32CubeIDE documentation.
2. Copy STWLC99.h, STWLC99.c, and nvm_data.h into the main directory (Core/Src).
3. Add the following code into Core/Src/main.c.
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4. Include the Header file.
/* USER CODE BEGIN Includes */
#include "STWLC99.h"
/* USER CODE END Includes */
5. Define platform functions and variables to be used by driver API. See below for the function definitions.
int32_t platform_write(void *phandle, uint8_t *wbuf, int32_t wlen);
int32_t platform_write_read(void *phandle, uint8_t *wbuf,
int32_t wlen, uint8_t *rbuf, int32_t rlen);
void platform_delay(uint32_t millisec);
void *platform_alloc_mem(size_t size);
void platform_free_mem(void *ptr);
6. Declare and assign the platform functions to mandatory interfaces.
/** stwlcxx is the used part number **/
struct stwlcxx_dev stwlc99 = { 0 };
stwlc99.bus_write = platform_write;
stwlc99.bus_write_read = platform_write_read;
stwlc99.mdelay = HAL_Delay;
stwlc99.alloc_mem = malloc;
stwlc99.free_mem = free;
7. If user data is needed by the platform functions, initialize the phandle parameter.
struct stmdev_platform platform = {
.hi2c = &hi2c1,
.huart = &huart3,
};
stwlc99.phandle = &platform;
8. Optionally, initialize log parameters and set log_info to 1 to print more information logs.
stwlc99.log = platform_log;
stwlc99.log_info = 1;
9. Execute NVM programming
/* Start FW update */
stwlc99_fw_update(&stwlc99, stwlc99_FW_PATCH_CFG, 0);
10. For STM32 users, add the following I²C error handling code to ignore the I2C NACK after performing a system
reset.
/**
* @brief This function handles I2C1 Error interrupt.
*/
voidI2C1_ER_IRQHandler(void)
{
/* USER CODE BEGIN I2C1_ER_IRQn 0 */
/* Comment out the HAL_I2C_ER_IRQHandler() as I2C NACK workaround
* during reset stwlc99 */
/* USER CODE END I2C1_ER_IRQn 0 */
//HAL_I2C_ER_IRQHandler(&hi2c1);
/* USER CODE BEGIN I2C1_ER_IRQn 1 */
/* USER CODE END I2C1_ER_IRQn 1 */
}
Note:
UM3262 - Rev 1
When the host controller sends a System Reset command via I2C (FA 20 01 C1 38 01), STWLC99 will respond
with a NACK. The host controller needs to handle the NACK in this case.
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7.7.7
API
1. stwlc99_write_fwreg
Table 17. stwlc99_write_fwreg
Name
int32_t stwlc99_write_fwreg(struct stwlc99_dev *dev, uint16_t reg, const uint8_t *data, int32_t len)
Description
Write device firmware register.
Parameters
struct stwlc99_dev *
dev
Pointer to device interface
uint16_t
reg
Register to write
uint8_t *
data
Pointer to data to write into register
int32_t
len
Number of consecutive bytes to write
Return Value int32_t
Error status, return 0 if no error
2. stwlc99_read_fwreg
Table 18. stwlc99_read_fwreg
Name
int32_t stwlc99_read_fwreg(struct stwlc99_dev *dev, uint16_t reg, uint8_t *data, int32_t len)
Description
Read device firmware register
Parameters
struct stwlc99_dev *
dev
Pointer to device interface
uint16_t
reg
Register to read
uint8_t *
data
Pointer to store data read from register
int32_t
len
Number of consecutive bytes to read
Return Value
int32_t
Error status, return 0 if no error
3. stwlc99_get_chip_info
Table 19. stwlc99_get_chip_info
Name
Description
Parameters
Return
int32_t stwlc99_get_chip_info(struct stwlc99_dev *dev, struct stwlc99_chip_info *info);
Read device information.
struct stwlc99_dev *
dev
Pointer to device interface
struct stwlc99_chip_info *
info
Pointer to device information structure
int32_t
Error status, return 0 if no error
4. stwlc99_fw_update
Table 20. stwlc99_fw_update
Name
int32_t stwlc99_fw_update(struct stwlc99_dev *dev, enum stwlc99_fw_type fw_type, int32_t
force_update);
Description Update STWLC99 patch and config.
Parameters struct stwlc99_dev *
Return
UM3262 - Rev 1
dev
Pointer to device interface
enum stwlc99_fw_type
fw_type
Type of firmware data to write
int32_t
force_update
Set 0 if no force update, otherwise yes
int32_t
Error status, return 0 if no error
page 80/92
UM3262
Designing a wireless power receiver based on STEVAL-WLC99RX evaluation board
7.7.8
Error codes
Table 21. Error codes with descriptions
Error code
7.8
Value
STWLC99_OK
0x00000000U
No error
STWLC99_ERR_BUS_W
0x80000000U
Bus write error
STWLC99_ERR_BUS_WR
0x80000001U
Bus write-read error
STWLC99_ERR_ALLOC_MEM
0x80000002U
Failed to allocate memory
STWLC99_ERR_INVALID_PARAM
0x80000003U
Invalid parameter
STWLC99_ERR_TIMEOUT
0x80000004U
Timeout error
STWLC99_ERR_INVALID_OP_MODE
0x80000005U
Invalid operation mode
STWLC99_ERR_INVALID_CHIP_ID
0x80000006U
Invalid target chip ID
STWLC99_ERR_NVM_ID_MISMATCH
0x80000007U
Compare failed patch or cfg ID
STWLC99_ERR_NVM_DATA_CORRUPTED
0x80000008U
Compare failed patch or cfg data
Testing and debugging - common issues
Indication of the issue
Possible causes
•
VRECT voltage too low
•
–
misalignment of the coils too big
–
insufficient transmitter power
RX protection triggered
•
Communication cannot be established
No VOUT voltage
LED D9 blinking
–
–
•
Power transfer terminated
•
•
•
•
Excessive IC temperature
misalignment
other communication problems (e. g. noise)
Receiver is not powered
–
–
–
LED D9 off
UM3262 - Rev 1
Description
misalignment
transmitter not powered
transmitter protection triggered
Charging complete
Foreign object detected
Communication error
High LDO power loss
–
–
LDO drop set too high
Modulation depth too high
page 81/92
UM3262
Qi Certification
8
Qi Certification
STWLC99 is Qi 1.3 BPP compatible and can therefore be Qi certified. The following section describes the basic
requirements necessary for Qi BPP certification.
The 6 basic steps of the Qi certification process:
1. The registration procedure starts with the product’s manufacturer filling in an on-line form, providing basic
information about the product, uploading its picture and submitting the necessary self-declaration forms. The
manufacturer then selects an Authorized Test Lab (ATL) which will perform the compliance test, as well as
selecting an Interoperability Testing Center (IOC) which will perform the interoperability test.
2. The Logo License Administrator (LLA) verifies whether the form is filled in correctly.
3. The Authorized Test Lab (ATL) performs the mandatory compliance tests described in the test specification
and releases a test report summary.
4. The Interoperability testing Center (IOC) performs the interoperability test.
5. The product manufacturer finalizes description of the product. Uploads a picture, showing the product as it will
be shipped to customers, and provides a type number identifying the product.
6. The Logo License Administrator (LLA) verifies the information is complete and consistent, after which the
product is made visible in the product registration database.
Figure 91. Qi certification process
For more information regarding the certification procedure, please visit the Wireless power consortium’s website.
UM3262 - Rev 1
page 82/92
UM3262
Regulatory compliance information
9
Regulatory compliance information
Notice for US Federal Communication Commission (FCC)
For evaluation only; not FCC approved for resale
FCC NOTICE - This kit is designed to allow:
(1) Product developers to evaluate electronic components, circuitry, or software associated with the kit to
determine
whether to incorporate such items in a finished product and
(2) Software developers to write software applications for use with the end product.
This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all
required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product
not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless
the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit
must operate under the authority of an FCC license holder or must secure an experimental authorization under
part 5 of this chapter 3.1.2.
Notice for Innovation, Science and Economic Development Canada (ISED)
For evaluation purposes only. This kit generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to Industry Canada (IC) rules.
À des fins d'évaluation uniquement. Ce kit génère, utilise et peut émettre de l'énergie radiofréquence et n'a pas
été testé pour sa conformité aux limites des appareils informatiques conformément aux règles d'Industrie Canada
(IC).
Notice for the European Union
The kit STEVAL-WLC99RX is in conformity with the essential requirements of the Directive 2014/53/EU (RED)
and of the Directive 2015/863/EU (RoHS). Applied harmonized standards are listed in the EU Declaration of
Conformity.
Notice for the United Kingdom
The kit STEVAL-WLC99RX is in compliance with the UK Radio Equipment Regulations 2017 (UK SI 2017 No.
1206 and amendments) and with the Restriction of the Use of Certain Hazardous Substances in Electrical and
Electronic Equipment Regulations 2012 (UK SI 2012 No. 3032 and amendments). Applied standards are listed in
the UK Declaration of Conformity.
UM3262 - Rev 1
page 83/92
UM3262
Board versions
10
Board versions
Table 22. STEVAL-WLC99RX versions
Finished good
STEVAL$WLC99RXA(1)
Schematic diagrams
STEVAL$WLC99RXA schematic diagrams
Bill of materials
STEVAL$WLC99RXA bill of materials
1. This code identifies the STEVAL-WLC99RX evaluation board first version.
UM3262 - Rev 1
page 84/92
UM3262
Revision history
Table 23. Document revision history
UM3262 - Rev 1
Date
Version
15-Mar-2024
1
Changes
Initial release.
page 85/92
UM3262
Contents
Contents
1
Get started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Reference design specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
Overview of the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
5
3.1
Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Basic operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3
Functional check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Graphical user interface (GUI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1
Connecting STWLC99 to PC GUI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2
Patch and configuration files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3
Configuration file generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.4
Header file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5
Header file generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6
Programming the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
5.1
System block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2
Integrated power rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3
Internal ADC channel monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4
5.3.1
ADCIN/EXTMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3.2
ADCIN2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Main LDO Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4.1
Regulation loops and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4.2
Dload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5
Output current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.6
UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.7
Chip Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.8
Power Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.8.1
VOUT soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.9
LDOs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.10
Protections Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
UM3262 - Rev 1
5.10.1
Two-stage soft over-voltage protection (OVPS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.10.2
Hard over-voltage protection (OVPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.10.3
Firmware over-voltage protection (ADC OVP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.10.4
Output over-voltage protection (VOUT OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.10.5
Input voltage loop (IVL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.10.6
Output under-voltage protection (VOUT UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
page 86/92
UM3262
Contents
5.10.7
Output current loop (OCL) with over-current protection (OCP) . . . . . . . . . . . . . . . . . . . . . 29
5.10.8
Firmware over current protection (ADC OCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.10.9
Hardware thermal shutdown (TSHUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.10.10 Firmware Over-Temperature protection (ADC OVTP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.10.11 Firmware NTC Over-Temperature protection (ADC NTC) . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.11
Foreign Object Detection (FOD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.12
WPC Qi Compliant Power Transfer Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.12.1
5.13
6
Wireless power interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Bidirectional communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.13.1
ASK communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.13.2
FSK communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.13.3
Most common Qi communication packets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.14
ST super charge (STSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.15
Sending a proprietary packet from STWLC99 to STWBC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.16
Adaptive Rectifier Configuration (ARC) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5.17
Transmitter (Tx) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.18
I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.18.1
Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.18.2
Start and stop conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.18.3
Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.18.4
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.18.5
Writing to a single register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.18.6
Writing to multiple registers with incremental addressing . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.18.7
Reading from a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.18.8
Reading from multiple registers with incremental addressing . . . . . . . . . . . . . . . . . . . . . . 48
5.19
GPIOx and INTB pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.20
Interrupt registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
STEVAL-WLC99RX description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
6.1
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.2
Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.3
STEVAL-WLC99RX coil description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
6.4
STEVAL-WLC99RX PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.5
STWLC99 default configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
UM3262 - Rev 1
6.5.1
Power-up Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.5.2
Efficiency and spatial freedom in the XY plane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.5.3
Spatial freedom in the Z-axis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
6.5.4
Thermal performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
page 87/92
UM3262
Contents
7
Designing a wireless power receiver based on STEVAL-WLC99RX evaluation
board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
7.1
External component design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
7.1.1
Coil selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
7.1.2
Series and parallel resonant capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
7.1.3
VRECT and VOUT capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
7.1.4
ASK modulation configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
7.1.5
SOVP clamp resistor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.1.6
ESD/TVS diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.1.7
NTC thermistor connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.1.8
External current sense resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.2
PCB layout guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
7.3
LDO configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
7.4
External 5V provision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
7.5
FOD tunning guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
7.5.1
RSER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
7.5.2
Power compensation curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
7.5.3
Qi BPP FOD tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
7.5.4
Quick coarse method for FOD tuning in STSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7.6
STSC quick step guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7.7
Reference code with STM32 development boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
7.8
7.7.1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.2
Hardware requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.3
Hardware connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.4
Software requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.5
Source files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.6
Reference code porting procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
7.7.7
API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
7.7.8
Error codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Testing and debugging - common issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
8
Qi Certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
9
Regulatory compliance information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
10
Board versions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
UM3262 - Rev 1
page 88/92
UM3262
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Target design specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Header and test point description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
WL_CTRL and WPOLSEL logic table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Description of OCP protection behavior for combinations of all related setting registers. . . . . . . . . . . . . . . . . . . 29
HI and LO state parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
EPT codes and explanation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Improvement of possible Z distance with ARC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
GPIO pins overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
GPIO functions list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Interrupt description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
STEVAL-WLC99RX bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Electrical characteristics of the receiver coil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
STWLC99 default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Maximum power for Z-axis gap (coil-to-coil distance) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Different operation modes of ASK modulation capacitor pairs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Parameters of recommended current sense resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
stwlc99_write_fwreg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
stwlc99_read_fwreg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
stwlc99_get_chip_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
stwlc99_fw_update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Error codes with descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
STEVAL-WLC99RX versions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
UM3262 - Rev 1
page 89/92
UM3262
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
UM3262 - Rev 1
STEVAL-WLC99RX evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Main board elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Headers and test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
STEVAL-WLC99RX (left board) placed on transmitter coil of STEVAL-WBC2TX70 (right board) . . . . . . . . . . . . 6
PC GUI main screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
GUI device selection and connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Save Rx button to generate config file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Configuration ID field for version control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Location to save the file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Header file generator device selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Memh file selection and patch version filling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Confirmation of patch version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Location to save header file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Writing the header file to the device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Writing the memh files to the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
STWLC99 system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PC GUI charts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Register for soft start period adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Example of Vout soft start behavior with Vout set to 5 V and connected 9R resistive load . . . . . . . . . . . . . . . . 19
Two-stage OVPS protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Two-stage OVPS protection settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
OVPH protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
OVPH protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Hard overvoltage protection (OVPH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
ADC OVP protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
ADC OVP protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VOUT OVP protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Input voltage loop threshold setting and enable option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Example waveform when IVL is activated. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VOUT UVLO protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
VOUT UVLO protection settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Threshold setting for over current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
OCP protection setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ADC OCP protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
ADC OCP protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
TSHUT protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
TSHUT protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
ADC OVTP protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
ADC OVTP protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
ADC NTC protection threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
ADC NTC protection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Qi Baseline power Profile (BPP) flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
HI and LO states in ASK communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Example of differential bi-phase encoding scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Example of asynchronous serial format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
ASK modulation capacitors block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Example of differential bi-phase encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Example of different response patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
GUI example message with header 0x48 and payload 0xA5 0x01 0x77 0xCE. . . . . . . . . . . . . . . . . . . . . . . . 43
Step sequencer example message with header 0x48 and payload 0xA5 0x01 0x77 0xCE filled in buffer . . . . . 43
Step sequencer example - sending filled message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Startup waveform with ARC mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
STEVAL-WLC99RX circuitry for Tx mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
page 90/92
UM3262
List of figures
Figure 54.
Writing to single I2C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 55.
Writing to multiple I2C registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 56.
Reading from single I2C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 57.
Figure 58.
Figure 59.
Figure 60.
Figure 61.
Figure 62.
Figure 63.
Figure 64.
Figure 65.
Figure 66.
Figure 67.
Figure 68.
Figure 69.
Figure 70.
Figure 71.
Figure 72.
Figure 73.
Figure 74.
Figure 75.
Figure 76.
Figure 77.
Figure 78.
Figure 79.
Figure 80.
Figure 81.
Figure 82.
Figure 83.
Figure 84.
Figure 85.
Figure 86.
Figure 87.
Figure 88.
Figure 89.
Figure 90.
Figure 91.
Reading from multiple I2C registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Interrupt settings page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
STEVAL-WLC99RX schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Mechanical characteristics of the receiver coil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
STEVAL-WLC99RX PCB layout top layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
STEVAL-WLC99RX PCB layout inner 1 layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
STEVAL-WLC99RX PCB layout inner 2 layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
STEVAL-WLC99RX PCB layout bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Power up waveforms of STEVAL-WLC99 when placed on STEVAL-WBC2TX70 . . . . . . . . . . . . . . . . . . . . . . 59
Efficiency curves for various coil misalignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Efficiency curves for various coil misalignment with PTx frequency fixed to 140 kHz . . . . . . . . . . . . . . . . . . . 60
Efficiency curves for various coil-to-coil distances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Efficiency curves for various coil-to-coil distance with PTx frequency fixed to 140 kHz . . . . . . . . . . . . . . . . . . 61
STWLC99 communication performance during startup at high Z distance (15 mm coil-to-coil distance) . . . . . . 62
STEVAL-WLC99RX thermal performance with a 5 W load (5 V/1 A) after 5 minutes . . . . . . . . . . . . . . . . . . . 63
STEVAL-WLC99RX thermal performance with a 35 W load (20 V/1.75 A) after 5 minutes. . . . . . . . . . . . . . . . 63
STEVAL-WLC99RX thermal performance with a 70 W load (20 V/3.5 A) after 5 minutes . . . . . . . . . . . . . . . . 64
ASK modulation configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Example of waveform with no output load and COM A and COM B in normal mode. . . . . . . . . . . . . . . . . . . . 67
Example of waveform with 700 mA output load and COM A in normal mode and COM B turned off . . . . . . . . . 67
External NTC connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
LDO drop settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Recommended interrupts to enable for using external 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
FOD offset defined modification of receive power example diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Cleared BPP FOD tuning registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Rx FOD tuning update table line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Filled table with data from different Rx loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
FOD tuning with uncompensated/untuned power difference curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Power difference curve after compensation (FOD tuning) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Compensated ∆P values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
GUI - importing quick access toolbar buttons. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
GUI - example of using STSC Authentication button and reading PTx response . . . . . . . . . . . . . . . . . . . . . . 77
GUI - example of using STSC 9 V button and reading PTx response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Pin connection between host and STWLC99 chip / evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Qi certification process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
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UM3262
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UM3262 - Rev 1
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