Power and power management. Eurotech Appliances PXA255, VIPER, VIPER-Lite
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VIPER Technical Manual Power and power management
Power and power management
Power supplies
The VIPER is designed to operate from a single +5V ±5% (4.75V to +5.25V) supply.
The power connector PL16 has a +12V connection defined, but is not required for the
VIPER under normal operation. It can be used to supply +12V to the PC/104 stack if
There are four onboard supply voltages derived from the +5V supply. These are +1.06 to +1.3V (microprocessor Core), +1.8V (CPLD Core) and two +3.3V. One +3.3V supply is dedicated for use with the CompactFLASH interface and +3.3V flat panels.
The +5V supply is monitored automatically on-board; if this supply falls below +4V the board is reset. When the power supply rises above this threshold voltage the board comes out of reset and reboots itself. The power supply monitor ensures that the board does not hang if the supply voltage fails at any point.
If a CompactFLASH and an LCD display are used, ensure the total current requirement on 3.3V does not exceed 900mA! Please check the datasheets of the devices you are using, as this supply is not protected!
Battery backup
An onboard Lithium-Ion non-rechargeable battery (CR2032) provides battery backup for the DS1338 RTC, SRAM and optional TPM security feature when there is no +5V supply to the board. An external battery (CR2032 or similar) may also be fitted. To use
an external battery see PL16 – Power connector , page 95 for connections.
The table below shows the typical and maximum current load on the external battery:
Device load on battery Typical (µA) Maximum (µA)
DS1338 RTC with Clock Out Off / On 0.3 / 0.48 0.82/ 1.05
TPM (Optional)
Supply Supervisor
2
0.6
4
1
Total with RTC Clock Out Off
Total with RTC Clock Out On
1.1 ( 3.1 with TPM) 3.82 (7.82 with TPM)
1.28 (3.28 with TPM) 4.05 (8.05 with TPM)
An onboard Schottky diode drops 13mV from VBAT at 25°C. At -40°C this may increase to 170mV and at +85°C decrease below 10mV. The SRAM and
DS1338 minimum voltages are 1.5V and 1.3V respectively. Reliable operation below these minimum voltages cannot be guaranteed.
The VIPER does not provide a battery charging circuit.
© 2007 Eurotech Ltd Issue E 73
VIPER Technical Manual Power and power management
Power management
All VIPER power-down features and alteration of PXA255 operating frequency are fully supported under Embedded Linux and VxWorks. Windows CE currently provides no power management support.
To simplify the power consumption estimation of the VIPER, the following sections break down the process as follows:
•
Processor current estimations , page 75 .
•
•
External peripheral device power estimations , page 78 .
•
Power estimate examples , page 79 .
The sections immediately following these detail the VIPER features that can be
The section Processor current estimations , page 75 , details current consumption of the
VIPER for performance and power saving modes at different clock frequencies.
Embedded Linux, Windows CE and VxWorks set up the PXA255 slightly differently:
• Embedded Linux and VxWorks are booted from Redboot, which sets up the
PXA255 clock frequency to 100MHz (CCCR=0x121).
• Embedded Linux changes the Redboot setting to 400MHz in performance mode
(CCCR=0x161).
• VxWorks makes no changes to the Redboot setting.
• Windows CE sets up the PXA255 clock frequency to 400MHz in power saving mode (CCCR=0x241).
The section Power savings , page 77 , only apples to Linux and VxWorks power
estimation calculations, as Windows CE currently does not provide any power management support. This section shows potential power savings for that can be achieved by shutting down sections of the VIPER that are not required.
The section External peripheral device power estimations , page 78 , provides some
examples of power consumption for various supported peripherals, such as LCD displays, CF and USB devices, which may or may not be used for your application.
The section Power estimate examples , page 79 , provides some examples to help you
better understand how to use the information provided within the tables of the
Processor current estimations ,
and External peripheral device power estimations sections.
© 2007 Eurotech Ltd Issue E 74
VIPER Technical Manual Power and power management
Processor current estimations
The current values in the tables below are referenced from running the VIPER at
400MHz in performance mode whilst the VIPER is idle.
The positive values (not shown in brackets) are the current saving by running the
VIPER at slower frequencies or in power saving mode.
The negative values are the current increases that can be expected whilst the processor is near maximum activity load.
The values shown in brackets show the total current of the VIPER from the 5V supply before taking into account any power savings from shutting down VIPER features or including additional current for external peripherals.
Please refer to the relevant operating system Quickstart Manual to select an alternative operating frequency.
Processor Vcore (V)
Active 1.1
Active 1.06
Current saving from 5V when processor core is in performance mode
400MHz
CCCR=0x161
266MHz
CCCR=0x143
200MHz
CCCR=0x141
133MHz
CCCR=0x123
Asleep
- - - -
- -
- - -
-47mA ±20mA -36mA ±20mA -
-
Idle 1.1
Idle 1.06
Asleep 0
- 7mA
-
-
-
-
- - -
7mA (327mA) 12mA (322mA)
-
-
© 2007 Eurotech Ltd Issue E 75
VIPER Technical Manual Power and power management
Processor Vcore (V)
Current saving from 5V when processor core is in power saving mode
400MHz
CCCR=0x241
300MHz
CCCR=0x321
200MHz
CCCR=0x221
100MHz
CCCR=0x121
Asleep
- - -
Active 1.1
Active 1.06 - -
-
-32mA ±20mA -25mA ±20mA
-
-
- - - -
Idle 1.1
Idle 1.06
- 19mA
-
- - -
-
29mA (308mA)
[Redboot /
VxWorks default]
-
-
54mA
(271mA)
Asleep 0 - -
Current figures when the microprocessor is active were taken with the following load conditions: calculating checksums of two files (first file: 1.1MB and second file: 0.5MB), and copying two 256kB files.
When the microprocessor is asleep the PC/104 and AC97’ Codec clocks are shutdown.
© 2007 Eurotech Ltd Issue E 76
VIPER Technical Manual Power and power management
Power savings
Use the table below to estimate power savings that can be achieved by shutting down features of the VIPER, or putting the VIPER to sleep.
CPU Ethernet USB Audio Serial
VL VL
Current saving
±3mA
Power mode
Total current
±3mA
Total power
±15mW
Current saving
±3mA
Total current
±3mA
Total power
±15mW
64mA 261mA 64mA
- - 37mA 288mA
62mA 263mA
37mA
62mA
270mA 1350mW
297mA 1485mW
272mA 1360mW
257mA 1285mW - 77mA 248mA 77mA
225mA 100mA
- Sleep - - - 108mA 217mA 1085mW 108mA
- Sleep - - Sleep 131mA 194mA 970mW
- Sleep - Sleep - 146mA 179mA 895mW
131mA
146mA
234mA 1170mW
226mA 1130mW
203mA 1015mW
188mA 940mW
162mA 810mW - Sleep - Sleep 172mA
- Sleep
- Sleep
143mA
167mA
191mA 955mW
167mA 835mW
153mA 765mW Sleep 181mA
Sleep 205mA 129mA 645mW
Sleep Sleep Sleep Sleep Sleep 276mA 49mA 245mW 285mA 49mA 245mW
© 2007 Eurotech Ltd Issue E 77
VIPER Technical Manual Power and power management
External peripheral device power estimations
Take into account any external peripherals for your application, such as:
• USB devices: keyboard, memory stick and mouse.
• CompactFLASH socket: CompactFLASH memory or Microdrive.
• Flat panel display: TFT logic + backlight, STN logic + backlight + bias voltage.
The table below gives examples of addition current/power from external peripheral devices:
32MB Sandisk
CompactFLASH
SDCFB-32-101-80
Inserted, (no access)
Reading constantly
Additional current
1mA
48mA
Additional power
5mW
240mW
64MB FlashDio™
USB memory stick
FDU100A
Inserted, (no access) 75mA 375mW
Reading constantly 121mA 605mW
NEC 5.5” LCD +
Inverter (as used with VIPER-ICE)
NL3224BC35-20
+ 65PW31
LCD and backlight on 650mA 3250mW
LCD on and backlight off 291mA 1455mW
For devices using the 3.3V supply from the CompactFLASH socket and FPD logic supply, use 92% as the regulator efficiency.
© 2007 Eurotech Ltd Issue E 78
VIPER Technical Manual Power and power management
Power estimate examples
Example 1: VIPER [Linux] asleep (microprocessor in sleep mode and every power saving option enabled)
In this case, the power consumed by the respective categories is:
• VIPER current (Linux default) = 334mA ±3mA.
• Power saving = 285mA (all power saving options enabled).
• External peripheral current = 0mA.
Therefore, the estimated VIPER current is:
334mA ±3mA - 285mA + 0mA
= 49mA ±3mA (245mW ±15mW).
Example 2: VIPER [Linux] at 200MHz in performance mode + LCD with backlight on
In this case, the power consumed by the respective categories is:
• VIPER current while idle = 334mA ±3mA - 7mA = 327mA ±3mA.
VIPER current while active = 334mA + 47mA ±20mA = 381mA ±20mA.
• Power saving = 0mA.
• External peripheral current = 650mA (LCD).
Therefore, the estimated VIPER current while idle (min) is:
327mA ±3mA + 650mA
= 977mA, ±3mA (4885mW, ±15mW). and the estimated VIPER current while active (max) is:
381mA ±20mA + 650mA
= 1031mA, ±20mA (5155mW, ±100mW).
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VIPER Technical Manual Power and power management
Example 3: VIPER [Windows CE] at 400MHz in power saving mode + LCD with backlight on + 64MB
FlashDio™ USB memory stick
In this case, the power consumed by the respective categories is:
• VIPER current (Windows CE default) while idle
VIPER current (Windows CE default) while active
±20mA
• Power saving = 0mA.
= 334mA ±3mA - 9mA
= 325mA ±3mA.
= 334mA + 99mA
= 433mA ±20mA.
• External peripheral current (USB memory stick quiescent) = 650mA (LCD) + 75mA
725mA.
External peripheral current (USB memory stick read)
121mA
= 650mA (LCD) +
Therefore, the estimated VIPER current while idle (min) is:
325mA ±3mA + 725mA
= 1050mA, ±3mA (5250mW, ±15mW). and the estimated VIPER current while active and reading from USB memory stick
(max) is:
433mA ±20mA + 771mA
= 1204mA, ±20mA (6020mW, ±100mW) .
© 2007 Eurotech Ltd Issue E 80
VIPER Technical Manual Power and power management
Processor power management
The power manager in the PXA255 offers the ability to disable the clocks to the different internal peripherals. By default, all clocks are enabled after reset. To reduce power consumption disable the clocks for any unused peripherals.
The clock speed of the processor core, PXbus (the internal bus connecting the microprocessor core and the other blocks of the PXA255), LCD and SDRAM can also be changed to achieve a balance between performance and power consumption. For more details on the internal power manager please see the PXA255 Developer’s
Manual on the Development Kit CD.
To adjust the core voltage, write the values shown in the following table to the LTC1659
DAC. When changing the core voltage it is important to ensure that the internal CPU clock is set to the correct voltage range. The CPU core supply must be set to a defined range for a particular clock. Please refer to the LTC1659 datasheet, Clocks and Power
Manager section in the PXA255 Applications Processors Developer's Manual and
Power Consumption Specifications section in the PXA255 Processor Electrical,
Mechanical and Thermal Specification on the Development Kit CD.
DAC Data Hex value CPU core voltage Comment
0x000 1.65V Not recommended to set the VCORE above
1.3V as the power consumption will increase for no performance benefit.
0x325 1.29V
0xDE5 1.1V
Typical VCORE for peak voltage range at
400MHz operation.
Maximum VCORE for medium voltage range at 200MHz operation.
Typical VCORE for high voltage range at
300MHz operation.
0xFFF 1.06V Typical VCORE for low voltage and medium voltage range, suitable for 100MHz to 200MHz operation.
When the microprocessor is in sleep mode, the CPU core voltage is shutdown.
When changing between CPU core voltages it is important to adjust the DAC
Data in steps of no greater than 0x100 at a time.
© 2007 Eurotech Ltd Issue E 81
VIPER Technical Manual Power and power management
To communicate with the VCORE DAC, use the following pins to emulate the LTC1659 interface:
GPIO LTC1659 DAC pin function
GPIO6 Data
GPIO11 Clock
Before putting the PXA255 into sleep mode, ensure the R_DIS bit in the ICR register is set to ‘1’. The PXA255 is not designed to interface to 8-bit peripherals, so only the least significant byte from the word contains the data.
Interrupt configuration and reset register
Byte lane
Bit
Field
Reset
Most Significant Byte Least Significant Byte
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - - - - - - - - - CF_
RST
R_DIS
AUTO_
CLR RETRIG
X X X X X X X X 0 0 0 0 0 0 0 0
R/W - - - - - - - - R R/W
Address 0x14100002
ICR bit functions
Bit Name
0 RETRIG
1 AUTO_CLR
2 R_DIS
3 CF_RST
4 - 7 -
0 No interrupt retrigger (embedded Linux/VxWorks)
1 Interrupt retrigger (Windows CE)
0
1
No auto clear interrupt / Toggle GPIO1 on new interrupt
(embedded Linux and VxWorks).
Auto clear interrupt / pulse low for 1.12µS on GPIO1 on new interrupt from a new interrupt source (Windows
CE).
0
1
Board reset normal
Board reset disable (Set before entering CPU sleep)
0 CompactFlash reset controlled by board reset
1 Reset CompactFlash
X No function
© 2007 Eurotech Ltd Issue E 82
VIPER Technical Manual Power and power management
UART power management
VL
COM4 and COM5 are generated from an external Exar XR16C2850 DUART. This device supports a sleep mode. By enabling this feature the DUART enters sleep mode when there are no interrupts pending. Please see the XR16C2850 datasheet on the
Development Kit CD for information on enabling the sleep mode.
GPIO12 on the PXA255 can be used to power down the RS232 transceivers on
COM1, 2, 3 and 4. The following table shows the affect of GPIO12 on the RS232 transceivers:
Transmitters Receivers
1 Shutdown High-Z High-Z
Placing the XR16C2850 and the RS232 transceivers into low power mode can reduce the power consumption of the VIPER up to 25mA ±3mA (125mW ±15mW).
CompactFLASH power management
The power supply to the CompactFLASH interface is controlled via software, and supports hot swap card insertion and CompactFLASH power down states. GPIO82 on the PXA255 is used to control the power supply. Setting this line to logic ‘0’ switches off power to the CompactFLASH interface.
Ethernet power management
The network interface supports a power down mode, which shuts down the internal
MAC and PHY blocks of the network controller. Placing the controller into low power mode can reduce the power consumption of the VIPER by up to108mA ±3mA (540mW
±15mW). To power down the PHY write ‘1’ to the power down bit in the MII PHY
Register 0, Control Register. To power down the MAC write ‘1’ to the EPH PowerEN bit in the Bank 1, Configuration Register. See the LAN91C111 datasheet contained on the
Development Kit CD for further details.
USB power management
VL
The USB Host controller supports a USB suspend state. Placing the controller into the
USB suspend state can reduce the power consumption of the VIPER by up to 37mA
±3mA (185mW ±15mW). To suspend the USB, the software must write to the relevant bits in the HcControl Register (81h). Please see the ISP1160 datasheet contained on the Development Kit CD.
To wake the USB Host Controller from suspend, pulse GPIO13 high.
© 2007 Eurotech Ltd Issue E 83
VIPER Technical Manual Power and power management
Audio power management
VL
The audio interface supports the AC’97 low power modes. Shutting down the digital and analogue interfaces can reduce consumption by up to 38mA ±3mA (190mW
±15mW).
To shut down the AC’97 Codec, the software must write to the relevant bits in the
Powerdown Control / Status Register (26h). Please see the LM4549 datasheet contained on the Development Kit CD.
TPM
VL
If the VIPER has the TPM option the VIPER consumes a further 3.5mA (17.5mW) while the TPM IC is idle, and 17mA (85mW) while the TPM IC is operating. This device cannot be shutdown.
Wake up events
When the PXA255 processor is placed into sleep mode, two sources can be used to wake the processor.
Source GPIO
USER_CONFIG1 GPIO7
RTC Alarm Internal
See section 3.5 in the PXA255 Applications Processor Developers Manual, included in the Development Kit CD.
© 2007 Eurotech Ltd Issue E 84
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