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2.2 THE ARITHMETIC UNIT
One of the functions to be expected from any computer is the ability to compute or perforin arithmetic operations. Even in a simple control problem, one often finds it useful to add 2 numbers in order to determine that a value has been reached, or subtract 2 numbers to calculate a new value which must be obtained. In addition, many problems involve some rudimentary form of decimal or binary arithmetic; certainly many applica tions of the microprocessor will involve both. The MCS650X has an 8-bit arithmetic unit which interfaces to the accumulator as shown in Figure 2.2
Partial Block Diagram including Arithmetic Logic Unit o f MCS650X
FIGURE 2.2
The arithmetic unit is composed of several major parts. The most important of these is the circuitry necessary to perform a two's comple ment add of 8-bit parallel values and generate an 8 parallel bit binary result plus a carry. A review of binary and binary coded decimal (BCD) arithmetic is presented in Appendix H. However, a quick review of the concept of "carry" is in order. The largest range than can be repre sented in an 8-bit number is 256 with values ranging between 0 and 255.
If we add any 2 numbers which result in a sum which is greater than 255, we represent the result with a ninth bit plus the 8 bits of the excess over 255. The ninth bit is called "carry."
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Table of contents
- 17 Manual Introduction
- 18 Microprocessor Architecture
- 19 The Data B u s
- 20 The Accumulator
- 20 LDA— Load Accumulator with Memory
- 21 STA— Store Accumulator in Memory
- 22 The Arithmetic Unit
- 23 ADC— Add Memory with Carry to Accumulator
- 24 Multiple Precision Addition
- 26 Signed Arithmetic
- 29 Decimal A d d i t i o n
- 30 .1.3 Add Summary
- 34 Signed Arithmetic
- 35 Decimal Subtract
- 37 ORA— "OR" Memory with Accumulator
- 37 EOR— "Exclusive OR" Memory with Accumulator
- 40 SEC— Set Carry Flag
- 41 CLC— Clear Carry Flag
- 41 Zero Flag (Z)
- 42 Decimal Mode Flag (D)
- 42 SED— Set Decimal Mode
- 43 CLD— Clear Decimal Mode
- 43 Break Command (B)
- 43 Expansion Bit
- 43 Overflow ( V )
- 44 CLV— Clear Overflow F l a g
- 44 Determination of Overflow
- 45 Negative Flag (N)
- 46 Flag S u m m a r y
- 47 Concepts of Program Sequence
- 52 JMP— Jump to New Location
- 53 Branching
- 56 Branch Instructions
- 56 BMI— Branch on Result Minus
- 56 BPL— Branch on Result P l u s
- 56 BCC— Branch on Carry Clear
- 56 BCS— Branch on Carry S e t
- 57 BEQ— Branch on Result Z e r o
- 57 BNE— Branch on Result Not Z e r o
- 57 BVS— Branch on Overflow Set
- 57 BVC— Branch on Overflow Clear
- 58 Branch S u m m a r y
- 58 Solution to Branch Out of Range
- 61 Test Instructions
- 61 CMP— Compare Memory and Accumulator
- 63 Bit Testing
- 63 BIT— Test Bits in Memory with Accumulator
- 66 Addressing Techniques
- 68 Concepts of Pipelining and Program Sequence
- 72 Memory Utilization
- 72 1/0 Control
- 73 Memory Allocation
- 73 Implied Addressing
- 75 Immediate Addressing
- 75 Absolute Addressing
- 77 Zero Page Addressing
- 79 Relative Addressing