Description
2 Description
UM1818
The STEVAL-IHP007V1 block diagram is shown in
Figure 2
. The general purpose power
line modem evaluation board is based on an ST7580 x-PSK power line modem device and an ARM 32-bit Cortex™-M3 core based STM32F103xB microcontroller. The PLM evaluation board is a fully functional communication evaluation board, with 8 programmable
I/Os, a real time clock and a Flash memory area for modem parameters and user data storage. The firmware structure is made up of several layers, each dealing with a different feature. The application layer engine is the general interface between the user program and all the parts of the evaluation board. It manages the communication ports, the evaluation board peripherals such as SCI, RTC, I/Os, LEDs and timing management. It is also the interface between the PLM communication protocol and the user application layer. The PLM communication protocol, itself made up of several layers, implements and manages the power line communication, manages the conflicts, timing and repetitions, the addressing, and so on. Please refer to AN4018 for details on the ST7580 communication protocol features and application services provided. Some features are managed directly by the application engine, and are transparent to the user, such as the RTC management or the board parameter update, as well as the board programming and configuration, which is done by particular programming or service commands managed and acknowledged directly by the application engine. Even the remote firmware update is managed by the application engine and allows the firmware being update remotely by power line modem.
The STEVAL-IHP007V1 is powered by a dual regulated DC power source, +12VDC (pin 1) and +3.3 VDC (pin 2) from the power supply connector (J2). The pin 3 is the ground.
The communication is done via power line, which is applied to the board using the J1 connector, where the pin 1 must be connected to the neutral wire while the pin 3 to the phase wires (refer to the
Appendix A
).
Figure 2. STEVAL-IHP007V1 block diagram
4/47
It is possible to connect the evaluation board in a three phase line (in case of communication modules are connected in all three phases), in this case an external
DocID026935 Rev 3
UM1818 Description
capacitor of 220 nF X1 must be connected to any additional phase, and then the other side of capacitors together with the common pin 5 of the J2 connector, following the schematic
shown in the
Figure 3
, and the 0 Ω resistor R1 must be mounted.
Figure 3. Three phase connection
The GP PLM module is provided of a user interface (J3) shown in
Figure 4
where there are
connected the SPI interface pins (MOSI, MISO, SCK and NSS), the RS232 interface pins
(Tx and Rx), the USB interface pins (D+ and D-) and the user programmable general purpose I/O pins. Remark that those pins are directly connected to the microcontroller, so be careful to provide the correct insulation and protection depending on the use those pins are addressed.
It is possible to power the PLM using the +3.3 VDC (pin 19), +12 VDC (pin 20 or 22) and
GND (pins 17, 23, 20 and 24) of this connector instead of the connector J2, using only a single connector for power supply and control signals.
A lithium backup battery mounted on the board and 32 kHz quartz allows the use of the full functionality of the internal RTC of the microcontroller, allowing precise time-based operations.
DocID026935 Rev 3 5/47
47
Description UM1818
Figure 4. User interface connector
PLM_GPIO7
PLM_GPIO6
PLM_GPIO5
PLM_GPIO4
PLM_GPIO3
PLM_GPIO2
PLM_GPIO1
PLM_GPIO0
VCC
J3
14
16
18
20
22
24
2
4
6
8
10
12
13
15
17
19
21
23
9
11
5
7
1
3
TSW-112-08-L- D- RA
SPI_ MOSI
SPI_ MISO
SPI_S CK
SPI_ NSS
USART_RX
USART_TX
USB_ DP
USB_ DM
BOOT0
VDDIO
GSPG23072015DI1045
A two color LED allows the signaling the board operations, data transmission and reception.
Finally, a programming connector allows the firmware download and debug, even if it is possible to use the remote firmware update feature to remotely update the firmware using the PLM, as described further in this user manual. If the IAR - JLINK/JTRACE is used for the firmware downloading, a simple JTAG adapter is necessary. The
Figure 5
shows the
adapter schematics.
Figure 5. Programming connector JTAG adapter
6/47 DocID026935 Rev 3
