Chapter 21 AIOP Code Generation
21.5.6.2 Specifying RAM addr_mode
Use MEMORY directive and any of the following parameters to specify the RAM addr_mode.
addr_mode = external-To specify an external RAM addr_mode.
addr_mode = internal-To specify an internal RAM addr_mode.
By default the RAM addresses are internal.
For example, RAM : org = 0x000e0000, addr_mode = external will make sections defined in the RAM external.
NOTE
addr_mode is ignored if SDA PIC/PID in the ABI list box in the CodeWarrior IDE's Properties > C/C++ Build > Settings
> Tool Settings > CPU panel is not selected.
21.6 Variable Length Encoding
The Variable Length Encoding (VLE) instruction set architecture is an extension to the instruction set specified in Freescale Semiconductor's Book E Implementation Standard
(EIS) for AIOP. This instruction set adds a few identically operating counterparts to the regular EIS instruction set. But where regular EIS instructions occupy 32 bits and must be aligned to 32-bit boundaries, VLE instructions are either 16 or 32 bits long and can be aligned to 16-bit boundaries. This extra flexibility in instruction encoding and alignment allows the compiler and linker to greatly compress the size of runtime object code with only a small penalty in execution performance.
These topics describe how and when to configure the build tools to generate VLE object code:
•
Processors With VLE Capability
•
Compiling VLE Instructions
•
Assembling VLE Instructions
•
Linking VLE Object Code
21.6.1 Processors With VLE Capability
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Variable Length Encoding
The VLE (Variable Length Encoding) instruction set is an extension to the instruction set specified in the Freescale Book E Implementation Standard (EIS).
21.6.2 Compiling VLE Instructions
Table 21-9 shows how to control VLE (Variable Length Encoding) code generation.
Table 21-9. Controlling VLE code generation
To control this option from here...
CodeWarrior IDE
C/C++ source code command line
use this setting
__declspec(vle_on) __declspec(vle_off)
-vle
21.6.3 Assembling VLE Instructions
The mnemonics for VLE (Variable Length Encoding) instructions begin with "se_" or
"e_". The compiler's inline assembler recognizes these mnemonics when the compiler is configured to generate VLE object code.
Only a subset of EIS instructions have equivalent VLE instructions. To save you time and effort, the inline assembler can convert regular EIS instructions to equivalent VLE instructions automatically. In other words, the inline assembler can generate VLE object
code from inline assembly statements that use only regular mnemonics. Table 21-10
shows how to control VLE code generation for inline assembly statements.
Table 21-10. Controlling VLE inline assembly
To control this option from here...
CodeWarrior IDE command line -ppc_asm_to_vle
use this setting
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Chapter 21 AIOP Code Generation
The standalone assembler also recognizes and generates VLE instructions. Table 21-11
shows how to control VLE code generation with the standalone assembler.
Table 21-11. Controlling VLE code generation for the standalone assembler use this setting To control this option from here...
CodeWarrior IDE command line
-ppc_asm_to_vle
To specify that a section containing executable code should be executed in the processor's
VLE mode, use the text_vle
identifier with the
.section
directive. Figure 21-1 shows
examples.
Figure 21-1. Examples of specifying VLE sections in standalone assembly
.section .text_vle # Section name is .text_vle
.section .text,text_vle # Section name is .text
.section .littletext,text_vle # Section name is .littletext
Unlike the inline assembler, the standalone assembler does not offer the option to convert regular instruction mnemonics to VLE instructions. To perform this conversion automatically, copy and paste standalone assembly source code into a C or C++ source
file, shown in Figure 21-2 .
Figure 21-2. Using automatic VLE instruction conversion
extern asm void my_func(void)
{
nofralloc /* No stack frame. */
/* Paste standalone assembly source code here. */
}
21.6.4 Linking VLE Object Code
A processor capable of executing VLE (Variable Length Encoding) instructions must use separate memory pages for VLE and regular instructions. The compiler and linker ensure this separation by placing executable code that uses VLE instructions and regular instructions in separate object code sections.
To maintain this separation in your own linker command file, specify output sections for
VLE and regular instructions.
Listing 21-7 on page 385
shows an example. This linker control file specifies that output sections named
.init_vle
and
.text_vle
should only contain object code that the compiler has tagged with
VLECODE
.
Listing 21-7. Separating VLE and regular object code in the linker's output file
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