Code Generation Command-Line Options. NXP CodeWarrior Development Studio
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path
The recursive library search path to append.
Remarks
This command is global. This is a linker option.
11.5.39 -l+
Adds a library by searching access path for a specified library filename.
Syntax
-l+file
The parameters are: file
Name of the library file to search.
Remarks
The linker searches access path for the specified lib<file>.<ext>, where <ext> is a typical library extension. If the file is not found then search for <file>. This command is casesensitive.
11.6 Code Generation Command-Line Options
This chapter explains the following command-line options:
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11.6.1 -abi
Chooses which ABI (Application Binary Interface) to conform to.
Syntax
-abi
keyword
The choices for keyword are: eabi
Use the Power Architecture Embedded ABI. This choice is the default.
SysV
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Use the UNIX System V ABI without GNU extensions.
SuSE
Use the SuSE® Linux ABI with GNU extensions.
YellowDog
Use the Yellow Dog™ Linux ABI with GNU extensions sda_pic_pid
Use position-independent addressing executable code and data.
Remarks
This option is global.
11.6.2 -align
Specifies structure and array alignment.
Syntax
-align
keyword[,...]
The choices for keyword are: power[pc]
Use conventional Power Architecture alignment. This choice is the default.
mac68k
Use conventional Mac OS® 68K alignment.
mac68k4byte
Use Mac OS® 68K 4-byte alignment.
array[members]
Align members of arrays, too.
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11.6.3 -altivec_move_block
Controls the use of Altivec instructions to optimize block moves.
Syntax
-altivec_move_block
-noaltivec_move_block
Remarks
The default setting is
-noaltivec_move_block
.
11.6.4 -big
Generates object code and links an executable image to use big-endian data formats.
Syntax
-big
Remarks
This is the default setting for the compiler and linker.
11.6.5 -common
Moves uninitialized data into a common section.
Syntax
-common on | off
Remarks
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The default is off
.
11.6.6 -fatext
Use eppc.o
as the file name extension for object files.
Syntax
-fatext
Remarks
Normally, the compiler generates object code files that have a file name extension of
.o
.
This option tells the compiler to use eppc.o
as a file name extension instead. If the compiler is invoked with this option and the compiler invokes the linker, the linker will search for object files that use the eppc.o
file name extension.
11.6.7 -fp
Controls floating-point code generation.
Syntax
-fp
keyword
The choices for keyword are: none | off
No floating point code generation.
soft[ware]
Use software libraries to perform floating-point operations. This is the default.
hard[ware]
Use the processor's built-in floating-point capabilities to perform floating-point operations.
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dpfp
Use the processor's double-precision floating-point capabilities on the e500v2 processor.
spfp
Use software libraries for floating-point operations that use the double
data type and use the e500 SPE-EFPU floating-point capabilities for other floating-point operations.
spfp_only
Use to have the compiler consider double
and long double
data types as floating point
. This option is only supported for e200 (Zen or VLE) and e500v1 processors that support SPFP
APU.
NOTE
When you downgrade from double
data type to a floating point you will lose precision and range. If your expected numbers are within the range supported by a floating point data type, then this option might dramatically speed up and shrink your code.
Do not use this option if you have instances in your project that depend on the size of a double
data type.
fmadd
Equivalent to
-fp hard -fp_contract
.
Remarks
When using the
-fp spfp_only
option, the size of a double
data type changes to a floating point data type, if you have existing code that is expecting to find certain bits at certain locations of the exponent or significand, then you will have to change that code to expect
4 byte doubles. Your code can make a test as shown in
Listing: Example Test Code
if (sizeof(double) == 4) {
...
} else {
... }
The e500 and VLE library project files have targets and pre-built libraries (with
SP
in the name) that support this feature. Ensure you pick the right libraries to include in a project that supports this feature else you may call a function with a
8 byte double
parameter and only pass a
4 byte double
argument. The linker will report with a warning if you mix up the libraries - make sure you have linker warnings enabled.
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If you have a library that doesn't use floating point, try setting it to none
for the floating point model by using the
-fp none
option. Libaries with none
floating point do not cause a warning when added to projects using another floating point model.
The sample code in Sample Code assumes that you are using the
-fp spfp_only
option and have included
SP
libraries. Your existing code makes a call to a MSL math function and a user defined function that takes a double
argument and returns a double data type.
Listing: Sample Code
#include <math.h>
extern double my_func(double);
extern double d1, d2;
void main()
{
d1 = pow(d2, 2.0);
d2 = my_func(d1);
}
Following can be observed while executing the sample code in Sample Code :
•
2.0
will be treated as a
4 byte double
constant (exactly like
2.0f
).
• Storage for d1
and d2
will be
4 bytes
each (exactly like floats).
• MSL will either inline or call a stub function for pow
which will call powf
.
• my_func will receive and return a
4 byte double
. As long as my_func
doesn't do bit twiddling or require numbers not representable in a float, it will do its job correctly.
NOTE
If you are using a Zen processor and are using the
-fp spfp_only
option, ensure passing
-spe_addl_vector
instead of
spe_vector
in order to have the compiler generate Multiply-
Add instructions.
11.6.8 -fp_contract
Generates fused multiply-addition instructions.
Syntax
-fp_contract
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Remarks
This option is the same as the
-maf
option.
11.6.9 -func_align
Specifies alignment of functions in executable code.
Syntax
-func_align 4 | 8 | 16 | 32 | 64 | 128
Remarks
The default alignment is
4
. However, at an optimization level
4
, the alignment changes to
16
. If you are using
-func_align 4
(or none
) and if you are compiling for VLE, then the linker will compress gaps between VLE functions:
• if those functions are not called by a Classic PPC function
• the function has an alignment greater than
4
.
NOTE
Compression of the gaps will only happen on files compiled by the CodeWarrior compiler.
11.6.10 -gen-fsel
Deprecated. Use
-use_fsel
instead.
Syntax
-gen-fsel
-no-gen-fsel
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11.6.11 -little
Generates object code and links an executable image to use little-endian data formats.
Syntax
-little
11.6.12 -maf
Controls the use of fused multiply-addition instructions.
Syntax
-maf on | off
Remarks
The
-maf on
option tells the compiler to generate fused multiply-addition operations instead of separate multiplication and addition instructions. The
-maf off
option tells the compiler to use separate multiplication and addition instructions.
11.6.13 -ordered-fp-compares
Controls the assumption of no unordered values in comparisons.
Syntax
-ordered-fp-compares
-no-ordered-fp-compares
Remarks
The default is
-no-ordered-fp-compares
.
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11.6.14 -pool
Controls the grouping of similar-sized data objects.
Syntax
-pool[data] on | off
Remarks
Use this option to reduce the size of executable object code in functions that refer to many object of the same size. These similar-sized objects do not need to be of the same type. The compiler only applies this option to a function if the function refers to at least 3 similar-sized objects. The objects must be global or static.
At the beginning of the function, the compiler generates instructions to load the address of the first similar-sized object. The compiler then uses this address to generate 1 instruction for each subsequent reference to other similar-sized objects instead of the usual 2 instructions for loading an object using absolute addressing.
This option is equivalent to the pool_data
pragma.
The default is on
.
11.6.15 -processor
Generates and links object code for a specific processor.
Syntax
-proc[essor]
keyword
The choices for keyword are:
401 | 403 | 405 | 505 | 509 | 5100 | 5200 | 555 | 56x |
601 | 602 | 603 | 603e | 604 | 604e | 740 | 74x | 750 |
75x | 801 | 821 | 823 | 850 | 85x | 860 | 86x | 87x | 88x
| 7400 | 744x | 7450 | 745x | 82xx| 8240 | 824x | 8260 |
827x | 8280 | 85xx | e300v1 | e300c1 | e300c2 | e300c3 |
e300c4 | e500v1 | e500v2 | e600 | Zen | 5565 | gekko |
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generic
Remarks
The keyword parameter specifies the processor core. The default for keyword is generic
.
To identify which core your target device uses, refer to the product page of the target device on the Freescale web site.
The e300v1 keyword is deprecated.
11.6.16 -profile
Controls the appearance of calls to a profiler library at the entry and exit points of each function.
Syntax
-profile on | off
Remarks
The default is off
.
11.6.17 -ppc_asm_to_vle
Converts regular Power Architecture assembler mnemonics to equivalent VLE (Variable
Length Encoded) assembler mnemonics in the inline assembler and standalone assembler.
Syntax
-ppc_asm_to_vle
Remarks
C/C++ source is input to compiler inline assembler where as assembly source is input to standalone assembler.
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While translating assembly statements in C or C++ or assembly source code, the compiler inline assembler or standalone assembler will replace each regular Power
Architecture assembler mnemonic with its matching VLE instruction if one exists. The mnemonics for VLE (Variable Length Encoding) instructions begin with se_
or e_
. The compiler's inline assembler recognizes these mnemonics when the compiler is configured to generate VLE object code. The same is with assembler. If an equivalent VLE instruction does not exist for an UISA instruction then it might generate multiple VLE instructions for that operation.
Assembler changes the section
.text
to
.text_vle
. For user defined sections, LCF needs modification.
Example
Consider test.s
.section .mytext
tmp: do_loop00:
B exit0
Add r0,r0,r1
.text
exit0:
blr
Assemble with option
-ppc_asm_to_vle
In LCF
.text_vle (VLECODE) : {
*(.text)
*(.text_vle)
(.mytext)
}
NOTE
Assembler does not emit a 16-bit VLE instruction for branch instructions, if the label definition does not exist at that point.
11.6.18 -rambuffer
Specifies a runtime address in which to store the executable image in RAM so that it may be transferred to flash memory.
Syntax
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-rambuffer
addr
Remarks
This option specifies information for a legacy flashing tool (some development boards that used the Power Architecture 821 processor). This tool required that the executable image must first be loaded to an area in RAM before being transferred to ROM. Do not use this option if your flash memory tool does not follow this behavior.
The CodeWarrior tools ignore this option if it is not used with the
-romaddr
option.
11.6.19 -readonlystrings
Places string constants in a read-only section.
Syntax
-readonlystrings
11.6.20 -relax_ieee
Controls the use of relaxed IEEE floating point operations.
Syntax
-relax_ieee
-norelax_ieee
Remarks
The default is
-relax_ieee
.
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11.6.21 -romaddr
Generates a ROM image and specifies the image's starting address at runtime.
Syntax
-romaddr
addr
11.6.22 -rostr
Equivalent to the
-readonlystrings
option.
Syntax
-rostr
11.6.23 -schedule
Controls the rearrangement of instructions to reduce the effects of instruction latency.
Syntax
-schedule on | off
Remarks
The default is off
.
11.6.24 -spe_vector
Enables the SPE vector support.
Syntax
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-spe_vector
Remarks
This option needs to be enabled when the floating point is set to SPFP or DPFP as both
SPFP and DPFP require support from the SPE vector unit. If the option is not turned on, the compiler generates a warning and automatically enables the SPE vector generation.
11.6.25 -spe2_vector
Enables the SPE2 vector support
Syntax
-spe2_vector
Remarks
In order to use the SPE2 intrinsics:
• Include
<spe.h>
in the source file.
• From the EPPC Processor settings panel:
• Select Zen from the Processor list box.
• Select spe2 from the vector list box.
NOTE
SPE2 instructions are supported in standalone assembler and compiler's inline assembler. These instructions are currently not fully validated, users must use them at their own risks.
11.6.26 -spe_addl_vector
Enables the additional SPE fused multiply-add and multiply-subtract instuctions support.
Syntax
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-spe_addl_vector
Remarks
The e200 z3 and z6 cores support 8 additional SPE fused multiply-add and multiplysubtract instructions. This option tells the compiler to generate the additional SPE instructions, when appropriate, for more optimized codes.
This option also turns on the -spe_vector option.
11.6.27 -strict_ieee
Specifies the use of strict IEEE floating point operations.
Syntax
-strict_ieee
Remarks
This option is the same as the
-norelax_ieee
option.
11.6.28 -use_lmw_stmw
Controls the use of multiple load and store instructions for function prologues and epilogues.
Syntax
-use_lmw_stmw on | off
Remarks
This option is only available for big-endian processors. This option is not available for big-endian e500v1 and e500v2 architectures when vector and double-precision floatingpoint instructions are used. The default is off.
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11.6.29 -use_fsel
Controls the use of fsel
instructions.
Syntax
-use_fsel on | off
Remarks
Do not turn on this option if the Power Architecture processor of your target platform does not have hardware floating-point capabilities that includes fsel
. This option only has an effect if
-relax_ieee
is also specified on the command line. The default is off
.
11.6.30 -use_isel
Controls the use of isel
instructions.
Syntax
-use_isel on | off
Remarks
Do not turn on this option if the Power Architecture processor of your target platform does not implement the Freescale ISEL APU. The default is off
.
11.6.31 -vector
Specifies AltiVec™ vector options.
Syntax
-vector
keyword[,...]
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