STMicroelectronics STA350BW
Manuals and User Guides for STMicroelectronics STA350BW. We found 2 manuals for free downloads Data Sheet, User manual
Pages: 94 STMicroelectronics STA350BW Data Sheet
Brand: STMicroelectronics Category: Audio mixers Size: 2 MB
Languages: English
Table of contents
- 12 Description
- 13 Block diagram
- 14 Pin connections
- 14 Connection diagram
- 14 Pin description
- 16 Electrical specifications
- 16 Absolute maximum ratings
- 16 Thermal data
- 17 Recommended operating conditions
- 17 Electrical specifications for the digital section
- 18 Electrical specifications for the power section
- 20 Power-on/off sequence
- 21 Characterization curves
- 26 Mono parallel BTL characteristics
- 28 Serial audio interface
- 28 Timings
- 28 Delay serial clock enable
- 28 Channel input mapping
- 29 Processing data paths
- 31 C bus specification
- 31 Communication protocol
- 31 Data transition or change
- 31 Start condition
- 31 Stop condition
- 31 Data input
- 31 Device addressing
- 32 Write operation
- 32 Byte write
- 32 Multi-byte write
- 32 Read operation
- 32 Current address byte read
- 32 Current address multi-byte read
- 32 Random address byte read
- 32 Random address multi-byte read
- 33 Write mode sequence
- 33 Read mode sequence
- 34 Register description
- 37 Configuration register A (addr 0x00)
- 37 Master clock select
- 38 Interpolation ratio select
- 38 Thermal warning recovery bypass
- 38 Thermal warning adjustment bypass
- 39 Fault detect recovery bypass
- 39 Configuration register B (addr 0x01)
- 39 Serial audio input interface format
- 40 Serial data interface
- 40 Serial data first bit
- 42 Delay serial clock enable
- 42 Channel input mapping
- 43 Configuration register C (addr 0x02)
- 43 FFX power output mode
- 43 FFX compensating pulse size register
- 44 Overcurrent warning detect adjustment bypass
- 44 Configuration register D (addr 0x03)
- 44 High-pass filter bypass
- 44 De-emphasis
- 45 DSP bypass
- 45 Post-scale link
- 45 Biquad coefficient link
- 45 Dynamic range compression/anti-clipping bit
- 46 Zero-detect mute enable
- 46 Submix mode enable
- 46 Configuration register E (addr 0x04)
- 46 Max. power correction variable
- 46 Max. power correction
- 47 Noise-shaper bandwidth selection
- 47 AM mode enable
- 47 PWM speed mode
- 47 Distortion compensation variable enable
- 47 Zero-crossing volume enable
- 48 Soft-volume update enable
- 48 Configuration register F (addr 0x05)
- 48 Output configuration
- 54 Invalid input detect mute enable
- 54 Binary output mode clock loss detection
- 54 LRCK double trigger protection
- 54 Auto EAPD on clock loss
- 54 IC power-down
- 55 External amplifier power-down
- 55 Volume control registers (addr 0x06 - 0x0A)
- 55 Mute/line output configuration register
- 55 Master volume register
- 55 Channel 1 volume
- 56 Channel 2 volume
- 56 Channel 3 / line output volume
- 57 Audio preset registers (addr 0x0B and 0x0C)
- 57 Audio preset register 1 (addr 0x0B)
- 58 Audio preset register 2 (addr 0x0C)
- 58 AM interference frequency switching
- 58 Bass management crossover
- 59 Channel configuration registers (addr 0x0E - 0x10)
- 59 Tone control bypass
- 59 EQ bypass
- 60 Volume bypass
- 60 Binary output enable registers
- 60 Limiter select
- 60 Output mapping
- 61 Tone control register (addr 0x11)
- 61 Tone control
- 61 Dynamic control registers (addr 0x12 - 0x15)
- 61 Limiter 1 attack/release rate
- 61 Limiter 1 attack/release threshold
- 61 Limiter 2 attack/release rate
- 62 Limiter 2 attack/release threshold
- 65 Limiter 1 extended attack threshold (addr 0x32)
- 65 Limiter 1 extended release threshold (addr 0x33)
- 66 Limiter 2 extended release threshold (addr 0x35)
- 66 User-defined coefficient control registers (addr 0x16 - 0x26)
- 66 Coefficient address register
- 66 Coefficient b1 data register bits
- 67 Coefficient b2 data register bits
- 67 Coefficient a1 data register bits
- 67 Coefficient a2 data register bits
- 68 Coefficient b0 data register bits
- 68 Coefficient write/read control register
- 71 User-defined EQ
- 71 Pre-scale
- 71 Post-scale
- 72 Overcurrent post-scale
- 73 Variable max. power correction registers (addr 0x27 - 0x28)
- 73 Variable distortion compensation registers (addr 0x29 - 0x2A)
- 74 Fault detect recovery constant registers (addr 0x2B - 0x2C)
- 74 Device status register (addr 0x2D)
- 75 EQ coefficients and DRC configuration register (addr 0x31)
- 76 Extended configuration register (addr 0x36)
- 76 Dual-band DRC
- 77 EQ DRC mode
- 78 Extended post-scale range
- 78 Extended attack rate
- 79 Extended biquad selector
- 79 EQ soft-volume configuration registers (addr 0x37 - 0x38)
- 80 DRC RMS filter coefficients (addr 0x39-0x3E)
- 81 Extra volume resolution configuration registers (address 0x3F)
- 82 Quantization error noise correction (address 0x48)
- 83 Extended coefficient range up to -4...4 (address 0x49, 0x4A)
- 84 Miscellaneous registers (address 0x4B, 0x4C)
- 84 Rate powerdown enable (RPDNEN) bit (address 0x4B, bit D7)
- 84 Bridge immediate off (BRIDGOFF) bit (address 0x4B, bit D5)
- 85 Channel PWM enable (CPWMEN) bit (address 0x4B, bit D2)
- 87 Package information
- 92 Ordering information
- 93 Revision history
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