STMicroelectronics STM32WLE5CC
Manuals and User Guides for STMicroelectronics STM32WLE5CC. We found 6 manuals for free downloads Data Sheet, Reference manual, User manual
Below you will find brief information for STM32WLE5C8, STM32WLE5CB, STM32WLE5CC, STM32WLE4C8, STM32WLE4CB, STM32WLE4CC. These are multiprotocol LPWAN 32-bit Arm Cortex-M4 microcontrollers with up to 256KB Flash and 64KB SRAM. Featuring a sub-GHz radio supporting LoRa, (G)FSK, (G)MSK, and BPSK modulations, they're designed for ultra-low-power applications. Key capabilities include hardware encryption, a true random number generator, and various low-power modes for extended battery life in IoT devices.
Key Features
Sub-GHz radio (150 MHz to 960 MHz)
LoRa, (G)FSK, (G)MSK, BPSK modulation
Up to +22 dBm transmit power
AES 256-bit hardware encryption
Ultra-low-power modes (down to 31 nA)
Arm Cortex-M4 core up to 48 MHz
Pages: 146 STMicroelectronics STM32WLE5CC Data Sheet
Brand: STMicroelectronics Category: Development software Size: 2 MB
Languages: English
Table of contents
- 16 Table 3. Access status versus RDP level and execution mode
- 19 Figure 2. Sub-GHz radio system block diagram
- 19 Transmitter high output power
- 20 Figure 3. High output power PA
- 20 Table 4. Sub-GHz radio transmit high output power
- 20 Transmitter low output power
- 21 Figure 4. Low output power PA
- 22 Table 5. FSK mode intermediate frequencies
- 22 Table 6. LoRa mode intermediate frequencies
- 24 Figure 5. Power-up/power-down sequence
- 25 Figure 6. Power supply overview
- 25 Figure 7. Supply configurations
- 33 Table 9. MCU and sub-GHz radio operating modes
- 40 Table 12. Temperature sensor calibration values
- 41 Table 13. Internal voltage reference calibration values
- 61 Figure 11. Pin loading conditions
- 61 Figure 12. Pin input voltage
- 62 Figure 13. Power supply scheme
- 63 Figure 14. Current consumption measurement scheme
- 65 Table 24. Main performances at VDD = 3 V
- 65 Table 25. General operating conditions
- 67 Table 26. Operating range of RF pads
- 68 Table 27. Sub-GHz radio power consumption
- 69 Table 28. Sub-GHz radio power consumption in transmit mode
- 70 Table 29. Sub-GHz radio general specifications
- 71 Table 30. Sub-GHz radio receive mode specifications
- 72 Table 31. Sub-GHz radio transmit mode specifications
- 73 Table 32. Sub-GHz radio power management specifications
- 74 Table 33. Operating conditions at power-up/power-down
- 75 Table 34. Embedded reset and power-control block characteristics
- 76 Table 35. Embedded internal voltage reference
- 77 Figure 15. VREFINT versus temperature
- 77 Typical and maximum current consumption
- 78 Table 36. Current consumption in Run and LPRun modes, CoreMark code with data running from Flash memory, ART enable (cache ON, prefetch OFF)
- 79 Table 37. Current consumption in Run and LPRun modes, CoreMark code with data running from SRAM1
- 80 Table 38. Typical current consumption in Run and LPRun modes, with different codes running from Flash memory, ART enable (cache ON, prefetch OFF)
- 82 Table 39. Typical current consumption in Run and LPRun modes, with different codes running from SRAM1
- 84 Table 40. Current consumption in Sleep and LPSleep modes, Flash memory ON
- 84 Table 41. Current consumption in LPSleep mode, Flash memory in power-down
- 85 Table 42. Current consumption in Stop 2 mode
- 85 Table 43. Current consumption during wakeup from Stop 2 mode
- 86 Table 44. Current consumption in Stop 1 mode
- 86 Table 45. Current consumption during wakeup from Stop 1 mode
- 87 Table 46. Current consumption in Stop 0 mode
- 87 Table 47. Current consumption during wakeup from Stop 0 mode
- 88 Table 48. Current consumption in Standby mode
- 88 Table 49. Current consumption during wakeup from Standby mode
- 89 Table 50. Current consumption in Shutdown mode
- 90 Table 51. Current consumption in VBAT mode
- 90 Table 52. Current under Reset condition
- 91 I/O system current consumption
- 92 On-chip peripheral current consumption
- 92 Table 53. Peripheral current consumption
- 94 Table 54. Low-power mode wakeup timings
- 95 Table 55. Regulator modes transition times
- 95 High-speed external user clock generated from an external source
- 95 Crystal oscillator
- 95 Table 56. HSE32 crystal requirements
- 96 Table 57. HSE32 oscillator characteristics
- 96 TCXO regulator
- 96 Table 58. HSE32 TCXO regulator characteristics
- 97 Low-speed external user clock generated from an external source
- 97 Table 59. Low-speed external user clock characteristics
- 97 Figure 16. Typical application with a 32.768 kHz crystal
- 98 Figure 17. Low-speed external clock source AC timing diagram
- 98 Table 60. Low-speed external user clock characteristics – Bypass mode
- 98 High-speed internal (HSI16) RC oscillator
- 98 Table 61. HSI16 oscillator characteristics
- 99 Figure 18. HSI16 frequency versus temperature
- 100 Multi-speed internal (MSI) RC oscillator
- 100 Table 62. MSI oscillator characteristics
- 103 Figure 19. Typical current consumption vs. MSI frequency
- 103 Low-speed internal (LSI) RC oscillator
- 103 Table 63. LSI oscillator characteristics
- 104 Table 64. PLL characteristics
- 104 Table 65. Flash memory characteristics
- 105 Table 66. Flash memory endurance and data retention
- 105 Functional EMS (electromagnetic susceptibility)
- 106 Table 67. EMS characteristics
- 106 Designing hardened software to avoid noise problems
- 106 Electromagnetic interference (EMI)
- 107 Table 68. EMI characteristics
- 107 Electrostatic discharge (ESD)
- 107 Table 69. ESD absolute maximum ratings
- 107 Static latch-up
- 107 Table 70. Electrical sensitivities
- 108 Functional susceptibility to I/O current injection
- 108 Table 71. I/O current injection susceptibility
- 108 General input/output characteristics
- 109 Table 72. I/O static characteristics
- 110 Figure 20. I/O input characteristics - VIL and VIH on all I/Os
- 110 Output driving current
- 110 Output voltage levels
- 111 Table 73. Output voltage characteristics
- 111 Input/output AC characteristics
- 111 Table 74. I/O AC characteristics
- 113 Table 75. NRST pin characteristics
- 113 Figure 21. Recommended NRST pin protection
- 113 Table 76. Analog switches booster characteristics
- 114 Table 77. ADC characteristics
- 115 Table 78. Maximum ADC RAIN values
- 116 Table 79. ADC accuracy
- 118 Figure 22. ADC accuracy characteristics
- 119 Figure 23. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function
- 119 General PCB design guidelines
- 119 Table 80. TS characteristics
- 120 Table 81. VBAT monitoring characteristics
- 120 Table 82. VBAT charging characteristics
- 120 Table 83. VREFBUF characteristics
- 121 Figure 24. VREFOUT_TEMP when VRS = 0
- 122 Figure 25. VREFOUT_TEMP when VRS = 1
- 122 Table 84. DAC characteristics
- 124 Figure 26. 12-bit buffered/non-buffered DAC
- 125 Table 85. DAC accuracy
- 126 Table 86. COMP characteristics
- 127 Table 87. TIMx characteristics
- 128 Table 88. IWDG min/max timeout period at 32 kHz (LSI)
- 128 I2C interface characteristics
- 128 Table 89. Minimum I2CCLK frequency in all I2C modes
- 129 Table 90. I2C analog filter characteristics
- 129 USART characteristics
- 129 Table 91. USART characteristics
- 130 SPI characteristics
- 130 Table 92. SPI characteristics
- 131 Figure 27. SPI timing diagram - Slave mode and CPHA = 0
- 132 Figure 28. SPI timing diagram - Slave mode and CPHA = 1
- 132 Figure 29. SPI timing diagram - Master mode
- 133 JTAG/SWD characteristics
- 133 Table 93. Dynamic JTAG characteristics
- 133 Table 94. Dynamic SWD characteristics
- 136 Figure 32. UFQFPN48 marking example (package top view)
- 139 Figure 35. UFBGA73 marking example (package top view)
Other manuals and documents
Frequently Answers and Questions
What frequency range does the sub-GHz radio support?
The sub-GHz radio supports a frequency range from 150 MHz to 960 MHz.
What type of modulations are supported by microcontroller?
The microcontroller supports LoRa, (G)FSK, (G)MSK, and BPSK modulations.
Does the device have hardware encryption?
Yes, the device features AES 256-bit hardware encryption.
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