CIRCUIT DESCRIPTION. Kenwood TK-3202, TK-3206

8

TK-3202/3206

CIRCUIT DESCRIPTION

1. Frequency Configuration

The receiver utilizes double conversion. The first IF is 38.85

MHz and the second IF is 450 kHz. The first local oscillator signal is supplied from the PLL circuit.

The PLL circuit in the transmitter generates the necessary frequencies. Fig. 1 shows the frequencies.

ANT TX/RX: 450 ~ 490MHz (TK-3202(K,M), TK-3206(M))

400 ~ 430MHz (TK-3206(M3))

470 ~ 512MHz (TK-3202(K2,M2))

CF

450kHz

MCF

ANT SW

RF

AMP

TX

AMP

RF

AMP

IF SYSTEM

TX: 450 ~ 490MHz

(TK-3202(K,M), TK-3206(M))

400 ~ 430MHz

(TK-3206(M3))

470 ~ 512MHz

(TK-3202(K2,M2))

38.85MHz

38.4MHz

RX: 411.15 ~ 451.15MHz

(TK-3202(K,M), TK-3206(M)) X3 multiply

361.15 ~ 391.15MHz

(TK-3206(M3))

431.15 ~ 473.15MHz

(TK-3202(K2,M2))

PLL

VCO

AF

AMP

SP

TCXO 12.8MHz

MIC

MIC

AMP

Fig. 1 Frequency configuration

2. Receiver

The frequency configuration of the receiver is shown in Fig. 2.

ANT

BPF

RF AMP

Q205 BPF

MIXER

Q204

MCF

XF201

IF AMP

Q203

ANT SW

TUNE TUNE 1st Local

IC201

IF,MIX,DET

CF201

IC301

AQUA

AF VOL

Q1

X3 multiply

2nd Local

X1

TCXO 12.8MHz

Fig. 2 Receiver section

IC302

AF PA

SP

1) Front End (RF AMP)

The signal coming from the antenna passes through the transmit/receive switching diode circuit, (D103,D104,D106 and D122) passes through a BPF (L229 and L228), and is amplified by the RF amplifier (Q205).

The resulting signal passes through a BPF (L214,L212 and

L211) and goes to the mixer. These BPFs are adjusted by variable capacitors (D203,D204,D205,D206 and D210). The input voltage to the variable capacitor is regulated by voltage output from the microprocessor (IC405).

2) First Mixer

The signal from the front end is mixed with the first local oscillator signal generated in the PLL circuit by Q1 to produce a first IF frequency of 38.85 MHz.

The resulting signal passes through the XF201 MCF to cut the adjacent spurious and provide the opitimun characteristics, such as adjacent frequency selectivity.

3) IF Amplifier Circuit

The first IF signal is passed through a four-pole monolithic crystal filter (XF201) to remove the adjacent channel signal.

The filtered first IF signal is amplified by the first IF amplifier

(Q203) and then applied to the lF system IC (IC201). The IF system IC provides a second mixer, second local oscillator, limiting amplifier, quadrature detector and RSSI (Received

Signal Strength Indicator). The second mixer mixes the first

IF signal with the 38.4MHz of the second local oscillator output (TCXO X1) and produces the second IF signal of

450kHz.

The second IF signal is passed through the ceramic filter

(CF201) to remove the adjacent channel signal. The filtered second IF signal is amplified by the limiting amplifier and demodulated by the quadrature detector with the ceramic discriminator (CD201). The demodulated signal is routed to the audio circuit.

4) Wide/Narrow Switching Circuit

Narrow and Wide settings can be made for each channel by switching the demodulation level.

The WIDE (low level) and NARROW (high level) data is output from IC405, pin 45.

When a WIDE (low level) data is received, Q202 turn on.

When a NARROW (high level) data is received, Q202 turn off.

Q202 turns off/on with the Wide/Narrow data and the IC201 detector output level is switched to maintain a constant output level during wide or narrow signals.

Q203

AFOUT

IC201

FM IF SYSTEM

R211

QUAD IFOUT

C214

Q202

RX_W/N

(IC405)

L : Wide

H : Narrow

R213 CD201

5R

Fig. 3 Wide/Narrow switching circuit

5) Audio Amplifier Circuit

The demodulated signal from IC201 goes to AF amplifier through IC301.

The signal then goes through an AF volume control, and is routed to an audio power amplifier (IC302) where it is amplified and output to the speaker.

TK-3202/3206

CIRCUIT DESCRIPTION

6) Squelch

Part of the AF signal from the IC enters the FM IC (IC201) again, and the noise component is amplified and rectified by a filter and an amplifier to produce a DC voltage corresponding to the noise level.

The DC signal from the FM IC goes to the analog port of the microprocessor (IC405). IC405 determines whether to output sounds from the speaker by checking whether the input voltage is higher or lower than the preset value.

To output sounds from the speaker, IC405 sends a high signal to the SP MUTE line and turns IC302 on through

Q303,Q304,Q305,Q306 and Q316. (See Fig. 4)

7) Receive Signalling

(1) QT/DQT

The output signal from FM IC (IC201) enters the microprocessor (IC405) through IC301. IC405 determines whether the QT or DQT matches the preset value, and controls the SP MUTE and the speaker output sounds according to the squelch results.

(2) MSK (Fleet Sync)

The MSK input signal from the FM IC goes to pin 31 of IC 301.

The signal is demodulated by MSK demodulator in IC 301.

The demodulated data goes to the CPU for processing.

IC301

FM IF IC201

IF Amp

SIGNAL

DTMF

QT/DQT

AQUA

BUSY

IC302

AF PA

Q306,316

SW

SP

IC405

QT/DQT IN

CLK,DATA,

STD,LOADN

CPU

AF CONT

Fig. 4 AF amplifier and squelch

Q303,304,305

SW

(3) DTMF

The DTMF input signal from the FM IC (IC201) goes to

IC301, the DTMF decoder. The decoded information is then processed by the CPU.

phase with the 5 or 6.25kHz reference signal from the phase comparator in IC1. The output signal from the phase comparator is filtered through a low-pass filter and passed to the VCO to control the oscillator frequency.(See Fig. 5)

2) VCO

The operating frequency is generated by Q4 in transmit mode and Q3 in receive mode. The oscillator frequency is controlled by applying the VCO control voltage, obtained from the phase comparator, to the varactor diodes (D4 and

D7 in transmit mode and D5 and D9 in receive mode). The

RX pin is set high in receive mode causing Q5 turn on.

The TX pin is set high in transmit mode. The outputs from

Q3 and Q4 are amplified by Q6 and sent to the RF amplifiers.

LPF

LPF

D4,7

Q4

TX VCO

Q6

BUFF AMP

Q2

BUFFER

Q9

RF AMP

D5,9

Q3

RX VCO

Q5, 7

T/R SW

RX

TX

PLL IC IC1

5kHz/6.25kHz

1/N

PLL DATA

PHASE

COMPARATOR

CHARGE

PUMP

REF OSC

1/M

5kHz/6.25kHz

X1

12.8MHz

Fig. 5 PLL circuit

3) Unlock Detector

If a pulse signal appears at the LD pin of IC1, an unlock condition occurs, and the DC voltage obtained from C4,

R5, and D1 causes the voltage applied to the microprocessor to go low. When the microprocessor detects this condition, the transmitter is disabled, ignoring the push-to-talk switch input signal.

3. PLL Frequency Synthesizer

The PLL circuit generates the first local oscillator signal for reception and the RF signal for transmission.

1) PLL

The frequency step of the PLL circuit is 5 or 6.25kHz.

A 12.8MHz reference an oscillator signal is divided at IC1 by a fixed counter to produce oscillator (VCO) output signal which is buffer amplified by Q2 then divided in IC1 by a programmable counter. The divided signal is compared in

9

TK-3202/3206

CIRCUIT DESCRIPTION

4. Transmitter System

1) Microphone Amplifier

The signal from the microphone passes through IC301.

When encoding DTMF, it is turned OFF for muting the microphone input signal by IC301.

The signal passes through the Audio processor (IC301) for the maximum deviation adjustment, and goes to the VCO modulation input.

IC301

AGC

MIC

AQUA

LPF

DTMF

IC405

CPU

QTVCO

QTTCXO

LPF

LPF

VCO

X1

TCXO

Fig. 6 Microphone amplifier

2) Drive and Final Amplifier

The signal from the T/R switch (D101 is on) is amplified by the pre-drive (Q101) and drive amplifier (Q102) to 50mW.

The output of the drive amplifier is amplified by the RF power amplifier (Q103) to 4.0W (1W when the power is low). The

RF power amplifier consists of two MOS FET stages. The output of the RF power amplifier is then passed through the harmonic filter (LPF) and antenna switch (D103 and

D122) and applied to the antenna terminal.

From

T/R SW

(D101)

Q100

RF

AMP

Q101

Pre-DRIVE

AMP

VD

Q102

DRIVE

AMP

VG

Q103

RF

POWER AMP

VG

D103

D122

ANT

SW

LPF

5T

VDD

+B

R127

R128

R129

IC101

(1/2)

IC101

(2/2)

PCTV

(IC405)

Fig. 7 Drive and final amplifier and APC circuit

ANT

10

3) APC Circuit

The APC circuit always monitors the current flowing through the RF power amplifier (Q103) and keeps a constant current.

The voltage drop at R127, R128 and R129 is caused by the current flowing through the RF power amplifier and this voltage is applied to the differential amplifier IC101(1/2).

IC101(2/2) compares the output voltage of IC101(1/2) with the reference voltage from IC405. The output of IC101(2/2) controls the VG of the RF power amplifier, Drive amplifier and Pre-Drive amplifier to make both voltages the same.

The change of power high/low is carried out by the change of the reference voltage.

4) Encode Signalling

(1) QT/DQT

QT,DQT data of the QTTCXO Line is output from pin 28 of the CPU. The signal passes through a low-pass CR filter and goes to the TCXO(X1).

The QT,DQT data of the QTVCO Line is output from pin 24 of the CPU. The signal passes through a low pass CR filter, mixes with the audio signal, and goes to the VCO modulation input. TX deviation is adjusted by the CPU.

(2) DTMF

High-speed data is output from pin 2 of the CPU. The signal passes through a low-pass CR filter, and provides a TX and

SP out tone, and is then applied to the audio processor

(IC301). The signal is mixed with the audio signal and goes to the VCO.

TX deviation is adjusted by the CPU.

(3) MSK (Fleet Sync)

Fleet Sync utilizes 1200bps and 2400bps MSK signal is output from pin 6 of IC301. And is routed to the VCO.

When encoding MSK, the microphone input signal is muted.

5. Power Supply

There are four 5V power supplies for the microprocessor:

5M,5C,5R, and 5T. 5M for microprocessor is always output while the power is on. 5M is always output, but turns off when the power is turned off to prevent malfunction of the microprocessor.

5C is a common 5V and is output when SAVE is not set to

OFF.

5R is 5V for reception and output during reception.

5T is 5V for transmission and output during transmission.

6. Control Circuit

The control circuit consists of a microprocessor (IC405) and its peripheral circuits. It controls the TX-RX unit. IC405 mainly performs the following:

(1) Switching between transmission and reception by the

PTT signal input.

(2) Reading system, group, frequency, and program data from the memory circuit.

(3) Sending frequency program data to the PLL.

(4) Controlling squelch on/off by the DC voltage from the squelch circuit.

(5) Controlling the audio mute circuit by the decode data input.

(6) Transmitting tone and encode data.

1) Frequency Shift Circuit

The microprocessor (IC405) operates at a clock of

7.3728MHz. This oscillator has a circuit that shifts the frequency by BEAT SHIFT SW (Q407, Q408).

TK-3202/3206

CIRCUIT DESCRIPTION

A beat sound may be able to be evaded from generation if

“Beat Shift” is set to ON when it is generated in the internal spurious transmission modulated sound of a transceiver.

SB R404

IC405

88

CPU

X2

XOUT

IC405

Q407,Q408

Hi: OFF

LOW: ON

BSHIFT

Fig. 8 Frequency shift circuit

2) Memory Circuit

Memory circuit consists of the CPU (IC405) and an EEPROM

(IC406). An EEPROM has a capacity of 64k bits that contains the transceiver control program for the CPU and data such as transceiver channels and operating features.

IC405

CPU

IC406

EEPROM

Fig. 9 Memory circuit

3) Low Battery Warning

The battery voltage is checked using by the microprocessor.

The transceiver generates a warning tone when it falls below the warning voltage shown in the table.

(1) The red LED blinks when the battery voltage falls below the voltage (1) shown in the table during transmission.

Note:

The transceiver checks the battery voltage during reception even when, in the FPU, the Battery Warning status function is set to “On TX” (default setting).

However, the LED does not blink during reception. During transmission, the LED blinks to generate the warning tone of a low battery voltage.

(2) The transceiver immediately stops transmission when the battery voltage falls below the voltage (2) shown in the table. A message tone beeps while the PTT switch is released.

Fig. 10 Low battery warning

7. Control System

Keys and channel selector circuit.

The signal from keys and channel selector input to microprocessor directly as shown in fig. 11.

Channel selector

PTT

27

PTT

SW

50

49

48

47

46

EN1

EN2

EN3

EN4

EN5

IC405

CPU

Fig. 11 Control system

SIDE 1

74

SIDE 2

75

SW1

SW2

(1)

(2)

Ni-Cd Battery

6.2[V]

5.9[V]

Ni-MH Battery

6.2[V]

5.9[V]

11