STW11NK100Z
STW15NK90Z
N-channel 900V - 0.40
Ω - 15A - TO-247
Zener - Protected SuperMESH™ PowerMOSFET
General features
Type
STW15NK90Z
V
DSS
(@Tjmax)
900 V
R
DS(on)
I
D
P
W
< 0.55 Ω 15 A 350W
■
■
■
■
■
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatibility
Description
The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications.
Such series complements ST full range of high voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
■ Switching application
TO-247
Internal schematic diagram
Order codes
Part number
STW15NK90Z
Marking
W15NK90Z
Package
TO-247
Packaging
Tube
August 2006 Rev 3 1/14 www.st.com
14
3
4
5
Contents
Contents
1
2
STW15NK90Z
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/14
STW15NK90Z Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(1)
P
TOT
Drain-source voltage (V
GS
Drain-gate voltage (R
GS
Gate-source voltage
= 0)
= 20K Ω)
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
C
C
= 25°C
=100°C
V
ESD (G-S) dv/dt
(2)
Total dissipation at T
C
= 25°C
Derating Factor
Gate source ESD(HBM-C=100pF, R=1,5K
Ω)
Peak diode recovery voltage slope
T
J
T stg
Operating junction temperature
Storage temperature
1.
Pulse width limited by safe operating area
2.
I
SD
≤ 15 A, di/dt ≤ 200A/µs, V
DD
≤ 900 V, T j
≤ T
JMAX
Table 2.
Symbol
Thermal data
Parameter
R thj-case
R thj-a
T l
Thermal resistance junction-case Max
Thermal resistance junction-ambient Max
Maximum lead temperature for soldering purpose
Table 3.
Symbol
I
AR
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
Single pulse avalanche energy
(starting Tj=25°C, Id=Iar, Vdd=50V)
Value
0.36
50
300
Value
900
900
± 30
15
9.5
60
350
2.77
6000
4.5
-55 to 150
Unit
V
V
V
A
W
A
A
W/°C
V
V/ns
°C
Unit
°C/W
°C/W
°C
Value
15
360
Unit
A mJ
3/14
Electrical ratings STW15NK90Z
1.1
Table 4.
Symbol
BV
GSO
Gate-source zener diode
Parameter Test conditions Min.
Typ.
Max.
Unit
Gate-source breakdown voltage Igs=± 1mA (Open Drain) 30 V
Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.
4/14
STW15NK90Z Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 5.
Symbol
On/off states
Parameter Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
R
I
I
DSS
GSS
GS(th)
DS(on)
I
D
= 1mA, V
GS
= 0
Zero gate voltage drain current (V
GS
= 0)
V
DS
= Max rating,
V
DS
= Max rating,
Tc = 125°C
Gate body leakage current
(V
GS
= 0)
V
GS
= ± 20V
Gate threshold voltage V
DS
= V
GS
, I
D
= 150 µA
Static drain-source on resistance
V
GS
= 10V, I
D
= 7.5 A
Min.
Typ.
Max.
Unit
900 V
1
50
µA
µA
3
± 10
3.75
4.5
0.40
0.55
µA
V
Ω
Table 6.
Symbol g fs
(1)
Dynamic
Parameter Test conditions Min.
Typ.
Max.
Unit
C
C
C iss oss rss
Forward transconductance V
DS
=15V, I
D
= 7.5 A
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
=25V, f=1 MHz, V
GS
=0
15
6100
465
96
S pF pF pF
C osseq
(2)
.
Equivalent output capacitance
V
GS
=0, V
DS
=0V to 720V 230 pF t d(on) t r t d(off) t f
Q g
Q gs
Q gd
Turn-on delay time
Rise time
Off-voltage rise time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
R
G
V
V
DD
GS
=450 V, I
D
= 7.5A,
=4.7
Ω, V
GS
(see
Figure 16
=720V, I
=10V
D
)
=10V
= 15A
42
27
135
35
190
56
70
256
1.
Pulsed: pulse duration=300µs, duty cycle 1.5%
2.
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss increases from 0 to 80% V
DSS
when V
DS nC nC nC ns ns ns ns
5/14
Electrical characteristics STW15NK90Z
Table 7.
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
Source drain diode
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage t rr
Q rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current t rr
Q rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1.
Pulse width limited by safe operating area
2.
Pulsed: pulse duration=300µs, duty cycle 1.5%
Test conditions
I
SD
=15A, V
GS
=0
I
SD
=15 A, di/dt = 100A/µs,
V
DD
=100 V, Tj=25°C
(see
Figure 18 )
I
SD
=15 A, di/dt = 100A/µs,
V
DD
=100V, Tj=150°C
(see
Figure 18 )
Min Typ.
Max Unit
15
60
1.6
A
A
V
748
10.5
28 ns
µC
A
900
13
28.5
ns
µC
A
6/14
STW15NK90Z
Figure 1.
Safe operating area
Electrical characteristics
Figure 2.
Thermal impedance
Figure 3.
Output characterisics Figure 4.
Transfer characteristics
7/14
Electrical characteristics
Figure 5.
Transconductance
STW15NK90Z
Figure 6.
Static drain-source on resistance
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Capacitance variations
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized on resistance vs temperature
8/14
STW15NK90Z
Figure 11. Source-drain diode forward characteristics
Electrical characteristics
Figure 12. Normalized B
VDSS
vs temperature
Figure 13. Maximum avalanche energy vs temperature
9/14
Test circuit Package mechanical data
3 Test circuit Package mechanical data
Figure 14. Unclamped Inductive load test circuit
STW15NK90Z
Figure 15. Unclamped Inductive waveform
Figure 16. Switching times test circuit for resistive load
Figure 17. Gate charge test circuit
Figure 18. Test circuit for inductive load switching and diode recovery times
10/14
STW15NK90Z
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/14
Package mechanical data STW15NK90Z
DIM.
L2
øP
øR
S
E e
L
L1 b1 b2 c
D
A
A1 b
MIN.
4.85
2.20
1.0
2.0
3.0
0.40
19.85
15.45
14.20
3.70
3.55
4.50
TO-247 MECHANICAL DATA
mm.
TYP
5.45
18.50
MAX.
5.15
2.60
1.40
2.40
3.40
0.80
20.15
15.75
14.80
4.30
3.65
5.50
MIN.
0.19
0.086
0.039
0.079
0.118
0.015
0.781
0.608
0.560
0.14
0.140
0.177
5.50
inch
TYP.
0.214
0.728
0.216
MAX.
0.20
0.102
0.055
0.094
0.134
0.03
0.793
0.620
0.582
0.17
0.143
0.216
12/14
STW15NK90Z
Table 8.
Date
Revision history
Revision
09-Sep-2004
08-Sep-2005
31-Jul-2005
1
2
3
Changes
Preliminary
Complete datasheet
New template, no content change
Revision history
13/14
STW15NK90Z
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