STMicroelectronics TDA7293 Datasheet
The STMicroelectronics TDA7293 is a high-performance audio amplifier capable of delivering 100 watts of continuous power into 8 ohms, with very low distortion and noise. It features a built-in muting function with turn-on delay, a standby function, and protection against short circuits and thermal overload. These features make it ideal for use in a variety of audio applications, including home stereo systems, self-powered loudspeakers, and car audio systems.
Oglas
Oglas
TDA7293
120-volt, 100-watt, DMOS audio amplifier with mute and standby
Features
Multipower BCD technology
Very high operating voltage range (±50 V)
DMOS power stage
High output power (100 W into 8
Ω
@ THD =10%, with V
S
= ±40 V)
Muting and stand-by functions
No switch on/off noise
Very low distortion
Very low noise
Short-circuit protected (with no input signal applied)
Thermal shutdown
Clip detector
Modularity (several devices can easily be connected in parallel to drive very low impedances)
Description
The TDA7293 is a monolithic integrated circuit in
Multiwatt15 package, intended for use as audio
Multiwatt15V
Multiwatt15H
class AB amplifier in Hi-Fi field applications, such as home stereo, self powered loudspeakers and
Topclass TV. Thanks to the wide voltage range and to the high output current capability it is able to supply the highest power into both 4-
Ω and 8-Ω loads.
The built-in muting function with turn-on delay simplifies the remote operation avoiding on-off switching noises.
Parallel mode is possible by connecting several devices and using pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system
Table 1.
Device summary
Order code
TDA7293V
TDA7293HS
Package
Multiwatt15V
Multiwatt15H
Figure 1.
TDA7293 block diagram
VMUTE
VSTBY
C7 100nF
+Vs
C6 1000
µF
R3 22K
C2
22
µF
R2
680
Ω
C1 470nF
IN+
R1 22K
IN2
3
R5 10K
SGND
(**)
MUTE
4
10
STBY 9
MUTE
STBY
R4 22K
C3 10
µF
C4 10
µF
-
+
+Vs
1
STBY-GND
7
BUFFER DRIVER
11
8
-Vs
THERMAL
SHUTDOWN
C9 100nF
+PWVs
13
S/C
PROTECTION
15
-PWVs
C8 1000
µF
14 OUT
12
6
5
BOOT
LOADER
C5
22
µF
BOOTSTRAP
VCLIP
CLIP DET
(*)
D97AU805A
-Vs
(*) see Application note
(**) for SLAVE function
September 2010 Doc ID 6744 Rev 8 1/21
www.st.com
21
Contents
Contents
TDA7293
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Modular application (ref. figure 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Vertically-mounted package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Horizontally-mounted package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/21 Doc ID 6744 Rev 8
TDA7293 Pin connections
Figure 2.
Pin connections
TAB CONNECTED TO PIN 8
12
11
10
9
8
7
6
5
4
3
2
1
15
14
13
D97AU806
-V
S
(POWER)
OUT
+V
S
(POWER)
BOOTSTRAP LOADER
BUFFER DRIVER
MUTE
STAND-BY
-V
S
(SIGNAL)
+V
S
(SIGNAL)
BOOTSTRAP
CLIP AND SHORT CIRCUIT DETECTOR
SIGNAL GROUND
NON INVERTING INPUT
INVERTING INPUT
STAND-BY GND
Doc ID 6744 Rev 8 3/21
Electrical specifications TDA7293
2.1 Absolute maximum ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
3
V
4
V
5
V
6
V
S
V
1
V
2
V
2
- V
3
V
9
V
10
V
11
V
12
I
O
P tot
Supply voltage (no signal)
V
STANDBY
GND voltage referred to -V
S
Input voltage (inverting) referred to -V
Maximum differential inputs
S
(pin 8)
Input voltage (non inverting) referred to -V
Signal GND voltage referred to -V
Clip detector voltage referred to -V
Bootstrap voltage referred to -V
Standby voltage referred to -V
Mute voltage referred to -V
Bootstrap loader voltage referred to -V
Output peak current
Power dissipation T case
S
Buffer voltage referred to -V
S
= 70°C
S
S
S
S
S
S
±60
90
90
±30
90
90
120
120
120
120
120
100
10
50
T op
T stg
, T j
V
S
V
1
Operating ambient temperature range
Storage and junction temperature
Supply voltage (no signal)
0 to 70
150
±60
V
ESD_HBM
V
STANDBY
GND voltage referred to -V
S
(pin 8)
ESD maximum withstanding voltage range, test condition CDF-AEC-Q100-002- ”Human body model”
90
±1500
Value Unit
°C
°C
V
V
V
A
W
V
V
V
V
V
V
V
V
V
V
V
V
Table 3.
Symbol
R thj-case
Thermal data
Parameter
Thermal resistance junction to case -
Min
1
Typ Max
1.5
Unit
°C/W
4/21 Doc ID 6744 Rev 8
TDA7293 Electrical specifications
Table 4.
Symbol
V
S
I q
I b
V
OS
I
OS
.
Electrical characteristics
Parameter
Supply range
Quiescent current
Input bias current
Input offset voltage
Input offset current
P
O d
I
SC
SR
G
V
G
V e
N
R i
SVR
T
S
The specifications given here were obtained with the conditions V
S
= ±40 V, R
L
= 8
Ω,
R g
= 50
Ω, T amb
= 25 °C, f = 1 kHz unless otherwise specified.
Continuous output power
Total harmonic distortion
(1)
Current limiter threshold
Slew rate
Open loop voltage gain
Closed loop voltage gain
(2)
Total input noise
Input resistance
Supply voltage rejection
Thermal protection
Test conditions
-
-
-
-
d = 1%, R
L
= 4
Ω,
V
S
= ±29 V d = 10%, R
L
= 4
Ω,
V
S
= ±29 V
P
O
= 5 W, f = 1 kHz
P
O
= 0.1 to 50 W, f = 20 Hz to 15 kHz
-
V
S
≤ ±
40 V
-
-
A = curve
f = 20 Hz to 20 kHz f = 100 Hz,
V ripple
= 0.5 V RMS
Device mutes
Device shuts down -
-
-
-
-
Min
-
-
±12
-
-10
75
90
-
-
5
-
29
-
100
-
-
3
6.5
10
80
30
1
Typ Max
-
50
-
0.3
-
80
80
100
100
0.005
-
-
-
0.2
±50
100
1
10
75
150
160 -
-
-
0.1
-
-
-
-
31
-
10 dB
µV
µV k
Ω
A
V/
µs dB
Unit
V mA
µA mV
µA
W
W
%
% dB
°C
°C
Standby function (ref. to to pin 1)
V
ST on
V
ST off
Standby on threshold
Standby off threshold
ATT st-by
I q st-by
Standby attenuation
Quiescent current @ standby
Mute function (ref. to pin 1)
V
Mon
V
Moff
ATT mute
Mute on threshold
Mute off threshold
Mute attenuatIon
-
-
-
-
-
-
-
-
3.5
-
70
-
3.5
60
-
-
80
-
-
90
0.5
-
1
-
1.5
-
-
1.5
V
V dB
V
V dB mA
Doc ID 6744 Rev 8 5/21
Electrical specifications TDA7293
Table 4.
Symbol
Electrical characteristics (continued)
Parameter Test conditions Min Typ Max Unit
Clip detector
Duty Duty cycle ( pin 5) d = 1%,
R
PULLUP
= 10 k
Ω to 5 V d = 10%,
R
PULLUP
= 10 k
Ω to 5 V
P
O
= 50 W
-
-
30
10
40
-
50
%
%
I
CLEAK
-
Slave function pin 4 (ref. to pin 8)
3
µA
V
Slave
V
Master
Slavethreshold
Master threshold -
-
3 -
-
-
1 V
V
1.
Tested with optimized applications board (see fig. 3)
2.
G
Vmin
≥ 26dB
Note: Pin 11 only for modular connection. Max external load 1 M
Ω
/ 10 pF, only for test purposes
Figure 3.
Typical application PCB and component layout
6/21 Doc ID 6744 Rev 8
TDA7293 Circuit description
In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs.
The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads.
Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits.
To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable.
The device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100/120.
The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage.
The solution shown as a principle shematic by Fig6 represents the DMOS unity - gain output buffer of the TDA7293.
Figure 4.
Schematic of a DMOS unity-gain buffer
This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is required.
A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion.
Doc ID 6744 Rev 8 7/21
Circuit description TDA7293
While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account.
A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself.
3.2 Protection
In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the
2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus.
In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation.
In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ T ϕ = 150 °C) and then into stand-by (@ T j
= 160 °C).
Full protection against electrostatic discharges on very pin is included.
The device is provided with both standby and mute functions, independently driven by two
CMOS logic compatible input pins.
The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output.
The sequence that we recommend during the on/off transients is shown in Figure 8. The application of figure 9 shows the possibility of sing only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage.
8/21 Doc ID 6744 Rev 8
TDA7293
Figure 5.
Suggested turn-on/off sequence
+Vs
(V)
+40
-40
-Vs
VIN
(mV)
VST-BY
PIN #9
(V)
5V
VMUTE
PIN #10
(V)
5V
IQ
(mA)
VOUT
(V)
OFF
ST-BY
MUTE
PLAY
MUTE
ST-BY OFF
D98AU817
Figure 6.
Single signal standby/mute control circuit
MUTE/
ST-BY
10K
20K
30K
1N4148
MUTE STBY
10
µF
10
µF
D93AU014
Circuit description
Doc ID 6744 Rev 8 9/21
Applications information TDA7293
10/21
The recommended values of the external components are those shown on the application circuit of
. Different values can, however, be used and the following table could be useful when choosing alternative values.
Table 5.
Choosing alternative component values
Component
Suggested value
Purpose
Larger than suggested
R1
(1)
R2
R3
(1)
22 k
Ω
680
Ω
Input resistance
Closed loop gain, set to 30 dB
(2)
Increase input impedance
Decrease of gain
Increase of gain
R4 22 k
Ω
Standby time constant
Larger Standby on/off time
R5 10 k
Ω
Mute time constant
Larger mute on/off time
C1 0.47
µF
Input DC decoupling -
C2
C3
C4
22
10
10
µF
µF
µF
Feedback DC decoupling
-
Mute time constant
Larger mute on/off time
Standby time constant
Larger standby on/off time
C5 22
µF (3)
x N Bootstrapping -
C6, C8
C7, C9
1000
µF
0.1
µF
Supply voltage bypass -
Supply voltage bypass -
1.
R1 = R3 for pop optimization
2.
Closed loop gain has to be ³ 26dB
3.
Multiply this value by the number, N, of modular parts connected
Smaller than suggested
Decrease input impedance
Increase of gain
Decrease of gain
Smaller standby
ON/OFF time; pop noise
Smaller mute on/off time
Higher low-frequency cutoff
Higher low-frequency cutoff
Smaller mute on/off time
Smaller standby on/off time; pop noise
Signal degradation at low frequency
-
Danger of oscillation
Figure 7.
Slave function: pin 4 (Ref to pin 8)
-V
S
+3V
-V
S
+1V
-V
S
MASTER
UNDEFINED
SLAVE
D98AU821
Note: If in the application the speakers are connected via long wires, it is a good rule to add, between the output and GND, a boucherot cell in order to avoid dangerous spurious oscillations if the speakers terminal are shorted.
The suggested boucherot resistor is
3.9
Ω
/2W and the capacitor is 1
µ
F.
Doc ID 6744 Rev 8
TDA7293 Applications information
Constraints of implementing high power solutions are the power dissipation and the size of the power supply. These are both due to the low efficiency of conventional AB class amplifier approaches.
The circuit below in
is a high efficiency amplifier which can be adopted for both hi-fi
and car-radio applications. The TDA7293 is a monolithic MOS power amplifier which can be operated with a 100-V supply (120 V with no signal applied) while delivering output currents up to ±6.5 A. This allows the use of this device as a very high-power amplifier (up to 180 W peak power with THD = 10% and R
L
= 4
Ω); the only drawback is the power dissipation, hardly manageable in the above power range.
The typical junction-to-case thermal resistance of the TDA7293 is 1 °C/W (max = 1.5 °C/W).
In worst case conditions, to avoid the chip temperature exceeding 150 °C the thermal resistance of the heatsink must be 0.038 °C/W (at a maximum ambient temperature of
50 °C).
As the above value is pratically unreachable, a high efficiency system is needed in those cases where the continuous average output power is higher than 50 to 60 W.
The TDA7293 was designed to work also in a higher efficiency way. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (for example, 20 W).
If the output power increases, these transistors are switched on during the portion of the signal where more output voltage swing is needed, thus "bootstrapping" the power supply pins (13 and 15). The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7, R8 define the minimum drop across the power MOS transistors of the
TDA7293. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the "bootstrap" circuits and the output stage of the TDA7293.
By considering again a maximum average output power (music signal) of 20 W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is
2.2 °C/W (with V
S
= ±50 V and R
L
= 8
Ω). All components (TDA7293 and power transistors
T1 and T2) can be placed on a 1.5 °C/W heatsink, with the power darlingtons electrically insulated from the heatsink.
Since the total power dissipation is less than that of a usual class AB amplifier, additional cost savings can be obtained while optimizing the power supply, even with a large heatsink.
Another application suggestion is the bridge configuration, where two TDA7293 are used.
In this application, the value of the load must not be lower than 8
Ω for dissipation and current capability reasons.
A suitable field of application includes hi-fi/TV subwoofer realizations. The main advantages offered by this solution are: z z
High power performance with limited supply voltage level.
Considerably higher output power even with high load values, such as 16
Ω.
With R
L
= 8
Ω and V
S
= ±25 V, the maximum output power obtainable is 150 W, whilst with
R
L
= 16
Ω and V
S
= ±40 V, the maximum Pout is 200 W.
Doc ID 6744 Rev 8 11/21
Applications information
4.4
TDA7293
Modular application (ref. figure 12)
The modular application is where several devices operate in parallel.
The modular application allows very high power be delivered to very low-impedance loads.
In this type of application one device acts as a master and the others as slaves. z z z z
The slave power stages are driven by the master device and work in parallel together while the input and the gain stages of the slave devices are disabled. The figure below shows the connections required to configure two devices to work together.
The master chip connections are the same as the normal single ones.
The outputs can be connected together without the need of any ballast resistor.
z z
The slave SGND pin must be tied to the negative supply.
The slave STANDBY and MUTE pins must be connected to the master STANDBY and
MUTE pins.
The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the bootstrap capacitor must be 22 µF times N.
The slave IN pin must be connected to the negative supply.
For compatibility purpose with the previous devices of the family, the bootstrap capacitor can be connected either between the bootstrap pin (6) and the output pin (14) or between the bootstrap pin (6) and the bootstrap loader pin (12).
When the bootstrap is connected between pins 6 and 14 the maximum supply voltage in the presence of an output signal is limited to 100 V, due the bootstrap capacitor overvoltage.
When the bootstrap is connected between pins 6 and 12 the maximum supply voltage extends to the full voltage that the technology can stand, in this case 120 V.
This is accomplished by the clamp introduced at the bootstrap loader pin (12). This pin follows the output voltage up to 100 V and remains clamped at 100 V for higher output voltages.
This feature lets the output voltage swing up to a gate-source voltage from the positive supply (V
S
-3 to 6 V).
12/21 Doc ID 6744 Rev 8
TDA7293 Applications information
Figure 8.
High-efficiency applications circuit
+50V
+25V
D6
1N4001
D1 BYW98100
R20
20K
C1
1000
µF
63V
C3
100nF
C5
1000
µF
35V
C7
100nF
R22
10K
C9
330nF
R1
2
GND
R21
20K
C2
1000
µF
63V
C4
100nF
C6
1000
µF
35V
R23
10K
C8
100nF
R2
2
C10
330nF
C12 330nF
IN
PLAY
ST-BY
D5
1N4148
R12
13K
C13 10
µF
R13 20K
R14 30K
R15 10K
C14
10
µF
D2 BYW98100
-25V
D7
1N4001
-50V
3
7 13
2
4
TDA7293
14
9 6
1
10
8 15
12
T1
BDX53A
T3
BC394
R4
270
T4
BC393
R5
270
R17 270
L1 1
µH
D3 1N4148
R16
13K
Z1 3.9V
R3 680
C11 22
µF
L3 5
µH
R7
3.3K
R6
20K
C15
22
µF
R18 270
R8
3.3K
Z2 3.9V
T5
BC393
C16
1.8nF
OUT
C17
1.8nF
P ot
L2 1
µH
D4 1N4148
T7
BC394
T8
BC394
R19 270
T2
BDX54A
T6
BC393
R9
270
R10
270
R11
20K
D97AU807C
Figure 9.
PCB and component layout of fig. 8
Doc ID 6744 Rev 8 13/21
Applications information
Figure 10.
PCB - solder side of the Fig 9
TDA7293
14/21
Figure 11.
Modular application circuit
MASTER
VMUTE
VSTBY
SLAVE
C7 100nF
+Vs
C6 1000
µF
R3 22K
C2
22
µF
R2
680
Ω
IN2
-
+Vs
7
BUFFER
DRIVER
11
C1 470nF
IN+
R1 22K
SGND
R5 10K
R4 22K
3
+
4
MUTE
STBY
10
9
C4 10
µF
MUTE
STBY
1
STBY-GND
8
-Vs
THERMAL
SHUTDOWN
C9 100nF
C3 10
µF
C7 100nF
+PWVs
13
-Vs
+Vs
C6 1000
µF
14
12
6
5
S/C
PROTECTION
15
-PWVs
C8 1000
µF
OUT
BOOT
LOADER
C5
47
µF
BOOTSTRAP
C10
100nF
R7
2
Ω
CLIP DET
IN2
-
+Vs
7
BUFFER
DRIVER
11
+PWVs
13
14 OUT
IN+ 3
+
12
BOOT
LOADER
SGND 4
MUTE 10
9
STBY
MUTE
STBY
1
STBY-GND
8
-Vs
THERMAL
SHUTDOWN
C9 100nF
-Vs
S/C
PROTECTION
15
-PWVs
C8 1000
µF
6
5
BOOTSTRAP
D97AU808D
Doc ID 6744 Rev 8
TDA7293 Applications information
Figure 12.
Modular application PCB and component layout (component side)
Figure 13.
Modular application PCB and component layout (solder side)
Doc ID 6744 Rev 8 15/21
Applications information
Figure 14.
Distortion vs output power Figure 15.
Distortion vs output power
TDA7293
Figure 16.
Distortion vs frequency Figure 17.
Modular application derating rload vs voltage supply (ref. fig. 12)
Figure 18.
Modular application Pd vs voltage supply (ref. fig. 12)
Figure 19.
Output power vs. supply voltage
16/21 Doc ID 6744 Rev 8
TDA7293
5 Package mechanical data
Package mechanical data
The TDA7293 comes with a choice of two 15-pin packages, Multiwatt15V and Multiwatt15H.
The package sizes and outline drawings are given below.
Figure 20.
Multiwatt15V package
H1
H2
L
L1
E
F
G
G1
C
D
A5
B
DIM.
mm inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
2.65
1.6
0.197
0.104
0.063
1 0.039
0.49
0.66
0.55
0.019
0.75
0.026
1.02
1.27
1.52
0.040
0.050
0.060
17.53
17.78
18.03
0.690
0.700
0.710
19.6
0.772
0.022
0.030
21.9
21.7
22.2
22.1
20.2
0.795
22.5
0.862
0.874
0.886
22.5
0.854
0.87
0.886
L2
L3
L4
L7
17.65
18.1
0.695
0.713
17.25
17.5
17.75
0.679
0.689
0.699
10.3
2.65
10.7
10.9
2.9
0.406
0.104
0.421
0.429
0.114
M
M1
S
S1
4.25
4.73
1.9
1.9
Dia1 3.65
4.55
5.08
4.85
5.43
0.167
0.186
2.6
0.075
2.6
0.075
3.85
0.144
0.179
0.200
0.191
0.214
0.102
0.102
0.152
OUTLINE AND
MECHANICAL DATA
Multiwatt15 (Vertical)
Doc ID 6744 Rev 8
0016036 J
17/21
Package mechanical data
Figure 21.
Multiwatt15H outline
TDA7293
18/21 Doc ID 6744 Rev 8
TDA7293 Package mechanical data
L7
N
P
R
R1
S
S1
V
Diam.1
H2
L1
L2
L3
L4
L5
F
G
G1
H1
C
E
A
B
Table 6.
Ref
Multiwatt15H dimensions
Dimension in mm
Min
-
-
2.65
-
-
1.90
-
1.90
3.65
19.60
17.80
2.30
17.25
10.30
2.70
-
-
-
0.49
0.66
1.02
17.53
19.60
Typ
-
-
-
-
-
-
-
-
1.50
-
18.00
2.50
17.50
10.70
3.00
-
-
-
-
-
1.27
-
17.78
Max
-
-
2.90
-
-
2.60
-
2.60
3.85
20.20
18.20
2.80
17.75
10.90
3.30
5.00
2.65
1.60
0.55
0.75
1.52
18.03
20.20
Min
-
-
0.104
-
-
0.075
-
0.075
0.144
0.772
0.701
0.091
0.679
0.406
0.106
-
-
-
0.019
0.026
0.040
0.690
0.772
Dimension in inch
Typ
-
-
-
-
-
-
-
-
0.059
-
0.709
0.098
0.689
0.421
0.118
-
-
-
-
-
0.050
-
0.700
Max
-
-
0.114
-
-
0.102
-
0.102
0.152
0.795
0.717
0.110
0.699
0.429
0.130
0.197
0.104
0.063
0.022
0.030
0.060
0.710
0.795
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Notes
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Doc ID 6744 Rev 8 19/21
Revision history TDA7293
Table 7.
Date
Jan-2004
Aug-2004
Document revision history
24-Sep-2010
Revision
7
7.1
8
Changes
First Issue in EDOCS
Stylesheet update. No content change
Updated package dimensions for Multiwatt15H in
Updated presentation throughout document.
20/21 Doc ID 6744 Rev 8
TDA7293
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Doc ID 6744 Rev 8 21/21
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