STMicroelectronics CS70 Datasheet

CS70
High side current sense high voltage op amp
Datasheet - production data
 Pin selectable gain: 20 V/V, 25 V/V, 50 V/V or
100 V/V
 Buffered output
Applications
 Wireless battery chargers
TSSOP8
(Plastic package)
 Chargers for portable equipment
 Precision current sources
8 Vp
Vm 1
SEL1 2
7 Vcc-
SEL2 3
6 Gnd
5 Vcc+
Out 4
Pin connections
(top view)
 Wearable
Description
The CS70 measures a small differential voltage
on a high-side shunt resistor and translates it into
a ground-referenced output voltage. The gain is
adjustable to four different values from 20 V/V up
to 100 V/V by two selection pins.
Wide input common-mode voltage range, low
quiescent current, and tiny TSSOP8 packaging
enable use in a wide variety of applications.
Features
 Independent supply and input common-mode
voltages
 Wide common-mode operating range: 2.9 V to
70 V in single-supply configuration, -2.1 V to
65 V in dual-supply configuration
 Wide common-mode surviving range: -16 V to
75 V (reversed battery and load-dump
conditions)
 Supply voltage range: 2.7 to 5.5 V in singlesupply configuration
The input common-mode and power-supply
voltages are independent. The common-mode
voltage can range from 2.9 V to 70 V in the singlesupply configuration or be offset by an adjustable
voltage supplied on the Vcc- pin in the dualsupply configuration.
With a current consumption lower than 360 µA
and a virtually null input leakage current in
standby mode, the power consumption in the
applications is minimized.
 Low current consumption: ICC max = 360 µA
Table 1. Device summary
Part number
Temperature range
Package
Packaging
Marking
CS70P
- 40° C to +125 °C
TSSOP8
Tape and reel
103I
March 2014
This is information on a product in full production.
DocID026041 Rev 1
1/24
www.st.com
Contents
CS70
Contents
1
Application schematic and pin description . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 6
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Electrical characteristics curves: current sense amplifier . . . . . . . . . 10
5
Parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1
Common-mode rejection ratio (CMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2
Supply voltage rejection ratio (SVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.3
Gain (Av) and input offset voltage (Vos) . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.4
Output voltage drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.5
Input offset drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.6
Output voltage accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6
Maximum permissible voltages on pins . . . . . . . . . . . . . . . . . . . . . . . . 18
7
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8.1
9
2/24
TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID026041 Rev 1
CS70
Application schematic and pin description
The CS70 high-side current sense amplifier can be used in either single- or dual-supply
mode. In the single-supply configuration, the CS70 features a wide 2.9 V to 70 V input
common-mode range totally independent of the supply voltage. In the dual-supply range,
the common-mode range is shifted by the value of the negative voltage applied on the Vccpin. For instance, with Vcc+ = 5 V and Vcc- = -5 V, then the input common-mode range is 2.1 V to 65 V.
Figure 1. Single-supply configuration schematic
Vsense
Iload
Common-mode voltage: 2.9 V to 70 V
Rsense
load
1
Application schematic and pin description
Vp
5V
Vcc+
Vm
Vcc
Rg2
Rg1
SEL1
Sense
amplifier
GPIO1
Voltage
buffer
SEL2
Vout
K2
Rg3
CS70
Vcc-
Gnd
GPIO2
ADC
Out
Gnd
μ Controller
AM04517v1
DocID026041 Rev 1
3/24
24
Application schematic and pin description
CS70
Figure 2. Dual-supply configuration schematic
Vsense
Iload
Vp
Common-mode voltage: -2.1 V to 65 V
load
Rsense
5V
Vm
Vcc
Vcc+
Out
Vout
ADC
SEL1
CS70
GPIO1
SEL2
Vcc-
μ Controller
GPIO2
Gnd
Gnd
-5 V
AM04518v1
Figure 3. Common-mode versus supply voltage in dual-supply configuration
Vicm
common-mode voltage
operating range
Max = 70 V
Max = 65 V
Max = 60 V
min = 2.9 V
min = -2.1 V
Vcc- = 0 V
Single-supply
Vcc- = -5 V
min = -7.1 V
Vcc- = -10 V
Dual-supply
AM04519
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DocID026041 Rev 1
CS70
Application schematic and pin description
Table 2 describes the function of each pin. Their position is shown in the illustration on the
cover page and in Figure 1 on page 3.
Table 2. Pin description
Symbol
Type
Out
Analog output
Gnd
Vcc+
Function
The Out voltage is proportional to the magnitude of the sense
voltage Vp-Vm.
Ground line
Power supply
Vcc-
Positive power supply line.
Negative power supply line.
Vp
Analog input
Connection for the external sense resistor. The measured current
enters the shunt on the Vp side.
Connection for the external sense resistor. The measured current
exits the shunt on the Vm side.
Vm
SEL1
Digital input
Gain-select pin
SEL2
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24
Absolute maximum ratings and operating conditions
2
CS70
Absolute maximum ratings and operating conditions
Table 3. Absolute maximum ratings
Symbol
Vid
Vin_sense
Vin_sel
Vcc+
Vcc+-Vcc-
Parameter
Input pins differential voltage (Vp-Vm)
Sensing pins input voltages (Vp, Vm)
-0.3 to Vcc++0.3
Positive supply voltage(2)
V
-0.3 to 7
DC supply voltage
0 to 15
voltage(2)
Tstg
Storage temperature
ESD
-16 to 75
Gain selection pins input voltages (SEL1, SEL2)
DC output pin
Rthja
Unit
±20
(1)
(2)
Vout
Tj
Value
-0.3 to Vcc++0.3
-55 to 150
°C
Maximum junction temperature
150
TSSOP8 thermal resistance junction to ambient
120
SO8 thermal resistance junction to ambient
125
HBM: human body model(3)
2.5
kV
MM: machine model(4)
150
V
1.5
kV
CDM: charged device
model(5)

1. These voltage values are measured with respect to the Vcc- pin.
2. These voltage values are measured with respect to the Gnd pin.
3. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kresistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of
connected pin combinations while the other pins are floating.
5. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to ground.
Table 4. Operating conditions
Symbol
Parameter
Value
Unit
Vcc+
Supply voltage in single-supply configuration from
Tmin to Tmax
(Vcc- connected to Gnd = 0 V)
2.7 to 5.5
V
Negative supply voltage in dual-supply
configuration from Tmin to Tmax
Vcc-
6/24
-
Vcc+ = 5.5 V max
-8 to 0
Vcc+ = 3 V max
-11 to 0
V
Vicm
Common-mode voltage range referred to pin Vcc 2.9 to 70
(Tmin to Tmax)
V
Toper
Operational temperature range (Tmin to Tmax)
°C
DocID026041 Rev 1
-40 to 125
CS70
3
Electrical characteristics
Electrical characteristics
The electrical characteristics given in the following tables are measured under the following
test conditions unless otherwise specified.

Tamb = 25 °C, Vcc+ = 5 V, Vcc- connected to Gnd (single-supply configuration).

Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on Out, all gain configurations.
Table 5. Supply
Symbol
ICC
ICC1
Parameter
Total supply current
Total supply current
Test conditions
Min.
Typ.
Max.
200
360
300
480
Min.
Typ.
Max.
90
105
Vsense = 0 V, Tmin < Tamb < Tmax
Vsense = 50 mV Av = 50 V/V
Tmin < Tamb < Tmax
-
Unit
µA
Table 6. Input
Symbol
Parameter
Test conditions
DC common-mode rejection
DC CMR Variation of Vout versus Vicm
referred to input(1)
2.9 V< Vm < 70 V
Tmin < Tamb < Tmax
AC common-mode rejection
Variation of Vout versus Vicm
AC CMR
referred to input (peak-to-peak
voltage variation)
Av = 50 V/V or 100 V/V
2.9 V< Vm < 30 V
1 kHz sine wave
SVR
Supply voltage rejection
Variation of Vout versus VCC(2)
SEL1 = Gnd, SEL2 = Gnd
2.7 V< VCC < 5.5 V
Vsense = 30 mV
Tmin < Tamb < Tmax
Vos
Input offset voltage(3)
Tamb = 25 C
Tmin < Tamb < Tmax
dVos/dT
Input offset drift vs. T
Av = 50 V/V
Tmin < Tamb < Tmax
Ilk
Input leakage current
VCC = 0 V
Tmin < Tamb < Tmax
Iib
Input bias current
Vsense = 0 V
Tmin < Tamb < Tmax
VIL
Logic low voltage threshold
(SEL1 and SEL2)
VCCmin < VCC < VCCmax
VIH
Logic high voltage threshold
(SEL1 and SEL2)
VCCmin < VCC < VCCmax
Isel
Gain-select pins (SEL1 and SEL2) SEL pin connected to GND or
VCC Tmin < Tamb < Tmax
input bias current
Tmin < Tamb < Tmax
Tmin < Tamb < Tmax
95
85
Unit
dB
95
-20
±500
±1100
µV
+5
µV/°C
1
µA
10
-0.3
15
0.5
V
1.2
VCC
400
nA
1. See Section 5: Parameter definitions for the definition of CMR.
2. See Section 5 for the definition of SVR.
3. See Section 5 for the definition of Vos.
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24
Electrical characteristics
CS70
Table 7. Output
Symbol
Av
Vout/T
Parameter
Test conditions
Gain
SEL1 = Gnd, SEL2 = Gnd
SEL1 = Gnd, SEL2 = Vcc+
SEL1 = Vcc+, SEL2 = Gnd
SEL1 = Vcc+, SEL2 = Vcc+
Output voltage drift vs. T(1)
Av = 50 V/V
Tmin < Tamb < Tmax
Vout/Iout Output stage load regulation
Min.
Typ.
Max.
20
25
50
100
-10 mA < Iout <10 mA
Iout sink or source current
Av = 50 V/V
0.3
V/V
±240
ppm/°C
±1.5
mV/mA
Vout
Total output voltage accuracy(2)
Vsense = 50 mV(3) Tamb = 25 C
Tmin < Tamb < Tmax
±2.5
±4
Vout
Total output voltage accuracy
Vsense = 90 mV(3) Tamb = 25 C
Tmin < Tamb < Tmax
±3.5
±5
Vout
Total output voltage accuracy
Vsense = 20 mV Tamb = 25 C
Tmin < Tamb < Tmax
±3.5
±5
Vout
Total output voltage accuracy
Vsense = 10 mV Tamb = 25 C
Tmin < Tamb < Tmax
±5.5
±8
Vout
Total output voltage accuracy
Vsense = 5 mV Tamb = 25 C
Tmin < Tamb < Tmax
±10
±22
Short-circuit current
OUT connected to VCC or GND
Isc
15
26
VOH
Output stage high-state saturation
Vsense = 1 V
voltage
Iout = 1 mA
VOH = VCC-Vout
85
VOL
Output stage low-state saturation
voltage
80
Vsense =-1 V
Iout = 1 mA
Unit
%
mA
135
mV
125
1. See Section 5: Parameter definitions for the definition of output voltage drift versus temperature.
2. Output voltage accuracy is the difference with the expected theoretical output voltage Vout-th=Av*Vsense. See Section 5 for
a more detailed definition.
3. Except for Av = 100 V/V.
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DocID026041 Rev 1
CS70
Electrical characteristics
Table 8. Frequency response
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
-
µs
-
µs
Vsense square pulse applied to
generate a variation of Vout from
-
500 mV to 3 V
ts
Response to input differential
voltage change.
Output settling to 1% of final value
Cload = 47 pF
Av = 20 V/V,
-
3
Av = 25 V/V
4
Av = 50 V/V
6
Av = 100 V/V
10
Any change of state of SEL1
or SEL2 pin
1
tSEL
Response to a gain change.
Output settling to 1% of final value
trec
Response to common-mode
voltage change.
Output settling to 1% of final value
SR
Slew rate
Vsense = 10 mV to 100 mV
BW
3 dB bandwidth
Cload = 47 pF Vm = 12 V
Vsense = 50 mV
Av = 50 V/V
Vcc+= 5 V, Vcc-= -5 V
Vm step change from -2 V to
30 V or 30 V to -2 V
20
0.4
0.6
-
V/µs
-
700
-
kHz
Min.
Typ.
Max.
Unit
-
40
-
nV/Hz
Table 9. Noise
Symbol
eN
Parameter
Equivalent input noise voltage
Test conditions
f = 1 kHz
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24
Electrical characteristics curves: current sense amplifier
4
CS70
Electrical characteristics curves: current sense
amplifier
Unless otherwise specified, the test conditions for the following curves are:

Tamb = 25 °C, VCC = 5 V, Vsense = Vp - Vm = 50 mV, Vm = 12 V

No load on Out pin
Figure 4. Output voltage vs. Vsense
Figure 5. Output voltage accuracy vs. Vsense
25
6
20
5
10
delta in (%)
4
Vout (V)
Guaranteed
accuracy vs. T
Typical
accuracy
15
3
2
1
5
0
-5
-10
Guaranteed
accuracy @25°C
-15
-20
-25
0
-20
0
20
40
60
80
100
120
0
20
Vsense (mV)
Figure 6. Supply current vs. supply voltage
350
40
60
80
100
Vsense(mV)
Figure 7. Supply current vs. Vsense
400
T = -40 °C
350
300
T = 25 °C
300
250
T = -40°C
250
T = 25 °C
Icc (μA)
Icc (μA)
200
T = 125 °C
150
200
T = 125 °C
150
100
100
50
50
0
0
2.5
3
3.5
4
4.5
5
5.5
-100
0
Vsense (mV)
Vcc (V)
10/24
-50
DocID026041 Rev 1
50
100
CS70
Electrical characteristics curves: current sense amplifier
Figure 8. Vp pin input current vs. Vsense
Figure 9. Vn pin input current vs. Vsense
40
35
T = 25 °C
30
T = -40 °C
20
Im (μA)
Ip (μA)
25
15
10
5
T = 125 °C
0
-100
-50
0
50
20
18
16
14
12
10
8
6
4
2
0
T = 25 °C
T = 125 °C
-100
100
T = -40 °C
-50
Figure 10. Output stage low-state saturation
voltage vs. output current (Vsense = -1 V)
1200
Output stage
sinking current
T = 125 °C
Output stage
sourcing current
1000
800
800
Voh (mV)
T = 125 °C
Vol (mV)
100
Figure 11. Output stage high-state saturation
voltage vs. output current (Vsense = +1 V)
1200
600
400
T = 25 °C
200
600
400
T = -40 °C
T = 25 °C
200
T = -40 °C
0
0
0
2
4
6
8
10
-10
Iout (mA)
-8
-6
-4
-2
0
Iout (mA)
Figure 12. Output stage load regulation
Vout - (Vout @ Iout = 0A) (mV)
50
Vsense (mV)
Vsense (mV)
1000
0
Figure 13. Step response
T = -40°C
1
0
Vsense
-1
T = 125°C
T = 25°C
-2
-3
-4
-5
Output stage
sourcing current
Output stage
sinking current
Vout
-6
-10
-5
0
5
10
Time base
4µs/div
Vsense
50mV/div
Vout 500mV/div
Iout (mA)
DocID026041 Rev 1
11/24
24
Electrical characteristics curves: current sense amplifier
Figure 14. Bode diagram
CS70
Figure 15. Power supply rejection ratio
30
20
3655
G%
Gain (dB)
10
0
-10
-20
-30
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
Frequency (Hz)
Figure 16. Noise level
120
Noise level (nv/sqrt(Hz))
100
80
60
40
20
0
Frequency (Hz)
12/24
)UHTXHQF\+]
DocID026041 Rev 1
CS70
Parameter definitions
5
Parameter definitions
5.1
Common-mode rejection ratio (CMR)
The common-mode rejection ratio (CMR) measures the ability of the current-sensing
amplifier to reject any DC voltage applied on both inputs Vp and Vm. The CMR is referred
back to the input so that its effect can be compared with the applied differential signal. The
CMR is defined by the formula:
V out
CMR = – 20  log --------------------------V icm  Av
5.2
Supply voltage rejection ratio (SVR)
The supply-voltage rejection ratio (SVR) measures the ability of the current-sensing
amplifier to reject any variation of the supply voltage VCC. The SVR is referred back to the
input so that its effect can be compared with the applied differential signal. The SVR is
defined by the formula:
V out
SVR = – 20  log -------------------------V CC  Av
5.3
Gain (Av) and input offset voltage (Vos)
The input offset voltage is defined as the intersection between the linear regression of the
Vout vs. Vsense curve with the X-axis (see Figure 17). If Vout1 is the output voltage with
Vsense = Vsense1 and Vout2 is the output voltage with Vsense = Vsense2, then Vos can be
calculated with the following formula.
V sense1 – V sense2
V os = V sense1 –  ------------------------------------------------  V out1
V out1 – V out2
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24
Parameter definitions
CS70
Figure 17. Vout versus Vsense characteristics: detail for low Vsense values
Vout
Vout_1
Vout_2
Vsense
Vos
Vsense2
Vsense1
AM04520
The values of Vsense1 and Vsense2 used for the input offset calculations are detailed in
Table 10.
Table 10. Test conditions for Vos voltage calculation
Av (V/V)
14/24
Vsense1 (mV)
Vsense2 (mV)
20
50
5
25
50
5
50
50
5
100
40
5
DocID026041 Rev 1
CS70
Output voltage drift versus temperature
The output voltage drift versus temperature is defined as the maximum variation of Vout with
respect to its value at 25 °C over the temperature range. It is calculated as follows:
V out
V out  T amb  – V out  25C 
----------------- = max ------------------------------------------------------------------------T
T amb – 25C
with Tmin < Tamb < Tmax.
Figure 18 provides a graphical definition of the output voltage drift versus temperature. On
this chart, Vout is always within the area defined by the maximum and minimum variation of
Vout versus T, and T = 25 °C is considered to be the reference.
Figure 18. Output voltage drift versus temperature (Av = 50 V/V Vsense = 50 mV)
60
40
Vout-Vout@25°C (mV)
5.4
Parameter definitions
20
0
-20
-40
-60
-60
-40
-20
0
20
40 60
T (°C)
DocID026041 Rev 1
80
100 120 140
15/24
24
Parameter definitions
5.5
CS70
Input offset drift versus temperature
The input voltage drift versus temperature is defined as the maximum variation of Vos with
respect to its value at 25 °C over the temperature range. It is calculated as follows:
V os
V os  T amb  – V os  25C 
--------------- = max -------------------------------------------------------------------T
T amb – 25C
with Tmin < Tamb < Tmax.
Figure 19 provides a graphical definition of the input offset drift versus temperature. On this
chart, Vos is always within the area defined by the maximum and minimum variation of Vos
versus T, and T = 25 °C is considered to be the reference.
Figure 19. Input offset drift versus temperature (Av = 50 V/V)
1.5
Vos-Vos@25°C (mV)
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
-60 -40 -20
5.6
0
20
40 60
T (°C)
80
100 120 140
Output voltage accuracy
The output voltage accuracy is the difference between the actual output voltage and the
theoretical output voltage. Ideally, the current sensing output voltage should be equal to the
input differential voltage multiplied by the theoretical gain, as in the following formula.
Vout-th = Av.Vsense
The actual value is very slightly different, mainly due to the effects of:
16/24

the input offset voltage Vos

the non-linearity
DocID026041 Rev 1
CS70
Parameter definitions
Figure 20. Vout vs. Vsense theoretical and actual characteristics
Vout
Actual
Ideal
Vout accuracy for Vsense = 5 mV
Vsense
5 mV
AM04521
The output voltage accuracy, expressed as a percentage, can be calculated with the
following formula,
abs  V out –  Av  V sense  
V out = ---------------------------------------------------------------------Av  V sense
with 20 V/V, 25 V/V, 50 V/V or 100 V/V depending on the configuration of the SEL1 and
SEL2 pins.
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24
Maximum permissible voltages on pins
6
CS70
Maximum permissible voltages on pins
The CS70 can be used in either a single or dual supply configuration. The dual-supply
configuration is achieved by disconnecting Vcc- and Gnd, and connecting Vcc- to a negative
supply. Figure 21 illustrates how the absolute maximum voltages on input pins Vp and Vm
are referred to the VCC- potential, while the maximum voltages on the positive supply pin,
gain selection pins, and output pins are referred to the Gnd pin. It should also be noted that
the maximum voltage between Vcc- and Vcc+ is limited to 15 V.
Figure 21. Maximum voltages on pins
Vp and Vm
+75 V
SEL1, SEL2 and Out
Vcc-
Vcc+
Vcc+
+15 V
+7 V
Vcc+
+ 0.3 V
Gnd
Gnd
-0.3V
-0.3 V
Vcc+
SEL1, SEL2 and Out
Vcc-
-16 V
Vp and Vm
AM04522
18/24
DocID026041 Rev 1
CS70
Application information
The CS70 can be used to measure current and to feed back the information to a
microcontroller.
Figure 22. Single-supply configuration schematic
Vsense
Iload
Common-mode voltage: 2.9 V to 70 V
Rsense
load
7
Application information
Vp
5V
Vcc+
Vm
Vcc
Rg2
Rg1
SEL1
GPIO1
Voltage
buffer
Sense
amplifier
SEL2
Vout
K2
Rg3
CS70
Vcc-
GPIO2
ADC
Out
Gnd
Gnd
μ Controller
AM04517v1
The current from the supply flows to the load through the Rsense resistor, causing a voltage
drop equal to Vsense across Rsense. The amplifier’s input currents are negligible, therefore its
inverting input voltage is equal to Vm. The amplifier's open-loop gain forces its non-inverting
input to the same voltage as the inverting input. Consequently, the amplifier adjusts the
current flowing through Rg1 so that the voltage drop across Rg1 matches Vsense exactly.
Therefore, the drop across Rg1 is:
VRg1 = Vsense = Rsense.Iload
If IRg1 is the current flowing through Rg1, then IRg1 is given by the formula:
IRg1 = Vsense/Rg1
The IRg1 current flows entirely into resistor Rg3 (the input bias current of the buffer is
negligible). Therefore, the voltage drop on the Rg3 resistor can be calculated as follows.
VRg3 = Rg3.IRg1 = (Rg3/Rg1).Vsense= K1.Vsense with K1=Rg3/Rg1.
The voltage across the Rg3 resistor is buffered to the Out pin by the voltage buffer, featuring
a gain equal to K2. Therefore Vout can be expressed as:
Vout = K1.K2.Vsense = Av.Vsense with Av= K1.K2
or: Vout = Av .Rsense.Iload
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Application information
CS70
The resistor ratio, K1 = Rg3/Rg1, is internally set to 20 V/V, and the voltage buffer gain, K2,
can be set to 1, 1.25, 2.5, or 5 depending on the voltage applied on the SEL1 and SEL2
pins. Since they define the full-scale output range of the application, the Rsense resistor and
the amplification gain Av are important parameters and must therefore be selected carefully.
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8
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
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Package information
8.1
CS70
TSSOP8 package information
Figure 23. TSSOP8 package mechanical drawing
Table 11. TSSOP8 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.20
A1
0.05
A2
0.80
b
Max.
0.047
0.15
0.002
1.05
0.031
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.008
D
2.90
3.00
3.10
0.114
0.118
0.122
E
6.20
6.40
6.60
0.244
0.252
0.260
E1
4.30
4.40
4.50
0.169
0.173
0.177
e
0°
L
0.45
aaa
1.00
0.65
k
L1
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Inches
0.60
0.006
0.039
0.041
0.0256
8°
0°
0.75
0.018
1
8°
0.024
0.030
0.039
0.10
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9
Revision history
Revision history
Table 12. Document revision history
Date
Revision
06-Mar-2014
1
Changes
Initial release.
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