Texas Instruments TMS320C55x Assembly Language Tools (Rev. H) User's Guide
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TMS320C55x Assembly Language Tools v 4.4
User
'
s Guide
Literature Number: SPRU280I
November 2011
2
Copyright © 2011, Texas Instruments Incorporated
SPRU280I – November 2011
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Contents
Preface ......................................................................................................................................
1
2
3
Introduction to the Software Development Tools
1.1
Software Development Tools Overview
...................................................................
................................................................................
1.2
Tools Descriptions
.........................................................................................................
Introduction to Object Modules
2.1
Sections
...........................................................................................
.....................................................................................................................
2.2
How the Assembler Handles Sections
2.2.1
Uninitialized Sections
..................................................................................
............................................................................................
2.2.2
Initialized Sections
................................................................................................
2.2.3
Named Sections
2.2.4
Subsections
..................................................................................................
.......................................................................................................
2.2.5
Section Program Counters
2.2.6
Using Sections Directives
......................................................................................
.......................................................................................
2.3
2.4
2.5
2.6
2.7
2.8
How the Linker Handles Sections
.......................................................................................
2.3.1
Default Memory Allocation
......................................................................................
2.3.2
Placing Sections in the Memory Map
..........................................................................
Relocation
..................................................................................................................
Relocation Issues
..........................................................................................................
Run-Time Relocation
......................................................................................................
Loading a Program
........................................................................................................
Symbols in an Object File
................................................................................................
2.8.1
External Symbols
2.8.2
The Symbol Table
.................................................................................................
................................................................................................
Assembler Description
3.1
3.2
.......................................................................................................
Assembler Overview
......................................................................................................
The Assembler ' s Role in the Software Development Flow
..........................................................
3.3
3.4
Invoking the Assembler
...................................................................................................
C55x Assembler Features
................................................................................................
3.4.1
Byte/Word Addressing
...........................................................................................
3.5
3.6
3.4.2
Parallel Instruction Rules
........................................................................................
3.4.3
Variable-Length Instruction Size Resolution
..................................................................
3.4.4
Memory Modes
...................................................................................................
3.4.5
Assembler Warning On Use of MMR Address
...............................................................
Naming Alternate Directories for Assembler Input
....................................................................
3.5.1
Using the --include_path Assembler Option
..................................................................
3.5.2
Using the C55X_A_DIR Environment Variable
...............................................................
Source Statement Format
3.6.1
Label Field
................................................................................................
.........................................................................................................
3.6.2
Mnemonic Instruction Fields
....................................................................................
3.7
3.6.3
Algebraic Instruction Fields
3.6.4
Comment Field
.....................................................................................
....................................................................................................
Constants
...................................................................................................................
3.7.1
Binary Integers
....................................................................................................
3.7.2
Octal Integers
.....................................................................................................
3.7.3
Decimal Integers
..................................................................................................
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3.8
3.9
3.7.4
Hexadecimal Integers
............................................................................................
3.7.5
Character Constants
.............................................................................................
3.7.6
Assembly-Time Constants
......................................................................................
3.7.7
Floating-Point Constants
Character Strings
........................................................................................
..........................................................................................................
Symbols
.....................................................................................................................
3.9.1
Labels
..............................................................................................................
3.9.2
Local Labels
.......................................................................................................
3.9.3
Symbolic Constants
..............................................................................................
3.9.4
Defining Symbolic Constants (--asm_define Option)
........................................................
3.9.5
Predefined Symbolic Constants
................................................................................
3.9.6
Substitution Symbols
3.10
Expressions
.............................................................................................
................................................................................................................
3.10.1
Operators
.........................................................................................................
3.10.2
Expression Overflow and Underflow
..........................................................................
3.10.3
Well-Defined Expressions
......................................................................................
3.10.4
Conditional Expressions
3.11
Built-in Functions
........................................................................................
..........................................................................................................
3.12
Source Listings
............................................................................................................
3.13
Debugging Assembly Source
............................................................................................
3.14
Cross-Reference Listings
.................................................................................................
Assembler Directives
4.1
.........................................................................................................
Directives Summary
.......................................................................................................
4.2
Directives That Define Sections
.........................................................................................
4.3
4.4
4.5
4.6
4.7
Directives That Initialize Constants
.....................................................................................
Directives That Perform Alignment and Reserve Space
.............................................................
Directives That Format the Output Listings
Directives That Reference Other Files
............................................................................
..................................................................................
Directives That Enable Conditional Assembly
.........................................................................
4.8
4.9
Directives That Define Union or Structure Types
Directives That Define Enumerated Types
.....................................................................
.............................................................................
4.10
Directives That Define Symbols at Assembly Time
...................................................................
4.11
Directives That Communicate Run-Time Environment Details
......................................................
4.12
Miscellaneous Directives
4.13
Directives Reference
.................................................................................................
......................................................................................................
Macro Description
5.1
5.2
5.3
............................................................................................................
Using Macros
.............................................................................................................
Defining Macros
..........................................................................................................
Macro Parameters/Substitution Symbols
.............................................................................
5.3.1
Directives That Define Substitution Symbols
5.3.2
Built-In Substitution Symbol Functions
................................................................
.......................................................................
5.3.3
Recursive Substitution Symbols
5.3.4
Forced Substitution
..............................................................................
.............................................................................................
5.3.5
Accessing Individual Characters of Subscripted Substitution Symbols
..................................
5.4
5.5
5.6
5.7
5.3.6
Substitution Symbols as Local Variables in Macros
Macro Libraries
........................................................
...........................................................................................................
Using Conditional Assembly in Macros
Using Labels in Macros
...............................................................................
.................................................................................................
Producing Messages in Macros
........................................................................................
5.8
5.9
Using Directives to Format the Output Listing
Using Recursive and Nested Macros
.......................................................................
.................................................................................
5.10
Macro Directives Summary
.............................................................................................
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6
7
8
9
Running C54x Code on C55x
6.1
.............................................................................................
C54x to C55x Development Flow
......................................................................................
6.1.1
Initializing the Stack Pointers
..................................................................................
6.2
6.3
6.1.2
Handling Differences in Memory Placement
6.1.3
Updating a C54x Linker Command File
................................................................
......................................................................
Understanding the Listing File
..........................................................................................
Handling Reserved C55x Names
......................................................................................
Migrating a C54x System to a C55x System
7.1
7.1.2
Handling Interrupt Service Routines
........................................................................
Handling Interrupts
.......................................................................................................
7.1.1
Differences in the Interrupt Vector Table
....................................................................
..........................................................................
7.2
7.1.3
Other Issues Related to Interrupts
Assembler Options for C54x Code
............................................................................
....................................................................................
7.2.1
Assume SST Is Disabled (-att Option)
7.2.2
Port for Speed Over Size (-ath Option)
.......................................................................
......................................................................
7.2.3
Optimized Encoding of C54x Circular Addressing (--purecirc Option)
...................................
7.3
7.2.4
Removing NOPs in Delay Slots (-atn Option)
...............................................................
Using Ported C54x Functions with Native C55x Functions
.........................................................
7.3.1
Run-Time Environment for Ported C54x Code
7.3.2
C55x Registers Used as Temporaries
..............................................................
.......................................................................
7.3.3
C54x to C55x Register Mapping
..............................................................................
7.3.4
Caution on Using the T2 Register
7.3.5
Status Bit Field Mapping
............................................................................
.......................................................................................
7.3.6
Switching Between Run-Time Environments
7.3.7
Example of C Code Calling C54x Assembly
7.3.8
Example of C54x Assembly Calling C Code
................................................................
................................................................
................................................................
7.4
7.5
7.6
7.7
Output C55x Source
.....................................................................................................
7.4.1
Command-Line Options
........................................................................................
7.4.2
Processing .include/.copy Files
7.4.3
Problems with the --incl Option
7.4.4
Handling .asg and .set
...............................................................................
...............................................................................
.........................................................................................
7.4.5
Preserve Spacing with the .tab Directive
7.4.6
Assembler-Generated Comments
....................................................................
............................................................................
7.4.7
Handling Macros
................................................................................................
7.4.8
Handling the .if and .loop Directives
..........................................................................
7.4.9
Integration Within Code Composer Studio
..................................................................
Non-Portable C54x Coding Practices
Additional C54x Issues
.................................................................................
..................................................................................................
7.6.1
C54x to C55x Incompatibilities
................................................................................
7.6.2
Handling Program Memory Accesses
........................................................................
Assembler Messages
....................................................................................................
Archiver Description
8.1
Archiver Overview
........................................................................................................
........................................................................................................
8.2
8.3
8.4
The Archiver ' s Role in the Software Development Flow
............................................................
Invoking the Archiver
Archiver Examples
....................................................................................................
.......................................................................................................
8.5
Library Information Archiver Description
..............................................................................
8.5.1
Invoking the Library Information Archiver
....................................................................
8.5.2
Library Information Archiver Example
........................................................................
8.5.3
Listing the Contents of an Index Library
8.5.4
Requirements
.....................................................................
....................................................................................................
Linker Description
9.1
Linker Overview
...........................................................................................................
..........................................................................................................
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9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
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The Linker ' s Role in the Software Development Flow
..............................................................
Invoking the Linker
Linker Options
.......................................................................................................
............................................................................................................
9.4.1
Wild Cards in File, Section, and Symbol Patterns
..........................................................
9.4.2
Relocation Capabilities (--absolute_exe and --relocatable Options)
.....................................
9.4.3
Allocate Memory for Use by the Loader to Pass Arguments (--arg_size Option)
......................
9.4.4
Control Linker Diagnostics
.....................................................................................
9.4.5
Disable Automatic Library Selection (--disable_auto_rts Option)
.........................................
9.4.6
Disable Conditional Linking (--disable_clink Option)
.......................................................
9.4.7
Link Command File Preprocessing (--disable_pp, --define and --undefine Options)
...................
9.4.8
Define an Entry Point (--entry_point Option)
................................................................
9.4.9
Set Default Fill Value (--fill_value Option)
9.4.10
Define Heap Size (--heap_size Option)
...................................................................
.....................................................................
9.4.11
Hiding Symbols
.................................................................................................
9.4.12
Alter the Library Search Algorithm (--library Option, --search_path Option, and C55X_C_DIR
Environment Variable)
..........................................................................................
9.4.13
Change Symbol Localization
.................................................................................
9.4.14
Create a Map File (--map_file Option)
......................................................................
9.4.15
Managing Map File Contents (--mapfile_contents Option)
...............................................
9.4.16
Disable Name Demangling (--no_demangle)
..............................................................
9.4.17
Disable Merge of Symbolic Debugging Information (--no_sym_merge Option)
.......................
9.4.18
Strip Symbolic Information (--no_symtable Option)
.......................................................
9.4.19
Name an Output Module (--output_file Option)
............................................................
9.4.20
C Language Options (--ram_model and --rom_model Options)
.........................................
9.4.21
Create an Absolute Listing File (--run_abs Option)
........................................................
9.4.22
Scan All Libraries for Duplicate Symbol Definitions (--scan_libraries)
..................................
9.4.23
Define Stack Size (--stack_size Option)
....................................................................
9.4.24
Enforce Strict Compatibility (--strict_compatibility Option)
9.4.25
Mapping of Symbols (--symbol_map Option)
................................................
..............................................................
9.4.26
Define Secondary Stack Size (--sysstack Option)
.........................................................
9.4.27
Introduce an Unresolved Symbol (--undef_sym Option)
..................................................
9.4.28
Display a Message When an Undefined Output Section Is Created (--warn_sections Option)
.....
9.4.29
Generate XML Link Information File (--xml_link_info Option)
Byte/Word Addressing
............................................
...................................................................................................
Linker Command Files
..................................................................................................
9.6.1
Reserved Names in Linker Command Files
.................................................................
9.6.2
Constants in Linker Command Files
.........................................................................
9.6.3
The MEMORY Directive
9.6.4
The SECTIONS Directive
........................................................................................
......................................................................................
9.6.5
Specifying a Section ' s Run-Time Address
9.6.6
Using UNION and GROUP Statements
...................................................................
......................................................................
9.6.7
Overlaying Pages
...............................................................................................
9.6.8
Special Section Types (DSECT, COPY, and NOLOAD)
9.6.9
Assigning Symbols at Link Time
..................................................
..............................................................................
9.6.10
Creating and Filling Holes
Object Libraries
....................................................................................
...........................................................................................................
Default Allocation Algorithm
............................................................................................
9.8.1
How the Allocation Algorithm Creates Output Sections
9.8.2
Reducing Memory Fragmentation
...................................................
............................................................................
Linker-Generated Copy Tables
........................................................................................
9.9.1
A Current Boot-Loaded Application Development Process
...............................................
9.9.2
An Alternative Approach
.......................................................................................
9.9.3
Overlay Management Example
...............................................................................
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9.9.4
Generating Copy Tables Automatically With the Linker
9.9.5
The table() Operator
...................................................
............................................................................................
9.9.6
Boot-Time Copy Tables
........................................................................................
9.9.7
Using the table() Operator to Manage Object Components
...............................................
9.9.8
Compression Support
9.9.9
Copy Table Contents
..........................................................................................
...........................................................................................
9.9.10
General Purpose Copy Routine
..............................................................................
9.9.11
Linker-Generated Copy Table Sections and Symbols
....................................................
9.9.12
Splitting Object Components and Overlay Management
.................................................
9.10
Partial (Incremental) Linking
9.11
Linking C/C++ Code
............................................................................................
.....................................................................................................
9.11.1
Run-Time Initialization
.........................................................................................
9.11.2
Object Libraries and Run-Time Support
....................................................................
9.11.3
Setting the Size of the Stack and Heap Sections
.........................................................
9.11.4
Autoinitialization of Variables at Run Time
9.11.5
Initialization of Variables at Load Time
.................................................................
......................................................................
9.11.6
The --rom_model and --ram_model Linker Options
9.12
Linker Example
.......................................................
...........................................................................................................
10 Absolute Lister Description ...............................................................................................
10.1
Producing an Absolute Listing
..........................................................................................
10.2
Invoking the Absolute Lister
10.3
Absolute Lister Example
............................................................................................
................................................................................................
11 Cross-Reference Lister Description
11.1
Producing a Cross-Reference Listing
...................................................................................
.................................................................................
11.2
Invoking the Cross-Reference Lister
11.3
Cross-Reference Listing Example
..................................................................................
.....................................................................................
12 Object File Utilities ...........................................................................................................
12.1
Invoking the Object File Display Utility
................................................................................
12.2
Invoking the Disassembler
12.3
Invoking the Name Utility
..............................................................................................
...............................................................................................
12.4
Invoking the Strip Utility
.................................................................................................
13 Hex Conversion Utility Description ....................................................................................
13.1
The Hex Conversion Utility ' s Role in the Software Development Flow
...........................................
13.2
Invoking the Hex Conversion Utility
...................................................................................
13.2.1
Invoking the Hex Conversion Utility From the Command Line
..........................................
13.2.2
Invoking the Hex Conversion Utility With a Command File
13.3
Understanding Memory Widths
..............................................
........................................................................................
13.3.1
Target Width
....................................................................................................
13.3.2
Data Width
......................................................................................................
13.3.3
Specifying the Memory Width
................................................................................
13.3.4
Partitioning Data Into Output Files
13.3.5
A Memory Configuration Example
...........................................................................
...........................................................................
13.3.6
Specifying Word Order for Output Words
...................................................................
13.4
The ROMS Directive
.....................................................................................................
13.4.1
When to Use the ROMS Directive
...........................................................................
13.4.2
An Example of the ROMS Directive
13.5
The SECTIONS Directive
.........................................................................
...............................................................................................
13.6
The Load Image Format (--load_image Option)
.....................................................................
13.6.1
Load Image Section Formation
13.6.2
Load Image Characteristics
..............................................................................
..................................................................................
13.7
Excluding a Specified Section
13.8
Assigning Output Filenames
..........................................................................................
............................................................................................
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13.9
Image Mode and the --fill Option
.......................................................................................
13.9.1
Generating a Memory Image
.................................................................................
13.9.2
Specifying a Fill Value
.........................................................................................
13.9.3
Steps to Follow in Using Image Mode
......................................................................
13.10
Building a Table for an On-Chip Boot Loader
13.10.1
Description of the Boot Table
.......................................................................
...............................................................................
13.10.2
The Boot Table Format
......................................................................................
13.10.3
How to Build the Boot Table
................................................................................
13.10.4
Booting From a Device Peripheral
.........................................................................
13.10.5
Booting From Memory
.......................................................................................
13.11
Controlling the ROM Device Address
.................................................................................
13.11.1
Controlling the Starting Address
............................................................................
13.11.2
Controlling the Address Increment Index
13.11.3
Dealing With Address Holes
..................................................................
................................................................................
13.12
Control Hex Conversion Utility Diagnostics
13.13
Description of the Object Formats
..........................................................................
.....................................................................................
13.13.1
ASCII-Hex Object Format (--ascii Option)
.................................................................
13.13.2
Intel MCS-86 Object Format (--intel Option)
..............................................................
13.13.3
Motorola Exorciser Object Format (--motorola Option)
..................................................
13.13.4
Extended Tektronix Object Format (--tektronix Option)
.................................................
13.13.5
Texas Instruments SDSMAC (TI-Tagged) Object Format (--ti_tagged Option)
......................
13.13.6
TI-TXT Hex Format (--ti_txt Option)
13.14
Hex Conversion Utility Error Messages
........................................................................
...............................................................................
14 Sharing C/C++ Header Files With Assembly Source
14.1
Overview of the .cdecls Directive
.............................................................
......................................................................................
14.2
Notes on C/C++ Conversions
14.2.1
Comments
..........................................................................................
......................................................................................................
14.2.2
Conditional Compilation (#if/#else/#ifdef/etc.)
14.2.3
Pragmas
..............................................................
.........................................................................................................
14.2.4
The #error and #warning Directives
.........................................................................
14.2.5
Predefined symbol _ _ASM_HEADER_ _
14.2.6
Usage Within C/C++ asm( ) Statements
..................................................................
....................................................................
14.2.7
The #include Directive
.........................................................................................
14.2.8
Conversion of #define Macros
...............................................................................
14.2.9
The #undef Directive
..........................................................................................
14.2.10
Enumerations
14.2.11
C Strings
.................................................................................................
.......................................................................................................
14.2.12
C/C++ Built-In Functions
14.2.13
Structures and Unions
....................................................................................
.......................................................................................
14.2.14
Function/Variable Prototypes
...............................................................................
14.2.15
C Constant Suffixes
14.2.16
Basic C/C++ Types
..........................................................................................
...........................................................................................
14.3
Notes on C++ Specific Conversions
14.3.1
Name Mangling
...................................................................................
................................................................................................
14.3.2
Derived Classes
................................................................................................
14.3.3
Templates
.......................................................................................................
14.3.4
Virtual Functions
...............................................................................................
14.4
Special Assembler Support
.............................................................................................
14.4.1
Enumerations (.enum/.emember/.endenum)
...............................................................
14.4.2
The .define Directive
...........................................................................................
14.4.3
The .undefine/.unasg Directives
14.4.4
The $defined( ) Built-In Function
14.4.5
The $sizeof Built-In Function
.............................................................................
.............................................................................
.................................................................................
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A
B
C
14.4.6
Structure/Union Alignment and $alignof( )
14.4.7
The .cstring Directive
..................................................................
..........................................................................................
Symbolic Debugging Directives
A.1
DWARF Debugging Format
.........................................................................................
............................................................................................
A.2
A.3
COFF Debugging Format
Debug Directive Syntax
...............................................................................................
.................................................................................................
XML Link Information File Description
B.1
B.2
B.2.1
Header Elements
................................................................................
XML Information File Element Types
Document Elements
..................................................................................
.....................................................................................................
................................................................................................
B.2.2
Input File List
....................................................................................................
B.2.3
Object Component List
.........................................................................................
B.2.4
Logical Group List
B.2.5
Placement Map
...............................................................................................
..................................................................................................
B.2.6
Far Call Trampoline List
B.2.7
Symbol Table
........................................................................................
....................................................................................................
Glossary .........................................................................................................................
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List of Figures
1-1.
TMS320C55x Software Development Flow
...........................................................................
2-1.
Partitioning Memory Into Logical Blocks
...............................................................................
2-2.
Using Sections Directives Example
.....................................................................................
2-3.
Object Code Generated by the File in
.................................................................................
2-4.
Combining Input Sections to Form an Executable Object Module
..................................................
3-1.
The Assembler in the TMS320C55x Software Development Flow
.................................................
3-2.
Mnemonic Assembly Listing
.............................................................................................
3-3.
Algebraic Assembly Listing
...............................................................................................
4-1.
The .field Directive
........................................................................................................
4-2.
Initialization Directives
....................................................................................................
4-3.
The .align Directive
........................................................................................................
4-4.
Allocating .bss Blocks Within a Page
...................................................................................
4-5.
Double-Precision Floating-Point Format
................................................................................
4-6.
The .field Directive
.......................................................................................................
4-7.
Single-Precision Floating-Point Format
...............................................................................
4-8.
The .usect Directive
.....................................................................................................
8-1.
The Archiver in the TMS320C55x Software Development Flow
...................................................
9-1.
The Linker in the TMS320C55x Software Development Flow
.....................................................
9-2.
Memory Map Defined in
................................................................................................
9-3.
Section Allocation Defined by
.........................................................................................
9-4.
Run-Time Execution of
.................................................................................................
9-5.
Memory Allocation Shown in and
9-6.
Overlay Pages Defined in and
.....................................................................................
.........................................................................................
9-7.
Compressed Copy Table
................................................................................................
9-8.
Handler Table
............................................................................................................
9-9.
Autoinitialization at Run Time
..........................................................................................
9-10.
Initialization at Load Time
...............................................................................................
10-1.
Absolute Lister Development Flow
....................................................................................
11-1.
The Cross-Reference Lister Development Flow
.....................................................................
13-1.
The Hex Conversion Utility in the TMS320C55x Software Development Flow
..................................
13-2.
Hex Conversion Utility Process Flow
..................................................................................
13-3.
Object File Data and Memory Widths
.................................................................................
13-4.
Data, Memory, and ROM Widths
......................................................................................
13-5.
C55x Memory Configuration Example
................................................................................
13-6.
The infile.out File Partitioned Into Four Output Files
................................................................
13-7.
ASCII-Hex Object Format
...............................................................................................
13-8.
Intel Hexadecimal Object Format
......................................................................................
13-9.
Motorola-S Format
.......................................................................................................
13-10. Extended Tektronix Object Format
13-11. TI-Tagged Object Format
....................................................................................
...............................................................................................
13-12. TI-TXT Object Format
...................................................................................................
10 List of Figures
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List of Tables
3-1.
TMS320C55x Assembler Options
.......................................................................................
3-2.
Operators Used in Expressions (Precedence)
3-3.
Built-In Mathematical Functions
........................................................................
.........................................................................................
3-4.
Symbol Attributes
..........................................................................................................
4-1.
Directives That Define Sections
.........................................................................................
4-2.
Directives That Initialize Values (Data and Memory)
.................................................................
4-3.
Directives That Perform Alignment and Reserve Space
.............................................................
4-4.
Directives That Format the Output Listing
.............................................................................
4-5.
Directives That Reference Other Files
..................................................................................
4-6.
Directives That Effect Symbol Linkage and Visibility
.................................................................
4-7.
Directives That Enable Conditional Assembly
.........................................................................
4-8.
Directives That Define Union or Structure Types
.....................................................................
4-9.
Directives That Define Symbols at Assembly Time
...................................................................
4-10.
Directives That Communicate Run-Time Environment Details
......................................................
4-11.
Directives That Relate to C55x Addressing Modes
...................................................................
4-12.
Directives That Affect Porting C54x Mnemonic Assembly
...........................................................
4-13.
Directives That Create or Effect Macros
...............................................................................
4-14.
Directives That Control Diagnostics
.....................................................................................
4-15.
Directives That Perform Assembly Source Debug
....................................................................
4-16.
Directives That Are Used by the Absolute Lister
......................................................................
4-17.
Directives That Perform Miscellaneous Functions
....................................................................
5-1.
Substitution Symbol Functions and Return Values
..................................................................
5-2.
Creating Macros
..........................................................................................................
5-3.
Manipulating Substitution Symbols
....................................................................................
5-4.
Conditional Assembly
...................................................................................................
5-5.
Producing Assembly-Time Messages
.................................................................................
5-6.
Formatting the Listing
...................................................................................................
7-1.
ST0_55 Status Bit Field Mapping
......................................................................................
7-2.
ST1_55 Status Bit Field Mapping
......................................................................................
7-3.
ST2_55 Status Bit Field Mapping
......................................................................................
7-4.
ST3_55 Status Bit Field Mapping
......................................................................................
7-5.
cl55 Command-Line Options
...........................................................................................
7-6.
Compiler Options That Affect the Assembler
.........................................................................
7-7.
Parallelism Operators
...................................................................................................
9-1.
Basic Options Summary
................................................................................................
9-2.
File Search Path Options Summary
...................................................................................
9-3.
Command File Preprocessing Options Summary
9-4.
Diagnostic Options Summary
...................................................................
..........................................................................................
9-5.
Linker Output Options Summary
.......................................................................................
9-6.
Symbol Management Options Summary
9-7.
Run-Time Environment Options Summary
.............................................................................
...........................................................................
9-8.
Miscellaneous Options Summary
......................................................................................
9-9.
Operators Used in Expressions
........................................................................................
11-1.
Symbol Attributes in Cross-Reference Listing
........................................................................
13-1.
Basic Hex Conversion Utility Options
.................................................................................
13-2.
Boot-Loader Options
.....................................................................................................
13-3.
Options for Specifying Hex Conversion Formats
....................................................................
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A-1.
Symbolic Debugging Directives
........................................................................................
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Preface
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Read This First
About This Manual
The TMS320C55x Assembly Language Tools User's Guide explains how to use these assembly language tools:
• Assembler
• Archiver
• Linker
• Library information archiver
• Absolute lister
• Cross-reference lister
• Disassembler
• Object file display utility
• Name utility
• Strip utility
• Hex conversion utility
How to Use This Manual
This book helps you learn how to use the Texas Instruments assembly language tools designed specifically for the TMS320C55x ™ 24-bit devices. This book consists of four parts:
• Introductory information, consisting of
and
Chapter 2 , gives you an overview of the
assembly language development tools. It also discusses object modules, which helps you to use the
TMS320C55x tools more effectively. Read
before using the assembler and linker.
• Assembler description, consisting of
through
, contains detailed information about using the assembler. This portion explains how to invoke the assembler and discusses source statement format, valid constants and expressions, assembler output, and assembler directives. It also describes the macro language.
• Additional assembly language tools description, consisting of
through
describes in detail each of the tools provided with the assembler to help you create executable object files. For example,
explains how to invoke the linker, how the linker operates, and how to use linker directives;
explains how to use the hex conversion utility.
• Reference material, consisting of
through
, provides supplementary information including symbolic debugging directives that the TMS320C55x C/C++ compiler uses. It also provides a description of the XML link information file and a glossary.
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Notational Conventions
This document uses the following conventions:
• Program listings, program examples, and interactive displays are shown in a special typeface
.
Interactive displays use a bold version of the special typeface to distinguish commands that you enter from items that the system displays (such as prompts, command output, error messages, etc.).
Here is a sample of C code:
{
}
#include <stdio.h> main() printf("hello, cruel world\n");
• In syntax descriptions, the instruction, command, or directive is in a bold typeface and parameters are in an italic typeface. Portions of a syntax that are in bold should be entered as shown; portions of a syntax that are in italics describe the type of information that should be entered.
• Square brackets ( [ and ] ) identify an optional parameter. If you use an optional parameter, you specify the information within the brackets. Unless the square brackets are in the bold typeface, do not enter the brackets themselves. The following is an example of a command that has an optional parameter:
cl55 [options] [filenames] [--run_linker [link_options] [object files]]
• Braces ( { and } ) indicate that you must choose one of the parameters within the braces; you do not enter the braces themselves. This is an example of a command with braces that are not included in the actual syntax but indicate that you must specify either the --rom_model or --ram_model option: cl55 --run_linker {--rom_model | --ram_model} filenames [--output_file= name.out]
--library= libraryname
• In assembler syntax statements, column 1 is reserved for the first character of a label or symbol. If the label or symbol is optional, it is usually not shown. If it is a required parameter, it is shown starting against the left margin of the box, as in the example below. No instruction, command, directive, or parameter, other than a symbol or label, can begin in column 1.
symbol .usect " section name " , size in bytes[, alignment]
• Some directives can have a varying number of parameters. For example, the .byte directive can have multiple parameters. This syntax is shown as [, ..., parameter].
• The TMS320C55x devices are referred to as C55x.
• Following are other symbols and abbreviations used throughout this document:
Symbol
B,b
H, h
LSB
MSB
0x
Q, q
Definition
Suffix — binary integer
Suffix — hexadecimal integer
Least significant bit
Most significant bit
Prefix — hexadecimal integer
Suffix — octal integer
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Related Documentation From Texas Instruments
Related Documentation From Texas Instruments
You can use the following books to supplement this user's guide:
SPRAAO8 — Common Object File Format Application Report. Provides supplementary information on the internal format of COFF object files. Much of this information pertains to the symbolic debugging information that is produced by the C compiler.
SPRU281 — TMS320C55x Optimizing C Compiler User's Guide. Describes the TMS320C55x C/C++
Compiler. This C/C++ compiler accepts ISO standard C/C++ source code and produces assembly language source code for TMS320C55x devices.
SPRU317 — TMS320C55x DSP Peripherals Reference Guide. Introduces the peripherals, interfaces, and related hardware that are available on TMS320C55x DSPs.
SPRU376 — TMS320C55x DSP Programmer's Guide. Describes ways to optimize C and assembly code for the TMS320C55x ™ DSPs and explains how to write code that uses special features and instructions of the DSP.
SPRU393 — TMS320C55x Technical Overview. Introduces the TMS320C55x digital signal processor
(DSP). The TMS320C55x is the latest generation of fixed-point DSPs in the TMS320C5000 ™ DSP platform. Like the previous generations, this processor is optimized for high performance and low-power operation. This book describes the CPU architecture, low-power enhancements, and embedded emulation features of the TMS320C55x.
SWPU067 — TMS320C55x v3.x CPU Mnemonic Instruction Set Reference Guide. Describes the
TMS320C55x 3.x DSP mnemonic instructions individually. Also includes a summary of the instruction set, a list of the instruction opcodes, and a cross-reference to the mnemonic instruction set.
SWPU068 — TMS320C55x v3.x CPU Algebraic Instruction Set Reference Guide. Describes the
TMS320C55x 3.x DSP algebraic instructions individually. Also includes a summary of the instruction set, a list of the instruction opcodes, and a cross-reference to the mnemonic instruction set.
SWPU073 — TMS320C55x DSP CPU Reference Guide, Version 3.0. Describes the architecture, registers, and operation of the CPU for the TMS320C55x ™ digital signal processors (DSPs).
TMS320C55x, XDS510E, C54x, C55x, TMS320C54x are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
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16 Read This First
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Chapter 1
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Introduction to the Software Development Tools
The TMS320C55x ™ is supported by a set of software development tools, which includes an optimizing
C/C++ compiler, an assembler, a linker, and assorted utilities. This chapter provides an overview of these tools.
The TMS320C55x is supported by the following assembly language development tools:
• Assembler
• Archiver
• Linker
• Library information archiver
• Absolute lister
• Cross-reference lister
• Object file display utility
• Disassembler
• Name utility
• Strip utility
• Hex conversion utility
This chapter shows how these tools fit into the general software tools development flow and gives a brief description of each tool. For convenience, it also summarizes the C/C++ compiler and debugging tools.
For detailed information on the compiler and debugger, and for complete descriptions of the
TMS320C55x, refer to the books listed in Related Documentation From Texas Instruments.
Topic
...........................................................................................................................
Page
1.1
Software Development Tools Overview
1.2
Tools Descriptions
................................................................
............................................................................................
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1.1
Software Development Tools Overview
shows the TMS320C55x software development flow. The shaded portion highlights the most common development path; the other portions are optional. The other portions are peripheral functions that enhance the development process.
Figure 1-1. TMS320C55x Software Development Flow
C/C++ source files
Macro source files
C/C++ compiler
Archiver
Assembler source
C++ name demangling utility
Macro library
Assembler
Archiver
Library of object files
Object files
Linker
Library-build utility
Run-timesupport library
Debugging tools
Executable object file
Hex-conversion utility
Programmer Absolute lister
Cross-reference lister
Object file utilities
C55x
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Tools Descriptions
1.2
Tools Descriptions
The following list describes the tools that are shown in
• The C/C++ compiler accepts C/C++ source code and produces TMS320C55x machine code object modules. A shell program, an optimizer, and an interlist utility are included in the compiler package:
– The shell program enables you to compile, assemble, and link source modules in one step.
– The optimizer modifies code to improve the efficiency of C/C++ programs.
– The interlist utility interlists C/C++ source statements with assembly language output to correlate code produced by the compiler with your source code.
See the TMS320C55x Optimizing C/C++ Compiler User's Guide for more information.
• The assembler translates assembly language source files into machine language object modules. The
TMS320C55x assembler accepts C54x and C55x mnemonic assembly source files, or C55x algebraic assembly source files. Source files can contain instructions, assembler directives, and macro directives. You can use assembler directives to control various aspects of the assembly process, such as the source listing format, data alignment, and section content. See
through
See the TMS320C55x DSP Algebraic Instruction Set Reference Guide, the TMS320C55x DSP
Mnemonic Instruction Set Reference Guide, for detailed information on the assembly language instruction set.
• The linker combines object files into a single executable object module. As it creates the executable module, it performs relocation and resolves external references. The linker accepts relocatable object modules (created by the assembler) as input. It also accepts archiver library members and output modules created by a previous linker run. Link directives allow you to combine object file sections, bind sections or symbols to addresses or within memory ranges, and define or redefine global symbols. See
• The archiver allows you to collect a group of files into a single archive file, called a library. You can also use the archiver to collect a group of object files into an object library. You can collect several macros into a macro library. The assembler searches the library and uses the members that are called as macros by the source file. The linker includes in the library the members that resolve external references during the link. The archiver allows you to modify a library by deleting, replacing, extracting, or adding members. See
• The library information archiver allows you to create an index library of several object file library variants, which is useful when several variants of a library with different options are available. Rather than refer to a specific library, you can link against the index library, and the linker will choose the best match from the indexed libraries. See
.
• You can use the library-build utility to build your own customized run-time-support library. See the
TMS320C55x Optimizing C/C++ Compiler User's Guide for more information.
• The hex conversion utility converts an object file into TI-Tagged, ASCII-Hex, Intel, Motorola-S, or
Tektronix object format. The converted file can be downloaded to an EPROM programmer. See
• The absolute lister uses linked object files to create .abs files. These files can be assembled to produce a listing of the absolute addresses of object code. See
• The cross-reference lister uses object files to produce a cross-reference listing showing symbols, their definition, and their references in the linked source files. See
• The main product of this development process is a executable object file that can be executed in a
TMS320C55x device. You can use one of several debugging tools to refine and correct your code.
Available products include:
– An instruction-level and clock-accurate software simulator
– An extended development system ( XDS510E ™ emulator
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In addition, the following utilities are provided:
• The object file display utility prints the contents of object files, executable files, and archive libraries in either human readable or XML formats. See
• The disassembler decodes object modules to show the assembly instructions that it represents. See
.
• The name utility prints a list of linknames of objects and functions defined or referenced in a object or an executable file. See
.
• The strip utility removes symbol table and debugging information from object and executable files.
See
.
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Chapter 2
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Introduction to Object Modules
The assembler creates object modules from assembly code, and the linker creates executable object files from object modules. These executable object files can be executed by a TMS320C55x device.
Object modules make modular programming easier because they encourage you to think in terms of
blocks of code and data when you write an assembly language program. These blocks are known as sections. Both the assembler and the linker provide directives that allow you to create and manipulate sections.
This chapter focuses on the concept and use of sections in assembly language programs.
Topic
...........................................................................................................................
Page
2.1
Sections ...........................................................................................................
2.2
How the Assembler Handles Sections .................................................................
2.3
How the Linker Handles Sections ........................................................................
2.4
Relocation ........................................................................................................
2.5
Relocation Issues ..............................................................................................
2.6
Run-Time Relocation
2.7
Loading a Program
.........................................................................................
............................................................................................
2.8
Symbols in an Object File ...................................................................................
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2.1
Sections
The smallest unit of an object file is a section. A section is a block of code or data that occupies contiguous space in the memory map with other sections. Each section of an object file is separate and distinct. Object files usually contain three default sections:
.text section
.data section
.bss section contains executable code (1) usually contains initialized data usually reserves space for uninitialized variables
(1) Some targets allow non-text in .text sections.
In addition, the assembler and linker allow you to create, name, and link named sections that are used like the .data, .text, and .bss sections.
There are two basic types of sections:
Initialized sections
Uninitialized sections contain data or code. The .text and .data sections are initialized; named sections created with the .sect assembler directive are also initialized.
reserve space in the memory map for uninitialized data. The .bss section is uninitialized; named sections created with the .usect assembler directive are also uninitialized.
Several assembler directives allow you to associate various portions of code and data with the appropriate sections. The assembler builds these sections during the assembly process, creating an object file organized as shown in
.
One of the linker's functions is to relocate sections into the target system's memory map; this function is called allocation. Because most systems contain several types of memory, using sections can help you use target memory more efficiently. All sections are independently relocatable; you can place any section into any allocated block of target memory. For example, you can define a section that contains an initialization routine and then allocate the routine into a portion of the memory map that contains ROM.
shows the relationship between sections in an object file and a hypothetical target memory.
Figure 2-1. Partitioning Memory Into Logical Blocks
Object file Target memory
.bss
RAM
EEPROM .data
.text
ROM
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How the Assembler Handles Sections
2.2
How the Assembler Handles Sections
The assembler identifies the portions of an assembly language program that belong in a given section.
The assembler has five directives that support this function:
• .bss
• .usect
• .text
• .data
• .sect
The .bss and .usect directives create uninitialized sections; the .text, .data, and .sect directives create
initialized sections.
You can create subsections of any section to give you tighter control of the memory map. Subsections are created using the .sect and .usect directives. Subsections are identified with the base section name and a subsection name separated by a colon; see
Default Sections Directive
NOTE: If you do not use any of the sections directives, the assembler assembles everything into the
.text section.
2.2.1 Uninitialized Sections
Uninitialized sections reserve space in TMS320C55x memory; they are usually allocated into RAM. These sections have no actual contents in the object file; they simply reserve memory. A program can use this space at run time for creating and storing variables.
Uninitialized data areas are built by using the .bss and .usect assembler directives.
• The .bss directive reserves space in the .bss section.
• The .usect directive reserves space in a specific uninitialized named section.
Each time you invoke the .bss or .usect directive, the assembler reserves additional space in the .bss or the named section. The syntaxes for these directives are: symbol
.bss symbol, size in words[, [blocking flag[, alignment flag] ]
.usect
" section name " , size in words[, blocking flag[, alignment] ] symbol size in words points to the first word reserved by this invocation of the .bss or .usect directive. The
symbol corresponds to the name of the variable that you are reserving space for. It can be referenced by any other section and can also be declared as a global symbol (with the .global directive).
is an absolute expression. The .bss directive reserves size in words words in the .bss
section. The .usect directive reserves size in words words in section name. For either directive you must specify a size; there is no default value.
blocking flag is an optional parameter. If you specify a value greater than 0 for this parameter, the assembler allocates size in words contiguously. This means the allocated space does not cross a page boundary unless its size is greater than a page, in which case the objects starts a page boundary.
alignment flag is an optional parameter. It causes the assembler to allocate size in words on word boundaries.
section name tells the assembler which named section to reserve space in. See
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The initialized section directives (.text, .data, and .sect) tell the assembler to stop assembling into the current section and begin assembling into the indicated section. The .bss and .usect directives, however,
do not end the current section and begin a new one; they simply escape from the current section temporarily. The .bss and .usect directives can appear anywhere in an initialized section without affecting its contents. For an example, see
The .usect directive can also be used to create uninitialized subsections. See
information on creating subsections.
2.2.2 Initialized Sections
Initialized sections contain executable code or initialized data. The contents of these sections are stored in the object file and placed in TMS320C55x memory when the program is loaded. Each initialized section is independently relocatable and may reference symbols that are defined in other sections. The linker automatically resolves these section-relative references.
Three directives tell the assembler to place code or data into a section. The syntaxes for these directives are:
.text
.data
.sect
" section name "
The assembler adds code or data to one section at a time. The section the assembler is currently filling is the current section. The .text, .data, and .sect directives change the current section. When the assembler encounters one of these directives, it stops assembling into the current section (acting as an implied end of current section command). The assembler sets the designated section as the current section and assembles subsequent code into the designated section until it encounters another .text, .data, or .sect
directive.
If one of these directives sets the current section to a section that already has code or data in it, the assembler resumes adding to the end of that section. The assembler generates only one contiguous section for each given section name. This section is formed by concatenating allof the code or data which was placed in that section.
Initialized subsections are created with the .sect directive. The .sect directive can also be used to create initialized subsections. See
, for more information on creating subsections.
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How the Assembler Handles Sections
2.2.3 Named Sections
Named sections are sections that you create. You can use them like the default .text, .data, and .bss
sections, but they are assembled separately.
For example, repeated use of the .text directive builds up a single .text section in the object file. When linked, this .text section is allocated into memory as a single unit. Suppose there is a portion of executable code (perhaps an initialization routine) that you do not want allocated with .text. If you assemble this segment of code into a named section, it is assembled separately from .text, and you can allocate it into memory separately. You can also assemble initialized data that is separate from the .data section, and you can reserve space for uninitialized variables that is separate from the .bss section.
Two directives let you create named sections:
• The .usect directive creates uninitialized sections that are used like the .bss section. These sections reserve space in RAM for variables.
• The .sect directive creates initialized sections, like the default .text and .data sections, that can contain code or data. The .sect directive creates named sections with relocatable addresses.
The syntaxes for these directives are: symbol .usect
" section name " , size in bytes[, blocking flag[, alignment] ]
.sect
" section name "
The section name parameter is the name of the section. You can create up to 32 767 separate named sections. For the .usect and .sect directives, a section name can refer to a subsection; see
for details.
Each time you invoke one of these directives with a new name, you create a new named section. Each time you invoke one of these directives with a name that was already used, the assembler assembles code or data (or reserves space) into the section with that name. You cannot use the same names with
different directives. That is, you cannot create a section with the .usect directive and then try to use the same section with .sect.
2.2.4 Subsections
Subsections are smaller sections within larger sections. Like sections, subsections can be manipulated by the linker. Placing each function and object in a uniquely-named subsection allows finer-grained memory placement, and also allows the linker finer-grained unused-function elimination. You can create subsections by using the .sect or .usect directive. The syntaxes for a subsection name are: symbol .usect
" section name:subsection name " ,size in bytes[,blocking flag[,alignment]]
.sect
" section name:subsection name "
A subsection is identified by the base section name followed by a colon and the name of the subsection. A subsection can be allocated separately or grouped with other sections using the same base name. For example, you create a subsection called _func within the .text section:
.sect ".text:_func"
Using the linker's SECTIONS directive, you can allocate .text:_func separately, or with all the .text
sections. See
for an example using subsections.
You can create two types of subsections:
• Initialized subsections are created using the .sect directive. See
.
• Uninitialized subsections are created using the .usect directive. See
Subsections are allocated in the same manner as sections. See
for information on the
SECTIONS directive.
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2.2.5 Section Program Counters
The assembler maintains a separate program counter for each section. These program counters are known as section program counters, or SPCs.
An SPC represents the current address within a section of code or data. Initially, the assembler sets each
SPC to 0. As the assembler fills a section with code or data, it increments the appropriate SPC. If you resume assembling into a section, the assembler remembers the appropriate SPC's previous value and continues incrementing the SPC from that value.
The assembler treats each section as if it began at address 0; the linker relocates each section according to its final location in the memory map. See
for information on relocation.
2.2.6 Using Sections Directives
shows how you can build sections incrementally, using the sections directives to swap back and forth between the different sections. You can use sections directives to begin assembling into a section for the first time, or to continue assembling into a section that already contains code. In the latter case, the assembler simply appends the new code to the code that is already in the section.
The format in
is a listing file.
shows how the SPCs are modified during assembly. A line in a listing file has four fields:
Field 1
Field 2
Field 3
Field 4 contains the source code line counter.
contains the section program counter.
contains the object code.
contains the original source statement.
See
for more information on interpreting the fields in a source listing.
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How the Assembler Handles Sections
Figure 2-2. Using Sections Directives Example
2
3
4
5 000000
************************************************
** Assemble an initialized table into .data. **
************************************************
.data
.word
011h,022h,033h 6 000000 0011 coeff
000001 0022
000002 0033
7
8
9
10 000000
************************************************
** Reserve space in .bss for a variable.
**
************************************************
.bss
buffer,10
11
12
************************************************
** Still in .data.
**
13 ************************************************
14 000003 0123 ptr .word
0123h
15
16
17
18 000000
19 000000 A01E add:
20 000002 4210 aloop:
21 000004 0450
000006 FB
************************************************
** Assemble code into the .text section.
**
************************************************
.text
MOV
SUB
BCC
0Fh,AC0
#1,AC0 aloop,AC0>=#0
22
23
24
************************************************
** Another initialized table into .data.
**
************************************************
25 000004
26 000004 00AA ivals
.data
.word
0AAh, 0BBh, 0CCh
27
28
29
000005 00BB
000006 00CC
30 000000
31 000001
32
33
34
************************************************
** Define another section for more variables. **
************************************************ var2 .usect
”newvars”, 1 inbuf
.text
MOV
MOV
MPYK
”newvars”, 7
************************************************
**
.usect
Assemble more code into .text.
BCC
0Ah,AC1
T3,HI(AC2)
#10,AC2,AC1 mloop,!overflow(AC1)
**
************************************************
35 000007
36 000007 A114 mpy:
37 000009 2272 mloop:
38 00000b 1E0A
00000d 90
39 00000e 0471
000010 F8
40 ************************************************
41
42
43 000000
44 000000 0011
45 000001 0033
** Define a named section for int. vectors.
**
************************************************
.sect
.word
”vectors”
011h, 033h
Field 1 Field 2 Field 3 Field 4
As
shows, the file in
creates five sections:
.text
.data
vectors
.bss
newvars contains 17 bytes of object code.
contains seven words of initialized data.
is a named section created with the .sect directive; it contains two words of object code.
reserves 10 words in memory.
is a named section created with the .usect directive; it contains eight words in memory.
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How the Linker Handles Sections www.ti.com
The second column shows the object code that is assembled into these sections; the first column shows the source statements that generated the object code.
Figure 2-3. Object Code Generated by the File in
Line numbers Object code Section
.text
6
14
6
6
26
26
26
37
38
38
39
39
19
20
21
21
36
0011
0022
0033
0123
00aa
00bb
00cc
A01E
4210
0450
FB
A114
5272
1E0A
90
0471
F8
.data
vectors
44
45
0011
0033
10
No data -
10 words reserved
.bss
30
31
No data -
8 words reserved newvars
2.3
How the Linker Handles Sections
The linker has two main functions related to sections. First, the linker uses the sections in object files as building blocks; it combines input sections (when more than one file is being linked) to create output sections in an executable output module. Second, the linker chooses memory addresses for the output sections; this is called placement.
Two linker directives support these functions:
• The MEMORY directive allows you to define the memory map of a target system. You can name portions of memory and specify their starting addresses and their lengths.
• The SECTIONS directive tells the linker how to combine input sections into output sections and where to place these output sections in memory.
Subsections allow you to manipulate sections with greater precision. You can specify subsections with the linker's SECTIONS directive. If you do not specify a subsection explicitly, then the subsection is combined with the other sections with the same base section name.
It is not always necessary to use linker directives. If you do not use them, the linker uses the target processor's default allocation algorithm described in
. When you do use linker directives, you must specify them in a linker command file.
Refer to the following sections for more information about linker command files and linker directives:
•
•
, The MEMORY Directive
•
, The SECTIONS Directive
•
, Default Allocation Algorithm
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2.3.1 Default Memory Allocation
illustrates the process of linking two files together.
How the Linker Handles Sections
Figure 2-4. Combining Input Sections to Form an Executable Object Module file1.obj
.text
Executable object module Memory map
.bss
.data
Init
(named section) file2.obj
.text
file1
(.text) file2
(.text) file1
(.data) file2
(.data) file1
(.bss) file2
(.bss)
Executable code
(.text)
Initialized data
(.data)
Space for variables
(.bss)
.bss
Init Init
.data
Tables
(named section)
Tables Tables
In
.text, .data, and .bss default sections; in addition, each contains a named section. The executable object module shows the combined sections. The linker combines the .text section from file1.obj and the .text
section from file2.obj to form one .text section, then combines the two .data sections and the two .bss
sections, and finally places the named sections at the end. The memory map shows how the sections are put into memory.
By default, the linker begins at 0h and places the sections one after the other in the following order: .text,
.const, .data, .bss, .cinit, and then any named sections in the order they are encountered in the input files.
The C/C++ compiler uses the .const section to store string constants, and variables or arrays that are declared as const. The C/C++ compiler produces tables of data for autoinitializing global variables; these variables are stored in a named section called .cinit (see
). For more information on the .const
and .cinit sections, see the TMS320C55x Optimizing C/C++ Compiler User's Guide.
2.3.2 Placing Sections in the Memory Map
illustrates the linker's default method for combining sections. Sometimes you may not want to use the default setup. For example, you may not want all of the .text sections to be combined into a single
.text section. Or you may want a named section placed where the .data section would normally be allocated. Most memory maps contain various types of memory (RAM, ROM, EPROM, etc.) in varying amounts; you may want to place a section in a specific type of memory.
For further explanation of section placement within the memory map, see the discussions in
and
.
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Introduction to Object Modules 29
Relocation www.ti.com
2.4
Relocation
The assembler treats each section as if it began at address 0. All relocatable symbols (labels) are relative to address 0 in their sections. Of course, all sections cannot actually begin at address 0 in memory, so the linker relocates sections by:
• Allocating them into the memory map so that they begin at the appropriate address as defined with the linker's MEMORY directive
• Adjusting symbol values to correspond to the new section addresses
• Adjusting references to relocated symbols to reflect the adjusted symbol values
The linker uses relocation entries to adjust references to symbol values. The assembler creates a relocation entry each time a relocatable symbol is referenced. The linker then uses these entries to patch the references after the symbols are relocated.
contains a code segment for a TMS320C55x device that generates relocation entries.
Example 2-1. Code That Generates Relocation Entries
1
2
3 000000
4 000000 4A04
.ref
X
.ref
Z
.text
B Y
B Z ;Generates relocation entry 5 000002 6A00
000004 0000!
6 000006 7600
000008 0008!
MOV #X,AC0 ;Generates relocation entry
7 00000a 9400 Y: reset
In
PC and relocation is not necessary. Symbol Z is PC-relative and needs relocation because it is in a different file. When the code is assembled, X and Z have a value of 0 (the assembler assumes all undefined external symbols have values of 0). The assembler generates a relocation entry for X and Z.
The references to X and Z are external references (indicated by the ! character in the listing).
Each section in an object module has a table of relocation entries. The table contains one relocation entry for each relocatable reference in the section. The linker usually removes relocation entries after it uses them. This prevents the output file from being relocated again (if it is relinked or when it is loaded). A file that contains no relocation entries is an absolute file (all its addresses are absolute addresses). If you want the linker to retain relocation entries, invoke the linker with the --relocatable option (see
).
2.5
Relocation Issues
The linker may warn you about certain relocation issues.
In an assembly program, if an instruction with a PC-relative field contains a reference to a symbol, label, or address, the relative displacement is expected to fit in the instruction's field. If the displacement does not fit into the field (because the referenced item's location is too far away), the linker issues an error. For example, the linker will issue an error message when an instruction with an 8-bit, unsigned, PC-relative field references a symbol located 256 or more bytes away from the instruction.
Similarly, if an instruction with an absolute address field contains a reference to a symbol, label, or address, the referenced item is expected to be located at an address that will fit in the instruction's field.
For example, if a function is linked at 0x10000, its address cannot be encoded into a 16-bit instruction field.
In both cases, the linker truncates the high bits of the value.
To deal with these issues, examine your link map and linker command file. You may be able to rearrange output sections to put referenced symbols closer to the referencing instruction.
Alternatively, consider using a different assembly instruction with a wider field. Or, if you only need the lower bits of a symbol, use a mask expression to zero out the upper bits.
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Run-Time Relocation
2.6
Run-Time Relocation
At times you may want to load code into one area of memory and run it in another. For example, you may have performance-critical code in an external-memory-based system. The code must be loaded into external memory, but it would run faster in internal memory.
The linker provides a simple way to handle this. Using the SECTIONS directive, you can optionally direct the linker to allocate a section twice: first to set its load address and again to set its run address. Use the
load keyword for the load address and the run keyword for the run address.
The load address determines where a loader places the raw data for the section. Any references to the section (such as references to labels in it) refer to its run address. The application must copy the section from its load address to its run address before the first reference of the symbol is encountered at run time; this does not happen automatically simply because you specify a separate run address. For an example that illustrates how to move a block of code at run time, see
If you provide only one allocation (either load or run) for a section, the section is allocated only once and loads and runs at the same address. If you provide both allocations, the section is actually allocated as if it were two separate sections of the same size.
Uninitialized sections (such as .bss) are not loaded, so the only significant address is the run address. The linker allocates uninitialized sections only once; if you specify both run and load addresses, the linker warns you and ignores the load address.
For a complete description of run-time relocation, see
2.7
Loading a Program
The linker produces executable object modules. An executable object module has the same format as object files that are used as linker input; the sections in an executable object module, however, are combined and relocated into target memory, and the relocations are all resolved.
To run a program, the data in the executable object module must be transferred, or loaded, into target system memory. Several methods can be used for loading a program, depending on the execution environment. Common situations are described below:
• Code Composer Studio can load an executable object module onto hardware. The Code Composer
Studio loader reads the executable file and copies the program into target memory.
• You can use the hex conversion utility (hex55, which is shipped as part of the assembly language package) to convert the executable object module into one of several object file formats. You can then use the converted file with an EPROM programmer to burn the program into an EPROM.
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Introduction to Object Modules 31
Symbols in an Object File www.ti.com
2.8
Symbols in an Object File
An object file contains a symbol table that stores information about symbols in the program. The linker uses this table when it performs relocation.
2.8.1 External Symbols
External symbols are symbols that are defined in one file and referenced in another file. You can use the
.def, .ref, or .global directive to identify symbols as external:
.def
.ref
.global
The symbol is defined in the current file and used in another file.
The symbol is referenced in the current file, but defined in another file.
The symbol can be either of the above.
The following code segment illustrates these definitions.
.def
x
.ref
y x: ADD
B
; DEF of x
; REF of y
#86,AC0,AC0 ; Define x y ; Reference y
In this example, the .def definition of x says that it is an external symbol defined in this module and that other modules can reference x. The .ref definition of y says that it is an undefined symbol that is defined in another module.
The assembler places both x and y in the object file ’ s symbol table. When the file is linked with other object files, the entry for x resolves references to x from other files. The entry for y causes the linker to look through the symbol tables of other files for y ’ s definition.
The linker must match all references with corresponding definitions. If the linker cannot find a symbol's definition, it prints an error message about the unresolved reference. This type of error prevents the linker from creating an executable object module.
2.8.2 The Symbol Table
The assembler always generates an entry in the symbol table when it encounters an external symbol
(both definitions and references defined by one of the directives in
). The assembler also creates special symbols that point to the beginning of each section; the linker uses these symbols to relocate references to other symbols.
The assembler does not usually create symbol table entries for any symbols other than those described above, because the linker does not use them. For example, labels are not included in the symbol table unless they are declared with the .global directive. For informational purposes, it is sometimes useful to have entries in the symbol table for each symbol in a program. To accomplish this, invoke the assembler with the --output_all_syms option (see
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Chapter 3
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Assembler Description
The TMS320C55x assembler translates assembly language source files into machine language object files. These files are in object modules, which are discussed in
. Source files can contain the following assembly language elements:
Assembler directives
Macro directives
Assembly language instructions described in described in
described in the TMS320C55x CPU Mnemonic Instruction Set
Reference Guide and the TMS320C55x CPU Algebraic
Instruction Set Reference Guide.
Topic
...........................................................................................................................
Page
3.1
Assembler Overview ..........................................................................................
3.2
The Assembler ' s Role in the Software Development Flow ......................................
3.3
Invoking the Assembler .....................................................................................
3.4
C55x Assembler Features ...................................................................................
3.5
Naming Alternate Directories for Assembler Input .................................................
3.6
Source Statement Format
3.7
Constants
...................................................................................
.........................................................................................................
3.8
Character Strings
3.9
Symbols
..............................................................................................
...........................................................................................................
3.10
Expressions ......................................................................................................
3.11
Built-in Functions ..............................................................................................
3.12
Source Listings .................................................................................................
3.13
Debugging Assembly Source ..............................................................................
3.14
Cross-Reference Listings ...................................................................................
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Assembler Overview www.ti.com
3.1
Assembler Overview
TMS320C55x has two assemblers:
• The mnemonic assembler accepts C54x ™ mnemonic and C55x ™ mnemonic assembly source.
• The algebraic assembler accepts only C55x algebraic assembly source.
Each assembler does the following:
• Processes the source statements in a text file to produce a relocatable object file
• Produces a source listing (if requested) and provides you with control over this listing
• Allows you to divide your code into sections and maintain a section program counter (SPC) for each section of object code
• Defines and references global symbols and appends a cross-reference listing to the source listing (if requested)
• Allows conditional assembly
• Supports macros, allowing you to define macros inline or in a library
The mnemonic assembler generates error and warning messages for C54x instructions that are not supported. Some C54x instructions do not map directly to a single C55x instruction. The mnemonic assembler will translate these instructions into an appropriate series of C55x instructions. The listing file generated by the assembler (with the --asm_listing option) shows the translations that have occurred. See
for more information on running C54x code on C55x.
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The Assembler ' s Role in the Software Development Flow
3.2
The Assembler
'
s Role in the Software Development Flow
illustrates the assembler's role in the software development flow. The shaded portion highlights the most common assembler development path. The assembler accepts assembly language source files as input, both those you create and those created by the TMS320C55x C/C++ compiler.
Figure 3-1. The Assembler in the TMS320C55x Software Development Flow
C/C++ source files
Macro source files
C/C++ compiler
Archiver
Assembler source
C++ name demangling utility
Macro library
Assembler
Archiver
Library of object files
Object files
Linker
Library-build utility
Run-timesupport library
Debugging tools
Executable object file
Hex-conversion utility
Programmer Absolute lister
Cross-reference lister
Object file utilities
C55x
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Assembler Description 35
Option
--absolute_listing
-ar=num
--asm_define=name[=def]
--asm_dependency
--asm_includes
--asm_listing
--asm_source=algebraic
-atn
-atp
-ats
--asm_undefine=name
-ata
-atb
-atc
-ath
-atl
Invoking the Assembler
3.3
Invoking the Assembler
To invoke the assembler, enter the following:
cl55 input file [options] www.ti.com
cl55 input file options is the command that invokes the assembler through the compiler. The compiler considers any file with an .asm extension to be an assembly file and calls the assembler.
names the assembly language source file.
identify the assembler options that you want to use. Options are case sensitive and can appear anywhere on the command line following the command. Precede each option with one or two hyphens as shown.
The valid assembler options are listed in
Alias
-aa
-ad
-apd
-api
-al
-mg
-au
-ma
-mc
-mh
-ml
-mn
-ms
Table 3-1. TMS320C55x Assembler Options
Description
Creates an absolute listing. When you use --absolute_listing, the assembler does not produce an object file. The --absolute_listing option is used in conjunction with the absolute lister.
Suppresses the assembler remark identified by num. A remark is an informational assembler message that is less severe than a warning. If you do not specify a value for #, all remarks are suppressed. For a description of assembler remarks, see
.
Sets the name symbol. This is equivalent to defining name with a .set directive in the case of a numeric value or with an .asg directive otherwise. If value is omitted, the symbol is set to 1.
See
.
Performs preprocessing for assembly files, but instead of writing preprocessed output, writes a list of dependency lines suitable for input to a standard make utility. The list is written to a file with the same name as the source file but with a .ppa extension.
Performs preprocessing for assembly files, but instead of writing preprocessed output, writes a list of files included with the .include directive. The list is written to a file with the same name as the source file but with a .ppa extension.
Produces a listing file with the same name as the input file with a .lst extension.
Causes the assembler to accept algebraic assembly files. You must use the − asm_source option to assemble algebraic assembly input files. Algebraic and mnemonic source code cannot be mixed in a single source file.
Undefines the predefined constant name, which overrides any --asm_define options for the specified constant.
(ARMS mode) Informs the assembler that the ARMS status bit will be enabled during the execution of this source file. By default, the assembler assumes that the bit is disabled.
Causes the assembler to treat parallel bus conflict errors as warnings.
(CPL mode) Tells the assembler to assume that the CPL status bit is initially set during the execution of this source file. This causes the assembler to enforce the use of SP-relative addressing syntax. By default, the assembler assumes that the bit is disabled.
Causes the assembler to generate faster code rather than smaller code when porting your
C54x files. By default, the assembler tries to encode for small code size.
(C54x compatibility mode) Tells the assembler to assume the C54CM status bit will be enabled during the execution of this source file. By default, the assembler assumes that the bit is disabled.
Causes the assembler to remove NOPs located in the delay slots of C54x delayed branch/call instructions. For more information, see
Causes the assembler to generate an assembly instruction profile file with an extension of .prf.
The file contents are usage counts for each kind of instruction used in the assembly code.
(Mnemonic assembly only) Loosens the requirement that a literal shift count operand begin with a # character. This provides compatibility with early versions of the mnemonic assembler.
When this option is used and the # is omitted, a warning is issued advising you to change to the new syntax.
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Option
-att
-atv
-atw
--cmd_file=filename
--copy_file=filename
--cross_reference
--include_file=filename
--include_path=pathname
--output_all_syms
--purecirc
--quiet
--symdebug:dwarf
--syms_ignore_case
Invoking the Assembler
Table 3-1. TMS320C55x Assembler Options (continued)
Alias
-mt
-mv
-mw
-@
-ahc
-ax
-ahi
-I
-as
-q
-g
-ac
Description
Tells the assembler to assume that the SST status bit is zero during the execution of this source file. By default, the assembler assumes that the bit is enabled.
Tells the assembler to assume that all goto/calls are to be encoded as 24-bit offset. By default, the assembler tries to resolve all variable-length instructions to their smallest size.
(Algebraic assembly only) Suppresses all assembler warning messages.
Appends the contents of a file to the command line. You can use this option to avoid limitations on command line length imposed by the host operating system. Use an asterisk or a semicolon (* or ;) at the beginning of a line in the command file to include comments.
Comments that begin in any other column must begin with a semicolon. Within the command file, filenames or option parameters containing embedded spaces or hyphens must be surrounded with quotation marks. For example: " this-file.asm
"
Copies the specified file for the assembly module. The file is inserted before source file statements. The copied file appears in the assembly listing files.
Produces a cross-reference table and appends it to the end of the listing file; it also adds cross-reference information to the object file for use by the cross-reference utility. If you do not request a listing file but use the --cross_reference option, the assembler creates a listing file automatically, naming it with the same name as the input file with a .lst extension.
Includes the specified file for the assembly module. The file is included before source file statements. The included file does not appear in the assembly listing files.
Specifies a directory where the assembler can find files named by the .copy, .include, or .mlib
directives. There is no limit to the number of directories you can specify in this manner; each pathname must be preceded by the --include_path option. See
Puts all defined symbols in the object file ' s symbol table. The assembler usually puts only global symbols into the symbol table. When you use --output_all_syms, symbols defined as labels or as assembly-time constants are also placed in the table.
(Mnemonic assembly only) Asserts to the assembler that the C54x file uses C54x circular addressing (does not use the C55x linear/circular mode bits). For more information, see
.
Suppresses the banner and progress information (assembler runs in quiet mode).
Enables assembler source debugging in the C source debugger. Line information is output to the object module for every line of source in the assembly language source file. You cannot use the --symdebug:dwarf option on assembly code that contains .line directives. See
Makes case insignificant in the assembly language files. For example, --syms_ignore_case makes the symbols ABC and abc equivalent. If you do not use this option, case is significant
(default). Case significance is enforced primarily with symbol names, not with mnemonics and register names.
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Assembler Description 37
C55x Assembler Features www.ti.com
3.4
C55x Assembler Features
The sections that follow provide important information on features specific to the C55x assembler:
• Byte/word addressing (
)
• Parallel instruction rules (
•
Variable-length instructions ( Section 3.4.3
• Memory modes (
• Warning on use of MMR addresses (
3.4.1 Byte/Word Addressing
C55x memory is 8-bit byte-addressable for code and 16-bit word-addressable for data. The assembler and linker keep track of the addresses, relative offsets, and sizes of the bits in units that are appropriate for the given section: words for data sections, and bytes for code sections.
Offsets in .struct and .union Constructs
NOTE: Offsets of fields defined in .struct or .union constructs are always counted in words, regardless of the current section. The assembler assumes that a .struct or .union is always used in a data context.
3.4.1.1
Definition of Code Sections
The assembler identifies a section as a code section if one of the following is true:
• The section is introduced with a .text directive.
• The section has at least one instruction assembled into it.
If a section is not established with a .text, .data., or .sect directive, the assembler assumes that it is a .text
(code) section. Because the section type determines the assembler ’ s offset and size computations, it is important to clearly define your current working section as code or data before assembling objects into the section.
3.4.1.2
Assembly Programs and Native Units
The assembler and the linker assume that your code is written using word addresses and offsets in the context of data segments, and byte addresses and offsets in the context of code segments:
• If an address is to be sent via a program address bus (e.g., an address used as the target of a call or a branch), the processor expects a full 24-bit address. A constant used in this context should be expressed in bytes.
• If an address is to be sent via a data address bus (e.g., an address denotes a location in memory to be read or written), the processor expects a 23-bit word address. A constant used in this context should be expressed in words.
• The PC-value column of the assembly listing file is counted in units that are appropriate for the section being listed. For code sections, the PC is counted in bytes; for data sections, it is counted in words.
For example:
1 000000
2 000000 2298
3 000002 4010
4
5 000000
6 000000 0004
000001 0005
000002 0006
.text
MOV AR1,AR0
ADD #1,AC0
.data
000003 0007
7 000004 0001 foo .word 1
; PC is counted in BYTES
; PC is counted in WORDS
.word 4,5,6,7
; PC is 1 word
; PC is 2 words ...
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C55x Assembler Features
• The data definition directives that operate on characters (.byte, .ubyte, .char, .uchar, and .string) allocate one character per byte when in a code section, and one character to a word when in a data section. However, Texas Instruments highly recommends that you use data definition directives (see
for a complete listing) only in data sections.
• Directives that have a size parameter expressed in addressable units expect this parameter to be expressed in bytes for a code section, and in words for a data section.
For example, the following aligns the PC to a 2-byte (16-bit) boundary in a code section, and to a
2-word (32-bit) boundary in a data section.
.align 2
and
display data and code for C55x.
Example 3-1. C55x Data Example
.def Struct1, Struct2
.bss Struct1, 8 ; allocate 8 WORDS for Struct1
.bss Struct2, 6 ; allocate 6 WORDS for Struct2
.text
MOV *(#(Struct1 + 2)),T0 ; load 3rd WORD of Struct1
MOV *(#1000h),T1 ; 0x1000 is an absolute WORD
; address (i.e., byte 0x2000)
Example 3-2. C55x Code Example
.text
.ref Func
CALL #(Func + 3) ;jump to address "Func plus 3 BYTES"
CALL #0x1000 ;0x1000 is an absolute BYTE address
3.4.1.3
Using Code as Data and Data as Code
The assembler does not support using a code address as if it were a data address (e.g., attempting to read or write data to program space) except when code has separate load and run memory placements.
In those cases, code must be aligned to a word address. See
for more information.
Similarly, the assembler does not support using a data address as if it were a code address (e.g., executing a branch to a data label). This functionality cannot be supported because of the difference in the size of the addressable units: a code label address is a 24-bit byte address while a data label address is a
23-bit word address.
Consequently:
• You should not mix code and data within one section. All data (even constant data) should be placed into a section separate from code.
• Applications that attempt to read and write bits into program sections are dangerous and likely will not work.
3.4.2 Parallel Instruction Rules
The assembler performs semantic checking of parallel pairs of instructions in accordance with the rules specified in the TMS320C55x Instruction Set Reference Guide.
The assembler may swap two instructions in order to make parallelism legal. For example, both sets of instructions below are legal and will be encoded into identical object bits:
AC0 = AC1 || T0 = T1 ^ #0x3333
T0 = T1 ^ #0x3333 || AC0 = AC1
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3.4.3 Variable-Length Instruction Size Resolution
By default, the assembler will attempt to resolve all stand-alone, variable-length instructions to their smallest possible size. For instance, the assembler will try to choose the smallest possible of the three available unconditional branch-to-address instructions: goto L7 goto L16 goto P24
If the address used in a variable-length instruction is not known at assembly time (for example, if it is a symbol defined in another file), the assembler will choose the largest available form of the instruction. Of the three available branch instructions above, goto P24 will be picked.
Size resolution is performed on the following instruction groups: goto L7, L16, P24 if (cond) goto l4, L8, L16, P24 call L16, P24 if (cond) call L16, P24
In some cases, you may want the assembler to keep the largest (P24) form of certain instructions. The
P24 versions of certain instructions execute in fewer cycles than the smaller version of the same instructions. For example, “ goto P24 ” uses 4 bytes and 3 cycles, while “ goto L7 ” uses 2 bytes but 4 cycles.
Use the -atv assembler option or the .vli_off directive to keep the following instructions in their largest form: goto P24 call P24
The -atv assembler option suppresses the size resolution of the above instructions within the entire file.
The .vli_off and .vli_on directives can be used to toggle this behavior for regions of an assembly file. In the case of a conflict between the command line option and the directives, the directives take precedence.
All other variable-length instructions will continue to be resolved to their smallest possible size by the assembler, despite the -atv option or .vli_off directive.
The scope of the .vli_off and .vli_on directives is static and not subject to the control flow of the assembly program.
3.4.4 Memory Modes
The assembler supports three memory mode bits (or eight memory modes): C54x compatibility, CPL, and
ARMS. The assembler accepts or rejects its input based on the mode specified; it may also produce different encodings for the same input based on the mode.
The memory modes correspond to the value of the C54CM, CPL, and ARMS status bits. The assembler cannot track the value of the status bits. You must use assembler directives and/or command line options to inform the assembler of the value of these bits. An instruction that modifies the value of the C54CM,
CPL, or ARMS status bit must be immediately followed by an appropriate assembler directive. When the assembler is aware of changes to these bit values, it can provide useful error and warning messages about syntax and semantic violations of these modes.
3.4.4.1
C54x Compatibility Mode
C54x compatibility mode is necessary when a source file has been converted from C54x code. Until you modify your converted source code to be C55x-native code, use the -ml command line option when assembling the file, or use the .c54cm_on and .c54cm_off directives to specify C54x compatibility mode for regions of code. The .c54cm_on and .c54cm_off directives take no arguments. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The scope of the .c54cm_on and .c54cm_off directives is static and not subject to the control flow of the assembly program. All assembly code between the .c54cm_on and .c54cm_off directives is assembled in
C54x compatibility mode.
In C54x compatibility mode, AR0 is used instead of T0 (C55x index register) in memory operands. For example, *(AR5 + T0) is invalid in C54x compatibility mode; *(AR5 + AR0) should be used.
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3.4.4.2
CPL Mode
CPL mode affects direct addressing. The assembler cannot track the value of the CPL status bit.
Consequently, you must use the .cpl_on and .cpl_off directives to model the CPL value. Issue one of these directives immediately following any instruction that changes the value in the CPL bit. The .cpl_on
directive is similar to the CPL status bit set to 1; it is equivalent to using the -mc command line option. The
.cpl_off directive asserts that the CPL status bit is set to 0. The .cpl_on and .cpl_off directives take no arguments. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The scope of the .cpl_on, .cpl_off directives is static and not subject to the control flow of the assembly program. All of the assembly code between the .cpl_on and .cpl_off directives is assembled in CPL mode.
In CPL mode (.cpl_on), direct memory addressing is relative to the stack pointer (SP). The dma syntax is
*SP(dma), where dma can be a constant or a relocatable symbolic expression. The assembler encodes the value of dma into the output bits.
By default (.cpl_off), direct memory addressing (dma) is relative to the data page register (DP). The dma syntax is @dma, where dma can be a constant or a relocatable symbolic expression. The assembler computes the difference between dma and the value in the DP register and encodes this difference into the output bits.
The DP can be referenced in a file, but never defined in that file (it is set externally). Consequently, you must use the .dp directive to inform the assembler of the DP value before it is used. Issue this directive immediately following any instruction that changes the value in the DP register. The syntax of the directive is:
.dp dp_value
The dp_value can be a constant or a relocatable symbolic expression.
If the .dp directive is not used in a file, the assembler assumes that the value of the DP is 0. The scope of the .dp directive is static and not subject to the control flow of the program. The value set by the directive is used until the next .dp directive is encountered, or until the end of the source file is reached.
Whether CPL mode is specified or not, dma access to the MMR page and to the I/O page is processed identically by the assembler. Access to the MMR page is indicated by the mmap() qualifier in the syntax.
Access to the I/O page is indicated by the readport() and writeport() qualifiers. These dma accesses are always encoded by the assembler as relative to the origin of 0.
3.4.4.3
ARMS Mode
ARMS mode affects indirect addressing and is useful in the context of controller code. The assembler cannot track the value of the ARMS status bit. Consequently, you must use the .arms_on and .arms_off
directives to model the ARMS value to the assembler. Issue one of these directives immediately following any instruction that changes the value in the ARMS bit. The .arms_on directive models the ARMS status bit set to 1; it is equivalent to using the -ma option. The .arms_off directive models the ARMS status bit set to 0. The .arms_on and .arms_off directives take no arguments.
In the case of a conflict between the -ma option and the directive, the directive takes precedence.
The scope of the .arms_on and .arms_off directives is static and not subject to the control flow of the assembly program. All of the assembly code between the .arms_on and .arms_off directives is assembled in ARMS mode.
By default (.arms_off), indirect memory access modifiers targeted to the assembly code are selected.
In ARMS mode (.arms_on), short offset modifiers for indirect memory access are used. These modifiers are more efficient for code size optimization.
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3.4.5 Assembler Warning On Use of MMR Address
The mnemonic assembler (cl55) issues a “ Using MMR address ” warning when a memory-mapped register
(MMR) is used in a context where a single-memory access operand (Smem) is expected. The warning indicates that the assembler interprets the MMR usage as a DP-relative direct address operand. For the instruction to work as written, DP must be 0. For example:
ADD SP, T0
Receives the Using MMR address warning as here:
"file.asm", WARNING! at line 1: [W9999] Using MMR address
The assembler warns that the effect of this instruction is:
ADD value at address(DP + MMR address of SP), T0
The value of SP is accessed only if the DP is 0.
ADD mmap(SP), T0
In a case where the DP is known to be 0 and such a reference is intentional, you can avoid the warning by using the @ prefix:
ADD @SP, T0
This warning is not generated for C55x instructions inherited from C54x.
3.5
Naming Alternate Directories for Assembler Input
The .copy, .include, and .mlib directives tell the assembler to use code from external files. The .copy and
.include directives tell the assembler to read source statements from another file, and the .mlib directive names a library that contains macro functions.
contains examples of the .copy, .include, and
.mlib directives. The syntax for these directives is:
.copy [ " ]filename[ " ]
.include [ " ]filename[ " ]
.mlib [ " ]filename[ " ]
The filename names a copy/include file that the assembler reads statements from or a macro library that contains macro definitions. If filename begins with a number the double quotes are required. Quotes are recommended so that there is no issue in dealing with path information that is included in the filename specification or path names that include white space. The filename may be a complete pathname, a partial pathname, or a filename with no path information. The assembler searches for the file in the following locations in the order given:
1. The directory that contains the current source file. The current source file is the file being assembled when the .copy, .include, or .mlib directive is encountered.
2. Any directories named with the --include_path option
3. Any directories named with the C55X_A_DIR environment variable
4. Any directories named with the C55X_C_DIR environment variable
Because of this search hierarchy, you can augment the assembler's directory search algorithm by using the --include_path option (described in
) or the C55X_A_DIR environment variable (described
in
). The C55X_C_DIR environment variable is discussed in the TMS320C55x Optimizing
C/C++ Compiler User's Guide.
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3.5.1 Using the --include_path Assembler Option
The --include_path assembler option names an alternate directory that contains copy/include files or macro libraries. The format of the --include_path option is as follows:
cl55 --include_path= pathname source filename [other options]
There is no limit to the number of --include_path options per invocation; each --include_path option names one pathname. In assembly source, you can use the .copy, .include, or .mlib directive without specifying path information. If the assembler does not find the file in the directory that contains the current source file, it searches the paths designated by the --include_path options.
For example, assume that a file called source.asm is in the current directory; source.asm contains the following directive statement:
.copy "copy.asm"
Assume the following paths for the copy.asm file:
UNIX:
Windows:
/tools/files/copy.asm
c:\tools\files\copy.asm
You could set up the search path with the commands shown below:
Operating System
UNIX (Bourne shell)
Windows
Enter cl55 --include_path=/tools/files source.asm
cl55 --include_path=c:\tools\files source.asm
The assembler first searches for copy.asm in the current directory because source.asm is in the current directory. Then the assembler searches in the directory named with the --include_path option.
3.5.2 Using the C55X_A_DIR Environment Variable
An environment variable is a system symbol that you define and assign a string to. The assembler uses the C55X_A_DIR environment variable to name alternate directories that contain copy/include files or macro libraries.
The assembler looks for the C55X_A_DIR environment variable and then reads and processes it. If the assembler does not find the C55X_A_DIR variable, it then searches for C55X_C_DIR. The processor-specific variables are useful when you are using Texas Instruments tools for different processors at the same time.
See the TMS320C55x Optimizing C/C++ Compiler User's Guide for details on C55X_C_DIR.
The command syntax for assigning the environment variable is as follows:
Operating System
UNIX (Bourne Shell)
Windows
Enter
C55X_A_DIR= " pathname
1
; pathname
2
; . . .
" ; export C55X_A_DIR
set C55X_A_DIR= pathname
1
; pathname
2
; . . .
The pathnames are directories that contain copy/include files or macro libraries. The pathnames must follow these constraints:
• Pathnames must be separated with a semicolon.
• Spaces or tabs at the beginning or end of a path are ignored. For example the space before and after the semicolon in the following is ignored: set C55X_A_DIR= c:\path\one\to\tools ; c:\path\two\to\tools
• Spaces and tabs are allowed within paths to accommodate Windows directories that contain spaces.
For example, the pathnames in the following are valid: set C55X_A_DIR=c:\first path\to\tools;d:\second path\to\tools
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In assembly source, you can use the .copy, .include, or .mlib directive without specifying path information.
If the assembler does not find the file in the directory that contains the current source file or in directories named by the --include_path option, it searches the paths named by the environment variable.
For example, assume that a file called source.asm contains these statements:
.copy "copy1.asm"
.copy "copy2.asm"
Assume the following paths for the files:
UNIX:
Windows:
/tools/files/copy1.asm and /dsys/copy2.asm
c:\tools\files\copy1.asm and c:\dsys\copy2.asm
You could set up the search path with the commands shown below:
Operating System
UNIX (Bourne shell)
Windows
Enter
C55X_A_DIR="/dsys"; export C55X_A_DIR cl55 --include_path=/tools/files source.asm
C55X_A_DIR=c:\dsys cl55 --include_path=c:\tools\files source.asm
The assembler first searches for copy1.asm and copy2.asm in the current directory because source.asm
is in the current directory. Then the assembler searches in the directory named with the --include_path option and finds copy1.asm. Finally, the assembler searches the directory named with C55X_A_DIR and finds copy2.asm.
The environment variable remains set until you reboot the system or reset the variable by entering one of these commands:
Operating System
UNIX (Bourne shell)
Windows
Enter unset C55X_A_DIR set C55X_A_DIR=
3.6
Source Statement Format
TMS320C55x assembly language source programs consist of source statements that can contain assembler directives, assembly language instructions, macro directives, and comments. A source statement can contain four ordered fields (label, mnemonic, operand list, and comment). Source statement lines can be as long as the source file format allows. The general syntax for source statements is as follows:
Mnemonic syntax:
[label[:]]mnemonic [operand list][;comment]
Algebraic syntax:
[label[:]]instruction [;comment]
Following are examples of source statements:
Mnemonic instructions
SYM1
Begin:
.set
MOV
.data
.byte
2 ; Symbol SYM1 = 2
#SYM1, AR1 ; Load AR1 with 2
016h ; Initialize word (016h)
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Source Statement Format
Algebraic instructions
SYM1
Begin:
.set
2
AR1 = #SYM1
.data
.byte
016h
; Symbol SYM1 = 2
; Load AR1 with 2
; Initialize word (016h)
Follow these guidelines:
• All statements must begin with a label, a blank, an asterisk, or a semicolon.
• A statement containing an assembler directive must be specified entirely on one line.
• Labels are optional; if used, they must begin in column 1.
• One or more space or tab characters must separate each field.
• Comments are optional. Comments that begin in column 1 can begin with an asterisk or a semicolon (* or ;), but comments that begin in any other column must begin with a semicolon.
• A source line can be continued onto the next line by ending the first line with a backslash (\) character.
• A mnemonic cannot begin in column 1 or it will be interpreted as a label. The assembler does not check to make sure you do not have a mnemonic in the label field.
The following sections describe each of the fields.
3.6.1 Label Field
Labels are optional for all assembly language instructions and for most (but not all) assembler directives.
When used, a label must begin in column 1 of a source statement. A label can contain up to 32 alphanumeric characters (A-Z, a-z, 0-9, _, and $). Labels are case sensitive (except when the
--syms_ignore_case option is used), and the first character cannot be a number. A label can be followed by a colon (:). The colon is not treated as part of the label name. If you do not use a label, the first character position must contain a blank, a semicolon, or an asterisk.
When you use a label, its value is the current value of the SPC. The label points to the statement it is associated with. For example, if you use the .word directive to initialize several words, a label points to the first word. In the following example, the label Start has the value 40h.
7
8
5 000000
6 000000 00
...
...
.data
; Assume other code was assembled.
9 000040 000A Start: .word 0Ah,3,7
000041 0003
000042 0007
A label on a line by itself is a valid statement. The label assigns the current value of the section program counter to the label; this is equivalent to the following directive statement: label .equ
$ ; $ provides the current value of the SPC
When a label appears on a line by itself, it points to the instruction on the next line (the SPC is not incremented):
3 000043
4 000043 0003
Here:
.word 3
If you do not use a label, the character in column 1 must be a blank, an asterisk, or a semicolon.
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3.6.2 Mnemonic Instruction Fields
In mnemonic assembly, the label field is followed by the mnemonic and operand list fields. These fields are described in the next two sections.
3.6.2.1
Mnemonic Field
The mnemonic field follows the label field. The mnemonic field cannot start in column 1; if it does, it is interpreted as a label. There is one exception: the parallel bars (||) of the mnemonic field can start in column 1. The mnemonic field can begin with one of the following items:
• Machine-instruction mnemonic (such as ABS, MPYU, STH)
• Assembler directive (such as .data, .list, .equ)
• Macro directive (such as .macro, .var, .mexit)
• Macro call
3.6.2.2
Operand Field
The operand field follows the mnemonic field and contains one or more operands. The operand field is not required for all instructions or directives. An operand consists of the following items:
• Constants (see
• Floating-point constants (see
• Character strings (see
• Symbols (see
• Expressions (combination of constants and symbols; see
)
You must separate operands with commas.
The assembler allows you to specify that a constant, symbol, or expression should be used as an address, an immediate value, or an indirect value. The following rules apply to the operands of instructions.
• # prefix — the operand is an immediate value. If you use the # sign as a prefix, the assembler treats the operand as an immediate value. This is true even when the operand is a register or an address; the assembler treats the address as a value instead of using the contents of the address. This is an example of an instruction that uses an operand with the # prefix:
Label: ADD #123, AC0
The operand #123 is an immediate value. The instruction adds 123 (decimal) to the contents of the specified accumulator.
For instructions that have an embedded shift count, the # prefix on the shift count operand is required.
If you want the shift performed by the instruction, you must use # on the shift count.
• * prefix — the operand is an indirect address. If you use the * sign as a prefix, the assembler treats the operand as an indirect address; that is, it uses the contents of the operand as an address. This is an example of an instruction that uses an operand with the * prefix:
Label: MOV *AR4,AC0
The operand *AR4 specifies an indirect address. The assembler goes to the address specified by the contents of register AR4 and then moves the contents of that location to the specified accumulator.
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3.6.3 Algebraic Instruction Fields
In algebraic assembly, instructions are written in a form that resembles algebraic mathematical expression. The semantics of the instruction are embodied in the operators of the expression. The terms of the expression specify what operands are being acted on.
The following items describe how to use the instruction field for algebraic syntax:
• Generally, operands are not separated by commas. Some algebraic instructions consist of a mnemonic and operands. For algebraic statements of this type, commas are used to separate operands. For example, lms(Xmem, Ymem, ACx, ACy).
• Expressions that have more than one term that is used as a single operand must be delimited with parentheses. This rule does not apply to statements using a function call format, since they are already enclosed in parentheses. For example, AC0 = AC1 & #(1 << sym) << 5. The expression 1 << sym is used as a single operand and must therefore be delimited with parentheses.
• All register names are reserved.
3.6.4 Comment Field
A comment can begin in any column and extends to the end of the source line. A comment can contain any ASCII character, including blanks. Comments are printed in the assembly source listing, but they do not affect the assembly.
A source statement that contains only a comment is valid. If it begins in column 1, it can start with a semicolon ( ; ) or an asterisk ( *). Comments that begin anywhere else on the line must begin with a semicolon. The asterisk identifies a comment only if it appears in column 1.
3.7
Constants
The assembler supports several types of constants:
• Binary integer
• Octal integer
• Decimal integer
• Hexadecimal integer
• Character
• Assembly time
• Floating-point
The assembler maintains each constant internally as a 32-bit quantity. Constants are not sign extended.
For example, the constant 00FFh is equal to 00FF (base 16) or 255 (base 10); it does not equal -1.
However, when used with the .byte directive, -1 is equivalent to 00FFh.
In C55x algebraic assembly source code, most constants must begin with a ’ # ’ .
3.7.1 Binary Integers
A binary integer constant is a string of up to 32 binary digits (0s and 1s) followed by the suffix B (or b). If fewer than 32 digits are specified, the assembler right justifies the value and fills the unspecified bits with zeros. These are examples of valid binary constants:
00000000B Constant equal to 0
10 or 0
16
0100000b Constant equal to 32
10 or 20
16
01b Constant equal to 1
10 or 1
16
11111000B Constant equal to 248
10 or 0F8
16
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3.7.2 Octal Integers
An octal integer constant is a string of up to 11 octal digits (0 through 7) followed by the suffix Q (or q).
These are examples of valid octal constants:
10Q
010
100000Q
226q
Constant equal to 8
10 or 8
16
Constant equal to 8
10 or 8
16
© format)
Constant equal to 32 768
10 or 8000
16
Constant equal to 150
10 or 96
16
3.7.3 Decimal Integers
A decimal integer constant is a string of decimal digits ranging from -2147 483 648 to 4 294 967 295.
These are examples of valid decimal constants:
1000
-32768
25
Constant equal to 1000
10 or 3E8
16
Constant equal to -32 768
10 or 8000
16
Constant equal to 25
10 or 19
16
3.7.4 Hexadecimal Integers
A hexadecimal integer constant is a string of up to eight hexadecimal digits followed by the suffix H (or h) or preceded by 0x. Hexadecimal digits include the decimal values 0-9 and the letters A-F or a-f. A
hexadecimal constant must begin with a decimal value (0-9). If fewer than eight hexadecimal digits are specified, the assembler right justifies the bits. These are examples of valid hexadecimal constants:
78h
0x78
0Fh
37ACh
Constant equal to 120
10 or 0078
16
Constant equal to 120
10 or 0078
16
© format)
Constant equal to 15
10 or 000F
16
Constant equal to 14 252
10 or 37AC
16
3.7.5 Character Constants
A character constant is a single character enclosed in single quotes. The characters are represented internally as 8-bit ASCII characters. Two consecutive single quotes are required to represent each single quote that is part of a character constant. A character constant consisting only of two single quotes is valid and is assigned the value 0. These are examples of valid character constants:
'
' a
C
''''
'
' Defines the character constant a and is represented internally as 61
16
Defines the character constant C and is represented internally as 43
16
Defines the character constant ' and is represented internally as 27
16
'' Defines a null character and is represented internally as 00
16
Notice the difference between character constants and character strings ( Section 3.8
discusses character strings). A character constant represents a single integer value; a string is a sequence of characters.
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Character Strings
3.7.6 Assembly-Time Constants
If you use the .set directive to assign a value to a symbol (see
Define Assembly-Time Constant ), the
symbol becomes a constant. To use this constant in expressions, the value that is assigned to it must be absolute. For example: shift3 .set 3
MOV AR1, #shift3
You can also use the .set directive to assign symbolic constants for register names. In this case, the symbol becomes a synonym for the register: myReg .set AR1
MOV myReg, #3
3.7.7 Floating-Point Constants
A floating-point constant is a string of decimal digits followed by an optional decimal point, fractional portion, and exponent portion. The syntax for a floating-point number is:
[ +|- ] [ nnn ] . [ nnn [ E|e [ +|- ] nnn ] ]
Replace nnn with a string of decimal digits. You can precede nnn with a + or a -. You must specify a decimal point. For example, 3.e5 is valid, but 3e5 is not valid. The exponent indicates a power of 10.
These are examples of valid character constants:
3.0
3.14
.3
-0.314e13
+314.59e-2
The .double directive converts a floating-point constant into a floating-point value in IEEE double-precision
64-bit format. The .float directive converts a floating-point constant into a floating-point value in IEEE single-precision 32-bit format. See
Initialize Double-Precision Floating-Point Value
and
Single-Precision Floating-Point Value
for more information.
3.8
Character Strings
A character string is a string of characters enclosed in double quotes. Double quotes that are part of character strings are represented by two consecutive double quotes. The maximum length of a string varies and is defined for each directive that requires a character string. Characters are represented internally as 8-bit ASCII characters.
These are examples of valid character strings:
" sample program " defines the 14-character string sample program.
" PLAN " " C " " " defines the 8-character string PLAN " C " .
Character strings are used for the following:
• Filenames, as in .copy "filename"
• Section names, as in .sect "section name"
• Data initialization directives, as in .byte "charstring"
• Operands of .string directives
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3.9
Symbols
Symbols are used as labels, constants, and substitution symbols. A symbol name is a string of alphanumeric characters, the dollar sign, and underscores (A-Z, a-z, 0-9, $, and _). The first character in a symbol cannot be a number, and symbols cannot contain embedded blanks. The symbols you define are case sensitive; for example, the assembler recognizes ABC, Abc, and abc as three unique symbols. You can override case sensitivity with the --syms_ignore_case assembler option (see
). A symbol is valid only during the assembly in which it is defined, unless you use the .global directive or the .def
directive to declare it as an external symbol (see
).
3.9.1 Labels
Symbols used as labels become symbolic addresses that are associated with locations in the program.
Labels used locally within a file must be unique. Mnemonic opcodes and assembler directive names without the . prefix are valid label names.
Labels can also be used as the operands of .global, .ref, .def, or .bss directives; for example: label2
.global
label1 nop
ADD @label1,AC1,AC1
B label2
3.9.2 Local Labels
Local labels are special labels whose scope and effect are temporary. A local label can be defined in two ways:
• $n, where n is a decimal digit in the range 0-9. For example, $4 and $1 are valid local labels. See
• name?, where name is any legal symbol name as described above. The assembler replaces the question mark with a period followed by a unique number. When the source code is expanded, you will
not see the unique number in the listing file. Your label appears with the question mark as it did in the source definition. You cannot declare this label as global. See
Normal labels must be unique (they can be declared only once), and they can be used as constants in the operand field. Local labels, however, can be undefined and defined again. Local labels cannot be defined by directives.
A local label can be undefined or reset in one of these ways:
• By using the .newblock directive
• By changing sections (using a .sect, .text, or .data directive)
• By entering an include file (specified by the .include or .copy directive)
• By leaving an include file (specified by the .include or .copy directive)
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Example 3-3. Local Labels of the Form $n
This is an example of code that declares and uses a local label legally:
Label1: MOV ADDRA,AC0 ; Load Address A to AC0.
SUB ADDRB,AC0,AC0 ; Subtract Address B.
BCC $1,AC0 < #0 ; If < 0, branch to $1
MOV ADDRB,AC0 ; otherwise, load ADDRB to AC0
B $2 ; and branch to $2.
$1
$2
MOV ADDRA,AC0 ; $1: load ADDRA to AC0.
ADD ADDRC,AC0,AC0 ; $2: add ADDRC.
.newblock
; Undefine $1 so it can be used again.
BCC $1,AC0 < #0
MOV AC0,ADDRC
; If less than zero, branch to $1.
; Store AC0 low in ADDRC.
$1 NOP
The following code uses a local label illegally:
Label1: MOV ADDRA,AC0
SUB ADDRB,AC0,AC0
BCC $1,AC0 < #0
MOV ADDRB,AC0
$1
$2
$1
B $2
MOV ADDRA,AC0
ADD ADDRC,AC0,AC0
BCC $1,AC0 < #0
MOV AC0,ADDRC
NOP ; Wrong: $1 is multiply defined.
The $1 label is not undefined before being reused by the second branch instruction. Therefore, $1 is redefined, which is illegal.
Symbols
Local labels are especially useful in macros. If a macro contains a normal label and is called more than once, the assembler issues a multiple-definition error. If you use a local label and .newblock within a macro, however, the local label is used and reset each time the macro is expanded.
Up to ten local labels of the $n form can be in effect at one time. Local labels of the form name? are not limited. After you undefine a local label, you can define it and use it again. Local labels do not appear in the object code symbol table.
Because local labels are intended to be used only locally, branches to local labels are not expanded in case the branch's offset is out of range.
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Symbols
Example 3-4. Local Labels of the Form name?
; First definition of local label 'mylab' nop mylab?
nop
B mylab?
; Include file has second definition of 'mylab'
.copy "a.inc"
; Third definition of 'mylab',reset upon exit from include mylab?
nop
B mylab?
; Fourth definition of 'mylab' in macro, macros use
; different namespace to avoid conflicts mymac .macro
mylab?
nop
B mylab?
.endm
; Macro invocation mymac
; Reference to third definition of 'mylab', note that
; definition is not reset by macro invocation nor
; conflicts with same name defined in macro
B mylab?
; Changing section, allowing fifth definition of 'mylab'
.sect "Secto_One" nop
.data
mylab? .int 0
.text
nop nop
B mylab?
; .newblock directive, allowing sixth definition of 'mylab'
.newblock
.data
mylab?
.int 0
.text
nop nop
B mylab?
For more information about using labels in macros see
.
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Symbols
3.9.3 Symbolic Constants
Symbols can be set to constant values. By using constants, you can equate meaningful names with constant values. The .set and .struct/.tag/.endstruct directives enable you to set constants to symbolic names. Symbolic constants cannot be redefined. The following example shows how these directives can be used:
; constant definitions K .set
1024 maxbuf .set
2*K value .set
0 delta .set
1 item .struct
.int
value
.int
delta i_len .endstruct
; item structure definition
; i_len=length of .struct (2) array .tag
item
.bss
array, i_len*K
; array declaration
The assembler also has several predefined symbolic constants; these are discussed in
.
3.9.4 Defining Symbolic Constants (--asm_define Option)
The --asm_define option equates a constant value or a string with a symbol. The symbol can then be used in place of a value in assembly source. The format of the --asm_define option is as follows:
cl55 --asm_define=name[=value]
The name is the name of the symbol you want to define. The value is the constant or string value you want to assign to the symbol. If the value is omitted, the symbol is set to 1. If you want to define a quoted string and keep the quotation marks, do one of the following:
• For Windows, use --asm_define= name ="\" value \"". For example, --asm_define=car="\"sedan\""
• For UNIX, use --asm_define= name ='" value "'. For example, --asm_define=car='"sedan"'
• For Code Composer, enter the definition in a file and include that file with the --cmd_file (or -@) option.
Once you have defined the name with the --asm_define option, the symbol can be used in place of a constant value, a well-defined expression, or an otherwise undefined symbol used with assembly directives and instructions. For example, on the command line you enter: cl55 --asm_define=SYM1=1 --asm_define=SYM2=2 --asm_define=SYM3=3 --asm_define=SYM4=4 value.asm
Since you have assigned values to SYM1, SYM2, SYM3, and SYM4, you can use them in source code.
shows how the value.asm file uses these symbols without defining them explicitly.
Within assembler source, you can test the symbol defined with the --asm_define option with the following directives:
Type of Test
Existence
Nonexistence
Equal to value
Not equal to value
Directive Usage
.if $isdefed( " name " )
.if $isdefed( " name " ) = 0
.if name = value
.if name != value
The argument to the $isdefed built-in function must be enclosed in quotes. The quotes cause the argument to be interpreted literally rather than as a substitution symbol.
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Symbols
Example 3-5. Using Symbolic Constants Defined on Command Line
IF_4: .if
.byte
.else
.byte
.endif
IF_5: .if
.byte
.else
.byte
.endif
SYM4 = SYM2 * SYM2
SYM4
SYM2 * SYM2
SYM1 <= 10
10
SYM1
; Equal values
; Unequal values
; Less than / equal
; Greater than
IF_6: .if
.byte
.else
.byte
.endif
SYM3 * SYM2 != SYM4 + SYM2
SYM3 * SYM2
SYM4 + SYM4
; Unequal value
; Equal values
IF_7: .if
.byte
.elseif
SYM2 + SYM3 = 5
.byte
SYM2 + SYM3
.endif
SYM1 = SYM2
SYM1 www.ti.com
3.9.5 Predefined Symbolic Constants
The assembler has several predefined symbols, including the following types:
• $, the dollar-sign character, represents the current value of the section program counter (SPC). $ is a relocatable symbol.
• The symbols .ALGEBRAIC and .MNEMONIC are true when the corresponding assembly format is in effect, and false otherwise.
• The symbols, __SMALL_MODEL__, __LARGE_MODEL__, and __HUGE_MODEL__ are predefined and set to the value 1 if the corresponding memory model specified for this compilation, and set to 0 otherwise. You can use this symbol to write memory-model independent code such as:
.if
__LARGE_MODEL__|__HUGE_MODEL__
AMOV #addr, XAR2 ; load 23-bit address
.else
AMOV #addr, AR2 ; load 16-bit address
.endif
For more information on the memory models, see the TMS320C55x Optimizing C/C++ Compiler User ’ s
Guide.
• The symbol __TI_ASSEMBLER_VERSION__ is set to an integer indicating the assembler version number. Version X.Y.Z is represented by XXXYYYZZZ where each portion, X, Y and Z, is expanded to three digits and concatenated together. For example, 3.2.1 is represented as 3002001. You can use this symbol to write code that will be assembled conditionally according to the assembler version:
.if
__TI_ASSEMBLER_VERSION__ == 3002001
.word
0x110
.endif
.if
__TI_ASSEMBLER_VERSION__ == 4003003
.word
0x120
.endif
• The assembler sets up predefined symbols for you to refer to all of the memory-mapped registers.
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Expressions
3.9.6 Substitution Symbols
Symbols can be assigned a string value (variable). This enables you to alias character strings by equating them to symbolic names. Symbols that represent character strings are called substitution symbols. When the assembler encounters a substitution symbol, its string value is substituted for the symbol name. Unlike symbolic constants, substitution symbols can be redefined.
A string can be assigned to a substitution symbol anywhere within a program; for example:
.asg
"errct", AR2 ;register 2
.asg
"*+", INC ;indirect auto-increment
.asg
"*-", DEC ;indirect auto-decrement
When you are using macros, substitution symbols are important because macro parameters are actually substitution symbols that are assigned a macro argument. The following code shows how substitution symbols are used in macros: add2 .macro
ADDRA,ADDRB ;add2 macro definition
MOV ADDRA,AC0
ADD ADDRB,AC0,AC0
MOV AC0,ADDRB
.endm
; add2 invocation add2 LOC1, LOC2
; the macro will be expanded as follows:
MOV LOC1,AC0
ADD LOC2,AC0,AC0
MOV AC0,LOC2
See
for more information about macros.
3.10 Expressions
An expression is a constant, a symbol, or a series of constants and symbols separated by arithmetic operators. The 32-bit ranges of valid expression values are -2147 483 648 to 2147 483 647 for signed values, and 0 to 4 294 967 295 for unsigned values. Three main factors influence the order of expression evaluation:
Parentheses
Precedence groups
Left-to-right evaluation
Expressions enclosed in parentheses are always evaluated first.
8 / (4 / 2) = 4, but 8 / 4 / 2 = 1
You cannot substitute braces ( { } ) or brackets ( [ ] ) for parentheses.
Operators, listed in
, are divided into nine precedence groups.
When parentheses do not determine the order of expression evaluation, the highest precedence operation is evaluated first.
8 + 4 / 2 = 10 (4 / 2 is evaluated first)
When parentheses and precedence groups do not determine the order of expression evaluation, the expressions are evaluated from left to right, except for Group 1, which is evaluated from right to left.
8 / 4*2 = 4, but 8 / (4*2) = 1
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Expressions
3.10.1 Operators
lists the operators that can be used in expressions, according to precedence group.
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Table 3-2. Operators Used in Expressions (Precedence)
(1)
(2)
Group
1
2
3
4
5
6
7
8
9
(1) Operator
*
/
%
+
-
~
!
+
-
<<
>>
<
< =
>
> =
=[=]
!=
&
|
^
Description (2)
Unary plus
Unary minus
1s complement
Logical NOT
Multiplication
Division
Modulo
Addition
Subtraction
Shift left
Shift right
Less than
Less than or equal to
Greater than
Greater than or equal to
Equal to
Not equal to
Bitwise AND
Bitwise exclusive OR (XOR)
Bitwise OR
Group 1 operators are evaluated right to left. All other operators are evaluated left to right.
Unary + and - have higher precedence than the binary forms.
3.10.2 Expression Overflow and Underflow
The assembler checks for overflow and underflow conditions when arithmetic operations are performed at assembly time. It issues a warning (the message Value Truncated) whenever an overflow or underflow occurs. The assembler does not check for overflow or underflow in multiplication.
3.10.3 Well-Defined Expressions
Some assembler directives require well-defined expressions as operands. Well-defined expressions contain only symbols or assembly-time constants that are defined before they are encountered in the expression. The evaluation of a well-defined expression must be absolute.
This is an example of a well-defined expression:
1000h+X where X was previously defined as an absolute symbol.
3.10.4 Conditional Expressions
The assembler supports relational operators that can be used in any expression; they are especially useful for conditional assembly. Relational operators include the following:
=
<
>
Equal to
Less than
Greater than
! =
< =
> =
Not equal to
Less than or equal to
Greater than or equal to
Conditional expressions evaluate to 1 if true and 0 if false and can be used only on operands of equivalent types; for example, absolute value compared to absolute value, but not absolute value compared to relocatable value.
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Function
$acos(expr)
$asin(expr)
$atan(expr)
$atan2(expr, y)
$ceil(expr)
$cos(expr)
$cosh(expr)
$cvf(expr)
$cvi(expr)
$exp(expr)
$fabs(expr)
$floor(expr)
$fmod(expr, y)
$int(expr)
$ldexp(expr, expr2)
$log(expr)
$log10(expr)
$max(expr1, expr2)
$min(expr1, expr2)
$pow(expr1, expr2)
$round(expr)
$sgn(expr)
$sin(expr)
$sinh(expr)
$sqrt(expr)
$strtod(str) www.ti.com
Built-in Functions
3.11 Built-in Functions
The assembler supports built-in functions for conversions and various math computations.
describes the built-in functions. The expr must be a constant value. See
for a description of the assembler ’ s non-mathematical built-in functions.
$tan(expr)
$tanh(expr)
$trunc(expr)
Table 3-3. Built-In Mathematical Functions
Description
Returns the arc cosine of expr as a floating-point value
Returns the arc sin of expr as a floating-point value
Returns the arc tangent of expr as a floating-point value
Returns the arc tangent of expr as a floating-point value in range [π , π ]
Returns the smallest integer not less than expr
Returns the cosine of expr as a floating-point value
Returns the hyperbolic cosine of expr as a floating-point value
Converts expr to a floating-point value converts expr to integer value
Returns the exponential function e expr
Returns the absolute value of expr as a floating-point value
Returns the largest integer not greater than expr
Returns the remainder of expr1 ÷ expr2
Returns 1 if expr has an integer value; else returns 0. Returns an integer.
Multiplies expr by an integer power of 2. That is, expr1 × 2 expr2
Returns the natural logarithm of expr, where expr > 0
Returns the base 10 logarithm of expr, where expr > 0
Returns the maximum of two values
Returns the minimum of two values
Returns expr1raised to the power of expr2
Returns expr rounded to the nearest integer
Returns the sign of expr.
Returns the sine of expr
Returns the hyperbolic sine of expr as a floating-point value
Returns the square root of expr, expr ≥ 0, as a floating-point value
Converts a character string to a double precision floating-point value. The string contains a properly-formatted C99-style floating-point constant. C99-style constants are otherwise not accepted anywhere in the tools.
Returns the tangent of expr as a floating-point value
Returns the hyperbolic tangent of expr as a floating-point value
Returns expr rounded toward 0
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Source Listings www.ti.com
3.12 Source Listings
A source listing shows source statements and the object code they produce. To obtain a listing file, invoke the assembler with the --asm_listing option (see
).
Two banner lines, a blank line, and a title line are at the top of each source listing page. Any title supplied by the .title directive is printed on the title line. A page number is printed to the right of the title. If you do not use the .title directive, the name of the source file is printed. The assembler inserts a blank line below the title line.
Each line in the source file produces at least one line in the listing file. This line shows a source statement number, an SPC value, the object code assembled, and the source statement.
and
show these in actual listing files.
Each line in the source file produces at least one line in the listing file. This line shows a source statement number, an SPC value, the object code assembled, and the source statement.
and
show these in actual listing files.
Field 1: Source Statement Number
Line number
The source statement number is a decimal number. The assembler numbers source lines as it encounters them in the source file; some statements increment the line counter but are not listed. (For example, .title statements and statements following a .nolist are not listed.) The difference between two consecutive source line numbers indicates the number of intervening statements in the source file that are not listed.
Include file letter
A letter preceding the line number indicates the line is assembled from the include file designated by the letter.
Nesting level number
A number preceding the line number indicates the nesting level of macro expansions or loop blocks.
Field 2: Section Program Counter
This field contains the SPC value, which is hexadecimal. All sections (.text, .data, .bss, and named sections) maintain separate SPCs. Some directives do not affect the SPC and leave this field blank.
Field 3: Object Code
This field contains the hexadecimal representation of the object code. All machine instructions and directives use this field to list object code. This field also indicates the relocation type associated with an operand for this line of source code. If more than one operand is relocatable, this column indicates the relocation type for the first operand. The characters that can appear in this column and their associated relocation types are listed below:
-
%
+
"
'
!
undefined external reference
.text relocatable
.sect relocatable
.data relocatable
.bss, .usect relocatable relocation expression
Field 4: Source Statement Field
This field contains the characters of the source statement as they were scanned by the assembler. The assembler accepts a maximum line length of 200 characters. Spacing in this field is determined by the spacing in the source statement.
and
show assembler listings with each of the four fields identified.
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1
1
1
1
Figure 3-2. Mnemonic Assembly Listing
3
4
1
2
5
6
7
12
13
14
15
10
11
8
9
16 000000
17 000000 6A00
000002 0010+
18 000004 6A00
000006 0000!
19 000008 6A00
00000a 0000!
20 00000c 6A00
00000e 0000!
21
22
23 000000
24 000000 6A00
000002 0000!
25 000004 6A00
000006 0000!
26 000008 6A00
00000a 0000!
27 00000c 6A00
00000e 0000!
28
29
30
31 000010
000010 4693
000012 7800
000014 0000
000016 7600
000018 3708
00001a 46B2
.global RSET, INT0, INT1, INT2
.global TINT, RINT, XINT, USER
.global ISR0, ISR1, ISR2
.global time, rcv, xmt, proc initmac .macro
;* initialize macro
BSET #9,ST1_55 ;disable overflow
MOV #0,DP ;set dp
MOV #55,AC0 ;set AC0
BCLR #11,ST1_55 ;enable ints
.endm
*******************************************
* Reset and interrupt vectors *
*******************************************
RSET:
.sect ”rset”
B init
INT0:
INT1:
INT2:
B ISR0
B ISR1
B ISR2
*
TINT
RINT
XINT
.sect ”ints”
B time
B rcv
B xmt
USER B proc
*******************************************
* Initialize processor.
*
******************************************* init: initmac
* initialize macro
BSET #9,ST1_55
MOV #0,DP
MOV #55,AC0
BCLR #11,ST1_55
Field 1 Field 2 Field 3 Field 4
Source Listings
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Assembler Description 59
Source Listings
1
1
1
1
1
Figure 3-3. Algebraic Assembly Listing
3
4
1
2
5
6
7
12
13
14
15
10
11
8
9
16 000000
17 000000 6A00
000002 0010+
18 000004 6A00
000006 0000!
19 000008 6A00
00000a 0000!
20 00000c 6A00
00000e 0000!
21
22
23 000000
24 000000 6A00
000002 0000!
25 000004 6A00
000006 0000!
26 000008 6A00
00000a 0000!
27 00000c 6A00
00000e 0000!
28
29
30
31 000010
000010 4693
000012 7800
000014 0000
000016 7600
000018 3708
00001a 46B2
.global RSET, INT0, INT1, INT2
.global TINT, RINT, XINT, USER
.global ISR0, ISR1, ISR2
.global time, rcv, xmt, proc initmac .macro
;* initialize macro bit(ST1, #ST1_SATD) = #1 ;disable oflow
DP = #((01FFH & 0) << 7) ;set dp
AC0 = #55 ;set AC0 bit(ST1, #ST1_INTM) = #0 ;enable ints
.endm
*******************************************
* Reset and interrupt vectors *
*******************************************
RSET:
.sect ”rset” goto #(init)
INT0:
INT1:
INT2: goto goto goto
#(ISR0)
#(ISR1)
#(ISR2)
*
TINT
RINT
XINT
.sect ”ints” goto #(time) goto #(rcv) goto #(xmt)
USER goto #(proc)
*******************************************
* Initialize processor.
*
******************************************* init: initmac
* initialize macro bit(ST1, #ST1_SATD) = #1
DP = #((01FFH & 0) << 7)
AC0 = #55 bit(ST1, #ST1_INTM) = #0
Field 1 Field 2 Field 3 Field 4 www.ti.com
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Debugging Assembly Source
3.13 Debugging Assembly Source
When you invoke cl55 with --symdebug:dwarf (or -g) when compiling an assembly file, the assembler provides symbolic debugging information that allows you to step through your assembly code in a debugger rather than using the Disassembly window in Code Composer Studio. This enables you to view source comments and other source-code annotations while debugging.
The .asmfunc and .endasmfunc (see
Mark Function Boundaries ) directives enable you to use C
characteristics in assembly code that makes the process of debugging an assembly file more closely resemble debugging a C/C++ source file.
The .asmfunc and .endasmfunc directives allow you to name certain areas of your code, and make these areas appear in the debugger as C functions. Contiguous sections of assembly code that are not enclosed by the .asmfunc and .endasmfunc directives are automatically placed in assembler-defined functions named with this syntax:
$ filename : starting source line : ending source line $
If you want to view your variables as a user-defined type in C code, the types must be declared and the variables must be defined in a C file. This C file can then be referenced in assembly code using the .ref
directive (see
).
shows the cvar.c C program that defines a variable, svar, as the structure type X. The svar variable is then referenced in the addfive.asm assembly program in
and 5 is added to svar's second data member.
Compile both source files with the --symdebug:dwarf option (-g) and link them as follows: cl55 --symdebug:dwarf cvars.c addfive.asm --run_linker --library=lnk.cmd --library=rts55.lib
--output_file=addfive.out
When you load this program into a symbolic debugger, addfive appears as a C function. You can monitor the values in svar while stepping through main just as you would any regular C variable.
Example 3-6. Viewing Assembly Variables as C Types C Program typedef struct
{ int m1; int m2;
} X;
X svar = { 1, 2 };
Example 3-7. Assembly Program for
;------------------------------------------------------------------------------
; Tell the assembler we're referencing variable "_svar", which is defined in
; another file (cvars.c).
;------------------------------------------------------------------------------
.ref _svar
;------------------------------------------------------------------------------
; addfive() - Add five to the second data member of _svar
;------------------------------------------------------------------------------
.text
.align 4
.global addfive addfive: .asmfunc
ADD #5,*abs16(#(_svar+1)) ; add 5 to svar.m2
RET
.endasmfunc
; return from function
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Assembler Description 61
LABEL
INT0
INT1
INT2
ISR0
ISR1
ISR2
RINT
RSET
TINT
XINT init
Cross-Reference Listings www.ti.com
3.14 Cross-Reference Listings
A cross-reference listing shows symbols and their definitions. To obtain a cross-reference listing, invoke the assembler with the --cross_reference option (see
) or use the .option directive with the X
operand (see
Select Listing Options ). The assembler appends the cross-reference to the end of the
source listing.
shows the four fields contained in the cross-reference listing.
Example 3-8. An Assembler Cross-Reference Listing
VALUE DEFN
000004+ 25
000008+ 27
00000c+ 29
REF
REF
REF 9
000004+ 37
9
9
000000+ 23
000000+ 35
000008+ 39
000010+ 45
5
7
7
23
25
27
29
7
5
5
REF
5
Label
Value
Definition
Reference column contains each symbol that was defined or referenced during the assembly.
column contains an 8-digit hexadecimal number (which is the value assigned to the symbol) or a name that describes the symbol ' s attributes. A value may also be preceded by a character that describes the symbol ' s attributes.
lists these characters and names.
(DEFN) column contains the statement number that defines the symbol. This column is blank for undefined symbols.
(REF) column lists the line numbers of statements that reference the symbol. A blank in this column indicates that the symbol was never used.
Table 3-4. Symbol Attributes
-
"
+
Character or Name Meaning
REF External reference (global symbol)
'
UNDF Undefined
Symbol defined in a .text section
Symbol defined in a .data section
Symbol defined in a .sect section
Symbol defined in a .bss or .usect section
62 Assembler Description
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Assembler Directives
Assembler directives supply data to the program and control the assembly process. Assembler directives enable you to do the following:
• Assemble code and data into specified sections
• Reserve space in memory for uninitialized variables
• Control the appearance of listings
• Initialize memory
• Assemble conditional blocks
• Define global variables
• Specify libraries from which the assembler can obtain macros
• Examine symbolic debugging information
This chapter is divided into two parts: the first part ( Section 4.1
through
directives according to function, and the second part (
) is an alphabetical reference.
Topic
...........................................................................................................................
Page
4.1
Directives Summary ..........................................................................................
4.2
Directives That Define Sections ..........................................................................
4.3
Directives That Initialize Constants ......................................................................
4.4
Directives That Perform Alignment and Reserve Space
4.5
Directives That Format the Output Listings
.........................................
..........................................................
4.6
Directives That Reference Other Files ..................................................................
4.7
Directives That Enable Conditional Assembly .......................................................
4.8
Directives That Define Union or Structure Types ...................................................
4.9
Directives That Define Enumerated Types ............................................................
4.10
Directives That Define Symbols at Assembly Time ................................................
4.11
Directives That Communicate Run-Time Environment Details
4.12
Miscellaneous Directives
................................
....................................................................................
4.13
Directives Reference ..........................................................................................
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Assembler Directives 63
Directives Summary www.ti.com
4.1
Directives Summary
through
summarize the assembler directives.
Besides the assembler directives documented here, the TMS320C55x software tools support the following directives:
• The assembler uses several directives for macros. Macro directives are discussed in
are not discussed in this chapter.
• The C compiler uses directives for symbolic debugging. Unlike other directives, symbolic debugging directives are not used in most assembly language programs.
discusses these directives; they are not discussed in this chapter.
Labels and Comments Are Not Shown in Syntaxes
NOTE: Any source statement that contains a directive can also contain a label and a comment.
Labels begin in the first column (only labels and comments can appear in the first column), and comments must be preceded by a semicolon, or an asterisk if the comment is the only element in the line. To improve readability, labels and comments are not shown as part of the directive syntax.
Mnemonic and Syntax
.bss symbol, size in bytes[, alignment
[, bank offset]]
.clink
.data
.sect
" section name "
.text
symbol .usect " section name " , size in bytes
[ blocking][, alignment]
Table 4-1. Directives That Define Sections
Description
Reserves size bytes in the .bss (uninitialized data) section
Enables conditional linking for the current or specified section
Assembles into the .data (initialized data) section
Assembles into a named (initialized) section
Assembles into the .text (executable code) section
Reserves size bytes in a named (uninitialized) section
See
Mnemonic and Syntax
.byte value
1
[, ... , value n
]
.char value
1
[, ... , value n
]
.cstring {expr
1
| " string
1
" }[,... , {expr n
| " string n
" }]
.double value
1
[, ... , value n
]
.field value[, size]
.float value
1
[, ... , value n
]
Table 4-2. Directives That Initialize Values (Data and Memory)
.half value
1
[, ... , value n
]
.int value
1
[, ... , value n
]
label: .ivec [address[, stack mode]]
.ldouble value
1
[, ... , value n
]
.long value
1
[, ... , value n
]
.pstring
" string
1
" [, ... , " string n
" ]
.short value
1
[, ... , value n
]
.string {expr
1
| " string
1
" }[,... , {expr n
| " string n
" }]
.ubyte value
1
[, ... , value n
]
Description
Initializes one or more successive bytes in the current section
Initializes one or more successive bytes in the current section
Initializes one or more text strings
See
Initializes one or more 64-bit, IEEE double-precision, floating-point
constants
Initializes a field of size bits (1-32) with value
Initializes one or more 32-bit, IEEE single-precision, floating-point
constants
Initializes one or more 16-bit integers (halfword)
Initializes one or more 16-bit integers
Initializes an entry in the interrupt vector table
Initializes one or more 64-bit, IEEE double-precision, floating-point
constants
Initializes one or more 32-bit integers
Initializes one or more packed text strings
Initializes one or more 16-bit integers (halfword)
Initializes one or more text strings
Initializes one or more successive unsigned bytes in the current section
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Directives Summary
Table 4-2. Directives That Initialize Values (Data and Memory) (continued)
Mnemonic and Syntax
.uchar value
1
[, ... , value n
]
.uhalf value
1
[, ... , value n
]
.uint value
1
[, ... , value n
]
.ulong value
1
[, ... , value n
]
.ushort value
1
[, ... , value n
]
.uword value
1
[, ... , value n
]
.word value
1
[, ... , value n
]
.xfloat value
1
[, ... , value n
]
.xlong value
1
[, ... , value n
]
Description
Initializes one or more successive unsigned bytes in the current section
Initializes one or more unsigned 16-bit integers (halfword)
See
Initializes one or more unsigned 16-bit integers
Initializes one or more unsigned 32-bit integers
Initializes one or more unsigned 16-bit integers (halfword)
Initializes one or more unsigned 16-bit integers
Initializes one or more 16-bit integers
Initializes one or more 32-bit, IEEE single-precision, floating-point
constants, but does not align on long word boundary
Initializes one or more 32-bit integers, but does not align on long word boundary
Mnemonic and Syntax
.align [size in bytes]
.even
.localalign
.space size
Table 4-3. Directives That Perform Alignment and Reserve Space
Description
Aligns the SPC on a boundary specified by size in bytes, which must be a power of 2; defaults to 128-byte or 128-word boundary
Equivalent to .align 2.
Aligns the start of a local repeat block to allow maximum localrepeat loop size
Reserves size bytes in the current section; a label points to the beginning of the reserved space
See
Mnemonic and Syntax
.drlist
.drnolist
.fclist
.fcnolist
.length [page length]
.list
.mlist
.mnolist
.nolist
.option option
1
[, option
2
, . . .]
.page
.sslist
.ssnolist
.tab size
.title
" string "
.width [page width]
Table 4-4. Directives That Format the Output Listing
Description
Enables listing of all directive lines (default)
Suppresses listing of certain directive lines
Allows false conditional code block listing (default)
Suppresses false conditional code block listing
Sets the page length of the source listing
Restarts the source listing
Allows macro listings and loop blocks (default)
Suppresses macro listings and loop blocks
Stops the source listing
Selects output listing options; available options are B, L, M, R, T,
W, and X
Ejects a page in the source listing
Allows expanded substitution symbol listing
Suppresses expanded substitution symbol listing (default)
Sets tab to size characters
Prints a title in the listing page heading
Sets the page width of the source listing
See
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Assembler Directives 65
Directives Summary
Mnemonic and Syntax
.copy [ " ]filename[ " ]
.include [ " ]filename[ " ]
.mlib [ " ]filename[ " ]
Table 4-5. Directives That Reference Other Files
Description
Includes source statements from another file
Includes source statements from another file
Specifies a macro library from which to retrieve macro definitions www.ti.com
See
Table 4-6. Directives That Effect Symbol Linkage and Visibility
Mnemonic and Syntax
.def symbol
1
[, ... , symbol n
]
Description
Identifies one or more symbols that are defined in the current module and that can be used in other modules
See
.global symbol
1
[, ... , symbol n
]
.ref symbol
1
[, ... , symbol n
]
Identifies one or more global (external) symbols
Identifies one or more symbols used in the current module that are
defined in another module
.symdepend dst symbol name[, src symbol name] Creates an artificial reference from a section to a symbol
Mnemonic and Syntax
.break [well-defined expression]
.else
.elseif well-defined expression
.endif
.endloop
.if well-defined expression
.loop [well-defined expression]
Table 4-7. Directives That Enable Conditional Assembly
Description
Assembles code block if the .if well-defined expression is false.
When using the .if construct, the .else construct is optional.
See
Ends .loop assembly if well-defined expression is true. When using
the .loop construct, the .break construct is optional.
Assembles code block if the .if well-defined expression is false and
the .elseif condition is true. When using the .if construct, the .elseif
construct is optional.
Ends .if code block
Ends .loop code block
Assembles code block if the well-defined expression is true
Begins repeatable assembly of a code block; the loop count is determined by the well-defined expression.
Mnemonic and Syntax
.cstruct
.cunion
.emember
.endenum
.endstruct
.endunion
.enum
.union
.struct
.tag
Table 4-8. Directives That Define Union or Structure Types
Description See
Acts like .struct, but adds padding and alignment like that which is
done to C structures
Acts like .union, but adds padding and alignment like that which is
done to C unions
Sets up C-like enumerated types in assembly code
Sets up C-like enumerated types in assembly code
Ends a structure definition
Ends a union definition
,
,
Sets up C-like enumerated types in assembly code
Begins a union definition
Begins structure definition
Assigns structure attributes to a label
,
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Table 4-9. Directives That Define Symbols at Assembly Time
Mnemonic and Syntax
.asg [ " ]character string[ " ], substitution symbol
symbol .equ value
.eval well-defined expression , substitution symbol
.label symbol
.newblock
symbol .set value
.unasg symbol
.undefine symbol
Description
Assigns a character string to substitution symbol
Equates value with symbol
Performs arithmetic on a numeric substitution symbol
Defines a load-time relocatable label in a section
Undefines local labels
Equates value with symbol
Turns off assignment of symbol as a substitution symbol
Turns off assignment of symbol as a substitution symbol
Directives Summary
See
Mnemonic and Syntax
.dp DP_value
.lock_off
.lock_on
.vli_off
.vli_on
Table 4-10. Directives That Communicate Run-Time Environment Details
Description
Specifies the value of the DP register
Asserts the lock() modifier is not legal; resumes the default behavior
Identifies the beginning of a block of code that contains read-modify-write instructions
Identifies the beginning of a block of code in which the assembler uses the largest form of certain variable-length instructions
Resumes the default behavior of resolving variable-length instructions to their smallest form
See
Mnemonic and Syntax
.arms_off
.arms_on
.c54cm_off
.c54cm_on
.cpl_off
.cpl_on
Table 4-11. Directives That Relate to C55x Addressing Modes
Description
Resumes the default behavior of the assembler using indirect memory access modifiers
Identifies the beginning of a block of code to be assembled in
ARMS mode
Resumes the default behavior of C55x code
Identifies the beginning of a block of C54x compatibility mode code
(code that has been translated from C54x code)
Resumes the default behavior of dma relative to DP
Identifies the beginning of a block of code to be assembled in CPL mode (dma relative to SP
See
Mnemonic and Syntax
.port_for_size
.port_for_speed
.sst_off
.sst_on
Table 4-12. Directives That Affect Porting C54x Mnemonic Assembly
Description See
Resumes the default behavior of optimizing C54x code for smaller
size
Identifies the beginning of a block of code in which the assembler
optimizes ported C54x code for speed
Identifies the beginning of a block of code in which the assembler assumes the SST bit is disabled
Resumes the default behavior of assuming the SST bit is enabled
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Directives Summary
Table 4-13. Directives That Create or Effect Macros
Mnemonic and Syntax
.endm
Description
End macro definition
.loop[well-defined expression]
Begins repeatable assembly of a code block; the loop count is determined by the well-defined expression.
macname .macro [parameter
1
][,... , parameter n
] Define macro by macname
.mexit
Go to .endm
.mlib filename
.var
Identify library containing macro definitions
Adds a local substitution symbol to a macro ' s parameter list
Mnemonic and Syntax
.emsg string
.mmsg string
.noremark[num]
.remark [num]
.warn_off
.warn_on
.wmsg string www.ti.com
See
Table 4-14. Directives That Control Diagnostics
Description
Sends user-defined error messages to the output device; produces no .obj file
Sends user-defined messages to the output device
See
Resumes the default behavior of generating the remark(s) previously suppressed by .noremark
Identifies the beginning of a block of code in which the assembler
suppresses the num remark
Identifies the beginning of a block of code in which the assembler
suppresses warning messages
Resumes the default behavior of reporting assembler warning messages
Sends user-defined warning messages to the output device
Mnemonic and Syntax
.asmfunc
.endasmfunc
Table 4-15. Directives That Perform Assembly Source Debug
Description See
Identifies the beginning of a block of code that contains a function
Identifies the end of a block of code that contains a function
Mnemonic and Syntax
.setsect
.setsym
Table 4-16. Directives That Are Used by the Absolute Lister
Description
Produced by absolute lister; sets a section
Produced by the absolute lister; sets a symbol
See
Table 4-17. Directives That Perform Miscellaneous Functions
Mnemonic and Syntax
.cdecls [options ,] " filename " [, " filename2 " [, ...]
.end
.sblock[ " ]section name[ " ][,[ " ]section name[ " ],...
Description
Share C headers between C and assembly code. Available in algebraic assembly only.
Ends program
See
Designates sections for blocking. Only initialized sections can be
specified for blocking.
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Directives That Define Sections
In addition to the assembly directives that you can use in your code, the compiler produces several directives when it creates assembly code. These directives are to be used only by the compiler; do not attempt to use these directives.
• DWARF directives listed in
• COFF/STABS directives listed in
• The .template directive is used for early template instantiation. It encodes information about a template that has yet to be instantiated. This is a COFF C++ directive.
• The .compiler_opts directive indicates that the assembly code was produced by the compiler, and which build model options were used for this file.
4.2
Directives That Define Sections
These directives associate portions of an assembly language program with the appropriate sections:
• The .bss directive reserves space in the .bss section for uninitialized variables.
• The .clink directive enables conditional linking by telling the linker to leave the named section out of the final object module output of the linker if there are no references found to any symbol in the section. The .clink directive can be applied to initialized sections.
• The .data directive identifies portions of code in the .data section. The .data section usually contains initialized data.
• The .sect directive defines an initialized named section and associates subsequent code or data with that section. A section defined with .sect can contain code or data.
• The .text directive identifies portions of code in the .text section. The .text section usually contains executable code.
• The .usect directive reserves space in an uninitialized named section. The .usect directive is similar to the .bss directive, but it allows you to reserve space separately from the .bss section.
discusses these sections in detail.
shows how you can use sections directives to associate code and data with the proper sections. This is an output listing; column 1 shows line numbers, and column 2 shows the SPC values.
(Each section has its own program counter, or SPC.) When code is first placed in a section, its SPC equals 0. When you resume assembling into a section after other code is assembled, the section's SPC resumes counting as if there had been no intervening code.
The directives in
perform the following tasks:
.text
.data
var_defs
.bss
xy contains basic adding and loading instructions.
initializes words with the values 9, 10, 11, 12, 13, 14, 15, and 16.
initializes words with the values 17 and 18.
reserves 19 words.
reserves 20 words.
The .bss and .usect directives do not end the current section or begin new sections; they reserve the specified amount of space, and then the assembler resumes assembling code or data into the current section.
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Directives That Define Sections
Example 4-1. Sections Directives
1
2
3
4 000000
7
8
5 000000 3CA0
6 000002 2201
9
10
11 000000
12 000000 0009
000001 000A
13 000002 000B
000003 000C
14
15
16
17
18
19 000000
20 000000 0011
000001 0012
21
22
23
24
25 000004
26 000004 000D
000005 000E
27 000000
28 000006 000F
000007 0010
29
30
31
32
33 000004
34 000004 2412
35 000000
36 000006 2220
**************************************************
* Start assembling into the .text section *
**************************************************
.text
MOV #10,AC0
MOV AC0,AC1
**************************************************
* Start assembling into the .data section *
**************************************************
.data
.word 9, 10
.word 11, 12
**************************************************
* Start assembling into a named, *
* initialized section, var_defs *
**************************************************
.sect "var_defs"
.word 17, 18
**************************************************
* Resume assembling into the .data section *
**************************************************
.data
.word 13, 14
.bss sym, 19
.word 15, 16
; Reserve space in .bss
; Still in .data
**************************************************
* Resume assembling into the .text section *
**************************************************
.text
usym
ADD AC1,AC2
.usect "xy", 20 ; Reserve space in xy
MOV AC2,AC0 ; Still in .text
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4.3
Directives That Initialize Constants
Directives That Initialize Constants
Use These Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of these directives in a section that includes C55x instructions will likely lead to the generation of an invalid access to the data at execution. Consequently, Texas Instruments highly recommends that these directives be issued only within data sections.
Several directives assemble values for the current section:
• The .byte, .ubyte, .char, and .uchar directives place one or more 8-bit values into consecutive bytes of the current section. These directives are similar to .word and .uword, except that the width of each value is restricted to eight bits.
• The .double and .ldouble directives calculate the double-precision (64-bit) IEEE floating-point representation of one or more floating-point values and store them in four consecutive words in the current section. The .double directive automatically aligns to the long-word boundary.
• The .field directive places a single value into a specified number of bits in the current word. With .field, you can pack multiple fields into a single word; the assembler does not increment the SPC until a word is filled.
shows how fields are packed into a word. Using the following assembled code, notice that the SPC does not change for the first three fields (the fields are packed into the same word):
3 000000
4 000000 6000
5 000000 6400
6 000000 6440
7 000001 0123
000002 4000
8 000003 0000
000004 1234
.data
.field
3, 3
.field
8, 6
.field
16, 5
.field
01234h,20
.field
01234h,32
Figure 4-1. The .field Directive
0 15 14 13
0 1 1 .field
3,3
3 bits
15 12 11 10 9 8 7
0 1 1 0 0 1 0 0 0
0
.field
8,6
6 bits
15 6 5 4 3 2 0
0 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0 .field
16,5
5 bits
15 0
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
15 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
.field
01234h,20
15 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 0
0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
.field
01234h,32
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Directives That Initialize Constants www.ti.com
• The .float and .xfloat directives calculate the single-precision (32-bit) IEEE floating-point representation of a single floating-point value and store it in a word in the current section that is aligned to a word boundary.
• The .half, .uhalf, .int, .uint, .short, .ushort, .word, and .uword directives place one or more 16-bit values into consecutive 16-bit fields (words) in the current section. The .int and .word directives automatically align to a word boundary.
• The .ivec directive is used to initialize the entries in the interrupt vector table.
• The .long, .ulong, and .xlong directives place one or more 32-bit values into consecutive 32-bit fields
(words) in the current section. The most significant word is stored first. The .long directive automatically aligns to a long-word boundary; the .xlong directive does not.
• The .string , .cstring, and .pstring directives place 8-bit characters from one or more character strings into the current section. The .string and .cstring directives are similar to .byte, placing an 8-bit character in each consecutive word of the current section. The .cstring directive adds a NUL character needed by C; the .string directive does not add a NUL character. The .pstring directive also has a width of 8 bits, but it packs one character per byte. For .pstring, the last word in a string is padded with null characters (0) if necessary.
Directives That Initialize Constants When Used in a .struct/.endstruct Sequence
NOTE: The .byte, .char, .double, field, .float, .half, .int, .long, .short, .string, .ubyte, .uchar, .uhalt,
.uint, .ulong, .ushort, .uword, and .word directives do not initialize memory when they are part of a .struct/ .endstruct sequence; rather, they define a member ’ s size. For more information, see the
.
compares the .byte, .int, .long, .xlong, .float, .xfloat, .word, and .string directives. Using the following assembled code:
1 000000
2 000000 00AA
000001 00BB
3 000002 0CCC
4 000003 0EEE
000004 EFFF
5 000006 EEEE
000007 FFFF
6 000008 DDDD
7 000009 3FFF
00000a FFAC
8 00000c 3FFF
00000d FFAC
9 00000e 0068
00000f 0065
000010 006c
000011 0070
.data
.byte
.word
.xlong
.long
.int
.xfloat
.float
.string
0AAh, 0BBh
0CCCh
0EEEEFFFh
0EEEEFFFFh
0DDDDh
1.99999
1.99999
"help"
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Word
0, 1
2
3, 4
6,7
8
9, a c, d e, f
10, 11 5
C
C
8
0
F
C
F
E
F
E
F
D
15
15
A
B
C h l
Directives That Perform Alignment and Reserve Space
0
0
0
0
F
3
D
3
F
E
F
0
E
D
0
0
0
C
Figure 4-2. Initialization Directives
00
A 0
0
C
.byte
.word
Code
OAAh, OBBh,
OCCCh
0
0
0
0
F
F
F
F
E
F
E
F
D
6
7
6
6
F
A
F
A
E
F
E
F
.xlong
0EEEEFFFh
.long
EEEEFFFFh
.int
DDDDh
.xfloat 1.99999
.float
1.99999
.string “help” e p
4.4
Directives That Perform Alignment and Reserve Space
These directives align the section program counter (SPC) or reserve space in a section:
• The .align directive aligns the SPC at a byte boundary in code sections or a word boundary in data sections. If the SPC is already aligned at the selected boundary, it is not incremented. Operands for the .align directive must equal a power of 2 between 2 0 and 2 16 .
The .align directive with no operands defaults to a 128-byte boundary in a code section, and a
128-word (page) boundary in a data section.
demonstrates the .align directive. Using the following assembled code:
1 000000
2 000000 4000
3 000000 4160
4
5 000002 0045
000003 0072
000004 0072
000005 006f
000006 0072
000007 0063
000008 006e
000009 0074
6
7 000080 0004
.data
.field
2, 3
.field
11, 8
.align
2
.string
"Errorcnt"
.align
.word
4
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Directives That Perform Alignment and Reserve Space
Figure 4-3. The .align Directive
(a) Result of .align 2
00h
02h
(a) Current
SPC = 00h
(b) Result of .align
without an argument
2 words
(b) New SPC =
02h after assembling a .align 2 directive www.ti.com
00h
(a) Current
SPC
128 words
80h
(b) New SPC =
80h after assembling a .align
directive
• The .even directive aligns the SPC so that it points to the next word (in code sections) or long word (in data sections) boundary. It is equivalent to specifying the .align directive with an operand of 2. Any unused bits in the current byte or word are filled with 0s.
• The .localalign directive allows the maximum localrepeat loop size for the specified loop.
• The .space directive reserves a specified number of bits in the current section. The assembler fills these reserved bits with 0s.
You can reserve words by multiplying the desired number of words by 16.
When you use a label with .space, it points to the first byte that contains reserved bits.
Assume the following code has been assembled:
1
2
3 000000
4 000000 0100
** .space directive
.data
.word
100h, 200h
000001 0200
5 000002 Res_1: .space
17
6 000004 000F
7
.word
15
** reserve 3 words
8 000005
9 000008 000A
Res_3: .space
3*16
.word
10
Res_1 points to the first word in the space reserved by .space.
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Directives That Format the Output Listings
4.5
Directives That Format the Output Listings
These directives format the listing file:
• The .drlist directive causes printing of the directive lines to the listing; the .drnolist directive turns it off for certain directives. You can use the .drnolist directive to suppress the printing of the following directives. You can use the .drlist directive to turn the listing on again.
.asg
.break
.emsg
.eval
.fclist
.fcnolist
.length
.mlist
.mmsg
.mnolist
.sslist
.ssnolist
.var
.width
.wmsg
• The source code listing includes false conditional blocks that do not generate code. The .fclist and
.fcnolist directives turn this listing on and off. You can use the .fclist directive to list false conditional blocks exactly as they appear in the source code. You can use the .fcnolist directive to list only the conditional blocks that are actually assembled.
• The .length directive controls the page length of the listing file. You can use this directive to adjust listings for various output devices.
• The .list and .nolist directives turn the output listing on and off. You can use the .nolist directive to prevent the assembler from printing selected source statements in the listing file. Use the .list directive to turn the listing on again.
• The source code listing includes macro expansions and loop blocks. The .mlist and .mnolist directives turn this listing on and off. You can use the .mlist directive to print all macro expansions and loop blocks to the listing, and the .mnolist directive to suppress this listing.
• The .option directive controls certain features in the listing file. This directive has the following operands:
L
M
N
O
A
B
D
H
R
T
W
X turns on listing of all directives and data, and subsequent expansions, macros, and blocks.
limits the listing of .byte and .char directives to one line.
turns off the listing of certain directives (same effect as .drnolist).
limits the listing of .half and .short directives to one line.
limits the listing of .long directives to one line.
turns off macro expansions in the listing.
turns off listing (performs .nolist).
turns on listing (performs .list).
resets the B, M, T, and W directives (turns off the limits of B, L, H, T, and W).
limits the listing of .string directives to one line.
limits the listing of .word and .int directives to one line.
produces a cross-reference listing of symbols. You can also obtain a cross-reference listing by invoking the assembler with the --cross_reference option (see
• The .page directive causes a page eject in the output listing.
• The source code listing includes substitution symbol expansions. The .sslist and .ssnolist directives turn this listing on and off. You can use the .sslist directive to print all substitution symbol expansions to the listing, and the .ssnolist directive to suppress this listing. These directives are useful for debugging the expansion of substitution symbols.
• The .tab directive defines tab size.
• The .title directive supplies a title that the assembler prints at the top of each page.
• The .width directive controls the page width of the listing file. You can use this directive to adjust listings for various output devices.
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4.6
Directives That Reference Other Files
These directives supply information for or about other files that can be used in the assembly of the current file:
• The .copy and .include directives tell the assembler to begin reading source statements from another file. When the assembler finishes reading the source statements in the copy/include file, it resumes reading source statements from the current file. The statements read from a copied file are printed in the listing file; the statements read from an included file are not printed in the listing file.
• The .def directive identifies a symbol that is defined in the current module and that can be used in another module. The assembler includes the symbol in the symbol table.
• The .global directive declares a symbol external so that it is available to other modules at link time.
(For more information about global symbols, see
). The .global directive does double duty,
acting as a .def for defined symbols and as a .ref for undefined symbols. The linker resolves an undefined global symbol reference only if the symbol is used in the program. The .global directive declares a 16-bit symbol.
• The .mlib directive supplies the assembler with the name of an archive library that contains macro definitions. When the assembler encounters a macro that is not defined in the current module, it searches for it in the macro library specified with .mlib.
• The .ref directive identifies a symbol that is used in the current module but is defined in another module. The assembler marks the symbol as an undefined external symbol and enters it in the object symbol table so the linker can resolve its definition. The .ref directive forces the linker to resolve a symbol reference.
• The .symdepend directive creates an artificial reference from the section defining the source symbol name to the destination symbol. The .symdepend directive prevents the linker from removing the section containing the destination symbol if the source symbol section is included in the output module.
4.7
Directives That Enable Conditional Assembly
Conditional assembly directives enable you to instruct the assembler to assemble certain sections of code according to a true or false evaluation of an expression. Two sets of directives allow you to assemble conditional blocks of code:
• The .if/.elseif/.else/.endif directives tell the assembler to conditionally assemble a block of code according to the evaluation of an expression.
.if well-defined expression marks the beginning of a conditional block and assembles code if the .if well-defined expression is true.
[.elseif well-defined expression]
.else
.endif
marks a block of code to be assembled if the .if well-defined
expression is false and the .elseif condition is true.
marks a block of code to be assembled if the .if well-defined
expression is false and any .elseif conditions are false.
marks the end of a conditional block and terminates the block.
• The .loop/.break/.endloop directives tell the assembler to repeatedly assemble a block of code according to the evaluation of an expression.
.loop [well-defined expression] marks the beginning of a repeatable block of code. The optional expression evaluates to the loop count.
.break [well-defined expression] tells the assembler to assemble repeatedly when the .break
well-defined expression is false and to go to the code immediately after .endloop when the expression is true or omitted.
.endloop
marks the end of a repeatable block.
The assembler supports several relational operators that are useful for conditional expressions. For more information about relational operators, see
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Directives That Define Union or Structure Types
4.8
Directives That Define Union or Structure Types
These directives set up specialized types for later use with the .tag directive, allowing you to use symbolic names to refer to portions of a complex object. The types created are analogous to the struct and union types of the C language.
The .struct, .union, .cstruct, and .cunion directives group related data into an aggregate structure which is more easily accessed. These directives do not allocate space for any object. Objects must be separately allocated, and the .tag directive must be used to assign the type to the object.
X
Y
.data
type .struct
.int
.int
; structure tag definition
T_LEN .endstruct
COORD .tag type ; declare COORD (coordinate)
.bss COORD, T_LEN ; actual memory allocation
.text
ADD @(COORD.Y),AC0,AC0
The .cstruct and .cunion directives guarantee that the data structure will have the same alignment and padding as if the structure were defined in analogous C code. This allows structures to be shared between
C and assembly code. See
Chapter 14 . For .struct and .union, element offset calculation is left up to the
assembler, so the layout may be different than .cstruct and .cunion.
4.9
Directives That Define Enumerated Types
These directives set up specialized types for later use in expressions allowing you to use symbolic names to refer to compile-time constants. The types created are analogous to the enum type of the C language.
This allows enumerated types to be shared between C and assembly code. See
.
See
for an example of using .enum.
4.10 Directives That Define Symbols at Assembly Time
Assembly-time symbol directives equate meaningful symbol names to constant values or strings.
• The .asg directive assigns a character string to a substitution symbol. The value is stored in the substitution symbol table. When the assembler encounters a substitution symbol, it replaces the symbol with its character string value. Substitution symbols can be redefined.
.asg "10, 20, 30, 40", coefficients
; Assign string to substitution symbol.
.byte coefficients
; Place the symbol values 10, 20, 30, and 40
; into consecutive bytes in current section.
• The .eval directive evaluates a well-defined expression, translates the results into a character string, and assigns the character string to a substitution symbol. This directive is most useful for manipulating counters:
.asg
.loop
.byte
.break
.eval
.endloop
1 , x ; x = 1
; Begin conditional loop.
x*10h ; Store value into current section.
x = 4 ; Break loop if x = 4.
x+1, x ; Increment x by 1.
; End conditional loop.
• The .define directive assigns a character string to a substitution symbol. The value is stored in the substitution symbol table. When the assembler encounters a substitution symbol, it replaces the symbol with its character string value. Substitution symbols created with .define cannot be redefined.
• The .label directive defines a special symbol that refers to the load-time address within the current section. This is useful when a section loads at one address but runs at a different address. For example, you may want to load a block of performance-critical code into slower off-chip memory to save space and move the code to high-speed on-chip memory to run. See the
for an example using a load-time address label.
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• The .set and .equ directives set a constant value to a symbol. The symbol is stored in the symbol table and cannot be redefined; for example: bval .set 0100h ; Set bval = 0100h
.long bval, bval*2, bval+12
; Store the values 0100h, 0200h, and 010Ch
; into consecutive words in current section.
The .set and .equ directives produce no object code. The two directives are identical and can be used interchangeably.
• The .unasg directive turns off substitution symbol assignment made with .asg.
• The .undefine directive turns off substitution symbol assignment made with .define.
• The .var directive allows you to use substitution symbols as local variables within a macro.
4.11 Directives That Communicate Run-Time Environment Details
These directives affect assembler assumptions while processing code. Within the ranges marked by these directives the assembler's default actions are altered as specified.
• The .dp directive specifies the value of the DP register. The assembler cannot track the value of the
DP register; however, it needs to know the value of DP in order to assemble direct memory access operands. Consequently, this directive should be placed immediately following any instruction that changes the DP register ’ s value. If the assembler is not given any information on the value of the DP register, it assumes the value is 0 when encoding direct memory operands.
• The .lock_on directive begins a block of code in which the assembler allows the lock() modifier. The
.lock_off directives ends this block of code and resumes the default behavior of the assembler.
• The .vli_off directive begins a block of code in which the assembler uses the largest (P24) forms of certain variable-length instructions. By default, the assembler tries to resolve variable-length instructions to their smallest form. The .vli_on directive ends this block of code and resumes the default behavior of the assembler.
The following directives relate to C55x addressing modes:
• The .arms_on directive begins a block of code for which the assembler will use indirect access modifiers targeted to code size optimization. These modifiers are short offset modifiers. The .arms_off directive ends the block of code.
• The .c54cm_on directive signifies to the assembler that the following block of code has been converted from C54x code. The .c54cm_off directive ends the block of code.
• The .cpl_on directive begins a block of code in which direct memory addressing (DMA) is relative to the stack pointer. By default, DMA is relative to the data page. The .cpl_off directive ends the block of code.
The following directives relate to porting C54x code:
• The .port_for_speed directive begins a block of code in which the assembler encodes ported C54x code with a goal of achieving fast code. By default, the assembler encodes C54x code with a goal of achieving small code size. The .port_for_size directive ends the block of code.
• The .sst_off directive begins a block of code for which the assembler will assume that the SST status bit is set to 0. By default, the assembler assumes that the SST bit is set to 1. The .sst_on directive ends the block of code.
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Miscellaneous Directives
4.12 Miscellaneous Directives
These directives enable miscellaneous functions or features:
• The .asmfunc and .endasmfunc directives mark function boundaries. These directives are used with the compiler --symdebug:dwarf (-g) option to generate debug information for assembly functions.
• The .cdecls directive enables programmers in mixed assembly and C/C++ environments to share C headers containing declarations and prototypes between C and assembly code.
• The .end directive terminates assembly. If you use the .end directive, it should be the last source statement of a program. This directive has the same effect as an end-of-file character.
• The .newblock directive resets local labels. Local labels are symbols of the form $n, where n is a decimal digit, or of the form NAME?, where you specify NAME. They are defined when they appear in the label field. Local labels are temporary labels that can be used as operands for jump instructions.
The .newblock directive limits the scope of local labels by resetting them after they are used. See
for information on local labels.
• The .noremark directive begins a block of code in which the assembler suppresses the specified assembler remark. A remark is an informational assembler message that is less severe than a warning. The .remark directive re-enables the remark(s) previously suppressed by .noremark.
• The .sblock directive designates sections for blocking. A blocked section does not cross a page boundary (64 words) if it is smaller than a page, and it starts on a page boundary if it is larger than a page. Only initialized sections can be specified for blocking.
• The .warn_on/.warn_off directives enable and disable the issuing of warning messages by the assembler. By default, warnings are enabled (.warn_on).
These three directives enable you to define your own error and warning messages:
• The .emsg directive sends error messages to the standard output device. The .emsg directive generates errors in the same manner as the assembler, incrementing the error count and preventing the assembler from producing an object file.
• The .mmsg directive sends assembly-time messages to the standard output device. The .mmsg
directive functions in the same manner as the .emsg and .wmsg directives but does not set the error count or the warning count. It does not affect the creation of the object file.
• The .wmsg directive sends warning messages to the standard output device. The .wmsg directive functions in the same manner as the .emsg directive but increments the warning count rather than the error count. It does not affect the creation of the object file.
For more information about using the error and warning directives in macros, see
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4.13 Directives Reference
The remainder of this chapter is a reference. Generally, the directives are organized alphabetically, one directive per topic. Related directives (such as .if/.else/.endif), however, are presented together in one topic.
.align
Syntax
Description
Example
Align SPC on the Next Boundary
.align [size in bytes]
The .align directive aligns the section program counter (SPC) on the next boundary, depending on the size in bytes parameter. The size can be any power of 2, although only certain values are useful for alignment.
The size parameter should be in bytes for a code section, and in words for a data section. If a size is not specified, the SPC is aligned on the next 128-byte boundary for a code section, or the next 128-word (page) boundary for a data section.
A hole may be created by the .align directive if the SPC, at the point at which the directive occurs, is not on the desired byte or word boundary. In a data section, the assembler zero-fills holes created by .align. In a code section, holes are filled with NOP instructions.
The .even directive aligns the SPC on a word (code section) or long word (data section) boundary. This directive is equivalent to the .align directive with an operand of 2.
Using the .align directive has two effects:
• The assembler aligns the SPC on an x-word boundary within the current section.
• The assembler sets a flag that forces the linker to align the section so that individual alignments remain intact when a section is loaded into memory.
This example shows several types of alignment, including .even, .align 4, and a default
.align.
1 000000
2 000000 0004
3
4 000002 0045
000003 0072
000004 0072
000005 006F
000006 0072
000007 0063
000008 006E
000009 0074
5
6 000080 6000
7 000080 6A00
8
9 000082 6000
10
11 000088 5000
12
13 000100 0004
.data
.word
4
.even
.string
"Errorcnt"
.align
.field
.field
.align
.field
.align
.field
.align
.word
3,3
5,4
2
3,3
8
5,4
4
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Directives Reference
.arms_on/.arms_off
Display Code at Selected Address
Syntax
Description
.arms_on
.arms_off
The .arms_on and .arms_off directives model the ARMS status bit.
The assembler cannot track the value of the ARMS status bit. You must use the assembler directives and/or command line options to communicate the value of this mode bit to the assembler. An instruction that modifies the value of the ARMS status bit should be immediately followed by the appropriate assembler directive.
The .arms_on directive models the ARMS status bit set to 1; it is equivalent to using the
-ma command line option. The .arms_off directive models the ARMS status bit set to 0.
In the case of a conflict between the command line option and the directive, the directive takes precedence.
By default (.arms_off), the assembler uses indirect memory access modifiers targeted to the assembly code.
In ARMS mode (.arms_on), the assembler uses short offset modifiers for indirect memory access. These modifiers are more efficient for code size optimization.
The scope of the .arms_on and .arms_off directives is static and not subject to the control flow of the assembly program. All assembly code between the .arms_on line and the .arms_off line is assembled in ARMS mode.
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.asg/.define/.eval
Assign a Substitution Symbol
Syntax
Description
.asg
" character string " ,substitution symbol
.define
" character string " ,substitution symbol
.eval well-defined expression,substitution symbol
The .asg and .define directives assign character strings to substitution symbols.
Substitution symbols are stored in the substitution symbol table. The .asg directive can be used in many of the same ways as the .set directive, but while .set assigns a constant value (which cannot be redefined) to a symbol, .asg assigns a character string
(which can be redefined) to a substitution symbol.
• The assembler assigns the character string to the substitution symbol.
• The substitution symbol must be a valid symbol name. The substitution symbol is up to 32 characters long and must begin with a letter. Remaining characters of the symbol can be a combination of alphanumeric characters, the underscore (_), and the dollar sign ($).
The .define directive functions in the same manner as the .asg directive, except that
.define disallows creation of a substitution symbol that has the same name as a register symbol or mnemonic. It does not create a new symbol name space in the assembler, rather it uses the existing substitution symbol name space. The .define directive is used to prevent corruption of the assembly environment when converting C/C++ headers. See
for more information about using C/C++ headers in assembly source.
The .eval directive performs arithmetic on substitution symbols, which are stored in the substitution symbol table. This directive evaluates the well-defined expression and assigns the string value of the result to the substitution symbol. The .eval directive is especially useful as a counter in .loop/.endloop blocks.
• The well-defined expression is an alphanumeric expression in which all symbols have been previously defined in the current source module, so that the result is an absolute.
• The substitution symbol must be a valid symbol name. The substitution symbol is up to 32 characters long and must begin with a letter. Remaining characters of the symbol can be a combination of alphanumeric characters, the underscore (_), and the dollar sign ($).
See the
for information on turning off a substitution symbol.
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Example
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
This example shows how .asg and .eval can be used.
.sslist
;show expanded sub. symbols
#
3
4
1
2
5
6
7
8 000000 7b00
000002 6400
9 000004 b403
*
*
*
.asg/.eval example
.asg *+, INC
.asg AR0, FP
ADD #100,AC0
AMAR (*FP+)
AMAR (AR0+)
14
15
16
17
10
11
12 000000
13
000000 0001
000001 0002
000002 0003
000003 0004
000004 0005
.data
.asg 0, x
.loop 5
.eval x+1, x
.word x
.endloop
.eval x+1, x
.eval 0+1, x
.word x
.word 1
.eval x+1, x
.eval 1+1, x
.word x
.word 2
.eval x+1, x
.eval 2+1, x
.word x
.word 3
.eval x+1, x
.eval 3+1, x
.word x
.word 4
.eval x+1, x
.eval 4+1, x
.word x
.word 5
Directives Reference
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.asmfunc/.endasmfunc
Mark Function Boundaries
Syntax
Description
Example symbol .asmfunc [stack_usage(num)]
.endasmfunc
The .asmfunc and .endasmfunc directives mark function boundaries. These directives are used with the compiler -g option (--symdebug:dwarf) to allow assembly code sections to be debugged in the same manner as C/C++ functions.
You should not use the same directives generated by the compiler (see
accomplish assembly debugging; those directives should be used only by the compiler to generate symbolic debugging information for C/C++ source files.
The .asmfunc and .endasmfunc directives cannot be used when invoking the compiler with the backwards-compatibility --symdebug:coff option. This option instructs the compiler to use the obsolete COFF symbolic debugging format, which does not support these directives.
The symbol is a label that must appear in the label field.
The .asmfunc directive has an optional parameter, stack_usage, which sets the stack to
num bytes.
Consecutive ranges of assembly code that are not enclosed within a pair of .asmfunc
and .endasmfunc directives are given a default name in the following format:
$ filename : beginning source line : ending source line $
In this example the assembly source generates debug information for the user_func section.
5
6
3
4
1 000000
2
7 000000 4EFD
8 000002 FB00
000004 0000%
9 000006 6C00
000008 0000!
10 00000a 3C04
11 00000c 4E03
12 00000e 4804
13
14
.sect
.align
".text"
4
.global userfunc
.global _printf user_func: .asmfunc
AADD #-3, SP
MOV #(SL1 & 0xffff), *SP(#0)
CALL #_printf
MOV #0, T0
AADD #3, SP
RET
.endasmfunc
.sect
".const"
.string "Hello World!",10,0
15 000000
16 000000 0048 SL1:
000001 0065
000002 006C
000003 006C
000004 006F
000005 0020
000006 0057
000007 006F
000008 0072
000009 006C
00000a 0064
00000b 0021
00000c 000A
00000d 0000
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.bss
Syntax
Description
Rule 1
Rule 2
Directives Reference
Reserve Space in the .bss Section
.bss symbol, size in bytes[, blocking flag[, alignment] ]
The .bss directive reserves space for variables in the .bss section. This directive is usually used to allocate space in RAM.
• The symbol is a required parameter. It defines a label that points to the first location reserved by the directive. The symbol name must correspond to the variable that you are reserving space for.
• The size in bytes is a required parameter; it must be an absolute expression. The assembler allocates size bytes in the .bss section. There is no default size.
• The blocking flag is an optional parameter. If you specify a non-zero value for the parameter, the assembler reserves size words contiguously. This means that the reserved space will not cross a page boundary unless size is greater than a page, in which case, the object will start on a page boundary.
• The alignment is an optional parameter. The alignment is a power of two that specifies that the space reserved by this .bss directive is to be aligned to the specified word address boundary.
Specifying an Alignment Flag Only
NOTE: To specify an alignment flag without a blocking flag, you either insert two commas before the alignment flag, or specify 0 for the blocking flag.
The assembler follows two rules when it reserve space in the .bss section:
Whenever a hole is left in memory (as shown in
Figure 4-4 ), the .bss directive attempts to fill
it. When a .bss directive is assembled, the assembler searches its list of holes left by previous .bss directives and tries to allocate the current block into one of the holes. (This is the standard procedure whether the contiguous allocation option has been specified or not.)
If the assembler does not find a hole large enough to contain the requested space, it checks to see whether the blocking option is requested.
• If you do not request blocking, the memory is allocated at the current SPC.
• If you request blocking, the assembler checks to see whether there is enough space between the current SPC and the page boundary. If there is not enough space, the assembler creates another hole and allocates the space at the beginning of the next page.
The blocking option allows you to reserve up to 128 words in the .bss section and ensure that they fit on one page of memory. (Of course, you can reserve more than 128 words at a time, but they cannot fit on a single page.) The following example code reserves two blocks of space in the .bss section.
memptr: .bss
A,64,1 memptr1: .bss
B,70,1
Each block must be contained within the boundaries of a single page; after the first block is allocated, however, the second block cannot fit on the current page. As Figure 4-4 shows, the second block is allocated on the next page.
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Figure 4-4. Allocating .bss Blocks Within a Page
Memory
0 a
Memory allocated by first .bss
directive; 64 words left in the first page
Hole in memory left because second .bss directive required more than 64 words Page boundary 127 b Memory allocated by second
.bss directive; 58 words left in the second page
Unused memory
256
Section directives for initialized sections (.text, .data, and .sect) end the current section and begin assembling into another section. The .bss directive, however, does not affect the current section. The assembler uses the .bss directive to reserve space in the .bss
section, but then resumes assembling code into the current section (after the .bss has been processed). For more information about sections, see
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Example
Directives Reference
In this example, the .bss directive reserves space for two variables, TEMP and ARRAY.
The symbol TEMP points to 4 words of uninitialized space (at .bss SPC = 0). The symbol ARRAY points to 100 words of uninitialized space (at .bss SPC = 04h); this space must be placed contiguously within a page. Symbols declared with the .bss
directive can be referenced in the same manner as other symbols and can also be declared external using the .global directive.
1
2
3
4 000000
*******************************************
** Assemble into the .text section.
**
*******************************************
.text
7
8
5 000000 3C00
6
MOV #0,AC0
*******************************************
** Allocate 4 words in .bss for TEMP.
**
*******************************************
9 000000
10
11
12
13 000002 7B00
000004 5600
Var_1: .bss TEMP, 4
*******************************************
** Still in .text
**
*******************************************
ADD #86,AC0,AC0
14 000006 5272
15 000008 1E73
00000a 80
MOV T3,HI(AC2)
MPYK #115,AC2,AC0
16
17
18
19
20
21 0000004
22
23
*******************************************
** Allocate 100 words in .bss for the **
** symbol named ARRAY; this part of
** .bss must fit on a single page.
**
**
*******************************************
.bss ARRAY, 100, 1
*******************************************
** Assemble more code into .text.
**
24 *******************************************
25 00000b C000MOV AC0,Var_1
26
27
*******************************************
** Declare external .bss symbols.
**
28
29
30
*******************************************
.global ARRAY, TEMP
.end
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.byte/.ubyte/.char/.uchar
Initialize Byte
Syntax
Description
.byte value
1
[, ... , value n
]
.ubyte value
1
[, ... , value n
]
.char value
1
[, ... , value n
]
.uchar value
1
[, ... , value n
]
The .byte, .ubyte, .char, and .uchar directives place one or more 8-bit values into consecutive words in the current data section.
Example
Use These Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of
.byte, .ubyte, .char, and .uchar directives in a section that includes C55x instructions will lead to an invalid access to the data at execution.
Consequently, it is highly recommended that these directives be used only in data sections.
In data sections, each 8-bit value is placed in a word by itself; the eight MSBs are filled with 0s. A value can be:
• An expression that the assembler evaluates and treats as an 8-bit signed number
• A character string enclosed in double quotes. Each character in a string represents a separate value, and values are stored in consecutive bytes. The entire string must be enclosed in quotes.
Values are not packed or sign-extended. In word-addressable data sections, each byte occupies the 8 least significant bits of a full 16-bit word. The assembler truncates values greater than 8 bits.
If you use a label, it points to the location of the first byte that is initialized.
When you use these directives in a .struct/.endstruct sequence, they define a member ' s size; they do not initialize memory. For more information, see the
In this example, 8-bit values (10, -1, abc, and a) are placed into consecutive words in memory with .byte. The label STRX has the value 100h, which is the location of the first initialized word.
1 000000
2 000000
.data
.space
100h * 16
3 000100 000a STRX .byte
10, -1, "abc", 'a'
000101 00ff
000102 0061
000103 0062
000104 0063
000105 0061
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Directives Reference
.c54cm_on/.c54cm_off
Display Code at Selected Address
Syntax
Description
.c54cm_on
.c54cm_off
The .c54cm_on and .c54cm_off directives signify that a region of code has been converted from C54x code. The .c54cm_on and .c54cm_off directives model the C54CM status bit. The .c54cm_on directive models the C54CM status bit set to 1; it is equivalent to using the -ml command line option. The .c54cm_off directive models the C54CM status bit set to 0. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The scope of the .c54cm_on and .c54cm_off directives is static and not subject to the control flow of the assembly program. All assembly code between the .c54cm_on and
.c54cm_off directives is assembled in C54x compatibility mode.
In C54x compatibility mode, AR0 is used instead of T0 in memory operands. For example, *(AR5 + T0) is invalid in C54x compatibility mode; *(AR5 + AR0) should be used.
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Assembler Directives 89
Directives Reference
.cdecls
Syntax
Syntax
Description
90 Assembler Directives www.ti.com
Share C Headers Between C and Assembly Code
Single Line:
.cdecls [options ,] " filename " [, " filename2 " [,...]]
Multiple Lines:
.cdecls [options]
%{
/*---------------------------------------------------------------------------------*/
/* C/C++ code - Typically a list of #includes and a few defines */
/*---------------------------------------------------------------------------------*/
%}
The .cdecls directive allows programmers in mixed assembly and C/C++ environments to share C headers containing declarations and prototypes between the C and algebraic assembly code. Any legal C/C++ can be used in a .cdecls block and the C/C++ declarations cause suitable assembly to be generated automatically, allowing you to reference the C/C++ constructs in algebraic assembly code; such as calling functions, allocating space, and accessing structure members; using the equivalent assembly mechanisms. While function and variable definitions are ignored, most common C/C++ elements are converted to assembly, for instance: enumerations, (non-function-like) macros, function and variable prototypes, structures, and unions.
The .cdecls options control whether the code is treated as C or C++ code; and how the
.cdecls block and converted code are presented. Options must be separated by commas; they can appear in any order:
C
CPP
NOLIST
LIST
NOWARN
WARN
Treat the code in the .cdecls block as C source code (default).
Treat the code in the .cdecls block as C++ source code. This is the opposite of the C option.
Do not include the converted assembly code in any listing file generated for the containing assembly file (default).
Include the converted assembly code in any listing file generated for the containing assembly file. This is the opposite of the NOLIST option.
Do not emit warnings on STDERR about C/C++ constructs that cannot be converted while parsing the .cdecls source block (default).
Generate warnings on STDERR about C/C++ constructs that cannot be converted while parsing the .cdecls source block. This is the opposite of the NOWARN option.
In the single-line format, the options are followed by one or more filenames to include.
The filenames and options are separated by commas. Each file listed acts as if #include
" filename " was specified in the multiple-line format.
In the multiple-line format, the line following .cdecls must contain the opening .cdecls
block indicator %{. Everything after the %{, up to the closing block indicator %}, is treated as C/C++ source and processed. Ordinary assembler processing then resumes on the line following the closing %}.
The text within %{ and %} is passed to the C/C++ compiler to be converted into assembly language. Much of C language syntax, including function and variable definitions as well as function-like macros, is not supported and is ignored during the conversion. However, all of what traditionally appears in C header files is supported, including function and variable prototypes; structure and union declarations; non-function-like macros; enumerations; and #define ' s.
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Example
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
12
13
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15
10
11
8
9
16
17
18
19
6
7
4
5
2
3
1
1
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Directives Reference
The resulting assembly language is included in the algebraic assembly file at the point of the .cdecls directive. If the LIST option is used, the converted assembly statements are printed in the listing file.
The assembly resulting from the .cdecls directive is treated similarly to a .include file.
Therefore the .cdecls directive can be nested within a file being copied or included. The assembler limits nesting to ten levels; the host operating system may set additional restrictions. The assembler precedes the line numbers of copied files with a letter code to identify the level of copying. An A indicates the first copied file, B indicates a second copied file, etc.
The .cdecls directive can appear anywhere in an algebraic assembly source file, and can occur multiple times within a file. However, the C/C++ environment created by one
.cdecls is not inherited by a later .cdecls; the C/C++ environment starts new for each
.cdecls.
See
for more information on setting up and using the .cdecls directive with C header files.
In this example, the .cdecls directive is used call the C header.h file.
C header file:
#define WANT_ID 10
#define NAME "John\n" extern int a_variable; extern float cvt_integer(int src); struct myCstruct { int member_a; float member_b; }; enum status_enum { OK = 1, FAILED = 256, RUNNING = 0 };
Source file:
.cdecls C,LIST,"myheader.h" size: .int $sizeof(myCstruct) aoffset: .int myCstruct.member_a
boffset: .int myCstruct.member_b
okvalue: .int status_enum.OK
failval: .int status_enum.FAILED
.if $defined(WANT_ID) id .cstring NAME
.endif
Listing File:
.cdecls C,LIST,"myheader.h"
; ------------------------------------------
; Assembly Generated from C/C++ Source Code
; ------------------------------------------
; =========== MACRO DEFINITIONS ===========
.define "10",WANT_ID
.define """John\n""",NAME
; =========== TYPE DEFINITIONS =========== status_enum .enum
00000001 OK
00000100 FAILED
00000000 RUNNING
.emember 1
.emember 256
.emember 0
.endenum
myCstruct .struct 0,4
; struct size=(8 bytes|64 bits), alignment=4
00000000 member_a .field 32
; int member_a - offset 0 bytes, size (4 bytes|32 bits)
Assembler Directives 91
Copyright © 2011, Texas Instruments Incorporated
A
A
A
A
A
A
Directives Reference
A
A
24
25
26
27
20
21
22
23
00000004 member_b
00000008
.field 32
; float member_b - offset 4 bytes, size (4 bytes|32 bits)
.endstruct
; final size=(8 bytes|64 bits)
; =========== EXTERNAL FUNCTIONS ===========
.global _cvt_integer
28
29
; =========== EXTERNAL VARIABLES ===========
.global _a_variable
2 00000000 00000008 size: .int $sizeof(myCstruct)
3 00000004 00000000 aoffset: .int myCstruct.member_a
4 00000008 00000004 boffset: .int myCstruct.member_b
5 0000000c 00000001 okvalue: .int status_enum.OK
6 00000010 00000100 failval: .int status_enum.FAILED
7 .if $defined(WANT_ID)
8 00000014 0000004A id
00000015 0000006F
.cstring NAME
00000016 00000068
00000017 0000006E
00000018 0000000A
00000019 00000000
9 .endif
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.clink
Syntax
Description
Example
Directives Reference
Conditionally Leave Section Out of Object Module Output
.clink[ " section name " ]
The .clink directive enables conditional linking by telling the linker to leave a section out of the final object module output of the linker if there are no references found to any symbol in that section. The .clink directive can be applied to initialized sections.
The .clink directive applies to the current initialized section. It tells the linker to leave the section out of the final object module output of the linker if there are no references found in a linked section to any symbol defined in the specified section.
A section in which the entry point of a C program is defined cannot be marked as a conditionally linked section.
In this example, the Vars and Counts sections are set for conditional linking.
3
4
1 000000
2 ; Vars section is conditionally linked
5 000000 001A X:
6 000001 001A Y:
7 000002 001A Z:
8 000000
.sect "Vars"
.clink
.word 01Ah
.word 01Ah
.word 01Ah
.sect "Counts"
9
10
; Counts section is conditionally linked
.clink
11
12 000000 001A Xcount: .word 01Ah
13 000001 001A Ycount: .word 01Ah
14 000002 001A Zcount: .word 01Ah
15
16 000000
; By default, .text is unconditionally linked
.text
17
18
19 000000 3C00
20 000002 C000+
; Reference to symbol X cause the Vars section
; to be linked into the COFF output
MOV #0,AC0
MOV AC0,X
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Assembler Directives 93
Directives Reference
.copy/.include
Syntax
Description
Example 1 www.ti.com
Copy Source File
.copy
" filename "
.include
" filename "
The .copy and .include directives tell the assembler to read source statements from a different file. The statements that are assembled from a copy file are printed in the assembly listing. The statements that are assembled from an included file are not printed in the assembly listing, regardless of the number of .list/.nolist directives assembled.
When a .copy or .include directive is assembled, the assembler:
1. Stops assembling statements in the current source file
2. Assembles the statements in the copied/included file
3. Resumes assembling statements in the main source file, starting with the statement that follows the .copy or .include directive
The filename is a required parameter that names a source file. It is enclosed in double quotes and must follow operating system conventions.
You can specify a full pathname (for example, /320tools/file1.asm). If you do not specify a full pathname, the assembler searches for the file in:
1. The directory that contains the current source file
2. Any directories named with the --include_path assembler option
3. Any directories specified by the C55X_A_DIR environment variable
4. Any directories specified by the C55X_C_DIR environment variable
For more information about the --include_path option and C55X_A_DIR, see
For more information about C55X_C_DIR, see the TMS320C55x Optimizing C/C++
Compiler User ' s Guide.
The .copy and .include directives can be nested within a file being copied or included.
The assembler limits nesting to 32 levels; the host operating system may set additional restrictions. The assembler precedes the line numbers of copied files with a letter code to identify the level of copying. A indicates the first copied file, B indicates a second copied file, etc.
In this example, the .copy directive is used to read and assemble source statements from other files; then, the assembler resumes assembling into the current file.
The original file, copy.asm, contains a .copy statement copying the file byte.asm. When copy.asm assembles, the assembler copies byte.asm into its place in the listing (note listing below). The copy file byte.asm contains a .copy statement for a second file, word.asm.
When it encounters the .copy statement for word.asm, the assembler switches to word.asm to continue copying and assembling. Then the assembler returns to its place in byte.asm to continue copying and assembling. After completing assembly of byte.asm, the assembler returns to copy.asm to assemble its remaining statement.
copy.asm
(source file)
.data
.space 29
.copy "byte.asm"
** Back in original file
.pstring "done" byte.asm
(first copy file)
** In byte.asm
.data
.byte 32,1+ 'A'
.copy "word.asm"
** Back in byte.asm
.byte 67h + 3q word.asm
(second copy file)
** In word.asm
.data
.word 0ABCDh, 56q
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Example 2
Directives Reference
A
A
A
A
A
B
B
A
B
Listing file:
1 000000
2 000000
3 .copy
1
2 000001
3 000002 0020
000003 0042
.data
.space 29
"byte.asm"
** In byte.asm
.data
.byte 32,1+ 'A'
4
1
2 000004
3 000004 ABCD
.copy "word.asm"
* In word.asm
.data
.word 0ABCDh, 56q
000005 002E
5
5 000006 006A
** Back in byte.asm
.byte 67h + 3q
4
5
6 000007 646F
** Back in original file
.pstring "done"
000008 6E65
In this example, the .include directive is used to read and assemble source statements from other files; then, the assembler resumes assembling into the current file. The mechanism is similar to the .copy directive, except that statements are not printed in the listing file.
include.asm
(source file) byte2.asm
(first copy file) word2.asm
(second copy file)
.data
.space 29
.include "byte2.asm"
** Back in original file
.string "done"
** In byte2.asm
.data
.byte 32,1+ 'A'
.include "word2.asm"
** Back in byte2.asm
.byte 67h + 3q
** In word2.asm
.data
.word 0ABCDh, 56q
Listing file:
3
4
1 000000
2 000000
.data
.space 29
.include "byte2.asm"
5
6 000007 0064
** Back in original file
.string "done"
000008 006F
000009 006E
00000a 0065
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Assembler Directives 95
Directives Reference
.cpl_on/.cpl_off
Syntax
Description www.ti.com
Select Direct Addressing Mode
.cpl_on
.cpl_off
The .cpl_on and .cpl_off directives model the CPL status bit.
The assembler cannot track the value of the CPL status bit; you must use the assembler directives and/or command line option to model this mode for the assembler. An instruction that modifies the value of the CPL status bit should be immediately followed by the appropriate assembler directive.
The .cpl_on directive asserts that the CPL status bit is set to 1. When the .cpl_on
directive is specified before any other instructions or directives that define object code, it is equivalent to using the -mc command line option. The .cpl_off directive asserts that the CPL status bit is set to 0. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The .cpl_on and .cpl_off directives take no arguments.
In CPL mode (.cpl_on), direct memory addressing is relative to the stack pointer (SP).
The dma syntax is *SP(dma), where dma can be a constant or a link-time-known symbolic expression. The assembler encodes the value of dma into the output bits.
By default (.cpl_off), direct memory addressing (dma) is relative to the data memory local page pointer register (DP). The dma syntax is @dma, where dma can be a constant or a relocatable symbolic expression. The assembler computes the difference between dma and the value in the DP register and encodes this difference into the output bits.
The assembler cannot track the value of the DP register; however, it must assume a value for the DP in order to assemble direct memory access operands. Consequently, you must use the .dp directive to model the DP value for the assembler. Issue this directive immediately following any instruction that changes the value in the DP register.
The scope of the .cpl_on and .cpl_off directives is static and not subject to the control flow of the assembly program. All assembly code between the .cpl_on line and the
.cpl_off line is assembled in CPL mode.
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Directives Reference
.cstruct/.cunion/.endstruct/.endunion/.tag
Declare C Structure Type
Syntax
Description
[stag] .cstruct|.cunion [expr]
[mem
0
] element
[mem
1
] element
.
.
.
.
.
.
.
.
.
[expr
0
]
[expr
1
]
[mem n
] .tag stag
[mem
N
] element
[size]
[expr
[expr
.endstruct|.endunion n
N
]
] label .tag
stag
The .cstruct and .cunion directives have been added to support ease of sharing of common data structures between assembly and C code. The .cstruct and .cunion
directives can be used exactly like the existing .struct and .union directives except that they are guaranteed to perform data layout matching the layout used by the C compiler for C struct and union data types.
In particular, the .cstruct and .cunion directives force the same alignment and padding as used by the C compiler when such types are nested within compound data structures.
The .endstruct directive terminates the structure definition. The .endunion directive terminates the union definition.
The .tag directive gives structure characteristics to a label, simplifying the symbolic representation and providing the ability to define structures that contain other structures.
The .tag directive does not allocate memory. The structure tag (stag) of a .tag directive must have been previously defined.
Following are descriptions of the parameters used with the .struct, .endstruct, and .tag
directives:
• The stag is the structure's tag. Its value is associated with the beginning of the structure. If no stag is present, the assembler puts the structure members in the global symbol table with the value of their absolute offset from the top of the structure. A .stag is optional for .struct, but is required for .tag.
• The element is one of the following descriptors: .byte, .char, .double, field, .float, .half,
.int, .long, .short, .string, .ubyte, .uchar, .uhalt, .uint, .ulong, .ushort, .uword, and
.word.. All of these except .tag are typical directives that initialize memory. Following a .struct directive, these directives describe the structure element's size. They do not allocate memory. A .tag directive is a special case because stag must be used (as in the definition of stag).
• The expr is an optional expression indicating the beginning offset of the structure.
The default starting point for a structure is 0.
• The expr n/N is an optional expression for the number of elements described. This value defaults to 1. A .string element is considered to be one byte in size, and a .field
element is one bit.
• The mem n/N is an optional label for a member of the structure. This label is absolute and equates to the present offset from the beginning of the structure. A label for a structure member cannot be declared global.
• The size is an optional label for the total size of the structure.
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Directives Reference
.data
Syntax
Description
Example www.ti.com
Assemble Into the .data Section
.data
The .data directive tells the assembler to begin assembling source code into the .data
section; .data becomes the current section. The .data section is normally used to contain tables of data or preinitialized variables.
For more information about sections, see
In this example, code is assembled into the .data (word-addressable) and .text
(byte-addressable) sections.
1
2
3
4 000000
*******************************************
** Reserve space in .data.
**
*******************************************
.data
.space 0CCh 5 000000
6
7
8
9
10 000000
11
12 000000 3C00
*******************************************
** Assemble into .text.
**
*******************************************
.text
INDEX .set 0
MOV #INDEX,AC0
13
14
15
16
17 00000c
*******************************************
** Assemble into .data.
**
*******************************************
.data
18 00000d ffff Table: .word
-1 ; Assemble 16-bit
19
20 00000e 00ff
21
22
.byte
0FFh
; constant into .data
; Assemble 8-bit
; constant into .data
*******************************************
23
24
25 000002
26 000002 D600
27
28
29
30
000004 00"
31
32 00000f
** Assemble into .text.
**
*******************************************
.text
ADD Table,AC0,AC0
*******************************************
** Resume assembling into the .data
** section at address 0Fh.
**
*******************************************
.data
**
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.double/.ldouble
Syntax
Description
Example
Directives Reference
Initialize Double-Precision Floating-Point Value
.double value
1
[, ... , value n
]
.ldouble value
1
[, ... , value n
]
The .double and .ldouble directives place the IEEE double-precision floating-point representation of one or more floating-point values into the current section. Each value must be a floating-point constant or a symbol that has been equated to a floating-point constant. Each constant is converted to a floating-point value in IEEE double-precision
64-bit format. Floating-point constants are aligned on a word boundary.
Use .double and .ldouble Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of
.double and .ldouble directives in a section that includes C55x instructions leads to an invalid access to the data at execution.
Consequently, it is highly recommended that these directives be used only in data sections.
The 64-bit value is stored in the format shown in
.
Figure 4-5. Double-Precision Floating-Point Format
S E E E E E E E E E E E M M M M M M M M M M M M M M M M M M M M
31 20 0
M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M
31 0
Legend: S = sign
E = exponent (11-bit biased)
M = mantissa (52-bit fraction)
When you use .double or .ldouble in a .struct/.endstruct sequence, the directives define a member ' s size; they do not initialize memory. For more information, see the
.
This example shows the .double and .ldouble directives.
1 000000
2 000000 C520
000001 8B2A
000002 2C28
000003 0291
2 000004 407C
000005 8000
000006 0000
000007 0000
.data
.double
-1.0e25
.ldouble
456.0
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Assembler Directives 99
Directives Reference
.dp
Syntax
Description www.ti.com
Specify DP Value
.dp dp_value
The .dp directive specifies the value of the DP register. The dp_value can be a constant or a relocatable symbolic expression.
By default, direct memory addressing (dma) is relative to the data memory local page pointer register (DP). The dma syntax is @dma, where dma can be a constant or a relocatable symbolic expression. The assembler computes the difference between dma and the value in the DP register and encodes this difference into the output bits.
The assembler cannot track the value of the DP register; however, it must assume a value for the DP in order to assemble direct memory access operands. Consequently, you must use the .dp directive to model the DP value. Issue this directive immediately following any instruction that changes the value in the DP register. If the assembler is not informed of the value of the DP register, it assumes that the value is 0.
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.drlist/.drnolist
Syntax
Description
Example
Directives Reference
Control Listing of Directives
.drlist
.drnolist
Two directives enable you to control the printing of assembler directives to the listing file:
The .drlist directive enables the printing of all directives to the listing file.
The .drnolist directive suppresses the printing of the following directives to the listing file. The .drnolist directive has no affect within macros.
• .asg
• .break
• .emsg
• .eval
• .fclist
• .fcnolist
• .mlist
• .mmsg
• .mnolist
• .sslist
• .ssnolist
• .var
• .wmsg
By default, the assembler acts as if the .drlist directive had been specified.
This example shows how .drnolist inhibits the listing of the specified directives.
Source file:
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.drnolist
.asg
1, x
.loop
3
.eval
x+1, x
.endloop
1
1
Listing file:
3
4
1
2
9
10
5
6
11
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.eval
0+1, x
.eval
1+1, x
.drnolist
.loop
3
.eval
x+1, x
.endloop
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Assembler Directives 101
Directives Reference www.ti.com
.emsg/.mmsg/.wmsg
Define Messages
Syntax
Description
Example
.emsg string
.mmsg string
.wmsg string
These directives allow you to define your own error and warning messages. When you use these directives, the assembler tracks the number of errors and warnings it encounters and prints these numbers on the last line of the listing file.
The .emsg directive sends an error message to the standard output device in the same manner as the assembler. It increments the error count and prevents the assembler from producing an object file.
The .mmsg directive sends an assembly-time message to the standard output device in the same manner as the .emsg and .wmsg directives. It does not, however, set the error or warning counts, and it does not prevent the assembler from producing an object file.
The .wmsg directive sends a warning message to the standard output device in the same manner as the .emsg directive. It increments the warning count rather than the error count, however. It does not prevent the assembler from producing an object file.
In this example, the message ERROR -- MISSING PARAMETER is sent to the standard output device.
Source file:
.global PARAM
MSG_EX .macro
parm1
.if
$symlen(parm1) = 0
.emsg
"ERROR -- MISSING PARAMETER"
.else
ADD parm1,AC0,AC0
.endif
.endm
102
MSG_EX PARAM
Assembler Directives
MSG_EX
Listing file:
7
8
5
6
3
4
1
2
9
10 000000
MSG_EX
.global PARAM
.macro parm1
.if $symlen(parm1) = 0
.emsg "ERROR -- MISSING PARAMETER"
.else
ADD parm1,AC0,AC0
.endif
.endm
1
1
1
1
MSG_EX PARAM
.if $symlen(parm1) = 0
.emsg "ERROR -- MISSING PARAMETER"
.else
ADD PARAM,AC0,AC0 000000 D600
000002 00!
1 .endif
1
1
11
12 000003 MSG_EX
.if $symlen(parm1) = 0
.emsg "ERROR -- MISSING PARAMETER"
"emsg.asm", ERROR! at line 12: [***** USER ERROR ***** -]
ERROR -- MISSING PARAMETER
1
1
.else
ADD parm1,AC0,AC0
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Directives Reference
1
1 Error, No Warnings
.endif
In addition, the following messages are sent to standard output by the assembler:
"emsg.asm", ERROR! at line 12: [***** USER ERROR ***** -] ERROR -- MISSING PARAMETER
.emsg "ERROR -- MISSING PARAMETER"
1 Error, No Warnings
Errors in source - Assembler Aborted
.end
Syntax
Description
End Assembly
.end
The .end directive is optional and terminates assembly. The assembler ignores any source statements that follow a .end directive. If you use the .end directive, it must be the last source statement of a program.
This directive has the same effect as an end-of-file character. You can use .end when you are debugging and you want to stop assembling at a specific point in your code.
Example
Ending a Macro
NOTE: Do not use the .end directive to terminate a macro; use the .endm macro directive instead.
This example shows how the .end directive terminates assembly. If any source statements follow the .end directive, the assembler ignores them.
Source file:
.data
START: .space
300
TEMP .set
.bss
15
LOC1, 48h
.data
ABS AC0,AC0
ADD #TEMP,AC0,AC0
MOV AC0,LOC1
.end
.byte
4
.word
CCCh
Listing file:
1 000000
2 000000
3
4 000000
5 000000
5 000000 3200
6 000002 40F0
7 000004 C000-
8
.data
START: .space
300
TEMP .set
.bss
15
LOC1, 48h
.data
ABS AC0,AC0
ADD #TEMP,AC0,AC0
MOV AC0,LOC1
.end
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Directives Reference
.fclist/.fcnolist
Syntax
Description
Example www.ti.com
Control Listing of False Conditional Blocks
.fclist
.fcnolist
Two directives enable you to control the listing of false conditional blocks:
The .fclist directive allows the listing of false conditional blocks (conditional blocks that do not produce code).
The .fcnolist directive suppresses the listing of false conditional blocks until a .fclist
directive is encountered. With .fcnolist, only code in conditional blocks that are actually assembled appears in the listing. The .if, .elseif, .else, and .endif directives do not appear.
By default, all conditional blocks are listed; the assembler acts as if the .fclist directive had been used.
This example shows the assembly language and listing files for code with and without the conditional blocks listed.
Source file:
AAA
BBB
.set
1
.set
0
.fclist
.if
AAA
ADD #1024,AC0,AC0
.else
ADD #(1024*10),AC0,AC0
.endif
.fcnolist
.if
AAA
ADD #1024,AC0,AC0
.else
ADD #(1024*10),AC0,AC0
.endif
Listing file:
3
4
1
2
7
8
5 000000 7B04
6
9
10
11
13 000004 7B04
000006 0000
AAA
BBB
.set
1
.set
0
.fclist
.if
AAA
ADD #1024,AC0,AC0
.else
ADD #(1024*10),AC0,AC0
.endif
.fcnolist
ADD #(1024*10),AC0,AC0
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.field
Syntax
Description
Directives Reference
Initialize Field
.field value[, size in bits]
The .field directive initializes a multiple-bit field within a single word (16 bits) of memory.
This directive has two operands:
• The value is a required parameter; it is an expression that is evaluated and placed in the field. The value must be absolute.
• The size in bits is an optional parameter; it specifies a number from 1 to 32, which is the number of bits in the field. If you do not specify a size, the assembler assumes the size is 16 bits. If you specify a value that cannot fit in size in bits, the assembler truncates the value and issues a warning message. For example, .field 3,1 causes the assembler to truncate the value 3 to 1; the assembler also prints the message:
*** WARNING! line 21: W0001: Field value truncated to 1
.field
3, 1
Example
Use .field Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.field directive in a section that includes C55x instructions will lead to an invalid access to the data at execution. Consequently, it is highly recommended that these directives be used only in data sections.
Successive .field directives pack values into the specified number of bits.
You can use the .align directive to force the next .field directive to begin packing into a new word.
If you use a label, it points to the word that contains the specified field.
When you use .field in a .struct/.endstruct sequence, .field defines a member ' s size; it does not initialize memory. For more information, see the
.struct/.endstruct/.tag topic .
This example shows how fields are packed into a word. The SPC does not change until a word is filled and the next word is begun.
shows how the directives in this example affect memory.
1 000000
2
3
4
.data
************************************
** Initialize a 14-bit field.
**
************************************
.field 0ABCh, 14 5 000000 2AF0
6
7
8
9
10
11 000001 5000 L_F:
12
************************************
** Initialize a 5-bit field **
** in a new word.
**
************************************
.field 0Ah, 5
13
14
15
16
17 000001 5600 x:
18
************************************
** Initialize a 4-bit field **
** in the same word.
**
************************************
.field 0Ch, 4
19
20
21
22
23 000002 0001"
24
************************************
** 16-bit relocatable field **
** in the next word.
**
************************************
.field x
25
26
************************************
** Initialize a 32-bit field.
**
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Directives Reference
Word
(a) 0
(b) 0
1
(c) 1
(d) 1
2
(e) 3
4
27
28 000003 0000
000004 4321
************************************
.field 04321h, 32
Figure 4-6. The .field Directive
15
0 0 1 0 1 0 1 0 1 1 1 1 0 0
0 Code
.field
0ABCh,14
14-bit field
0 0 1 0 1 0 1 0 1 1 1 1 0 0 0 0 .field
00Ah,5
0 1 0 1 0
5-bit field
0 1 0 1 0 1 1 0 0
4-bit field
0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Link-time value of x
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1
.field
000Ch,4
.field
x
.field
04321,32 www.ti.com
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.float/.xfloat
Syntax
Description
Example
Directives Reference
Initialize Single-Precision Floating-Point Value
.float
value[, ... , value n
]
.xfloat value[, ... , value n
]
The .float directive places the IEEE single-precision floating-point representation of a single floating-point constant into a word in the current section. The value must be a floating-point constant or a symbol that has been equated to a floating-point constant.
Each constant is converted to a floating-point value in IEEE single-precision 32-bit format.
Floating-point constants are aligned on the long-word boundaries unless the .xfloat
directive is used. The .xfloat directive performs the same function as the .float directive but does not align the result on the long word boundary.
Use .float and .xfloat Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.float and .xfloat directives in a section that includes C55x instructions will lead to an invalid access to the data at execution. Consequently, it is highly recommended that these directives be used only in data sections.
The 32-bit value is stored exponent byte first, most significant byte of fraction second, and least significant byte of fraction third, in the format shown in
Figure 4-7. Single-Precision Floating-Point Format
S E E E E E E E E M M M M M M M M M M M M M M M M M M M M M M M
31 23 0 value = (-1) S x (1.0 + mantissa) x (2) exponent-127
Legend: S = sign (1 bit)
E = exponent (8-bit biased)
M = mantissa (23-bit fraction)
When you use .float and .xfloat in a .struct/.endstruct sequence, .float and .xfloat define a member ' s size; they do not initialize memory. For more information, see the
.
Following are examples of the .float directive:
1 000000
2 000000 E904
000001 5951
3 000002 4040
000003 0000
4 000004 42F6
000005 0000
.data
.float -1.0e25
.float 3
.float 123
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Directives Reference
.global/.def/.ref
Syntax
Description
Example www.ti.com
Identify Global Symbols
.global symbol
1
[, ... , symbol n
]
.def symbol
1
[, ... , symbol n
]
.ref symbol
1
[, ... , symbol n
]
Three directives identify global symbols that are defined externally or can be referenced externally:
The .def directive identifies a symbol that is defined in the current module and can be accessed by other files. The assembler places this symbol in the symbol table.
The .ref directive identifies a symbol that is used in the current module but is defined in another module. The linker resolves this symbol ' s definition at link time.
The .global directive acts as a .ref or a .def, as needed.
A global symbol is defined in the same manner as any other symbol; that is, it appears as a label or is defined by the .set, .equ, .bss, or .usect directive. As with all symbols, if a global symbol is defined more than once, the linker issues a multiple-definition error. The
.ref directive always creates a symbol table entry for a symbol, whether the module uses the symbol or not; .global, however, creates an entry only if the module actually uses the symbol.
A symbol can be declared global for either of two reasons:
• If the symbol is not defined in the current module (which includes macro, copy, and include files), the .global or .ref directive tells the assembler that the symbol is defined in an external module. This prevents the assembler from issuing an unresolved reference error. At link time, the linker looks for the symbol's definition in other modules.
• If the symbol is defined in the current module, the .global or .def directive declares that the symbol and its definition can be used externally by other modules. These types of references are resolved at link time.
This example shows four files. The file1.lst and file2.lst refer to each other for all symbols used; file3.lst and file4.lst are similarly related.
The file1.lst and file3.lst files are equivalent. Both files define the symbol INIT and make it available to other modules; both files use the external symbols X, Y, and Z. Also, file1.lst uses the .global directive to identify these global symbols; file3.lst uses .ref and
.def to identify the symbols.
The file2.lst and file4.lst files are equivalent. Both files define the symbols X, Y, and Z and make them available to other modules; both files use the external symbol INIT. Also, file2.lst uses the .global directive to identify these global symbols; file4.lst uses .ref and
.def to identify the symbols.
file1.lst
3
4
1
2
5 000000
6 000000 7B00
000002 5600
7 000000
10
11
8 000000 0000!
9 ;
12
;
;
; Global symbol defined in this file
.global INIT
; Global symbols defined in file2.lst
.global X, Y, Z
INIT:
ADD #86,AC0,AC0
.
.
.
.data
.word
.end
X
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file2.lst
3
4
1
2
5
6
7
8 000000
9 000000 0000!
10 ;
11
12
13
;
;
; Global symbols defined in this file
.global X, Y, Z
; Global symbol defined in file1.lst
.global INIT
X:
Y:
Z:
.set
.set
.set
.data
1
2
3
.word
INIT
.
.
.
.end
file3.lst
3
4
1
2
5 000000
6 000000 7B00
000002 5600
7 000000
10
11
8 000000 0000!
9 ;
12
;
;
; Global symbol defined in this file
.def
INIT
; Global symbols defined in file4.lst
.ref
X, Y, Z
INIT:
ADD #86,AC0,AC0
.
.
.
.data
.word
.end
X file4.lst
3
4
1
2
5
6
7
8 000000
9 000000 0000!
10 ;
11
12
13
;
;
; Global symbols defined in this file
.def
X, Y, Z
; Global symbol defined in file3.lst
.ref
INIT
X:
Y:
Z:
.set 1
.set 2
.set 3
.data
.word
INIT
.
.
.
.end
Directives Reference
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Assembler Directives 109
Directives Reference www.ti.com
.half/.short/.uhalf/.ushort
Initialize 16-Bit Integers
Syntax
Description
.half value
1
[, ... , value n
]
.short value
1
[, ... , value n
]
.uhalf value
1
[, ... , value n
]
.ushort value
1
[, ... , value n
]
The .half, .uhalf, .short, and .ushort directives place one or more values into consecutive 16-bit fields in the current section. A value can be either:
• An expression that the assembler evaluates and treats as a 16-bit signed or unsigned number
• A character string enclosed in double quotes. Each character in a string represents a separate value and is stored alone in the least significant eight bits of a 16-bit field, which is padded with 0s.
Example
Use These Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.half, .uhalf, .short, and .ushort directives in a section that includes C55x instructions will lead to an invalid access to the data at execution.
Consequently, it is highly recommended that these directives be used only in data sections.
The values can be either absolute or relocatable expressions. If an expression is relocatable, the assembler generates a relocation entry that refers to the appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
The assembler truncates values greater than 16 bits.
If you use a label with .half, .short, .uhalf, or .ushort; it points to the location where the assembler places the first initialized word.
When you use .half, .short, .uhalf, or .ushort in a .struct/.endstruct sequence, they define a member ' s size; they do not initialize memory. For more information, see the
.
In this example, the .half directive is used to place 16-bit values (10, -1, abc, and a) into memory; .short is used to place 16-bit values (8, -3, def, and b) into memory. The label
STRN has the value 106h, which is the location of the first initialized word.
1 000000
2 000000
3
4 000100 000A
000101 FFFF
000102 0061
000103 0062
000104 0063
.data
.space 100h * 16
.half 10, -1, "abc", 'a'
000105 0061
5 000106 0008 STRN .short 8, -3, "def", 'b'
000107 FFFD
000108 0064
000109 0065
00010a 0066
00010b 0062
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Directives Reference
.if/.elseif/.else/.endif
Assemble Conditional Blocks
Syntax
Description
Example
.if well-defined expression
[.elseif well-defined expression]
[.else]
.endif
Four directives provide conditional assembly:
The .if directive marks the beginning of a conditional block. The well-defined expression is a required parameter.
• If the expression evaluates to true (nonzero), the assembler assembles the code that follows the expression (up to a .elseif, .else, or .endif).
• If the expression evaluates to false (0), the assembler assembles code that follows a
.elseif (if present), .else (if present), or .endif (if no .elseif or .else is present).
The .elseif directive identifies a block of code to be assembled when the .if expression is false (0) and the .elseif expression is true (nonzero). When the .elseif expression is false, the assembler continues to the next .elseif (if present), .else (if present), or .endif
(if no .elseif or .else is present). The .elseif directive is optional in the conditional block, and more than one .elseif can be used. If an expression is false and there is no .elseif
statement, the assembler continues with the code that follows a .else (if present) or a
.endif.
The .else directive identifies a block of code that the assembler assembles when the .if
expression and all .elseif expressions are false (0). The .else directive is optional in the conditional block; if an expression is false and there is no .else statement, the assembler continues with the code that follows the .endif.
The .endif directive terminates a conditional block.
The .elseif and .else directives can be used in the same conditional assembly block, and the .elseif directive can be used more than once within a conditional assembly block.
See
for information about relational operators.
This example shows conditional assembly:
3
4
1
2
5 000000
6
7 000000 0004
8
13
14
15
16
9
10
11
12 000001 000a
17
18
19 000002 0008
20
21
22
23
24 000003 0005
25
SYM1 .set
1
SYM2 .set
2
SYM3 .set
3
SYM4 .set
4
.data
If_4: .if
SYM4 = SYM2 * SYM2
.byte
SYM4 ; Equal values
.else
.byte
SYM2 * SYM2 ; Unequal values
.endif
If_5: .if SYM1 <= 10
.byte
10 ; Less than / equal
.else
.byte
SYM1 ; Greater than
.endif
If_6: .if
SYM3 * SYM2 != SYM4 + SYM2
.byte
SYM3 * SYM2 ; Unequal value
.else
.byte
SYM4 + SYM4 ; Equal values
.endif
If_7: .if SYM1 = 2
.byte
SYM1
.elseif SYM2 + SYM3 = 5
.byte SYM2 + SYM3
.endif
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.int/.word/.uint/.uword
Initialize 16-Bit Integers
Syntax
Description
.int value
1
[, ... , value n
]
.word value
1
[, ... , value n
]
.uint value
1
[, ... , value n
]
.uword value
1
[, ... , value n
]
The .int, .uint, .word, and .uword directives place one or more values into consecutive words in the current section. Each value is placed in a 16-bit word by itself and is aligned on a word boundary. A value can be either:
• An expression that the assembler evaluates and treats as a 16-bit signed or unsigned number
• A character string enclosed in double quotes. Each character in a string represents a separate value and is stored alone in the least significant eight bits of a 16-bit field, which is padded with 0s.
Example 1
Example 2
Use These Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.int, .uint, .word, and .uword directives in a section that includes C55x instructions will lead to an invalid access to the data at execution.
Consequently, it is highly recommended that these directives be used only in data sections.
A value can be either an absolute or a relocatable expression. If an expression is relocatable, the assembler generates a relocation entry that refers to the appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
If you use a label with these directives, it points to the first word that is initialized.
When you use these directives in a .struct/.endstruct sequence, they define a member ' s size; they do not initialize memory. See the
.
In this example, the .int directive is used to initialize words.
1 000000
2 000000
3 000000
4 000080
5 000000 .text
6 000000 7600 INST: MOV #86,AC0
000002 5608
7 000007
8 000008 000A
000009 0080-
.data
.int
10, SYMPTR, -1, 35 + 'a'
00000a FFFF
00000b 0084
.data
.space 73h
.bss
PAGE, 128
.bss
SYMPTR, 3
In this example, the .word directive is used to initialize words. The symbol WordX points to the first word that is reserved.
1 000000 .data
1 000000 0C80 WORDX: .word 3200, 1 + 'AB', -0AFh, 'X'
000001 4143
000002 FF51
000003 0058
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.ivec
Syntax
Description
Example
Directives Reference
Initialize Interrupt Table Entries
[label] .ivec[address[,stack mode | configuration value]]
The .ivec directive is used to initialize an entry in the interrupt vector table.
This directive has the following operands:
• The label, if specified, will be assigned the code (byte) address associated with the directive, not the data (word) address as with other directives.
• The address specifies the address of the interrupt service routine. If an address is not specified, 0 is used.
• You can specify a stack mode only for the reset vector, which must be the first .ivec
in the interrupt vector table. The stack mode can be identified as follows:
C54X_STK
NO_RETA
USE_RETA
This value specifies the 32-bit stack needed by converted
C54x code. This is the default if no value is given for the stack mode.
This value specifies 16-bit slow return mode.
This value specifies 16-bit plus register fast return mode.
More information on the stack modes can be found in the TMS320C55x DSP CPU
Reference Guide. You can write these symbolic names in either upper or lower case.
The .ivec directive aligns the SPC on an 8-byte boundary, so that you are not forced to place an instruction between two .ivec entries. Any space added for this alignment is filled with NOP instructions.
In general, a section that contains other data defining directives (such as .word) is characterized as a data section. A data section is word-addressable and cannot contain code. A section containing the .ivec directive is characterized as a code section
(byte-addressable), and can include other instructions. Like an instruction, .ivec cannot be mixed with other data defining directives.
A section containing an .ivec directive is marked as an interrupt vector section. The linker can recognize such sections, and does not add a non-parallel NOP at the end of it, as it does for normal code sections.
This example shows the use of the .ivec directive.
.sect "vectors" ; start vectors section
.ref
start,nmi_isr,isr2 ; symbols referenced
.def
rsv,no_isr
; from other files
; symbols defined in this rsv: .ivec start,c54x_stk
; file
; C54x compatibility nmi int3
.ivec nmi_isr
.ivec
int4 .ivec no_isr
; stack mode
; standard usage
; one way to skip a vector
; better way to skip a vector
; ... and so on. Fill out all 32 vectors.
int31 .ivec no_isr
.text
no_isr B no_isr
; last vector
; change to text section
; default ISR
Note the difference between int3 and int4. If the int3 vector is raised, the example branches to 0, with unpredictable results. However, if the int4 vector is raised, the example branches to the no_isr spin loop, which generates predictable results.
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Directives Reference
.label
Syntax
Description
Example www.ti.com
Create a Load-Time Address Label
.label symbol
The .label directive defines a special symbol that refers to the load-time address rather than the run-time address within the current section. Most sections created by the assembler have relocatable addresses. The assembler assembles each section as if it started at 0, and the linker relocates it to the address at which it loads and runs.
For some applications, it is desirable to have a section load at one address and run at a
different address. For example, you may want to load a block of performance-critical code into slower memory to save space and then move the code to high-speed memory to run it. Such a section is assigned two addresses at link time: a load address and a run address. All labels defined in the section are relocated to refer to the run-time address so that references to the section (such as branches) are correct when the code runs.
The .label directive creates a special label that refers to the load-time address. This function is useful primarily to designate where the section was loaded for purposes of the code that relocates the section.
This example shows the use of a load-time address label.
sect ".examp"
.label examp_load ; load address of section start: ; run address of section finish:
<code>
; run address of section end
.label examp_end ; load address of section end
See
for more information about assigning run-time and load-time addresses in the linker.
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.length/.width
Syntax
Description
Example
Directives Reference
Set Listing Page Size
.length [page length]
.width [page width]
Two directives allow you to control the size of the output listing file.
The .length directive sets the page length of the output listing file. It affects the current and following pages. You can reset the page length with another .length directive.
• Default length: 60 lines. If you do not use the .length directive or if you use the
.length directive without specifying the page length, the output listing length defaults to 60 lines.
• Minimum length: 1 line
• Maximum length: 32 767 lines
The .width directive sets the page width of the output listing file. It affects the next line assembled and the lines following. You can reset the page width with another .width
directive.
• Default width: 132 characters. If you do not use the .width directive or if you use the
.width directive without specifying a page width, the output listing width defaults to
132 characters.
• Minimum width: 80 characters
• Maximum width: 200 characters
The width refers to a full line in a listing file; the line counter value, SPC value, and object code are counted as part of the width of a line. Comments and other portions of a source statement that extend beyond the page width are truncated in the listing.
The assembler does not list the .width and .length directives.
The following example shows how to change the page length and width.
********************************************
** Page length = 65 lines **
** Page width = 85 characters **
********************************************
.length
.width
65
85
********************************************
** Page length = 55 lines **
** Page width = 100 characters **
********************************************
.length
.width
55
100
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Directives Reference
.list/.nolist
Syntax
Description
Example www.ti.com
Start/Stop Source Listing
.list
.nolist
Two directives enable you to control the printing of the source listing:
The .list directive allows the printing of the source listing.
The .nolist directive suppresses the source listing output until a .list directive is encountered. The .nolist directive can be used to reduce assembly time and the source listing size. It can be used in macro definitions to suppress the listing of the macro expansion.
The assembler does not print the .list or .nolist directives or the source statements that appear after a .nolist directive. However, it continues to increment the line counter. You can nest the .list/.nolist directives; each .nolist needs a matching .list to restore the listing.
By default, the source listing is printed to the listing file; the assembler acts as if the .list
directive had been used. However, if you do not request a listing file when you invoke the assembler by including the --asm_listing option on the command line (see
), the assembler ignores the .list directive.
This example shows how the .copy directive inserts source statements from another file.
The first time this directive is encountered, the assembler lists the copied source lines in the listing file. The second time this directive is encountered, the assembler does not list the copied source lines, because a .nolist directive was assembled. The .nolist, the second .copy, and the .list directives do not appear in the listing file. The line counter is incremented, even when source statements are not listed.
Source file:
.copy "copy2.asm"
* Back in original file
NOP
.nolist
.copy "copy2.asm"
.list
* Back in original file
.string "Done"
.localalign
A
A
A
Listing file:
1
1
2 000000
3 000000 0020
4 000001 0042
2
3 000000
4 000000 90
9
10 000004
11 000004 0044
000005 006F
000006 006E
000007 0065
.copy "copy2.asm"
* In copy2.asm (copy file)
.data
.word 32, 1 + 'A'
* Back in original file
.text
NOP
* Back in original file
.data
.string "Done"
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Directives Reference
.localalign
Create a Load-Time Address Label
Syntax
Description
Example 1
.localalign
The assembler directive .localalign, meant to be placed right before a localrepeat instruction, causes the first instruction in the body of the loop to be aligned to a 4-byte alignment, which allows the maximum localrepeat loop size. It operates by inserting enough single-cycle NOP instructions to get the alignment correct. It also causes a
4-byte alignment to be applied to the current section so the linker honors the necessary alignment for that loop body. It takes no parameters.
This example shows the behavior of a localrepeat loop without the .localalign directive.
main: nop nop nop localrepeat {
AC1 = #5
AC2 = AC1 }
The above source code produces this output:
1 000000 20 main: nop
2 000001 20 nop
3 000002 20
4 000003 4A82 nop localrepeat {
5 000005 3C51
6 000007 2212
AC1 = #5
AC2 = AC1 }
Example 2 This example shows the source code from Example 1 after .localalign is added.
main: nop nop nop
.localalign
localrepeat { ac1 = #5 ac2 = ac1 }
This example produces an aligned loop body before the localrepeat on line 5, causing the loop body beginning at line 6 to now be 4-byte aligned; its address went from 0x5 to
0x8:
1 000000 20
2 000001 20
3 000002 20
4
5 000006 4A82
6 000008 3C51
7 00000a 2212 main: nop nop nop
.localalign
localrepeat {
AC1 = #5
AC2 = AC1 }
A disassembly shows how NOPs were inserted:
TEXT Section .text, 0xC bytes at 0x0
000000: 20 NOP
000001: 20
000002: 20
NOP
NOP
000003: 5e80_21
000006: 4a82
000008: 3c51
00000a: 2212
NOP_16 || NOP
RPTBLOCAL 0xa
MOV #5,AC1
MOV AC1,AC2
By aligning the loop using the .localalign directive (or even by hand), the localrepeat loops can achieve maximum size. Without this alignment, the loops may need to be several bytes shorter due to how the instruction buffer queue (IBQ) on the C55x processor is loaded.
While the directive can be used with short loops, .localalign really only needs to be used on localrepeat loops that are near the limit of the localrepeat size.
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.lock_on/.lock_off
Enable read-modify-write Instruction Range
Syntax
Description
.lock_on
.lock_off
The .lock_on and .lock_off directives identify a range for use with read-modify-write instructions. Within this range, the lock() qualifier can be used with any read-modify-write instruction. If a lock() qualifier is not used with a read-modify-write instruction that exists in a .lock_on block, then the assembler will issue a remark diagnostic stating that the operation is not guaranteed to be atomic. Outside of the range of the .lock_on and
.lock_off directives, the lock() qualifier is illegal and read-write-modify instructions are not flagged.
These directives are intended to be placed around a critical region of code where atomic access to a memory location must be guaranteed.
By default, the assembler treats all code as being outside of a .lock_on/.lock_off range.
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Directives Reference
.long/.ulong/.xlong
Initialize 32-Bit Integer
Syntax
Description
.long value
1
[, ... , value n
]
.ulong value
1
[, ... , value n
]
.xlong value
1
[, ... , value n
]
The .long, .ulong, and .xlong directives place one or more 32-bit values into consecutive words in the current section. The most significant word is stored first. The
.long and .ulong directives align the result on the long word boundary, while the .xlong
directive does not. A value can be:
• An expression that the assembler evaluates and treats as a 32-bit signed or unsigned number
• A character string enclosed in double quotes. Each character in a string represents a separate value.
Example
Use These Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.long, .ulong, and .xlong directives in a section that includes C55x instructions will lead to an invalid access to the data at execution.
Consequently, it is highly recommended that these directives be used only in data sections.
A value can be either an absolute or a relocatable expression. If an expression is relocatable, the assembler generates a relocation entry that refers to the appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
If you use a label with these directives, it points to the first word that is initialized.
When you use .long, .ulong, or .xlong directives in a .struct/.endstruct sequence, they define a member ' s size; they do not initialize memory. See the
This example shows how the .long and .xlong directives initialize double words.
1 000000 .data
2 000000 0000 DAT1: .long
0ABCDh, 'A' + 100h, 'g', 'o'
000001 ABCD
000002 0000
000003 0141
000004 0000
000005 0067
000006 0000
000007 006F
3 000008 0000
000009 0000"
00000a AABB
00000b CCDD
4 00000c DAT2:
.xlong DAT1, 0AABBCCDDh
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.loop/.endloop/.break
Assemble Code Block Repeatedly
Syntax
Description
Example
.loop [well-defined expression]
.break [well-defined expression]
.endloop
Three directives allow you to repeatedly assemble a block of code:
The .loop directive begins a repeatable block of code. The optional expression evaluates to the loop count (the number of loops to be performed). If there is no
well-defined expression, the loop count defaults to 1024, unless the assembler first encounters a .break directive with an expression that is true (nonzero) or omitted.
The .break directive, along with its expression, is optional. This means that when you use the .loop construct, you do not have to use the .break construct. The .break directive terminates a repeatable block of code only if the well-defined expression is true
(nonzero) or omitted, and the assembler breaks the loop and assembles the code after the .endloop directive. If the expression is false (evaluates to 0), the loop continues.
The .endloop directive terminates a repeatable block of code; it executes when the
.break directive is true (nonzero) or when the number of loops performed equals the loop count given by .loop.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
This example illustrates how these directives can be used with the .eval directive. The code in the first six lines following .data expands to the code immediately following those six lines.
5
6
7
3
4
1 000000
2
000000 0000
000001 0064
000002 00C8
000003 012C
000004 0190
000005 01F4
.data
.eval
LAB_1 .loop
.word
.eval
.break
.endloop
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
0,x x*100 x+1, x x = 6
0*100
0+1, x
1 = 6
1*100
1+1, x
2 = 6
2*100
2+1, x
3 = 6
3*100
3+1, x
4 = 6
4*100
4+1, x
5 = 6
5*100
5+1, x
6 = 6
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.macro/.endm
Syntax
Description
Directives Reference
Define Macro
macname .macro [parameter
1
[, ... , parameter n
]] model statements or macro directives
.endm
The .macro and .endm directives are used to define macros.
You can define a macro anywhere in your program, but you must define the macro before you can use it. Macros can be defined at the beginning of a source file, in an
.include/.copy file, or in a macro library.
macname
.macro
[parameters] model statements macro directives
.endm
names the macro. You must place the name in the source statement ' s label field.
identifies the source statement as the first line of a macro definition. You must place .macro in the opcode field.
are optional substitution symbols that appear as operands for the
.macro directive.
are instructions or assembler directives that are executed each time the macro is called.
are used to control macro expansion.
marks the end of the macro definition.
Macros are explained in further detail in
.
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Directives Reference
.mlib
Syntax
Description
Example www.ti.com
Define Macro Library
.mlib
" filename "
The .mlib directive provides the assembler with the filename of a macro library. A macro library is a collection of files that contain macro definitions. The macro definition files are bound into a single file (called a library or archive) by the archiver.
Each file in a macro library contains one macro definition that corresponds to the name of the file. The filename of a macro library member must be the same as the macro name, and its extension must be .asm. The filename must follow host operating system conventions; it can be enclosed in double quotes. You can specify a full pathname (for example, c:\320tools\macs.lib). If you do not specify a full pathname, the assembler searches for the file in the following locations in the order given:
1. The directory that contains the current source file
2. Any directories named with the --include_path assembler option
3. Any directories specified by the C55X_A_DIR environment variable
4. Any directories specified by the C55X_C_DIR environment variable
See
for more information about the --include_path option.
When the assembler encounters a .mlib directive, it opens the library specified by the
filename and creates a table of the library ' s contents. The assembler enters the names of the individual library members into the opcode table as library entries. This redefines any existing opcodes or macros that have the same name. If one of these macros is called, the assembler extracts the entry from the library and loads it into the macro table.
The assembler expands the library entry in the same way it expands other macros, but it does not place the source code into the listing. Only macros that are actually called from the library are extracted, and they are extracted only once.
See
for more information on macros and macro libraries.
The code creates a macro library that defines two macros, incr.asm and decr.asm. The file incr.asm contains the definition of incr and decr.asm contains the definition of decr.
incr.asm
decr.asm
* Macro for incrementing inc1 .macro A
ADD #1,AC0,AC0
ADD #1,AC1,AC1
ADD #1,AC2,AC2
ADD #1,AC3,AC3
.endm
* Macro for decrementing dec1 .macro A
SUB #1,AC0,AC0
SUB #1,AC1,AC1
SUB #1,AC2,AC2
SUB #1,AC3,AC3
.endm
Use the archiver to create a macro library: ar55 -a mac incr.asm decr.asm
1
1
1
1
1
1
1
1
Now you can use the .mlib directive to reference the macro library and define the incr.asm and decr.asm macros:
1
2 000000
000000 4010
000002 4011
000004 4012
000006 4013
3 000008
000008 4210
00000a 4211
00000c 4212
00000e 4213
.mlib
"mac.lib" incr
ADD #1,AC0,AC0
ADD #1,AC1,AC1
ADD #1,AC2,AC2
ADD #2,AC3,AC3 decr
SUB #1,AC0,AC0
SUB #1,AC1,AC1
SUB #1,AC2,AC2
SUB #1,AC3,AC3
; Macro call
; Macro call
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.mlist/.mnolist
Syntax
Description
Example
Directives Reference
Start/Stop Macro Expansion Listing
.mlist
.mnolist
Two directives enable you to control the listing of macro and repeatable block expansions in the listing file:
The .mlist directive allows macro and .loop/.endloop block expansions in the listing file.
The .mnolist directive suppresses macro and .loop/.endloop block expansions in the listing file.
By default, the assembler behaves as if the .mlist directive had been specified.
See
for more information on macros and macro libraries. See the
for information on conditional blocks.
1
1
1
1
This example defines a macro named STR_3. The first time the macro is called, the macro expansion is listed (by default). The second time the macro is called, the macro expansion is not listed, because a .mnolist directive was assembled. The third time the macro is called, the macro expansion is again listed because a .mlist directive was assembled.
3
4
1
2
5
6 000000
000000
000000 003A
000001 0070
000002 0031
000003 003A
000004 003A
000005 0070
000006 0032
000007 003A
000008 003A
000009 0070
00000a 0033
00000b 003A
7
8 00000c
9
10 000018
000018
000018 003A
000019 0070
00001a 0031
00001b 003A
00001c 003A
00001d 0070
00001e 0032
00001f 003A
000020 003A
000021 0070
000022 0033
000023 003A
STR_3 .macro P1, P2, P3
.data
.string ":p1:", ":p2:", ":p3:"
.endm
STR_3 "as", "I", "am"
.data
.string ":p1:", ":p2:", ":p3:"
.mnolist
STR_3 "as", "I", "am"
.mlist
STR_3 "as", "I", "am"
.data
.string ":p1:", ":p2:", ":p3:"
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Directives Reference
.newblock
Syntax
Description
Example www.ti.com
Terminate Local Symbol Block
.newblock
The .newblock directive undefines any local labels currently defined. Local labels, by nature, are temporary; the .newblock directive resets them and terminates their scope.
A local label is a label in the form $n, where n is a single decimal digit, or name?, where
name is a legal symbol name. Unlike other labels, local labels are intended to be used locally, cannot be used in expressions, and do not qualify for branch expansion if used with a branch. They can be used only as operands in 8-bit jump instructions. Local labels are not included in the symbol table.
After a local label has been defined and (perhaps) used, you should use the .newblock
directive to reset it. The .text, .data, and .sect directives also reset local labels. Local labels that are defined within an include file are not valid outside of the include file.
See
for more information on the use of local labels.
This example shows how the local label $1 is declared, reset, and then declared again.
1
2
5 000002 7C00
000004 7600
.ref
ADDRA, ADDRB, ADDRC foo .set
76h
3
4 000000 A000! LABEL1: MOV ADDRA,AC0
SUB #foo,AC0
6 000006 62200
7 000008 A000!
8 00000a 4A02
9
BCC $1,AC0 < #0
MOV ADDRB,AC0
B $2
MOV ADDRA,AC0
ADD ADDRC,AC0,AC0
10 00000c A000! $1
11 000003 D600 $2
000010 00!
12
13 000011 6120
14 000013 C000!
15 000015 20 $1
.newblock
; Undefine $1 to reuse
BCC $1,AC0 < #0
MOV AC0,ADDRC
NOP
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Directives Reference
.noremark/.remark
Control Remarks
Syntax
Description
Example
.noremark num
.remark [num]
The .noremark directive suppresses the assembler remark identified by num. A remark is an informational assembler message that is less severe than a warning. For a description of remarks, see
This directive is equivalent to using the -ar[num] assembler option.
The .remark directive re-enables the remark(s) previously suppressed.
This example shows how to suppress the R5002 remark:
Original listing file:
1 000000 20 RSBX CMPT
"file.asm", REMARK at line 1: [R5002] Ignoring RSBX CMPT instruction
2
3 000001 4804 RETF
"file.asm", REMARK at line 3: [R5004] Translation of RETF correct only for non-interrupt routine
Listing file with .noremark:
1
2 000000 20
.noremark 5002
RSBX CMPT
3
4 000001 4804 RETF
"file.asm", REMARK at line 4: [R5004] Translation of RETF correct only for non-interrupt routine
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.option
Syntax
Description
M
N
O
R
B
D
H
L
T
W
X
Select Listing Options
.option option
1
[, option
2
,. . .]
The .option directive selects options for the assembler output listing. The options must be separated by commas; each option selects a listing feature. These are valid options:
A turns on listing of all directives and data, and subsequent expansions, macros, and blocks.
limits the listing of .byte and .char directives to one line.
turns off the listing of certain directives (same effect as .drnolist).
limits the listing of .half and .short directives to one line.
limits the listing of .long directives to one line.
turns off macro expansions in the listing.
turns off listing (performs .nolist).
turns on listing (performs .list).
resets any B, M, T, and W (turns off the limits of B, M, T, and W).
limits the listing of .string directives to one line.
limits the listing of .word and .int directives to one line.
produces a cross-reference listing of symbols. You can also obtain a cross-reference listing by invoking the assembler with the --cross_reference option (see
Example
126 Assembler Directives
Options are not case sensitive.
This example shows how to limit the listings of the .byte, long, .word, and .string
directives to one line each.
3
4
1
2
****************************************
** Limit the listing of .byte, .long, **
** .word, and .string directives
** to 1 line each.
**
**
5
6
7 000000
8 000000 00BD
****************************************
.option B, W, L, T
.data
.byte
-'C', 0B0h, 5
9 000004 AABB
10 000008 15AA
11 00000a 0045
12
13
14
15
16 .option R
.long
.word
0AABBCCDDh, 536 + 'A'
5546, 78h
.string "Extended Registers"
****************************************
** Reset the listing options.
**
****************************************
.byte
-'C', 0B0h, 5 17 00001c FFBD
00001d 00B0
00001e 0005
18 000020 AABB
000021 CCDD
000022 0000
000023 0259
19 000024 15AA
.long
.word
0AABBCCDDh, 536 + 'A'
5546, 78h
000025 0078
20 000026 0045
000027 0078
000028 0074
000029 0065
00002a 006E
00002b 0064
00002c 0065
.string "Extended Registers"
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.page
Syntax
Description
Example
Directives Reference
00002d 0064
00002e 0020
00002f 0052
000030 0065
000031 0067
000032 0069
000033 0073
000034 0074
000035 0065
000036 0072
000037 0073
Eject Page in Listing
.page
The .page directive produces a page eject in the listing file. The .page directive is not printed in the source listing, but the assembler increments the line counter when it encounters the .page directive. Using the .page directive to divide the source listing into logical divisions improves program readability.
This example shows how the .page directive causes the assembler to begin a new page of the source listing.
Source file:
;
;
Source file (generic)
.title
"**** Page Directive Example ****"
;
.
.
.
.page
Listing file:
TMS320C55x Assembler Version x.xx
Day Time
Copyright (c) 1996-2011 Texas Instruments Incorporated
**** Page Directive Example ****
Year
PAGE 1
2
3
;
;
4
TMS320C55x Assembler
;
Version x.xx
.
Day Time
Copyright (c) 1996-2011 Texas Instruments Incorporated
**** Page Directive Example ****
.
.
Year
PAGE 2
No Errors, No Warnings
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Directives Reference www.ti.com
.port_for_speed/.port_for_size
Encode C54x Instructions for Speed or Size
Syntax
Description
.port_for_speed
.port_for_size
The .port_for_speed and .port_for_size directives affect the way the assembler encodes certain C54x instructions when ported to C55x. By default, masm55 tries to encode C54x instructions to achieve small code size (.port_for_size). Use
.port_for_speed, or the − mh assembler option, to allow the assembler to generate a faster encoding. For more information, see
The .port_for_size directive models the default encoding of the assembler.
The .port_for_speed directive models the effect of the -mh assembler option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
Consider using .port_for_speed just before a critical loop. After the loop, use
.port_for_size to return to the default encoding.
.sblock
Syntax
Description
Example
Specify Blocking for an Initialized Section
.sblock[ " ]section name[ " ][,[ " ]section name[ " ],...
The .sblock directive designates sections for blocking. Blocking is an address alignment mechanism similar to page alignment, but weaker. In a code section, blocked code is guaranteed not to cross a 128-byte boundary if it is smaller than 128 bytes, or to start on a 128-byte boundary if it is larger than 128 bytes. In a data section, blocked code is guaranteed not to cross a 128-word (page) boundary if it is smaller than a page, or to start on a page boundary if it is larger than a page. This directive allows specification of blocking for initialized sections only, not for uninitialized sections declared with .usect or the .bss directives. The section names may optionally be enclosed in quotation marks.
This example designates the .text and .data sections for blocking.
1 ****************************************
2 ** Specify blocking for the .text
**
3 ** and .data sections.
**
4 ****************************************
5 .sblock
.text, .data
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.sect
Syntax
Description
Example
Directives Reference
Assemble Into Named Section
.sect
" section name "
The .sect directive defines a named section that can be used like the default .text and
.data sections. The .sect directive tells the assembler to begin assembling source code into the named section.
The section name identifies the section. The section name must be enclosed in double quotes. A section name can contain a subsection name in the form section name :
subsection name.
See
for more information about sections.
This example defines a special-purpose section named Vars and assembles code into it.
1
2
3
4 000000
5 000000 7600
000002 7808
**********************************************
** Begin assembling into .text section.
**
**********************************************
.text
MOV #120,AC0 ; Assembled into .text
7
8
6 000004 7B00
000006 3600
ADD #54,AC0 ; Assembled into .text
**********************************************
** Begin assembling into Vars section.
**
9
10 000000
11
12
**********************************************
.sect
"Vars"
WORD_LEN .set
DWORD_LEN .set
16
WORD_LEN * 2
13
14 000000 000E
15
16
BYTE_LEN .set
.byte
WORD_LEN / 2
14
**********************************************
** Resume assembling into .text section.
**
17
18 000008
19 000008 7B00
00000a 4200
**********************************************
.text
ADD #66,AC0 ; Assembled into .text
20
21
22
23 000001
**********************************************
** Resume assembling into Vars section.
**
**********************************************
.sect
"Vars"
24 000001 000D
25 000002 0A00
26 000003 0000
000004 0008
27
.field
13, WORD_LEN
.field
0Ah, BYTE_LEN
.field
10q, DWORD_LEN
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Directives Reference
.set/.equ
Syntax
Description
Example www.ti.com
Define Assembly-Time Constant
symbol .set value
symbol .equ value
The .set and .equ directives equate a constant value to a symbol. The symbol can then be used in place of a value in assembly source. This allows you to equate meaningful names with constants and other values. The .set and .equ directives are identical and can be used interchangeably.
• The symbol is a label that must appear in the label field.
• The value must be a well-defined expression, that is, all symbols in the expression must be previously defined in the current source module.
Undefined external symbols and symbols that are defined later in the module cannot be used in the expression. If the expression is relocatable, the symbol to which it is assigned is also relocatable.
The value of the expression appears in the object field of the listing. This value is not part of the actual object code and is not written to the output file.
Symbols defined with .set or .equ can be made externally visible with the .def or .global
directive (see the
.global/.def/.ref topic ). In this way, you can define global absolute
constants.
This example shows how symbols can be assigned with .set and .equ.
3
4
1
2
5
6 000000 7B00
000002 3500
**********************************************
** Set symbol index to an integer expr.
**
** and use it as an immediate operand.
**
**********************************************
INDEX .equ
100/2 +3
ADD #INDEX,AC0,AC0
16
17
18
19
7
8
9
10
11
12 000000
**********************************************
** Set symbol SYMTAB to a relocatable expr. **
** and use it as a relocatable operand.
**
**********************************************
.data
13 000000 000A LABEL .word
10
14
15
SYMTAB .set
LABEL + 1
20
21 000001 0035
**********************************************
**
**
Set symbol NSYMS equal to the symbol
INDEX and use it as you would INDEX.
**
**
**********************************************
NSYMS .set
.word
INDEX
NSYMS
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.space
Syntax
Description
Example
Directives Reference
Reserve Space
[label] .space size in bits
The .space directive reserves the number of bits given by size in bits in the current section and fill them with 0s. The section program counter is incremented to point to the word following the reserved space.
When you use a label with the .space directive, it points to the first word reserved.
Use the .space Directive in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.space directive in a section that includes C55x instructions will lead to an invalid access to the data at execution. Consequently, it is highly recommended that this directive be used only in data sections.
This example shows how memory is reserved with the .space directive.
1
2
3
4 000000
5 000000 0049
000001 006E
*********************************************
** Begin assembling into .data section.
**
*********************************************
.data
.string "In .data"
000002 0020
000003 002E
000004 0064
000005 0061
8
9
6
7
000006 0074
000007 0061
*********************************************
** Reserve 100 bits in the .data section; **
10
11 000008
12 00000f 000F
13 000010 0008"
14
** RES_1 points to the first word that **
** contains reserved bits.
**
*********************************************
RES_1: .space 100
.word 15
.word RES_1
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Directives Reference
.sslist/.ssnolist
Syntax
Description
Example www.ti.com
Control Listing of Substitution Symbols
.sslist
.ssnolist
Two directives allow you to control substitution symbol expansion in the listing file:
The .sslist directive allows substitution symbol expansion in the listing file. The expanded line appears below the actual source line.
The .ssnolist directive suppresses substitution symbol expansion in the listing file.
By default, all substitution symbol expansion in the listing file is suppressed; the assembler acts as if the .ssnolist directive had been used.
Lines with the pound (#) character denote expanded substitution symbols.
This example shows code that, by default, suppresses the listing of substitution symbol expansion, and it shows the .sslist directive assembled, instructing the assembler to list substitution symbol code expansion.
1
1
1
#
1
#
1
#
Mnemonic assembly
1
7
8
5
6
1 000000
2 000001
3 000002
4 000003
9
10
11 000000C083
12 000002
000002A000-
000004D600
00000600-
000007C000-
13
14
15
16 000009C083
17 00000bC003
18
19 00000d
00000dA000-
00000fD600
.bss
ADDRX, 1
.bss
ADDRY, 1
.bss
ADDRA, 1
.bss
ADDRB, 1
ADD2 .macro ADDRA, ADDRB
MOV ADDRA,AC0
ADD ADDRB,AC0,AC0
MOV AC0,ADDRB
.endm
MOV AC0,*AR4+
ADD2
MOV ADDRX,AC0
ADD ADDRY,AC0,AC0
MOV AC0,ADDRY
.sslist
MOV AC0,*AR4+
MOV AC0,*AR0+
ADD2
ADDRX, ADDRY
ADDRX, ADDRY
MOV ADDRA,AC0
MOV ADDRX,AC0
ADD ADDRB,AC0,AC0
ADD ADDRY,AC0,AC0
00001100-
000012C000MOV AC0,ADDRB
MOV AC0,ADDRY
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1
1
1
#
1
#
1
#
Algebraic assembly
1
7
8
5
6
1 000000
2 000001
3 000002
4 000003
9
10
11 000000C083
12 000002
000002A000-
000004D600
00000600-
000007C000-
13
14
15
16 000009C083
17 00000bC003
18
19 00000d
00000dA000-
00000fD600
.bss ADDRX, 1
.bss ADDRY, 1
.bss ADDRA, 1
.bss ADDRB, 1
ADD2 .macro ADDRA, ADDRB
AC0 = @(ADDRA)
AC0 = AC0 + @(ADDRB)
@(ADDRB) = AC0
.endm
*AR4+ = AC0
ADD2
AC0 = @(ADDRX)
AC0 = AC0 + @(ADDRY)
@(ADDRY) = AC0
.sslist
*AR4+ = AC0
*AR0+ = AC0
ADD2
ADDRX, ADDRY
ADDRX, ADDRY
AC0 = @(ADDRA)
AC0 = @(ADDRX)
AC0 = AC0 + @(ADDRB)
AC0 = AC0 + @(ADDRY)
00001100-
000012C000@(ADDRB) = AC0
@(ADDRY) = AC0
Directives Reference
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Directives Reference www.ti.com
.string/.cstring/.pstring
Initialize Text
Syntax
Description
.string {expr
1
| " string
1
" } [, ... , {expr n
| " string n
" } ]
.cstring {expr
1
| " string
1
" } [, ... , {expr n
| " string n
" } ]
.pstring {expr
1
| " string
1
" } [, ... , {expr n
| " string n
" } ]
The .string, .cstring, and .pstring directives place 8-bit characters from a character string into the current section. The .string directive places 8-bit characters into consecutive words in the current section. The .pstring directive initializes data in 8-bit chunks, but packs the contents of each string into two characters per word. The expr or
string can be one of the following:
• An expression that the assembler evaluates and treats as an 8- or 16-bit signed number.
• A character string enclosed in double quotes. Each character in a string represents a separate value, and values are stored in consecutive bytes. The entire string must be enclosed in quotes.
The .cstring directive adds a NUL character needed by C; the .string directive does not add a NUL character. In addition, .cstring interprets C escapes (\\ \a \b \f \n \r \t \v
\ < octal > ).
Example
Use The .string and .pstring Directives in Data Sections
NOTE: Because code and data sections are addressed differently, the use of the
.string and .pstring directives in a section that includes C55x instructions will lead to an invalid access to the data at execution. Consequently, it is highly recommended that these directives be used only in data sections.
With .pstring, values are packed into words starting with the most significant byte of the word. Any unused space is padded with null bytes.
The assembler truncates any values that are greater than eight bits. Operands must fit on a single source statement line.
If you use a label, it points to the location of the first word that is initialized.
When you use .string, .cstring, and .pstring in a .struct/.endstruct sequence, the directive only defines a member ' s size; it does not initialize memory. For more information, see the
.struct/.endstruct/.tag topic .
In this example, 8-bit values are placed into consecutive bytes in the current section.
1 000000
2 000000 0041
000001 0042
000002 0043
.data
.string
41h, 42h, 43h, 44h
000003 0044
3 000004 0041 Str_Ptr: .string
"ABCD"
000005 0042
000006 0043
000007 0044
4 000008 4175
000009 7374
00000a 696E
00000b 486F
00000c 7573
00000d 746F
00000e 6E00
5 00000f 0030
.pstring "Austin", "Houston"
.string
36 + 12
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Directives Reference
.struct/.endstruct/.tag
Declare Structure Type
Syntax
Description
[stag] .struct
[expr]
[mem
0
]
[mem
1
]
.
.
.
element element
.
.
.
[mem n
] .tag stag
.
.
.
.
.
.
[mem
N
[size] label
]
[expr
0
]
[expr
1
]
.
.
[expr n
]
.
.
.
.
element [expr
N
]
.endstruct
.tag
stag
The .struct directive assigns symbolic offsets to the elements of a data structure definition. This allows you to group similar data elements together and let the assembler calculate the element offset. This is similar to a C structure or a Pascal record. The
.struct directive does not allocate memory; it merely creates a symbolic template that can be used repeatedly.
The .endstruct directive terminates the structure definition.
The .tag directive gives structure characteristics to a label, simplifying the symbolic representation and providing the ability to define structures that contain other structures.
The .tag directive does not allocate memory. The structure tag (stag) of a .tag directive must have been previously defined.
Following are descriptions of the parameters used with the .struct, .endstruct, and .tag
directives:
• The stag is the structure ' s tag. Its value is associated with the beginning of the structure. If no stag is present, the assembler puts the structure members in the global symbol table with the value of their absolute offset from the top of the structure. A .stag is optional for .struct, but is required for .tag.
• The expr is an optional expression indicating the beginning offset of the structure.
The default starting point for a structure is 0.
• The mem n/N is an optional label for a member of the structure. This label is absolute and equates to the present offset from the beginning of the structure. A label for a structure member cannot be declared global.
• The element is one of the following descriptors: .byte, .char, .double, field, .float, .half,
.int, .long, .short, .string, .ubyte, .uchar, .uhalt, .uint, .ulong, .ushort, .uword, .word, and .tag. All of these except .tag are typical directives that initialize memory.
Following a .struct directive, these directives describe the structure element ' s size.
They do not allocate memory. The .tag directive is a special case because stag must be used (as in the definition of stag).
• The expr n/N is an optional expression for the number of elements described. This value defaults to 1. A .string element is considered to be one byte in size, and a .field
element is one bit.
• The size is an optional label for the total size of the structure.
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Directives Reference
Example 1
Example 2
Example 3
Example 4 www.ti.com
Directives That Can Appear in a .struct/.endstruct Sequence
NOTE: The only directives that can appear in a .struct/.endstruct sequence are element descriptors, conditional assembly directives, and the .align
directive, which aligns the member offsets on word boundaries. Empty structures are illegal.
The following examples show various uses of the .struct, .tag, and .endstruct directives.
1 000000
2
3 0000
4 0001
5 0002
6 000000
7 000000 D600
000002 00-
8
9
10 000000
NOM
DEN
.data
REAL_REC .struct
.int
.int
; stag
; member1 = 0
; member2 = 1
; real_len = 2 REAL_LEN .endstruct
.text
ADD @(REAL + REAL_REC.DEN),AC0,AC0
.bss REAL, REAL_LEN
; access structure element
; allocate mem rec
15
16
17
18
11
12
13
14
.data
CPLX_REC .struct
0000 REALI
0002 IMAGI
.tag REAL_REC
.tag REAL_REC
0004 CPLX_LEN .endstruct
19 000002
20 000003
21 000003 D600
000005 00-
22 000006 C000-
23
24 000008 D600
00000a 11-
COMPLEX .tag CPLX_REC
.bss COMPLEX, CPLX_LEN
.text
MOV AC0,@(COMPLEX.REALI)
; stag
; member1 = 0
; cplx_len = 4
; assign structure attrib
ADD @(COMPLEX.REALI),AC0,AC0 ; access structure
ADD @(COMPLEX.IMAGI),AC1,AC1 ; allocate space
5
6
7
3
4
1 000000
2
0000 X
0001 Y
0002 Z
0003
.data
.struct
.int
.int
.int
.endstruct
; no stag puts mems into
; global symbol table
; create 3 dim templates
6
7
4
5
2
3
1 000000
1
8
9
10 000000
11 000000 D600
000002 00%
12 000003 187F
000005 00
13
14 000000
.data
BIT_REC .struct
0000 STREAM .string 64
0040 BIT7 .field
7
0040 BIT9
0041 BIT10
.field
9
.field
10
0042 X_INT .int
0043 BIT_LEN .endstruct
BITS .tag
.text
BIT_REC
ADD @(BITS.BIT7),AC0,AC0 ; move into acc
.bss
BITS, BIT_REC
; stag
; bits1 = 64
; bits2 = 64
; bits3 = 65
; x_int = 66
; length = 67
AND #127,AC0 ; mask off garbage bits
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.sst_on/.sst_off
Syntax
Description
Directives Reference
Specify SST Mode
.sst_on
.sst_off
The .sst_on and .sst_off directives affect the way the assembler encodes certain C54x instructions when ported to C55x. By default, masm55 assumes that the SST bit
(saturate on store) is enabled (.sst_on). The default encoding generated by the assembler works whether or not the bit is actually enabled. However, if your code does not enable the SST bit, you may want to use .sst_off, or the − mt assembler option, to allow the assembler to generate a more efficient encoding. For more information, see
The .sst_on directive models the SST status bit set to 1, the default assumption of the assembler. The .sst_off directive models the SST status bit set to 0; this is equivalent to using the -mt assembler option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The scope of the .sst_on and .sst_off directives is static and not subject to the control flow of the assembly program. All of the assembly code between the .sst_off and the
.sst_on directives is assembled with the assumption that SST is disabled.
.symdepend
Syntax
Description
Effect Symbol Linkage and Visibility
.symdepend dst symbol name[, src symbol name]
The .symdepend directive creates an artificial reference from the section defining src
symbol name to the symbol dst symbol name. This prevents the linker from removing the section containing dst symbol name if the section defining src symbol name is included in the output module. If src symbol name is not specified, a reference from the current section is created.
A global symbol is defined in the same manner as any other symbol; that is, it appears as a label or is defined by the .set, .equ, .bss, or .usect directive. As with all symbols, if a global symbol is defined more than once, the linker issues a multiple-definition error. The
.symdepend directive creates an entry only if the module actually uses the symbol.
If the symbol is defined in the current module, the .symdepend directive declares that the symbol and its definition can be used externally by other modules. These types of references are resolved at link time.
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Directives Reference
.tab
Syntax
Description
Example www.ti.com
Define Tab Size
.tab size
The .tab directive defines the tab size. Tabs encountered in the source input are translated to size character spaces in the listing. The default tab size is eight spaces.
In this example, each of the lines of code following a .tab statement consists of a single tab character followed by an NOP instruction.
Source file:
; default tab size
NOP
NOP
NOP
.tab 4
NOP
NOP
NOP
.tab 16
NOP
NOP
NOP
Listing file:
1
2 000000 20
3 000001 20
4 000002 20
5
7 000003 20
8 000004 20
9 000005 20
10
12 000006 20
13 000007 20
14 000008 20
; default tab size
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
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.text
Syntax
Description
Example
Directives Reference
Assemble Into the .text Section
.text
The .text directive tells the assembler to begin assembling into the .text section, which usually contains executable code. The section program counter is set to 0 if nothing has yet been assembled into the .text section. If code has already been assembled into the
.text section, the section program counter is restored to its previous value in the section.
The .text section is the default section. Therefore, at the beginning of an assembly, the assembler assembles code into the .text section unless you use a .data or .sect directive to specify a different section.
For more information about sections, see
This example assembles code into the .text and .data sections. The .data section contains integer constants, and the .text section contains executable code.
1
2
3
4 000000
*******************************************
** Begin assembling into .data section.
**
*******************************************
.data
5 000000 0041 START: .string "A","B","C"
000001 0042
000002 0043
6 000003 0058 END: .string "X","Y","Z"
000004 0059
000005 005a
7
8
9
10 000000
*******************************************
** Begin assembling into .text section.
**
*******************************************
.text
ADD START,AC0,AC0 11 000000 D600
000002 00"
12 000003 D600
000005 00"
ADD END,AC0,AC0
13
14
15
16 000006
17 000006 000a
000007 000b
*******************************************
** Resume assembling into .data section. **
*******************************************
.data
.byte
0Ah, 0Bh
18 000008 000c
000009 000d
19
20
.byte
0Ch, 0Dh
*******************************************
** Resume assembling into .text section. **
21
22 000006
23 000006 2201
*******************************************
.text
MOV AC0,AC1
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Directives Reference
.title
Syntax
Description
Example www.ti.com
Define Page Title
.title
" string "
The .title directive supplies a title that is printed in the heading on each listing page. The source statement itself is not printed, but the line counter is incremented.
The string is a quote-enclosed title of up to 64 characters. If you supply more than 64 characters, the assembler truncates the string and issues a warning:
*** WARNING! line x: W0001: String is too long - will be truncated
The assembler prints the title on the page that follows the directive and on subsequent pages until another .title directive is processed. If you want a title on the first page, the first source statement must contain a .title directive.
In this example, one title is printed on the first page and a different title is printed on succeeding pages.
;
;
;
Source file:
.title
"**** Fast Fourier Transforms ****"
.
.
.
.title
"**** Floating-Point Routines ****"
.page
Listing file:
TMS320C55x Assembler Version x.xx
Day Time
Copyright (c) 1996-2011 Texas Instruments Incorporated
**** Fast Fourier Transforms ****
Year
PAGE 1
2
3
;
;
4
TMS320C55x Assembler
;
Version x.xx
.
Day Time
Copyright (c) 1996-2011 Texas Instruments Incorporated
**** Floating-Point Routines ****
.
.
Year
PAGE 2
No Errors, No Warnings
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Directives Reference
.union/.endunion/.tag
Declare Union Type
Syntax
Description
[stag] .union
[expr]
[mem
0
[mem
1
.
.
.
] element [expr
0
] element [expr
1
.
.
.
.
.
.
]
]
[mem n
.
.
.
] .tag stag [expr n
.
.
.
.
.
.
]
[mem
N
] element [expr
N
]
[size] .endunion
label .tag
stag
The .union directive assigns symbolic offsets to the elements of alternate data structure definitions to be allocated in the same memory space. This enables you to define several alternate structures and then let the assembler calculate the element offset. This is similar to a C union. The .union directive does not allocate any memory; it merely creates a symbolic template that can be used repeatedly.
A .struct definition can contain a .union definition, and .structs and .unions can be nested.
The .endunion directive terminates the union definition.
The .tag directive gives structure or union characteristics to a label, simplifying the symbolic representation and providing the ability to define structures or unions that contain other structures or unions. The .tag directive does not allocate memory. The structure or union tag of a .tag directive must have been previously defined.
Following are descriptions of the parameters used with the .struct, .endstruct, and .tag
directives:
• The utag is the union ' s tag. is the union ' s tag. Its value is associated with the beginning of the union. If no utag is present, the assembler puts the union members in the global symbol table with the value of their absolute offset from the top of the union. In this case, each member must have a unique name.
• The expr is an optional expression indicating the beginning offset of the union.
Unions default to start at 0. This parameter can only be used with a top-level union. It cannot be used when defining a nested union.
• The mem n/N is an optional label for a member of the union. This label is absolute and equates to the present offset from the beginning of the union. A label for a union member cannot be declared global.
• The element is one of the following descriptors: .byte, .char, .int, .long, .word,
.double, .half, .short, .string, .float, and .field. An element can also be a complete declaration of a nested structure or union, or a structure or union declared by its tag.
Following a .union directive, these directives describe the element ' s size. They do not allocate memory.
• The expr n/N is an optional expression for the number of elements described. This value defaults to 1. A .string element is considered to be one byte in size, and a .field
element is one bit.
• The size is an optional label for the total size of the union.
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Directives Reference
Example 1
Example 2 www.ti.com
Directives That Can Appear in a .union/.endunion Sequence
NOTE: The only directives that can appear in a .union/.endunion sequence are element descriptors, structure and union tags, and conditional assembly directives. Empty structures are illegal.
These examples show unions with and without tags.
7
8
5
6
3
4
1
2 000000
9 000000
10
11
12 000000
13 000000 D600
000002 00xample
0000 ival
0000 fval
0000 sval
.global employid
.data
.union
.word
.float
.string
0002 real_len .endunion
employid
.bss
.tag
.text
employid, real_len xample
; utag
; member1 = 0
; member2 = 0
; member3 = 0
; real_len = 4
; allocate memory
ADD @(employid.fval),ADD,ADD ; access union element
5
6
7
3
4
1 000000
2
0000 x
0000 y
0000 z
0002 size_u
.data
.union
.long
.float
.word
.endunion
; utag
; member1 = long
; member2 = float
; member3 = word
; real_len = 4
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.usect
Syntax
Description
Example
Directives Reference
Reserve Uninitialized Space
symbol .usect " section name " , size in bytes[, blocking flag[, alignment] ]
The .usect directive reserves space for variables in an uninitialized, named section. This directive is similar to the .bss directive; both simply reserve space for data and that space has no contents. However, .usect defines additional sections that can be placed anywhere in memory, independently of the .bss section.
• The symbol points to the first location reserved by this invocation of the .usect
directive. The symbol corresponds to the name of the variable for which you are reserving space.
• The section name must be enclosed in double quotes. This parameter names the uninitialized section. A section name can contain a subsection name in the form
section name : subsection name.
• The size in bytes is an expression that defines the number of bytes that are reserved in section name.
• The blocking flag is an optional parameter that, if specified and nonzero, means this section will be blocked. Blocking is an address mechanism similar to alignment, but weaker. It means a section is guaranteed to not cross a page boundary (128 words) if it is smaller than a page, and to start on a page boundary if it is larger than a page.
This blocking applies to the section, not to the object declared with this instance of the .usect directive.
• The alignment is an optional parameter that ensures that the space allocated to the symbol occurs on the specified boundary. This boundary indicates the size of the slot in bytes and can be set to any power of 2.
Specifying an Alignment Flag Only
NOTE: To specify an alignment flag without a blocking flag, you must insert two commas before the alignment flag, as shown in the syntax.
Initialized sections directives (.text, .data, and .sect) end the current section and tell the assembler to begin assembling into another section. A .usect or .bss directive encountered in the current section is simply assembled, and assembly continues in the current section.
Variables that can be located contiguously in memory can be defined in the same specified section; to do so, repeat the .usect directive with the same section name and the subsequent symbol (variable name).
For more information about sections, see
This example uses the .usect directive to define two uninitialized, named sections, var1 and var2. The symbol ptr points to the first word reserved in the var1 section. The symbol array points to the first word in a block of 100 bytes reserved in var1, and dflag points to the first word in a block of 50 bytes in var1. The symbol vec points to the first word reserved in the var2 section.
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Directives Reference www.ti.com
shows how this example reserves space in two uninitialized sections, var1 and var2.
1
2
3
4 000000
7
8
5 000000 3C30
6
9
10 000000
11
12
13
14
15 000001
16
******************************************
**
**
Assemble into .text section.
******************************************
Reserve 1 word in var1.
******************************************
** Reserve 100 words in var1.
**
****************************************** array .usect "var1", 100
**
****************************************** ptr .usect "var1", 1
**
******************************************
.text
MOV #3,AC0
17 000002 7B00
000004 3700
18
19
20
21
22 000065
23
ADD #55,AC0,AC0
******************************************
** Reserve 50 words in var1.
**
****************************************** dflag .usect "var1", 50
; Still in .text
24 000006 7B06
000008 5000-
25
26
27
28
29 000000
30
ADD #dflag,AC0,AC0 ; Still in .text
******************************************
** Reserve 100 words in var2.
**
****************************************** vec .usect "var2", 100
31 00000a 7B00
00000c 0000-
32
33
34
ADD #vec,AC0,AC0 ; Still in .text
******************************************
** Declare an external .usect symbol.
**
******************************************
35 .global array ptr array
Figure 4-8. The .usect Directive
Section var1 Section var2
2 bytes ptr
100 words
100 words
100 words reserved in var2 dflag
50 words
152 words reserved in var1
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Directives Reference
.unasg/.undefine
Turn Off Substitution Symbol
Syntax
Description
.unasg symbol
.undefine symbol
The .unasg and .undefine directives remove the definition of a substitution symbol created using .asg or .define. The named symbol will removed from the substitution symbol table from the point of the .undefine or .unasg to the end of the assembly file.
See
for more information on substitution symbols.
These directives can be used to remove from the assembly environment any C/C++ macros that may cause a problem. See
for more information about using
C/C++ headers in assembly source.
.var
Syntax
Description
.vli_on/.vli_off
Syntax
Description
Use Substitution Symbols as Local Variables
.var sym
1
[, sym
2
, ... , sym n
]
The .var directive allows you to use substitution symbols as local variables within a macro. With this directive, you can define up to 32 local macro substitution symbols
(including parameters) per macro.
The .var directive creates temporary substitution symbols with the initial value of the null string. These symbols are not passed in as parameters, and they are lost after expansion.
See
for more information on substitution symbols .See
for information on macros.
Suppress Variable-Length Instruction Resolution
.vli_on
.vli_off
The .vli_on and .vli_off directives affect the way the assembler handles variable-length instructions. The .vli_off directive is equivalent to using the − atv command line option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
By default (.vli_on), the assembler attempts to resolve all stand-alone, variable-length instructions to their smallest possible size.
Size resolution is performed on the following instruction groups: goto L7, L16, P24 if (cond) goto l4 if (cond) goto L8, L16, P24 call L16, P24 if (cond) call L16, P24
In some cases, you may want the assembler to keep the largest (P24) form of certain instructions. The P24 versions of certain variable-length instructions execute in fewer cycles than the smaller version of the same instructions. Use the .vli_off directive to keep the following instructions in their largest form: goto P24 call P24
The .vli_off and .vli_on directives can be used to toggle this behavior for regions of an assembly file. All other variable-length instructions will continue to be resolved to their smallest possible size by the assembler, despite the use of the .vli_off directive.
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The scope of the .vli_off and .vli_on directives is static and not subject to the control flow of the assembly program.
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Directives Reference
.warn_on/.warn_off
Control Assembler Warning Messages
Syntax
Description
.warn_on
.warn_off
The .warn_on and .warn_off directives control the reporting of assembler warning messages. By default (.warn_on), the assembler will generate warning messages. The
.warn_off directive suppresses assembler warning messages and is equivalent to using the -mw command line option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The .warn_off and .warn_on directives can be used to toggle this behavior for regions of an assembly file.
The scope of the .warn_off and .warn_on directives is static and not subject to the control flow of the assembly program. Warnings will not be reported for any assembly code between the .warn_off and .warn_on directives within a file.
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Chapter 5
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Macro Description
The TMS320C55x assembler supports a macro language that enables you to create your own instructions. This is especially useful when a program executes a particular task several times. The macro language lets you:
• Define your own macros and redefine existing macros
• Simplify long or complicated assembly code
• Access macro libraries created with the archiver
• Define conditional and repeatable blocks within a macro
• Manipulate strings within a macro
• Control expansion listing
Topic
...........................................................................................................................
Page
5.1
Using Macros ..................................................................................................
5.2
Defining Macros ..............................................................................................
5.3
Macro Parameters/Substitution Symbols
5.4
Macro Libraries
............................................................
...............................................................................................
5.5
Using Conditional Assembly in Macros
5.6
Using Labels in Macros
..............................................................
....................................................................................
5.7
Producing Messages in Macros .........................................................................
5.8
Using Directives to Format the Output Listing
5.9
Using Recursive and Nested Macros
....................................................
..................................................................
5.10
Macro Directives Summary ...............................................................................
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5.1
Using Macros
Programs often contain routines that are executed several times. Instead of repeating the source statements for a routine, you can define the routine as a macro, then call the macro in the places where you would normally repeat the routine. This simplifies and shortens your source program.
If you want to call a macro several times but with different data each time, you can assign parameters within a macro. This enables you to pass different information to the macro each time you call it. The macro language supports a special symbol called a substitution symbol, which is used for macro parameters. See
for more information.
Using a macro is a 3-step process.
Step 1.
Define the macro. You must define macros before you can use them in your program. There are two methods for defining macros:
(a) Macros can be defined at the beginning of a source file or in a copy/include file. See
, Defining Macros, for more information.
(b) Macros can also be defined in a macro library. A macro library is a collection of files in archive format created by the archiver. Each member of the archive file (macro library) may contain one macro definition corresponding to the member name. You can access a macro library by using the .mlib directive. For more information, see
Step 2.
Call the macro. After you have defined a macro, call it by using the macro name as a mnemonic in the source program. This is referred to as a macro call.
Step 3.
Expand the macro. The assembler expands your macros when the source program calls them. During expansion, the assembler passes arguments by variable to the macro parameters, replaces the macro call statement with the macro definition, then assembles the source code. By default, the macro expansions are printed in the listing file. You can turn off expansion listing by using the .mnolist directive. For more information, see
When the assembler encounters a macro definition, it places the macro name in the opcode table. This redefines any previously defined macro, library entry, directive, or instruction mnemonic that has the same name as the macro. This allows you to expand the functions of directives and instructions, as well as to add new instructions.
5.2
Defining Macros
You can define a macro anywhere in your program, but you must define the macro before you can use it.
Macros can be defined at the beginning of a source file or in a .copy/.include file (see
); they can also be defined in a macro library. For more information about macro libraries, see
Macro definitions can be nested, and they can call other macros, but all elements of the macro must be defined in the same file. Nested macros are discussed in
A macro definition is a series of source statements in the following format: macname .macro
[parameter
1
] [, ... , parameter n
] model statements or macro directives
[.mexit]
.endm
macname
.macro
parameter parameter n
1
, names the macro. You must place the name in the source statement ' s label field.
Only the first 128 characters of a macro name are significant. The assembler places the macro name in the internal opcode table, replacing any instruction or previous macro definition with the same name.
is the directive that identifies the source statement as the first line of a macro definition. You must place .macro in the opcode field.
are optional substitution symbols that appear as operands for the .macro directive.
Parameters are discussed in
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1
1
1
1
1 www.ti.com
Defining Macros model statements are instructions or assembler directives that are executed each time the macro is called.
macro directives
.mexit
are used to control macro expansion.
is a directive that functions as a goto .endm. The .mexit directive is useful when error testing confirms that macro expansion fails and completing the rest of the macro is unnecessary.
.endm
is the directive that terminates the macro definition.
If you want to include comments with your macro definition but do not want those comments to appear in the macro expansion, use an exclamation point to precede your comments. If you do want your comments to appear in the macro expansion, use an asterisk or semicolon. See
for more information about macro comments.
and
show the definition, call, and expansion of a macro.
Example 5-1. Mnemonic Macro Definition, Call, and Expansion
7
8
5
6
3
4
1
2
13
14
15
16
9
10
11
12
17
18 000000
000000 A000!
000002 D600
000004 00!
000005 D600
000007 00!
000008 C000!
*
*
*
* add3 add3
ADDRP = P1 + P2 + P3
.macro P1, P2, P3, ADDRP
MOV P1,AC0
ADD P2,AC0,AC0
ADD P3,AC0,AC0
MOV AC0,ADDRP
.endm
.global abc, def, ghi, adr add3 abc, def, ghi, adr
MOV abc,AC0
ADD def,AC0,AC0
ADD ghi,AC0,AC0
MOV AC0,adr
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Defining Macros
Example 5-2. Algebraic Macro Definition, Call, and Expansion
1
1
1
1
1
7
8
5
6
3
4
1
2
13
14
15
16
9
10
11
12
17
18 000000
000000 A000!
000002 D600
000004 00!
000005 D600
000007 00!
000008 C000!
*
*
*
* add3 add3
ADDRP = P1 + P2 + P3
.macro P1, P2, P3, ADDRP
AC0 = @(P1)
AC0 = AC0 + @(P2)
AC0 = AC0 + @(P3)
@(ADDRP) = AC0
.endm
.global abc, def, ghi, adr add3 abc, def, ghi, adr
AC0 = @(abc)
AC0 = AC0 + @(def)
AC0 = AC0 + @(ghi)
MOV AC0,adr@(adr) = AC0 www.ti.com
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Macro Parameters/Substitution Symbols
5.3
Macro Parameters/Substitution Symbols
If you want to call a macro several times with different data each time, you can assign parameters within the macro. The macro language supports a special symbol, called a substitution symbol, which is used for macro parameters.
Macro parameters are substitution symbols that represent a character string. These symbols can also be used outside of macros to equate a character string to a symbol name (see
).
Valid substitution symbols can be up to 128 characters long and must begin with a letter. The remainder of the symbol can be a combination of alphanumeric characters, underscores, and dollar signs.
Substitution symbols used as macro parameters are local to the macro they are defined in. You can define up to 32 local substitution symbols (including substitution symbols defined with the .var directive) per macro. For more information about the .var directive, see
During macro expansion, the assembler passes arguments by variable to the macro parameters. The character-string equivalent of each argument is assigned to the corresponding parameter. Parameters without corresponding arguments are set to the null string. If the number of arguments exceeds the number of parameters, the last parameter is assigned the character-string equivalent of all remaining arguments.
If you pass a list of arguments to one parameter or if you pass a comma or semicolon to a parameter, you must surround these terms with quotation marks.
At assembly time, the assembler replaces the macro parameter/substitution symbol with its corresponding character string, then translates the source code into object code.
shows the expansion of a macro with varying numbers of arguments.
Example 5-3. Calling a Macro With Varying Numbers of Arguments
;
;
;
;
;
;
Macro definition:
.macro
;
;
Parms
;
.endm
a,b,c a = :a: b = :b: c = :c:
;
;
;
Calling the macro:
Parms 100,label a = 100 b = label c = " "
Parms 100, , x a = 100 b = " " c = x
Parms """string""",x,y a = "string" b = x c = y
Parms 100,label,x,y
; a = 100
; b = label
; c = x,y
Parms "100,200,300",x,y
; a = 100,200,300
; b = x
; c = y
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5.3.1 Directives That Define Substitution Symbols
You can manipulate substitution symbols with the .asg and .eval directives.
• The .asg directive assigns a character string to a substitution symbol.
For the .asg directive, the quotation marks are optional. If there are no quotation marks, the assembler reads characters up to the first comma and removes leading and trailing blanks. In either case, a character string is read and assigned to the substitution symbol. The syntax of the .asg directive is:
.asg[ " ]character string[ " ], substitution symbol
shows character strings being assigned to substitution symbols.
Example 5-4. The .asg Directive
.asg
AR0,FP ; frame pointer
• The .eval directive performs arithmetic on numeric substitution symbols.
The .eval directive evaluates the expression and assigns the string value of the result to the
substitution symbol. If the expression is not well defined, the assembler generates an error and assigns the null string to the symbol. The syntax of the .eval directive is:
.eval well-defined expression , substitution symbol
shows arithmetic being performed on substitution symbols.
Example 5-5. The .eval Directive
.asg
1,counter
.loop
100
.word
counter
.eval
counter + 1,counter
.endloop
In
changing the output. In simple cases like this, you can use .eval and .asg interchangeably. However, you must use .eval if you want to calculate a value from an expression. While .asg only assigns a character string to a substitution symbol, .eval evaluates an expression and then assigns the character string equivalent to a substitution symbol.
See
for more information about the .asg and .eval assembler directives.
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Macro Parameters/Substitution Symbols
5.3.2 Built-In Substitution Symbol Functions
The following built-in substitution symbol functions enable you to make decisions on the basis of the string value of substitution symbols. These functions always return a value, and they can be used in expressions. Built-in substitution symbol functions are especially useful in conditional assembly expressions. Parameters of these functions are substitution symbols or character-string constants.
In the function definitions shown in
Table 5-1 , a and b are parameters that represent substitution symbols
or character-string constants. The term string refers to the string value of the parameter. The symbol ch represents a character constant.
Table 5-1. Substitution Symbol Functions and Return Values
(1)
Function
$symlen (a)
$symcmp (a,b)
$firstch (a,ch)
$lastch (a,ch)
$isdefed (a)
$ismember (a,b)
$iscons (a)
$isname (a)
$isreg (a) (1)
Return Value
Length of string a
< 0 if a < b; 0 if a = b; > 0 if a > b
Index of the first occurrence of character constant ch in string a
Index of the last occurrence of character constant ch in string a
1 if string a is defined in the symbol table
0 if string a is not defined in the symbol table
Top member of list b is assigned to string a
0 if b is a null string
1 if string a is a binary constant
2 if string a is an octal constant
3 if string a is a hexadecimal constant
4 if string a is a character constant
5 if string a is a decimal constant
1 if string a is a valid symbol name
0 if string a is not a valid symbol name
1 if string a is a valid predefined register name
0 if string a is not a valid predefined register name
For more information about predefined register names, see
shows built-in substitution symbol functions.
Example 5-6. Using Built-In Substitution Symbol Functions
.asg
label, ADDR ; ADDR = label
.if
($symcmp(ADDR,"label") = 0) ; evaluates to true
SUB ADDR,AC0,AC0
.endif
.asg
.if
"x,y,z" , list
($ismember(ADDR,list))
SUB ADDR,AC0,AC0 ; sub x
.endif
; list = x,y,z
; addr = x, list = y,z
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5.3.3 Recursive Substitution Symbols
When the assembler encounters a substitution symbol, it attempts to substitute the corresponding character string. If that string is also a substitution symbol, the assembler performs substitution again. The assembler continues doing this until it encounters a token that is not a substitution symbol or until it encounters a substitution symbol that it has already encountered during this evaluation.
In
recognizes this as infinite recursion and ceases substitution.
Example 5-7. Recursive Substitution
.asg
"x",z
.asg
"z",y
; declare z and assign z = "x"
; declare y and assign y = "z"
.asg
"y",x ; declare x and assign x = "y"
ADD x,AC0,AC0 ; recursive expansion
5.3.4 Forced Substitution
In some cases, substitution symbols are not recognizable to the assembler. The forced substitution operator, which is a set of colons surrounding the symbol, enables you to force the substitution of a symbol's character string. Simply enclose a symbol with colons to force the substitution. Do not include any spaces between the colons and the symbol.
The syntax for the forced substitution operator is:
:symbol:
The assembler expands substitution symbols surrounded by colons before expanding other substitution symbols.
You can use the forced substitution operator only inside macros, and you cannot nest a forced substitution operator within another forced substitution operator.
shows how the forced substitution operator is used.
Example 5-8. Using the Forced Substitution Operator force .macro x
.loop
8
AUX:x: .set
x
.eval
x+1,x
.endloop
.endm
force 0
The force macro would generate the following source code:
AUX0 .set
0
AUX1 .set
1
.
.
.
AUX7 .set
7
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Macro Parameters/Substitution Symbols
5.3.5 Accessing Individual Characters of Subscripted Substitution Symbols
In a macro, you can access the individual characters (substrings) of a substitution symbol with subscripted substitution symbols. You must use the forced substitution operator for clarity.
You can access substrings in two ways:
• :symbol (well-defined expression):
This method of subscripting evaluates to a character string with one character.
• :symbol (well-defined expression
1
, well-defined expression
2
):
In this method, expression
1 represents the substring's starting position, and expression
2 represents the substring's length. You can specify exactly where to begin subscripting and the exact length of the resulting character string. The index of substring characters begins with 1, not 0.
and
show built-in substitution symbol functions used with subscripted substitution symbols.
In
Example 5-9 , subscripted substitution symbols redefine the ADD instruction so that it handles short
immediates. In
, the subscripted substitution symbol is used to find a substring strg1 beginning at position start in the string strg2. The position of the substring strg1 is assigned to the substitution symbol pos.
Example 5-9. Using Subscripted Substitution Symbols to Redefine an Instruction
ADDX .macro
ABC
.var
TMP
.asg
.if
:ABC(1):,TMP
$symcmp(TMP,"#") = 0
ADD ABC,AC0,AC0
.else
.emsg
.endif
"Bad Macro Parameter"
.endm
ADDX
ADDX
#100
*AR1
;macro call
;macro call
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Macro Parameters/Substitution Symbols
Example 5-10. Using Subscripted Substitution Symbols to Find Substrings substr .macro
.var
.if
.eval
.endif
.eval
.eval
.eval
.eval
.loop
.break
.asg
.if
.eval
.break
.else
.eval
.endif
.endloop
.endm
.asg
.asg
substr
.data
.word pos start,strg1,strg2,pos
LEN1,LEN2,I,TMP
$symlen(start) = 0
1,start
0,pos
1,i
$symlen(strg1),LEN1
$symlen(strg2),LEN2 i = (LEN2 - LEN1 + 1)
":strg2(i,LEN1):",TMP
$symcmp(strg1,TMP) = 0 i,pos i + 1,i
0,pos
"ar1 ar2 ar3 ar4",regs
1,"ar2",regs,pos www.ti.com
5.3.6 Substitution Symbols as Local Variables in Macros
If you want to use substitution symbols as local variables within a macro, you can use the .var directive to define up to 32 local macro substitution symbols (including parameters) per macro. The .var directive creates temporary substitution symbols with the initial value of the null string. These symbols are not passed in as parameters, and they are lost after expansion.
.var
sym
1
[,sym
2
, ... ,sym n
]
The .var directive is used in
and
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Macro Libraries
5.4
Macro Libraries
One way to define macros is by creating a macro library. A macro library is a collection of files that contain macro definitions. You must use the archiver to collect these files, or members, into a single file (called an archive). Each member of a macro library contains one macro definition. The files in a macro library must be unassembled source files. The macro name and the member name must be the same, and the macro filename's extension must be .asm. For example:
Macro Name simple add3
Filename in Macro Library simple.asm
add3.asm
You can access the macro library by using the .mlib assembler directive (described in
.mlib filename
When the assembler encounters the .mlib directive, it opens the library named by filename and creates a table of the library's contents. The assembler enters the names of the individual members within the library into the opcode tables as library entries; this redefines any existing opcodes or macros that have the same name. If one of these macros is called, the assembler extracts the entry from the library and loads it into the macro table.
The assembler expands the library entry in the same way it expands other macros. See
for how the assembler expands macros. You can control the listing of library entry expansions with the .mlist
directive. For more information about the .mlist directive, see
and
. Only macros that are actually called from the library are extracted, and they are extracted only once.
You can use the archiver to create a macro library by including the desired files in an archive. A macro library is no different from any other archive, except that the assembler expects the macro library to contain macro definitions. The assembler expects only macro definitions in a macro library; putting object code or miscellaneous source files into the library may produce undesirable results. For information about creating a macro library archive, see
.
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5.5
Using Conditional Assembly in Macros
The conditional assembly directives are .if/.elseif/.else/.endif and .loop/ .break/.endloop. They can be nested within each other up to 32 levels deep. The format of a conditional block is:
.if well-defined expression
[.elseif well-defined expression]
[.else]
.endif
The .elseif and .else directives are optional in conditional assembly. The .elseif directive can be used more than once within a conditional assembly code block. When .elseif and .else are omitted and when the .if expression is false (0), the assembler continues to the code following the .endif directive. See
for more information on the .if/ .elseif/.else/.endif directives.
The .loop/.break/.endloop directives enable you to assemble a code block repeatedly. The format of a repeatable block is:
.loop [well-defined expression]
[.break [well-defined expression]]
.endloop
The .loop directive's optional well-defined expression evaluates to the loop count (the number of loops to be performed). If the expression is omitted, the loop count defaults to 1024 unless the assembler encounters a .break directive with an expression that is true (nonzero). See
for more information on the .loop/.break/.endloop directives.
The .break directive and its expression are optional in repetitive assembly. If the expression evaluates to false, the loop continues. The assembler breaks the loop when the .break expression evaluates to true or when the .break expression is omitted. When the loop is broken, the assembler continues with the code after the .endloop directive.
For more information, see
, and
show the .loop/.break/ .endloop directives, properly nested conditional assembly directives, and built-in substitution symbol functions used in a conditional assembly code block.
Example 5-11. The .loop/.break/.endloop Directives
.asg
.loop
1,x
.break
(x == 10) ; if x == 10, quit loop/break with expression
.eval
x+1,x
.endloop
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Example 5-12. Nested Conditional Assembly Directives
.asg
.loop
1,x
.if
(x == 10) ; if x == 10, quit loop
.break
(x == 10) ; force break
.endif
.eval
x+1,x
.endloop
Using Conditional Assembly in Macros
Example 5-13. Built-In Substitution Symbol Functions in a Conditional Assembly Code Block
.ref OPZ
.fcnolist
*
*Double Add or Subtract
*
DB .macro ABC, ADDR, dst ; add or subtract double
.if
$symcmp(ABC,"+") == 0
ADD dbl(ADDR),dst ; add double
.elseif $symcmp(ABC,"-") == 0
SUB dbl(ADDR),dst ; subtract double
.endif
.endm
.else
.emsg "Incorrect Operator Parameter"
*Macro Call
DB -, @OPZ, AC0
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5.6
Using Labels in Macros
All labels in an assembly language program must be unique. This includes labels in macros. If a macro is expanded more than once, its labels are defined more than once. Defining a label more than once is
illegal. The macro language provides a method of defining labels in macros so that the labels are unique.
Simply follow each label with a question mark, and the assembler replaces the question mark with a period followed by a unique number. When the macro is expanded, you do not see the unique number in
the listing file. Your label appears with the question mark as it did in the macro definition. You cannot declare this label as global. The syntax for a unique label is:
label ?
1
1
1
1
1
1
1
1
and
show unique label generation in a macro. The maximum label length is shortened to allow for the unique suffix. For example, if the macro is expanded fewer than 10 times, the maximum label length is 126 characters. If the macro is expanded from 10 to 99 times, the maximum label length is 125. The label with its unique suffix is shown in the cross-listing file. To obtain a cross-listing file, invoke the assembler with the --cross_reference option (see
Example 5-14. Unique Labels in a Macro in Mnemonic Assembly
7
8
5
6
3
4
1
2
9
10
11
12
13
14 000000
; define macro
MLAB
M1?
M2?
; call macro
000000 A064
000002 7C00
000004 6400
000006 6320
000008 7600
00000a 6408
00000c 4A02
00000e A064 M1?
000010 M2?
.macro AVAR, BVAR ; find minimum
MOV AVAR,AC0
SUB #BVAR,AC0,AC0
BCC M1?,AC0 < #0
MOV #BVAR,AC0
B M2?
MOV AVAR,AC0
.endm
MLAB 50, 100
MOV 50,AC0
SUB #100,AC0,AC0
BCC M1?,AC0 < #0
MOV #100,AC0
B M2?
MOV 50,AC0
162 Macro Description
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1
1
1
1
1
1
1
1
Example 5-15. Unique Labels in a Macro in Algebraic Assembly
7
8
5
6
3
4
1
2
9
10
11
12
13
14 000000
; define macro
MLAB
M1?
M2?
; call macro
000000 A064
000002 7C00
000004 6400
000006 6320
000008 7600
00000a 6408
00000c 4A02
00000e A064 M1?
000010 M2?
.macro AVAR, BVAR ; find minimum
AC0 = @(AVAR)
AC0 = AC0 - #(BVAR) if (AC0 < #0) goto #(M1?)
AC0 = #(BVAR) goto #(M2?)
AC0 = @(AVAR)
.endm
MLAB 50, 100
AC0 = @(50)
AC0 = AC0 - #(100) if (AC0 < #0) goto #(M1?)
AC0 = #(100) goto #(M2?)
AC0 = @(50)
Using Labels in Macros
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Macro Description 163
Producing Messages in Macros www.ti.com
5.7
Producing Messages in Macros
The macro language supports three directives that enable you to define your own assembly-time error and warning messages. These directives are especially useful when you want to create messages specific to your needs. The last line of the listing file shows the error and warning counts. These counts alert you to problems in your code and are especially useful during debugging.
.emsg
.mmsg
.wmsg
sends error messages to the listing file. The .emsg directive generates errors in the same manner as the assembler, incrementing the error count and preventing the assembler from producing an object file.
sends assembly-time messages to the listing file. The .mmsg directive functions in the same manner as the .emsg directive but does not set the error count or prevent the creation of an object file.
sends warning messages to the listing file. The .wmsg directive functions in the same manner as the .emsg directive, but it increments the warning count and does not prevent the generation of an object file.
Macro comments are comments that appear in the definition of the macro but do not show up in the
expansion of the macro. An exclamation point in column 1 identifies a macro comment. If you want your comments to appear in the macro expansion, precede your comment with an asterisk or semicolon.
shows user messages in macros and macro comments that do not appear in the macro expansion.
For more information about the .emsg, .mmsg, and .wmsg assembler directives, see
Example 5-16. Producing Messages in a Macro
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
7
4
5
2
3
1
2
10
11
8
9
12
13
14
15 000000 testparam .macro x,y
.if ($symlen(x) == 0)
.emsg "ERROR -- Missing Parameter"
.mexit
.elseif ($symlen(y) == 0)
.emsg "ERROR == Missing Parameter"
.mexit
.else
MOV y,AC0
MOV x,AC0
ADD AC0,AC1
.endif
.endm
testparam 1,2
.if ($symlen(x) == 0)
.emsg "ERROR -- Missing Parameter"
.mexit
.elseif ($symlen(y) == 0)
.emsg "ERROR == Missing Parameter"
.mexit
.else
000000 A004
000002 A102
000004 2401
MOV 2,AC0
MOV 1,AC1
ADD AC0,AC1
.endif
17 000006 testparam
.if ($symlen(x) == 0)
.emsg "ERROR -- Missing Parameter"
***** USER ERROR ***** - : ERROR -- Missing Parameter
.mexit
1 Error, No Warnings
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Using Directives to Format the Output Listing
5.8
Using Directives to Format the Output Listing
Macros, substitution symbols, and conditional assembly directives may hide information. You may need to see this hidden information, so the macro language supports an expanded listing capability.
By default, the assembler shows macro expansions and false conditional blocks in the list output file. You may want to turn this listing off or on within your listing file. Four sets of directives enable you to control the listing of this information:
• Macro and loop expansion listing
.mlist
expands macros and .loop/.endloop blocks. The .mlist directive prints all code encountered in those blocks.
.mnolist
suppresses the listing of macro expansions and .loop/ .endloop blocks.
For macro and loop expansion listing, .mlist is the default.
• False conditional block listing
.fclist
causes the assembler to include in the listing file all conditional blocks that do not generate code (false conditional blocks). Conditional blocks appear in the listing exactly as they appear in the source code.
.fcnolist
suppresses the listing of false conditional blocks. Only the code in conditional blocks that actually assemble appears in the listing. The .if, .elseif, .else, and .endif directives do not appear in the listing.
For false conditional block listing, .fclist is the default.
• Substitution symbol expansion listing
.sslist
expands substitution symbols in the listing. This is useful for debugging the expansion of substitution symbols. The expanded line appears below the actual source line.
.ssnolist
turns off substitution symbol expansion in the listing.
For substitution symbol expansion listing, .ssnolist is the default.
• Directive listing
.drlist
causes the assembler to print to the listing file all directive lines.
.drnolist
suppresses the printing of certain directives in the listing file. These directives are
.asg, .eval, .var, .sslist, .mlist, .fclist, .ssnolist, .mnolist, .fcnolist, .emsg, .wmsg,
.mmsg, .length, .width, and .break.
For directive listing, .drlist is the default.
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Macro Description 165
Using Recursive and Nested Macros www.ti.com
5.9
Using Recursive and Nested Macros
The macro language supports recursive and nested macro calls. This means that you can call other macros in a macro definition. You can nest macros up to 32 levels deep. When you use recursive macros, you call a macro from its own definition (the macro calls itself).
When you create recursive or nested macros, you should pay close attention to the arguments that you pass to macro parameters because the assembler uses dynamic scoping for parameters. This means that the called macro uses the environment of the macro from which it was called.
shows nested macros. The y in the in_block macro hides the y in the out_block macro. The x and z from the out_block macro, however, are accessible to the in_block macro.
Example 5-17. Using Nested Macros in_block .macro y,a
.
.endm
; visible parameters are y,a and x,z from the calling macro out_block .macro
.
x,y,z
; visible parameters are x,y,z
.
in_block x,y ; macro call with x and y as arguments
.
.
.endm
out_block ; macro call
and
show recursive and fact macros. The fact macro produces assembly code necessary to calculate the factorial of n, where n is an immediate value. The result is placed in data memory address loc . The fact macro accomplishes this by calling fact1, which calls itself recursively.
Example 5-18. Using Recursive Macros in Mnemonic Assembly fact .macro N, loc ; n is an integer constant
; loc memory address = n!
.if N < 2 ; 0! = 1! = 1
MOV #1,loc
.else
MOV #N,loc
.eval N - 1, N ; factorial of n - 1 fact1 ; call fact1 with current environment
.endif
; n >= 2 so, store n at loc
; decrement n, and do the
.endm
fact1 .macro
.if N > 1
MOV loc,T3 ; multiply present factorial
MOV T3,HI(AC2) ; by present position
MPYK #N,AC2,AC0
MOV AC0,loc ; save result
.eval N - 1, N ; decrement position fact1
.endif
; recursive call
.endm
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Example 5-19. Using Recursive Macros in Algebraic Assembly fact .macro N, loc ; n is an integer constant
; loc memory address = n!
.if N < 2 ; 0! = 1! = 1 loc = #1
.else
loc = #N
.eval N - 1, N ; factorial of n - 1 fact1 ; call fact1 with current environment
.endif
; n >= 2 so, store n at loc
; decrement n, and do the
.endm
fact1 .macro
.if N > 1
T3 = loc
HI(AC2) = T3
AC0 = AC2 * #(N)
; multiply present factorial
; by present position loc = AC0 ; save result
.eval N - 1, N ; decrement position fact1
.endif
; recursive call
.endm
Using Recursive and Nested Macros
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5.10 Macro Directives Summary
The directives listed in
through
can be used with macros. The .macro, .mexit, .endm
and .var directives are valid only with macros; the remaining directives are general assembly language directives.
Table 5-2. Creating Macros
Mnemonic and Syntax
.endm
macname .macro [parameter
1
][,... , parameter n
]
.mexit
.mlib filename
Description
End macro definition
Define macro by macname
Go to .endm
Identify library containing macro definitions
Macro Use
See
Directive
Table 5-3. Manipulating Substitution Symbols
Mnemonic and Syntax
.asg [ " ]character string[ " ], substitution symbol
.eval well-defined expression, substitution symbol
.var
sym
1
[, sym
2
, ..., sym n
]
See
Description
Assign character string to substitution symbol
Macro Use
Directive
Perform arithmetic on numeric substitution symbols
Define local macro symbols
Table 5-4. Conditional Assembly
Mnemonic and Syntax
.break [well-defined expression]
.endif
.endloop
.else
.elseif well-defined expression
.if well-defined expression
.loop [well-defined expression]
Description
Optional repeatable block assembly
End conditional assembly
End repeatable block assembly
Optional conditional assembly block
Optional conditional assembly block
Begin conditional assembly
Begin repeatable block assembly
Macro Use
See
Directive
Mnemonic and Syntax
.emsg
.mmsg
.wmsg
Mnemonic and Syntax
.fclist
.fcnolist
.mlist
.mnolist
.sslist
.ssnolist
168 Macro Description
Table 5-5. Producing Assembly-Time Messages
Description
Send error message to standard output
Send assembly-time message to standard output
Send warning message to standard output
Macro Use
See
Directive
Table 5-6. Formatting the Listing
Description
Allow false conditional code block listing (default)
Suppress false conditional code block listing
Allow macro listings (default)
Macro Use
Suppress macro listings
Allow expanded substitution symbol listing
Suppress expanded substitution symbol listing (default)
See
Directive
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Chapter 6
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Running C54x Code on C55x
In addition to accepting TMS320C55x source code, the C55x mnemonic assembler also accepts
TMS320C54x ™ mnemonic assembly. The C54x instruction set contains 211 instructions; the C55x mnemonic instruction set is a superset of the C54x instruction set. The table below contains statistics on how the C54x instructions assemble with masm55:
Original C54x instruction assembles as:
One C55x instruction
Two C55x instructions
More than two C55x instructions
% of total C54x instruction set % of commonly used C54x instructions
85
10
5
95-99
1-3
0-2
The data in the second column characterizes the assembly of an imaginary file containing an instance of every C54x instruction. However, the instructions that assemble as more than two instructions are not commonly used. The data in the third column characterizes the assembly of a file containing the most commonly used C54x instructions. Exact percentages depend on the specific source file used.
Because of this compatibility, the C55x mnemonic assembler can assemble C54x code to generate C55x object code, that upon execution, computes exactly the same result. This assembler feature preserves your C54x source code investment as you transition to the C55x.
This chapter does not explain how to take advantage of the new architecture features of the C55x. For this type of information, see the TMS320C55x DSP Programmer ’ s Guide.
Topic
...........................................................................................................................
Page
6.1
C54x to C55x Development Flow
6.2
Understanding the Listing File
.......................................................................
..........................................................................
6.3
Handling Reserved C55x Names ........................................................................
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C54x to C55x Development Flow www.ti.com
6.1
C54x to C55x Development Flow
To run a C54x application on the C55x, you must:
• Assemble each function with cl55. Your C54x application should already assemble without errors with the cl500 assembler. For information on cl55 options that support the porting of C54x code, see
• Initialize the stack pointers SP and SSP. See
• Handle differences in memory placement. See
• Update your C54x linker command file for C55x. See
To use ported C54x functions along with native C55x functions, see
6.1.1 Initializing the Stack Pointers
When you execute ported C54x code from reset, the appropriate run-time environment is already in place.
However, it is still necessary to initialize the stack pointers SP (primary stack) and SSP (secondary system stack). For example: stack_size .set 0x400 stack: .usect "stack_section", stack_size sysstack: .usect "stack_section", stack_size
AMOV #(stack+stack_size), XSP
MOV #(sysstack+stack_size), SSP
The stacks grow from high addresses to low addresses, so the stack pointers must be initialized to the highest address. The primary stack and the secondary system stack must be within the same 64K word page of memory.
Code that modifies the SP can be ported. Such modification can be done directly or indirectly. In some case you will receive not receive warnings that the SSP must also be modified.
6.1.2 Handling Differences in Memory Placement
This section describes the limitations on where you can place your code in memory. All data must be placed in the first 64K words.
If your C54x code includes any of the following, all code must be placed in the first 64K bytes:
• Indirect calls with CALA
• Modification of the repeat block address registers REA or RSA
• Indirect branches with BACC, if you do not use the -v option for specifying the device revision.
If your C54x code includes either of the following, it can be placed in any 64K byte block without crossing the 64K byte boundary:
• Indirect branches with BACC, provided you build with the appropriate the − v option for specifying the device revision.
• Modification or use of the function return address on the stack in a non-standard way (stack unwinding)
Otherwise, code can be placed anywhere in memory.
6.1.3 Updating a C54x Linker Command File
You must take the following information into consideration when updating a C54x linker command file for use in a C55x system.
• In a C55x linker command file, all addresses and lengths (for both code and data) are expressed in bytes. Data is expressed in bytes even though it is addressed in words on the processor.
Consequently, the − heap and − stack options specify the bytes, not words, to be allocated.
• On C54x, memory is split into two different pages: page 0 for code and page 1 for data. The address space on each page ranges from 0 to 0xFFFF (in words). The C55x has a single, unified address space ranging from 0 to 0xFFFFFF.
• On C55x, all sections must have a unique address, and may not overlap. On C54x, where code and data are on different pages, sections can have the same address, and they can overlap.
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Understanding the Listing File
• If you use DP-based direct memory addressing (DMA), be sure that you don ’ t change the relationship between the DP boundaries and variables accessed with DMA. On C54x, DP pages are 128 words long and must begin on 128-word boundaries. C54x code ported by cl55 must adhere to the same restriction. However, the restriction is expressed differently in the linker command file. Because the linker uses byte addresses, a DP page is 256 bytes long and must begin on a 256-byte boundary.
You can place variables on the same DP page by using the blocking parameter of the .bss or .usect
assembler directive. If you use the blocking parameter, you don ’ t need to modify your linker command file.
To use the linker command file to arrange variables on the same DP page, you must change a specification of 128 words to be 256 bytes. For example, you must change a specification such as:
output_section ALIGN(128) { list of input sections } to be:
output_section ALIGN(256) { list of input sections }
6.2
Understanding the Listing File
The assembler ’ s listing file (created when invoking cl55 with the --asm_listing option) provides additional information on how C54x instructions are mapped for the C55x.
Consider the following example C54x source file:
.global name
ADD
LD
RPT
MVDK
*AR2, A
*AR3, B
#10
*AR4+, name subm .macro
mem1, mem2, reg
LD mem1, reg
SUB
.endm
mem2, reg subm name, *AR6, B
MOV T1, AC3 ; native C55x instruction
The listing file shown below has explanations inserted for clarification.
The file begins with a comment on a C55x temporary register used in porting the file.
16 ; Temporary Registers Used: XCDP
This comment appears only when temporary registers are necessary in the porting of the code. The temporary registers are used in the encodings that begin with a !REG! comment later in the file (as shown in line 7 of this example).
.global name 1
2
3 000000 D641
000002 00
ADD *AR2,A
Notice A in the example above is accepted even though it maps to AC0 on the C55x.
C54x instructions with a different syntax in C55x but a single-line mapping also appear without any special notation:
4 000003 A161 LD *AR3, B
The LD instruction above could be written as:
MOV *AR3, AC1
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The code below shows a multiple-line instruction mapping that requires the C55x instructions to be in a different order than the original source. Because this multiple-line encoding requires the use of a C55x temporary register, it starts with a !REG! line that echoes the original source. The multiple lines that correspond to the mapping will begin and end with the original source line number (7, in this case).
7 ****** !REG!
7 000005 EC31
000007 7E00
000009 0000!
5
6 00000b 4C0A
7 00000d EF83
00000f 05
MVDK *AR4+, name
AMAR *(#(name)), XCDP ; port of
; MVDK *AR4+, name
RPT #10
MOV *AR4+, coef(*CDP+) ; port of
; MVDK *AR4+, name
To summarize, in the example above, the original C54x code:
RPT #10
MVDK *AR4+, name was mapped to be:
AMAR *(#(name)),XCDP
RPT #10
MVDK *AR4+, coef(*CDP+)
Multiple-line mappings that do not require temporary registers are marked with a PORT comment.
A macro definition is simply echoed:
10
11
8
9
12 subm .macro mem1, mem2, reg
LD mem1, reg
SUB mem2, reg
.endm
A macro invocation is marked with a MACRO line. Within the macro expansion, you may see any of the cases described above.
13
14 ****** MACRO
14 000010 A100%
14 000012 D7C1
000014 11 subm name, *AR6, B
LD name, B
SUB *AR6, B
Native C55x instructions appear without any special notation. For more information on using ported C54x code with native C55x code, see
.
15
16 000015 2253 MOV T1, AC3 ; native C55x
6.3
Handling Reserved C55x Names
New C55x mnemonics and registers are reserved words. Your C54x code should not contain symbol names that are now used as C55x mnemonics or registers. For example, you should not use T3 as a symbol name.
Your C54x code also should not contain symbol names that are reserved words in the C55x algebraic syntax. For example, you should not have a label named return.
The C55x mnemonic assembler issues an error message when it encounters a symbol name conflict.
172 Running C54x Code on C55x
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Chapter 7
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Migrating a C54x System to a C55x System
After you have ported your TMS320C54x code as described in
, you must consider various system-level issues when moving your C54x code to the TMS320C55x. This chapter describes:
• How to handle differences related to interrupts
• How to use ported C54x functions with native C55x functions
• Non-portable C54x coding practices
Topic
...........................................................................................................................
Page
7.1
Handling Interrupts ..........................................................................................
7.2
Assembler Options for C54x Code .....................................................................
7.3
Using Ported C54x Functions with Native C55x Functions ....................................
7.4
Output C55x Source .........................................................................................
7.5
Non-Portable C54x Coding Practices .................................................................
7.6
Additional C54x Issues
7.7
Assembler Messages
.....................................................................................
.......................................................................................
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173
Handling Interrupts
7.1
Handling Interrupts
This section describes issues related to interrupts.
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7.1.1 Differences in the Interrupt Vector Table
The C54x interrupt table is composed of 32 vectors. Each vector contains 4 words of executable code.
The C55x vector table is also composed of 32 vectors. The vectors in both tables are the same length, but on the C55x, the length is counted as 8 bytes.
The order of the vectors in the interrupt vector table is documented in the data sheet for the specific device in your system. Since the order of the vectors is device-specific, any access to the IMR or IFR register needs to be updated accordingly. Likewise, if you use the TRAP instruction, its operand may need to be updated.
C54x and C55x handle the contents of their vectors in different ways. To handle these differences, you must modify the C54x vectors themselves.
In the C55x vector table, the first byte is ignored, and the next three bytes are interpreted as the address of the interrupt service routine (ISR). Use the .ivec assembler directive to initialize a C55x vector entry, as shown in the examples below. For more information on the .ivec directive, see
Simple Branch to ISR
If the C54x vector contains:
B isr
Change the corresponding C55x vector to:
.ivec isr
Delayed Branch to ISR
If the C54x vector contains:
BD isr
inst_1 ; two instruction words of code inst_2
The easiest solution is to write the vector as:
.ivec isr and move the instructions inst1 and inst2 to the beginning of the ISR.
Vector Contains the Entire ISR
If the C54x vector contains the entire 4-word ISR, as in the examples shown below, you have to create the
4-word ISR as a stand-alone routine:
; example 1 inst1 inst2 inst3
RETF
; example 2 inst1
RETFD inst2 inst3
; example 3
CALL routine1
RETE nop
You must then provide the address of that routine in the C55x vector table:
.ivec new_isr
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Handling Interrupts
7.1.2 Handling Interrupt Service Routines
An interrupt service routine needs to be changed only if when it is ported to C55x it includes C54x instructions that map to more than one C55x instruction, and one of the C55x instructions requires the use of a C55x register or bit as a temporary.
In this case, the new C55x register needs to be preserved by the routine.
See
for the list of C55x registers that can be used as temporaries in multiple-line instruction mappings.
To ensure that an interrupt will work, you can preserve the entire list of registers. Or, you can simply preserve the register(s) used:
• Assemble the ISR using cl55 with the --asm_listing option to generate a listing file.
• Check the listing to see if it includes a Temporary Registers Used comment at the top of the file, such as:
16 ; Temporary Registers Used: XCDP
This comment provides a list of all temporary registers used in the porting of the file. For more information, see
.
• If temporary registers are used, the appropriate register or bit must be pushed on the stack at the beginning of the ISR, and popped off the stack at the end.
7.1.3 Other Issues Related to Interrupts
You should be aware of the interrupt issues described below:
• When the assembler encounters RETE, RETED, FRETE, FRETED, RETF, or RETFD, a warning will be issued. With these instructions, the assembler is processing an interrupt service routine or the interrupt vector table itself and may not be able to port the instructions correctly.
• INTR has the same mnemonic syntax for both C54x and C55x. Consequently, the assembler cannot distinguish when an instruction is intended for a native C55x interrupt (which is acceptable) or for a
C54x interrupt (for which the interrupt number may be wrong).
• If your code writes values to IPTR, a nine-bit field in the PMST indicating the location of the interrupt vector table, you will need to modify your code to reflect the changes in the C55x system.
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Assembler Options for C54x Code www.ti.com
7.2
Assembler Options for C54x Code
The cl55 assembler offers several options to provide additional support for the porting of C54x assembly code to C55x. With these options, the assembler can:
• Assume SST is disabled (-att option)
• Port for speed over size (-ath option)
• Encode for C54x-specific circular addressing (--purecirc option)
• Remove NOPs from delay slots (-atn option)
7.2.1 Assume SST Is Disabled (-att Option)
By default, the assembler assumes that the SST bit (saturate on store) is enabled. For example, the SST assumption causes the assembler to port the STH and STL instructions as follows:
C54x instruction
STH src, Smem
STL src, Smem
Default C55x encoding
MOV HI(ACx << #0), Smem
MOV ACx << #0, Smem
Bytes
3
3
The shift ( << #0) is used to achieve the same saturate-on-store behavior provided by C54x. Even if SST is disabled in your code, this encoding still works.
However, if the saturate behavior is not required, use the -mt assembler option to generate a more optimal encoding:
C54x instruction
STH src, Smem
STL src, Smem
Default C55x encoding with -att
MOV HI(ACx), Smem
MOV ACx, Smem
Bytes
2
2
The -att option affects the entire file. To toggle SST mode within a file, use the .sst_on and .sst_off
assembler directives.
The .sst_on directive specifies that the SST status bit set to 1, the default assumption of the assembler.
The .sst_off directive specifies that the SST status bit set to 0; this is equivalent to using the -mt assembler option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
The scope of the .sst_on and .sst_off directives is static and not subject to the control flow of the assembly program. All of the assembly code between the .sst_off and the .sst_on directives is assembled with the assumption that SST is disabled. To indicate that the SST bit is disabled without using the command line option, place the .sst_off directive at the top of every source file.
7.2.2 Port for Speed Over Size (-ath Option)
By default, the assembler encodes C54x code with a goal of achieving small code size. For example, consider the encoding of the MVMM and STM instructions that write ARx registers. (In the STM instruction below, const is a constant in the range of -15 to 15.)
C54x instruction
MVMM ARx, ARy
STM #const, ARx
Default C55x encoding
MOV ARx, ARy
MOV #const, ARx
Bytes
2
2
You can use the -ath assembler option to generate a faster encoding:
C54x instruction
MVMM ARx, ARy
STM #const, ARx
Default C55x encoding with -ath
AMOV ARx, ARy
AMOV #const, ARy
Bytes
3
3
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Assembler Options for C54x Code
The MOV instruction writes ARy in the execute phase of the pipeline. AMOV writes ARy in the address phase, which is 4 cycles earlier. If the instruction following MVMM or STM de-references ARy (for example, *AR3+), MOV imposes a 4-cycle stall to wait for ARy to be written. AMOV does not impose a stall. The AMOV encoding provides a significant gain in speed at the cost of one byte of encoding space.
The -ath option affects the entire file. To toggle the port-for-speed mode within a file, use the
.port_for_speed and .port_for_size assembler directives.
The .port_for_size directive models the default encoding of the assembler. The .port_for_speed directive models the effect of the -ath assembler option. In the case of a conflict between the command line option and the directive, the directive takes precedence.
Consider using .port_for_speed just before a critical loop. After the loop, use .port_for_size to return to the default encoding.
7.2.3 Optimized Encoding of C54x Circular Addressing (--purecirc Option)
If your ported C54x code uses C54x circular addressing without using the C55x linear/circular addressing bits, use the --purecirc option. This option allows the assembler to generate the most optimal encoding for the circular addressing code.
For the following example C54x code: end:
RPTB end-1
NOP ; 1
MAC
NOP ; 2
*AR5+, *AR3+0%, A
Building without --purecirc generates this code:
RPTB end-1
NOP ; 1
BSET AR3LC
MACM T3 - *AR5+, *(AR3+AR0), AC0, AC0 end:
BCLR AR3LC
NOP ; 2
Notice how the instructions for toggling the linear/circular bit for AR3 are still inside the loop. Building with
--purecirc generates this code:
BSET AR3LC
RPTB P04_3
NOP ; 1
MACM T3 - *AR5+, *(AR3+AR0), AC0, AC0
P04_3:
NOP ; 2 end:
BCLR AR3LC
The instructions for toggling the linear/circular bit for AR3 are now outside of the loop.
Certain coding practices can hinder the optimization of circular addressing code, even when using the
--purecirc option:
• Unused labels
In the following code, the label middle is unused: start:
RPTB end-1
LD *AR4, A middle: ; unused label
MAR *AR4-0% end:
If the unused label is removed from the loop, the assembler can move the circular bit operations for the
MAR instruction out of the loop. Otherwise, the circular instructions remain in the loop, causing the loop to be 4 bytes larger and 4 cycles longer.
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Assembler Options for C54x Code
• Using a register for circular and non-circular purposes in the same loop.
Consider the following code:
RPTB end-1
; reference to AR3 (circular)
MAC *AR5+, *AR3+0%, A
...
; reference to AR3 (non-circular)
ST A, *AR3+
|| SUB *AR2, B
...
end: www.ti.com
Because the second AR3 reference is non-circular, the circular bit operations of the MAC instruction cannot be moved outside of the loop. When possible, if one indirect reference of an ARx within a loop uses circular addressing, all indirect references of that register within that loop should also use circular addressing.
7.2.4 Removing NOPs in Delay Slots (-atn Option)
When the -atn option is specified, the assembler removes NOP instructions located in the delay slots of
C54x delayed branch or call instructions.
For example, with the -atn option, the following C54x code:
CALLD func
LD *AR2, A
NOP
; call occurs here will appear in the cl55 listing file as:
4 000000 A041 LD
2
*AR2, A
3 000002 6C00 CALLD func
000004 0000!
5 ****** DEL NOP
6 ; call occurs here
The DEL in the opcode field signifies the deleted NOP.
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Using Ported C54x Functions with Native C55x Functions
7.3
Using Ported C54x Functions with Native C55x Functions
When rewriting a C54x application to be completely native C55x code, consider working on one function at a time, continually testing. If you encounter a problem, you can easily find it in the changes recently made.
Throughout this process, you will be working with both ported C54x code and native C55x code. Keep the following in mind:
• Avoid mixing C54x and C55x instructions within the same function.
• Transitions between ported C54x instructions and native C55x instructions should occur only at function calls and returns.
• The C compiler provides the C54X_CALL pragma for C code calling assembly. However, see the example in
for a detailed description of using a veneer function when calling a ported
C54x assembly function from C code. For more information on C54X_CALL, see the TMS320C55x
Optimizing C/C++ Compiler User's Guide.
7.3.1 Run-Time Environment for Ported C54x Code
A run-time environment is the set of presumptions and conventions that govern the use of machine resources such as registers, status register bit settings, and the stack. The run-time environment used by ported C54x code differs from the environment used by native C55x code. When you execute ported C54x code from reset, the appropriate run-time environment is already in place. However, when shifting from one kind of code to the other, it is important to be aware of the status bit and register settings that make up a particular environment.
The following CPU environment is expected upon entry to a ported C54x function:
• 32-bit stack mode
• The SP and SSP must be initialized to point into memory reserved for a stack. See
• The status bits must be set as follows:
Status Bit
C54CM
M40
ARMS
RDM 0
ST2[7:0] (circular addressing bits) 0
0
0
Set to...
1
• The upper bits of addressing registers (DPH, CDPH, ARnH, SPH) must be set to 0.
• The BSAxx registers must be set to 0.
7.3.2 C55x Registers Used as Temporaries
The following C55x registers may be used as temporaries in multiple-line mappings generated by cl55:
• T0
• T1
• AC2
• AC3
• CDP
• CSR
• ST0_55 (TC1 bit only)
• ST2_55
Interrupt routines using these registers must save and restore them. For more information, see
Native C55x code that calls ported C54x code must account for the possibility that ported code may overwrite these registers.
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7.3.3 C54x to C55x Register Mapping
The following C54x registers map to C55x registers as shown below:
C54x
T
A
B
ARn
IMRn
ASM (status bit in ST1)
C55x
T3
AC0
AC1
ARn
IERn
T2 www.ti.com
7.3.4 Caution on Using the T2 Register
Under the C54CM mode, which is required when running C54x code automatically ported by cl55, you cannot use the T2 register for any purpose other than to strictly model the ASM field of ST1 exactly as cl55 ported code does. Under C54CM, whenever the status register ST1_55 is written, the lower 5 bits
(the ASM field) are automatically copied with sign extension to T2.
When an interrupt occurs, ST1_55 is automatically saved and restored. When the restore occurs, the automatic copy to T2 is restarted. Because of this automatic overwrite on the interrupt, you cannot use T2 as a general-purpose register even in sections of C54x code that do not use the ASM field.
7.3.5 Status Bit Field Mapping
The C55x status bit fields map to C54x status bit fields as shown below.
12
11
10
9
8-0
Bit
15
14
13
Table 7-1. ST0_55 Status Bit Field Mapping
C55x field
ACOV2
ACOV3
TC1
TC2
CARRY
ACOV0
ACOV1
DP
C54x field (in ST0) none none none
TC
C
OVA
OVB
DP
8
7
11
10
9
Bit
15
14
13
12
6
5
4-0
Table 7-2. ST1_55 Status Bit Field Mapping
C55x field
BRAF
CPL
XF
HM
INTM
M40
SATD
SCMD
C16
FRCT
C54CM
ASM
C54x field (in ST0)
BRAF
CPL
XF
HM
INTM none
OVM
SXM
C16
FRCT none
ASM
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Bit
15
14-13
12
11
10
9
8
7-0
2
1
0
7
6
5
4
3
Bit
15-8
Using Ported C54x Functions with Native C55x Functions
Table 7-3. ST2_55 Status Bit Field Mapping
C55x field
ARMS
Reserved
DBGM
EALLOW
RDM
Reserved
CDPLC
ARnLC
C54x field (in ST0) none none none none none none none none
Table 7-4. ST3_55 Status Bit Field Mapping
C55x field
Reserved
CBERR
MPNMC
SATA
Reserved
Reserved
CLKOFF
SMUL
SST
C54x field (in ST0) none none
MP/MC_ none none none
CLKOFF
SMUL
SST
7.3.6 Switching Between Run-Time Environments
The run-time environment defined in
is not complete because it only defines registers and status bits that are new with C55x. Registers and status bits that are not new with C55x inherit their conventions from the original C54x code. (As shown in
, some registers have new names.)
If the run-time environment for your native C55x code differs from the environment defined for ported
C54x code, you must ensure that, when switching between environments, the proper adjustments are made for:
• Preserving status bit field values
• Preserving registers
• How arguments are passed
• How results are returned
Insert enviro54to55_pru280 image here.
7.3.7 Example of C Code Calling C54x Assembly
This example describes a technique for handling a call from compiled C code to a C54x assembly routine.
In this example, an additional function is inserted between the native C55x code and the ported C54x code. This function, referred to as a veneer function, provides code to transition between the two run-time environments.
Compiler Pragmas
NOTE: The compiler provides two pragmas to do this work for you: C54X_CALL and
C54X_FAR_CALL. If you use these pragmas, you do not need to write the veneer yourself.
Both the C54x and C55x C compiler run-time environments are well-defined, which makes the techniques shown in this example more concrete and easier to apply to your own situation.
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Example 7-1. C Prototype of Called Function short firlat(short *x, short *k, short *r, short *dbuffer, unsigned short nx, unsigned short nk); www.ti.com
Example 7-2. Assembly Function _firlat_veneer
.def
_firlat_veneer
.ref
_firlat
_firlat_veneer:
; Saving Registers -------------------------
PSH AR5
; PSH AR6
; PSH AR7
; saved in ported C54x environment
; saved in ported C54x environment
PSH
PSH
T2
T3
; Passing Arguments ------------------------
PSH T1 ; push rightmost argument first
PSH
PSH
T0
AR3
; then the next rightmost
; and so on
PSH
PSH
AR2
AR1
MOV AR0, AC0 ; leftmost argument goes in AC0
; Change Status Bits -----------------------
BSET C54CM
BCLR ARMS
BCLR C16
; Call -------------------------------------
CALL _firlat
; Restore Status Bits ----------------------
BCLR C54CM
BSET ARMS
BSET SXMD
; Capture Result ---------------------------
MOV AC0, T0
; Clear Arguments From the Stack -----------
AADD #5, SP
; Restore Registers and Return -------------
POP T3
POP T2
; POP AR7
; POP AR6
POP AR5
RET
The veneer function is described below. It is separated into several parts to allow for a description of each segment.
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7.3.7.1
Saving Registers
PSH AR5
; PSH AR6 ; saved in ported C54x environment
; PSH AR7 ; saved in ported C54x environment
PSH T2
PSH T3
If the C55x run-time environment expects that certain registers will not be modified by a function call, these registers must be saved. In the case of the C55x C compiler environment, registers XAR5-XAR7,
T2, and T3 must be saved. Because C54x code cannot modify the upper bits of the XARn registers, only the lower bits need to be preserved. The instructions that push AR6 and AR7 are commented out because the run-time environment of the C54x ported code (as defined by the C54x C compiler) presumably saves these registers. A more conservative approach would be to save these registers anyway.
7.3.7.2
Passing Arguments
PSH
PSH
PSH
PSH
PSH
MOV
T1
T0
AR3
AR2
; push right-most argument first
; then the next argument
; and so on
AR1
AR0, AC0 ; left-most argument goes in AC0
Arguments passed from native C55x code must be placed where the ported C54x code expects them. In this case, all arguments are passed in registers. According to the calling conventions of the C55x C compiler, the arguments to the firlat() function will be passed, and the result returned, in the registers shown below.
T0 AR0 AR1 AR2 AR3 T0 T1 short firlat(short *x, short *k, short *r, short *dbuffer, unsigned short nx, unsigned short nk);
For more information on the C compiler ’ s calling conventions, see the TMS320C55x Optimizing C/C++
Compiler User's Guide.
The ported C54x environment expects the first argument to be in A (AC0 on C55x) and the remaining arguments to be placed on the stack, in reverse order of appearance in the argument list. The right-most argument (T1) is pushed onto the stack first. The next argument (T0) is then pushed onto the stack. The argument placement continues until the left-most argument (AR0) is reached. This argument is copied to
AC0.
7.3.7.3
Changing Status Bits
BSET C54CM
BCLR ARMS
BCLR C16
It is necessary to change the status settings of the native C55x code to the settings required by ported
C54x code. These settings are shown in
. In this case, only the C54CM and ARMS bits need
to be changed.
Because of the requirements for executing the original C54x code, it may be necessary to set the C16 bit to 0. This bit, ignored by C55x compiled code, is assumed to be 0 by the C54x compiler. Setting the bit to
0 is the conservative approach to account for this assumption.
7.3.7.4
Function Call
CALL _firlat
Now that registers have been saved and status bits set, the call to ported C54x code can be made.
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7.3.7.5
Restoring Status Bits
BCLR C54CM
BSET ARMS
BSET SXMD
After the call, restore the status bits to the settings required by the native C55x environment. Ported C54x code makes no assumption about the SXMD bit (SXM on C54x) after a function call. However, C55x compiled code expects this bit to be set to 1.
7.3.7.6
Capturing Results
MOV AC0, T0
The ported C54x environment returns the result in AC0, while the native C55x environment expects the result to be returned in T0. Consequently, the result must be copied from AC0 to T0.
7.3.7.7
Clearing Arguments From the Stack
AADD #5, SP
At this point, you should decrease the stack by the number of words originally needed to push the function ’ s passed arguments. In this case, the amount is 5 words. Because the stack grows from high addresses to low addresses, addition is used to change the stack pointer from a low address to a higher one.
7.3.7.8
Restoring Registers and Returning
POP
POP
T3
T2
; POP AR7
; POP AR6
POP AR5
RET
Restore the registers saved at the beginning of the function, and return.
7.3.8 Example of C54x Assembly Calling C Code
contains a C54x assembly routine calling a compiled C routine. Because the C routine is recompiled with the C55x C compiler, the assembly routine must handle the differences between the ported C54x run-time environment and the run-time environment used by the C55x compiler.
If you use a different run-time environment for your C55x code, your code changes will differ slightly from those in
Example 7-3 . However, you must still consider the issues addressed here.
Example 7-3. Prototype of Called C Function int C_func(int *buffer, int length);
...
The assembly function performs some calculations not shown in this example and calls the C function.
The returned result is copied to the C global variable named result. Further calculations, also not shown here, are then performed.
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Example 7-4. Original C54x Assembly Function
; Declare some data -----------------
.data
buffer: .word 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100
BUFLEN .set 11
.text
; Assembly routine starts ----------------callsc:
; original C54x code ...
; Call C function (original C54x code) -----------------
; pass 2nd arg on stack ST #BUFLEN, *SP(0)
CALLD #_C_func
LD #buffer, A ; pass 1st arg in A
; Effects of calling C:
; May modify A, B, AR0, AR2-AR5, T, BRC
; Will not modify AR1, AR6, AR7
; May modify ASM, BRAF, C, OVA, OVB, SXM, TC
; Will not modify other status bits
; Presume CMPT = 0, CPL = 1
STL A, *(_result) ; Result is in accumulator A
; original C54x code ...
RET
To use this assembly function on C55x, it is necessary to change the call to the C function.
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Example 7-5. Modified Assembly Function
; declare data as shown previously
; Assembly routine starts ----------callsc:
; ported C54x code ...
; Call C function (Change to C55x compiler environment)
AMOV #buffer,AR0 ; pass 1st ptr arg in AR0
MOV #BUFLEN,T0 ; pass 1st int arg in T0
; compiler code needs C54CM=0, ARMS=1
BCLR C54CM ; clear C54x compatibility mode
BSET ARMS ; set AR mode
BSET SXM ; set sign extension mode
CALL _C_func ; no delayed call instruction
; Effects of calling C:
; May modify AC0-AC3, XAR0-XAR4, T0-T1
; May modify RPTC,CSR,BRCx,BRS1,RSAx,REAx
; Will not modify XAR5-XAR7,T2-T3,RETA
; May modify ACOV[013],CARRY,TC1,TC2,SATD,FRCT,ASM,
; SATA,SMUL
; Will not modify other status bits
MOV T0, *(_result) ; Result is in T0
; could use *abs16(_result) if all globals are in the
; same 64K word page of data
; Change back to ported C54x environment ----------
BSET C54CM ; reset C54x compatibility mode
BCLR ARMS ; disable AR mode
; ported C54x code ...
RET www.ti.com
The arguments are passed according the calling conventions described in the Run-Time Environment chapter of the TMS320C55x Optimizing C/C++ Compiler User's Guide. The status bits modified are the only ones that differ between the C54x ported run-time environment and the native C55x environment (in this case, as defined by the C55x C compiler).
The comments about the effects of calling C (the registers and status bits that may or may not be modified) do not impact the code shown. But these effects can impact the code around such a call.
For example, consider the XAR1 register. In the C54x compiler environment, AR1 will not be modified by the call. In the C55x compiler environment, XAR1 may be modified. If code before the call to C_func loads a value into AR1, and code after the call reads AR1 for that value, then the code, as written, will not work on C55x. The best alternative is to use an XARn register that is saved by C routines, such as XAR5.
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Output C55x Source
7.4
Output C55x Source
This section describes how to convert your C54x source code directly into C55x source code instead of object code. This conversion preserves your investment in C54x assembly code by using the same format, spacing, comments, and (very often) symbolic references of the original source.
7.4.1 Command-Line Options
shows the cl55 command-line options.
Table 7-5. cl55 Command-Line Options
Option
--mnem
--alg
--incl
--nomacx
--obj_directory=directory
--obj_extension=[.]extension
Meaning
Mnemonic output
Algebraic output
Write output for include files
Do not expand macros
Name the directory for the output files
Name the extension of the output files
To get source output, you must use either --mnem or --alg. Otherwise, you produce the usual object files.
Most of the examples in this section use cl55 --mnem even though cl55 --alg can be used.
If you do not specify an extension for the output files, the names of the output files are the same as those of the corresponding input files, but with a different extension. If the first letter of an input file extension is a or s, or there is no extension, the output file extension is .s55. Otherwise, the file is presumed to be an include file, and the output file extension is .i55.
For more information on --incl, see
and
. For more information on --nomacx,
see
The following example shows that all of your assembly files are processed, placing the output in the directory c55x_asm, with the extension .asm instead of the default .s55. Any include files that are created are also in c55x_asm but named according to the default output file name method described above.
cl55 --quiet --mnem --incl --obj_directory=c55x_asm --obj_extension=.asm *.asm
The --obj_directory and --obj_extension Options
NOTE: The --obj_directory and --obj_extension options have the same meanings for .obj files when cl55 is used to compile and/or assemble files to object.
Since object files are not created, some compiler options that would normally affect the assembler do not apply. For instance, --asm_listing does not cause a listing file to be created.
shows a list of the compiler options that affect the assembler. If you use an option listed as not having an effect, it is silently ignored.
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Output C55x Source
Table 7-6. Compiler Options That Affect the Assembler
-ata
-atc
-ath
-atl
-atn
-atp
-att
Option
--absolute_listing
-ar=num
--asm_define=name[=def]
--asm_listing
--asm_undefine=name
-atv
-atw
--copy_file=filename
--cross_reference
--include_file=filename
--output_all_syms
--syms_ignore_case
Meaning
Enable absolute listing
Suppress remark num
Predefine name
Produce asm listing file
Undefine name
Assert ARMS is initially set
Assert CPL is initially set
Port for speed over size
Assert C54x is initially set
Remove NOP in delay slots
Generate profiling .prf file
Assert SST is always zero
All branches/calls are encoded as 24-bit offset
Suppress all warnings
Copy the specified file for the assembly module
Produce cross-reference file
Include the specified file for the assembly module
Keep local symbols
Make case insignificant
No
No
Yes
No
Yes
No
Yes
Effect
No
Yes
Yes
No
Yes
No
Yes
Yes
No
Yes
No
Yes www.ti.com
7.4.2 Processing .include/.copy Files
Only in this section, the term include file means a file included by either the .include or the .copy directive.
An include file must be read in order to correctly process the file which includes it. This section addresses whether processing of an include file results in the creation of a corresponding output file.
By default, an output file is not written out for an include file and the .include statement itself remains unchanged. When the new .s55 file is re-assembled, it includes a file that has not been processed.
Because the assembler can read C54x syntax, this does not affect correctness.
The --incl option changes this behavior. Under --incl, an output file is written out for each include file. The name of the new file is determined by the command-line option you use and the extension you specify as described in
. Furthermore, the .include statement is modified to include the new output file.
For example, under --incl, the first statement below causes i1.i55 to be created, and the statement changes to the second statement below.
.include
i1.inc
.include
i1.i55
There is one special case on naming an include file. If cl55 is invoked with the --obj_directory option and the name of the include file does not contain any directory information, then the new include file is written out to the directory given by the --obj_directory option.
For example, the following statement places the new i1.i55 (and input.i55) file in the directory outdir.
cl55 --mnem --incl=input.asm --obj_directory=outdir
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7.4.3 Problems with the --incl Option
Consider this contrived example of three files:
; i1.inc-----------------------
.word
x
; file1.asm------------------x .set
0
.include il.inc
; file2.asm------------------x .set
1
.include il.inc
Suppose you use --incl when building both file1.asm and file2.asm. Whether the new i1.i55 contains .word
0 or .word 1 depends on which file is built last. (It will certainly be wrong for one of them.)
The --incl option works only when every include file that is created is context free. That is, it contains no dependencies on the files which include it. In this case, i1.inc depends on the different values of x as defined in both file1.asm and file2.asm.
If i1.inc is included by several different files, using --incl causes i1.i55 to be written out each time cl55
--mnem is invoked on those files. Multiple developers working on different files in the same directory need to be aware that each time cl55 --mnem --incl is run, a new i1.i55 file is created.
Another problem with --incl relates to parallel makes. (If you don ’ t know what a parallel make is, you can safely skip this paragraph.). Suppose you have a set of .asm files, which all include i1.inc. Furthermore, suppose you have a makefile that converts those files to C55x syntax with cl55 --mnem and then assembles the resulting .s55 files to object with just cl55. If you do this in parallel, you end up with simultaneous writes and reads to i1.i55. Since this does not work, you have to create the .i55 files with a serial make.
7.4.4 Handling .asg and .set
The .asg and .set lines are copied through unchanged. The use of symbols that are defined by .asg and
.set is largely retained. Generally, if an entire operand can be copied unchanged from the old C54x instruction to the new C55x instruction, then that operand is copied through. But, if that operand is modified in any way, then the symbolic references may not show up.
7.4.5 Preserve Spacing with the .tab Directive
The assembler preserves the spacing of the original source line by copying it from the source file.
However, when the width of a C55x mnemonic or operand field is wider than the original, some original spacing is omitted. To handle this step correctly, the assembler must know how many spaces are occupied by a tab. The default is 8 spaces. You can change this default with the directive .tab size, where
size is how many spaces a tab occupies in your system.
7.4.6 Assembler-Generated Comments
Whenever source lines are deleted or added, the assembler uses a special prefix or suffix comment to mark these lines. These lines can then easily be found with the search features typically found in text editors, or scripting languages such as Perl and awk.
The general form of the comments is “ ;+XX ” where XX is a two letter code used to specify the function the comment performs. These are described in the following sections.
7.4.6.1
Multiple-Line Rewrites
Multiple-line rewrites appear at the front of the commented out original source line. They are also tagged on the end of every line associated with the original source line.
The two types of multiple-line rewrites are:
• ML − Multiple-line rewrite
• RL - Multiple-line rewrite that uses a temporary register
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7.4.6.2
Expanded Macro Invocations
Expanded macro invocations appear at the front of the macro invocation (always MI) or multiple line rewrite within the macro expansion. They are also tagged on the end of every line within the macro expansion.
The three types of expanded macro invocations are:
• MI − Single-line rewrite within an expanded macro
• MM - Multiple-line rewrite within an expanded macro
• RM - Multiple-line rewrite that uses a temporary register within an expanded macro
7.4.6.3
Prefix Comments
The following comments appear at the front of the commented out lines:
• NP - Deleted NOP
• IF - .if/.endif and related directives, as well as associated false blocks
• LP - .loop/.break/.endloop and enclosing lines
• FN - Naming the file
• MS - Miscellaneous
7.4.6.4
Suffix Comments
The following comment is tagged at the end of changed lines:
• SA − Converted .set to .asg (only in algebraic output)
• RK - Remark inserted with .mmsg directive. The RK comment is tagged at the end of added lines.
7.4.6.5
Code Example For Assembler-Generated Comments
shows a code example of assembler-generated comments.
displays the C55x output for
Example 7-6. Contrived C54x Assembly File
.global name
ADD
LD
*AR2, A
*AR3, B
; same mnemonic
; different mnemonic
RPT
MVDK
#10
*AR4+, name ; multi-line rewrite subm .macro
mem1, mem2, reg ; macro definition copied through
LD mem1, reg
SUB
.endm
mem2, reg subm name, *AR6, B
MOV 1, AC3
; macro invocation expanded
; native LEAD3 instruction
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Example 7-7. C55x Output For C54x Code Example in
;+MS translation of try1.asm
;+MS Temporary Registers Used: XCDP trans_count 1 global name
;+MS do NOT remove!
ADD
MOV
;+RL MVDK
AMAR
*AR2, AC0, AC0
*AR3, AC1
*AR4+, name
*(#name), XCDP
; same mnemonic
; different mnemonic
; multi-line rewrite
; +RL port of MVDK *AR4+, name
RPT
MOV
SUB
.endm
#10
*AR4+, *CDP+ subm .macro
mem1, mem2, reg
LD mem1, reg mem2, reg
; +RL port of MVDK *AR4+, name
; macro definition copied through
;+MI subm
MOV
SUB
MOV name, *AR6, B
@#name, AC1 ;+MI
*AR6, AC1, AC1 ;+MI
; macro invocation expanded
T1, AC3 ; native LEAD3 instruction
Output C55x Source
7.4.7 Handling Macros
Macro definitions are always copied through unchanged.
By default, macro invocations are expanded. You can disable this expansion with the --nomacx option.
If you combine --alg --nomacx your output file has invocations of macros which use mnemonic syntax in a file that is otherwise algebraic syntax. Therefore, at the top of such a file you see the error message in
Example 7-8. C55x Output Created from Combining --alg & --nomacx
.emsg "This file will not assemble because it combines algebraic syntax with invocations of macros in mnemonic syntax. Please see the comment at the top of <output file> for more information."
.end ; stops assembler processing
Also, because this file cannot be assembled, this combination of features cannot be tested. To attempt to assemble this file you must rewrite the macros in C55x algebraic syntax, and remove this .emsg, .end, and associated comment block.
If you assemble this file, you see the error message given in the .emsg. After the message is displayed, the assembler stops running. To continue, you must edit the file as instructed in the error message.
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7.4.8 Handling the .if and .loop Directives
The problem with blocks of code controlled by the .if and .loop directives is that these blocks do not necessarily stay together through translation. Delayed branches or calls must move as part of the translation. If these delayed branches or calls occur just before such a block, they move into it. If they are near the end, they may leave the block.
The assembler will evaluate conditional expressions and comment out the .if, .else, .elseif, and .endif
directives, as well as the code in the false block(s). The solution for .loop is to comment out every thing from the .loop to the .endloop, including any .break directives, and follow that with as many iterations of the .loop block as required.
Loop Count Affects Translated Source Size
NOTE: If the loop count is a large value, then there will be a large increase in the size of the translated source versus the original source.
7.4.9 Integration Within Code Composer Studio
Converting source from C54x to C55x is not a process integrated within Code Composer Studio
(CCStudio). None of the command-line options described in this section are available from within
CCStudio. Use the command line interface to cl55 to convert your C54x source to C55x, then add those new C55x source files to your C55x CCStudio project.
7.5
Non-Portable C54x Coding Practices
Some C54x coding practices cannot be ported to the C55x. The assembler warns you of certain detectable issues, but it cannot detect every issue. The following coding practices are not portable:
• Any use of a constant as a memory address. For example:
B 42
ADD @42,A
SUB @symbol+10,b
• Memory initialized with constants that are later interpreted as code addresses. For example: table: .word 10, 20, 30
...
LD
CALA
@table,A
• Using data as instructions. For example: function:
.word 0xabcd ; opcode for ???
.word 0xdef0 ; opcode for ???
...
CALL function
• Out-of-order execution, also known as pipeline tricking. The assembler detects one instance of out-of-order execution: when an instruction modifies the condition in the two instruction-words before the C54x XC instruction. In this instance, the assembler issues a remark. Other cases of out-of order execution are not detected by the assembler.
• Code that creates or modifies code.
• Repeat blocks spanning more than one file.
• Branching/calling unlabeled locations. Or, modifying the return address to return to unlabeled location.
This includes instructions such as:
B $+10
• Using READA and WRITA instructions to access instructions and not data. For more information, see
• Using READA/WRITA with an accumulator whose upper bits are not zero.
The READA/WRITA instruction on C54x devices (other than C548 or later) uses the lower 16 bits of the accumulator and ignores the upper 16 bits. C548 and later devices, however, use the lower 23 bits.
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Additional C54x Issues
The assembler assumes C548 or later devices as it cannot determine the device for which the code is targeted. Consequently, code for C548 and later devices maps with no problems. Code for devices other than these does not run.
• Label differences are not allowed in conditional assembly expressions.
7.6
Additional C54x Issues
There are some additional system issues.
If your C54x code does any of the following, you may need to modify this code to use native C55x instructions:
• Uses a *SP(offset) operand in the MMR slot of MMR instructions like LDM
• Copies blocks of code, usually from off-chip memory to on-chip memory
• Uses memory-mapped access to peripherals
• Uses repeat blocks larger than 32K after mapping to C55x
• Uses the branch conditions BIO/NBIO
7.6.1 C54x to C55x Incompatibilities
You should also be aware of the following issues:
• The C5x-compatibility features of the C54x are not supported on C55x.
• RPT instructions, non-interruptible on C54x, can be interrupted on C55x.
• When an operation overflows into the guard bits, and then a left-shift clears the guard bits, the C54x has the value of zero while the C55x has a saturated value.
• The C54x and C55x mnemonic assembly languages differ significantly in the representation of instruction parallelism.
The C55x implements two types of parallelism: implied parallelism within a single instruction (using the
:: operator), and user-defined parallelism between two instructions (using the || operator). The C54x implements only one type of parallelism, which is analogous to implied parallelism on the C55x.
However, C54x parallelism uses parallel bars (||) as its operator. C55x parallelism is documented in the
TMS320C55x DSP Mnemonic Instruction Set Reference Guide.
• When using indirect access with memory-mapped access instructions, such as the following, the C54x masks the upper 9 bits of the ARn register.
STM #0x1234, *AR2+
This masking effectively occurs both before and after the post-increment to AR2. For example:
; AR2 = 0x127f
STM #0x1234, *AR2+ ; access location 0x7f
; AR2 = (0x7f + 1) & ~7f ==> 0
However, the C55x assembler maps this as follows to account for the possibility of a memory-mapped address for AR2.
AND #0x7f, AR2
MOV #0x1234, *AR2+ ; note no masking afterward
7.6.2 Handling Program Memory Accesses
The cl55 assembler supports C54x program memory access instructions (FIRS, MACD, MACP, MVDP,
MVPD, READA, WRITA) for accessing data, but not for accessing code. When the assembler encounters one of these instructions, it will issue a remark (R5017). On C54x, a code address is in words, while on
C55x, it is in bytes. To account for this difference when handling program memory access instructions, the assembler does the following actions:
• Generates a C55x instruction sequence with the assumption that the C54x program memory access operand refers to a data (word) address, not a code (byte) address.
• Places any data declaration found in a code section into its own data section. This will most likely require changes to your linker command file.
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Assembler Messages
For example, the C54x input in
is ported by C55x to the code in
Example 7-9. C54x Input
.global ext
MVDP *AR2, ext table:
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Example 7-10. C55x Result
.global ext
AMOV #ext, XCDP
MOV *AR2, *CDP
.sect
".data:.text" table:
.word 10
In
Example 7-10 , the instructions generated for MVDP assume that ext is a data (word) address. If the
memory address used in your code actually is a code address, the C55x instructions will not work. In this case, you should rewrite the function to use native C55x instructions. For more information on using native
C55x instructions along with ported C54x code, see
The .word directive in this example is placed into a new section called .data:.text. In general, groupings of data within a code section are placed into subsections with the name .data:root_section, where root_section is the name of the original code section used on C54x. Your linker command file should be modified to account for these changes. A subsection can be allocated separately or grouped with other sections using the same base name. For example, to group all data sections and subsections:
.data > RAM ; allocates all .data sections / subsections
For more information on subsections, see
7.7
Assembler Messages
When assembling C54x code, cl55 may generate any of the following remarks. To suppress a particular remark or all remarks, use the -ar assembler option or the .noremark directive. For more information, see
(R5001) Possible dependence in delay slot of RPTBD--be sure delay instructions do not modify repeat control registers.
Description This message occurs when the instructions in the delay slots of a C54x RPTBD instruction perform indirect memory references.
Action If these instructions modify the REA or RSA repeat address control registers, the C55x instructions used to implement RPTBD will not work. If the instructions do not modify REA or RSA, you can either ignore this message or rewrite your code to use RTPB.
(R5002) Ignoring RSBX CMPT instruction
Description This C54x instruction disables the C5x compatibility mode of the C54x. Because C55x does not support C5x compatibility mode, this instruction is ignored.
Action Remove this instruction from your code, or simply ignore this message.
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Assembler Messages
(R5003) C54x does not modify ARn, but C55x does
Description This message occurs when both memory operands of an ADD or SUB instruction use the same ARn register but only the second operand modifies the register. For example
SUB *AR3, *AR3+, A
Action On C54x, such an instruction will not modify AR3 by adding one to it. On C55x, the same instruction will add one to AR3.This difference in behavior may or may not affect your code. To prevent this message from being issued, move the ARn modification to the first operand:
SUB *AR3+, *AR3, A
(R5004) Port of RETF correct only for non-interrupt routine.
Description This message occurs when the assembler encounters RETF and RETFD, the C54x fast interrupt return instructions. Because it is possible to correctly use these instructions in non-interrupt routines, the RETF instruction is mapped to the C55x RET instruction.
Action If this instance of RETF or RETFD is actually used to return from an interrupt, you need to consider the issues described in R5005, and then rewrite this instruction using the C55x
RETI instruction.
(R005) Port of [F]RETE is probably not correct. Consider rewriting to use RETI instead.
Description This message occurs when the assembler encounters the C54x RETE, RETED, FRETE, and FRETED instructions. These instructions are mapped to the C55x RETI instruction.
Action The effects of RETI differ from the effects of the RETE instructions. For example, RETI automatically restores ST1_55, ST2_55, and part of ST0_55. RETE does not. You may need to adjust your code accordingly. Furthermore, you need to determine if your C54x interrupt service routine contains any multiple-line mappings using C55x temporary registers. If so, you need to preserve the registers. For more information, see
(R006) This instruction loads the memory address itself, and not the contents at that memory address
Description This message occurs when the first operand of an AMOV instruction is a symbol without an operand prefix. For example:
AMOV symbol, XAR3 ; not written as #symbol
Action This instruction may seem to load the contents at the memory address represented by symbol. However, the address of the symbol itself is loaded. Use the # prefix to correct this issue:
AMOV #symbol, XAR3
(R007) C54x and C55x port numbers are different
Description This message occurs when the assembler encounters C54x PORTR and PORTW instructions. A C55x instruction sequence will be encoded to perform the same function, but the port number used will most likely be incorrect for C55x.
Action Consider rewriting the code to use a similar C55x instruction that loads/stores the contents of a port address into a register:
MOV port(#100), AC0 ; for PORTR MOV AC1, port(#200) ; for PORTW
(R008) C54x directive ignored
Description Some C54x assembler directives are not needed on the C55x. This message occurs when you use such a directive (.version, .c_mode, .far_mode).
Action Remove this directive from your code, or simply ignore this message.
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(R009) Modifying C54x IPTR in PMST will not update C55x IVPD/ IVPH. Replace with native C55x mnemonic (e.g., MOV #K, mmap(IVPD)).
Description This message occurs when the assembler encounters a write to the PMST register. On
C54x, bits 15 through 7 of PMST contain the upper 9 bits of the address of the interrupt vector table. C55x uses the IVPD/IVPH registers for this role. The IVPD/IVPH registers are described in the TMS320C55x DSP CPU Reference Guide.
Action Replace the C54x instruction with a native C55x instruction.
(R010) C54x and C55x interrupt enable/flag registers and bit mapping are different. Replace with native C55x mnemonic.
Description This message occurs when the assembler encounters a write to the IFR or IMR registers.
The bit mappings of the C55x IFR and IER (IMR on C54x) registers differ from the C54x mappings. These registers are described in the TMS320C55x DSP CPU Reference
Guide.
Action Replace the C54x instruction with a native C55x instruction.
(R011) C55x requires setting up the system stack pointer (SSP) along with the usual C54x SP setup.
Description This message occurs when the assembler encounters a write to the SP register. C55x has a primary system stack managed by the SP as well as a secondary system stack managed by SSP. This remark is a reminder that whenever SP is initialized, SSP must be initialized also.
Action Initialize the SSP register.
(R012) This instruction requires the use of C55x 32-bit stack mode.
Description This message occurs when the assembler encounters the FCALL[D] or FCALA[D] instructions. These instructions only work in 32-bit stack mode. The stack configurations are described in the TMS320C55x DSP CPU Reference Guide. Since 32-bit stack mode is the default mode upon device reset, you must explicitly set up your reset vector to use a different stack mode. For more information, see
Initialize Interrupt Table Entries .
Action Set the stack configuration accordingly.
(R013) C55x peripheral registers are in I/O space. Use C55x port() qualifier.
Description This message occurs when the assembler encounters the use of a C54x peripheral register name. These registers are not memory-mapped on C55x. Instead, they are located in I/O space. To access C55x I/O space, you must use the port() operand qualifier. For more information, see the TMS320C55x DSP Mnemonic Instruction Set
Reference Guide.
Action Use the port() qualifier accordingly.
(R014) On C54x, the condition set in the two instruction words before an XC does not affect that
XC. The opposite is true on C55x.
Description This message occurs when the assembler encounters an instruction that modifies the condition in the two instruction words before the C54x XC instruction. On C54x, this code depends on out-of-order execution in the pipeline. However, this out-of-order execution will not occur on the C55x, so the results will not be the same. Out-of-order execution is considered a non-portable C54x coding practice, as described in
are many possible cases of out-of-order execution, this is the only one detected by the assembler.
Action Modify your code to account for the difference on C55x.
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Assembler Messages
(R015) Using hard-coded address for branch/call destination is not portable from C54x.
Description This message occurs when the assembler encounters a C54x instruction that includes a branch or call to a non-symbolic, hard-coded address. Because code addresses are words on C54x and bytes on C55x, the assembler cannot know if the address accounts for the byte/word difference.
Action Modify your code to account for the difference on C55x.
(R016) Using expression for branch/call destination is not portable from C54x.
Description This message occurs when the assembler encounters a C54x branch or call instruction with an expression containing an arithmetic operator (such as sym+1). Because code addresses are words on C54x and bytes on C55x, the assembler cannot know if your code accounts for the byte/ word difference.
Action Modify your code to account for the difference on C55x.
(R017) Program memory access is supported when accessing data, but not when accessing code. In addition, changes to your linker command file are typically required.
Description This message occurs when the assembler encounters a C54x program memory access instruction (FIRS, MACD, MACP, MVDP, MVPD, READA, WRITA). For more information, see
Action Modify your code and/or linker command file to account for the C55x differences.
• Built-in parallelism within a single instruction.
Some instructions perform two different operations in parallel. Double colons (::) are used to separate the two operations. This type of parallelism is also called implied parallelism. These instructions are provided directly by the device and are documented in the TMS320C55x DSP Mnemonic Instruction Set Reference Guide. You cannot form your own implied parallel instructions.
• User-defined parallelism between two independent instructions.
Two instructions may be paralleled by you, as allowed by the parallelism rules described in the TMS320C55x DSP Mnemonic Instruction Set Reference Guide.
Parallel bars (||) are used to separate two instructions to be executed in parallel.
The C54x implements only one type of parallelism. It is analogous to implied parallelism on the C55x.
However, C54x parallelism uses parallel bars (||) as its operator.
summarizes the parallelism operators on the C54x and C55x.
Kind of parallelism
Implied
User-defined
Table 7-7. Parallelism Operators
C54x Operator
||
N/A
C55x Operator
::
||
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Chapter 8
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Archiver Description
The TMS320C55x archiver lets you combine several individual files into a single archive file. For example, you can collect several macros into a macro library. The assembler searches the library and uses the members that are called as macros by the source file. You can also use the archiver to collect a group of object files into an object library. The linker includes in the library the members that resolve external references during the link. The archiver allows you to modify a library by deleting, replacing, extracting, or adding members.
Topic
...........................................................................................................................
Page
8.1
Archiver Overview ...........................................................................................
8.2
The Archiver ' s Role in the Software Development Flow ........................................
8.3
Invoking the Archiver
8.4
Archiver Examples
.......................................................................................
...........................................................................................
8.5
Library Information Archiver Description ............................................................
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8.1
Archiver Overview
You can build libraries from any type of files. Both the assembler and the linker accept archive libraries as input; the assembler can use libraries that contain individual source files, and the linker can use libraries that contain individual object files.
One of the most useful applications of the archiver is building libraries of object modules. For example, you can write several arithmetic routines, assemble them, and use the archiver to collect the object files into a single, logical group. You can then specify the object library as linker input. The linker searches the library and includes members that resolve external references.
You can also use the archiver to build macro libraries. You can create several source files, each of which contains a single macro, and use the archiver to collect these macros into a single, functional group. You can use the .mlib directive during assembly to specify that macro library to be searched for the macros that you call.
discusses macros and macro libraries in detail, while this chapter explains how to use the archiver to build libraries.
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The Archiver ' s Role in the Software Development Flow
8.2
The Archiver
'
s Role in the Software Development Flow
shows the archiver's role in the software development process. The shaded portion highlights the most common archiver development path. Both the assembler and the linker accept libraries as input.
Figure 8-1. The Archiver in the TMS320C55x Software Development Flow
C/C++ source files
Macro source files
C/C++ compiler
Archiver
Assembler source
C++ name demangling utility
Macro library
Assembler
Archiver
Library of object files
Object files
Linker
Library-build utility
Run-timesupport library
Debugging tools
Executable object file
Hex-conversion utility
Programmer Absolute lister
Cross-reference lister
Object file utilities
C55x
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Invoking the Archiver
8.3
Invoking the Archiver
To invoke the archiver, enter:
ar55 [-]command [options] libname [filename
1
... filename n
] www.ti.com
ar55
[-]command options libname filenames is the command that invokes the archiver.
tells the archiver how to manipulate the existing library members and any specified. A command can be preceded by an optional hyphen. You must use one of the following commands when you invoke the archiver, but you can use only one command per invocation. The archiver commands are as follows:
@ uses the contents of the specified file instead of command line entries. You can use this command to avoid limitations on command line length imposed by the host operating system. Use a ; at the beginning of a line in the command file to include comments. (See
for an example using an archiver command file.) a adds the specified files to the library. This command does not replace an existing member that has the same name as an added file; it simply appends new members to the end of the archive.
d deletes the specified members from the library.
r replaces the specified members in the library. If you do not specify filenames, the archiver replaces the library members with files of the same name in the current directory. If the specified file is not found in the library, the archiver adds it instead of replacing it.
t prints a table of contents of the library. If you specify filenames, only those files are listed. If you do not specify any filenames, the archiver lists all the members in the specified library.
x extracts the specified files. If you do not specify member names, the archiver extracts all library members. When the archiver extracts a member, it simply copies the member into the current directory; it does not remove it from the library.
In addition to one of the commands, you can specify options. To use options, combine them with a command; for example, to use the a command and the s option, enter -as or as. The hyphen is optional for archiver options only. These are the archiver options:
-q (quiet) suppresses the banner and status messages.
-s prints a list of the global symbols that are defined in the library. (This option is valid only with the a, r, and d commands.)
-u replaces library members only if the replacement has a more recent modification date. You must use the r command with the -u option to specify which members to replace.
-v (verbose) provides a file-by-file description of the creation of a new library from an old library and its members.
names the archive library to be built or modified. If you do not specify an extension for
libname, the archiver uses the default extension .lib.
names individual files to be manipulated. These files can be existing library members or new files to be added to the library. When you enter a filename, you must enter a complete filename including extension, if applicable.
Naming Library Members
NOTE: It is possible (but not desirable) for a library to contain several members with the same name. If you attempt to delete, replace, or extract a member whose name is the same as another library member, the archiver deletes, replaces, or extracts the first library member with that name.
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Archiver Examples
8.4
Archiver Examples
The following are examples of typical archiver operations:
• If you want to create a library called function.lib that contains the files sine.obj, cos.obj, and flt.obj, enter: ar55 -a function sine.obj cos.obj flt.obj
The archiver responds as follows:
==> new archive 'function.lib' ==> building new archive 'function.lib'
• You can print a table of contents of function.lib with the -t command, enter: ar55 -t function
The archiver responds as follows:
FILE NAME SIZE DATE
------------------------------------------sine.obj
cos.obj
flt.obj
300
300
300
Wed Jun 15 10:00:24 2011
Wed Jun 15 10:00:30 2011
Wed Jun 15 09:59:56 2011
• If you want to add new members to the library, enter: ar55 -as function atan.obj
The archiver responds as follows:
==> symbol defined: '_sin'
==> symbol defined: '_cos'
==> symbol defined: '_tan'
==> symbol defined: '_atan
==> building archive 'function.lib'
Because this example does not specify an extension for the libname, the archiver adds the files to the library called function.lib. If function.lib does not exist, the archiver creates it. (The -s option tells the archiver to list the global symbols that are defined in the library.)
• If you want to modify a library member, you can extract it, edit it, and replace it. In this example, assume there is a library named macros.lib that contains the members push.asm, pop.asm, and swap.asm.
ar55 -x macros push.asm
The archiver makes a copy of push.asm and places it in the current directory; it does not remove push.asm from the library. Now you can edit the extracted file. To replace the copy of push.asm in the library with the edited copy, enter: ar55 -r macros push.asm
• If you want to use a command file, specify the command filename after the -@ command. For example: ar55 [email protected]
The archiver responds as follows:
==> building archive 'modules.lib'
is the modules.cmd command file. The r command specifies that the filenames given in the command file replace files of the same name in the modules.lib library. The -u option specifies that these files are replaced only when the current file has a more recent revision date than the file that is in the library.
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Library Information Archiver Description
Example 8-1. Archiver Command File
; Command file to replace members of the
; modules library with updated files
; Use r command and u option: ru
; Specify library name: modules.lib
; List filenames to be replaced if updated: align.asm
bss.asm
data.asm
text.asm
sect.asm
clink.asm
copy.asm
double.asm
drnolist.asm
emsg.asm
end.asm
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8.5
Library Information Archiver Description
explains how to use the archiver to create libraries of object files for use in the linker of one or more applications. You can have multiple versions of the same object file libraries, each built with different sets of build options. For example, you might have different versions of your object file library for big and little endian, for different architecture revisions, or for different ABIs depending on the typical build environments of client applications. Unfortunately, if there are several different versions of your library it can become cumbersome to keep track of which version of the library needs to be linked in for a particular application.
When several versions of a single library are available, the library information archiver can be used to create an index library of all of the object file library versions. This index library is used in the linker in place of a particular version of your object file library. The linker looks at the build options of the application being linked, and uses the specified index library to determine which version of your object file library to include in the linker. If one or more compatible libraries were found in the index library, the most suitable compatible library is linked in for your application.
8.5.1 Invoking the Library Information Archiver
To invoke the library information archiver, enter:
libinfo55 [options] -o=libname libname
1
[libname
2
... libname n
] libinfo55 options libnames is the command that invokes the library information archiver.
changes the default behavior of the library information archiver. These options are:
-o libname specifies the name of the index library to create or update. This option is required.
-u updates any existing information in the index library specified with the -o option instead of creating a new index.
names individual object file libraries to be manipulated. When you enter a libname, you must enter a complete filename including extension, if applicable.
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Library Information Archiver Description
8.5.2 Library Information Archiver Example
Consider these object file libraries that all have the same members, but are built with different build options:
Object File Library Name Build Options
Using the library information archiver, you can create an index library called mylib.lib from the above libraries:
You can now specify mylib.lib as a library for the linker of an application. The linker uses the index library to choose the appropriate version of the library to use. If the --issue_remarks option is specified before the
--run_linker option, the linker reports which library was chosen.
8.5.3 Listing the Contents of an Index Library
The archiver ’ s -t option can be used on an index library to list the archives indexed by an index library:
The indexed object file libraries have an additional .libinfo extension in the archiver listing. The
__TI_$$LIBINFO member is a special member that designates mylib.lib as an index library, rather than a regular library.
If the archiver ’ s -d command is used on an index library to delete a .libinfo member, the linker will no longer choose the corresponding library when the index library is specified.
Using any other archiver option with an index library, or using -d to remove the __TI_$$LIBINFO member, results in undefined behavior, and is not supported.
8.5.4 Requirements
You must follow these requirements to use library index files:
• At least one of the application ’ s object files must appear on the linker command line before the index library.
• Each object file library specified as input to the library information archiver must only contain object file members that are built with the same build options.
• The linker expects the index library and all of the libraries it indexes to be in a single directory.
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Chapter 9
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Linker Description
The TMS320C55x linker creates executable modules by combining object modules. This chapter describes the linker options, directives, and statements used to create executable modules. Object libraries, command files, and other key concepts are discussed as well.
The concept of sections is basic to linker operation;
discusses the object module sections in detail.
Topic
...........................................................................................................................
Page
9.1
Linker Overview ..............................................................................................
9.2
The Linker ' s Role in the Software Development Flow ...........................................
9.3
Invoking the Linker ..........................................................................................
9.4
Linker Options ................................................................................................
9.5
Byte/Word Addressing .....................................................................................
9.6
Linker Command Files
9.7
Object Libraries
.....................................................................................
...............................................................................................
9.8
Default Allocation Algorithm .............................................................................
9.9
Linker-Generated Copy Tables ..........................................................................
9.10
Partial (Incremental) Linking
9.11
Linking C/C++ Code
.............................................................................
.........................................................................................
9.12
Linker Example ...............................................................................................
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9.1
Linker Overview
The TMS320C55x linker allows you to configure system memory by allocating output sections efficiently into the memory map. As the linker combines object files, it performs the following tasks:
• Allocates sections into the target system's configured memory
• Relocates symbols and sections to assign them to final addresses
• Resolves undefined external references between input files
The linker command language controls memory configuration, output section definition, and address binding. The language supports expression assignment and evaluation. You configure system memory by defining and creating a memory model that you design. Two powerful directives, MEMORY and
SECTIONS, allow you to:
• Allocate sections into specific areas of memory
• Combine object file sections
• Define or redefine global symbols at link time
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The Linker ' s Role in the Software Development Flow
9.2
The Linker
'
s Role in the Software Development Flow
illustrates the linker's role in the software development process. The linker accepts several types of files as input, including object files, command files, libraries, and partially linked files. The linker creates an executable object module that can be downloaded to one of several development tools or executed by a TMS320C55x device.
Figure 9-1. The Linker in the TMS320C55x Software Development Flow
C/C++ source files
Macro source files
C/C++ compiler
Archiver
Assembler source
C++ name demangling utility
Macro library
Assembler
Archiver
Library of object files
Object files
Linker
Library-build utility
Run-timesupport library
Debugging tools
Executable object file
Hex-conversion utility
Programmer Absolute lister
Cross-reference lister
Object file utilities
C55x
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Invoking the Linker
9.3
Invoking the Linker
The general syntax for invoking the linker is:
cl55 --run_linker [options] filename
1
.... filename n www.ti.com
cl55 --run_linker options filename
1
, filename n is the command that invokes the linker. The --run_linker option ' s short form is
-z.
can appear anywhere on the command line or in a link command file. (Options are discussed in
can be object files, link command files, or archive libraries. The default extension for all input files is .obj; any other extension must be explicitly specified. The linker can determine whether the input file is an object or ASCII file that contains linker commands. The default output filename is a.out, unless you use the --output_file option to name the output file.
There are two methods for invoking the linker:
• Specify options and filenames on the command line. This example links two files, file1.obj and file2.obj, and creates an output module named link.out.
cl55 --run_linker file1.obj
file2.obj
--output_file=link.out
• Put filenames and options in a link command file. Filenames that are specified inside a link command file must begin with a letter. For example, assume the file linker.cmd contains the following lines:
--output_file=link.out file1.obj file2.obj
Now you can invoke the linker from the command line; specify the command filename as an input file: cl55 --run_linker linker.cmd
When you use a command file, you can also specify other options and files on the command line. For example, you could enter: cl55 --run_linker --map_file=link.map
linker.cmd
file3.obj
The linker reads and processes a command file as soon as it encounters the filename on the command line, so it links the files in this order: file1.obj, file2.obj, and file3.obj. This example creates an output file called link.out and a map file called link.map.
For information on invoking the linker for C/C++ files, see
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Linker Options
9.4
Linker Options
Linker options control linking operations. They can be placed on the command line or in a command file.
Linker options must be preceded by a hyphen (-). Options can be separated from arguments (if they have them) by an optional space.
summarizes the linker options.
Option
--output_file
--map_file
--stack_size
--heap_size
Alias
-o
-m
-stack
-heap
Table 9-1. Basic Options Summary
Description Section
Names the executable output module. The default filename is a.out.
Produces a map or listing of the input and output sections, including holes, and
places the listing in filename
Sets primary C system stack size to size bytes and defines a global symbol that specifies the stack size. Default = 1K bytes
Sets heap size (for the dynamic memory allocation in C) to size bytes and defines a global symbol that specifies the heap size. Default = 2K bytes
Option
--library
--search_path
--priority
--reread_libs
--disable_auto_rts
Alias
-l
-i
-priority
-x
Table 9-2. File Search Path Options Summary
Description
Names an archive library or link command filename as linker input
Section
Alters library-search algorithms to look in a directory named with pathname before looking in the default location. This option must appear before the
--library option.
Satisfies unresolved references by the first library that contains a definition for
that symbol
Forces rereading of libraries, which resolves back references
Disables the automatic selection of a run-time-support library
Option
--define
--undefine
--disable_pp
Table 9-3. Command File Preprocessing Options Summary
Alias Description
Predefines name as a preprocessor macro.
Removes the preprocessor macro name.
Disables preprocessing for command files
Section
Option
--diag_error
--diag_remark
--diag_suppress
Alias
--diag_warning
--display_error_number
--emit_warnings_as_errors -pdew
--issue_remarks
--no_demangle
--no_warnings
--set_error_limit
--verbose_diagnostics
--warn_sections -w
Table 9-4. Diagnostic Options Summary
Description
Categorizes the diagnostic identified by num as an error
Categorizes the diagnostic identified by num as a remark
Suppresses the diagnostic identified by num
Categorizes the diagnostic identified by num as a warning
Displays a diagnostic ' s identifiers along with its text
Treats warnings as errors
Issues remarks (nonserious warnings)
Disables demangling of symbol names in diagnostics
Suppresses warning diagnostics (errors are still issued)
Sets the error limit to num. The linker abandons linking after this number of errors. (The default is 100.)
Provides verbose diagnostics that display the original source with line-wrap
Displays a message when an undefined output section is created
Section
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Linker Options
Option
--absolute_exe
--mapfile_contents
--relocatable
--rom
--run_abs
--xml_link_info
Option
--entry_point
--globalize
--hide
--localize
--make_global
--make_static
--no_sym_merge
--no_symtable
--scan_libraries
--symbol_map
--undef_sym
--unhide
Option
--arg_size
--fill_value
--ram_model
--rom_model
--sysstack
Alias
-a
-r
-r
-abs www.ti.com
Table 9-5. Linker Output Options Summary
Description
Produces an absolute, executable module. This is the default; if neither
--absolute_exe nor --relocatable is specified, the linker acts as if
--absolute_exe were specified.
Controls the information that appears in the map file.
Produces a nonexecutable, relocatable output module
Create a ROM object
Produces an absolute listing file
Generates a well-formed XML file containing detailed information about the result of a link
Section
Table 9-6. Symbol Management Options Summary
-g
-h
-b
-s
Alias
-e
Description
Defines a global symbol that specifies the primary entry point for the output module
Changes the symbol linkage to global for symbols that match pattern
Hides global symbols that match pattern
Changes the symbol linkage to local for symbols that match pattern
Makes symbol global (overrides -h)
Makes all global symbols static
Disables merge of symbolic debugging information in COFF object files
Strips symbol table information and line number entries from the output module
-scanlibs Scans all libraries for duplicate symbol definitions
Maps symbol references to a symbol definition of a different name
-u Places an unresolved external symbol into the output module
Reveals (un-hides) global symbols that match pattern
' s symbol table
Section
Table 9-7. Run-Time Environment Options Summary
Alias
--args
-f
Description
Allocates memory to be used by the loader to pass arguments
Sets default fill values for holes within output sections; fill_value is a 32-bit constant
-cr
-c
Initializes variables at load time
Autoinitializes variables at run time
-sysstack Sets the secondary system stack size to size bytes and defines a global symbol that specifies the secondary stack size. Default = 1K bytes
Section
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Option
--disable_clink
--linker_help
--preferred_order
--strict_compatibility
Alias
-j
-help
Linker Options
Table 9-8. Miscellaneous Options Summary
Description
Disables conditional linking of COFF object modules
Displays information about syntax and available options
Prioritizes placement of functions
Section
–
Performs more conservative and rigorous compatibility checking of input object
files
9.4.1 Wild Cards in File, Section, and Symbol Patterns
The linker allows file, section, and symbol names to be specified using the asterisk (*) and question mark
(?) wild cards. Using * matches any number of characters and using ? matches a single character. Using wild cards can make it easier to handle related objects, provided they follow a suitable naming convention.
For example: mp3*.obj
task?.o*
/* matches anything .obj that begins with mp3 */
/* matches task1.obj, task2.obj, taskX.o55, etc. */
SECTIONS
{
.fast_code: { *.obj(*fast*) } > FAST_MEM
.vectors
: { vectors.obj(.vector:part1:*) > 0xFFFFFF00
.str_code : { rts*.lib<str*.obj>(.text) } > S1ROM
}
9.4.2 Relocation Capabilities (--absolute_exe and --relocatable Options)
The linker performs relocation, which is the process of adjusting all references to a symbol when the symbol's address changes. The linker supports two options (--absolute_exe and --relocatable) that allow you to produce an absolute or a relocatable output module. The linker also supports a third option (-ar) that allows you to produce an executable, relocatable output module.
When the linker encounters a file that contains no relocation or symbol table information, it issues a warning message (but continues executing). Relinking an absolute file can be successful only if each input file contains no information that needs to be relocated (that is, each file has no unresolved references and is bound to the same virtual address that it was bound to when the linker created it).
9.4.2.1
Producing an Absolute Output Module (--absolute_exe option)
When you use the --absolute_exe option without the --relocatable option, the linker produces an absolute,
executable output module. Absolute files contain no relocation information. Executable files contain the following:
• Special symbols defined by the linker (see
)
• An optional header that describes information such as the program entry point
• No unresolved references
The following example links file1.obj and file2.obj and creates an absolute output module called a.out: cl55 --run_linker --absolute_exe file1.obj file2.obj
The --absolute_exe and --relocatable Options
NOTE: If you do not use the --absolute_exe or the --relocatable option, the linker acts as if you specified --absolute_exe.
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9.4.2.2
Producing a Relocatable Output Module (--relocatable option)
When you use the --relocatable option, the linker retains relocation entries in the output module. If the output module is relocated (at load time) or relinked (by another linker execution), use --relocatable to retain the relocation entries.
The linker produces a file that is not executable when you use the --relocatable option without the
--absolute_exe option. A file that is not executable does not contain special linker symbols or an optional header. The file can contain unresolved references, but these references do not prevent creation of an output module.
This example links file1.obj and file2.obj and creates a relocatable output module called a.out: cl55 --run_linker --relocatable file1.obj file2.obj
The output file a.out can be relinked with other object files or relocated at load time. (Linking a file that will be relinked with other files is called partial linking. For more information, see
9.4.2.3
Producing an Executable, Relocatable Output Module (-ar Option)
If you invoke the linker with both the --absolute_exe and --relocatable options, the linker produces an
executable, relocatable object module. The output file contains the special linker symbols, an optional header, and all resolved symbol references; however, the relocation information is retained.
This example links file1.obj and file2.obj and creates an executable, relocatable output module called xr.out: cl55 --run_linker -ar file1.obj file2.obj --output_file=xr.out
9.4.3 Allocate Memory for Use by the Loader to Pass Arguments (--arg_size Option)
The --arg_size option instructs the linker to allocate memory to be used by the loader to pass arguments from the command line of the loader to the program. The syntax of the --arg_size option is:
--arg_size= size
The size is a number representing the number of bytes to be allocated in target memory for command-line arguments.
By default, the linker creates the __c_args__ symbol and sets it to -1. When you specify --arg_size=size, the following occur:
• The linker creates an uninitialized section named .args of size bytes.
• The __c_args__ symbol contains the address of the .args section.
The loader and the target boot code use the .args section and the __c_args__ symbol to determine whether and how to pass arguments from the host to the target program. See the TMS320C55x
Optimizing C/C++ Compiler User's Guide for information about the loader.
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Linker Options
9.4.4 Control Linker Diagnostics
The linker uses certain C/C++ compiler options to control linker-generated diagnostics. The diagnostic options must be specified before the --run_linker option.
--diag_error=num
--diag_remark=num
--diag_suppress=num
--diag_warning=num
Categorizes the diagnostic identified by num as an error. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_error=num to recategorize the diagnostic as an error. You can only alter the severity of discretionary diagnostics.
Categorizes the diagnostic identified by num as a remark. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_remark=num to recategorize the diagnostic as a remark. You can only alter the severity of discretionary diagnostics.
Suppresses the diagnostic identified by num. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_suppress=num to suppress the diagnostic. You can only suppress discretionary diagnostics.
Categorizes the diagnostic identified by num as a warning. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_warning=num to recategorize the diagnostic as a warning. You can only alter the severity of discretionary diagnostics.
--display_error_number Displays a diagnostic ' s numeric identifier along with its text. Use this option in determining which arguments you need to supply to the diagnostic suppression options (--diag_suppress, --diag_error, --diag_remark, and
--diag_warning). This option also indicates whether a diagnostic is discretionary. A discretionary diagnostic is one whose severity can be overridden. A discretionary diagnostic includes the suffix -D; otherwise, no suffix is present. See the TMS320C55x Optimizing C/C++ Compiler User ' s
Guide for more information on understanding diagnostic messages.
--emit_warnings_as_ errors
Treats all warnings as errors. This option cannot be used with the
--no_warnings option. The --diag_remark option takes precedence over this option. This option takes precedence over the --diag_warning option.
--issue_remarks
--no_warnings
Issues remarks (nonserious warnings), which are suppressed by default.
Suppresses warning diagnostics (errors are still issued).
--set_error_limit=num Sets the error limit to num, which can be any decimal value. The linker abandons linking after this number of errors. (The default is 100.)
--verbose_diagnostics Provides verbose diagnostics that display the original source with line-wrap and indicate the position of the error in the source line
9.4.5 Disable Automatic Library Selection (--disable_auto_rts Option)
The --disable_auto_rts option disables the automatic selection of a run-time-support library. See the
TMS320C55x Optimizing C/C++ Compiler User's Guide for details on the automatic selection process.
9.4.6 Disable Conditional Linking (--disable_clink Option)
The --disable_clink option disables removal of unreferenced sections in COFF object modules. Only sections marked as candidates for removal with the .clink assembler directive are affected by conditional linking. See
Conditionally Leave Section Out of Object Module Output
for details on setting up conditional linking using the .clink directive.
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9.4.7 Link Command File Preprocessing (--disable_pp, --define and --undefine Options)
The linker preprocesses link command files using a standard C preprocessor. Therefore, the command files can contain well-known preprocessing directives such as #define, #include, and #if / #endif.
Three linker options control the preprocessor:
--disable_pp
--define=name[=val]
--undefine=name
Disables preprocessing for command files
Predefines name as a preprocessor macro
Removes the macro name
The compiler has --define and --undefine options with the same meanings. However, the linker options are distinct; only --define and --undefine options specified after --run_linker are passed to the linker. For example: cl55 --define=FOO=1 main.c --run_linker --define=BAR=2 lnk.cmd
The linker sees only the --define for BAR; the compiler only sees the --define for FOO.
When one command file #includes another, preprocessing context is carried from parent to child in the usual way (that is, macros defined in the parent are visible in the child). However, when a command file is invoked other than through #include, either on the command line or by the typical way of being named in another command file, preprocessing context is not carried into the nested file. The exception to this is
--define and --undefine options, which apply globally from the point they are encountered. For example:
--define GLOBAL
#define LOCAL
#include "incfile.cmd" nestfile.cmd
/* sees GLOBAL and LOCAL */
/* only sees GLOBAL */
Two cautions apply to the use of --define and --undefine in command files. First, they have global effect as mentioned above. Second, since they are not actually preprocessing directives themselves, they are subject to macro substitution, probably with unintended consequences. This effect can be defeated by quoting the symbol name. For example:
--define MYSYM=123
--undefine MYSYM /* expands to --undefine 123 (!) */
--undefine "MYSYM" /* ahh, that's better */
The linker uses the same search paths to find #include files as it does to find libraries. That is, #include files are searched in the following places:
1. If the #include file name is in quotes (rather than < brackets > ), in the directory of the current file
2. In the list of directories specified with --Iibrary options or environment variables (see
)
There are two exceptions: relative pathnames (such as "../name") always search the current directory; and absolute pathnames (such as "/usr/tools/name") bypass search paths entirely.
The linker has the standard built-in definitions for the macros __FILE__, __DATE__, and __TIME__. It does not, however, have the compiler-specific options for the target (__.TMS320C55X__), version
(__TI_COMPILER_VERSION__), run-time model, and so on.
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Linker Options
9.4.8 Define an Entry Point (--entry_point Option)
The memory address at which a program begins executing is called the entry point. When a loader loads a program into target memory, the program counter (PC) must be initialized to the entry point; the PC then points to the beginning of the program.
The linker can assign one of four values to the entry point. These values are listed below in the order in which the linker tries to use them. If you use one of the first three values, it must be an external symbol in the symbol table.
• The value specified by the --entry_point option. The syntax is:
--entry_point= global_symbol where global_symbol defines the entry point and must be defined as an external symbol of the input files. The external symbol name of C or C++ objects may be different than the name as declared in the source language; refer to the TMS320C55x Optimizing C/C++ Compiler User's Guide.
• The value of symbol _c_int00 (if present). The _c_int00 symbol must be the entry point if you are linking code produced by the C compiler.
• The value of symbol _main (if present)
• 0 (default value)
This example links file1.obj and file2.obj. The symbol begin is the entry point; begin must be defined as external in file1 or file2.
cl55 --run_linker --entry_point=begin file1.obj file2.obj
9.4.9 Set Default Fill Value (--fill_value Option)
The --fill_value option fills the holes formed within output sections. The syntax for the option is:
--fill_value= value
The argument value is a 32-bit constant (up to eight hexadecimal digits). If you do not use --fill_value, the linker uses 0 as the default fill value.
This example fills holes with the hexadecimal value ABCDABCD: cl55 --run_linker --fill_value=0xABCDABCD file1.obj file2.obj
9.4.10 Define Heap Size (--heap_size Option)
The C/C++ compiler uses an uninitialized section called .sysmem for the C run-time memory pool used by malloc(). You can set the size of this memory pool at link time by using the --heap_size option. The syntax for the --heap_size option is:
--heap_size= size
The size must be a constant. This example defines a 4K byte heap: cl55 --run_linker --heap_size=0x1000 /* defines a 4k heap (.sysmem section)*/
The linker creates the .sysmem section only if there is a .sysmem section in an input file.
The linker also creates a global symbol __SYSMEM_SIZE and assigns it a value equal to the size of the heap. The default size is 2K bytes.
For more information about C/C++ linking, see
9.4.11 Hiding Symbols
Symbol hiding prevents the symbol from being listed in the output file's symbol table. While localization is used to prevent name space clashes in a link unit, symbol hiding is used to obscure symbols which should not be visible outside a link unit. Such symbol ’ s names appear only as empty strings or “ no name ” in object file readers. The linker supports symbol hiding through the --hide and --unhide options.
The syntax for these options are:
--hide=' pattern '
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--unhide=' pattern '
The pattern is a string with optional wildcards ? or *. Use ? to match a single character and use * to match zero or more characters.
The --hide option hides global symbols which have a linkname matching the pattern. It hides the symbols matching the pattern by changing the name to an empty string. A global symbol which is hidden is also localized.
The --unhide option reveals (un-hides) global symbols that match the pattern that are hidden by the --hide option. The --unhide option excludes symbols that match pattern from symbol hiding provided the pattern defined by --unhide is more restrictive than the pattern defined by --hide.
These options have the following properties:
• The --hide and --unhide options can be specified more than once on the command line.
• The order of --hide and --unhide has no significance.
• A symbol is matched by only one pattern defined by either --hide or --unhide.
• A symbol is matched by the most restrictive pattern. Pattern A is considered more restrictive than
Pattern B, if Pattern A matches a narrower set than Pattern B.
• It is an error if a symbol matches patterns from --hide and --unhide and if one does not supersede other. Pattern A supersedes pattern B if A can match everything B can, and some more. If Pattern A supersedes Pattern B, then Pattern B is said to more restrictive than Pattern A.
• These options affect final and partial linking.
In map files these symbols are listed under the Hidden Symbols heading.
9.4.12 Alter the Library Search Algorithm (--library Option, --search_path Option, and
C55X_C_DIR Environment Variable)
Usually, when you want to specify a file as linker input, you simply enter the filename; the linker looks for the file in the current directory. For example, suppose the current directory contains the library object.lib.
Assume that this library defines symbols that are referenced in the file file1.obj. This is how you link the files: cl55 --run_linker file1.obj object.lib
If you want to use a file that is not in the current directory, use the --library linker option. The --library option's short form is -l. The syntax for this option is:
--library=[pathname] filename
The filename is the name of an archive, an object file, or link command file. You can specify up to 128 search paths.
The --library option is not required when one or more members of an object library are specified for input to an output section. For more information about allocating archive members, see
You can augment the linker's directory search algorithm by using the --search_path linker option or the
C55X_C_DIR environment variable. The linker searches for object libraries and command files in the following order:
1. It searches directories named with the --search_path linker option. The --search_path option must appear before the --Iibrary option on the command line or in a command file.
2. It searches directories named with C55X_C_DIR.
3. If C55X_C_DIR is not set, it searches directories named with the assembler's C55X_A_DIR environment variable.
4. It searches the current directory.
9.4.12.1 Name an Alternate Library Directory (--search_path Option)
The --search_path option names an alternate directory that contains input files. The --search_path option's short form is I . The syntax for this option is:
--search_path= pathname
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The pathname names a directory that contains input files.
When the linker is searching for input files named with the --library option, it searches through directories named with --search_path first. Each --search_path option specifies only one directory, but you can have several --search_path options per invocation. When you use the --search_path option to name an alternate directory, it must precede any --library option used on the command line or in a command file.
For example, assume that there are two archive libraries called r.lib and lib2.lib that reside in ld and ld2 directories. The table below shows the directories that r.lib and lib2.lib reside in, how to set environment variable, and how to use both libraries during a link. Select the row for your operating system:
Operating System Enter cl55 --run_linker f1.obj f2.obj --search_path=/ld --search_path=/ld2
UNIX (Bourne shell) --library=r.lib --library=lib2.lib
Windows cl55 --run_linker f1.obj f2.obj --search_path=\ld --search_path=\ld2
--library=r.lib --library=lib2.lib
9.4.12.2 Name an Alternate Library Directory (C55X_C_DIR Environment Variable)
An environment variable is a system symbol that you define and assign a string to. The linker uses an environment variable named C55X_C_DIR to name alternate directories that contain object libraries. The command syntaxes for assigning the environment variable are:
Operating System Enter
UNIX (Bourne shell) C55X_C_DIR= " pathname
1
; pathname
2
; . . . " ; export C55X_C_DIR
Windows set C55X_C_DIR= pathname
1
; pathname
2
; . . .
The pathnames are directories that contain input files. Use the --library linker option on the command line or in a command file to tell the linker which library or link command file to search for. The pathnames must follow these constraints:
• Pathnames must be separated with a semicolon.
• Spaces or tabs at the beginning or end of a path are ignored. For example the space before and after the semicolon in the following is ignored: set C55X_C_DIR= c:\path\one\to\tools ; c:\path\two\to\tools
• Spaces and tabs are allowed within paths to accommodate Windows directories that contain spaces.
For example, the pathnames in the following are valid: set C55X_C_DIR=c:\first path\to\tools;d:\second path\to\tools
In the example below, assume that two archive libraries called r.lib and lib2.lib reside in ld and ld2 directories. The table below shows how to set the environment variable, and how to use both libraries during a link. Select the row for your operating system:
Operating System
UNIX (Bourne shell)
Windows
Invocation Command
C55X_C_DIR="/ld ;/ld2"; export C55X_C_DIR; cl55 --run_linker f1.obj f2.obj --library=r.lib --library=lib2.lib
C55X_C_DIR=\ld;\ld2 cl55 --run linker f1.obj f2.obj --library=r.lib --library=lib2.lib
The environment variable remains set until you reboot the system or reset the variable by entering:
Operating System
UNIX (Bourne shell)
Windows
Enter unset C55X_C_DIR set C55X_C_DIR=
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The assembler uses an environment variable named C55X_A_DIR to name alternate directories that contain copy/include files or macro libraries. If C55X_C_DIR is not set, the linker searches for object libraries in the directories named with C55X_A_DIR. For information about C55X_A_DIR, see
. For more information about object libraries, see
9.4.12.3 Exhaustively Read and Search Libraries (--reread_libs and --priority Options)
There are two ways to exhaustively search for unresolved symbols:
• Reread libraries if you cannot resolve a symbol reference (--reread_libs).
• Search libraries in the order that they are specified (--priority).
The linker normally reads input files, including archive libraries, only once when they are encountered on the command line or in the command file. When an archive is read, any members that resolve references to undefined symbols are included in the link. If an input file later references a symbol defined in a previously read archive library, the reference is not resolved.
With the --reread_libs option, you can force the linker to reread all libraries. The linker rereads libraries until no more references can be resolved. Linking using --reread_libs may be slower, so you should use it only as needed. For example, if a.lib contains a reference to a symbol defined in b.lib, and b.lib contains a reference to a symbol defined in a.lib, you can resolve the mutual dependencies by listing one of the libraries twice, as in: cl55 --run_linker --library=a.lib --library=b.lib --library=a.lib
or you can force the linker to do it for you: cl55 --run_linker --reread_libs --library=a.lib --library=b.lib
The --priority option provides an alternate search mechanism for libraries. Using --priority causes each unresolved reference to be satisfied by the first library that contains a definition for that symbol. For example: objfile references A lib1 defines B lib2 defines A, B; obj defining A references B
% cl55 --run_linker objfile lib1 lib2
Under the existing model, objfile resolves its reference to A in lib2, pulling in a reference to B, which resolves to the B in lib2.
Under --priority, objfile resolves its reference to A in lib2, pulling in a reference to B, but now B is resolved by searching the libraries in order and resolves B to the first definition it finds, namely the one in lib1.
The --priority option is useful for libraries that provide overriding definitions for related sets of functions in other libraries without having to provide a complete version of the whole library.
For example, suppose you want to override versions of malloc and free defined in the rts55.lib without providing a full replacement for rts55.lib. Using --priority and linking your new library before rts55.lib
guarantees that all references to malloc and free resolve to the new library.
The --priority option is intended to support linking programs with SYS/BIOS where situations like the one illustrated above occur.
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9.4.13 Change Symbol Localization
Symbol localization changes symbol linkage from global to local (static). This is used to obscure global symbols in a library which should not be visible outside the library, but must be global because they are accessed by several modules in the library. The linker supports symbol localization through the --localize and --globalize linker options.
The syntax for these options are:
--localize=' pattern '
--globalize=' pattern '
The pattern is a string with optional wild cards ? or *. Use ? to match a single character and use * to match zero or more characters.
The --localize option changes the symbol linkage to local for symbols matching the pattern.
The --globalize option changes the symbol linkage to global for symbols matching the pattern. The
--globalize option only affects symbols that are localized by the --localize option. The --globalize option excludes symbols that match the pattern from symbol localization, provided the pattern defined by
--globalize is more restrictive than the pattern defined by --localize.
Specifying C/C++ Symbols with --localize and --globalize
NOTE: For COFF ABI, the compiler prepends an underscore _ to the beginning of all C/C++ identifiers. That is, for a function named foo2(), foo2() is prefixed with _ and _foo2 becomes the link-time symbol. The --localize and --globalize options accept the link-time symbols.
Thus, you specify --localize='_foo2' to localize the C function _foo2(). For more information on linknames see the C/C++ Language Implementation chapter in the TMS320C55x
Optimizing C/C++ Compiler User's Guide.
These options have the following properties:
• The --localize and --globalize options can be specified more than once on the command line.
• The order of --localize and --globalize options has no significance.
• A symbol is matched by only one pattern defined by either --localize or --globalize.
• A symbol is matched by the most restrictive pattern. Pattern A is considered more restrictive than
Pattern B, if Pattern A matches a narrower set than Pattern B.
• It is an error if a symbol matches patterns from --localize and --globalize and if one does not supersede other. Pattern A supersedes pattern B if A can match everything B can, and some more. If Pattern A supersedes Pattern B, then Pattern B is said to more restrictive than Pattern A.
• These options affect final and partial linking.
In map files these symbols are listed under the Localized Symbols heading.
9.4.13.1 Make All Global Symbols Static (--make_static Option)
The --make_static option makes all global symbols static. Static symbols are not visible to externally linked modules. By making global symbols static, global symbols are essentially hidden. This allows external symbols with the same name (in different files) to be treated as unique.
The --make_static option effectively nullifies all .global assembler directives. All symbols become local to the module in which they are defined, so no external references are possible. For example, assume file1.obj and file2.obj both define global symbols called EXT. By using the --make_static option, you can link these files without conflict. The symbol EXT defined in file1.obj is treated separately from the symbol
EXT defined in file2.obj.
cl55 --run_linker --make_static file1.obj file2.obj
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9.4.13.2 Make a Symbol Global (--make_global Option)
The --make_static option makes all global symbols static. If you have a symbol that you want to remain global and you use the --make_static option, you can use the --make_global option to declare that symbol to be global. The --make_global option overrides the effect of the --make_static option for the symbol that you specify. The syntax for the --make_global option is:
--make_global= global_symbol
9.4.14 Create a Map File (--map_file Option)
The syntax for the --map_file option is:
--map_file= filename
The linker map describes:
• Memory configuration
• Input and output section allocation
• Linker-generated copy tables
• The addresses of external symbols after they have been relocated
• Hidden and localized symbols
The map file contains the name of the output module and the entry point; it can also contain up to three tables:
• A table showing the new memory configuration if any nondefault memory is specified (memory configuration). The table has the following columns; this information is generated on the basis of the information in the MEMORY directive in the link command file:
– Name. This is the name of the memory range specified with the MEMORY directive.
– Origin. This specifies the starting address of a memory range.
– Length. This specifies the length of a memory range.
– Unused. This specifies the total amount of unused (available) memory in that memory area.
– Attributes. This specifies one to four attributes associated with the named range:
I
X
R specifies that the memory can be read.
W specifies that the memory can be written to.
specifies that the memory can contain executable code.
specifies that the memory can be initialized.
For more information about the MEMORY directive, see
.
• A table showing the linked addresses of each output section and the input sections that make up the output sections (section allocation map). This table has the following columns; this information is generated on the basis of the information in the SECTIONS directive in the link command file:
– Output section. This is the name of the output section specified with the SECTIONS directive.
– Origin. The first origin listed for each output section is the starting address of that output section.
The indented origin value is the starting address of that portion of the output section.
– Length. The first length listed for each output section is the length of that output section. The indented length value is the length of that portion of the output section.
– Attributes/input sections. This lists the input file or value associated with an output section. If the input section could not be allocated, the map file will indicate this with "FAILED TO ALLOCATE".
For more information about the SECTIONS directive, see
• A table showing each external symbol and its address sorted by symbol name.
• A table showing each external symbol and its address sorted by symbol address.
The following example links file1.obj and file2.obj and creates a map file called map.out: cl55 --run_linker file1.obj file2.obj --map_file=map.out
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shows an example of a map file.
Linker Options
9.4.15 Managing Map File Contents (--mapfile_contents Option)
The --mapfile_contents option assists with managing the content of linker-generated map files. The syntax for the --mapfile_contents option is:
--mapfile_contents= filter[, filter]
When the --map_file option is specified, the linker produces a map file containing information about memory usage, placement information about sections that were created during a link, details about linker-generated copy tables, and symbol values.
The new --mapfile_contents option provides a mechanism for you to control what information is included in or excluded from a map file. When you specify --mapfile_contents=help from the command line, a help screen listing available filter options is displayed.
The following filter options are available:
Attribute copytables entry load_addr memory sections sym_defs sym_name sym_runaddr all none
Description
Copy tables
Entry point
Display load addresses
Memory ranges
Sections
Defined symbols per file
Symbols sorted by name
Symbols sorted by run address
Enables all attributes
Disables all attributes
On
Off
On
On
Default State
On
On
Off
On
The --mapfile_contents option controls display filter settings by specifying a comma-delimited list of display attributes. When prefixed with the word no, an attribute is disabled instead of enabled. For example:
--mapfile_contents=copytables,noentry
--mapfile_contents=all,nocopytables
--mapfile_contents=none,entry
By default, those sections that are currently included in the map file when the --map_file option is specified are included. The filters specified in the --mapfile_contents options are processed in the order that they appear in the command line. In the third example above, the first filter, none, clears all map file content.
The second filter, entry, then enables information about entry points to be included in the generated map file. That is, when --mapfile_contents=none,entry is specified, the map file contains only information about entry points.
There are two new filters included with the --mapfile_contents option, load_addr and sym_defs. These are both disabled by default. If you turn on the load_addr filter, the map file includes the load address of symbols that are included in the symbol list in addition to the run address (if the load address is different from the run address).
The sym_defs filter can be used to include information about all static and global symbols defined in an application on a file by file basis. You may find it useful to replace the sym_name and sym_runaddr sections of the map file with the sym_defs section by specifying the following --mapfile_contents option:
--mapfile_contents=nosym_name,nosym_runaddr,sym_defs
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9.4.16 Disable Name Demangling (--no_demangle)
By default, the linker uses demangled symbol names in diagnostics. For example: undefined symbol
ANewClass::getValue() first referenced in file test.obj
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The --no_demangle option disables the demangling of symbol names in diagnostics. For example: undefined symbol
_ZN9ANewClass8getValueEv first referenced in file test.obj
9.4.17 Disable Merge of Symbolic Debugging Information (--no_sym_merge Option)
By default, the linker eliminates duplicate entries of symbolic debugging information. Such duplicate information is commonly generated when a C program is compiled for debugging. For example:
-[ header.h ]typedef struct
{
<define some structure members>
} XYZ;
-[ f1.c ]-
#include "header.h"
...
-[ f2.c ]-
#include "header.h"
...
When these files are compiled for debugging, both f1.obj and f2.obj have symbolic debugging entries to describe type XYZ. For the final output file, only one set of these entries is necessary. The linker eliminates the duplicate entries automatically.
Use the COFF only --no_sym_merge option if you want the linker to keep such duplicate entries in COFF object files. Using the --no_sym_merge option has the effect of the linker running faster and using less host memory during linking, but the resulting executable file may be very large due to duplicated debug information.
9.4.18 Strip Symbolic Information (--no_symtable Option)
The --no_symtable option creates a smaller output module by omitting symbol table information and line number entries. The --no_sym_table option is useful for production applications when you do not want to disclose symbolic information to the consumer.
This example links file1.obj and file2.obj and creates an output module, stripped of line numbers and symbol table information, named nosym.out: cl55 --run_linker --output_file=nosym.out --no_symtable file1.obj file2.obj
Using the --no_symtable option limits later use of a symbolic debugger.
Stripping Symbolic Information
NOTE: The --no_symtable option is deprecated. To remove symbol table information, use the strip55 utility as described in
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9.4.19 Name an Output Module (--output_file Option)
The linker creates an output module when no errors are encountered. If you do not specify a filename for the output module, the linker gives it the default name a.out. If you want to write the output module to a different file, use the --output_file option. The syntax for the --output_file option is:
--output_file= filename
The filename is the new output module name.
This example links file1.obj and file2.obj and creates an output module named run.out: cl55 --run_linker --output_file=run.out file1.obj file2.obj
9.4.20 C Language Options (--ram_model and --rom_model Options)
The --ram_model and --rom_model options cause the linker to use linking conventions that are required by the C compiler.
• The --ram_model option tells the linker to initialize variables at load time.
• The --rom_model option tells the linker to autoinitialize variables at run time.
For more information, see
9.4.21 Create an Absolute Listing File (--run_abs Option)
The --run_abs option produces an output file for each file that was linked. These files are named with the input filenames and an extension of .abs. Header files, however, do not generate a corresponding .abs
file.
9.4.22 Scan All Libraries for Duplicate Symbol Definitions (--scan_libraries)
The --scan_libraries option scans all libraries during a link looking for duplicate symbol definitions to those symbols that are actually included in the link. The scan does not consider absolute symbols or symbols defined in COMDAT sections. The --scan_libraries option helps determine those symbols that were actually chosen by the linker over other existing definitions of the same symbol in a library.
The library scanning feature can be used to check against unintended resolution of a symbol reference to a definition when multiple definitions are available in the libraries.
9.4.23 Define Stack Size (--stack_size Option)
The TMS320C55x C/C++ compiler uses an uninitialized section, .stack, to allocate space for the run-time stack. You can set the size of this section in bytes at link time with the --stack_size option. The syntax for the --stack_size option is:
--stack_size= size
The size must be a constant and is in bytes. This example defines a 4K byte stack: cl55 --run_linker --stack_size=0x1000 /* defines a 4K heap (.stack section)*/
If you specified a different stack size in an input section, the input section stack size is ignored. Any symbols defined in the input section remain valid; only the stack size is different.
When the linker defines the .stack section, it also defines a global symbol, __STACK_SIZE, and assigns it a value equal to the size of the section. The default software stack size is 1K bytes.
Allocation of .stack and .sysstack Sections
NOTE: The .stack and .sysstack sections must be allocated on the same 64K-word data page.
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9.4.24 Enforce Strict Compatibility (--strict_compatibility Option)
The linker performs more conservative and rigorous compatibility checking of input object files when you specify the --strict_compatibility option. Using this option guards against additional potential compatibility issues, but may signal false compatibility errors when linking in object files built with an older toolset, or with object files built with another compiler vendor's toolset. To avoid issues with legacy libraries, the
--strict_compatibility option is turned off by default.
9.4.25 Mapping of Symbols (--symbol_map Option)
Symbol mapping allows a symbol reference to be resolved by a symbol with a different name. Symbol mapping allows functions to be overridden with alternate definitions. This feature can be used to patch in alternate implementations, which provide patches (bug fixes) or alternate functionality. The syntax for the
--symbol_map option is:
--symbol_map= refname=defname
For example, the following code makes the linker resolve any references to foo by the definition foo_patch:
--symbol_map='foo=foo_patch'
9.4.26 Define Secondary Stack Size (--sysstack Option)
The TMS320C55x C/C++ compiler uses an uninitialized section, .sysstack, to allocate space for the secondary run-time stack. You can set the size of this section in bytes at link time with the --sysstack option. The syntax for the --sysstack option is:
--sysstack= size
The size must be a constant and is in bytes. This example defines a 4K byte stack:
--sysstack=0x1000 /* defines the secondary stack size) */
If you specified a different stack size in an input section, the input section stack size is ignored. Any symbols defined in the input section remain valid; only the stack size is different.
When the linker defines the .sysstack section, it also defines a global symbol, __SYSSTACK_SIZE, and assigns it a value equal to the size of the section. The default software stack size is 1K bytes.
9.4.27 Introduce an Unresolved Symbol (--undef_sym Option)
The --undef_sym option introduces the linkname for an unresolved symbol into the linker's symbol table.
This forces the linker to search a library and include the member that defines the symbol. The linker must encounter the --undef_sym option before it links in the member that defines the symbol. The syntax for the
--undef_sym option is:
--undef_sym= symbol
For example, suppose a library named rts55.lib contains a member that defines the symbol symtab; none of the object files being linked reference symtab. However, suppose you plan to relink the output module and you want to include the library member that defines symtab in this link. Using the --undef_sym option as shown below forces the linker to search rts55.lib for the member that defines symtab and to link in the member.
cl55 --run_linker --undef_sym=symtab file1.obj file2.obj rts55.lib
If you do not use --undef_sym, this member is not included, because there is no explicit reference to it in file1.obj or file2.obj.
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Byte/Word Addressing
9.4.28 Display a Message When an Undefined Output Section Is Created (--warn_sections
Option)
The --warn_sections option displays additional messages pertaining to the default creation of output sections. Additional messages are displayed in the following circumstances:
• In a link command file, you can set up a SECTIONS directive that describes how input sections are combined into output sections. However, if the linker encounters one or more input sections that do not have a corresponding output section defined in the SECTIONS directive, the linker combines the input sections that have the same name into an output section with that name. By default, the linker does not display a message to tell you that this occurred.
If this situation occurs and you use the --warn_section option, the linker displays a message when it creates a new output section.
• If you do not use the --heap, --stack_size, and --sysstack options, the linker creates the .sysmem,
.stack, and .sysstack (respectively) sections for you. The .sysmem section has a default size of 2K bytes; the .stack and .sysstack sections have a default size of 1K bytes. You might not have enough memory available for one or all of these sections. In this case, the linker issues an error message saying a section could not be allocated.
If you use the --warn_section option, the linker displays another message with more details, which includes the name of the directive to allocate the .sysmem or .stack section yourself.
Allocation of .stack and .sysstack Sections
NOTE: The .stack and .sysstack sections must be allocated on the same 64K-word data page.
For more information about the SECTIONS directive, see
. For more information about the
default actions of the linker, see
.
9.4.29 Generate XML Link Information File (--xml_link_info Option)
The linker supports the generation of an XML link information file through the --xml_link_info=file option.
This option causes the linker to generate a well-formed XML file containing detailed information about the result of a link. The information included in this file includes all of the information that is currently produced in a linker generated map file.
See
for specifics on the contents of the generated XML file.
9.5
Byte/Word Addressing
C55x memory is byte-addressable for code and word-addressable for data. The assembler and linker keep track of the addresses, relative offsets, and sizes of the bits in units that are appropriate for the given section: words for data sections, and bytes for code sections.
Use Byte Addresses in Linker Command File
NOTE: All addresses and sizes supplied in the linker command file should be byte addresses, for both code and data sections.
In the case of program labels, the unchanged byte addresses are encoded in the executable output and during execution sent over the program address bus. In the case of data labels, the byte addresses are divided by 2 in the linker (converting them to word addresses) prior to being encoded in the executable output and sent over the data address bus.
The .map file created by the linker shows code addresses and sizes in bytes, and data addresses and sizes in words.
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9.6
Linker Command Files
Linker command files allow you to put linking information in a file; this is useful when you invoke the linker often with the same information. Linker command files are also useful because they allow you to use the
MEMORY and SECTIONS directives to customize your application. You must use these directives in a command file; you cannot use them on the command line.
Linker command files are ASCII files that contain one or more of the following:
• Input filenames, which specify object files, archive libraries, or other command files. (If a command file calls another command file as input, this statement must be the last statement in the calling command file. The linker does not return from called command files.)
• Linker options, which can be used in the command file in the same manner that they are used on the command line
• The MEMORY and SECTIONS linker directives. The MEMORY directive defines the target memory configuration (see
). The SECTIONS directive controls how sections are built and allocated (see
• Assignment statements, which define and assign values to global symbols
To invoke the linker with a command file, enter the cl55 --run_linker command and follow it with the name of the command file:
cl55 --run_linker command_filename
The linker processes input files in the order that it encounters them. If the linker recognizes a file as an object file, it links the file. Otherwise, it assumes that a file is a command file and begins reading and processing commands from it. Command filenames are case sensitive, regardless of the system used.
shows a sample link command file called link.cmd.
Example 9-1. Linker Command File a.obj
b.obj
/* First input filename
/* Second input filename
*/
*/
--output_file=prog.out
/* Option to specify output file */
--map_file=prog.map
/* Option to specify map file */
The sample file in
contains only filenames and options. (You can place comments in a command file by delimiting them with /* and */.) To invoke the linker with this command file, enter: cl55 --run_linker link.cmd
You can place other parameters on the command line when you use a command file: cl55 --run_linker --relocatable link.cmd c.obj d.obj
The linker processes the command file as soon as it encounters the filename, so a.obj and b.obj are linked into the output module before c.obj and d.obj.
You can specify multiple command files. If, for example, you have a file called names.lst that contains filenames and another file called dir.cmd that contains linker directives, you could enter: cl55 --run_linker names.lst dir.cmd
One command file can call another command file; this type of nesting is limited to 16 levels. If a command file calls another command file as input, this statement must be the last statement in the calling command file.
Blanks and blank lines are insignificant in a command file except as delimiters. This also applies to the format of linker directives in a command file.
shows a sample command file that contains linker directives.
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Example 9-2. Command File With Linker Directives a.obj b.obj c.obj
--output_file=prog.out
--map_file=prog.map
/* Input filenames
/* Options
MEMORY
{
FAST_MEM: origin = 0x0100
SLOW_MEM: origin = 0x1000
/* MEMORY directive length = 0x0100 length = 0x0100
}
/* SECTIONS directive SECTIONS
{
.text: > SLOW_MEM
.data: > FAST_MEM
.bss: > FAST_MEM
}
*/
*/
*/
*/
Linker Command Files
For more information, see
for the MEMORY directive, and
for the SECTIONS directive.
9.6.1 Reserved Names in Linker Command Files
The following names (in lowercase also) are reserved as keywords for linker directives. Do not use them as symbol or section names in a command file.
ALIGN
ATTR
FILL
GROUP
BLOCK HIGH
COMPRESSION l (lowercase L)
COPY
DSECT f
END len
LENGTH
LOAD
LOAD_END
LOAD_SIZE
LOAD_START
MEMORY
NOINIT
NOLOAD o org
ORIGIN
PAGE
PALIGN
RUN
RUN_END
RUN_SIZE
RUN_START
SECTIONS
SIZE
START
TABLE
TYPE
UNION
UNORDERED
9.6.2 Constants in Linker Command Files
You can specify constants with either of two syntax schemes: the scheme used for specifying decimal, octal, or hexadecimal constants used in the assembler (see
) or the scheme used for integer
constants in C syntax.
Examples:
Format
Assembler format
C format
Decimal
32
32
Octal
40q
040
Hexadecimal
020h
0x20
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9.6.3 The MEMORY Directive
The linker determines where output sections are allocated into memory; it must have a model of target memory to accomplish this. The MEMORY directive allows you to specify a model of target memory so that you can define the types of memory your system contains and the address ranges they occupy. The linker maintains the model as it allocates output sections and uses it to determine which memory locations can be used for object code.
The memory configurations of TMS320C55x systems differ from application to application. The MEMORY directive allows you to specify a variety of configurations. After you use MEMORY to define a memory model, you can use the SECTIONS directive to allocate output sections into defined memory.
For more information, see
and
9.6.3.1
Default Memory Model
The assembler enables you to assemble code for the TMS320C55x device. The assembler inserts a field in the output file ’ s header, identifying the device. The linker reads this information from the object file ’ s header. If you do not use the MEMORY directive, the linker uses a default memory model. For more information about the default memory model, see
9.6.3.2
MEMORY Directive Syntax
The MEMORY directive identifies ranges of memory that are physically present in the target system and can be used by a program. Each range has several characteristics:
• Page
• Name
• Starting address
• Length
• Optional set of attributes
• Optional fill specification
By default, the linker uses a single address space on PAGE 0. However, the linker allows you to configure separate address spaces by using the MEMORY directive ’ s PAGE option. The PAGE option causes the linker to treat the specified pages as completely separate memory spaces. C55x supports as many as 255
PAGES, but the number available to you depends on the configuration you have chosen.
When you use the MEMORY directive, be sure to identify all memory ranges that are available for loading code. Memory defined by the MEMORY directive is configured; any memory that you do not explicitly account for with MEMORY is unconfigured. The linker does not place any part of a program into unconfigured memory. You can represent nonexistent memory spaces by simply not including an address range in a MEMORY directive statement.
The MEMORY directive is specified in a command file by the word MEMORY (uppercase), followed by a list of memory range specifications enclosed in braces.
shows a sample command file with the MEMORY directive. (For details on the start/end/size address operators see
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Example 9-3. The MEMORY Directive
/**************************************************/
/* Sample command file with MEMORY directive */
/**************************************************/ file1.obj file2.obj
/* Input files */
--output_file=prog.out
/* Options */
MEMORY
{
SLOW_MEM:
SCRATCH:
FAST_MEM: origin = 0x1C00, length = 0x1000 origin = 0x0060, length = 0x0020 origin = 0x0080, length = 0x1000
}
Linker Command Files
The general syntax for the MEMORY directive is:
MEMORY
{
.
.
[PAGE 0:] name 1 [( attr )] : origin = expression , length = expression [, fill = constant]
[PAGE 1:] name 2 [( attr )] : origin = expression , length = expression [, fill = constant];
[PAGE n:] name n [( attr )] : origin = expression , length = expression [, fill = constant]
}
PAGE name attr origin length identifies a memory space. You can specify up to 255 pages, depending on your configuration; usually, PAGE 0 specifies program memory, and PAGE 2 specifies peripheral memory. If you do not specify a PAGE, the linker acts as if you specified PAGE
0. Each PAGE represents a completely independent address space. Configured memory on PAGE 0 can overlap configured memory on PAGE 2.
names a memory range. A memory name can be one to 64 characters; valid characters include A-Z, a-z, $, ., and _. The names have no special significance to the linker; they simply identify memory ranges. Memory range names are internal to the linker and are not retained in the output file or in the symbol table. All memory ranges must have unique names and must not overlap.
specifies one to four attributes associated with the named range. Attributes are optional; when used, they must be enclosed in parentheses. Attributes restrict the allocation of output sections into certain memory ranges. If you do not use any attributes, you can allocate any output section into any range with no restrictions. Any memory for which no attributes are specified (including all memory in the default model) has all four attributes.
Valid attributes are:
R specifies that the memory can be read.
W specifies that the memory can be written to.
I
X specifies that the memory can contain executable code.
specifies that the memory can be initialized.
specifies the starting address of a memory range; enter as origin, org, or o. The value, specified in bytes, is an expression of 24-bit constants, which can be decimal, octal, or hexadecimal.
specifies the length of a memory range; enter as length, len, or l. The value, specified in bytes, is an expression of 24-bit constants, which can be decimal, octal, or hexadecimal.
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Linker Command Files fill www.ti.com
specifies a fill character for the memory range; enter as fill or f. Fills are optional. The value is a 2-byte integer constant and can be decimal, octal, or hexadecimal. The fill value is used to fill areas of the memory range that are not allocated to a section.
Filling Memory Ranges
NOTE: If you specify fill values for large memory ranges, your output file will be very large because filling a memory range (even with 0s) causes raw data to be generated for all unallocated blocks of memory in the range.
The following example specifies a memory range with the R and W attributes and a fill constant of
0FFFFh:
MEMORY
{
RFILE (RW) : o = 0x0020, l = 0x00FE, f = 0x0FFF
}
You normally use the MEMORY directive in conjunction with the SECTIONS directive to control allocation of output sections. After you use MEMORY to specify the target system's memory model, you can use
SECTIONS to allocate output sections into specific named memory ranges or into memory that has specific attributes. For example, you could allocate the .text and .data sections into the area named
FAST_MEM and allocate the .bss section into the area named SLOW_MEM.
illustrates the memory map shown in
0x0000
Figure 9-2. Memory Map Defined in
Data memory
0x0000
Program memory
0x005F
0x0060
0x007F
0x0080
SCRATCH
FAST_MEM
0x107F
0x1080
On-chip
RAM
0x0C00
SLOW_MEM
On-chip
ROM
0x1C00
0xFFFF 0xFFFF
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Linker Command Files
9.6.3.3
Expressions and Address Operators
Memory range origin and length can now use expressions of integer constants with below operators:
Binary operators:
Unary operators:
* / % + << >> == =
< < = > > = & | && ||
- ~ !
Expressions are evaluated using standard C operator precedence rules.
No checking is done for overflow or underflow, however, expressions are evaluated using a larger integer type.
Preprocess directive #define constants can be used in place of integer constants. Global symbols cannot be used in Memory Directive expressions.
Three new address operators have been added for referencing memory range properties from prior memory range entries:
START(MR[,PAGE]) Returns start address for previously defined memory range MR.
SIZE(MR[,PAGE]) Returns size of previously defined memory range MR.
END(MR[,PAGE]) Returns end address for previously defined memory range MR.
NOTE: If no PAGE information is input then PAGE=0.
Example 9-4. Origin and Length as Expressions
/********************************************************/
/* Sample command file with MEMORY directive */
/********************************************************/ file1.obj file2.obj
/* Input files */
--output_file=prog.out
#define ORIGIN 0x00000000
/* Options */
#define BUFFER 0x00000200
#define CACHE 0x0001000
MEMORY
{
FAST_MEM (RX): origin = ORIGIN + CACHE length = 0x00001000 + BUFFER
SLOW_MEM (RW): origin = end(FAST_MEM) length = 0x00001800 - size(FAST_MEM)
EXT_MEM (RX): origin = 0x10000000 length = size(FAST_MEM) - CACHE
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9.6.4 The SECTIONS Directive
The SECTIONS directive controls your sections in the following ways:
• Describes how input sections are combined into output sections
• Defines output sections in the executable program
• Specifies where output sections are placed in memory (in relation to each other and to the entire memory space)
• Permits renaming of output sections
For more information, see
, and
manipulate sections with greater precision.
If you do not specify a SECTIONS directive, the linker uses a default algorithm for combining and allocating the sections.
describes this algorithm in detail.
9.6.4.1
SECTIONS Directive Syntax
The SECTIONS directive is specified in a command file by the word SECTIONS (uppercase), followed by a list of output section specifications enclosed in braces.
The general syntax for the SECTIONS directive is:
SECTIONS
{
name : [property [, property] [, property] . . . ]
name : [property [, property] [, property] . . . ]
name : [property [, property] [, property] . . . ]
}
Each section specification, beginning with name, defines an output section. (An output section is a section in the output file.) A section name can be a subsection specification. (See
for information on multi-level subsections.) After the section name is a list of properties that define the section's contents and how the section is allocated. The properties can be separated by optional commas. Possible properties for a section are as follows:
• Load allocation defines where in memory the section is to be loaded.
Syntax: load = allocation or allocation
> allocation or
• Run allocation defines where in memory the section is to be run.
Syntax: run = allocation or run > allocation
• Input sections defines the input sections (object files) that constitute the output section.
Syntax: { input_sections }
• Section type defines flags for special section types. See
Syntax: type = COPY or type = DSECT type = NOLOAD or
• Fill value defines the value used to fill uninitialized holes. See
Syntax: fill = value or
name : [properties = value]
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shows a SECTIONS directive in a sample link command file.
Example 9-5. The SECTIONS Directive
/**************************************************/
/* Sample command file with SECTIONS directive */
/**************************************************/ file1.obj
file2.obj
/* Input files */
--output_file=prog.out
/* Options */
SECTIONS
{
.text:
.const:
.bss:
.vectors:
{ load = EXT_MEM, run = 0x0800 load = FAST_MEM load = SLOW_MEM load = 0x0000 t1.obj(.intvec1) t2.obj(.intvec2) endvec = .;
}
.data:alpha: align = 16
.data:beta: align = 16
}
Linker Command Files
shows the six output sections defined by the SECTIONS directive in
(.vectors,
.text, .const, .bss, .data:alpha, and .data:beta) and shows how these sections are allocated in memory using the MEMORY directive given in
.
Figure 9-3. Section Allocation Defined by
0x0000 0000
FAST_MEM
.bss
- Allocated in
FAST_MEM
The .bss section combines the .bss sections from file1.obj and file2.obj.
.data:alpha
- Allocated on
16-byte boundary
The .data section combines the .data sections from file1.obj and file2.obj. The linker places it anywhere space for it is available in FAST_MEM in this illustration) and aligns it to a 16-word boundary.
.data:beta
0x0000 FF80
SLOW_MEM
.text
.const
.vectors
- Allocated in
SLOW_MEM
- Allocated in
SLOW_MEM
The .text section combines the .text sections from file1.obj and file2.obj. The linker combines all sections named .text into this section. The application must relocate the section to run at 0x0000 0800.
The .const section combines the .const sections from file1.obj and file2.obj.
- Bound at
0x0000 FF80h
The .vectors section is composed of the .intvec1
section from t1.obj and the .intvec2 section from t2.obj.
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9.6.4.2
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The linker assigns each output section two locations in target memory: the location where the section will be loaded and the location where it will be run. Usually, these are the same, and you can think of each section as having only a single address. The process of locating the output section in the target's memory and assigning its address(es) is called allocation. For more information about using separate load and run allocation, see
If you do not tell the linker how a section is to be allocated, it uses a default algorithm to allocate the section. Generally, the linker puts sections wherever they fit into configured memory. You can override this default allocation for a section by defining it within a SECTIONS directive and providing instructions on how to allocate it.
You control allocation by specifying one or more allocation parameters. Each parameter consists of a keyword, an optional equal sign or greater-than sign, and a value optionally enclosed in parentheses. If load and run allocation are separate, all parameters following the keyword LOAD apply to load allocation, and those following the keyword RUN apply to run allocation. The allocation parameters are:
Binding allocates a section at a specific address.
.text: load = 0x1000
Named memory allocates the section into a range defined in the MEMORY directive with the specified name (like SLOW_MEM) or attributes.
.text: load > SLOW_MEM
Alignment uses the align or palign keyword to specify that the section must start on an address boundary.
.text: align = 0x100
Splitting
Blocking
Page
To force the output section containing the assignment to also be aligned, assign .
(dot) with an align expression. For example, the following will align bar.obj, and it will force outsect to align on a 0x40 byte boundary:
SECTIONS
{ outsect: { bar.obj(.bss)
. = align(0x40);
}
} uses the split operator to list memory areas in which the section can be placed.
.text: >> ROM1|ROM2|ROM3 uses the block keyword to specify that the section must fit between two address boundaries: if the section is too big, it starts on an address boundary.
.text: block(0x100) specifies the memory page to be used (see
the linker allocates initialized sections to PAGE 0 (program memory) and uninitialized sections to PAGE 1 (data memory).
.text: PAGE 0
For the load (usually the only) allocation, you can simply use a greater-than sign and omit the load keyword:
.text: > SLOW_MEM
.text: {...} > SLOW_MEM
.text: > 0x4000
If more than one parameter is used, you can string them together as follows:
.text: > SLOW_MEM align 16 PAGE 2
Or if you prefer, use parentheses for readability:
.text: load = (SLOW_MEM align(16)) page 2
You can also use an input section specification to identify the sections from input files that are combined to form an output section. See
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9.6.4.2.1 Binding
You can supply a specific starting address for an output section by following the section name with an address:
.text: 0x00001000
This example specifies that the .text section must begin at location 0x1000. The binding address must be a 24-bit constant.
Output sections can be bound anywhere in configured memory (assuming there is enough space), but they cannot overlap. If there is not enough space to bind a section to a specified address, the linker issues an error message.
Binding is Incompatible With Alignment and Named Memory
NOTE: You cannot bind a section to an address if you use alignment or named memory. If you try to do this, the linker issues an error message.
9.6.4.2.2 Named Memory
You can allocate a section into a memory range that is defined by the MEMORY directive (see
). This example names ranges and links sections into them:
MEMORY
{
SLOW_MEM (RIX) : origin = 0x00000000, length = 0x00001000
FAST_MEM (RWIX) : origin = 0x03000000, length = 0x00000300
}
SECTIONS
{
.text
: > SLOW_MEM
.data
: > FAST_MEM ALIGN(128)
.bss
: > FAST_MEM
}
In this example, the linker places .text into the area called SLOW_MEM. The .data and .bss output sections are allocated into FAST_MEM. You can align a section within a named memory range; the .data
section is aligned on a 128-byte boundary within the FAST_MEM range.
Similarly, you can link a section into an area of memory that has particular attributes. To do this, specify a set of attributes (enclosed in parentheses) instead of a memory name. Using the same MEMORY directive declaration, you can specify:
SECTIONS
{
.text: > (X) /* .text --> executable memory
.data: > (RI) /* .data --> read or init memory
.bss : > (RW) /* .bss --> read or write memory
}
*/
*/
*/
In this example, the .text output section can be linked into either the SLOW_MEM or FAST_MEM area because both areas have the X attribute. The .data section can also go into either SLOW_MEM or
FAST_MEM because both areas have the R and I attributes. The .bss output section, however, must go into the FAST_MEM area because only FAST_MEM is declared with the W attribute.
You cannot control where in a named memory range a section is allocated, although the linker uses lower memory addresses first and avoids fragmentation when possible. In the preceding examples, assuming no conflicting assignments exist, the .text section starts at address 0. If a section must start on a specific address, use binding instead of named memory.
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9.6.4.2.3 Controlling Allocation Using The HIGH Location Specifier
The linker allocates output sections from low to high addresses within a designated memory range by default. Alternatively, you can cause the linker to allocate a section from high to low addresses within a memory range by using the HIGH location specifier in the SECTION directive declaration.
For example, given this MEMORY directive:
MEMORY
{
RAM
FLASH
VECTORS
RESET
}
: origin = 0x0200, length = 0x0800
: origin = 0x1100, length = 0xEEE0
: origin = 0xFFE0, length = 0x001E
: origin = 0xFFFE, length = 0x0002 and an accompanying SECTIONS directive:
SECTIONS
{
.bss
: {} > RAM
.sysmem
: {} > RAM
.stack
: {} > RAM (HIGH)
}
The HIGH specifier used on the .stack section allocation causes the linker to attempt to allocate .stack into the higher addresses within the RAM memory range. The .bss and .sysmem sections are allocated into the lower addresses within RAM.
illustrates a portion of a map file that shows where the given sections are allocated within RAM for a typical program.
Example 9-6. Linker Allocation With the HIGH Specifier
.bss
.sysmem
.stack
0
0
0
00000200
00000200
0000031a
000003a2
0000041a
00000460
00000468
0000046c
0000046e
00000270
0000011a
00000088
00000078
00000046
00000008
00000004
00000002
00000002
UNINITIALIZED rtsxxx.lib
: defs.obj (.bss)
: trgdrv.obj (.bss)
: lowlev.obj (.bss)
: exit.obj (.bss)
: memory.obj (.bss)
: _lock.obj (.bss)
: fopen.obj (.bss) hello.obj (.bss)
00000470
00000470
00000120
00000004
000008c0
000008c0
00000140
00000002
UNINITIALIZED rtsxxx .lib : memory.obj (.sysmem)
UNINITIALIZED rtsxxx .lib : boot.obj (.stack)
As shown in
, the .bss and .sysmem sections are allocated at the lower addresses of RAM
(0x0200 - 0x0590) and the .stack section is allocated at address 0x08c0, even though lower addresses are available.
Without using the HIGH specifier, the linker allocation would result in the code shown in
The HIGH specifier is ignored if it is used with specific address binding or automatic section splitting ( >> operator).
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Example 9-7. Linker Allocation Without HIGH Specifier
.bss
0
.stack
.sysmem
0
0
00000200
00000200
0000031a
000003a2
0000041a
00000460
00000468
0000046c
0000046e
00000270
0000011a
00000088
00000078
00000046
00000008
00000004
00000002
00000002
UNINITIALIZED rtsxxx.lib
: defs.obj (.bss)
: trgdrv.obj (.bss)
: lowlev.obj (.bss)
: exit.obj (.bss)
: memory.obj (.bss)
: _lock.obj (.bss)
: fopen.obj (.bss) hello.obj (.bss)
00000470
00000470
00000140
00000002
000005b0
000005b0
00000120
00000004
UNINITIALIZED rtsxxx.lib
: boot.obj (.stack)
UNINITIALIZED rtsxxx.lib
: memory.obj (.sysmem)
Linker Command Files
9.6.4.2.4 Alignment and Blocking
You can tell the linker to place an output section at an address that falls on an n-byte boundary, where n is a power of 2, by using the align keyword. For example, the following code allocates .text so that it falls on a 32-byte boundary:
.text: load = align(32)
You can specify the same alignment with the palign keyword. In addition, palign ensures the section's size is a multiple of its placement alignment restrictions, padding the section size up to such a boundary, as needed.
Blocking is a weaker form of alignment that allocates a section anywhere within a block of size n. The specified block size must be a power of 2. For example, the following code allocates .bss so that the entire section is contained in a single 128-byte page or begins on that boundary: bss: load = block(0x0080)
You can use alignment or blocking alone or in conjunction with a memory area, but alignment and blocking cannot be used together.
9.6.4.2.5 Alignment With Padding
As with align, you can tell the linker to place an output section at an address that falls on an n-byte boundary, where n is a power of 2, by using the palign keyword. In addition, palign ensures that the size of the section is a multiple of its placement alignment restrictions, padding the section size up to such a boundary, as needed.
For example, the following code lines allocate .text on a 2-byte boundary within the PMEM area. The .text
section size is guaranteed to be a multiple of 2 bytes. Both statements are equivalent:
.text: palign(2) {} > PMEM
.text: palign = 2 {} > PMEM
If the linker adds padding to an initialized output section then the padding space is also initialized. By default, padding space is filled with a value of 0 (zero). However, if a fill value is specified for the output section then any padding for the section is also filled with that fill value.
For example, consider the following section specification:
.mytext: palign(8), fill = 0xffffffff {} > PMEM
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In this example, the length of the .mytext section is 6 bytes before the palign operator is applied. The contents of .mytext are as follows: addr content
---- -------
0000 0x1234
0002 0x1234
0004 0x1234
After the palign operator is applied, the length of .mytext is 8 bytes, and its contents are as follows: addr content
---- -------
0000 0x1234
0002 0x1234
0004 0x1234
0006 0xffff
The size of .mytext has been bumped to a multiple of 8 bytes and the padding created by the linker has been filled with 0xff.
The fill value specified in the linker command file is interpreted as a 16-bit constant, so if you specify this code:
.mytext: palign(8), fill = 0xff {} > PMEM
The fill value assumed by the linker is 0x00ff, and .mytext will then have the following contents: addr content
---- -------
0000 0x1234
0002 0x1234
0004 0x1234
0006 0xffff
0008 0x00ff
000a 0x00ff
If the palign operator is applied to an uninitialized section, then the size of the section is bumped to the appropriate boundary, as needed, but any padding created is not initialized.
The palign operator can also take a parameter of power2. This parameter tells the linker to add padding to increase the section's size to the next power of two boundary. In addition, the section is aligned on that power of 2 as well.
For example, consider the following section specification:
.mytext: palign(power2) {} > PMEM
Assume that the size of the .mytext section is 120 bytes and PMEM starts at address 0x10020. After applying the palign(power2) operator, the .mytext output section will have the following properties: name
-------
.mytext
addr
----------
0x00010080 size
-----
0x80 align
-----
128
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9.6.4.2.6 Using the Page Method
Using the page method of specifying an address, you can allocate a section into an address space that is named in the MEMORY directive. For example:
MEMORY
{
PAGE 0 :
PAGE 1 :
PROG
DATA
: origin = 0x00000800, length = 0x00240
: origin = 0x00000A00, length = 0x02200
PAGE 1 : OVR_MEM : origin = 0x00002D00, length = 0x01000
PAGE 2 : DATA : origin = 0x00000A00, length = 0x02200
PAGE 2 : OVR_MEM : origin = 0x00002D00, length = 0x01000
}
SECTIONS
{
.text: PAGE = 0
.data: PAGE = 2
.cinit: PAGE = 0
.bss: PAGE = 1
}
In this example, the .text and .cinit sections are allocated to PAGE 0. They are placed anywhere within the bounds of PAGE 0. The .data section is allocated anywhere within the bounds of PAGE 2. The .bss
section is allocated anywhere within the bounds of PAGE 1.
You can use the page method in conjunction with any of the other methods to restrict an allocation to a specific address space. For example:
.text: load = OVR_MEM PAGE 1
In this example, the .text section is allocated to the named memory range OVR_MEM. There are two named memory ranges called OVR_MEM, however, so you must specify which one is to be used. By adding PAGE 1, you specify the use of the OVR_MEM memory range in address space PAGE 1 rather than in address space PAGE 2. If no PAGE is specified for a section, the linker allocates initialized sections to PAGE 0 and uninitialized sections to PAGE 1.
9.6.4.3
Specifying Input Sections
An input section specification identifies the sections from input files that are combined to form an output section. In general, the linker combines input sections by concatenating them in the order in which they are specified. However, if alignment or blocking is specified for an input section, all of the input sections within the output section are ordered as follows:
• All aligned sections, from largest to smallest
• All blocked sections, from largest to smallest
• All other sections, from largest to smallest
The size of an output section is the sum of the sizes of the input sections that it comprises.
shows the most common type of section specification; note that no input sections are listed.
Example 9-8. The Most Common Method of Specifying Section Contents
SECTIONS
{
.text:
.data:
.bss:
}
In
output section. The linker concatenates the .text input sections in the order that it encounters them in the input files. The linker performs similar operations with the .data and .bss sections. You can use this type of specification for any output section.
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You can explicitly specify the input sections that form an output section. Each input section is identified by its filename and section name:
SECTIONS
{
.text :
{
/* Build .text output section */
} f1.obj(.text) f2.obj(sec1)
/* Link .text section from f1.obj
/* Link sec1 section from f2.obj
*/
*/ f3.obj
/* Link ALL sections from f3.obj
*/ f4.obj(.text,sec2) /* Link .text and sec2 from f4.obj
*/
}
It is not necessary for input sections to have the same name as each other or as the output section they become part of. If a file is listed with no sections,all of its sections are included in the output section. If any additional input sections have the same name as an output section but are not explicitly specified by the
SECTIONS directive, they are automatically linked in at the end of the output section. For example, if the linker found more .text sections in the preceding example and these .text sections were not specified anywhere in the SECTIONS directive, the linker would concatenate these extra sections after f4.obj(sec2).
The specifications in
are actually a shorthand method for the following:
SECTIONS
{
.text: { *(.text) }
.data: { *(.data) }
.bss: { *(.bss) }
}
The specification *(.text) means the unallocated .text sections from all the input files. This format is useful when:
• You want the output section to contain all input sections that have a specified name, but the output section name is different from the input sections' name.
• You want the linker to allocate the input sections before it processes additional input sections or commands within the braces.
The following example illustrates the two purposes above:
SECTIONS
{
.text
: { abc.obj(xqt)
*(.text)
}
.data
: {
*(.data) fil.obj(table)
}
}
In this example, the .text output section contains a named section xqt from file abc.obj, which is followed by all the .text input sections. The .data section contains all the .data input sections, followed by a named section table from the file fil.obj. This method includes all the unallocated sections. For example, if one of the .text input sections was already included in another output section when the linker encountered
*(.text), the linker could not include that first .text input section in the second output section.
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9.6.4.4
Using Multi-Level Subsections
Subsections can be identified with the base section name and one or more subsection names separated by colons. For example, A:B and A:B:C name subsections of the base section A. In certain places in a link command file specifying a base name, such as A, selects the section A as well as any subsections of A, such as A:B or A:C:D.
A name such as A:B can be used to specify a (sub)section of that name as well as any (multi-level) subsections beginning with that name, such as A:B:C, A:B:OTHER, etc. All the subsections of A:B are also subsections of A. A and A:B are supersections of A:B:C. Among a group of supersections of a subsection, the nearest supersection is the supersection with the longest name. Thus, among {A, A:B} the nearest supersection of A:B:C:D is A:B.
With multiple levels of subsections, the constraints are the following:
1. When specifying input sections within a file (or library unit) the section name selects an input section of the same name and any subsections of that name.
2. Input sections that are not explicitly allocated are allocated in an existing output section of the same name or in the nearest existing supersection of such an output section. An exception to this rule is that during a partial link (specified by the --relocatable linker option) a subsection is allocated only to an existing output section of the same name.
3. If no such output section described in 2) is defined, the input section is put in a newly created output section with the same name as the base name of the input section
Consider linking input sections with the following names: europe:north:norway europe:central:france europe:north:sweden europe:north:finland europe:north:iceland europe:central:germany europe:central:denmark europe:south:spain europe:south:italy europe:south:malta
This SECTIONS specification allocates the input sections as indicated in the comments:
SECTIONS { nordic: {*(europe:north)
*(europe:central:denmark)} /* the nordic countries */ central: {*(europe:central)} /* france, germany */ therest: {*(europe)} /* spain, italy, malta */
}
This SECTIONS specification allocates the input sections as indicated in the comments:
SECTIONS { islands: {*(europe:south:malta)
*(europe:north:iceland)} /* malta, iceland */ europe:north:finland : {} /* finland */ europe:north europe:central
: {}
: {} europe:central:france: {}
/* norway, sweden
/* france
*/
/* germany, denmark */
*/
}
/* (italy, spain) go into a linker-generated output section "europe" */
Upward Compatibility of Multi-Level Subsections
NOTE: Existing linker commands that use the existing single-level subsection features and which do not contain section names containing multiple colon characters continue to behave as before. However, if section names in a link command file or in the input sections supplied to the linker contain multiple colon characters, some change in behavior could be possible. You should carefully consider the impact of the new rules for multiple levels to see if it affects a particular system link.
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9.6.4.5
Specifying Library or Archive Members as Input to Output Sections
You can specify one or more members of an object library or archive for input to an output section.
Consider this SECTIONS directive:
Example 9-9. Archive Members to Output Sections
SECTIONS
{ boot
{
> BOOT1
-l=rtsXX.lib<boot.obj> (.text)
-l=rtsXX.lib<exit.obj strcpy.obj> (.text)
}
.rts
{
}
.text
{
}
> BOOT2
-l=rtsXX.lib (.text)
>
* (.text)
RAM
}
In
Example 9-9 , the .text sections of boot.obj, exit.obj, and strcpy.obj are extracted from the
run-time-support library and placed in the .boot output section. The remainder of the run-time-support library object that is referenced is allocated to the .rts output section. Finally, the remainder of all other
.text sections are to be placed in section .text.
An archive member or a list of members is specified by surrounding the member name(s) with angle brackets < and > after the library name. Any object files separated by commas or spaces from the specified archive file are legal within the angle brackets.
The --library option (which normally implies a library path search be made for the named file following the option) listed before each library in
is optional when listing specific archive members inside <
> . Using < > implies that you are referring to a library.
To collect a set of the input sections from a library in one place, use the --library option within the
SECTIONS directive. For example, the following collects all the .text sections from rts55.lib into the .rtstest
section:
SECTIONS
{
.rtstest { -l=rts55.lib(.text) } > RAM
}
SECTIONS Directive Effect on --priority
NOTE: Specifying a library in a SECTIONS directive causes that library to be entered in the list of libraries that the linker searches to resolve references. If you use the --priority option, the first library specified in the command file will be searched first.
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9.6.4.6
Allocation Using Multiple Memory Ranges
The linker allows you to specify an explicit list of memory ranges into which an output section can be allocated. Consider the following example:
MEMORY
{
P_MEM1 : origin = 0x02000, length = 0x01000
P_MEM2 : origin = 0x04000, length = 0x01000
P_MEM3 : origin = 0x06000, length = 0x01000
P_MEM4 : origin = 0x08000, length = 0x01000
}
SECTIONS
{
.text
: { } > P_MEM1 | P_MEM2 | P_MEM4
}
The | operator is used to specify the multiple memory ranges. The .text output section is allocated as a whole into the first memory range in which it fits. The memory ranges are accessed in the order specified.
In this example, the linker first tries to allocate the section in P_MEM1. If that attempt fails, the linker tries to place the section into P_MEM2, and so on. If the output section is not successfully allocated in any of the named memory ranges, the linker issues an error message.
With this type of SECTIONS directive specification, the linker can seamlessly handle an output section that grows beyond the available space of the memory range in which it is originally allocated. Instead of modifying the link command file, you can let the linker move the section into one of the other areas.
9.6.4.7
Automatic Splitting of Output Sections Among Non-Contiguous Memory Ranges
The linker can split output sections among multiple memory ranges to achieve an efficient allocation. Use the >> operator to indicate that an output section can be split, if necessary, into the specified memory ranges. For example:
MEMORY
{
P_MEM1 : origin = 0x2000, length = 0x1000
P_MEM2 : origin = 0x4000, length = 0x1000
P_MEM3 : origin = 0x6000, length = 0x1000
P_MEM4 : origin = 0x8000, length = 0x1000
}
SECTIONS
{
.text: { *(.text) } >> P_MEM1 | P_MEM2 | P_MEM3 | P_MEM4
}
In this example, the >> operator indicates that the .text output section can be split among any of the listed memory areas. If the .text section grows beyond the available memory in P_MEM1, it is split on an input section boundary, and the remainder of the output section is allocated to P_MEM2 | P_MEM3 | P_MEM4.
The | operator is used to specify the list of multiple memory ranges.
You can also use the >> operator to indicate that an output section can be split within a single memory range. This functionality is useful when several output sections must be allocated into the same memory range, but the restrictions of one output section cause the memory range to be partitioned. Consider the following example:
MEMORY
{
RAM : origin = 0x1000, length = 0x8000
}
SECTIONS
{
.special: { f1.obj(.text) } load = 0x4000
.text: { *(.text) } >> RAM
}
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The .special output section is allocated near the middle of the RAM memory range. This leaves two unused areas in RAM: from 0x1000 to 0x4000, and from the end of f1.obj(.text) to 0x8000. The specification for the .text section allows the linker to split the .text section around the .special section and use the available space in RAM on either side of .special.
The >> operator can also be used to split an output section among all memory ranges that match a specified attribute combination. For example:
MEMORY
{
P_MEM1 (RWX) : origin = 0x1000, length = 0x2000
P_MEM2 (RWI) : origin = 0x4000, length = 0x1000
}
SECTIONS
{
.text: { *(.text) } >> (RW)
}
The linker attempts to allocate all or part of the output section into any memory range whose attributes match the attributes specified in the SECTIONS directive.
This SECTIONS directive has the same effect as:
SECTIONS
{
.text: { *(.text) } >> P_MEM1 | P_MEM2}
}
Certain sections should not be split:
• Certain sections created by the compiler, including
– The .cinit section, which contains the autoinitialization table for C/C++ programs
– The .pinit section, which contains the list of global constructors for C++ programs
– The .bss section, which defines global variables
– The .sysmem, .stack, and .sysstack sections, which are uninitialized sections for the C memory pool used by the malloc() functions and the run-time stacks, respectively.
• An output section with separate load and run allocations. The code that copies the output section from its load-time allocation to its run-time location cannot accommodate a split in the output section.
• An output section with an input section specification that includes an expression to be evaluated. The expression may define a symbol that is used in the program to manage the output section at run time.
• An output section that has a START(), END(), OR SIZE() operator applied to it. These operators provide information about a section's load or run address, and size. Splitting the section may compromise the integrity of the operation.
• The run allocation of a UNION. (Splitting the load allocation of a UNION is allowed.)
If you use the >> operator on any of these sections, the linker issues a warning and ignores the operator.
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9.6.5 Specifying a Section
'
s Run-Time Address
At times, you may want to load code into one area of memory and run it in another. For example, you may have performance-critical code in slow external memory. The code must be loaded into slow external memory, but it would run faster in fast external memory.
The linker provides a simple way to accomplish this. You can use the SECTIONS directive to direct the linker to allocate a section twice: once to set its load address and again to set its run address. For example:
.fir: load = SLOW_MEM, run = FAST_MEM
Use the load keyword for the load address and the run keyword for the run address.
See
for an overview on run-time relocation.
9.6.5.1
Specifying Load and Run Addresses
The load address determines where a loader places the raw data for the section. Any references to the section (such as labels in it) refer to its run address. The application must copy the section from its load address to its run address; this does not happen automatically when you specify a separate run address.
(The TABLE operator instructs the linker to produce a copy table; see
.
If you provide only one allocation (either load or run) for a section, the section is allocated only once and loads and runs at the same address. If you provide both allocations, the section is allocated as if it were two sections of the same size. This means that both allocations occupy space in the memory map and cannot overlay each other or other sections. (The UNION directive provides a way to overlay sections; see
.)
If either the load or run address has additional parameters, such as alignment or blocking, list them after the appropriate keyword. Everything related to allocation after the keyword load affects the load address until the keyword run is seen, after which, everything affects the run address. The load and run allocations are completely independent, so any qualification of one (such as alignment) has no effect on the other.
You can also specify run first, then load. Use parentheses to improve readability.
The examples below specify load and run addresses:
.data: load = SLOW_MEM, align = 32, run = FAST_MEM
(align applies only to load)
.data: load = (SLOW_MEM align 32), run = FAST_MEM
(identical to previous example)
.data: run = FAST_MEM, align 32, load = align 16
(align 32 in FAST_MEM for run; align 16 anywhere for load)
For more information on run-time relocation see
9.6.5.2
Uninitialized Sections
Uninitialized sections (such as .bss) are not loaded, so their only significant address is the run address.
The linker allocates uninitialized sections only once: if you specify both run and load addresses, the linker warns you and ignores the load address. Otherwise, if you specify only one address, the linker treats it as a run address, regardless of whether you call it load or run. This example specifies load and run addresses for an uninitialized section:
.bss: load = 0x1000, run = FAST_MEM
A warning is issued, load is ignored, and space is allocated in FAST_MEM. All of the following examples have the same effect. The .bss section is allocated in FAST_MEM.
.bss: load = FAST_MEM
.bss: run = FAST_MEM
.bss: > FAST_MEM
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9.6.5.3
Referring to the Load Address by Using the .label Directive
Normally, any reference to a symbol in a section refers to its run-time address. However, it may be necessary at run time to refer to a load-time address. Specifically, the code that copies a section from its load address to its run address must have access to the load address. The .label directive defines a special symbol that refers to the section's load address. Thus, whereas normal symbols are relocated with respect to the run address, .label symbols are relocated with respect to the load address. See
for more information on the .label directive.
and
show the use of the .label directive to copy a section from its load address in ROM to its run address in RAM.
illustrates the run-time execution of
.
The table operator and cpy_in can also be used to refer to a load address; see
Example 9-10. Copying Section Assembly Language File
; define a section to be copied from ROM to RAM
.sect
".fir" fir:
.label fir_src ; load address of section
; run address of section
<code here> ; code for the section
.label fir_end ; load address of section end
; copy .fir section from ROM into RAM
.text
MOV #fir_src,AR1
MOV BRC0,T1
; get load address
MOV T1,BRC1
MOV #(fir_end - fir_src - 1),BRC0
RPTB end end MOV *AR1+,*CDP+
MOV BRC1,T1
MOV T1,BRC0
; jump to section, now in RAM
CALL fir
Example 9-11. Linker Command File for
/**************************************************/
/* PARTIAL LINKER COMMAND FILE FOR FIR EXAMPLE */
/**************************************************/
MEMORY
{
ONCHIP : origin = 0x0100, length = 0x0700
PROG : origin = 0x0800, length = 0x2400
DATA : origin = 0x2C00, length = 0xD200
}
SECTIONS
{
.text: load = PROG
.fir: load = DATA, run ONCHIP
}
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Figure 9-4. Run-Time Execution of
Program memory
0x0100
ON_CHIP
.
fir (relocated to run here)
0x0800
PROG
.text
0x2C00
DATA
.fir
(loads here)
0xFE00
9.6.6 Using UNION and GROUP Statements
Two SECTIONS statements allow you to conserve memory: GROUP and UNION. Unioning sections causes the linker to allocate them to the same run address. Grouping sections causes the linker to allocate them contiguously in memory. Section names can refer to sections, subsections, or archive library members.
9.6.6.1
Overlaying Sections With the UNION Statement
For some applications, you may want to allocate more than one section to occupy the same address during run time. For example, you may have several routines you want in fast external memory at various stages of execution. Or you may want several data objects that are not active at the same time to share a block of memory. The UNION statement within the SECTIONS directive provides a way to allocate several sections at the same run-time address.
In
Example 9-12 , the .bss sections from file1.obj and file2.obj are allocated at the same address in
FAST_MEM. In the memory map, the union occupies as much space as its largest component. The components of a union remain independent sections; they are simply allocated together as a unit.
Example 9-12. The UNION Statement
SECTIONS
{
.text: load = SLOW_MEM
UNION: run = FAST_MEM
{
.bss:part1: { file1.obj(.bss) }
.bss:part2: { file2.obj(.bss) }
}
.bss:part3: run = FAST_MEM { globals.obj(.bss) }
}
Allocation of a section as part of a union affects only its run address. Under no circumstances can sections be overlaid for loading. If an initialized section is a union member (an initialized section, such as
.text, has raw data), its load allocation must be separately specified. See
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Example 9-13. Separate Load Addresses for UNION Sections
UNION run = FAST_MEM
{
.text:part1: load = SLOW_MEM, { file1.obj(.text) }
.text:part2: load = SLOW_MEM, { file2.obj(.text) }
}
Figure 9-5. Memory Allocation Shown in
and
FAST_MEM
.bss:part2
.bss:part1
Sections can run as a union. This is run-time allocation only.
FAST_MEM
.text 2 (run)
.text 1 (run)
Copies at run time www.ti.com
.bss:part3 .bss:part3
SLOW_MEM
.text
Sections cannot load as a union
SLOW_MEM
.text 1 (load)
.text 2 (load)
Since the .text sections contain raw data, they cannot load as a union, although they can be run as a union. Therefore, each requires its own load address. If you fail to provide a load allocation for an initialized section within a UNION, the linker issues a warning and allocates load space anywhere it can in configured memory.
Uninitialized sections are not loaded and do not require load addresses.
The UNION statement applies only to allocation of run addresses, so it is meaningless to specify a load address for the union itself. For purposes of allocation, the union is treated as an uninitialized section: any one allocation specified is considered a run address, and if both run and load addresses are specified, the linker issues a warning and ignores the load address.
UNION and Overlay Page Are Not the Same
NOTE: The UNION capability and the overlay page capability (see
because they both deal with overlays. They are, in fact, quite different. UNION allows multiple sections to be overlaid within the same memory space. Overlay pages, on the other hand, define multiple memory spaces. It is possible to use the page facility to approximate the function of UNION, but this is cumbersome.
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9.6.6.2
Grouping Output Sections Together
The SECTIONS directive's GROUP option forces several output sections to be allocated contiguously. For example, assume that a section named term_rec contains a termination record for a table in the .data
section. You can force the linker to allocate .data and term_rec together:
Example 9-14. Allocate Sections Together
SECTIONS
{
.text
.bss
/* Normal output section
/* Normal output section
GROUP 0x00001000 : /* Specify a group of sections
{
.data
term_rec
*/
*/
*/
/* First section in the group */
/* Allocated immediately after .data */
}
}
You can use binding, alignment, or named memory to allocate a GROUP in the same manner as a single output section. In the preceding example, the GROUP is bound to address 0x1000. This means that .data
is allocated at 0x1000, and term_rec follows it in memory.
You Cannot Specify Addresses for Sections Within a GROUP
NOTE: When you use the GROUP option, binding, alignment, or allocation into named memory can be specified for the group only. You cannot use binding, named memory, or alignment for sections within a group.
9.6.6.3
Nesting UNIONs and GROUPs
The linker allows arbitrary nesting of GROUP and UNION statements with the SECTIONS directive. By nesting GROUP and UNION statements, you can express hierarchical overlays and groupings of sections.
shows how two overlays can be grouped together.
Example 9-15. Nesting GROUP and UNION Statements
SECTIONS
{
GROUP 0x1000 : run = FAST_MEM
{
UNION:
{ mysect1: load = SLOW_MEM mysect2: load = SLOW_MEM
}
UNION:
{ mysect3: load = SLOW_MEM mysect4: load = SLOW_MEM
}
}
}
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For this example, the linker performs the following allocations:
• The four sections (mysect1, mysect2, mysect3, mysect4) are assigned unique, non-overlapping load addresses. The name you defined with the .label directive is used in the SLOW_MEM memory region.
This assignment is determined by the particular load allocations given for each section.
• Sections mysect1 and mysect2 are assigned the same run address in FAST_MEM.
• Sections mysect3 and mysect4 are assigned the same run address in FAST_MEM.
• The run addresses of mysect1/mysect2 and mysect3/mysect4 are allocated contiguously, as directed by the GROUP statement (subject to alignment and blocking restrictions).
To refer to groups and unions, linker diagnostic messages use the notation:
GROUP_n UNION_n
In this notation, n is a sequential number (beginning at 1) that represents the lexical ordering of the group or union in the linker control file, without regard to nesting. Groups and unions each have their own counter.
9.6.6.4
Checking the Consistency of Allocators
The linker checks the consistency of load and run allocations specified for unions, groups, and sections.
The following rules are used:
• Run allocations are only allowed for top-level sections, groups, or unions (sections, groups, or unions that are not nested under any other groups or unions). The linker uses the run address of the top-level structure to compute the run addresses of the components within groups and unions.
• The linker does not accept a load allocation for UNIONs.
• The linker does not accept a load allocation for uninitialized sections.
• In most cases, you must provide a load allocation for an initialized section. However, the linker does not accept a load allocation for an initialized section that is located within a group that already defines a load allocator.
• As a shortcut, you can specify a load allocation for an entire group, to determine the load allocations for every initialized section or subgroup nested within the group. However, a load allocation is accepted for an entire group only if all of the following conditions are true:
– The group is initialized (that is, it has at least one initialized member).
– The group is not nested inside another group that has a load allocator.
– The group does not contain a union containing initialized sections.
• If the group contains a union with initialized sections, it is necessary to specify the load allocation for each initialized section nested within the group. Consider the following example:
SECTIONS
{
GROUP: load = SLOW_MEM, run = SLOW_MEM
{
.text1:
UNION:
{
.text2:
.text3:
}
}
}
The load allocator given for the group does not uniquely specify the load allocation for the elements within the union: .text2 and .text3. In this case, the linker issues a diagnostic message to request that these load allocations be specified explicitly.
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9.6.6.5
Naming UNIONs and GROUPs
You can give a name to a UNION or GROUP by entering the name in parentheses after the declaration.
For example:
GROUP(BSS_SYSMEM_STACK_GROUP)
{
.bss
:{}
.sysmem :{}
.stack
:{}
} load=D_MEM, run=D_MEM
The name you defined is used in diagnostics for easy identification of the problem LCF area. For example: warning: LOAD placement ignored for "BSS_SYSMEM_STACK_GROUP": object is uninitialized
UNION(TEXT_CINIT_UNION)
{
.const :{}load=D_MEM, table(table1)
.pinit :{}load=D_MEM, table(table1)
}run=P_MEM warning:table(table1) operator ignored: table(table1) has already been applied to a section in the "UNION(TEXT_CINIT_UNION)" in which ".pinit" is a descendant
9.6.7 Overlaying Pages
Some devices use a memory configuration in which all or part of the memory space is overlaid by shadow memory. This allows the system to map different banks of physical memory into and out of a single address range in response to hardware selection signals. In other words, multiple banks of physical memory overlay each other at one address range. You may want the linker to load various output sections into each of these banks or into banks that are not mapped at load time.
The linker supports this feature by providing overlay pages. Each page represents an address range that must be configured separately with the MEMORY directive. You then use the SECTIONS directive to specify the sections to be mapped into various pages.
Overlay Section and Overlay Page Are Not the Same
NOTE: The UNION capability and the overlay page capability (see
) sound similar because they both deal with overlays. They are, in fact, quite different. UNION allows multiple sections to be overlaid within the same memory space. Overlay pages, on the other hand, define multiple memory spaces. It is possible to use the page facility to approximate the function of UNION, but it is cumbersome.
9.6.7.1
Using the MEMORY Directive to Define Overlay Pages
To the linker, each overlay page represents a completely separate memory space comprising the full range of addressable locations. In this way, you can link two or more sections at the same (or overlapping) addresses if they are on different pages.
Pages are numbered sequentially, beginning with 0. If you do not use the PAGE option, the linker allocates initialized sections into PAGE 0 (program memory) and uninitialized sections into PAGE 1 (data memory).
9.6.7.2
Example of Overlay Pages
Assume that your system can select between two banks of physical memory for data memory space: address range A00h to FFFFh for PAGE 1 and 0A00h to 2BFFh for PAGE 2. Although only one bank can be selected at a time, you can initialize each bank with different data.
shows how you use the MEMORY directive to obtain this configuration:
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Example 9-16. MEMORY Directive With Overlay Pages
MEMORY
{
PAGE 0 : RAM
: PROG
:origin = 0x0800, length = 0x0240
:origin = 0x2C00, length = 0xD200
PAGE 1 : OVR_MEM :origin = 0x0A00, length = 0x2200
: DATA :origin = 0x2C00, length = 0xD400
PAGE 2 : OVR_MEM :origin = 0x0A00, length = 0x2200
} www.ti.com
defines three separate address spaces.
• PAGE 0 defines an area of RAM program memory space and the rest of program memory space.
• PAGE 1 defines the first overlay memory area and the rest of data memory space.
• PAGE 2 defines another area of overlay memory for data space.
Both OVR_MEM ranges cover the same address range. This is possible because each range is on a different page and therefore represents a different memory space.
9.6.7.3
Using Overlay Pages With the SECTIONS Directive
Assume that you are using the MEMORY directive as shown in
. Further assume that your code consists of the standard sections, as well as four modules of code that you want to load in data memory space and run in RAM program memory.
shows how to use the SECTIONS directive overlays to accomplish these objectives.
Example 9-17. SECTIONS Directive Definition for Overlays in Example 7-10
SECTIONS
{
UNION : run = RAM
{
S1 : load = OVR_MEM PAGE 1
{ s1_load = 0x0A00h; s1_start = .; f1.obj (.text) f2.obj (.text) s1_length = . - s1_start;
}
S2 : load = OVR_MEM PAGE 2
{ s2_load = 0x0A00h; s2_start = .; f3.obj (.text) f4.obj (.text) s2_length = . - s2_start;
}
}
}
.text: load = PROG PAGE 0
.data: load = PROG PAGE 0
.bss : load = DATA PAGE 1
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The four modules are f1, f2, f3, and f4. Modules f1 and f2 are combined into output section S1, and f3 and f4 are combined into output section S2. The PAGE specifications for S1 and S2 tell the linker to link these sections into the corresponding pages. As a result, they are both linked to load address A00h, but in different memory spaces. When the program is loaded, a loader can configure hardware so that each section is loaded into the appropriate memory bank.
9.6.7.4
Memory Allocation for Overlaid Pages
shows overlay pages defined by the MEMORY directive in
and the SECTIONS directive in
.
Figure 9-6. Overlay Pages Defined in
and
Program memory page 0
Data memory page 1
Data memory page 2
0x0000 0800
FAST_MEM
Run address for f1, f2, f3, f4
0x0000 2C00
PROG
.text
0x0000 FE00
0x0000 0A00
OVR_MEM f1.obj (.text) f2.obj (.text)
0x0000 2C00
DATA
.bss
0x0000 0A00
OVR_MEM f3.obj (.text) f4.obj (.text)
0x0000 2C00
9.6.8 Special Section Types (DSECT, COPY, and NOLOAD)
You can assign three special types to output sections: DSECT, COPY, and NOLOAD. These types affect the way that the program is treated when it is linked and loaded. You can assign a type to a section by placing the type after the section definition. For example:
SECTIONS
{ sec1: load = 0x00002000, type = DSECT {f1.obj} sec2: load = 0x00004000, type = COPY {f2.obj} sec3: load = 0x00006000, type = NOLOAD {f3.obj}
}
• The DSECT type creates a dummy section with the following characteristics:
– It is not included in the output section memory allocation. It takes up no memory and is not included in the memory map listing.
– It can overlay other output sections, other DSECTs, and unconfigured memory.
– Global symbols defined in a dummy section are relocated normally. They appear in the output module's symbol table with the same value they would have if the DSECT had actually been loaded. These symbols can be referenced by other input sections.
– Undefined external symbols found in a DSECT cause specified archive libraries to be searched.
– The section's contents, relocation information, and line number information are not placed in the output module.
In the preceding example, none of the sections from f1.obj are allocated, but all the symbols are relocated as though the sections were linked at address 0x2000. The other sections can refer to any of the global symbols in sec1.
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• A COPY section is similar to a DSECT section, except that its contents and associated information are written to the output module. The .cinit section that contains initialization tables for the TMS320C55x
C/C++ compiler has this attribute under the run-time initialization model.
• A NOLOAD section differs from a normal output section in one respect: the section's contents, relocation information, and line number information are not placed in the output module. The linker allocates space for the section, and it appears in the memory map listing.
9.6.9 Assigning Symbols at Link Time
Linker assignment statements allow you to define external (global) symbols and assign values to them at link time. You can use this feature to initialize a variable or pointer to an allocation-dependent value.
9.6.9.1
Syntax of Assignment Statements
The syntax of assignment statements in the linker is similar to that of assignment statements in the C language: symbol symbol symbol symbol symbol
=
+ =
- =
* =
/ = expression; expression; expression; expression; expression; assigns the value of expression to symbol adds the value of expression to symbol subtracts the value of expression from symbol multiplies symbol by expression divides symbol by expression
The symbol should be defined externally. If it is not, the linker defines a new symbol and enters it into the symbol table. The expression must follow the rules defined in
must terminate with a semicolon.
The linker processes assignment statements after it allocates all the output sections. Therefore, if an expression contains a symbol, the address used for that symbol reflects the symbol's address in the executable output file.
For example, suppose a program reads data from one of two tables identified by two external symbols,
Table1 and Table2. The program uses the symbol cur_tab as the address of the current table. The cur_tab symbol must point to either Table1 or Table2. You could accomplish this in the assembly code, but you would need to reassemble the program to change tables. Instead, you can use a linker assignment statement to assign cur_tab at link time: prog.obj
/* Input file */ cur_tab = Table1; /* Assign cur_tab to one of the tables */
9.6.9.2
Assigning the SPC to a Symbol
A special symbol, denoted by a dot (.), represents the current value of the section program counter (SPC) during allocation. The SPC keeps track of the current location within a section. The linker's . symbol is analogous to the assembler's $ symbol. The . symbol can be used only in assignment statements within a
SECTIONS directive because . is meaningful only during allocation and SECTIONS controls the allocation process. (See
.)
The . symbol refers to the current run address, not the current load address, of the section.
For example, suppose a program needs to know the address of the beginning of the .data section. By using the .global directive (see
Identify Global Symbols ), you can create an external undefined variable
called Dstart in the program. Then, assign the value of . to Dstart:
SECTIONS
{
.text:
.data:
.bss :
}
{}
{Dstart = .;}
{}
This defines Dstart to be the first linked address of the .data section. (Dstart is assigned before .data is allocated.) The linker relocates all references to Dstart.
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A special type of assignment assigns a value to the . symbol. This adjusts the SPC within an output section and creates a hole between two input sections. Any value assigned to . to create a hole is relative to the beginning of the section, not to the address actually represented by the . symbol. Holes and assignments to . are described in
.
9.6.9.3
Assignment Expressions
These rules apply to linker expressions:
• Expressions can contain global symbols, constants, and the C language operators listed in .
• All numbers are treated as long (32-bit) integers.
• Constants are identified by the linker in the same way as by the assembler. That is, numbers are recognized as decimal unless they have a suffix (H or h for hexadecimal and Q or q for octal). C language prefixes are also recognized (0 for octal and 0x for hex). Hexadecimal constants must begin with a digit. No binary constants are allowed.
• Symbols within an expression have only the value of the symbol's address. No type-checking is performed.
• Linker expressions can be absolute or relocatable. If an expression contains any relocatable symbols
(and 0 or more constants or absolute symbols), it is relocatable. Otherwise, the expression is absolute.
If a symbol is assigned the value of a relocatable expression, it is relocatable; if it is assigned the value of an absolute expression, it is absolute.
The linker supports the C language operators listed in
in order of precedence. Operators in the same group have the same precedence. Besides the operators listed in , the linker also has an align operator that allows a symbol to be aligned on an n-byte boundary within an output section (n is a power of 2). For example, the following expression aligns the SPC within the current section on the next 16-byte boundary. Because the align operator is a function of the current SPC, it can be used only in the same context as .
— that is, within a SECTIONS directive.
. = align(16);
Table 9-9. Operators Used in Expressions
Symbols
+ - ~ (1)
* / %
+ -
<< >>
< < = > > =
Operators
Unary plus, minus, 1s complement
Multiplication, division, modulo
Addition, subtraction
Evaluation
Right to left
Left to right
Left to right
(1)
|
!=, =[=]
&
^
Left shift, right shift Left to right
Less than, LT or equal, greater than, GT Left to right or equal
Not equal to, equal to Left to right
Bitwise AND
Bitwise exclusive OR
Bitwise OR
Unary +, -, and * have higher precedence than the binary forms.
Left to right
Left to right
Left to right
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9.6.9.4
Symbols Defined by the Linker
The linker automatically defines several symbols based on which sections are used in your assembly source. A program can use these symbols at run time to determine where a section is linked. Since these symbols are external, they appear in the linker map. Each symbol can be accessed in any assembly language module if it is declared with a .global directive (see
Identify Global Symbols ). You must have
used the corresponding section in a source module for the symbol to be created. Values are assigned to these symbols as follows:
.text
etext
.data
edata
.bss
end is assigned the first address of the .text output section.
(It marks the beginning of executable code.) is assigned the first address following the .text output section.
(It marks the end of executable code.) is assigned the first address of the .data output section.
(It marks the beginning of initialized data tables.) is assigned the first address following the .data output section.
(It marks the end of initialized data tables.) is assigned the first address of the .bss output section.
(It marks the beginning of uninitialized data.) is assigned the first address following the .bss output section.
(It marks the end of uninitialized data.)
The following symbols are defined only for C/C++ support when the --ram_model or --rom_model option is used.
__STACK_END
__STACK_SIZE
_SYSSTACK_SIZE
__SYSMEM_SIZE is assigned the end of the .stack size.
is assigned the size of the .stack section.
is assigned the size of the .sysstack section.
is assigned the size of the .sysmem section.
Allocation of .stack and .sysstack Sections
NOTE: The .stack and .sysstack sections must be allocated on the same 64K-word data page.
9.6.9.5
Assigning Exact Start, End, and Size Values of a Section to a Symbol
The code generation tools currently support the ability to load program code in one area of (slow) memory and run it in another (faster) area. This is done by specifying separate load and run addresses for an output section or group in the link command file. Then execute a sequence of instructions (the copying code in
Example 9-10 ) that moves the program code from its load area to its run area before it is needed.
There are several responsibilities that a programmer must take on when setting up a system with this feature. One of these responsibilities is to determine the size and run-time address of the program code to be moved. The current mechanisms to do this involve use of the .label directives in the copying code. A simple example is illustrated
This method of specifying the size and load address of the program code has limitations. While it works fine for an individual input section that is contained entirely within one source file, this method becomes more complicated if the program code is spread over several source files or if the programmer wants to copy an entire output section from load space to run space.
Another problem with this method is that it does not account for the possibility that the section being moved may have an associated far call trampoline section that needs to be moved with it.
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9.6.9.6
Why the Dot Operator Does Not Always Work
The dot operator (.) is used to define symbols at link-time with a particular address inside of an output section. It is interpreted like a PC. Whatever the current offset within the current section is, that is the value associated with the dot. Consider an output section specification within a SECTIONS directive: outsect:
{ s1.obj(.text) end_of_s1 = .; start_of_s2 = .; s2.obj(.text) end_of_s2 = .;
}
This statement creates three symbols:
• end_of_s1 — the end address of .text in s1.obj
• start_of_s2 — the start address of .text in s2.obj
• end_of_s2 — the end address of .text in s2.obj
Suppose there is padding between s1.obj and s2.obj that is created as a result of alignment. Then start_of_s2 is not really the start address of the .text section in s2.obj, but it is the address before the padding needed to align the .text section in s2.obj. This is due to the linker's interpretation of the dot operator as the current PC. It is also due to the fact that the dot operator is evaluated independently of the input sections around it.
Another potential problem in the above example is that end_of_s2 may not account for any padding that was required at the end of the output section. You cannot reliably use end_of_s2 as the end address of the output section. One way to get around this problem is to create a dummy section immediately after the output section in question. For example:
GROUP
{ outsect:
{ start_of_outsect = .;
...
} dummy: { size_of_outsect = . - start_of_outsect; }
}
9.6.9.7
Address and Dimension Operators
Six new operators have been added to the link command file syntax:
LOAD_START( sym )
START( sym )
LOAD_END( sym )
END( sym )
LOAD_SIZE( sym )
SIZE( sym )
RUN_START( sym )
RUN_END( sym )
RUN_SIZE(sym )
Defines sym with the load-time start address of related allocation unit
Defines sym with the load-time end address of related allocation unit
Defines sym with the load-time size of related allocation unit
Defines sym with the run-time start address of related allocation unit
Defines sym with the run-time end address of related allocation unit
Defines sym with the run-time size of related allocation unit
Linker Command File Operator Equivalencies
NOTE: LOAD_START() and START() are equivalent, as are LOAD_END()/END() and
LOAD_SIZE()/SIZE(). The LOAD names are recommended for clarity.
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The new address and dimension operators can be associated with several different kinds of allocation units, including input items, output sections, GROUPs, and UNIONs. The following sections provide some examples of how the operators can be used in each case.
9.6.9.7.1 Input Items
Consider an output section specification within a SECTIONS directive: outsect:
{ s1.obj(.text) end_of_s1 = .; start_of_s2 = .; s2.obj(.text) end_of_s2 = .;
}
This can be rewritten using the START and END operators as follows: outsect:
{ s1.obj(.text) { END(end_of_s1) } s2.obj(.text) { START(start_of_s2), END(end_of_s2) }
}
The values of end_of_s1 and end_of_s2 will be the same as if you had used the dot operator in the original example, but start_of_s2 would be defined after any necessary padding that needs to be added between the two .text sections. Remember that the dot operator would cause start_of_s2 to be defined before any necessary padding is inserted between the two input sections.
The syntax for using these operators in association with input sections calls for braces { } to enclose the operator list. The operators in the list are applied to the input item that occurs immediately before the list.
9.6.9.7.2 Output Section
The START, END, and SIZE operators can also be associated with an output section. Here is an example: outsect: START(start_of_outsect), SIZE(size_of_outsect)
{
<list of input items>
}
In this case, the SIZE operator defines size_of_outsect to incorporate any padding that is required in the output section to conform to any alignment requirements that are imposed.
The syntax for specifying the operators with an output section does not require braces to enclose the operator list. The operator list is simply included as part of the allocation specification for an output section.
9.6.9.7.3 GROUPs
Here is another use of the START and SIZE operators in the context of a GROUP specification:
GROUP
{ outsect1: { ... } outsect2: { ... }
} load = ROM, run = RAM, START(group_start), SIZE(group_size);
This can be useful if the whole GROUP is to be loaded in one location and run in another. The copying code can use group_start and group_size as parameters for where to copy from and how much is to be copied. This makes the use of .label in the source code unnecessary.
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9.6.9.7.4 UNIONs
The RUN_SIZE and LOAD_SIZE operators provide a mechanism to distinguish between the size of a
UNION's load space and the size of the space where its constituents are going to be copied before they are run. Here is an example:
UNION: run = RAM, LOAD_START(union_load_addr),
LOAD_SIZE(union_ld_sz), RUN_SIZE(union_run_sz)
{
.text1: load = ROM, SIZE(text1_size) { f1.obj(.text) }
.text2: load = ROM, SIZE(text2_size) { f2.obj(.text) }
}
Here union_ld_sz is going to be equal to the sum of the sizes of all output sections placed in the union.
The union_run_sz value is equivalent to the largest output section in the union. Both of these symbols incorporate any padding due to blocking or alignment requirements.
9.6.10 Creating and Filling Holes
The linker provides you with the ability to create areas within output sections that have nothing linked into them. These areas are called holes. In special cases, uninitialized sections can also be treated as holes.
This section describes how the linker handles holes and how you can fill holes (and uninitialized sections) with values.
9.6.10.1 Initialized and Uninitialized Sections
There are two rules to remember about the contents of output sections. An output section contains either:
• Raw data for the entire section
• No raw data
A section that has raw data is referred to as initialized. This means that the object file contains the actual memory image contents of the section. When the section is loaded, this image is loaded into memory at the section's specified starting address. The .text and .data sections always have raw data if anything was assembled into them. Named sections defined with the .sect assembler directive also have raw data.
By default, the .bss section (see
Reserve Space in the .bss Section ) and sections defined with the .usect
directive (see
) have no raw data (they are uninitialized). They occupy space in the memory map but have no actual contents. Uninitialized sections typically reserve space in fast external memory for variables. In the object file, an uninitialized section has a normal section header and can have symbols defined in it; no memory image, however, is stored in the section.
9.6.10.2 Creating Holes
You can create a hole in an initialized output section. A hole is created when you force the linker to leave extra space between input sections within an output section. When such a hole is created, the linker must supply raw data for the hole.
Holes can be created only within output sections. Space can exist between output sections, but such space is not a hole. To fill the space between output sections, see
To create a hole in an output section, you must use a special type of linker assignment statement within an output section definition. The assignment statement modifies the SPC (denoted by .) by adding to it, assigning a greater value to it, or aligning it on an address boundary. The operators, expressions, and syntaxes of assignment statements are described in
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The following example uses assignment statements to create holes in output sections:
SECTIONS
{ outsect:
{ file1.obj(.text)
. += 0x0100 /* Create a hole with size 0x0100 */ file2.obj(.text)
. = align(16); /* Create a hole to align the SPC */ file3.obj(.text)
}
}
The output section outsect is built as follows:
1. The .text section from file1.obj is linked in.
2. The linker creates a 256-byte hole.
3. The .text section from file2.obj is linked in after the hole.
4. The linker creates another hole by aligning the SPC on a 16-byte boundary.
5. Finally, the .text section from file3.obj is linked in.
All values assigned to the . symbol within a section refer to the relative address within the section. The linker handles assignments to the . symbol as if the section started at address 0 (even if you have specified a binding address). Consider the statement . = align(16) in the example. This statement effectively aligns the file3.obj .text section to start on a 16-byte boundary within outsect. If outsect is ultimately allocated to start on an address that is not aligned, the file3.obj .text section will not be aligned either.
The . symbol refers to the current run address, not the current load address, of the section.
Expressions that decrement the . symbol are illegal. For example, it is invalid to use the -= operator in an assignment to the . symbol. The most common operators used in assignments to the . symbol are += and align.
If an output section contains all input sections of a certain type (such as .text), you can use the following statements to create a hole at the beginning or end of the output section.
/* Hole at the beginning */ .text: { .+= 0x0100; }
.data: { *(.data)
. += 0x0100; } /* Hole at the end */
Another way to create a hole in an output section is to combine an uninitialized section with an initialized section to form a single output section. In this case, the linker treats the uninitialized section as a hole and
supplies data for it. The following example illustrates this method:
SECTIONS
{ outsect:
{ file1.obj(.text) file1.obj(.bss)
}
}
/* This becomes a hole */
Because the .text section has raw data, all of outsect must also contain raw data. Therefore, the uninitialized .bss section becomes a hole.
Uninitialized sections become holes only when they are combined with initialized sections. If several uninitialized sections are linked together, the resulting output section is also uninitialized.
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9.6.10.3 Filling Holes
When a hole exists in an initialized output section, the linker must supply raw data to fill it. The linker fills holes with a 32-bit fill value that is replicated through memory until it fills the hole. The linker determines the fill value as follows:
1. If the hole is formed by combining an uninitialized section with an initialized section, you can specify a fill value for the uninitialized section. Follow the section name with an = sign and a 32-bit constant. For example:
SECTIONS
{ outsect:
{ file1.obj(.text) file2.obj(.bss)= 0xFF00 /* Fill this hole with 0xFF00 */
}
}
2. You can also specify a fill value for all the holes in an output section by supplying the fill value after the section definition:
SECTIONS
{ outsect:fill = 0xFF00
{
. += 0x0010; file1.obj(.text) file1.obj(.bss)
}
}
/* Fills holes with 0xFF00
/* This creates a hole
*/
*/
/* This creates another hole */
3. If you do not specify an initialization value for a hole, the linker fills the hole with the value specified with the --fill_value option (see
). For example, suppose the command file link.cmd
contains the following SECTIONS directive:
SECTIONS { .text: { .= 0x0100; } /* Create a 100 word hole */ }
Now invoke the linker with the --fill_value option: cl55 --run_linker --fill_value=0xFFFF link.cmd
This fills the hole with 0xFFFF.
4. If you do not invoke the linker with the --fill_value option or otherwise specify a fill value, the linker fills holes with 0s.
Whenever a hole is created and filled in an initialized output section, the hole is identified in the link map along with the value the linker uses to fill it.
9.6.10.4 Explicit Initialization of Uninitialized Sections
You can force the linker to initialize an uninitialized section by specifying an explicit fill value for it in the
SECTIONS directive. This causes the entire section to have raw data (the fill value). For example:
SECTIONS
{
.bss: fill = 0x1234 /* Fills .bss with 0x1234 */
}
Filling Sections
NOTE: Because filling a section (even with 0s) causes raw data to be generated for the entire section in the output file, your output file will be very large if you specify fill values for large sections or holes.
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9.7
Object Libraries
An object library is a partitioned archive file that contains object files as members. Usually, a group of related modules are grouped together into a library. When you specify an object library as linker input, the linker includes any members of the library that define existing unresolved symbol references. You can use the archiver to build and maintain libraries.
contains more information about the archiver.
Using object libraries can reduce link time and the size of the executable module. Normally, if an object file that contains a function is specified at link time, the file is linked whether the function is used or not; however, if that same function is placed in an archive library, the file is included only if the function is referenced.
The order in which libraries are specified is important, because the linker includes only those members that resolve symbols that are undefined at the time the library is searched. The same library can be specified as often as necessary; it is searched each time it is included. Alternatively, you can use the
--reread_libs option to reread libraries until no more references can be resolved (see
library has a table that lists all external symbols defined in the library; the linker searches through the table until it determines that it cannot use the library to resolve any more references.
The following examples link several files and libraries, using these assumptions:
• Input files f1.obj and f2.obj both reference an external function named clrscr.
• Input file f1.obj references the symbol origin.
• Input file f2.obj references the symbol fillclr.
• Member 0 of library libc.lib contains a definition of origin.
• Member 3 of library liba.lib contains a definition of fillclr.
• Member 1 of both libraries defines clrscr.
If you enter: cl55 --run_linker f1.obj f2.obj liba.lib libc.lib
then:
• Member 1 of liba.lib satisfies the f1.obj and f2.obj references to clrscr because the library is searched and the definition of clrscr is found.
• Member 0 of libc.lib satisfies the reference to origin.
• Member 3 of liba.lib satisfies the reference to fillclr.
If, however, you enter: cl55 --run_linker f1.obj f2.obj libc.lib liba.lib
then the references to clrscr are satisfied by member 1 of libc.lib.
If none of the linked files reference symbols defined in a library, you can use the --undef_sym option to force the linker to include a library member. (See
.) The next example creates an undefined
symbol rout1 in the linker's global symbol table: cl55 --run_linker --undef_sym=rout1 libc.lib
If any member of libc.lib defines rout1, the linker includes that member.
Library members are allocated according to the SECTIONS directive default allocation algorithm; see
describes methods for specifying directories that contain object libraries.
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Default Allocation Algorithm
9.8
Default Allocation Algorithm
The MEMORY and SECTIONS directives provide flexible methods for building, combining, and allocating sections. However, any memory locations or sections that you choose not to specify must still be handled by the linker. The linker uses default algorithms to build and allocate sections within the specifications you supply.
If you do not use the MEMORY and SECTIONS directives, the linker allocates output sections as though the definitions in
were specified.
Example 9-18. Default Allocation for TMS320C55x Devices
MEMORY
{
ROM (RIX) : origin = 0100h, length = 0FEFFh
VECTOR (RIX) : origin = 0FFFF00h, length = 0100h
RAM (RWIX) : origin = 010100h, length = 0FFFFh
}
SECTIONS
{
.text
> ROM
.switch
> ROM
.const
.cinit
> ROM
> ROM
.vectors
> VECTOR
.data
> RAM
.bss
> RAM
.sysmem
> RAM
.stack
> RAM
.sysstack > RAM
.cio
> RAM
}
All .text input sections are concatenated to form a .text output section in the executable output file, and all
.data input sections are combined to form a .data output section.
If you use a SECTIONS directive, the linker performs no part of the default allocation. Allocation is performed according to the rules specified by the SECTIONS directive and the general algorithm described next in
.
9.8.1 How the Allocation Algorithm Creates Output Sections
An output section can be formed in one of two ways:
Method 1 As the result of a SECTIONS directive definition
Method 2 By combining input sections with the same name into an output section that is not defined in a SECTIONS directive
If an output section is formed as a result of a SECTIONS directive, this definition completely determines the section's contents. (See
for examples of how to define an output section's content.)
If an output section is formed by combining input sections not specified by a SECTIONS directive, the linker combines all such input sections that have the same name into an output section with that name.
For example, suppose the files f1.obj and f2.obj both contain named sections called Vectors and that the
SECTIONS directive does not define an output section for them. The linker combines the two Vectors sections from the input files into a single output section named Vectors, allocates it into memory, and includes it in the output file.
By default, the linker does not display a message when it creates an output section that is not defined in the SECTIONS directive. You can use the --warn_sections linker option (see
linker to display a message when it creates a new output section.
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After the linker determines the composition of all output sections, it must allocate them into configured memory. The MEMORY directive specifies which portions of memory are configured. If there is no
MEMORY directive, the linker uses the default configuration as shown in
for more information on configuring memory.)
9.8.2 Reducing Memory Fragmentation
The linker's allocation algorithm attempts to minimize memory fragmentation. This allows memory to be used more efficiently and increases the probability that your program will fit into memory. The algorithm comprises these steps:
1. Each output section for which you have supplied a specific binding address is placed in memory at that address.
2. Each output section that is included in a specific, named memory range or that has memory attribute restrictions is allocated. Each output section is placed into the first available space within the named area, considering alignment where necessary.
3. Any remaining sections are allocated in the order in which they are defined. Sections not defined in a
SECTIONS directive are allocated in the order in which they are encountered. Each output section is placed into the first available memory space, considering alignment where necessary.
The PAGE Option
NOTE: If you do not use the PAGE option to explicitly specify a memory space for an output section, the linker allocates the section into PAGE 0. This occurs even if PAGE 0 has no room and other pages do. To use a page other than PAGE 0, you must specify the page with the
SECTIONS directive.
9.9
Linker-Generated Copy Tables
The linker supports extensions to the link command file syntax that enable the following:
• Make it easier for you to copy objects from load-space to run-space at boot time
• Make it easier for you to manage memory overlays at run time
• Allow you to split GROUPs and output sections that have separate load and run addresses
9.9.1 A Current Boot-Loaded Application Development Process
In some embedded applications, there is a need to copy or download code and/or data from one location to another at boot time before the application actually begins its main execution thread. For example, an application may have its code and/or data in FLASH memory and need to copy it into on-chip memory before the application begins execution.
One way you can develop an application like this is to create a copy table in assembly code that contains three elements for each block of code or data that needs to be moved from FLASH into on-chip memory at boot time:
• The load location (load page id and address)
• The run location (run page id and address)
• The size
The process you follow to develop such an application might look like this:
1. Build the application to produce a .map file that contains the load and run addresses of each section that has a separate load and run placement.
2. Edit the copy table (used by the boot loader) to correct the load and run addresses as well as the size of each block of code or data that needs to be moved at boot time.
3. Build the application again, incorporating the updated copy table.
4. Run the application.
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This process puts a heavy burden on you to maintain the copy table (by hand, no less). Each time a piece of code or data is added or removed from the application, you must repeat the process in order to keep the contents of the copy table up to date.
9.9.2 An Alternative Approach
You can avoid some of this maintenance burden by using the LOAD_START(), RUN_START(), and
SIZE() operators that are already part of the link command file syntax . For example, instead of building the application to generate a .map file, the link command file can be annotated:
SECTIONS
{
.flashcode: { app_tasks.obj(.text) } load = FLASH, run = PMEM,
LOAD_START(_flash_code_ld_start),
RUN_START(_flash_code_rn_start),
SIZE(_flash_code_size)
...
}
In this example, the LOAD_START(), RUN_START(), and SIZE() operators instruct the linker to create three symbols:
Symbol
_flash_code_ld_start
_flash_code_rn_start
_flash_code_size
Description
Load address of .flashcode section
Run address of .flashcode section
Size of .flashcode section
These symbols can then be referenced from the copy table. The actual data in the copy table will be updated automatically each time the application is linked. This approach removes step 1 of the process described in
While maintenance of the copy table is reduced markedly, you must still carry the burden of keeping the copy table contents in sync with the symbols that are defined in the link command file. Ideally, the linker would generate the boot copy table automatically. This would avoid having to build the application twice
and free you from having to explicitly manage the contents of the boot copy table.
For more information on the LOAD_START(), RUN_START(), and SIZE() operators, see
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9.9.3 Overlay Management Example
Consider an application which contains a memory overlay that must be managed at run time. The memory overlay is defined using a UNION in the link command file as illustrated in
:
Example 9-19. Using a UNION for Memory Overlay
SECTIONS
{
...
UNION
{
GROUP
{
.task1: { task1.obj(.text) }
.task2: { task2.obj(.text) }
} load = ROM, LOAD_START(_task12_load_start), SIZE(_task12_size)
GROUP
{
.task3: { task3.obj(.text) }
.task4: { task4.obj(.text) }
}
...
} load = ROM, LOAD_START(_task34_load_start), SIZE(_task_34_size)
} run = RAM, RUN_START(_task_run_start)
The application must manage the contents of the memory overlay at run time. That is, whenever any services from .task1 or .task2 are needed, the application must first ensure that .task1 and .task2 are resident in the memory overlay. Similarly for .task3 and .task4.
To affect a copy of .task1 and .task2 from ROM to RAM at run time, the application must first gain access to the load address of the tasks (_task12_load_start), the run address (_task_run_start), and the size
(_task12_size). Then this information is used to perform the actual code copy.
9.9.4 Generating Copy Tables Automatically With the Linker
The linker supports extensions to the link command file syntax that enable you to do the following:
• Identify any object components that may need to be copied from load space to run space at some point during the run of an application
• Instruct the linker to automatically generate a copy table that contains (at least) the load address, run address, and size of the component that needs to be copied
• Instruct the linker to generate a symbol specified by you that provides the address of a linker-generated copy table. For instance,
can be written as shown in
:
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Example 9-20. Produce Address for Linker Generated Copy Table
SECTIONS
{
...
UNION
{
GROUP
{
.task1: { task1.obj(.text) }
.task2: { task2.obj(.text) }
} load = ROM, table(_task12_copy_table)
GROUP
{
.task3: { task3.obj(.text) }
.task4: { task4.obj(.text) }
}
} load = ROM, table(_task34_copy_table)
} run = RAM
...
Linker-Generated Copy Tables
Using the SECTIONS directive from
in the link command file, the linker generates two copy tables named: _task12_copy_table and _task34_copy_table. Each copy table provides the load address, run address, and size of the GROUP that is associated with the copy table. This information is accessible from application source code using the linker-generated symbols, _task12_copy_table and
_task34_copy_table, which provide the addresses of the two copy tables, respectively.
Using this method, you do not have to worry about the creation or maintenance of a copy table. You can reference the address of any copy table generated by the linker in C/C++ or assembly source code, passing that value to a general purpose copy routine which will process the copy table and affect the actual copy.
9.9.5 The table() Operator
You can use the table() operator to instruct the linker to produce a copy table. A table() operator can be applied to an output section, a GROUP, or a UNION member. The copy table generated for a particular table() specification can be accessed through a symbol specified by you that is provided as an argument to the table() operator. The linker creates a symbol with this name and assigns it the address of the copy table as the value of the symbol. The copy table can then be accessed from the application using the linker-generated symbol.
Each table() specification you apply to members of a given UNION must contain a unique name. If a table() operator is applied to a GROUP, then none of that GROUP's members may be marked with a table() specification. The linker detects violations of these rules and reports them as warnings, ignoring each offending use of the table() specification. The linker does not generate a copy table for erroneous table() operator specifications.
Copy tables can be generated automatically; see
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9.9.6 Boot-Time Copy Tables
The linker supports a special copy table name, BINIT (or binit), that you can use to create a boot-time copy table. For example, the link command file for the boot-loaded application described in
can be rewritten as follows:
SECTIONS
{
.flashcode: { app_tasks.obj(.text) } load = FLASH, run = PMEM,
...
table(BINIT)
}
For this example, the linker creates a copy table that can be accessed through a special linker-generated symbol, __binit__, which contains the list of all object components that need to be copied from their load location to their run location at boot-time. If a link command file does not contain any uses of table(BINIT), then the __binit__ symbol is given a value of -1 to indicate that a boot-time copy table does not exist for a particular application.
You can apply the table(BINIT) specification to an output section, GROUP, or UNION member. If used in the context of a UNION, only one member of the UNION can be designated with table(BINIT). If applied to a GROUP, then none of that GROUP's members may be marked with table(BINIT).The linker detects violations of these rules and reports them as warnings, ignoring each offending use of the table(BINIT) specification.
9.9.7 Using the table() Operator to Manage Object Components
If you have several pieces of code that need to be managed together, then you can apply the same table() operator to several different object components. In addition, if you want to manage a particular object component in multiple ways, you can apply more than one table() operator to it. Consider the link command file excerpt in
Example 9-21. Linker Command File to Manage Object Components
SECTIONS
{
UNION
{
.first: { a1.obj(.text), b1.obj(.text), c1.obj(.text) } load = EMEM, run = PMEM, table(BINIT), table(_first_ctbl)
}
.second: { a2.obj(.text), b2.obj(.text) } load = EMEM, run = PMEM, table(_second_ctbl)
}
.extra: load = EMEM, run = PMEM, table(BINIT)
...
In this example, the output sections .first and .extra are copied from external memory (EMEM) into program memory (PMEM) at boot time while processing the BINIT copy table. After the application has started executing its main thread, it can then manage the contents of the overlay using the two overlay copy tables named: _first_ctbl and _second_ctbl.
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9.9.8 Compression Support
When automatically generating copy tables, the linker provides a way to compress the load-space data.
This can reduce the read-only memory foot print. This compressed data can be decompressed while copying the data from load space to run space.
When you choose compression, it is not guaranteed that the linker will compress the load data. The linker compresses load data only when such compression reduces the overall size of the load space. In some cases even if the compression results in smaller load section size the linker does not compress the data if the decompression routine offsets for the savings.
For example, assume RLE compression reduces the size of section1 by 30 bytes. Also assume the RLE decompression routine takes up 40 bytes in load space. By choosing to compress section1 the load space is increased by 10 bytes. Therefore, the linker will not compress section1. On the other hand, if there is another section (say section2) that can benefit by more than 10 bytes from applying the same compression then both sections can be compressed and the overall load space is reduced. In such cases the linker compresses both the sections.
You cannot force the linker to compress the data when doing so does not result in savings.
9.9.8.1
Compressed Copy Table Format
The copy table format is the same irrespective of the compression. The size field of the copy record is overloaded to support compression.
illustrates the compressed copy table layout.
Figure 9-7. Compressed Copy Table
Rec size Rec cnt
Load address Run address Size (0 if load data is compressed)
In
also means that the size of the load data is the same as the run data. When the size is 0, it means that the load data is compressed.
9.9.8.2
Compressed Section Representation in the Object File
When the load data is not compressed, the object file can have only one section with a different load and run address.
Consider the following table() operation in the linker command file.
SECTIONS
{
.task1: load = ROM, run = RAM, table(_task1_table)
}
The output object file has one output section named .task1 which has a different load and run addresses.
This is possible because the load space and run space have identical data when the section is not compressed.
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Alternatively, consider the following:
SECTIONS
{
.task1: load = ROM, run = RAM, table(_task1_table, compression=rle)
}
If the linker compresses the .task1 section then the load space data and the run space data are different.
The linker creates the following two sections:
• .task1 : This section is uninitialized. This output section represents the run space image of section task1.
• .task1.load : This section is initialized. This output section represents the load space image of the section task1. This section usually is considerably smaller in size than .task1 output section.
9.9.8.3
Compressed Data Layout
The compressed load data has the following layout:
8-bit index Compressed data
The first eight bits of the load data are the handler index. This handler index is used to index into a handler table to get the address of a handler function that knows how to decode the data that follows. The handler table is a list of 32-bit function pointers as shown in
Figure 9-8. Handler Table
_TI_Handler_Table_Base:
32-bit handler address 1
32-bit handler address N
_TI_Handler_Table_Limit:
The linker creates a separate output section for the load and run space. For example, if .task1.load is compressed using RLE, the handler index points to an entry in the handler table that has the address of the run-time-support routine __TI_decompress_rle().
9.9.8.4
Run-Time Decompression
During run time you call the run-time-support routine copy_in() to copy the data from load space to run space. The address of the copy table is passed to this routine. First the routine reads the record count.
Then it repeats the following steps for each record:
1. Read load address, run address and size from record.
2. If size is zero go to step 5.
3. Call memcpy passing the run address, load address and size.
4. Go to step 1 if there are more records to read.
5. Read the first byte from load address. Call this index.
6. Read the handler address from ( & __TI_Handler_Base)[index].
7. Call the handler and pass load address + 1 and run address.
8. Go to step 1 if there are more records to read.
The routines to handle the decompression of load data are provided in the run-time-support library.
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9.9.8.5
Compression Algorithms
Run Length Encoding (RLE):
8-bit index Initialization data compressed using run length encoding
Linker-Generated Copy Tables
The data following the 8-bit index is compressed using run length encoded (RLE) format. uses a simple run length encoding that can be decompressed using the following algorithm:
1. Read the first byte, Delimiter (D).
2. Read the next byte (B).
3. If B != D, copy B to the output buffer and go to step 2.
4. Read the next byte (L).
(a) If L == 0, then length is either a 16-bit, a 24-bit value, or we ’ ve reached the end of the data, read next byte (L).
(i) If L == 0, length is a 24-bit value or the end of the data is reached, read next byte (L).
(i) If L == 0, the end of the data is reached, go to step 7.
(ii) Else L << = 16, read next two bytes into lower 16 bits of L to complete 24-bit value for L.
(ii) Else L << = 8, read next byte into lower 8 bits of L to complete 16-bit value for L.
(b) Else if L > 0 and L < 4, copy D to the output buffer L times. Go to step 2.
(c) Else, length is 8-bit value (L).
5. Read the next byte (C); C is the repeat character.
6. Write C to the output buffer L times; go to step 2.
7. End of processing.
The run-time support library has a routine __TI_decompress_rle24() to decompress data compressed using RLE. The first argument to this function is the address pointing to the byte after the 8-bit index. The second argument is the run address from the C auto initialization record.
RLE Decompression Routine
NOTE: The previous decompression routine, __TI_decompress_rle(), is included in the run-time-support library for decompressing RLE encodings that are generated by older versions of the linker.
Lempel-Ziv-Storer-Szymanski Compression (LZSS):
8-bit index Data compressed using LZSS
The data following the 8-bit index is compressed using LZSS compression. The run-time-support library has the routine __TI_decompress_lzss() to decompress the data compressed using LZSS. The first argument to this function is the address pointing to the byte after the 8-bit Index, and the second argument is the run address from the C auto initialization record.
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9.9.9 Copy Table Contents
In order to use a copy table that is generated by the linker, you must be aware of the contents of the copy table. This information is included in a new run-time-support library header file, cpy_tbl.h, which contains a
C source representation of the copy table data structure that is automatically generated by the linker.
shows the TMS320C55x copy table header file.
Example 9-22. TMS320C55x cpy_tbl.h File
/*****************************************************************************/
/* cpy_tbl.h vxxxxx */
/* Copyright (c) 2003 Texas Instruments Incorporated
/*
*/
*/
/* Specification of copy table data structures which can be automatically
/* generated by the linker (using the table() operator in the LCF).
/*****************************************************************************/
#ifndef _CPY_TBL
#define _CPY_TBL
*/
*/
#include <stdlib.h>
/*****************************************************************************/
/* Copy Record Data Structure */
/*****************************************************************************/ typedef struct copy_record
{ unsigned long load_loc; unsigned long run_loc; unsigned long size;
} COPY_RECORD;
/*****************************************************************************/
/* Copy Table Data Structure */
/*****************************************************************************/ typedef struct copy_table
{ unsigned short rec_size; unsigned short num_recs;
COPY_RECORD recs[1];
} COPY_TABLE;
/*****************************************************************************/
/* Prototype for general purpose copy routine.
*/
/*****************************************************************************/ extern void copy_in(COPY_TABLE *tp);
/*****************************************************************************/
/* Prototypes for I/O aware copy routines used in copy_in().
*/
/*****************************************************************************/ extern void cpy_io_to_io(void *from, void *to, size_t n); extern void cpy_io_to_mem(void *from, void *to, size_t n); extern void cpy_mem_to_io(void *from, void *to, size_t n);
#endif /* ! _CPY_TBL */
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Linker-Generated Copy Tables
For each object component that is marked for a copy, the linker creates a COPY_RECORD object for it.
Each COPY_RECORD contains at least the following information for the object component:
• The load page id
• The run page id
• The load address
• The run address
• The size
The linker collects all COPY_RECORDs that are associated with the same copy table into a
COPY_TABLE object. The COPY_TABLE object contains the size of a given COPY_RECORD, the number of COPY_RECORDs in the table, and the array of COPY_RECORDs in the table. For instance, in the BINIT example in
, the .first and .extra output sections will each have their own
COPY_RECORD entries in the BINIT copy table. The BINIT copy table will then look like this:
COPY_TABLE __binit__ = { 12, 2,
{ <load page id and address of .first>,
<run page id and address of .first>,
<size of .first> },
{ <load page id and address of .extra>,
<run page id and address of .extra>,
<size of .extra> } };
9.9.10 General Purpose Copy Routine
The cpy_tbl.h file in
also contains a prototype for a general-purpose copy routine, copy_in(), which is provided as part of the run-time-support library. The copy_in() routine takes a single argument: the address of a linker-generated copy table. The routine then processes the copy table data object and performs the copy of each object component specified in the copy table.
The copy_in() function definition is provided in the cpy_tbl.c run-time-support source file shown in
Example 9-23. Run-Time-Support cpy_tbl.c File
/****************************************************************************/
/* cpy_tbl.c
*/
/*
/* Copyright (c) 2003 Texas Instruments Incorporated
*/
*/
/*
/* General purpose copy routine. Given the address of a linker-generated
*/
*/
/* COPY_TABLE data structure, effect the copy of all object components */
/* that are designated for copy via the corresponding LCF table() operator. */
/* */
/****************************************************************************/
#include <cpy_tbl.h>
#include <string.h>
/****************************************************************************/
/* Static Function Prototypes for I/O aware copy routines.
*/
/****************************************************************************/ static void cpy_io_to_io(void *from, void *to, size_t n); static void cpy_io_to_mem(void *from, void *to, size_t n); static void cpy_mem_to_io(void *from, void *to, size_t n);
/****************************************************************************/
/* COPY_IN() */
/****************************************************************************/ void copy_in(COPY_TABLE *tp)
{ unsigned short i; for (i = 0; i < tp->num_recs; i++)
{
COPY_RECORD *crp = &tp->recs[i];
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Example 9-23. Run-Time-Support cpy_tbl.c File (continued) int load_pgid = (int)(crp->load_loc >> 24); unsigned char *load_addr = (unsigned char *)(crp->load_loc & 0x7fffff); int run_pgid = (int)(crp->run_loc >> 24); unsigned char *run_addr = (unsigned char *)(crp->run_loc & 0x7fffff); unsigned int cpy_type = 0;
/**********************************************************************/
/* If page ID != 0, location is assumed to be in I/O memory.
*/
/**********************************************************************/ if (load_pgid) cpy_type += 2; if (run_pgid) cpy_type += 1;
/**********************************************************************/
/* Dispatch to appropriate copy routine based on whether or not load */
/* and/or run location is in I/O memory.
*/
/**********************************************************************/ switch (cpy_type)
{ case 3: cpy_io_to_io(load_addr, run_addr, crp->size) ; break; case 2: cpy_io_to_mem(load_addr, run_addr, crp->size); break; case 1: cpy_mem_to_io(load_addr, run_addr, crp->size); break; case 0: memcpy(run_addr, load_addr, crp->size); break;
}
}
}
/****************************************************************************/
/* CPY_IO_TO_IO() - Move code/data from one location in I/O to another.
*/
/****************************************************************************/ static void cpy_io_to_io(void *from, void *to, size_t n)
{ ioport unsigned char *src = (unsigned char *)from; ioport unsigned char *dst = (unsigned char *)to; register size_t rn;
} for (rn = 0; rn < n; rn++) *dst++ = *src++;
/****************************************************************************/
/* CPY_IO_TO_MEM() - Move code/data from I/O to normal system memory.
*/
/****************************************************************************/ static void cpy_io_to_mem(void *from, void *to, size_t n)
{ ioport unsigned char *src = (unsigned char *)from; unsigned char *dst = (unsigned char *)to; register size_t rn;
} for (rn = 0; rn < n; rn++) *dst++ = *src++;
/****************************************************************************/
/* CPY_MEM_TO_IO() - Move code/data from normal memory to I/O.
*/
/****************************************************************************/ static void cpy_mem_to_io(void *from, void *to, size_t n)
{ unsigned char *src = (unsigned char *)from; ioport unsigned char *dst = (unsigned char *)to; register size_t rn;
} for (rn = 0; rn < n; rn++) *dst++ = *src++;
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The load and run page id ’ s are unpacked from the load_loc and run_loc fields and used to select the appropriate subroutine for copying from the source memory type to the destination memory type. A page id of 0 indicates that the specified address is in normal C55x memory, and a non-zero page id indicates that the address is in I/O memory. The general-purpose copy routine utilizes special copy routines if the code/data needs to be moved into and/or out of I/O memory.
A pointer can be qualified with the ioport keyword to indicate that any memory reads from that address need to be qualified with a readport() instruction modifier or a port() operand modifier. Likewise, a memory write to such a pointer needs to be qualified with a writeport() instruction modifier or a port() operand modifier. By qualifying the pointer with the ioport keyword, the compiler generates these I/O modifiers automatically.
9.9.11 Linker-Generated Copy Table Sections and Symbols
The linker creates and allocates a separate input section for each copy table that it generates. Each copy table symbol is defined with the address value of the input section that contains the corresponding copy table.
The linker generates a unique name for each overlay copy table input section. For example, table(_first_ctbl) would place the copy table for the .first section into an input section called
.ovly:_first_ctbl. The linker creates a single input section, .binit, to contain the entire boot-time copy table.
illustrates how you can control the placement of the linker-generated copy table sections using the input section names in the link command file.
Example 9-24. Controlling the Placement of the Linker-Generated Copy Table Sections
SECTIONS
{
UNION
{
.first: { a1.obj(.text), b1.obj(.text), c1.obj(.text) } load = EMEM, run = PMEM, table(BINIT), table(_first_ctbl)
}
.second: { a2.obj(.text), b2.obj(.text) } load = EMEM, run = PMEM, table(_second_ctbl)
.extra: load = EMEM, run = PMEM, table(BINIT)
...
}
.ovly: { } > BMEM
.binit: { } > BMEM
For the link command file in
, the boot-time copy table is generated into a .binit input section, which is collected into the .binit output section, which is mapped to an address in the BMEM memory area. The _first_ctbl is generated into the .ovly:_first_ctbl input section and the _second_ctbl is generated into the .ovly:_second_ctbl input section. Since the base names of these input sections match the name of the .ovly output section, the input sections are collected into the .ovly output section, which is then mapped to an address in the BMEM memory area.
If you do not provide explicit placement instructions for the linker-generated copy table sections, they are allocated according to the linker's default placement algorithm.
The linker does not allow other types of input sections to be combined with a copy table input section in the same output section. The linker does not allow a copy table section that was created from a partial link session to be used as input to a succeeding link session.
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9.9.12 Splitting Object Components and Overlay Management
In previous versions of the linker, splitting sections that have separate load and run placement instructions was not permitted. This restriction was because there was no effective mechanism for you, the developer, to gain access to the load address or run address of each one of the pieces of the split object component.
Therefore, there was no effective way to write a copy routine that could move the split section from its load location to its run location.
However, the linker can access both the load address and run address of every piece of a split object component. Using the table() operator, you can tell the linker to generate this information into a copy table.
The linker gives each piece of the split object component a COPY_RECORD entry in the copy table object.
For example, consider an application which has seven tasks. Tasks 1 through 3 are overlaid with tasks 4 through 7 (using a UNION directive). The load placement of all of the tasks is split among four different memory areas (LMEM1, LMEM2, LMEM3, and LMEM4). The overlay is defined as part of memory area
PMEM. You must move each set of tasks into the overlay at run time before any services from the set are used.
You can use table() operators in combination with splitting operators, >> , to create copy tables that have all the information needed to move either group of tasks into the memory overlay as shown in
illustrates a possible driver for such an application.
Example 9-25. Creating a Copy Table to Access a Split Object Component
SECTIONS
{
UNION
{
.task1to3: { *(.task1), *(.task2), *(.task3) } load >> LMEM1 | LMEM2 | LMEM4, table(_task13_ctbl)
GROUP
{
.task4: { *(.task4) }
.task5: { *(.task5) }
.task6: { *(.task6) }
.task7: { *(.task7) }
}
} load >> LMEM1 | LMEM3 | LMEM4, table(_task47_ctbl)
} run = PMEM
...
.ovly: > LMEM4
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Example 9-26. Split Object Component Driver
#include <cpy_tbl.h> extern far COPY_TABLE task13_ctbl; extern far COPY_TABLE task47_ctbl; extern void task1(void);
...
extern void task7(void); main()
{
...
copy_in(&task13_ctbl); task1(); task2(); task3();
...
} copy_in(&task47_ctbl); task4(); task5(); task6(); task7();
...
Linker-Generated Copy Tables
You must declare a COPY_TABLE object as far to allow the overlay copy table section placement to be independent from the other sections containing data objects (such as .bss).
The contents of the .task1to3 section are split in the section's load space and contiguous in its run space.
The linker-generated copy table, _task13_ctbl, contains a separate COPY_RECORD for each piece of the split section .task1to3. When the address of _task13_ctbl is passed to copy_in(), each piece of .task1to3
is copied from its load location into the run location.
The contents of the GROUP containing tasks 4 through 7 are also split in load space. The linker performs the GROUP split by applying the split operator to each member of the GROUP in order. The copy table for the GROUP then contains a COPY_RECORD entry for every piece of every member of the GROUP.
These pieces are copied into the memory overlay when the _task47_ctbl is processed by copy_in().
The split operator can be applied to an output section, GROUP, or the load placement of a UNION or
UNION member. The linker does not permit a split operator to be applied to the run placement of either a
UNION or of a UNION member. The linker detects such violations, emits a warning, and ignores the offending split operator usage.
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Partial (Incremental) Linking www.ti.com
9.10 Partial (Incremental) Linking
An output file that has been linked can be linked again with additional modules. This is known as partial
linking or incremental linking. Partial linking allows you to partition large applications, link each part separately, and then link all the parts together to create the final executable program.
Follow these guidelines for producing a file that you will relink:
• The intermediate files produced by the linker must have relocation information. Use the --relocatable option when you link the file the first time. (See
• Intermediate files must have symbolic information. By default, the linker retains symbolic information in its output. Do not use the --no_sym_table option if you plan to relink a file, because --no_sym_table strips symbolic information from the output module. (See
• Intermediate link operations should be concerned only with the formation of output sections and not with allocation. All allocation, binding, and MEMORY directives should be performed in the final link.
• If the intermediate files have global symbols that have the same name as global symbols in other files and you want them to be treated as static (visible only within the intermediate file), you must link the files with the --make_static option (see
).
• If you are linking C code, do not use --ram_model or --rom_model until the final linker. Every time you invoke the linker with the --ram_model or --rom_model option, the linker attempts to create an entry point. (See
The following example shows how you can use partial linking:
Step 1: Link the file file1.com; use the --relocatable option to retain relocation information in the output file tempout1.out.
cl55 --run_linker --relocatable --output_file=tempout1 file1.com
file1.com contains:
SECTIONS
{ ss1: { f1.obj
f2.obj
.
.
.
fn.obj
}
}
Step 2: Link the file file2.com; use the --relocatable option to retain relocation information in the output file tempout2.out.
cl55 --run_linker --relocatable --output_file=tempout2 file2.com
file2.com contains:
SECTIONS
{ ss2: { g1.obj
g2.obj
.
.
.
gn.obj
}
}
Step 3: Link tempout1.out and tempout2.out.
cl55 --run_linker --map_file=final.map
--output_file=final.out
tempout1.out
tempout2.out
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Linking C/C++ Code
9.11 Linking C/C++ Code
The C/C++ compiler produces assembly language source code that can be assembled and linked. For example, a C program consisting of modules prog1, prog2, etc., can be assembled and then linked to produce an executable file called prog.out: cl55 --run_linker --rom_model --output_file prog.out prog1.obj prog2.obj ... rts55.lib
The --rom_model option tells the linker to use special conventions that are defined by the C/C++ environment.
The archive libraries shipped by TI contain C/C++ run-time-support functions.
C, C++, and mixed C and C++ programs can use the same run-time-support library. Run-time-support functions and variables that can be called and referenced from both C and C++ will have the same linkage.
For more information about the TMS320C55x C/C++ language, including the run-time environment and run-time-support functions, see the TMS320C55x Optimizing C/C++ Compiler User's Guide.
9.11.1 Run-Time Initialization
All C/C++ programs must be linked with code to initialize and execute the program, called a bootstrap routine, also known as the boot.obj object module. The symbol _c_int00 is defined as the program entry point and is the start of the C boot routine in boot.obj; referencing _c_int00 ensures that boot.obj is automatically linked in from the run-time-support library. When a program begins running, it executes boot.obj first. The boot.obj symbol contains code and data for initializing the run-time environment and performs the following tasks:
• Sets up the system stack
• Sets up the primary and secondary system stacks
• Processes the run-time .cinit initialization table and autoinitializes global variables (when the linker is invoked with the --rom_model option)
The run-time-support object libraries contain boot.obj. You can:
• Use the archiver to extract boot.obj from the library and then link the module in directly.
• Include the appropriate run-time-support library as an input file (the linker automatically extracts boot.obj when you use the --ram_model or --rom_model option).
9.11.2 Object Libraries and Run-Time Support
The TMS320C55x Optimizing C/C++ Compiler User's Guide describes additional run-time-support functions that are included in rts.src. If your program uses any of these functions, you must link the appropriate run-time-support library with your object files.
You can also create your own object libraries and link them. The linker includes and links only those library members that resolve undefined references.
9.11.3 Setting the Size of the Stack and Heap Sections
The C/C++ language uses three uninitialized sections called .sysmem, .stack, and .sysstack for the memory pool used by the malloc( ) functions and the run-time stacks, respectively. You can set the size of these by using the --heap_size, --stack_size, or --sysstack option and specifying the size of the section as a 4-byte constant immediately after the option. If the options are not used, the default size of the heap is
2K bytes and the default size of the stack is 1K bytes.
Allocation of .stack and .sysstack Sections
NOTE: The .stack and .sysstack sections must be allocated on the same 64K-word data page.
See
for setting heap sizes,
for setting system stack sizes, and
for setting secondary stack sizes.
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Linking C/C++ Code www.ti.com
9.11.4 Autoinitialization of Variables at Run Time
Autoinitializing variables at run time is the default method of autoinitialization. To use this method, invoke the linker with the --rom_model option.
Using this method, the .cinit section is loaded into memory along with all the other initialized sections. The linker defines a special symbol called cinit that points to the beginning of the initialization tables in memory. When the program begins running, the C boot routine copies data from the tables (pointed to by
.cinit) into the specified variables in the .bss section. This allows initialization data to be stored in slow external memory and copied to fast external memory each time the program starts.
illustrates autoinitialization at run time. Use this method in any system where your application runs from code burned into slow external memory.
Figure 9-9. Autoinitialization at Run Time
Object file Memory
.cinit
section
Loader cint Initialization tables
(EXT_MEM)
Boot routine
.bss
section
(D_MEM)
9.11.5 Initialization of Variables at Load Time
Initialization of variables at load time enhances performance by reducing boot time and by saving the memory used by the initialization tables. To use this method, invoke the linker with the --ram_model option.
When you use the --ram_model linker option, the linker sets the STYP_COPY bit in the .cinit section's header. This tells the loader not to load the .cinit section into memory. (The .cinit section occupies no space in the memory map.) The linker also sets the cinit symbol to -1 (normally, cinit points to the beginning of the initialization tables). This indicates to the boot routine that the initialization tables are not present in memory; accordingly, no run-time initialization is performed at boot time.
A loader must be able to perform the following tasks to use initialization at load time:
• Detect the presence of the .cinit section in the object file.
• Determine that STYP_COPY is set in the .cinit section header, so that it knows not to copy the .cinit
section into memory.
• Understand the format of the initialization tables.
illustrates the initialization of variables at load time.
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Linking C/C++ Code
Figure 9-10. Initialization at Load Time
Object file Memory
.cinit
Loader
.bss
9.11.6 The --rom_model and --ram_model Linker Options
The following list outlines what happens when you invoke the linker with the --ram_model or --rom_model option.
• The symbol _c_int00 is defined as the program entry point. The _c_int00 symbol is the start of the C boot routine in boot.obj; referencing _c_int00 ensures that boot.obj is automatically linked in from the appropriate run-time-support library.
• The .cinit output section is padded with a termination record to designate to the boot routine
(autoinitialize at run time) or the loader (initialize at load time) when to stop reading the initialization tables.
• When you initialize at load time (--ram_model option):
– The linker sets cinit to -1. This indicates that the initialization tables are not in memory, so no initialization is performed at run time.
– The STYP_COPY flag (0010h) is set in the .cinit section header. STYP_COPY is the special attribute that tells the loader to perform initialization directly and not to load the .cinit section into memory. The linker does not allocate space in memory for the .cinit section.
• When you autoinitialize at run time (--rom_model option), the linker defines cinit as the starting address of the .cinit section. The C boot routine uses this symbol as the starting point for autoinitialization.
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Linker Example www.ti.com
9.12 Linker Example
This example links three object files named demo.obj, ctrl.obj, and tables.obj and creates a program called demo.out.
Assume that target memory has the following program memory configuration:
Program Memory
Address Range
0x0080 to 0x7000
0xC000 to 0xFF80
Contents
On-chip RAM_PG
On-chip ROM
Data Memory
Address Range
0x0080 to 0x0FFF
0x0060 to 0xFFFF
Contents
RAM block
ONCHIP
Mapped external addresses EXT
Byte Address Range
000100 to 007080
007081 to 008000
008001 to 00A000
00C000 to 00FF80
Contents
On-chip RAM_PG
RAM block
ONCHIP
Mapped external addresses EXT
On-chip ROM
The output sections are constructed in the following manner:
• Executable code, contained in the .text sections of demo.obj, fft.obj, and tables.obj, is linked into program memory ROM.
• Variables, contained in the var_defs section of demo.obj, are linked into data memory in block
FAST_MEM_2.
• Tables of coefficients in the .data sections of demo.obj, tables.obj, and fft.obj are linked into
FAST_MEM_1. A hole is created with a length of 100 and a fill value of 0x07A1C.
• The xy section form demo.obj, which contains buffers and variables, is linked by default into page 1 of the block STACK, since it is not explicitly linked.
• Executable code, contained in the .text sections of demo.obj, fft.obj, and tables.obj must be linked into program ROM.
• Variables, contained in the var_defs section of demo.obj, must be linked into data memory in block
ONCHIP.
• Tables of coefficients in the .data sections of demo.obj, tables.obj and fft.obj must be linked into RAM block ONCHIP in data memory. A hole is created with a length of 100 bytes and a fill value of 07A1Ch.
The remainder of block ONCHIP must be initialized to the value 07A1Ch.
• The .bss sections from demo.obj. tables.obj, and fft.obj, which contain variables, must be linked into block RAM_PG of program RAM. The unused part of this RAM must be initialized to 0FFFFh.
• The xy section from demo.obj, which contains buffers and variables, has the default linking into block
ONCHIP of data RAM, since it was not explicitly linked.
shows the link command file for this example.
shows the map file.
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Example 9-27. Linker Command File, demo.cmd
/***************************************************************/
/*** Specify Linker Options ***/
/***************************************************************/
--entry_point coeff /* Define the program entry point */
--output_file=demo.out
--map_file=demo.map
/* Name the output file
/* Create an output map
*/
*/
/***************************************************************/
/*** Specify the Input Files ***/
/***************************************************************/ demo.obj
fft.obj
tables.obj
/***************************************************************/
/*** Specify the Memory Configurations ***/
/***************************************************************/
MEMORY
{
RAM_PG: origin=00100h length=06F80h
ONCHIP: origin=007081h length=0F7Fh
EXT:
ROM: origin=08001h length=01FFFh origin=0C000h length=03F80h
}
/***************************************************************/
/*** Specify the Output Sections ***/
/***************************************************************/
SECTIONS
{
.text: load = ROM var_defs: load = ONCHIP
/* link .text into ROM */
.data: fill = 07A1Ch, load=ONCHIP
/* defs in RAM */
{ tables.obj(.data) /* .data input */ fft.obj(.data) /* .data input */
. = 100h; /* create hole, fill with 07A1Ch */
}
.bss: load=RAM_PG,fill=0FFFFh
/* and link with ONCHIP */
/* Remaining .bss; fill and link */
}
/***************************************************************/
/*** End of Command File ***/
/***************************************************************/
Linker Example
Invoke the linker by entering the following command: cl55 --run_linker demo.cmd
This creates the map file shown in
and an output file called demo.out that can be run on a
TMS320C55x.
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Linker Example
Example 9-28. Output Map File, demo.map
OUTPUT FILE NAME: <demo.out>
ENTRY POINT SYMBOL: 0
MEMORY CONFIGURATION name org(bytes) len(bytes) used(bytes) attributes fill
-----------------------------------------------
RAM_PG 00000100 000006f80 00000064 RWIX
ONCHIP
EXT
ROM
00007081
00008000
0000c000
000000f7f
000001fff
000003f80
00000104
00000000
0000001f
RWIX
RWIX
RWIX
SECTION ALLOCATION MAP output attributes/ section page org(bytes) org(words) len(bytes) len(words) input sections
-------- ---- ---------- ---------- ---------- ---------- ----------------
.text
0 0000c000 0000001f
0000c000
0000c00a
0000c012
0000c01e
0000000a
00000008
0000000c
00000001 tables.obj(.text) fft.obj (.text) demo.obj (.text)
--HOLE-- [fill = 2020] var_defs 0
.data
.bss
0
0
00003841
00003841
00003843
00003843
00003844
00003848
000038c3
00000080
00000002
00000002 fft.obj (var_defs)
00000080
00000001 tables.obj (.data)
00000004 fft.obj (.data)
0000007b --HOLE-- [fill = 7a1c]
00000000 demo.obj (.data)
00000002 xy 0
00000080
00000082
00000082
00000082
00000082
00000002 demo.obj(.bss)[fill=ffff]
00000000 fft.obj (.bss)
00000000 tables.obj (.bss)
00000030 UNINITIALIZED
00000030 demo.obj (xy)
GLOBAL SYMBOLS:
Sorted alphabetically by name abs. value/ byte addr word addr name
---------------------
00000080 .bss
0000c000
0000c016
00003843 .data
.text
ARRAY
00003843 TEMP
0000c012
0000c01f
_x42
000038c3 edata
00000082 end etext
Sorted by symbol address abs. value/ byte addr word addr name
------------------
0000c012
0000c000
0000c016
0000c01f
00000080 .bss
00000082 end
00003843 .data
00003843 TEMP
000038c3 edata
_x42
.text
ARRAY etext www.ti.com
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Chapter 10
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Absolute Lister Description
The TMS320C55x absolute lister is a debugging tool that accepts linked object files as input and creates
.abs files as output. These .abs files can be assembled to produce a listing that shows the absolute addresses of object code. Manually, this could be a tedious process requiring many operations; however, the absolute lister utility performs these operations automatically.
Topic
...........................................................................................................................
Page
10.1
Producing an Absolute Listing
10.2
Invoking the Absolute Lister
..........................................................................
.............................................................................
10.3
Absolute Lister Example ...................................................................................
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Producing an Absolute Listing
10.1 Producing an Absolute Listing
illustrates the steps required to produce an absolute listing.
Figure 10-1. Absolute Lister Development Flow
Step 1: Assembler source file
First, assemble a source file.
Step 2:
Assembler
Object file
Linker
Link the resulting object file.
Step 3:
Linked object file
Absolute lister
Invoke the absolute lister; use the linked object file as input. This creates a file with an .abs extension.
Step 4:
.abs
file
Assembler
Finally, assemble the .abs file; you must invoke the assembler with the compiler
--absolute_listing option.
This produces a listing file that contains absolute addresses.
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10.2 Invoking the Absolute Lister
The syntax for invoking the absolute lister is:
abs55 [-options] input file
Invoking the Absolute Lister abs55 options input file is the command that invokes the absolute lister.
identifies the absolute lister options that you want to use. Options are not case sensitive and can appear anywhere on the command line following the command. Precede each option with a hyphen (-). The absolute lister options are as follows:
-e enables you to change the default naming conventions for filename extensions on assembly files, C source files, and C header files. The valid options are:
• ea [.]asmext for assembly files (default is .asm)
• ec [.]cext for C source files (default is .c)
• eh [.]hext for C header files (default is .h)
• ep [.]pext for CPP source files (default is cpp)
The . in the extensions and the space between the option and the extension are optional.
-q (quiet) suppresses the banner and all progress information.
names the linked object file. If you do not supply an extension, the absolute lister assumes that the input file has the default extension .out. If you do not supply an input filename when you invoke the absolute lister, the absolute lister prompts you for one.
The absolute lister produces an output file for each file that was linked. These files are named with the input filenames and an extension of .abs. Header files, however, do not generate a corresponding .abs
file.
Assemble these files with the --absolute_listing assembler option as follows to create the absolute listing:
cl55 --absolute_listing filename .abs
The -e options affect both the interpretation of filenames on the command line and the names of the output files. They should always precede any filename on the command line.
The -e options are useful when the linked object file was created from C files compiled with the debugging option (--symdebug:dwarf compiler option). When the debugging option is set, the resulting linked object file contains the name of the source files used to build it. In this case, the absolute lister does not generate a corresponding .abs file for the C header files. Also, the .abs file corresponding to a C source file uses the assembly file generated from the C source file rather than the C source file itself.
For example, suppose the C source file hello.csr is compiled with the debugging option set; the debugging option generates the assembly file hello.s. The hello.csr file includes hello.hsr. Assuming the executable file created is called hello.out, the following command generates the proper .abs file: abs55 -ea s -ec csr -eh hsr hello.out
An .abs file is not created for hello.hsr (the header file), and hello.abs includes the assembly file hello.s, not the C source file hello.csr.
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Absolute Lister Example www.ti.com
10.3 Absolute Lister Example
This example uses three source files. The files module1.asm and module2.asm both include the file globals.def.
module1.asm
.bss
.bss
array,100 dflag, 2
.copy
globals.def
.text
MOV
MOV
#offset,AC0 dflag,AC0 module2.asm
.bss
offset, 2
.copy
globals.def
.text
MOV
MOV
#offset,AC0
#array,AC0 globals.def
.global dflag
.global array
.global offset
The following steps create absolute listings for the files module1.asm and module2.asm:
Step 1:
Step 2:
First, assemble module1.asm and module2.asm: cl55 module1 cl55 module2
This creates two object files called module1.obj and module2.obj.
Next, link module1.obj and module2.obj using the following linker command file, called bttest.cmd:
--output_file=bttest.out
--map_file=bttest.map
module1.obj
module2.obj
MEMORY
{
}
SECTIONS
{
ROM: origin=2000h
RAM: origin=8000h
.data: >RAM
.text: >ROM
.bss: >RAM
} length=2000h length=8000h
Invoke the linker: cl55 --run_linker bttest.cmd
This command creates an executable object file called bttest.out; use this new file as input for the absolute lister.
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Step 3: Now, invoke the absolute lister: abs55 bttest.out
This command creates two files called module1.abs and module2.abs:
Absolute Lister Example module1.abs: array dflag offset
.data
.nolist
.setsym
.setsym
.setsym
.setsym
__data_ .setsym
edata .setsym
__edata_ .setsym
.text
.setsym
__text_ .setsym
etext .setsym
__etext_ .setsym
.bss
__bss_ end
__end_
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
0004000h
0004064h
0004066h
0004000h
0004000h
0004000h
0004000h
0002000h
0002000h
000200fh
000200fh
0004000h
0004000h
0004068h
0004068h
".text",0002000h
".data",0004000h
".bss",0004000h
"module1.asm" module2.abs: array dflag offset
.data
.nolist
.setsym
.setsym
.setsym
.setsym
__data_ .setsym
edata .setsym
__edata_ .setsym
.text
.setsym
__text_ .setsym
etext .setsym
__etext_ .setsym
.bss
__bss_ end
__end_
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
0004000h
0004064h
0004066h
0004000h
0004000h
0004000h
0004000h
0002000h
0002000h
000200fh
000200fh
0004000h
0004000h
0004068h
0004068h
".text",0002006h
".data",0004000h
".bss",0004066h
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"module2.asm"
These files contain the following information that the assembler needs for Step 4:
• They contain .setsym directives, which equate values to global symbols. Both files contain global equates for the symbol dflag. The symbol dflag was defined in the file globals.def, which was included in module1.asm and module2.asm.
• They contain .setsect directives, which define the absolute addresses for sections.
• They contain .copy directives, which defines the assembly language source file to include.
The .setsym and .setsect directives are useful only for creating absolute listings, not normal assembly.
Absolute Lister Description 291
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Absolute Lister Example
Step 4: www.ti.com
Finally, assemble the .abs files created by the absolute lister (remember that you must use the --absolute_listing option when you invoke the assembler): cl55 --absolute_listing module1.abs
cl55 --absolute_listing module2.abs
This command sequence creates two listing files called module1.lst and module2.lst; no object code is produced. These listing files are similar to normal listing files; however, the addresses shown are absolute addresses.
The absolute listing files created are module1.lst (see
) and module2.lst (see
Example 10-1. module1.lst
B
B
A
A
B
A
A module1.abs
21 002000
22
1 004000
2 004064
2
3
3
1
4 002000
A
A
5 002000 7640
002002 6608!
6 002004 A000%
No Errors, No Warnings
.text
.copy
"module1.asm"
.bss
array, 100
.bss
dflag, 2
.copy
globals.def
.global dflag
.global array
.global offset
.text
MOV #offset,AC0
MOV dflag,AC0
PAGE 1
Example 10-2. module2.lst
B
B
A
A
B module2.abs
21 002006
22
1 004066
2
1
2
3
A
A
A
3 002006
4 002006 7640
002008 6680-
5 00200a 7640
00200c 0080!
No Errors, No Warnings
.text
.copy
"module2.asm"
.bss
offset, 2
.copy
globals.def
.global dflag
.global array
.global offset
.text
MOV #offset,AC0
MOV #array,AC0
PAGE 1
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Chapter 11
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Cross-Reference Lister Description
The TMS320C55x cross-reference lister is a debugging tool. This utility accepts linked object files as input and produces a cross-reference listing as output. This listing shows symbols, their definitions, and their references in the linked source files.
Topic
...........................................................................................................................
Page
11.1
Producing a Cross-Reference Listing .................................................................
11.2
Invoking the Cross-Reference Lister
11.3
Cross-Reference Listing Example
..................................................................
......................................................................
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Producing a Cross-Reference Listing
11.1 Producing a Cross-Reference Listing
illustrates the steps required to produce a cross-reference listing.
Figure 11-1. The Cross-Reference Lister Development Flow
Step 1:
Assembler source file
Assembler
First, invoke the assembler with the compiler
--cross_reference option. This produces a cross-reference table in the listing file and adds to the object file cross-reference information. By default, only global symbols are cross-referenced. If you use the compiler
--output_all_syms option, local symbols are cross-referenced as well.
Object file
Step 2: Link the object file (.obj) to obtain an executable object file (.out).
Linker
Step 3:
Linked object file
Cross-reference lister
Invoke the cross-reference lister. The following section provides the command syntax for invoking the cross-reference lister utility.
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11.2 Invoking the Cross-Reference Lister
To use the cross-reference utility, the file must be assembled with the correct options and then linked into an executable file. Assemble the assembly language files with the --cross_reference option. This option creates a cross-reference listing and adds cross-reference information to the object file. By default, the assembler cross-references only global symbols, but if the assembler is invoked with the
--output_all_syms option, local symbols are also added. Link the object files to obtain an executable file.
To invoke the cross-reference lister, enter the following:
xref55 [options] [input filename [output filename]] xref55 options is the command that invokes the cross-reference utility.
identifies the cross-reference lister options you want to use. Options are not case sensitive and can appear anywhere on the command line following the command.
-l (lowercase L) specifies the number of lines per page for the output file. The format of the -l option is -lnum, where num is a decimal constant. For example, -l30 sets the number of lines per page in the output file to 30. The space between the option and the decimal constant is optional. The default is 60 lines per page.
-q suppresses the banner and all progress information (run quiet).
input filename is a linked object file. If you omit the input filename, the utility prompts for a filename.
output filename is the name of the cross-reference listing file. If you omit the output filename, the default filename is the input filename with an .xrf extension.
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Cross-Reference Listing Example
11.3 Cross-Reference Listing Example
is an example of cross-reference listing.
Example 11-1. Cross-Reference Listing
================================================================================
Symbol: INIT
Filename
________
RTYP AsmVal LnkVal
____ ________ ________
DefLn RefLn RefLn RefLn
______ _______ _______ _______ file1.asm
file2.asm
EDEF
EREF
'000000
000000
000080
000080
3 1
2 11
================================================================================
Symbol: X
Filename
________
RTYP AsmVal LnkVal
____ ________ ________
DefLn RefLn RefLn RefLn
______ _______ _______ _______ file1.asm
file2.asm
EREF
EDEF
000000
000001
000001
000001 5
2
1
5
================================================================================
Symbol: Y
Filename
________ file2.asm
RTYP AsmVal LnkVal
____ ________ ________
EDEF -000000 000080
DefLn RefLn RefLn RefLn
______ _______ _______ _______
7 1
================================================================================
Symbol: Z
Filename
________ file2.asm
RTYP
____
EDEF
AsmVal
________
000003
LnkVal
________
000003
DefLn
______
9
RefLn
_______
1
RefLn
_______
RefLn
_______
================================================================================ www.ti.com
The terms defined below appear in the preceding cross-reference listing:
Symbol
Filename
RTYP
AsmVal
LnkVal
DefLn
RefLn
Name of the symbol listed
Name of the file where the symbol appears
The symbol ' s reference type in this file. The possible reference types are:
STAT The symbol is defined in this file and is not declared as global.
EDEF The symbol is defined in this file and is declared as global.
EREF The symbol is not defined in this file but is referenced as global.
UNDF The symbol is not defined in this file and is not declared as global.
This hexadecimal number is the value assigned to the symbol at assembly time. A value may also be preceded by a character that describes the symbol ' s attributes.
lists these characters and names.
This hexadecimal number is the value assigned to the symbol after linking.
The statement number where the symbol is defined.
The line number where the symbol is referenced. If the line number is followed by an asterisk (*), then that reference can modify the contents of the object. A blank in this column indicates that the symbol was never used.
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Table 11-1. Symbol Attributes in Cross-Reference
Listing
Cross-Reference Listing Example
Character
'
"
+
-
Meaning
Symbol defined in a .text section
Symbol defined in a .data section
Symbol defined in a .sect section
Symbol defined in a .bss or .usect section
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Chapter 12
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Object File Utilities
This chapter describes how to invoke the following utilities:
• The object file display utility prints the contents of object files, executable files, and/or archive libraries in both text and XML formats.
• The disassembler accepts object files and executable files as input and produces an assembly listing as output. This listing shows assembly instructions, their opcodes, and the section program counter values.
• The name utility prints a list of names defined and referenced in an object file, executable files, and/or archive libraries.
• The strip utility removes symbol table and debugging information from object and executable files.
Topic
...........................................................................................................................
Page
12.1
Invoking the Object File Display Utility ...............................................................
12.2
Invoking the Disassembler ................................................................................
12.3
Invoking the Name Utility ..................................................................................
12.4
Invoking the Strip Utility ...................................................................................
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12.1 Invoking the Object File Display Utility
The object file display utility, ofd55, prints the contents of object files (.obj), executable files (.out), and/or archive libraries (.lib) in both text and XML formats. Hidden symbols are listed as no name, while localized symbols are listed like any other local symbol.
To invoke the object file display utility, enter the following:
ofd55 [options] input filename [input filename] ofd55 is the command that invokes the object file display utility.
input filename names the object file (.obj), executable file (.out), or archive library (.lib) source file.
The filename must contain an extension.
options identify the object file display utility options that you want to use. Options are not case sensitive and can appear anywhere on the command line following the command.
Precede each option with a hyphen.
--dwarf_display=attributes controls the DWARF display filter settings by specifying a comma-delimited list of attributes. When prefixed with no, an attribute is disabled instead of enabled.
Examples: --dwarf_display=nodabbrev,nodline
--dwarf_display=all,nodabbrev
--dwarf_display=none,dinfo,types
-g
-h
-o=filename
--obj_display attributes
-v
-x
--xml_indent=num
The ordering of attributes is important (see --obj_display).
The list of available display attributes can be obtained by invoking ofd55 --dwarf_display=help.
appends DWARF debug information to program output.
displays help sends program output to filename rather than to the screen.
controls the object file display filter settings by specifying a comma-delimited list of attributes. When prefixed with no, an attribute is disabled instead of enabled.
Examples: --obj_display=rawdata,nostrings
--obj_display=all,norawdata
--obj_display=none,header
The ordering of attributes is important. For instance, in
" --obj_display=none,header " , ofd55 disables all output, then re-enables file header information. If the attributes are specified in the reverse order, (header,none), the file header is enabled, the all output is disabled, including the file header. Thus, nothing is printed to the screen for the given files. The list of available display attributes can be obtained by invoking ofd55 --obj_display=help.
prints verbose text output.
displays output in XML format.
sets the number of spaces to indent nested XML tags.
If an archive file is given as input to the object file display utility, each object file member of the archive is processed as if it was passed on the command line. The object file members are processed in the order in which they appear in the archive file.
If the object file display utility is invoked without any options, it displays information about the contents of the input files on the console screen.
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Invoking the Disassembler
Object File Display Format
NOTE: The object file display utility produces data in a text format by default. This data is not intended to be used as input to programs for further processing of the information. XML format should be used for mechanical processing.
12.2 Invoking the Disassembler
The disassembler, dis55, examines the output of the assembler or linker. This utility accepts an object file or executable file as input and writes the disassembled object code to standard output or a specified file.
To invoke the disassembler, enter the following:
dis55 [options] input filename[.] [output filename] dis55 options input
filename[.ext] is the command that invokes the disassembler.
identifies the name utility options you want to use. Options are not case sensitive and can appear anywhere on the command line following the invocation. Precede each option with a hyphen (-). The name utility options are as follows:
-a
-b
-c enables the printing of branch destination addresses along with labels within instructions.
displays data as bytes instead of words.
includes a COFF file description at the top of the listing. This description includes information on the memory model, relocation, line numbers, and local symbols.
-d
-e
-g
-h
-i disables display of data sections.
displays integer values in hexadecimal.
displays in algebraic assembler format.
shows the current help screen.
-I
-l
-L
-m
-n disassembles .data sections as instructions.
disassembles code sections as data.
displays load rather than run address.
displays both load and run addresses.
-q
-r displays in mnemonic assembler format (default).
dumps the symbol table.
(quiet mode) suppresses the banner and all progress information.
(super quiet mode) suppresses all headers.
-s uses the compiler ’ s convention of enabling the ARMS and CPL bits, and disabling the C54CM bit. By default, the disassembler assumes the status bits have their hardware reset values; that is, ARMS and CPL are off and C54CM is on. Use -r when disassembling any file generated from C/C++ source.
suppresses printing of opcode and section program counter in the listing.
When you use this option along with – qq, the disassembly listing looks like the original assembly source file.
-t suppresses the display of text sections in the listing.
is the name of the input file. If the optional extension is not specified, the file is searched for in this order:
1. infile
2. infile.out, an executable file
3. infile.obj, an object file output filename is the name of the optional output file to which the disassembly will be written. If an output filename is not specified, the disassembly is written to standard output.
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Consider the following assembly source file called test.asm:
START
.global GLOBAL
.global FUNC
CONSTANT .set
1
.text
MOV
ADD
AR1,AR0
#CONSTANT,AC0 last foo
ADD
.data
#GLOBAL,AC0
.word
4
.word
1
.word
FUNC
The symbols GLOBAL and FUNC are defined in test2.asm:
.global GLOBAL
.global FUNC
GLOBAL .set
100
FUNC: RETURN
The examples below assume that test.asm and test2.asm have been assembled and linked with the following commands: cl55 --quiet --output_all_syms test.asm
cl55 --quiet --output_all_syms test2.asm
cl55 --run_linker --quiet test.obj test2.obj --output_file=test.out
Example 1
To create a standard disassembly listing of an object file, enter: dis55 test.obj
In the result below, the value 1 was encoded into the first ADD instruction, and the 16-bit ADD instruction was used. For the second ADD instruction, the use of the global symbol GLOBAL caused the assembler to use the 32-bit ADD instruction. The symbols GLOBAL and FUNC are resolved by the linker.
TMS320C55x COFF Disassembler Version x.xx
Copyright (c) 1996-2007 Texas Instruments Incorporated
Disassembly of test.obj:
TEXT Section .text, 0x8 bytes at 0x0
000000: START:
000000: 2298
000002: 4010
MOV AR1,AR0
ADD #1,AC0
000004:
000004: 7b000000 last:
ADD #0,AC0,AC0
DATA Section .data, 0x3 words at 0x0
000000: 0004 .word 0x0004
000001:
000001: 0001
000002: 0000 foo:
.word 0x0001
.word 0x0000
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Invoking the Disassembler
Example 2
You can view the object file information with the -c option. The -q option suppresses the printing of the banner.
dis55 -qc test.obj
>> Target is C55x Phase 3, mem=small, call=c55_std
Relocation information may exist in file
File is not executable
Line number information may be present in the file
Local symbols may be present in the file
Example 3
To create a standard disassembly listing of an executable file, enter: dis55 -q test.out
TEXT Section .text, 0x8 bytes at 0x0
000000: START:
000000: 2298
000002: 4010
MOV AR1,AR0
ADD #1,AC0
000004:
000004: 7b000000 last:
ADD #0,AC0,AC0
DATA Section .data, 0x3 words at 0x0
000000: 0004 .word 0x0004
000001:
000001: 0001
000002: 0000 foo:
.word 0x0001
.word 0x0000
TEXT Section .text, 0xB bytes at 0x100 000100: START: 000100: 2298 MOV AR1,AR0 000102: 4010 ADD
#1,AC0 000104: last: 000104: 7b006400 ADD #100,AC0,AC0 000108: FUNC: 000108: 4804 RET 00010a: 20
NOP 00010b: ___etext__: 00010b: etext: DATA Section .data, 0x3 words at 0x8000 008000: 0004 .word
0x0004 008001: foo: 008001: 0001 .word 0x0001 008002: 0108 .word 0x0108
In the above code, the disassembly listing displays the addresses used by the instructions and data, as well as the resolved symbol values in the ADD instruction and in the final .word directive. The .word
directive contains the correct address of the function. The NOP in the .text section is used to pad the section.
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12.3 Invoking the Name Utility
The name utility, nm55, prints the list of names defined and referenced in an object file, executable file, or archive library. It also prints the symbol value and an indication of the kind of symbol. Hidden symbols are listed as
""
.
To invoke the name utility, enter the following:
nm55 [-options] [input filenames] nm55 input filename options
-a
-c
-d
-f is the command that invokes the name utility.
is an object file (.obj), executable file (.out), or archive library (.lib).
identifies the name utility options you want to use. Options are not case sensitive and can appear anywhere on the command line following the invocation. Precede each option with a hyphen (-). The name utility options are as follows: prints all symbols.
also prints C_NULL symbols for a COFF object module.
also prints debug symbols for a COFF object module.
prepends file name to each symbol.
-g
-h
-l
-n prints only global symbols.
shows the current help screen.
produces a detailed listing of the symbol information.
sorts symbols numerically rather than alphabetically.
-o file outputs to the given file.
-p causes the name utility to not sort any symbols.
-q
-r
(quiet mode) suppresses the banner and all progress information.
sorts symbols in reverse order.
-t
-u also prints tag information symbols for a COFF object module.
only prints undefined symbols.
12.4 Invoking the Strip Utility
The strip utility, strip55, removes symbol table and debugging information from object and executable files.
To invoke the strip utility, enter the following:
strip55 [-p] input filename [input filename] strip55 is the command that invokes the strip utility.
input filename is an object file (.obj) or an executable file (.out).
options identifies the strip utility options you want to use. Options are not case sensitive and can appear anywhere on the command line following the invocation. Precede each option with a hyphen (-). The strip utility option is as follows:
-o filename writes the stripped output to filename.
-p removes all information not required for execution. This option causes more information to be removed than the default behavior, but the object file is left in a state that cannot be linked. This option should be used only with executable (.out) files.
When the strip utility is invoked without the -o option, the input object files are replaced with the stripped version.
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Chapter 13
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Hex Conversion Utility Description
The TMS320C55x assembler and linker create object files which are in binary formats that encourage modular programming and provide powerful and flexible methods for managing code segments and target system memory.
Most EPROM programmers do not accept object files as input. The hex conversion utility converts an object file into one of several standard ASCII hexadecimal formats, suitable for loading into an EPROM programmer. The utility is also useful in other applications requiring hexadecimal conversion of an object file (for example, when using debuggers and loaders).
The hex conversion utility can produce these output file formats:
• ASCII-Hex, supporting 16-bit addresses
• Extended Tektronix (Tektronix)
• Intel MCS-86 (Intel)
• Motorola Exorciser (Motorola-S), supporting 16-bit, 24-bit, and 32-bit addresses
• Texas Instruments SDSMAC (TI-Tagged), supporting 16-bit addresses
• Texas Instruments TI-TXT format, supporting 16-bit addresses
Topic
...........................................................................................................................
Page
13.1
The Hex Conversion Utility ' s Role in the Software Development Flow ....................
13.2
Invoking the Hex Conversion Utility ...................................................................
13.3
Understanding Memory Widths
13.4
The ROMS Directive
.........................................................................
.........................................................................................
13.5
The SECTIONS Directive ...................................................................................
13.6
The Load Image Format (--load_image Option) ....................................................
13.7
Excluding a Specified Section
13.8
Assigning Output Filenames
...........................................................................
.............................................................................
13.9
Image Mode and the --fill Option ........................................................................
13.10 Building a Table for an On-Chip Boot Loader
13.11 Controlling the ROM Device Address
....................................................
................................................................
13.12 Control Hex Conversion Utility Diagnostics .......................................................
13.13 Description of the Object Formats ....................................................................
13.14 Hex Conversion Utility Error Messages .............................................................
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The Hex Conversion Utility ' s Role in the Software Development Flow
13.1 The Hex Conversion Utility
'
s Role in the Software Development Flow
highlights the role of the hex conversion utility in the software development process.
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Figure 13-1. The Hex Conversion Utility in the TMS320C55x Software Development Flow
C/C++ source files
Macro source files
C/C++ compiler
Archiver
Assembler source
C++ name demangling utility
Macro library
Assembler
Archiver
Library of object files
Object files
Linker
Library-build utility
Run-timesupport library
Debugging tools
Executable object file
Hex-conversion utility
Programmer Absolute lister
Cross-reference lister
Object file utilities
C55x
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13.2 Invoking the Hex Conversion Utility
There are two basic methods for invoking the hex conversion utility:
• Specify the options and filenames on the command line. The following example converts the file firmware.out into TI-Tagged format, producing two output files, firm.lsb and firm.msb.
hex55 -t firmware -o firm.lsb -o firm.msb
• Specify the options and filenames in a command file. You can create a file that stores command line options and filenames for invoking the hex conversion utility. The following example invokes the utility using a command file called hexutil.cmd: hex55 hexutil.cmd
In addition to regular command line information, you can use the hex conversion utility ROMS and
SECTIONS directives in a command file.
13.2.1 Invoking the Hex Conversion Utility From the Command Line
To invoke the hex conversion utility, enter:
hex55 [options] filename hex55 options filename is the command that invokes the hex conversion utility.
supplies additional information that controls the hex conversion process. You can use options on the command line or in a command file.
lists the basic options.
• All options are preceded by a hyphen and are not case sensitive.
• Several options have an additional parameter that must be separated from the option by at least one space.
• Options with multi-character names must be spelled exactly as shown in this document; no abbreviations are allowed.
• Options are not affected by the order in which they are used. The exception to this rule is the --quiet option, which must be used before any other options.
names an object file or a command file (for more information, see
Option
--entry_point=addr
--exclude={fname(sname) |
sname}
--fill=value
--help
--image
--linkerfill
--map=filename
--memwidth=value
--olength=value
--order={LS|MS}
--outfile=filename
--quiet
Table 13-1. Basic Hex Conversion Utility Options
Alias
-e
-exclude
-fill
-options, -h
-image
-linkerfill
-map
-memwidth
-olength
-order
-o
-q
Description
General Options
Specify entry point address or symbol name
See
If the filename (fname) is omitted, all sections matching
sname will be excluded.
Fill holes with value
Display the syntax for invoking the utility and list available options. If the option is followed by another option or phrase, detailed information about that option or phrase is displayed.
For example, to see information about options associated with generating a boot table, use --help boot.
Select image mode
Include linker fill sections in images
Generate a map file
Define the system memory word width (default 16 bits)
--
Specify maximum number of data items per line of output
Specify data ordering (endianness)
--
Specify an output filename
Run quietly (when used, it must appear before other options)
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Option
--romwidth=value
--zero
--diag_error=id
--diag_remark=id
--diag_suppress=id
--diag_warning=id
--display_error_number
--issue_remarks
--no_warnings
--set_error_limit=count
--boot
--bootorg=addr
--bootpage
--delay value
-parallel16
-parallel32
-reg_config
addr,data{,data,...}
--serial8
--serial16
--versiondevice
--ascii
--binary
--intel
--motorola=1
--motorola=2
--motorola=3
--tektronix
--ti_tagged
--ti_txt
Table 13-1. Basic Hex Conversion Utility Options (continued)
Alias
--load_image
--section_name_prefix=string
-romwidth
-zero, -z
-boot
-bootorg
-bootpage
-delay
-serial8
-serial16
-v
-a
-b
-i
-m1
-m2
-m3
-x
-t
Description
Specify the ROM device width (default depends on format used)
Reset the address origin to 0 in image mode
Diagnostic Options
Categorizes the diagnostic identified by id as an error
Categorizes the diagnostic identified by id as a remark
Suppresses the diagnostic identified by id
Categorizes the diagnostic identified by id as a warning
Displays a diagnostic ' s identifiers along with its text
Issues remarks (nonserious warnings)
Suppresses warning diagnostics (errors are still issued)
Sets the error limit to count. The linker abandons linking after this number of errors. (The default is 100.)
Boot Table Options
Convert all sections into bootable form (use instead of a
SECTIONS directive)
Specify origin address or symbol of boot table in ROM
Specify page of boot table in ROM
Specify delay of given value in configuration table
Specify a 16-bit parallel interface boot table (-memwidth 16 and -romwidth 16)
Specify a 32-bit parallel interface boot table (-memwidth 16 and -romwidth 32)
Initialize locations starting at location addr with the given data values
Specify an 8-bit serial interface boot table (-memwidth 8 and
-romwidth 8)
Specify an 16-bit serial interface boot table (-memwidth 16and
-romwidth 16)
Specify the silicon boot table version
Output Options
Select ASCII-Hex
Select binary (Must have memory width of 8 bits.)
Select Intel
Select Motorola-S1
Select Motorola-S2 (default -m option)
Select Motorola-S3
Select Tektronix (default format when no output option is specified)
Select TI-Tagged
Select TI-Txt
Load Image Options
Select load image
Specify the section name prefix for load image object files
See
--
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Invoking the Hex Conversion Utility
13.2.2 Invoking the Hex Conversion Utility With a Command File
A command file is useful if you plan to invoke the utility more than once with the same input files and options. It is also useful if you want to use the ROMS and SECTIONS hex conversion utility directives to customize the conversion process.
Command files are ASCII files that contain one or more of the following:
• Options and filenames. These are specified in a command file in exactly the same manner as on the command line.
• ROMS directive. The ROMS directive defines the physical memory configuration of your system as a list of address-range parameters. (See
You can also use this directive to identify specific sections that will be initialized by an on-chip boot loader. (For more information on the on-chip boot loader, see
.)
• SECTIONS directive. The hex conversion utility SECTIONS directive specifies which sections from the object file are selected. (See
.)
• Comments. You can add comments to your command file by using the /* and */ delimiters. For example:
/* This is a comment.
*/
To invoke the utility and use the options you defined in a command file, enter:
hex55 command_filename
You can also specify other options and files on the command line. For example, you could invoke the utility by using both a command file and command line options: hex55 firmware.cmd --map=firmware.mxp
The order in which these options and filenames appear is not important. The utility reads all input from the command line and all information from the command file before starting the conversion process. However, if you are using the -q option, it must appear as the first option on the command line or in a command file.
The --help option displays the syntax for invoking the compiler and lists available options. If the --help option is followed by another option or phrase, detailed information about the option or phrase is displayed. For example, to see information about options associated with generating a boot table use
--help boot.
The --quiet option suppresses the hex conversion utility's normal banner and progress information.
• Assume that a command file named firmware.cmd contains these lines: firmware.out
--ti-tagged
/* input file */
/* TI-Tagged */
--outfile=firm.lsb
/* output file 1, LSBs of ROM */
--outfile=firm.msb
/* output file 2, MSBs of ROM */
You can invoke the hex conversion utility by entering: hex55 firmware.cmd
• This example shows how to convert a file called appl.out into four hex files in Intel format. Each output file is one byte wide and 16K bytes long. The .text section is converted to boot loader format.
appl.out
--intel
--map=appl.mxp
/* input file */
/* Intel format */
/* map file */
ROMS
{
ROW1: origin=0x1000 len=0x4000 romwidth=8 files={ appl.u0 appl.u1 }
ROW2: origin=0x5000 len=0x4000 romwidth=8 files={ app1.u2 appl.u3 }
}
SECTIONS
{ .text: BOOT
.data, .cinit, .sect1, .vectors, .const:
}
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Understanding Memory Widths www.ti.com
13.3 Understanding Memory Widths
The hex conversion utility makes your memory architecture more flexible by allowing you to specify memory and ROM widths. To use the hex conversion utility, you must understand how the utility treats word widths. Three widths are important in the conversion process:
• Target width
• Data width
• Memory width
• ROM width
The terms target word, data word, memory word, and ROM word refer to a word of such a width.
illustrates the separate and distinct phases of the hex conversion utility's process flow.
Figure 13-2. Hex Conversion Utility Process Flow
Raw data in object files is represented in target-width-sized words.
Input file
Phase I
The raw data in the object file is truncated to the size specified by the default data width (8 bits).
Phase II
The data-width-sized internal representation is divided into words according to size specified by the
--memwidth option.
Phase III
The memwidth-sized words are broken up according to the size specified by the --romwidth option and are written to a file(s) according to the specified format
(i.e. Intel, Tektronix, etc..).
Output file(s)
13.3.1 Target Width
Target width is the unit size (in bits) of the target processor's word. The unit size corresponds to the data bus size on the target processor. The width is fixed for each target and cannot be changed. The
TMS320C55x targets have a width of 16 bits.
13.3.2 Data Width
Data width is the logical width (in bits) of the data words stored in a particular section of a COFF file.
Usually, the logical data width is the same as the target width. The data width is fixed at 8 bits for the
TMS320C55x and cannot be changed. A data width of 8 is used to support processing of information in
COFF code sections, which consist of 8-bit bytes.
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Understanding Memory Widths
13.3.3 Specifying the Memory Width
Memory width is the physical width (in bits) of the memory system. Usually, the memory system is physically the same width as the target processor width: a 16-bit processor has a 16-bit memory architecture. However, some applications require target words to be broken into multiple, consecutive, and narrower memory words. The C55x has a target width of 16 because the data memory is addressed as
16-bit words. However, the memory itself can also be addressed as 8-bit bytes and sometimes the memory width may need to be narrower than the target width.
By default, the hex conversion utility sets memory width to the target width (in this case, 16 bits).
You can change the memory width (except for TI-TXT format) by:
• Using the --memwidth option. This changes the memory width value for the entire file.
• Setting the memwidth parameter of the ROMS directive. This changes the memory width value for the address range specified in the ROMS directive and overrides the --memwidth option for that range.
See
.
For both methods, use a value that is a power of 2 greater than or equal to 8.
You should change the memory width default value of 16 only in special situations when you need to break single target words into consecutive, narrower memory words. The most common situation in which memory words are narrower than target words is when you use an on-chip boot loader that supports booting from narrower memory. For example, a 16-bit TMS320C55x can be booted from 8-bit memory or an 8-bit serial port, with each 16-bit value occupying two memory locations (this would be specified as
− memwidth 8).
Binary Format is 8 Bits Wide
NOTE: You cannot change the memory width of the Binary format. The Binary hex format supports an 8-bit memory width only.
TI-TXT Format is 8 Bits Wide
NOTE: You cannot change the memory width of the TI-TXT format. The TI-TXT hex format supports an 8-bit memory width only.
demonstrates how the memory width is related to object file data.
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Understanding Memory Widths
Figure 13-3. Object File Data and Memory Widths
Source file
.word
.word
0 A A B B
0 1 1 2 2 h h
Data after phase I of hex utility
B B A A
2 2 1 1
Data after phase II of hex utility
Memory widths (variable)
--memwidth=16 (default)
A A B B
1 1 2 2
--memwidth=8
B B
A A
2 2
1 1 www.ti.com
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13.3.4 Partitioning Data Into Output Files
ROM width specifies the physical width (in bits) of each ROM device and corresponding output file
(usually one byte or eight bits). The ROM width determines how the hex conversion utility partitions the data into output files. After the object file data is mapped to the memory words, the memory words are broken into one or more output files. The number of output files is determined by the following formulas:
• If memory width ≥ ROM width: number of files = memory width ÷ ROM width
• If memory width < ROM width: number of files = 1
For example, for a memory width of 16, you could specify a ROM width value of 16 and get a single output file containing 16-bit words. Or you can use a ROM width value of 8 to get two files, each containing 8 bits of each word.
The default ROM width that the hex conversion utility uses depends on the output format:
• All hex formats except TI-Tagged are configured as lists of 8-bit bytes; the default ROM width for these formats is 8 bits.
• TI-Tagged is a 16-bit format; the default ROM width for TI-Tagged is 16 bits.
The TI-Tagged Format is 16 Bits Wide
NOTE: You cannot change the ROM width of the TI-Tagged format. The TI-Tagged format supports a 16-bit ROM width only.
TI-TXT Format is 8 Bits Wide
NOTE: You cannot change the ROM width of the TI-TXT format. The TI-TXT hex format supports only an 8-bit ROM width.
You can change ROM width (except for TI-Tagged and TI-TXT formats) by:
• Using the --romwidth option. This option changes the ROM width value for the entire object file.
• Setting the romwidth parameter of the ROMS directive. This parameter changes the ROM width value for a specific ROM address range and overrides the --romwidth option for that range. See
.
For both methods, use a value that is a power of 2 greater than or equal to 8.
If you select a ROM width that is wider than the natural size of the output format (16 bits for TI-Tagged or
8 bits for all others), the utility simply writes multibyte fields into the file.
illustrates how the object file data, memory, and ROM widths are related to one another.
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Understanding Memory Widths
Data after phase I of hex utility
Data after phase II of hex utility
Figure 13-4. Data, Memory, and ROM Widths
Source file
.word
.word
0 A A B B
0 1 1 2 2 h h
Data width = 8 (fixed)
A A B B
1 1 2 2
Memory widths (variable)
--memwidth=16
A A B B
1 1 2 2
--memwidth=8
B B
A A
2 2
1 1
Data after phase III of hex utility
Output files
--romwidth=16
--outfile=file.wrd A A B B 1 1 2 2
--romwidth=8
--outfile=file.b0
B B 2 2
--outfile=file.b1
A A 1 1
--romwidth=8
--outfile=file.byt B B A A 2 2 1 1 www.ti.com
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13.3.5 A Memory Configuration Example
shows a typical memory configuration example. This memory system consists of two 128K ×
8-bit ROM devices.
Figure 13-5. C55x Memory Configuration Example
Data width = 16 bits
Lower 8 bits (data)
AABBh
Upper 8 bits (data)
CPU
AAh
128K x 8
ROM0
BBh
128K x 8
ROM1
Source file word AABBh
ROM width
8 bits
ROM width
8 bits
System memory width
16 bits
13.3.6 Specifying Word Order for Output Words
There are two ways to split a wide word into consecutive memory locations in the same hex conversion utility output file:
• --order=MS specifies big-endian ordering, in which the most significant part of the wide word occupies the first of the consecutive locations.
• --order=LS specifies little-endian ordering, in which the least significant part of the wide word occupies the first of the consecutive locations.
By default, the utility uses big-endian format. Unless your boot loader program expects little-endian format, avoid using --order=LS.
NOTE:
When the --order Option Applies
• This option applies only when you use a memory width with a value.
• This option does not affect the way memory words are split into output files. Think of the files as a set: the set contains a least significant file and a most significant file, but there is no ordering over the set. When you list filenames for a set of files, you always list the least significant first, regardless of the --order option.
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Hex Conversion Utility Description 315
The ROMS Directive www.ti.com
13.4 The ROMS Directive
The ROMS directive specifies the physical memory configuration of your system as a list of address-range parameters.
Each address range produces one set of files containing the hex conversion utility output data that corresponds to that address range. Each file can be used to program one single ROM device.
The ROMS directive is similar to the MEMORY directive of the TMS320C55x linker: both define the memory map of the target address space. Each line entry in the ROMS directive defines a specific address range. The general syntax is:
ROMS
{
[PAGE n:]
romname :
romname :
[origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value]
[files={ filename
1
, filename
2
, ...}]
[origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value]
[files={ filename
1
, filename
2
, ...}]
...
}
ROMS
PAGE romname origin
Constant
Hexadecimal
Octal
Decimal begins the directive definition.
identifies a memory space for targets that use program- and data-address spaces. If your program has been linked normally, PAGE 0 specifies program memory and
PAGE 1 specifies data memory. Each memory range after the PAGE command belongs to that page until you specify another PAGE. If you don ’ t include PAGE, all ranges belong to page 0.
identifies a memory range. The name of the memory range can be one to eight characters in length. The name has no significance to the program; it simply identifies the range, except when the output is for a load image in which case it denotes the section name. (Duplicate memory range names are allowed.) specifies the starting address of a memory range. It can be entered as origin, org, or o.
The associated value must be a decimal, octal, or hexadecimal constant. If you omit the origin value, the origin defaults to 0. The following table summarizes the notation you can use to specify a decimal, octal, or hexadecimal constant:
Notation
0x prefix or h suffix
0 prefix
No prefix or suffix
Example
0x77 or 077h
077
77 length romwidth specifies the length of a memory range as the physical length of the ROM device. It can be entered as length, len, or l. The value must be a decimal, octal, or hexadecimal constant. If you omit the length value, it defaults to the length of the entire address space.
specifies the physical ROM width of the range in bits (see
). Any value you specify here overrides the --romwidth option. The value must be a decimal, octal, or hexadecimal constant that is a power of 2 greater than or equal to 8.
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memwidth fill files
The ROMS Directive specifies the memory width of the range in bits (see
specify here overrides the --memwidth option. The value must be a decimal, octal, or hexadecimal constant that is a power of 2 greater than or equal to 8. When using the memwidth parameter, you must also specify the paddr parameter for each section in
the SECTIONS directive. (See
.) specifies a fill value to use for the range. In image mode, the hex conversion utility uses this value to fill any holes between sections in a range. A hole is an area between the input sections that comprises an output section that contains no actual code or data. The fill value must be a decimal, octal, or hexadecimal constant with a width equal to the target width. Any value you specify here overrides the --fill option. When using fill, you must also use the --image command line option. (See
identifies the names of the output files that correspond to this range. Enclose the list of names in curly braces and order them from least significant to most significant output file, where the bits of the memory word are numbered from right to left. The number of file names must equal the number of output files that the range generates. To calculate the number of output files, see
. The utility warns you if you list too many or too few filenames.
Unless you are using the --image option, all of the parameters that define a range are optional; the commas and equal signs are also optional. A range with no origin or length defines the entire address space. In image mode, an origin and length are required for all ranges.
Ranges must not overlap and must be listed in order of ascending address.
13.4.1 When to Use the ROMS Directive
If you do not use a ROMS directive, the utility defines a single default range that includes the entire address space. This is equivalent to a ROMS directive with a single range without origin or length.
Use the ROMS directive when you want to:
• Program large amounts of data into fixed-size ROMs. When you specify memory ranges corresponding to the length of your ROMs, the utility automatically breaks the output into blocks that fit into the ROMs.
• Restrict output to certain segments. You can also use the ROMS directive to restrict the conversion to a certain segment or segments of the target address space. The utility does not convert the data that falls outside of the ranges defined by the ROMS directive. Sections can span range boundaries; the utility splits them at the boundary into multiple ranges. If a section falls completely outside any of the ranges you define, the utility does not convert that section and issues no messages or warnings.
Thus, you can exclude sections without listing them by name with the SECTIONS directive. However, if a section falls partially in a range and partially in unconfigured memory, the utility issues a warning and converts only the part within the range.
• Use image mode. When you use the --image option, you must use a ROMS directive. Each range is filled completely so that each output file in a range contains data for the whole range. Holes before, between, or after sections are filled with the fill value from the ROMS directive, with the value specified with the --fill option, or with the default value of 0.
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The ROMS Directive www.ti.com
13.4.2 An Example of the ROMS Directive
The ROMS directive in
shows how 16K bytes of 16-bit memory could be partitioned for two
8K-byte 8-bit EPROMs.
illustrates the input and output files.
Example 13-1. A ROMS Directive Example infile.out
--image
--memwidth 16
ROMS
{
EPROM1: org = 0x4000, len = 0x2000, romwidth = 8 files = { rom4000.b0, rom4000.b1}
}
EPROM2: org = 0x6000, len = 0x2000, romwidth = 8, fill = 0xFF00, files = { rom6000.b0, rom6000.b1}
Figure 13-6. The infile.out File Partitioned Into Four Output Files
0x00004000
0x0000487F
0x00005B80
0x0000633F
0x00006700
COFF file: infile.out
.text
.data
0x00004000
(org)
Output files:
EPROM1 rom4000.b0
rom4000.b1
.text
.text
0x00004880
0h 0h
0x00005B80
.data
.data
0x00005FFF
.table
0x00007C7F
Width = 8 bits len = 2000h (8K)
0x00006000
0x00006340
0x00006700
EPROM2 rom6000.b0
rom6000.b1
.data
FFh
.data
00h
.table
.table
0x00007C80
0x00007FFF
FFh 00h
The map file (specified with the --map option) is advantageous when you use the ROMS directive with multiple ranges. The map file shows each range, its parameters, names of associated output files, and a list of contents (section names and fill values) broken down by address.
is a segment of the map file resulting from the example in
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Example 13-2. Map File Output From
Showing Memory Ranges
-----------------------------------------------------
00004000..00005fff Page=0 Width=8 "EPROM1"
-----------------------------------------------------
OUTPUT FILES: rom4000.b0
[b0..b7] rom4000.b1
[b8..b15]
CONTENTS: 00004000..0000487f .text
00004880..00005b7f FILL = 00000000
00005b80..00005fff .data
-----------------------------------------------------
00006000..00007fff Page=0 Width=8 "EPROM2"
-----------------------------------------------------
OUTPUT FILES: rom6000.b0
[b0..b7] rom6000.b1
[b8..b15]
CONTENTS: 00006000..0000633f .data
00006340..000066ff FILL = ff00ff00
00006700..00007c7f .table
00007c80..00007fff FILL = ff00ff00
The ROMS Directive
EPROM1 defines the address range from 0x00004000 through 0x00005FFF with the following sections:
This section ...
.text
.data
Has this range ...
0x00004000 through 0x0000487F
0x00005B80 through 0x00005FFF
The rest of the range is filled with 0h (the default fill value), converted into two output files:
• rom4000.b0 contains bits 0 through 7
• rom4000.b1 contains bits 8 through 15
EPROM2 defines the address range from 0x00006000 through 0x00007FFF with the following sections:
This section ...
.data
.table
Has this range ...
0x00006000 through 0x0000633F
0x00006700 through 0x00007C7F
The rest of the range is filled with 0xFF0 (from the specified fill value). The data from this range is converted into two output files:
• rom6000.b0 contains bits 0 through 7
• rom6000.b1 contains bits 8 through 15
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The SECTIONS Directive www.ti.com
13.5 The SECTIONS Directive
You can convert specific sections of the object file by name with the hex conversion utility SECTIONS directive. You can also specify those sections that you want to locate in ROM at a different address than the load address specified in the linker command file. If you:
• Use a SECTIONS directive, the utility converts only the sections that you list in the directive and ignores all other sections in the object file.
• Do not use a SECTIONS directive, the utility converts all initialized sections that fall within the configured memory.
Uninitialized sections are never converted, whether or not you specify them in a SECTIONS directive.
Sections Generated by the C/C++ Compiler
NOTE: The TMS320C55x C/C++ compiler automatically generates these sections:
• Initialized sections: .text, .const, .cinit, .pinit (C++ only), and .switch
• Uninitialized sections: .bss, .stack, .sysstack, and .sysmem
Use the SECTIONS directive in a command file. (See
SECTIONS directive is:
SECTIONS
{
oname(sname)[:] [paddr=value]
oname(sname)[:] [paddr= boot]
oname(sname)[:] [boot]
...
}
SECTIONS oname sname
paddr=value boot begins the directive definition.
identifies the object filename the section is located within. The filename is optional when only a single input file is given, but required otherwise.
identifies a section in the input file. If you specify a section that does not exist, the utility issues a warning and ignores the name.
specifies the physical ROM address at which this section should be located. This value overrides the section load address given by the linker. This value must be a decimal, octal, or hexadecimal constant. It can also be the word boot (to indicate a boot table section for use with a boot loader). If your file contains multiple sections, and if one section uses a paddr parameter, then all sections must use a paddr parameter.
configures a section for loading by a boot loader. This is equivalent to using
paddr=boot. Boot sections have a physical address determined by the location of the boot table. The origin of the boot table is specified with the --bootorg option.
For more similarity with the linker's SECTIONS directive, you can use colons after the section names (in place of the equal sign on the boot keyboard). For example, the following statements are equivalent:
SECTIONS { .text: .data: boot }
SECTIONS { .text: .data = boot }
In the example below, the object file contains six initialized sections: .text, .data, .const, .vectors, .coeff, and .tables. Suppose you want only .text and .data to be converted. Use a SECTIONS directive to specify this:
SECTIONS { .text: .data: }
To configure both of these sections for boot loading, add the boot keyword:
SECTIONS { .text = boot .data = boot }
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The Load Image Format (--load_image Option)
Using the --boot Option and the SECTIONS Directive
NOTE: When you use the SECTIONS directive with the boot table (--boot) option, the --boot option is ignored. You must explicitly specify any boot sections in the SECTIONS directive. For more information about --boot and other command line options associated with boot tables, see
and
.
13.6 The Load Image Format (--load_image Option)
A load image is an object file which contains the load addresses and initialized sections of one or more executable files. The load image object file can be used for ROM masking or can be relinked in a subsequent link step.
13.6.1 Load Image Section Formation
The load image sections are formed by collecting the initialized sections from the input executables. There are two ways the load image sections are formed:
• Using the ROMS Directive. Each memory range that is given in the ROMS directive denotes a load image section. The romname is the section name. The origin and length parameters are required. The memwidth, romwidth, and files parameters are invalid and are ignored.
When using the ROMS directive and the load_image option, the --image option is required.
• Default Load Image Section Formation. If no ROMS directive is given, the load image sections are formed by combining contiguous initialized sections in the input executables. Sections with gaps smaller than the target word size are considered contiguous.
The default section names are image_1, image_2, ... If another prefix is desired, the
--section_name_prefix=prefix option can be used.
13.6.2 Load Image Characteristics
All load image sections are initialized data sections. In the absence of a ROMS directive, the load/run address of the load image section is the load address of the first input section in the load image section. If the SECTIONS directive was used and a different load address was given using the paddr parameter, this address will be used.
The load image format always creates a single load image object file. The format of the load image object file is determined based on the input files. The file is not marked executable and does not contain an entry point. The default load image object file name is ti_load_image.obj. This can be changed using the
--outfile option. Only one --outfile option is valid when creating a load image, all other occurrences are ignored.
Concerning Load Image Format
NOTE: These options are invalid when creating a load image:
• --memwidth
• --romwidth
• --order
• --zero
• --byte
If a boot table is being created, either using the SECTIONS directive or the --boot option, the
ROMS directive must be used.
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Excluding a Specified Section www.ti.com
13.7 Excluding a Specified Section
The --exclude section_name option can be used to inform the hex utility to ignore the specified section. If a SECTIONS directive is used, it overrides the --exclude option.
For example, if a SECTIONS directive containing the section name mysect is used and an --exclude
mysect is specified, the SECTIONS directive takes precedence and mysect is not excluded.
The --exclude option has a limited wildcard capability. The * character can be placed at the beginning or end of the name specifier to indicate a suffix or prefix, respectively. For example, --exclude sect* disqualifies all sections that begin with the characters sect.
If you specify the --exclude option on the command line with the * wildcard, enter quotes around the section name and wildcard. For example, --exclude"sect*". Using quotes prevents the * from being interpreted by the hex conversion utility. If --exclude is in a command file, then the quotes should not be specified.
If multiple object files are given, the object file in which the section to be excluded can be given in the form oname(sname). If the object filename is not provided, all sections matching the section name are excluded. Wildcards cannot be used for the filename, but can appear within the parentheses.
13.8 Assigning Output Filenames
When the hex conversion utility translates your object file into a data format, it partitions the data into one or more output files. When multiple files are formed by splitting memory words into ROM words, filenames
are always assigned in order from least to most significant, where bits in the memory words are numbered from right to left. This is true, regardless of target or endian ordering.
The hex conversion utility follows this sequence when assigning output filenames:
1. It looks for the ROMS directive. If a file is associated with a range in the ROMS directive and you have included a list of files (files = {. . .}) on that range, the utility takes the filename from the list.
For example, assume that the target data is 16-bit words being converted to two files, each eight bits wide. To name the output files using the ROMS directive, you could specify:
ROMS
{
RANGE1: romwidth=8, files={ xyz.b0 xyz.b1 }
}
The utility creates the output files by writing the least significant bits to xyz.b0 and the most significant bits to xyz.b1.
2. It looks for the --outfile options. You can specify names for the output files by using the --outfile option. If no filenames are listed in the ROMS directive and you use --outfile options, the utility takes the filename from the list of --outfile options. The following line has the same effect as the example above using the ROMS directive:
--outfile=xyz.b0 --outfile=xyz.b1
If both the ROMS directive and --outfile options are used together, the ROMS directive overrides the
--outfile options.
3. It assigns a default filename. If you specify no filenames or fewer names than output files, the utility assigns a default filename. A default filename consists of the base name from the input file plus a 2- to
3-character extension. The extension has three parts:
(a) A format character, based on the output format (see
i a t m x for ASCII-Hex for Intel for Motorola-S for TI-Tagged for Tektronix
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Image Mode and the --fill Option
(b) The range number in the ROMS directive. Ranges are numbered starting with 0. If there is no
ROMS directive, or only one range, the utility omits this character.
(c) The file number in the set of files for the range, starting with 0 for the least significant file.
For example, assume a.out is for a 16-bit target processor and you are creating Intel format output.
With no output filenames specified, the utility produces two output files named a.i0, a.i1, a.i2, a.i3.
If you include the following ROMS directive when you invoke the hex conversion utility, you would have four output files:
ROMS
{ range1: o = 0x1000 l = 0x1000 range2: o = 0x2000 l = 0x1000
}
These output files ...
a.i00 and a.i01
a.i10 and a.i11
Contain data in these locations ...
0x1000 through 0x1FFF
0x2000 through 0x2FFF
13.9 Image Mode and the --fill Option
This section points out the advantages of operating in image mode and describes how to produce output files with a precise, continuous image of a target memory range.
13.9.1 Generating a Memory Image
With the --image option, the utility generates a memory image by completely filling all of the mapped ranges specified in the ROMS directive.
An object file consists of blocks of memory (sections) with assigned memory locations. Typically, all sections are not adjacent: there are holes between sections in the address space for which there is no data. When such a file is converted without the use of image mode, the hex conversion utility bridges these holes by using the address records in the output file to skip ahead to the start of the next section. In other words, there may be discontinuities in the output file addresses. Some EPROM programmers do not support address discontinuities.
In image mode, there are no discontinuities. Each output file contains a continuous stream of data that corresponds exactly to an address range in target memory. Any holes before, between, or after sections are filled with a fill value that you supply.
An output file converted by using image mode still has address records, because many of the hexadecimal formats require an address on each line. However, in image mode, these addresses are always contiguous.
Defining the Ranges of Target Memory
NOTE: If you use image mode, you must also use a ROMS directive. In image mode, each output file corresponds directly to a range of target memory. You must define the ranges. If you do not supply the ranges of target memory, the utility tries to build a memory image of the entire target processor address space. This is potentially a huge amount of output data. To prevent this situation, the utility requires you to explicitly restrict the address space with the ROMS directive.
13.9.2 Specifying a Fill Value
The --fill option specifies a value for filling the holes between sections. The fill value must be specified as an integer constant following the --fill option. The width of the constant is assumed to be that of a word on the target processor. For example, specifying --fill=0xFF0. The constant value is not sign extended.
The hex conversion utility uses a default fill value of 0 if you do not specify a value with the fill option. The
--fill option is valid only when you use --image; otherwise, it is ignored.
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13.9.3 Steps to Follow in Using Image Mode
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Step 1: Define the ranges of target memory with a ROMS directive. See
Step 2: Invoke the hex conversion utility with the --image option. You can optionally use the --zero option to reset the address origin to 0 for each output file. If you do not specify a fill value with the ROMS directive and you want a value other than the default of 0, use the --fill option.
13.10 Building a Table for an On-Chip Boot Loader
Some DSP devices, such as the C55x, have a built-in boot loader that initializes memory with one or more blocks of code or data. The boot loader uses a special table (a boot table) stored in memory (such as
EPROM) or loaded from a device peripheral (such as a serial or communications port) to initialize the code or data.
The hex conversion utility supports the boot loader by automatically building the boot table.
13.10.1 Description of the Boot Table
The input for a boot loader is the boot table. The boot table contains records that instruct the on-chip loader to copy blocks of data contained in the table to specified destination addresses. Some boot tables also contain values for initializing various processor control registers. The boot table can be stored in memory or read in through a device peripheral.
The hex conversion utility automatically builds the boot table for the boot loader. Using the utility, you specify the COFF sections you want the boot loader to initialize, the table location, and the values for any control registers. The hex conversion utility builds a complete image of the table according to the required format, and converts it into hexadecimal in the output files. Then, you can burn the table into ROM or load it by other means.
The boot loader supports loading from memory that is narrower than the normal width of memory. For example, you can serially boot a 16-bit TMS320C55x from a single 8-bit EPROM by using the --serial8
--memwidth16 options to configure the width of the boot table. The hex conversion utility automatically adjusts the table ’ s format and length. See the boot loader examples in the various application reports with titles such as Using the device name Bootloader for an illustration of a boot table.
13.10.2 The Boot Table Format
The boot table format is simple. Typically, there is a header record containing values for various control registers. Each subsequent block has a header containing the size and destination address of the block followed by data for the block. Multiple blocks can be entered; a termination record follows the last block.
The application reports for specific C55x devices describe the exact table format.
13.10.3 How to Build the Boot Table
summarizes the hex conversion utility options available for the boot loader.
Option
--boot
--bootorg=addr
--bootpage=page value
--delay=value
--entry_point=value
--parallel16
--parallel32
Table 13-2. Boot-Loader Options
Description
Convert all sections into bootable form (use instead of a SECTIONS directive).
Specify the source address of the boot-loader table.
Specify the page containing the boot-loader routine. The page argument tells the hex utility where to place the boot-loader routine.
Insert a delay of the given value into the configuration section of the boot table.
Specify the entry point at which to begin execution after boot loading. The value can be an address or a global symbol.
Specify a 16-bit parallel interface boot table ( − memwidth 16 and − romwidth 16)
Specify a 32-bit parallel interface boot table ( − memwidth 16 and − romwidth 32)
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Option
--reg_config addr,data,data,...
--serial8
--serial16
− vdevice
Building a Table for an On-Chip Boot Loader
Table 13-2. Boot-Loader Options (continued)
Description
Insert initialization command into the configuration section of the boot table. Initialize locations starting at location addr with the given data values. No spaces are permitted in the addr/data argument list.
Specify an 8-bit serial interface boot table ( − memwidth 8 and − romwidth 8)
Specify a 16-bit serial interface boot table ( − memwidth 16 and − romwidth 16)
Specify the silicon boot table version
13.10.3.1 Building the Boot Table
To build the boot table, follow these steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Link the file. Each block of the boot table data corresponds to an initialized section in the object file. Uninitialized sections are not converted by the hex conversion utility (see
). You must link into your application a boot loader routine that will read the boot table and perform the copy operations. It should be linked to its eventual run-time address.
When you select a section for placement in a boot-loader table, the hex conversion utility places the section ' s load address in the destination address field for the block in the boot table. The section content is then treated as raw data for that block. The hex conversion
utility does not use the section run address. When linking, you need not worry about the
ROM address or the construction of the boot table; the hex conversion utility handles this.
Identify the bootable sections. You can use the --boot option to tell the hex conversion utility to configure all sections for boot loading. Or, you can use a SECTIONS directive to select specific sections to be configured (see
). If you use a SECTIONS directive, the --boot option is ignored.
Set the ROM address of the boot table. Use the --bootorg option to set the source address of the complete table. For example, if you are using the C55x and booting from memory location 8000h, specify − bootorg=0x8000. The address field for the boot table in the hex conversion utility output file will then start at 0x8000.
If you do not use the --bootorg option at all, the utility places the table at the origin of the first memory range in a ROMS directive. If you do not use a ROMS directive, the table will start at the first section load address. There is also a − bootpage option for starting the table somewhere other than page 0.
Set boot-loader-specific options. Set entry point, parallel interface, or serial interface options as needed. Use the -v option to indicate which boot table format is to be used. The default is -v5510:2, which specifies revision 2 of the format defined for the 5510 device. This format is used on most of the C55x devices. See the application report for the specific bootloader you are using.
If the target device boot loader supports register initialization Use the --reg_config and --delay options to specify any desired initializations. The initializations occur in the order the options are given. Delays are inserted in the sequence according to where the --delay options appear in the list of options.
Describe your system memory configuration. See
and
for details.
13.10.3.2 Leaving Room for the Boot Table
The complete boot table is similar to a single section containing all of the header records and data for the boot loader. The address of this section is the boot table origin. As part of the normal conversion process, the hex conversion utility converts the boot table to hexadecimal format and maps it into the output files like any other section.
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Be sure to leave room in your system memory for the boot table, especially when you are using the
ROMS directive. The boot table cannot overlap other nonboot sections or unconfigured memory. Usually, this is not a problem; typically, a portion of memory in your system is reserved for the boot table. Simply configure this memory as one or more ranges in the ROMS directive, and use the --bootorg option to specify the starting address.
13.10.3.3 Setting the Entry Point for the Boot Table
After the boot routine finishes copying data, it branches to the entry point indicated by the object file. By using the --entry_point option with the hex conversion utility, you can set the entry point to a different address.
For example, if you want your program to start running at address 0x0123 after loading, specify
--entry_point=0x0123 on the command line or in a command file. You can determine the --entry_point address by looking at the map file that the linker generates.
Valid Entry Points
NOTE: The value can be a constant, or it can be a symbol that is externally defined (for example, with a .global) in the assembly source.
13.10.4 Booting From a Device Peripheral
You can choose to boot from a serial or parallel port by using the --parallel16, --parallel32, --serial8, or
--serial16 option. Your selection of an option depends on the target device and the channel you want to use. For example, to boot a C55x from its 16-bit McBSP port, specify − serial16 on the command line or in a command file. To boot a C55x from one of its EMIF ports, specify --parallel16 or --parallel32.
You need to address certain on-chip boot loader concerns:
• Possible memory conflicts. When you boot from a device peripheral, the boot table is not actually in memory; it is being received through the device peripheral. However, as explained in Step 3 in
, a memory address is assigned.
If the table conflicts with a nonboot section, put the boot table on a different page. Use the ROMS directive to define a range on an unused page and the --bootpage option to place the boot table on that page. The boot table will then appear to be at location 0 on the dummy page.
• Why the System Might Require an EPROM Format for a Peripheral Boot Loader Address. In a typical system, a parent processor boots a child processor through that child ’ s peripheral. The boot loader table itself may occupy space in the memory map of the parent processor. The EPROM format and ROMS directive address correspond to those used by the parent processor, not those that are used by the child.
13.10.5 Booting From Memory
The C55x can also boot from a boot table in memory. To boot from external memory (EPROM), specify the source address of the boot memory by using the --bootorg option. Use either --memwidth 8 or
--memwidth 16.
allows you to boot the .text section of abc.out from a byte-wide EPROM at location 0x8000.
Example 13-3. Sample Command File for Booting From a C55x EPROM abc.out
-outfile=abc.i
-intel
--memwidth=8
--romwidth=8
--bootorg=0x8000
SECTIONS { .text: BOOT }
/* input file
/* output file
/* Intel format
/* 8-bit memory
/* outfile is bytes, not words
/* external memory boot
*/
*/
*/
*/
*/
*/
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Controlling the ROM Device Address
13.11 Controlling the ROM Device Address
The hex conversion utility output address field corresponds to the ROM device address. The EPROM programmer burns the data into the location specified by the hex conversion utility output file address field.
The hex conversion utility offers some mechanisms to control the starting address in ROM of each sectionand/or to control the address index used to increment the address field. However, many EPROM programmers offer direct control of the location in ROM in which the data is burned.
13.11.1 Controlling the Starting Address
Depending on whether or not you are using the boot loader, the hex conversion utility output file controlling mechanisms are different.
Non-boot loader mode. The address field of the hex conversion utility output file is controlled by the following mechanisms listed from low to high priority:
1. The linker command file. By default, the address field of the hex conversion utility output file is the load address (as given in the linker command file) and the hex conversion utility parameter values. The relationship is summarized as follows, if paddr is not specified:.
out_file_addr ≡ load_addr × (data_width ÷ mem_width) (1) out_file_addr load_addr data_width mem_width is the address of the output file.
is the linker-assigned load address.
is specified as 8 bits for the TMS320C55x devices. See
is the memory width of the memory system. You can specify the memory width by the − memwidth option or by the memwidth parameter inside the
ROMS directive. See
The value of data width divided by memory width is a correction factor for address generation. When data width is larger than memory width, the correction factor expands the address space. For example, if the load address is 0 × 1 and data width divided by memory width is 2, the output file address field would be 0 × 2. The data is split into two consecutive locations the size of the memory width.
2. The paddr parameter of the SECTIONS directive. When the paddr parameter is specified for a section, the hex conversion utility bypasses the section load address and places the section in the address specified by paddr. The relationship between the hex conversion utility output file address field and the paddr parameter can be summarized as follows: out_file_addr ≡ paddr_val + ( load_addr - sect_beg_load_addr ) × (data_width ÷ mem_width) (2) out_file_addr paddr_va is the address of the output file.
is the value supplied with the paddr parameter inside the SECTIONS directive.
load_addr is the linker-assigned load address.
sec_beg_load_addr is the section load address assigned by the linker.
data_width mem_width is specified as 8 bits for the TMS320C55x devices. See
is the memory width of the memory system. You can specify the memory width by the − -memwidth option or by the memwidth parameter inside the
ROMS directive. See
The value of data width divided by memory width is a correction factor for address generation. The section beginning load address factor subtracted from the load address is an offset from the beginning of the section.
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3. The --zero option. When you use the --zero option, the utility resets the address origin to 0 for each output file. Since each file starts at 0 and counts upward, any address records represent offsets from the beginning of the file (the address within the ROM) rather than actual target addresses of the data.
You must use the --zero option in conjunction with the --image option to force the starting address in each output file to be zero. If you specify the --zero option without the --image option, the utility issues a warning and ignores the --zero option.
Boot-Loader Mode. When the boot loader is used, the hex conversion utility places the different sections that are in the boot table into consecutive memory locations. Each section becomes a boot table block whose destination address is equal to the linker-assigned section load address.
In a boot table, the address field of the hex conversion utility output file is not related to the section load addresses assigned by the linker. The address fields of the boot table are simply offsets to the beginning of the table. The section load addresses assigned by the linker will be encoded into the boot table along with the size of the section and the data contained within the section. These addresses will be used to store the data into memory during the boot load process.
The beginning of the boot table defaults to the linked load address of the first bootable section in the input file, unless you use one of the following mechanisms, listed here from low to high priority. Higher priority mechanisms override the values set by low priority options in an overlapping range.
1. The ROM origin specified in the ROMS directive. The hex conversion utility places the boot table at the origin of the first memory range in a ROMS directive.
2. The --bootorg option. The hex conversion utility places the boot table at the address specified by the
--bootorg option if you select boot loading from memory.
13.11.2 Controlling the Address Increment Index
By default, the hex conversion utility increments the output file address field according to the memory width value. If memory width equals 16, the address increments on the basis of how many 16-bit words are present in each line of the output file.
13.11.3 Dealing With Address Holes
When memory width is different from data width, the automatic multiplication of the load address by the correction factor might create holes at the beginning of a section or between sections.
For example, assume you want to load a COFF section (.sec1) at address 0x0100 of an 8-bit EPROM. If you specify the load address in the linker command file at location 0x0100, the hex conversion utility will multiply the address by 2 (data width divided by memory width = 16/8 = 2), giving the output file a starting address of 0x0200. Unless you control the starting address of the EPROM with your EPROM programmer, you could create holes within the EPROM. The programmer will burn the data starting at location 0x0200 instead of 0x0100. To solve this, you can:
• Use the paddr parameter of the SECTIONS directive. This forces a section to start at the specified value.
shows a command file that can be used to avoid the hole at the beginning of
.sec1.
If your file contains multiple sections and one section uses a paddr parameter, then all sections must use the paddr parameter.
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Controlling the ROM Device Address
Example 13-4. Hex Command File for Avoiding a Hole at the Beginning of a Section
--intel a.out
--map=a.map
ROMS
{
ROM : org = 0x0100, length = 0x200, romwidth = 8, memwidth = 8
}
SECTIONS
{ sec1: paddr = 0x100
}
• Use the --bootorg option or use the ROMS origin parameter (for boot loading only). As described in
, when you are boot loading, the EPROM address of the entire boot-loader table can be controlled by the --bootorg option or by the ROMS directive origin.
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13.12 Control Hex Conversion Utility Diagnostics
The hex conversion utility uses certain C/C++ compiler options to control hex-converter-generated diagnostics.
--diag_error=id
--diag_remark=id
--diag_suppress=id
--diag_warning=id
Categorizes the diagnostic identified by id as an error. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_error=id to recategorize the diagnostic as an error. You can only alter the severity of discretionary diagnostics.
Categorizes the diagnostic identified by id as a remark. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_remark=id to recategorize the diagnostic as a remark. You can only alter the severity of discretionary diagnostics.
Suppresses the diagnostic identified by id. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_suppress=id to suppress the diagnostic.
You can only suppress discretionary diagnostics.
Categorizes the diagnostic identified by id as a warning. To determine the numeric identifier of a diagnostic message, use the --display_error_number option first in a separate link. Then use --diag_warning=id to recategorize the diagnostic as a warning. You can only alter the severity of discretionary diagnostics.
--display_error_number Displays a diagnostic ' s numeric identifier along with its text. Use this option in determining which arguments you need to supply to the diagnostic suppression options (--diag_suppress, --diag_error, --diag_remark, and
--diag_warning). This option also indicates whether a diagnostic is discretionary. A discretionary diagnostic is one whose severity can be overridden. A discretionary diagnostic includes the suffix -D; otherwise, no suffix is present. See the TMS320C55x Optimizing C/C++ Compiler User ' s
Guide for more information on understanding diagnostic messages.
--issue_remarks
--no_warnings
Issues remarks (nonserious warnings), which are suppressed by default.
Suppresses warning diagnostics (errors are still issued).
--set_error_limit=count Sets the error limit to count, which can be any decimal value. The linker abandons linking after this number of errors. (The default is 100.)
--verbose_diagnostics Provides verbose diagnostics that display the original source with line-wrap and indicate the position of the error in the source line
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Description of the Object Formats
13.13 Description of the Object Formats
The hex conversion utility has options that identify each format.
specifies the format options.
They are described in the following sections.
• You need to use only one of these options on the command line. If you use more than one option, the last one you list overrides the others.
• The default format is Tektronix (--tektronix option).
Option
--ascii
--intel
--motorola=1
--motorola=2
--motorola=3
--ti-tagged
--ti_txt
--tektronix
Table 13-3. Options for Specifying Hex Conversion Formats
Alias
-a
-i
-m1
-m2
-m3
-t
-x
Format
ASCII-Hex
Intel
Motorola-S1
Motorola-S2
Motorola-S3
TI-Tagged
TI_TXT
Tektronix
Address Bits
16
32
16
24
32
16
8
32
Default Width
8
8
8
8
8
16
8
8
Address bits determine how many bits of the address information the format supports. Formats with
16-bit addresses support addresses up to 64K only. The utility truncates target addresses to fit in the number of available bits.
The default width determines the default output width of the format. You can change the default width by using the --romwidth option or by using the romwidth parameter in the ROMS directive. You cannot change the default width of the TI-Tagged format, which supports a 16-bit width only.
13.13.1 ASCII-Hex Object Format (--ascii Option)
The ASCII-Hex object format supports 16-bit addresses. The format consists of a byte stream with bytes separated by spaces.
illustrates the ASCII-Hex format.
Figure 13-7. ASCII-Hex Object Format
Nonprintable start code
Address
Nonprintable end code
^B $AXXXXXXXX,
XX XX XX XX XX XX XX XX XX XX. . .^C
Data byte
The file begins with an ASCII STX character (ctrl-B, 02h) and ends with an ASCII ETX character (ctrl-C,
03h). Address records are indicated with $AXXXXXXX, in which XXXXXXXX is a 8-digit (16-bit) hexadecimal address. The address records are present only in the following situations:
• When discontinuities occur
• When the byte stream does not begin at address 0
You can avoid all discontinuities and any address records by using the --image and --zero options. This creates output that is simply a list of byte values.
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13.13.2 Intel MCS-86 Object Format (--intel Option)
The Intel object format supports 16-bit addresses and 32-bit extended addresses. Intel format consists of a 9-character (4-field) prefix (which defines the start of record, byte count, load address, and record type), the data, and a 2-character checksum suffix.
The 9-character prefix represents three record types:
Record Type
00
01
04
Description
Data record
End-of-file record
Extended linear address record
Record type00, the data record, begins with a colon ( : ) and is followed by the byte count, the address of the first data byte, the record type (00), and the checksum. The address is the least significant 16 bits of a
32-bit address; this value is concatenated with the value from the most recent 04 (extended linear address) record to create a full 32-bit address. The checksum is the 2s complement (in binary form) of the preceding bytes in the record, including byte count, address, and data bytes.
Record type 01, the end-of-file record, also begins with a colon ( : ), followed by the byte count, the address, the record type (01), and the checksum.
Record type 04, the extended linear address record, specifies the upper 16 address bits. It begins with a colon ( : ), followed by the byte count, a dummy address of 0h, the record type (04), the most significant
16 bits of the address, and the checksum. The subsequent address fields in the data records contain the least significant bytes of the address.
illustrates the Intel hexadecimal object format.
Figure 13-8. Intel Hexadecimal Object Format
Start character
Address
Most significant 16 bits
Extended linear address record
Data records
:00000001FF
Byte count
Record type
Checksum
End-of-file record
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Description of the Object Formats
13.13.3 Motorola Exorciser Object Format (--motorola Option)
The Motorola S1, S2, and S3 formats support 16-bit, 24-bit, and 32-bit addresses, respectively. The formats consist of a start-of-file (header) record, data records, and an end-of-file (termination) record.
Each record consists of five fields: record type, byte count, address, data, and checksum. The three record types are:
Record Type
S0
S1
S2
S3
S7
S8
S9
Description
Header record
Code/data record for 16-bit addresses (S1 format)
Code/data record for 24-bit addresses (S2 format)
Code/data record for 32-bit addresses (S3 format)
Termination record for 32-bit addresses (S3 format)
Termination record for 24-bit addresses (S2 format)
Termination record for 16-bit addresses (S1 format)
The byte count is the character pair count in the record, excluding the type and byte count itself.
The checksum is the least significant byte of the 1s complement of the sum of the values represented by the pairs of characters making up the byte count, address, and the code/data fields.
illustrates the Motorola-S object format.
Figure 13-9. Motorola-S Format
Record type
Address Checksum
S00600004844521B
S31A0001FFEB000000000000000000000000000000000000000000FA
S70500000000FA
Checksum
Byte count
Address for S3 records
Header record
Data records
Termination record
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13.13.4 Extended Tektronix Object Format (--tektronix Option)
The Tektronix object format supports 32-bit addresses and has two types of records: www.ti.com
Data records
Termination records contains the header field, the load address, and the object code.
signifies the end of a module.
The header field in the data record contains the following information:
Item
%
Block length
Block type
Checksum
Number of ASCII
Characters
1
2
1
2
Description
Data type is Tektronix format
Number of characters in the record, minus the %
6 = data record
8 = termination record
A 2-digit hex sum modulo 256 of all values in the record except the % and the checksum itself.
The load address in the data record specifies where the object code will be located. The first digit specifies the address length; this is always 8. The remaining characters of the data record contain the object code, two characters per byte.
illustrates the Tektronix object format.
Figure 13-10. Extended Tektronix Object Format
Checksum: 21h =
0+
1+5+6+8+1+0+0+0+0+0+0+
Block length
1ah = 26
0
2+0+2+0+2+0+2+0+2+0+2+
Object code: 6 bytes
%15621810000000202020202020
Header character
Block type: 6
(data)
Length of load address
Load address: 10000000h
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Description of the Object Formats
13.13.5 Texas Instruments SDSMAC (TI-Tagged) Object Format (--ti_tagged Option)
The Texas Instruments SDSMAC (TI-Tagged) object format supports 16-bit addresses, including start-of-file record, data records, and end-of-file record. Each data records consists of a series of small fields and is signified by a tag character:
Tag Character
K
7
8
9
B
F
*
Description
Followed by the program identifier
Followed by a checksum
Followed by a dummy checksum (ignored)
Followed by a 16-bit load address
Followed by a data word (four characters)
Identifies the end of a data record
Followed by a data byte (two characters)
illustrates the tag characters and fields in TI-Tagged object format.
Figure 13-11. TI-Tagged Object Format
Start-of-file record
Program identifier
Load address Tag characters
BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F245F
:
Data records
End-of-file record
Data words Checksum
If any data fields appear before the first address, the first field is assigned address 0000h. Address fields may be expressed but not required for any data byte. The checksum field, preceded by the tag character
7, is the 2s complement of the sum of the 8-bit ASCII values of characters, beginning with the first tag character and ending with the checksum tag character (7 or 8). The end-of-file record is a colon ( : ).
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13.13.6 TI-TXT Hex Format (--ti_txt Option)
The TI-TXT hex format supports 16-bit hexadecimal data. It consists of section start addresses, data byte, and an end-of-file character. These restrictions apply:
• The number of sections is unlimited.
• Each hexadecimal start address must be even.
• Each line must have 16 data bytes, except the last line of a section.
• Data bytes are separated by a single space.
• The end-of-file termination tag q is mandatory.
The data record contains the following information:
Item
@ADDR
DATAn q
Description
Hexadecimal start address of a section
Hexadecimal data byte
End-of-file termination character
Figure 13-12. TI-TXT Object Format
Section start
Data bytes
Section start
@ADDR1
DATA01 DATA02 ........ DATA16
DATA17 DATA32 ........ DATA32
DATAm ........ DATAn
@ADDR2
DATA01 .................... DATAn q
Data bytes
End-of-line character
Example 13-5. TI-TXT Object Format
@F000
31 40 00 03 B2 40 80 5A 20 01 D2 D3 22 00 D2 E3
21 00 3F 40 E8 FD 1F 83 FE 23 F9 3F
@FFFE
00 F0
Q
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13.14 Hex Conversion Utility Error Messages
Hex Conversion Utility Error Messages section mapped to reserved memory
Description A section or a boot-loader table is mapped into a reserved memory area listed in the processor memory map.
Action Correct the section or boot-loader address. Refer to the TMS320C55x DSP CPU
Reference Guide for valid memory locations.
sections overlapping
Description Two or more COFF section load addresses overlap or a boot table address overlaps another section.
Action This problem may be caused by an incorrect translation from load address to hex output file address that is performed by the hex conversion utility when memory width is less than data width. See
and
unconfigured memory error
Description This error could have one of two causes:
Action
• The object file contains a section whose load address falls outside the memory range defined in the ROMS directive.
• The boot-loader table address is not within the memory range defined by the ROMS directive.
Correct the ROM range as defined by the ROMS directive to cover the memory range as needed, or modify the section load address or boot-loader table address. Remember that if the ROMS directive is not used, the memory range defaults to the entire processor address space. For this reason, removing the ROMS directive could also be a workaround.
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Chapter 14
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Sharing C/C++ Header Files With Assembly Source
You can use the .cdecls assembler directive to share C headers containing declarations and prototypes between C and assembly code. Any legal C/C++ can be used in a .cdecls block and the C/C++ declarations will cause suitable assembly to be generated automatically, allowing you to reference the
C/C++ constructs in assembly code.
Topic
...........................................................................................................................
Page
14.1
Overview of the .cdecls Directive .......................................................................
14.2
Notes on C/C++ Conversions ............................................................................
14.3
Notes on C++ Specific Conversions ...................................................................
14.4
Special Assembler Support ...............................................................................
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14.1 Overview of the .cdecls Directive
The .cdecls directive allows programmers in mixed assembly and C/C++ environments to share C headers containing declarations and prototypes between the C and assembly code. Any legal C/C++ can be used in a .cdecls block and the C/C++ declarations will cause suitable assembly to be generated automatically.
This allows the programmer to reference the C/C++ constructs in assembly code — calling functions, allocating space, and accessing structure members — using the equivalent assembly mechanisms. While function and variable definitions are ignored, most common C/C++ elements are converted to assembly: enumerations, (non function-like) macros, function and variable prototypes, structures, and unions.
See the
description for details on the syntax of the .cdecls assembler directive.
The .cdecls directive can appear anywhere in an assembly source file, and can occur multiple times within a file. However, the C/C++ environment created by one .cdecls is not inherited by a later .cdecls; the
C/C++ environment starts over for each .cdecls instance.
For example, the following code causes the warning to be issued:
.cdecls C,NOLIST
%{
#define ASMTEST 1
%}
.cdecls C,NOLIST
%{
#ifndef ASMTEST
#warn "ASMTEST not defined!" /* will be issued */
#endif
%}
Therefore, a typical use of the .cdecls block is expected to be a single usage near the beginning of the assembly source file, in which all necessary C/C++ header files are included.
Use the compiler --include_path=path options to specify additional include file paths needed for the header files used in assembly, as you would when compiling C files.
Any C/C++ errors or warnings generated by the code of the .cdecls are emitted as they normally would for the C/C++ source code. C/C++ errors cause the directive to fail, and any resulting converted assembly is not included.
C/C++ constructs that cannot be converted, such as function-like macros or variable definitions, cause a comment to be output to the converted assembly file. For example:
; ASM HEADER WARNING - variable definition 'ABCD' ignored
The prefix ASM HEADER WARNING appears at the beginning of each message. To see the warnings, either the WARN parameter needs to be specified so the messages are displayed on STDERR, or else the LIST parameter needs to be specified so the warnings appear in the listing file, if any.
Finally, note that the converted assembly code does not appear in the same order as the original C/C++ source code and C/C++ constructs may be simplified to a normalized form during the conversion process, but this should not affect their final usage.
14.2 Notes on C/C++ Conversions
The following sections describe C and C++ conversion elements that you need to be aware of when sharing header files with assembly source.
14.2.1 Comments
Comments are consumed entirely at the C level, and do not appear in the resulting converted assembly file.
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14.2.2 Conditional Compilation (#if/#else/#ifdef/etc.)
Conditional compilation is handled entirely at the C level during the conversion step. Define any necessary macros either on the command line (using the compiler --define=name=value option) or within a .cdecls
block using #define. The #if, #ifdef, etc. C/C++ directives are not converted to assembly .if, .else, .elseif, and .endif directives.
14.2.3 Pragmas
Pragmas found in the C/C++ source code cause a warning to be generated as they are not converted.
They have no other effect on the resulting assembly file. See
for the WARN and
NOWARN parameter discussion for where these warnings are created.
14.2.4 The #error and #warning Directives
These preprocessor directives are handled completely by the compiler during the parsing step of conversion. If one of these directives is encountered, the appropriate error or warning message is emitted.
These directives are not converted to .emsg or .wmsg in the assembly output.
14.2.5 Predefined symbol _ _ASM_HEADER_ _
The C/C++ macro _ _ASM_HEADER_ _ is defined in the compiler while processing code within .cdecls.
This allows you to make changes in your code, such as not compiling definitions, during the .cdecls
processing.
Be Careful With the _ _ASM_HEADER_ _ Macro
NOTE: You must be very careful not to use this macro to introduce any changes in the code that could result in inconsistencies between the code processed while compiling the C/C++ source and while converting to assembly.
14.2.6 Usage Within C/C++ asm( ) Statements
The .cdecls directive is not allowed within C/C++ asm( ) statements and will cause an error to be generated.
14.2.7 The #include Directive
The C/C++ #include preprocessor directive is handled transparently by the compiler during the conversion step. Such #includes can be nested as deeply as desired as in C/C++ source. The assembly directives
.include and .copy are not used or needed within a .cdecls. Use the command line --include_path option to specify additional paths to be searched for included files, as you would for C compilation.
14.2.8 Conversion of #define Macros
Only object-like macros are converted to assembly. Function-like macros have no assembly representation and so cannot be converted. Pre-defined and built-in C/C++ macros are not converted to assembly (i.e., __FILE__, __TIME__, __TI_COMPILER_VERSION__, etc.). For example, this code is converted to assembly because it is an object-like macro:
#define NAME Charley
This code is not converted to assembly because it is a function-like macro:
#define MAX(x,y) (x>y ? x : y)
Some macros, while they are converted, have no functional use in the containing assembly file. For example, the following results in the assembly substitution symbol FOREVER being set to the value while(1), although this has no useful use in assembly because while(1) is not legal assembly code.
#define FOREVER while(1)
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Macro values are not interpreted as they are converted. For example, the following results in the assembler substitution symbol OFFSET being set to the literal string value 5+12 and not the value 17.
This happens because the semantics of the C/C++ language require that macros are evaluated in context and not when they are parsed.
#define OFFSET 5+12
Because macros in C/C++ are evaluated in their usage context, C/C++ printf escape sequences such as
\n are not converted to a single character in the converted assembly macro. See
for suggestions on how to use C/C++ macro strings.
Macros are converted using the new .define directive (see
), which functions similarly to the
.asg assembler directive. The exception is that .define disallows redefinitions of register symbols and mnemonics to prevent the conversion from corrupting the basic assembly environment. To remove a macro from the assembly scope, .undef can be used following the .cdecls that defines it (see
).
The macro functionality of # (stringize operator) is only useful within functional macros. Since functional macros are not supported by this process, # is not supported either. The concatenation operator ## is only useful in a functional context, but can be used degenerately to concatenate two strings and so it is supported in that context.
14.2.9 The #undef Directive
Symbols undefined using the #undef directive before the end of the .cdecls are not converted to assembly.
14.2.10 Enumerations
Enumeration members are converted to .enum elements in assembly. For example: enum state { ACTIVE=0x10, SLEEPING=0x01, INTERRUPT=0x100, POWEROFF, LAST}; is converted to the following assembly code: state
ACTIVE
.enum
.emember 16
SLEEPING .emember 1
NTERRUPT .emember 256
POWEROFF .emember 257
LAST .emember 258
.endenum
The members are used via the pseudo-scoping created by the .enum directive.
The usage is similar to that for accessing structure members, enum_name.member.
This pseudo-scoping is used to prevent enumeration member names from corrupting other symbols within the assembly environment.
14.2.11 C Strings
Because C string escapes such as \n and \t are not converted to hex characters 0x0A and 0x09 until their use in a string constant in a C/C++ program, C macros whose values are strings cannot be represented as expected in assembly substitution symbols. For example:
#define MSG "\tHI\n" becomes, in assembly:
.define """\tHI\n""",MSG ; 6 quoted characters! not 5!
When used in a C string context, you expect this statement to be converted to 5 characters (tab, H, I, newline, NULL), but the .string assembler directive does not know how to perform the C escape conversions.
You can use the .cstring directive to cause the escape sequences and NULL termination to be properly handled as they would in C/C++. Using the above symbol MSG with a .cstring directive results in 5 characters of memory being allocated, the same characters as would result if used in a C/C++ strong context. (See
for the .cstring directive syntax.)
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14.2.12 C/C++ Built-In Functions
The C/C++ built-in functions, such as sizeof( ), are not translated to their assembly counterparts, if any, if they are used in macros. Also, their C expression values are not inserted into the resulting assembly macro because macros are evaluated in context and there is no active context when converting the macros to assembly.
Suitable functions such as $sizeof( ) are available in assembly expressions. However, as the basic types such as int/char/float have no type representation in assembly, there is no way to ask for $sizeof(int), for example, in assembly.
14.2.13 Structures and Unions
C/C++ structures and unions are converted to assembly .struct and .union elements. Padding and ending alignments are added as necessary to make the resulting assembly structure have the same size and member offsets as the C/C++ source. The primary purpose is to allow access to members of C/C++ structures, as well as to facilitate debugging of the assembly code. For nested structures, the assembly
.tag feature is used to refer to other structures/unions.
The alignment is also passed from the C/C++ source so that the assembly symbol is marked with the same alignment as the C/C++ symbol. (See
for information about pragmas, which may attempt to modify structures.) Because the alignment of structures is stored in the assembly symbol, built-in assembly functions like $sizeof( ) and $alignof( ) can be used on the resulting structure name symbol.
When using unnamed structures (or unions) in typedefs, such as: typedef struct { int a_member; } mystrname;
This is really a shorthand way of writing: struct temporary_name { int a_member; }; typedef temporary_name mystrname;
The conversion processes the above statements in the same manner: generating a temporary name for the structure and then using .define to output a typedef from the temporary name to the user name. You should use your mystrname in assembly the same as you would in C/C++, but do not be confused by the assembly structure definition in the list, which contains the temporary name. You can avoid the temporary name by specifying a name for the structure, as in: typedef struct a_st_name { ... } mystrname;
If a shorthand method is used in C to declare a variable with a particular structure, for example: extern struct a_name { int a_member; } a_variable;
Then after the structure is converted to assembly, a .tag directive is generated to declare the structure of the external variable, such as:
_a_variable .tag a_st_name
This allows you to refer to _a_variable.a_member in your assembly code.
14.2.14 Function/Variable Prototypes
Non-static function and variable prototypes (not definitions) will result in a .global directive being generated for each symbol found.
See
for C++ name mangling issues.
Function and variable definitions will result in a warning message being generated (see the
WARN/NOWARN parameter discussion for where these warnings are created) for each, and they will not be represented in the converted assembly.
The assembly symbol representing the variable declarations will not contain type information about those symbols. Only a .global will be issued for them. Therefore, it is your responsibility to ensure the symbol is used appropriately.
See
for information on variables names which are of a structure/union type.
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14.2.15 C Constant Suffixes
The C constant suffixes u, l, and f are passed to the assembly unchanged. The assembler will ignore these suffixes if used in assembly expressions.
14.2.16 Basic C/C++ Types
Only complex types (structures and unions) in the C/C++ source code are converted to assembly. Basic types such as int, char, or float are not converted or represented in assembly beyond any existing .int,
.char, .float, etc. directives that previously existed in assembly.
Typedefs of basic types are therefore also not represented in the converted assembly.
14.3 Notes on C++ Specific Conversions
The following sections describe C++ specific conversion elements that you need to be aware of when sharing header files with assembly source.
14.3.1 Name Mangling
Symbol names may be mangled in C++ source files. When mangling occurs, the converted assembly will use the mangled names to avoid symbol name clashes. You can use the demangler (dem55) to demangle names and identify the correct symbols to use in assembly.
To defeat name mangling in C++ for symbols where polymorphism (calling a function of the same name with different kinds of arguments) is not required, use the following syntax: extern "C" void somefunc(int arg);
The above format is the short method for declaring a single function. To use this method for multiple functions, you can also use the following syntax: extern "C"
{ void somefunc(int arg); int anotherfunc(int arg);
...
}
14.3.2 Derived Classes
Derived classes are only partially supported when converting to assembly because of issues related to
C++ scoping which does not exist in assembly. The greatest difference is that base class members do not automatically become full (top-level) members of the derived class. For example:
---------------------------------------------------------class base
{ public: int b1;
}; class derived : public base
{ public: int d1;
}
In C++ code, the class derived would contain both integers b1 and d1. In the converted assembly structure "derived", the members of the base class must be accessed using the name of the base class, such as derived.__b_base.b1 rather than the expected derived.b1.
A non-virtual, non-empty base class will have __b_ prepended to its name within the derived class to signify it is a base class name. That is why the example above is derived.__b_base.b1 and not simply derived.base.b1.
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14.3.3 Templates
No support exists for templates.
14.3.4 Virtual Functions
No support exists for virtual functions, as they have no assembly representation.
Special Assembler Support
14.4 Special Assembler Support
14.4.1 Enumerations (.enum/.emember/.endenum)
New directives have been created to support a pseudo-scoping for enumerations.
The format of these new directives is:
ENUM_NAME .enum
MEMBER1 .emember [value]
MEMBER2
...
.emember [value]
.endenum
The .enum directive begins the enumeration definition and .endenum terminates it.
The enumeration name (ENUM_NAME) cannot be used to allocate space; its size is reported as zero.
The format to use the value of a member is ENUM_NAME.MEMBER, similar to a structure member usage.
The .emember directive optionally accepts the value to set the member to, just as in C/C++. If not specified, the member takes a value one more than the previous member. As in C/C++, member names cannot be duplicated, although values can be. Unless specified with .emember, the first enumeration member will be given the value 0 (zero), as in C/C++.
The .endenum directive cannot be used with a label, as structure .endstruct directives can, because the
.endenum directive has no value like the .endstruct does (containing the size of the structure).
Conditional compilation directives (.if/.else/.elseif/.endif) are the only other non-enumeration code allowed within the .enum/.endenum sequence.
14.4.2 The .define Directive
The new .define directive functions in the same manner as the .asg directive, except that .define disallows creation of a substitution symbol that has the same name as a register symbol or mnemonic. It does not create a new symbol name space in the assembler, rather it uses the existing substitution symbol name space. The syntax for the directive is:
.define substitution string , substitution symbol name
The .define directive is used to prevent corruption of the assembly environment when converting C/C++ headers.
14.4.3 The .undefine/.unasg Directives
The .undef directive is used to remove the definition of a substitution symbol created using .define or .asg.
This directive will remove the named symbol from the substitution symbol table from the point of the .undef
to the end of the assembly file. The syntax for these directives is:
.undefine substitution symbol name
.unasg substitution symbol name
This can be used to remove from the assembly environment any C/C++ macros that may cause a problem.
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Also see
, which covers the .define directive.
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14.4.4 The $defined( ) Built-In Function
The $defined directive returns true/1 or false/0 depending on whether the name exists in the current substitution symbol table or the standard symbol table. In essence $defined returns TRUE if the assembler has any user symbol in scope by that name. This differs from $isdefed in that $isdefed only tests for NON-substitution symbols. The syntax is:
$defined( substitution symbol name )
A statement such as ".if $defined(macroname)" is then similar to the C code "#ifdef macroname".
See
and
for the use of .define and .undef in assembly.
14.4.5 The $sizeof Built-In Function
The new assembly built-in function $sizeof( ) can be used to query the size of a structure in assembly. It is an alias for the already existing $structsz( ). The syntax is:
$sizeof( structure name )
The $sizeof function can then be used similarly to the C built-in function sizeof( ).
The assembler's $sizeof( ) built-in function cannot be used to ask for the size of basic C/C++ types, such as $sizeof(int), because those basic type names are not represented in assembly. Only complex types are converted from C/C++ to assembly.
Also see
, which notes that this conversion does not happen automatically if the C/C++
sizeof( ) built-in function is used within a macro.
14.4.6 Structure/Union Alignment and $alignof( )
The assembly .struct and .union directives now take an optional second argument which can be used to specify a minimum alignment to be applied to the symbol name. This is used by the conversion process to pass the specific alignment from C/C++ to assembly.
The assembly built-in function $alignof( ) can be used to report the alignment of these structures. This can be used even on assembly structures, and the function will return the minimum alignment calculated by the assembler.
14.4.7 The .cstring Directive
You can use the new .cstring directive to cause the escape sequences and NULL termination to be properly handled as they would in C/C++.
.cstring "String with C escapes.\nWill be NULL terminated.\012"
See
for more information on the new .cstring directive.
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Appendix A
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Symbolic Debugging Directives
The assembler supports several directives that the TMS320C55x C/C++ compiler uses for symbolic debugging. These directives differ for the two debugging formats, DWARF and COFF.
These directives are not meant for use by assembly-language programmers. They require arguments that can be difficult to calculate manually, and their usage must conform to a predetermined agreement between the compiler, the assembler, and the debugger. This appendix documents these directives for informational purposes only.
Topic
...........................................................................................................................
Page
A.1
DWARF Debugging Format
A.2
COFF Debugging Format
...............................................................................
..................................................................................
A.3
Debug Directive Syntax ....................................................................................
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A.1
DWARF Debugging Format
A subset of the DWARF symbolic debugging directives are always listed in the assembly language file that the compiler creates for program analysis purposes. To list the complete set used for full symbolic debug, invoke the compiler with the --symdebug:dwarf option, as shown below: cl55 --symdebug:dwarf --keep_asm input_file
The --keep_asm option instructs the compiler to retain the generated assembly file.
To disable the generation of all symbolic debug directives, invoke the compiler with the -symdebug:none option: cl55 --symdebug:none --keep_asm input_file
The DWARF debugging format consists of the following directives:
• The .dwtag and .dwendtag directives define a Debug Information Entry (DIE) in the .debug_info
section.
• The .dwattr directive adds an attribute to an existing DIE.
• The .dwpsn directive identifies the source position of a C/C++ statement.
• The .dwcie and .dwendentry directives define a Common Information Entry (CIE) in the .debug_frame
section.
• The .dwfde and .dwendentry directives define a Frame Description Entry (FDE) in the .debug_frame
section.
• The .dwcfi directive defines a call frame instruction for a CIE or FDE.
A.2
COFF Debugging Format
COFF symbolic debug is now obsolete. These directives are supported for backwards-compatibility only.
The decision to switch to DWARF as the symbolic debug format was made to overcome many limitations of COFF symbolic debug, including the absence of C++ support.
The COFF debugging format consists of the following directives:
• The .sym directive defines a global variable, a local variable, or a function. Several parameters allow you to associate various debugging information with the variable or function.
• The .stag, .etag, and .utag directives define structures, enumerations, and unions, respectively. The
.member directive specifies a member of a structure, enumeration, or union. The .eos directive ends a structure, enumeration, or union definition.
• The .func and .endfunc directives specify the beginning and ending lines of a C/C++ function.
• The .block and .endblock directives specify the bounds of C/C++ blocks.
• The .file directive defines a symbol in the symbol table that identifies the current source filename.
• The .line directive identifies the line number of a C/C++ source statement.
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Debug Directive Syntax
A.3
Debug Directive Syntax
is an alphabetical listing of the symbolic debugging directives. For information on the C/C++ compiler, refer to the TMS320C55x Optimizing C/C++ Compiler User's Guide.
Label
CIE label
DIE label
Directive
.block
.dwattr
.dwcfi
.dwcie
.dwendentry
.dwendtag
.dwfde
.dwpsn
.dwtag
Table A-1. Symbolic Debugging Directives
Arguments
[beginning line number]
DIE label , DIE attribute name ( DIE attribute value )[, DIE attribute name ( attribute value ) [, ...]
call frame instruction opcode[, operand[, operand]]
version , return address register
CIE label
" filename " , line number , column number
DIE tag name , DIE attribute name ( DIE attribute value )[, DIE attribute name ( attribute value )
[, ...]
[ending line number]
[ending line number[, register mask[, frame size]]]
.endblock
.endfunc
.eos
.etag
.file
.func
.line
.member
.stag
.sym
.utag
name[, size]
" filename "
[beginning line number]
line number[, address]
name , value[, type , storage class , size , tag , dims]
name[, size]
name , value[, type , storage class , size , tag , dims]
name[, size]
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Appendix B
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XML Link Information File Description
The TMS320C55x linker supports the generation of an XML link information file via the --xml_link_info file option. This option causes the linker to generate a well-formed XML file containing detailed information about the result of a link. The information included in this file includes all of the information that is currently produced in a linker-generated map file.
As the linker evolves, the XML link information file may be extended to include additional information that could be useful for static analysis of linker results.
This appendix enumerates all of the elements that are generated by the linker into the XML link information file.
Topic
...........................................................................................................................
Page
B.1
XML Information File Element Types ..................................................................
B.2
Document Elements .........................................................................................
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B.1
XML Information File Element Types
These element types will be generated by the linker:
• Container elements represent an object that contains other elements that describe the object.
Container elements have an id attribute that makes them accessible from other elements.
• String elements contain a string representation of their value.
• Constant elements contain a 32-bit unsigned long representation of their value (with a 0x prefix).
• Reference elements are empty elements that contain an idref attribute that specifies a link to another container element.
In
, the element type is specified for each element in parentheses following the element
description. For instance, the < link_time > element lists the time of the link execution (string).
B.2
Document Elements
The root element, or the document element, is < link_info > . All other elements contained in the XML link information file are children of the < link_info > element. The following sections describe the elements that an XML information file can contain.
B.2.1 Header Elements
The first elements in the XML link information file provide general information about the linker and the link session:
• The < banner > element lists the name of the executable and the version information (string).
• The < copyright > element lists the TI copyright information (string).
• The < link_time > is a timestamp representation of the link time (unsigned 32-bit int).
• The < output_file > element lists the name of the linked output file generated (string).
• The < entry_point > element specifies the program entry point, as determined by the linker (container) with two entries:
– The < name > is the entry point symbol name, if any (string).
– The < address > is the entry point address (constant).
Example B-1. Header Element for the hi.out Output File
<banner>TMS320Cxx Linker Version x.xx (Jan 6 2008)</banner>
<copyright>Copyright (c) 1996-2008 Texas Instruments Incorporated</copyright>
<link_time>0x43dfd8a4</link_time>
<output_file>hi.out</output_file>
<entry_point>
<name>_c_int00</name>
<address>0xaf80</address>
</entry_point>
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B.2.2 Input File List
The next section of the XML link information file is the input file list, which is delimited with a
< input_file_list > container element. The < input_file_list > can contain any number of < input_file > elements.
Each < input_file > instance specifies the input file involved in the link. Each < input_file > has an id attribute that can be referenced by other elements, such as an < object_component > . An < input_file > is a container element enclosing the following elements:
• The < path > element names a directory path, if applicable (string).
• The < kind > element specifies a file type, either archive or object (string).
• The < file > element specifies an archive name or filename (string).
• The < name > element specifies an object file name, or archive member name (string).
Example B-2. Input File List for the hi.out Output File
<input_file_list>
<input_file id="fl-1">
<kind>object</kind>
<file>hi.obj</file>
<name>hi.obj</name>
</input_file>
<input_file id="fl-2">
<path>/tools/lib/</path>
<kind>archive</kind>
<file>rtsxxx.lib</file>
<name>boot.obj</name>
</input_file>
<input_file id="fl-3">
<path>/tools/lib/</path>
<kind>archive</kind>
<file>rtsxxx.lib</file>
<name>exit.obj</name>
</input_file>
<input_file id="fl-4">
<path>/tools/lib/</path>
<kind>archive</kind>
<file>rtsxxx.lib</file>
<name>printf.obj</name>
</input_file>
...
</input_file_list>
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B.2.3 Object Component List
The next section of the XML link information file contains a specification of all of the object components that are involved in the link. An example of an object component is an input section. In general, an object component is the smallest piece of object that can be manipulated by the linker.
The < object_component_list > is a container element enclosing any number of < object_component > elements.
Each < object_component > specifies a single object component. Each < object_component > has an id attribute so that it can be referenced directly from other elements, such as a < logical_group > . An
< object_component > is a container element enclosing the following elements:
• The < name > element names the object component (string).
• The < load_address > element specifies the load-time address of the object component (constant).
• The < run_address > element specifies the run-time address of the object component (constant).
• The < size > element specifies the size of the object component (constant).
• The < input_file_ref > element specifies the source file where the object component originated
(reference).
Example B-3. Object Component List for the fl-4 Input File
<object_component id="oc-20">
<name>.text</name>
<load_address>0xac00</load_address>
<run_address>0xac00</run_address>
<size>0xc0</size>
<input_file_ref idref="fl-4"/>
</object_component>
<object_component id="oc-21">
<name>.data</name>
<load_address>0x80000000</load_address>
<run_address>0x80000000</run_address>
<size>0x0</size>
<input_file_ref idref="fl-4"/>
</object_component>
<object_component id="oc-22">
<name>.bss</name>
<load_address>0x80000000</load_address>
<run_address>0x80000000</run_address>
<size>0x0</size>
<input_file_ref idref="fl-4"/>
</object_component>
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B.2.4 Logical Group List
The < logical_group_list > section of the XML link information file is similar to the output section listing in a linker-generated map file. However, the XML link information file contains a specification of GROUP and
UNION output sections, which are not represented in a map file. There are three kinds of list items that can occur in a < logical_group_list > :
• The < logical_group > is the specification of a section or GROUP that contains a list of object components or logical group members. Each < logical_group > element is given an id so that it may be referenced from other elements. Each < logical_group > is a container element enclosing the following elements:
– The < name > element names the logical group (string).
– The < load_address > element specifies the load-time address of the logical group (constant).
– The < run_address > element specifies the run-time address of the logical group (constant).
– The < size > element specifies the size of the logical group (constant).
– The < contents > element lists elements contained in this logical group (container). These elements refer to each of the member objects contained in this logical group:
• The < object_component_ref > is an object component that is contained in this logical group
(reference).
• The < logical_group_ref > is a logical group that is contained in this logical group (reference).
• The < overlay > is a special kind of logical group that represents a UNION, or a set of objects that share the same memory space (container). Each < overlay > element is given an id so that it may be referenced from other elements (like from an < allocated_space > element in the placement map). Each
< overlay > contains the following elements:
– The < name > element names the overlay (string).
– The < run_address > element specifies the run-time address of overlay (constant).
– The < size > element specifies the size of logical group (constant).
– The < contents > container element lists elements contained in this overlay. These elements refer to each of the member objects contained in this logical group:
• The < object_component_ref > is an object component that is contained in this logical group
(reference).
• The < logical_group_ref > is a logical group that is contained in this logical group (reference).
• The < split_section > is another special kind of logical group that represents a collection of logical groups that is split among multiple memory areas. Each < split_section > element is given an id so that it may be referenced from other elements. The id consists of the following elements.
– The < name > element names the split section (string).
– The < contents > container element lists elements contained in this split section. The
< logical_group_ref > elements refer to each of the member objects contained in this split section, and each element referenced is a logical group that is contained in this split section (reference).
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Example B-4. Logical Group List for the fl-4 Input File
<logical_group_list>
...
<logical_group id="lg-7">
<name>.text</name>
<load_address>0x20</load_address>
<run_address>0x20</run_address>
<size>0xb240</size>
<contents>
<object_component_ref idref="oc-34"/>
<object_component_ref idref="oc-108"/>
...
<object_component_ref idref="oc-e2"/>
</contents>
</logical_group>
...
<overlay id="lg-b">
<name>UNION_1</name>
<run_address>0xb600</run_address>
<size>0xc0</size>
<contents>
<object_component_ref idref="oc-45"/>
<logical_group_ref idref="lg-8"/>
</contents>
</overlay>
...
<split_section id="lg-12">
<name>.task_scn</name>
<size>0x120</size>
<contents>
<logical_group_ref idref="lg-10"/>
<logical_group_ref idref="lg-11"/>
</contents>
...
</logical_group_list> www.ti.com
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B.2.5 Placement Map
The < placement_map > element describes the memory placement details of all named memory areas in the application, including unused spaces between logical groups that have been placed in a particular memory area.
The < memory_area > is a description of the placement details within a named memory area (container).
The description consists of these items:
• The < name > names the memory area (string).
• The < page_id > gives the id of the memory page in which this memory area is defined (constant).
• The < origin > specifies the beginning address of the memory area (constant).
• The < length > specifies the length of the memory area (constant).
• The < used_space > specifies the amount of allocated space in this area (constant).
• The < unused_space > specifies the amount of available space in this area (constant).
• The < attributes > lists the RWXI attributes that are associated with this area, if any (string).
• The < fill_value > specifies the fill value that is to be placed in unused space, if the fill directive is specified with the memory area (constant).
• The < usage_details > lists details of each allocated or available fragment in this memory area. If the fragment is allocated to a logical group, then a < logical_group_ref > element is provided to facilitate access to the details of that logical group. All fragment specifications include < start_address > and
< size > elements.
– The < allocated_space > element provides details of an allocated fragment within this memory area
(container):
• The < start_address > specifies the address of the fragment (constant).
• The < size > specifies the size of the fragment (constant).
• The < logical_group_ref > provides a reference to the logical group that is allocated to this fragment (reference).
– The < available_space element provides details of an available fragment within this memory area
(container):
• The < start_address > specifies the address of the fragment (constant).
• The < size > specifies the size of the fragment (constant).
Example B-5. Placement Map for the fl-4 Input File
<placement_map>
<memory_area>
<name>PMEM</name>
<page_id>0x0</page_id>
<origin>0x20</origin>
<length>0x100000</length>
<used_space>0xb240</used_space>
<unused_space>0xf4dc0</unused_space>
<attributes>RWXI</attributes>
<usage_details>
<allocated_space>
<start_address>0x20</start_address>
<size>0xb240</size>
<logical_group_ref idref="lg-7"/>
</allocated_space>
<available_space>
<start_address>0xb260</start_address>
<size>0xf4dc0</size>
</available_space>
</usage_details>
</memory_area>
...
</placement_map>
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B.2.6 Far Call Trampoline List
The < far_call_trampoline_list > is a list of < far_call_trampoline > elements. The linker supports the generation of far call trampolines to help a call site reach a destination that is out of range. A far call trampoline function is guaranteed to reach the called function (callee) as it may utilize an indirect call to the called function.
The < far_call_trampoline_list > enumerates all of the far call trampolines that are generated by the linker for a particular link. The < far_call_trampoline_list > can contain any number of < far_call_trampoline > elements. Each < far_call_trampoline > is a container enclosing the following elements:
• The < callee_name > element names the destination function (string).
• The < callee_address > is the address of the called function (constant).
• The < trampoline_object_component_ref > is a reference to an object component that contains the definition of the trampoline function (reference).
• The < trampoline_address > is the address of the trampoline function (constant).
• The < caller_list > enumerates all call sites that utilize this trampoline to reach the called function
(container).
• The < trampoline_call_site > provides the details of a trampoline call site (container) and consists of these items:
– The < caller_address > specifies the call site address (constant).
– The < caller_object_component_ref > is the object component where the call site resides
(reference).
Example B-6. Fall Call Trampoline List for the fl-4 Input File
<far_call_trampoline_list>
...
<far_call_trampoline>
<callee_name>_foo</callee_name>
<callee_address>0x08000030</callee_address>
<trampoline_object_component_ref idref="oc-123"/>
<trampoline_address>0x2020</trampoline_address>
<caller_list>
<call_site>
<caller_address>0x1800</caller_address>
<caller_object_component_ref idref="oc-23"/>
</call_site>
<call_site>
<caller_address>0x1810</caller_address>
<caller_object_component_ref idref="oc-23"/>
</call_site>
</caller_list>
</far_call_trampoline>
...
</far_call_trampoline_list>
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B.2.7 Symbol Table
The < symbol_table > contains a list of all of the global symbols that are included in the link. The list provides information about a symbol's name and value. In the future, the symbol_table list may provide type information, the object component in which the symbol is defined, storage class, etc.
The < symbol > is a container element that specifies the name and value of a symbol with these elements:
• The < name > element specifies the symbol name (string).
• The < value > element specifies the symbol value (constant).
Example B-7. Symbol Table for the fl-4 Input File
<symbol_table>
<symbol>
<name>_c_int00</name>
<value>0xaf80</value>
</symbol>
<symbol>
<name>_main</name>
<value>0xb1e0</value>
</symbol>
<symbol>
<name>_printf</name>
<value>0xac00</value>
</symbol>
...
</symbol_table>
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Glossary
ABI — Application binary interface.
absolute address — An address that is permanently assigned to a TMS320C55x memory location.
absolute lister — A debugging tool that allows you to create assembler listings that contain absolute addresses.
alignment — A process in which the linker places an output section at an address that falls on an n-byte boundary, where n is a power of 2. You can specify alignment with the SECTIONS linker directive.
allocation — A process in which the linker calculates the final memory addresses of output sections.
ANSI — American National Standards Institute; an organization that establishes standards voluntarily followed by industries.
archive library — A collection of individual files grouped into a single file by the archiver.
archiver — A software program that collects several individual files into a single file called an archive library. With the archiver, you can add, delete, extract, or replace members of the archive library.
ASCII — American Standard Code for Information Interchange; a standard computer code for representing and exchanging alphanumeric information.
assembler — A software program that creates a machine-language program from a source file that contains assembly language instructions, directives, and macro definitions. The assembler substitutes absolute operation codes for symbolic operation codes and absolute or relocatable addresses for symbolic addresses.
assembly-time constant — A symbol that is assigned a constant value with the .set directive.
big endian — An addressing protocol in which bytes are numbered from left to right within a word. More significant bytes in a word have lower numbered addresses. Endian ordering is hardware-specific and is determined at reset. See also little endian binding — A process in which you specify a distinct address for an output section or a symbol.
block — A set of statements that are grouped together within braces and treated as an entity.
.bss section — One of the default object file sections. You use the assembler .bss directive to reserve a specified amount of space in the memory map that you can use later for storing data. The .bss
section is uninitialized.
byte — Per ANSI/ISO C, the smallest addressable unit that can hold a character.
C/C++ compiler — A software program that translates C source statements into assembly language source statements.
COFF — Common object file format; a system of object files configured according to a standard developed by AT & T. These files are relocatable in memory space.
command file — A file that contains options, filenames, directives, or commands for the linker or hex conversion utility.
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comment — A source statement (or portion of a source statement) that documents or improves readability of a source file. Comments are not compiled, assembled, or linked; they have no effect on the object file.
compiler program — A utility that lets you compile, assemble, and optionally link in one step. The compiler runs one or more source modules through the compiler (including the parser, optimizer, and code generator), the assembler, and the linker.
conditional processing — A method of processing one block of source code or an alternate block of source code, according to the evaluation of a specified expression.
configured memory — Memory that the linker has specified for allocation.
constant — A type whose value cannot change.
cross-reference lister — A utility that produces an output file that lists the symbols that were defined, what file they were defined in, what reference type they are, what line they were defined on, which lines referenced them, and their assembler and linker final values. The cross-reference lister uses linked object files as input.
cross-reference listing — An output file created by the assembler that lists the symbols that were defined, what line they were defined on, which lines referenced them, and their final values.
.data section — One of the default object file sections. The .data section is an initialized section that contains initialized data. You can use the .data directive to assemble code into the .data section.
directives — Special-purpose commands that control the actions and functions of a software tool (as opposed to assembly language instructions, which control the actions of a device).
ELF — Executable and linking format; a system of object files configured according to the System V
Application Binary Interface specification.
emulator — A hardware development system that duplicates the TMS320C55x operation.
entry point — A point in target memory where execution starts.
environment variable — A system symbol that you define and assign to a string. Environmental variables are often included in Windows batch files or UNIX shell scripts such as .cshrc or .profile.
epilog — The portion of code in a function that restores the stack and returns.
executable module — A linked object file that can be executed in a target system.
expression — A constant, a symbol, or a series of constants and symbols separated by arithmetic operators.
external symbol — A symbol that is used in the current program module but defined or declared in a different program module.
field — For the TMS320C55x, a software-configurable data type whose length can be programmed to be any value in the range of 1-16 bits.
global symbol — A symbol that is either defined in the current module and accessed in another, or accessed in the current module but defined in another.
GROUP — An option of the SECTIONS directive that forces specified output sections to be allocated contiguously (as a group).
hex conversion utility — A utility that converts object files into one of several standard ASCII hexadecimal formats, suitable for loading into an EPROM programmer.
high-level language debugging — The ability of a compiler to retain symbolic and high-level language information (such as type and function definitions) so that a debugging tool can use this information.
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Appendix C hole — An area between the input sections that compose an output section that contains no code.
incremental linking — Linking files in several passes. Incremental linking is useful for large applications, because you can partition the application, link the parts separately, and then link all of the parts together.
initialization at load time — An autoinitialization method used by the linker when linking C/C++ code. The linker uses this method when you invoke it with the --ram_model link option. This method initializes variables at load time instead of run time.
initialized section — A section from an object file that will be linked into an executable module.
input section — A section from an object file that will be linked into an executable module.
ISO — International Organization for Standardization; a worldwide federation of national standards bodies, which establishes international standards voluntarily followed by industries.
label — A symbol that begins in column 1 of an assembler source statement and corresponds to the address of that statement. A label is the only assembler statement that can begin in column 1.
linker — A software program that combines object files to form an object module that can be allocated into system memory and executed by the device.
listing file — An output file, created by the assembler, that lists source statements, their line numbers, and their effects on the section program counter (SPC).
little endian — An addressing protocol in which bytes are numbered from right to left within a word. More significant bytes in a word have higher numbered addresses. Endian ordering is hardware-specific and is determined at reset. See also big endian loader — A device that places an executable module into system memory.
macro — A user-defined routine that can be used as an instruction.
macro call — The process of invoking a macro.
macro definition — A block of source statements that define the name and the code that make up a macro.
macro expansion — The process of inserting source statements into your code in place of a macro call.
macro library — An archive library composed of macros. Each file in the library must contain one macro; its name must be the same as the macro name it defines, and it must have an extension of .asm.
map file — An output file, created by the linker, that shows the memory configuration, section composition, section allocation, symbol definitions and the addresses at which the symbols were defined for your program.
member — The elements or variables of a structure, union, archive, or enumeration.
memory map — A map of target system memory space that is partitioned into functional blocks.
mnemonic — An instruction name that the assembler translates into machine code.
model statement — Instructions or assembler directives in a macro definition that are assembled each time a macro is invoked.
named section — An initialized section that is defined with a .sect directive.
object file — An assembled or linked file that contains machine-language object code.
object library — An archive library made up of individual object files.
object module — A linked, executable object file that can be downloaded and executed on a target system.
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operand — An argument of an assembly language instruction, assembler directive, or macro directive that supplies information to the operation performed by the instruction or directive.
optimizer — A software tool that improves the execution speed and reduces the size of C programs.
options — Command-line parameters that allow you to request additional or specific functions when you invoke a software tool.
output module — A linked, executable object file that is downloaded and executed on a target system.
output section — A final, allocated section in a linked, executable module.
overlay page — A section of physical memory that is mapped into the same address range as another section of memory. A hardware switch determines which range is active.
partial linking — Linking files in several passes. Incremental linking is useful for large applications because you can partition the application, link the parts separately, and then link all of the parts together.
quiet run — An option that suppresses the normal banner and the progress information.
raw data — Executable code or initialized data in an output section.
relocation — A process in which the linker adjusts all the references to a symbol when the symbol's address changes.
ROM width — The width (in bits) of each output file, or, more specifically, the width of a single data value in the hex conversion utility file. The ROM width determines how the utility partitions the data into output files. After the target words are mapped to memory words, the memory words are broken into one or more output files. The number of output files is determined by the ROM width.
run address — The address where a section runs.
run-time-support library — A library file, rts.src, that contains the source for the run time-support functions.
section — A relocatable block of code or data that ultimately will be contiguous with other sections in the memory map.
section program counter (SPC) — An element that keeps track of the current location within a section; each section has its own SPC.
sign extend — A process that fills the unused MSBs of a value with the value's sign bit.
simulator — A software development system that simulates TMS320C55x operation.
source file — A file that contains C/C++ code or assembly language code that is compiled or assembled to form an object file.
static variable — A variable whose scope is confined to a function or a program. The values of static variables are not discarded when the function or program is exited; their previous value is resumed when the function or program is reentered.
storage class — An entry in the symbol table that indicates how to access a symbol.
string table — A table that stores symbol names that are longer than eight characters (symbol names of eight characters or longer cannot be stored in the symbol table; instead they are stored in the string table). The name portion of the symbol's entry points to the location of the string in the string table.
structure — A collection of one or more variables grouped together under a single name.
subsection — A relocatable block of code or data that ultimately will occupy continuous space in the memory map. Subsections are smaller sections within larger sections. Subsections give you tighter control of the memory map.
symbol — A string of alphanumeric characters that represents an address or a value.
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Appendix C symbolic debugging — The ability of a software tool to retain symbolic information that can be used by a debugging tool such as a simulator or an emulator.
tag — An optional type name that can be assigned to a structure, union, or enumeration.
target memory — Physical memory in a system into which executable object code is loaded.
.text section — One of the default object file sections. The .text section is initialized and contains executable code. You can use the .text directive to assemble code into the .text section.
unconfigured memory — Memory that is not defined as part of the memory map and cannot be loaded with code or data.
uninitialized section — A object file section that reserves space in the memory map but that has no actual contents. These sections are built with the .bss and .usect directives.
UNION — An option of the SECTIONS directive that causes the linker to allocate the same address to multiple sections.
union — A variable that can hold objects of different types and sizes.
unsigned value — A value that is treated as a nonnegative number, regardless of its actual sign.
variable — A symbol representing a quantity that can assume any of a set of values.
well-defined expression — A term or group of terms that contains only symbols or assembly-time constants that have been defined before they appear in the expression.
word — A 16-bit addressable location in target memory
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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Amplifiers
Data Converters
DLP ® Products
DSP
Clocks and Timers
Interface
Logic www.ti.com/audio amplifier.ti.com
dataconverter.ti.com
www.dlp.com
dsp.ti.com
www.ti.com/clocks interface.ti.com
logic.ti.com
Applications
Communications and Telecom www.ti.com/communications
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
Medical
Security www.ti.com/computers www.ti.com/consumer-apps www.ti.com/energy www.ti.com/industrial www.ti.com/medical www.ti.com/security
Space, Avionics and Defense www.ti.com/space-avionics-defense
Power Mgmt
Microcontrollers
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity power.ti.com
microcontroller.ti.com
www.ti.com/wirelessconnectivity
Transportation and Automotive
Video and Imaging
TI E2E Community Home Page www.ti.com/automotive www.ti.com/video e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
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