Texas Instruments TMS320C54x assembly language tools User’s Guide

TMS320C54x
Assembly Language Tools
User’s Guide
Printed on Recycled Paper
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Copyright  1995, Texas Instruments Incorporated
Running Title—Attribute Reference
Preface
Read This First
What Is This Book About?
The TMS320C54x Assembly Language Tools User’s Guide tells you how to
use these assembly language tools:
Assembler
Archiver
Linker
Absolute lister
Cross-reference lister
Hex conversion utility
Before you can use this book, you should read the TMS320C54x Code
Generation Tools Getting Started to install the assembly language tools.
How to Use This Manual
The goal of this book is to help you learn how to use the Texas Instruments
assembly language tools specifically designed for the TMS320C54x DSPs.
This book is divided into four distinct parts:
Introductory information gives you an overview of the assembly lan-
guage development tools and also discusses common object file format
(COFF) which helps you to use the TMS320C54x tools more efficiently.
Read Chapter 2 before using the assembler and linker.
Assembler description contains detailed information about using the
assembler. This section explains how to invoke the assembler and
discusses source statement format, valid constants and expressions, assembler output, and assembler directives. It also summarizes the
TMS320C54x instruction set alphabetically and describes macro
elements.
Additional assembly language tools describes in detail each of the
tools provided with the assembler to help you create assembly language
source files. For example, Chapter 8 explains how to invoke the linker, how
the linker operates, and how to use linker directives. Chapter 11 explains
how to use the hex conversion utility.
iii
How to Use This Manual / Notational Conventions
Reference material provides supplementary information. This section
contains technical data about the internal format and structure of COFF
object files. It discusses symbolic debugging directives that the
TMS320C54x C compiler uses. Finally, it includes hex conversion utility
examples, assembler and linker error messages, and a glossary.
Notational Conventions
This document uses the following conventions:
Program listings, program examples, and interactive displays are shown
in a special typeface similar to a typewriter’s. Examples use a bold
version of the special typeface for emphasis; interactive displays use a
bold version of the special typeface to distinguish commands that you
enter from items that the system displays (such as prompts, command
output, error messages, etc.).
Here is a sample program listing:
2 0001
3 0002
4 0003
2f
32
x
z
.byte
.byte
.text
47
50
In syntax descriptions, the instruction, command, or directive is in a bold
typeface font and parameters are in an italic typeface. Portions of a syntax
that are in bold should be entered as shown; portions of a syntax that are
in italics describe the type of information that should be entered. Syntax
that will be entered on a command line is centered in a bounded box. Syntax that will be used in a text file is left-justified in an unbounded box. Here
is an example of command line syntax:
abs500 filename
abs500 is a command. The command invokes the absolute lister and has
one parameter, indicated by filename. When you invoke the absolute lister, you supply the name of the file that the absolute lister uses as input.
Square brackets ( [ and ] ) identify an optional parameter. If you use an
optional parameter, you specify the information within the brackets; you
don’t enter the brackets themselves. This is an example of a command
that has an optional parameter:
hex500 [–options] filename
The hex500 command has two parameters. The first parameter, –options,
is optional. Since options is plural, you may select several options. The
second parameter, filename, is required.
iv
Notational Conventions
In assembler syntax statements, column 1 is reserved for the first charac-
ter of a label or symbol. If the label or symbol is optional, it is usually not
shown. If it is a required parameter, then it will be shown starting against
the left margin of the shaded box, as in the example below. No instruction,
command, directive, or parameter, other than a symbol or label, should
begin in column 1.
symbol .usect ”section name”, size in words [, blocking flag]
[, alignment flag]
The symbol is required for the .usect directive and must begin in column 1.
The section name must be enclosed in quotes and the section size in
words must be separated from the section name by a comma. The blocking flag and alignment flag are optional and, if used, must be separated by
commas.
Some directives can have a varying number of parameters. For example,
the .byte directive can have up to 100 parameters. The syntax for this
directive is:
.byte value1 [, ... , valuen ]
Note that .byte does not
begin in column 1.
This syntax shows that .byte must have at least one value parameter, but
you have the option of supplying additional value parameters, separated
by commas.
Following are other symbols and abbreviations used throughout this document.
Symbol
Definition
Symbol
Definition
AR0–AR7
Auxiliary Registers
0 through 7
PC
Program counter
register
B,b
Suffix — binary integer
Q,q
Suffix — octal integer
H,h
Suffix — hexadecimal
integer
SP
Stack pointer register
LSB
Least significant bit
ST
Status register
MSB
Most significant bit
Read This First
v
Related Documentation From Texas Instruments
Related Documentation From Texas Instruments
The following books describe the TMS320C54x devices and related support
tools. To obtain a copy of any of these TI documents, call the Texas Instruments Literature Response Center at (800) 477–8924. When ordering, please
identify the book by its title and literature number.
TMS320C54x Optimizing C Compiler User’s Guide (literature number
SPRU103) describes the ’C54x C compiler. This C compiler accepts
ANSI standard C source code and produces TMS320 assembly language source code for the ’C54x generation of devices.
TMS320C5xx C Source Debugger User’s Guide (literature number
SPRU099) tells you how to invoke the ’C54x emulator, EVM, and
simulator versions of the C source debugger interface. This book
discusses various aspects of the debugger interface, including window
management, command entry, code execution, data management, and
breakpoints, and includes a tutorial that introduces basic debugger
functionality.
TMS320C54x User’s Guide (literature number SPRU131) describes the
TMS320C54x 16-bit, fixed-point, general-purpose digital signal processors. Covered are its pin assignments, architecture, internal register
structure, instruction set, pipeline, specifications, DMA, and I/O ports.
Software and hardware applications are covered in dedicated chapters.
TMS320 Family Development Support Reference Guide (literature number
SPRU011) describes the ’320 family of digital signal processors and
covers the various products that support this product line. This includes
code-generation tools (compilers, assemblers, linkers, etc.) and system
integration and debug tools (simulators, emulators, evaluation modules,
etc.). Also covered are available documentation, seminars, the university program, and factory repair and exchange.
TMS320 Third-Party Support Reference Guide (literature number
SPRU052) alphabetically lists over 100 third parties that provide various
products that serve the family of ’320 digital signal processors. A myriad
of products and applications are offered—software and hardware development tools, speech recognition, image processing, noise cancellation,
modems, etc.
Digital Signal Processing Applications with the TMS320 Family, Volumes
1, 2, and 3 (literature numbers SPRA012, SPRA016, SPRA017)
Volumes 1 and 2 cover applications using the ’C10 and ’C20 families of
fixed-point processors. Volume 3 documents applications using both
fixed-point processors as well as the ’C30 floating-point processor.
vi
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Preface
vii
Running Title—Attribute Reference
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Provides an overview of the assembly language development tools.
1.1
1.2
2
Introduction to Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Discusses the basic COFF concept of sections and how they can help you use the assembler
and linker more efficiently. Common object file format, or COFF, is the object file format used
by the TMS320C54x tools. Read Chapter 2 before using the assembler and linker.
2.1
2.2
2.3
2.4
2.5
2.6
2.7
3
Tools Overview and Development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.1 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.2 Initialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.2.3 Named Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.2.4 Section Program Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.2.5 An Example That Uses Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.3.1 Default Memory Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.3.2 Placing Sections in the Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.7.1 External Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.7.2 The Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
Assembler Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Explains how to invoke the assembler and discusses source statement format, valid constants
and expressions, and assembler output.
3.1
3.2
3.3
3.4
Assembler Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Naming Alternate Directories for Assembler Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4.1 – i Assembler Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4.2 A_DIR Environment Variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2
3-3
3-4
3-6
3-6
3-7
ix
Contents
3.5
3.6
3.7
3.8
3.9
3.10
3.11
4
Assembler Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Describes the directives according to function, and presents the directives in alphabetical order.
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
4.11
x
Source Statement Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.5.1 Label Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.5.2 Mnemonic Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.5.3 Operand Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.5.4 Comment Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.6.1 Binary Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.6.2 Octal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.6.3 Decimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.6.4 Hexadecimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.6.5 Character Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.6.6 Assembly-Time Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
Character Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.8.1 Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.8.2 Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.8.3 Defining Symbolic Constants (–d Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.8.4 Predefined Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.8.5 Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
3.8.6 Local Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.9.1 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.9.2 Expression Overflow and Underflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.9.3 Well-Defined Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.9.4 Conditional Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.9.5 Relocatable Symbols and Legal Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
Source Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23
Cross-Reference Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives . . . . . . . . . . . 4-7
Directives That Define Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Directives That Initialize Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Directives That Align the Section Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Directives That Format the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17
Directives That Reference Other Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-19
Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
Assembly-Time Symbol Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
Miscellaneous Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
Directives Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
Contents
5
Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
Summarizes the TMS320C54x instruction set alphabetically.
5.1
5.2
6
Macro Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
Describes macro directives, substitution symbols used as macro parameters, and how to
create macros.
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
7
Using Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
Defining Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Macro Parameters/Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.3.1 Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.3.2 Directives That Define Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
6.3.3 Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
6.3.4 Recursive Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
6.3.5 Forced Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
6.3.6 Accessing Individual Characters of Subscripted Substitution Symbols . . . . . 6-10
6.3.7 Substitution Symbols as Local Variables in Macros . . . . . . . . . . . . . . . . . . . . . . 6-12
Macro Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13
Using Conditional Assembly in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
Using Labels in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
Producing Messages in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17
Formatting the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19
Using Recursive and Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20
Macro Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
Archiver Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
Contains instructions for invoking the archiver, creating new archive libraries, and modifying
existing libraries.
7.1
7.2
7.3
7.4
8
Using the Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
Archiver Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Archiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Archiver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-2
7-3
7-4
7-6
Linker Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
Explains how to invoke the linker, provides details about linker operation, discusses linker directives, and presents a detailed linking example.
8.1
8.2
8.3
8.4
Linker Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.4.1 Relocation Capabilities (– a and – r Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.4.2 Disable Merge of Symbolic Debugging Information (–b Option) . . . . . . . . . . . .
8.4.3 C Language Options (–c and –cr Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
8-2
8-3
8-4
8-6
8-7
8-8
8-9
xi
Contents
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
xii
8.4.4 Define an Entry Point (–e global_symbol Option) . . . . . . . . . . . . . . . . . . . . . . . . 8-9
8.4.5 Set Default Fill Value (–f cc Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9
8.4.6 Make All Global Symbols Static (–h and –g global_symbol Options) . . . . . . . 8-10
8.4.7 Define Heap Size (–heap constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-10
8.4.8 Alter the Library Search Algorithm (–i dir Option/C_DIR) . . . . . . . . . . . . . . . . . 8-11
8.4.9 Create a Map File (–m filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13
8.4.10 Ignore the Memory Directive Fill Specification (–n Option) . . . . . . . . . . . . . . . 8-13
8.4.11 Name an Output Module (–o filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13
8.4.12 Specify a Quiet Run (–q Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13
8.4.13 Strip Symbolic Information (–s Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-14
8.4.14 Define Stack Size (–stack constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-14
8.4.15 Introduce an Unresolved Symbol (–u symbol Option) . . . . . . . . . . . . . . . . . . . . 8-14
8.4.16 Exhaustively Read Libraries (–x Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15
Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
Object Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
8.7.1 Default Memory Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
8.7.2 MEMORY Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-25
8.8.1 Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-25
8.8.2 SECTIONS Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-25
8.8.3 Specifying the Address of Output Sections (Allocation) . . . . . . . . . . . . . . . . . . 8-27
Specifying a Section’s Runtime Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-33
8.9.1 Specifying Load and Run Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-33
8.9.2 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-34
8.9.3 Referring to the Load Address by Using the .label Directive . . . . . . . . . . . . . . 8-34
Using UNION and GROUP Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37
8.10.1 Overlaying Sections With the UNION Statement . . . . . . . . . . . . . . . . . . . . . . . . 8-37
8.10.2 Grouping Output Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39
Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-40
8.11.1 Using the MEMORY Directive to Define Overlay Pages . . . . . . . . . . . . . . . . . . 8-40
8.11.2 Using Overlay Pages With the SECTIONS Directive . . . . . . . . . . . . . . . . . . . . 8-42
8.11.3 Page Definition Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-43
Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
8.12.1 Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
8.12.2 General Rules for Output Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-46
Special Section Types (DSECT, COPY, and NOLOAD) . . . . . . . . . . . . . . . . . . . . . . . . . 8-47
Assigning Symbols at Link Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48
8.14.1 Syntax of Assignment Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48
8.14.2 Assigning the SPC to a Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48
8.14.3 Assignment Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-49
8.14.4 Symbols Defined by the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-51
Contents
8.15
8.16
8.17
8.18
9
Creating and Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.15.1 Initialized and Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.15.2 Creating Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.15.3 Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.15.4 Explicit Initialization of Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . .
Partial (Incremental) Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linking C Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.17.1 Runtime Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.17.2 Object Libraries and Runtime Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.17.3 Setting the Size of the Stack and Heap Sections . . . . . . . . . . . . . . . . . . . . . . . .
8.17.4 Autoinitialization (ROM and RAM Models) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.17.5 The –c and –cr Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linker Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8-52
8-52
8-52
8-54
8-55
8-56
8-58
8-58
8-58
8-59
8-59
8-61
8-62
Absolute Lister Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
Explains how to invoke the absolute lister to obtain a listing of the absolute addresses of an
object file.
9.1
9.2
9.3
Producing an Absolute Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
Invoking the Absolute Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
Absolute Lister Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
10 Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
Explains how to invoke the cross-reference lister to obtain a listing of symbols, their definitions,
and their references in the linked source files.
10.1
10.2
10.3
Producing a Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
Invoking the Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Cross-Reference Listing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
11 Hex Conversion Utility Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1
Explains how to invoke the hex utility to convert a COFF object file into one of several standard
hexadecimal formats suitable for loading into an EPROM programmer.
11.1
11.2
11.3
11.4
11.5
Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2
Invoking the Hex Conversion Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3
Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
Understanding Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
11.4.1 Target Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
11.4.2 Data Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
11.4.3 Memory Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
11.4.4 ROM Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
11.4.5 A Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12
11.4.6 Specifying Word Order for Output Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12
The ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-14
11.5.1 When to Use the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-16
11.5.2 An Example of the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-17
11.5.3 Creating a Map File of the ROMS directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-19
Contents
xiii
Running Title—Attribute Reference
11.6
11.7
11.8
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Filenames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Image Mode and the –fill Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.8.1 The –image Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.8.2 Specifying a Fill Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.8.3 Steps to Follow in Image Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9 Building a Table for an On-Chip Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.1 Description of the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.2 The Boot Table Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.3 How to Build the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.4 Booting From a Device Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.5 Setting the Entry Point for the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.6 Using the ’C54x Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10 Controlling the ROM Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.1 Controlling the Starting Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.2 Controlling the Address Increment Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.3 The –byte Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.4 Dealing With Address Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.11 Description of the Object Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.11.1 ASCII-Hex Object Format (–a Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.11.2 Intel MCS-86 Object Format (–i Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.11.3 Motorola Exorciser Object Format (–m Option) . . . . . . . . . . . . . . . . . . . . . . . .
11.11.4 Texas Instruments SDSMAC Object Format (–t Option) . . . . . . . . . . . . . . . . .
11.11.5 Extended Tektronix Object Format (–x Option) . . . . . . . . . . . . . . . . . . . . . . . .
11.12 Hex Conversion Utility Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
Contains supplemental technical data about the internal format and structure of COFF object
files.
A.1
A.2
A.3
A.4
A.5
A.6
A.7
xiv
11-20
11-22
11-24
11-24
11-25
11-25
11-26
11-26
11-26
11-27
11-28
11-29
11-30
11-32
11-32
11-34
11-34
11-35
11-36
11-37
11-38
11-39
11-40
11-41
11-42
COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
File Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
Optional File Header Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
Section Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
Structuring Relocation Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
Line-Number Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
Symbol Table Structure and Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
A.7.1 Special Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
A.7.2 Symbol Name Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A.7.3 String Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A.7.4 Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
A.7.5 Symbol Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
A.7.6 Section Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
A.7.7 Type Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
A.7.8 Auxiliary Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-23
Contents
B
Symbolic Debugging Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1
Discusses symbolic debugging directives that the TMS320C54x C compiler uses.
C
Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1
Illustrates command file development for a variety of memory systems and situations.
C.1
C.2
C.3
Example 1: Building A Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . C-2
Example 2: Avoiding Holes With Multiple Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-7
Example 3: Generating a Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-9
D
Assembler Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1
Lists the error messages that the assembler issues, and gives a description of the condition
which caused each error.
E
Linker Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-1
Lists the syntax and command, allocation, and I/O error messages that the linker issues, and
gives a description of the condition which caused each error.
F
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-1
Defines terms and acronyms used in this book.
Contents
xv
Running Title—Attribute Reference
Figures
1–1
2–1
2–2
2–3
3–1
4–1
4–2
4–3
4–4
4–5
4–6
4–7
7–1
8–1
8–2
8–3
8–4
8–5
8–6
8–7
8–8
9–1
10–1
11–1
11–2
11–3
11–4
11–5
11–6
11–7
11–8
11–9
11–10
11–11
11–12
11–13
11–14
xvi
TMS320C54x Assembly Language Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Partitioning Memory Into Logical Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Object Code Generated by the File in Example 2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Combining Input Sections to Form an Executable Object Module . . . . . . . . . . . . . . . . . . . 2-11
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
The .space and .bes Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
Initialization Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
The .align Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16
Allocating .bss Blocks Within a Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-29
The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43
The .usect Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-81
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
Memory Map Defined in Example 8–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24
Section Allocation Defined by Example 8–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27
Runtime Execution of Example 8–6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-36
Memory Allocation Shown in Example 8–7 and Example 8–8 . . . . . . . . . . . . . . . . . . . . . . 8-38
Overlay Pages Defined by Example 8–10 and Example 8–11 . . . . . . . . . . . . . . . . . . . . . . 8-41
RAM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-60
ROM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-60
Absolute Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
Cross-Reference Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2
Hex Conversion Utility Process Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
Data and Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
Data, Memory, and ROM Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-11
’C54x Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12
Varying the Word Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13
The infile.out File From Example 11–1 Partitioned Into Four Output Files . . . . . . . . . . . 11-18
Sample Command File for Booting From a ’C54x EPROM . . . . . . . . . . . . . . . . . . . . . . . . 11-31
Hex Command File for Avoiding a Hole at the Beginning of a Section . . . . . . . . . . . . . . 11-35
ASCII-Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-37
Intel Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-38
Motorola-S Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-39
TI-Tagged Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-40
Extended Tektronix Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-41
Figures
A–1
A–2
A–3
A–4
A–5
A–6
A–7
A–8
A–9
C–1
C–2
C–3
COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
COFF Object File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Section Header Pointers for the .text Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-9
Line-Number Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
Line-Number Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-13
Symbol Table Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
Symbols for Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17
Symbols for Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17
String Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A Two 8-Bit EPROM System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
Data From Output File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-5
EPROM System for a ’C54x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-9
Contents
xvii
Running Title—Attribute Reference
Tables
3–1
3–2
3–3
4–1
4–2
5–1
6–1
6–2
6–3
6–4
6–5
6–6
8–1
8–2
10–1
11–1
11–2
11–3
A–1
A–2
A–3
A–4
A–5
A–6
A–7
A–8
A–9
A–10
A–11
A–12
A–13
A–14
A–15
A–16
A–17
A–18
xviii
Operators Used in Expressions (Precedence) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
Expressions With Absolute and Relocatable Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
Assembler Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Memory-Mapped Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-60
Symbols and Acronyms Used in the Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . 5-2
Functions and Return Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
Creating Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
Manipulating Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
Conditional Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
Producing Assembly-Time Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-23
Formatting the Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-23
Linker Options Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6
Operators Used in Expressions (Precedence) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-50
Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
Basic Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-4
Boot-Loader Utility Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-27
Options for Specifying Hex Conversion Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-36
File Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
File Header Flags (Bytes 18 and 19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
Optional File Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
Section Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
Section Header Flags (Bytes 36 and 37) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8
Relocation Entry Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
Relocation Types (Bytes 8 and 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11
Line-Number Entry Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
Symbol Table Entry Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15
Special Symbols in the Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
Symbol Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
Special Symbols and Their Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
Symbol Values and Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
Section Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
Basic Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-22
Derived Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-22
Auxiliary Symbol Table Entries Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-23
Filename Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-24
Tables
A–19
A–20
A–21
A–22
A–23
A–24
A–25
A–26
Section Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tag Name Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
End-of-Structure Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Array Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
End-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . .
Beginning-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . .
Structure, Union, and Enumeration Names Format for Auxiliary Table Entries . . . . . . . .
Contents
A-24
A-24
A-25
A-25
A-26
A-26
A-27
A-27
xix
Running Title—Attribute Reference
Examples
2–1
2–2
3–1
3–2
4–1
6–1
6–2
6–3
6–4
6–5
6–6
6–7
6–8
6–9
6–10
6–11
6–12
6–13
6–14
6–15
6–16
8–1
8–2
8–3
8–4
8–5
8–6
8–7
8–8
8–9
8–10
8–11
8–12
8–13
8–14
11–1
11–2
xx
Using Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Code That Generates Relocation Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Assembler Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25
Assembler Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Macro Definition, Call, and Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
Calling a Macro With Varying Numbers of Arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
The .asg Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
The .eval Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
Using Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
Recursive Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
Using the Forced Substitution Operator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10
Using Subscripted Substitution Symbols to Redefine an Instruction . . . . . . . . . . . . . . . . . 6-11
Using Subscripted Substitution Symbols to Find Substrings . . . . . . . . . . . . . . . . . . . . . . . . 6-11
The .loop/.break/.endloop Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
Nested Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
Built-In Substitution Symbol Functions Used in a Conditional Assembly Code Block . . 6-15
Unique Labels in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
Producing Messages in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-18
Using Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20
Using Recursive Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21
Linker Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
Command File With Linker Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-22
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-26
The Most Common Method of Specifying Section Contents . . . . . . . . . . . . . . . . . . . . . . . . 8-31
Copying a Section From ROM to RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-35
The UNION Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37
Separate Load Addresses for UNION Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-37
Allocate Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39
Memory Directive With Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-40
SECTIONS Directive Definition for Overlays in Figure 8–6 . . . . . . . . . . . . . . . . . . . . . . . . . 8-42
Default Allocation for TMS320C54x Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
Linker Command File, demo.cmd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-63
Output Map File, demo.map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-64
A ROMS Directive Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-17
Map File Output From Example 11–1 Showing Memory Ranges . . . . . . . . . . . . . . . . . . . 11-19
Examples
C–1
C–2
C–3
C–4
C–5
C–6
C–7
C–8
C–9
C–10
C–11
C–12
C–13
C–14
C–15
Assembly Code for Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1
A Linker Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-3
A Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-4
Map File Resulting From Hex Command File in Example C–3 . . . . . . . . . . . . . . . . . . . . . . . C-6
Linker Command File: Method One for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-7
Hex Command File: Method One for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
Linker Command File: Method Two for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
Hex Command File: Method Two for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
C Code for a ’C54x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-9
Linker Command File to Form a Single Boot Section for a ’C54x . . . . . . . . . . . . . . . . . . . C-11
Section Allocation Portion of Map File Resulting From the Command File
in Example C–10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-12
Linker Command for Setting the Boot Routine Selection Word for a ’C54x . . . . . . . . . . . C-14
Hex Command File for Converting a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-16
Map File Resulting From the Command File in Example C–13 . . . . . . . . . . . . . . . . . . . . . C-17
Hex Conversion Utility Output File Resulting From the Command File
in Example C–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-17
Contents
xxi
Notes, Cautions, and Warnings
Notes
Default Section Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Differences in Precedence From Other TMS320 Assemblers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
Labels and Comments in Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
The .byte, .word, .int, .long, .xlong, .string, .pstring, .float, .xfloat, and .field Directives in a
.struct/.endstruct Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13
Ending a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-39
Creating a Listing File (–l Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-53
Directives That Can Appear in a .struct /.endstruct Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-74
Naming Library Members . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
– a and – r Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7
Filling Memory Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24
Binding and Alignment or Named Memory are Incompatible . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-29
UNION and Overlay Page Are Not the Same . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-38
You Cannot Specify Addresses for Sections Within a GROUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39
The PAGE Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-46
Filling Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-55
The TI-Tagged Format Is 16 Bits Wide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
When the –order Option Applies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-13
Sections Generated by the C Compiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-20
Using the –boot Option and the SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-21
Defining the Ranges of Target Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-24
On-Chip Boot Loader Concerns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-29
Valid Entry Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-29
xxii
Running Title—Attribute Reference
Chapter 1
Introduction
The TMS320C54x DSPs are supported by the following assembly language
tools:
Assembler
Archiver
Linker
Absolute lister
Cross reference utility
Hex conversion utility
This chapter shows how these tools fit into the general software tools development flow and gives a brief description of each tool. For convenience, it also
summarizes the C compiler and debugging tools; however, the compiler and
debugger are not shipped with the assembly language tools. For detailed
information on the compiler and debugger and for complete descriptions of the
TMS320C54x devices, refer to books listed in Related Documentation From
Texas Instruments on page vi.
The assembly language tools create and use object files in common object file
format (COFF) to facilitate modular programming. Object files contain separate blocks (called sections) of code and data that you can load into ’C54x
memory spaces. You can program the ’C54x more efficiently if you have a
basic understanding of COFF. Chapter 2, Introduction to Common Object File
Format, discusses this object format in detail.
Topic
Page
1.1
Tools Overview and Development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2
Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Chapter Title—Attribute Reference
1-1
Tools Overview and Development
1.1 Tools Overview and Development
Figure 1–1 shows the assembly language development flow. The shaded
portion highlights the most common development path; the other portions are
optional.
Figure 1–1. TMS320C54x Assembly Language Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
1-2
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Absolute lister
Cross-reference
lister
’C54x
Tools Descriptions
1.2 Tools Descriptions
The C compiler translates C source code into TMS320C54x assembly
language source code. The C compiler is not shipped with the assembly
language tools package.
The assembler translates assembly language source files into machine
language COFF object files. Source files can contain instructions, assembler directives, and macro directives. You can use assembler directives to
control various aspects of the assembly process, such as the source
listing format, data alignment, and section content.
The archiver allows you to collect a group of files into a single archive file.
For example, you can collect several macros into a macro library. The
assembler will search the library and use the members that are called as
macros by the source file. You can also use the archiver to collect a group
of object files into an object library. The linker will include in the library the
members that resolve external references during the link.
The linker combines object files into a single executable COFF object
module. As it creates the executable module, it performs relocation and
resolves external references. The linker accepts relocatable COFF object
files (created by the assembler) as input. It also accepts archiver library
members and output modules created by a previous linker run. Linker
directives allow you to combine object file sections, bind sections or symbols to addresses or within memory ranges, and define or redefine global
symbols.
The absolute lister is a debugging tool. It accepts linked object files as
input and creates .abs files as output. These files can be assembled to
produce a listing that contains absolute rather than relative addresses.
Without the absolute lister, producing such a listing would be tedious and
require many manual operations.
The cross-reference lister uses object files to produce a cross-reference
listing showing symbols, their definition, and their references in the linked
source files.
The TMS320C54x DSP accepts COFF files as input, but most EPROM
programmers do not. The hex conversion utility converts a COFF object
file into TI-tagged, Intel, Motorola, or Tektronix object format. The converted file can be downloaded to an EPROM programmer.
The primary purpose of this development process is to produce a module that
can be executed in a system containing a TMS320C54x device. You can use
one of several debugging tools, including a simulator and emulator, to refine
and correct your code before downloading it to a ’C54x system.
Introduction
1-3
Running Title—Attribute Reference
Chapter 2
Introduction to Common Object File Format
The assembler and linker create object files that can be executed by a
TMS320C54x device. The format for these object files is called common object
file format (COFF).
COFF makes modular programming easier, because it encourages you to
think in terms of blocks of code and data when you write an assembly language
program. These blocks are known as sections. Both the assembler and the
linker provide directives that allow you to create and manipulate sections. This
chapter provides an overview of COFF sections.
Topic
Page
2.1
Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2
How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.3
How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.4
Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.5
Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2.6
Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2.7
Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
For additional information, see Appendix A, which details COFF object file
structure.
Chapter Title—Attribute Reference
2-1
Sections
2.1
Sections
The smallest unit of an object file is called a section. A section is a block of code
or data that will ultimately occupy contiguous space in the memory map. Each
section of an object file is separate and distinct. COFF object files always contain three default sections:
.text section
usually contains executable code
.data section
usually contains initialized data
.bss section
usually reserves space for uninitialized variables
In addition, the assembler and linker allow you to create, name, and link named
sections that are used like the .data, .text, and .bss sections.
There are two basic types of sections:
Initialized sections
contain data or code. The .text and .data sections
are initialized; named sections created with the
.sect assembler directive are also initialized.
Uninitialized sections
reserve space in the memory map for uninitialized
data. The .bss section is uninitialized; named sections created with the .usect assembler directive
are also uninitialized.
Several assembler directives allow you to associate various portions of code
and data with the appropriate sections. The assembler builds these sections
during the assembly process, creating an object file organized as shown in
Figure 2–1.
One of the linker’s functions is to relocate sections into the target memory map;
this function is called allocation. Because most systems contain several types
of memory, using sections can help you use target memory more efficiently.
All sections are independently relocatable; you can place any section into any
allocated block of target memory. For example, you can define a section that
contains an initialization routine and then allocate the routine into a portion of
the memory map that contains ROM.
Figure 2–1 shows the relationship between sections in an object file and a
hypothetical target memory.
2-2
Sections
Figure 2–1. Partitioning Memory Into Logical Blocks
Object File
Target Memory
.bss
RAM
.data
EEPROM
.text
ROM
Introduction to Common Object File Format
2-3
How the Assembler Handles Sections
2.2
How the Assembler Handles Sections
The assembler identifies the portions of an assembly language program that
belong in a section. The assembler has five directives that support this function:
.bss
.usect
.text
.data
.sect
The .bss and .usect directives create uninitialized sections; the .text, .data,
and .sect directives create initialized sections.
Note:
Default Section Directive
If you don’t use any of the sections directives, the assembler assembles
everything into the .text section.
2.2.1
Uninitialized Sections
Uninitialized sections reserve space in ’C54x memory; they are usually allocated into RAM. These sections have no actual contents in the object file; they
simply reserve memory. A program can use this space at runtime for creating
and storing variables.
Uninitialized data areas are built by using the .bss and .usect assembler directives. The .bss directive reserves space in the .bss section. The .usect directive reserves space in a specific uninitialized named section. Each time you
invoke the .bss directive, the assembler reserves more space in the appropriate section. Each time you invoke the .usect directive, the assembler reserves
more space in the specified named section.
The syntax for these directives is:
.bss symbol, size in words [, blocking flag] [, alignment flag]
symbol .usect ”section name ”, size in words [, blocking flag] [, alignment flag]
symbol
2-4
points to the first word reserved by this invocation of the .bss
or .usect directive. The symbol corresponds to the name of
the variable that you’re reserving space for. It can be referenced by any other section and can also be declared as a
global symbol (with the .global assembler directive).
How the Assembler Handles Sections
size in words
is an absolute expression. The .bss directive reserves size
words in the .bss section; the .usect directive reserves size
words in section name.
blocking flag
is an optional parameter. If you specify a value greater than
0 for this parameter, the assembler associates size words
contiguously; the allocated space will not cross a page
boundary, unless size is greater than a page, in which case
the object will start on a page boundary.
alignment flag
is an optional parameter. If you specify a value greater than
0 for this parameter, the section is aligned to a long word
boundary.
section name
tells the assembler which named section to reserve space
in. For more information about named sections, see subsection 2.2.3.
The .text, .data, and .sect directives tell the assembler to stop assembling into
the current section and begin assembling into the indicated section. The .bss
and .usect directives, however, do not end the current section and begin a new
one; they simply escape from the current section temporarily. The .bss and
.usect directives can appear anywhere in an initialized section without affecting its contents.
2.2.2
Initialized Sections
Initialized sections contain executable code or initialized data. The contents
of these sections are stored in the object file and placed in ’C54x memory when
the program is loaded. Each initialized section is independently relocatable
and may reference symbols that are defined in other sections. The linker automatically resolves these section-relative references.
Three directives tell the assembler to place code or data into a section. The
syntaxes for these directives are:
.text [value]
.data [value]
.sect ”section name” [, value]
When the assembler encounters one of these directives, it stops assembling
into the current section (acting as an implied end-current-section command).
It then assembles subsequent code into the designated section until it encounters another .text, .data, or .sect directive. The value, if present, specifies the
starting value of the section program counter. The starting value of the section
program counter can be specified only once; it must be done the first time the
directive for that section is encountered. By default, the SPC starts at 0.
Introduction to Common Object File Format
2-5
How the Assembler Handles Sections
Sections are built through an iterative process. For example, when the assembler first encounters a .data directive, the .data section is empty. The statements following this first .data directive are assembled into the .data section
(until the assembler encounters a .text or .sect directive). If the assembler
encounters subsequent .data directives, it adds the statements following
these .data directives to the statements already in the .data section. This
creates a single .data section that can be allocated contiguously into memory.
2.2.3
Named Sections
Named sections are sections that you create. You can use them like the default
.text, .data, and .bss sections, but they are assembled separately.
For example, repeated use of the .text directive builds up a single .text section
in the object file. When linked, this .text section is allocated into memory as a
single unit. Suppose there is a portion of executable code (perhaps an initialization routine) that you don’t want allocated with .text. If you assemble this
segment of code into a named section, it will be assembled separately from
.text, and you will be able to allocate it into memory separately. You can also
assemble initialized data that is separate from the .data section, and you can
reserve space for uninitialized variables that is separate from the .bss section.
Two directives let you create named sections:
The .usect directive creates sections that are used like the .bss section.
These sections reserve space in RAM for variables.
The .sect directive creates sections, like the default .text and .data
sections, that can contain code or data. The .sect directive creates named
sections with relocatable addresses.
The syntaxes for these directives are:
symbol .usect ”section name”, size in words [, blocking flag] [, alignment flag]
.sect ”section name”
The section name parameter is the name of the section. Section names are
significant to 8 characters. You can create up to 32,767 separate named sections.
Each time you invoke one of these directives with a new name, you create a
new named section. Each time you invoke one of these directives with a name
that was already used, the assembler assembles code or data (or reserves
space) into the section with that name. You cannot use the same names with
different directives. That is, you cannot create a section with the .usect directive and then try to use the same section with .sect.
2-6
How the Assembler Handles Sections
2.2.4
Section Program Counters
The assembler maintains a separate program counter for each section. These
program counters are known as section program counters, or SPCs.
An SPC represents the current address within a section of code or data. Initially, the assembler sets each SPC to 0. As the assembler fills a section with
code or data, it increments the appropriate SPC. If you resume assembling into
a section, the assembler remembers the appropriate SPC’s previous value
and continues incrementing the SPC at that point.
The assembler treats each section as if it began at address 0; the linker relocates each section according to its final location in the memory map.
2.2.5
An Example That Uses Sections Directives
Example 2–1 shows how you can build COFF sections incrementally, using
the sections directives to swap back and forth between the different sections.
You can use sections directives to begin assembling into a section for the first
time, or to continue assembling into a section that already contains code. In
the latter case, the assembler simply appends the new code to the code that
is already in the section.
The format in Example 2–1 is a listing file. Example 2–1 shows how the SPCs
are modified during assembly. A line in a listing file has four fields:
Field 1
contains the source code line counter.
Field 2
contains the section program counter.
Field 3
contains the object code.
Field 4
contains the original source statement.
Introduction to Common Object File Format
2-7
How the Assembler Handles Sections
Example 2–1.Using Sections Directives
2
3
4
5 0000
6 0000 0011
0001 0022
0002 0033
7
8
9
10 0000
11
12
13
14 0003 0123
15
16
17
18 0000
19 0000 100f
20 0001 f010
0002 0001
21 0003 f842
0004 0001’
22
23
24
25 0004
26 0004 00aa
0005 00bb
0006 00cc
27
28
29
30 0000
31 0001
32
33
34
35 0005
36 0005 110a
37 0006 f166
0007 000a
38 0008 f868
0009 0006’
39
40
41
42 0000
43 0000 0011
44 0001 0033
Field 1 Field 2 Field 3
2-8
************************************************
** Assemble an initialized table into .data. **
************************************************
.data
coeff
.word
011h,022h,033h
************************************************
**
Reserve space in .bss for a variable.
**
************************************************
.bss
buffer,10
************************************************
**
Still in .data.
**
************************************************
ptr
.word
0123h
************************************************
**
Assemble code into the .text section.
**
************************************************
.text
add:
LD
0Fh,A
aloop: SUB
#1,A
BC
aloop,AGEQ
************************************************
**
Another initialized table into .data.
**
************************************************
.data
ivals
.word
0AAh, 0BBh, 0CCh
************************************************
** Define another section for more variables. **
************************************************
var2
.usect
”newvars”, 1
inbuf
.usect
”newvars”, 7
************************************************
**
Assemble more code into .text.
**
************************************************
.text
mpy:
LD
0Ah,B
mloop: MPY
#0Ah,B
BC
mloop,BNOV
************************************************
** Define a named section for int. vectors. **
************************************************
.sect
”vectors”
.word
011h, 033h
Field 4
How the Assembler Handles Sections
As Figure 2–2 shows, the file in Example 2–1 creates five sections:
.text
contains ten 16-bit words of object code.
.data
contains seven words of object code.
vectors
is a named section created with the .sect directive; it contains
two words of initialized data.
.bss
reserves ten words in memory.
newvars
is a named section created with the .usect directive; it reserves
eight words in memory.
The second column shows the object code that is assembled into these sections; the first column shows the source statements that generated the object
code.
Figure 2–2. Object Code Generated by the File in Example 2–1
Line Numbers
Object Code
19
20
20
21
21
36
37
37
38
38
100f
f010
0001
f842
0001’
110a
f166
000a
f868
0006’
.text
6
6
6
14
26
26
26
0011
0022
0033
0123
00aa
00bb
00cc
.data
Section
43
44
0011
0033
No data—
ten words
reserved
.bss
10
30
31
No data—
eight words
reserved
newvars
vectors
Introduction to Common Object File Format
2-9
How the Linker Handles Sections
2.3
How the Linker Handles Sections
The linker has two main functions related to sections. First, the linker uses the
sections in COFF object files as building blocks; it combines input sections
(when more than one file is being linked) to create output sections in an executable COFF output module. Second, the linker chooses memory addresses for
the output sections.
Two linker directives support these functions:
The MEMORY directive allows you to define the memory map of a target
system. You can name portions of memory and specify their starting
addresses and their lengths.
The SECTIONS directive tells the linker how to combine input sections
into output sections and where to place these output sections in memory.
It is not always necessary to use linker directives. If you don’t use them, the
linker uses the target processor’s default allocation algorithm described in
Section 8.12, page 8-45. When you do use linker directives, you must specify
them in a linker command file.
Refer to the following sections for more information about linker command files
and linker directives:
Section
Page
8.5
Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
8.7
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
8.8
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-25
8.12 Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
2-10
How the Linker Handles Sections
2.3.1
Default Memory Allocation
Figure 2–3 illustrates the process of linking two files.
Figure 2–3. Combining Input Sections to Form an Executable Object Module
ÉÉÉÉÉ
Program Memory
file1.obj
.text
file 1
.text
.data
file 2
.text
.bss
file 1
.data
table_1
(initialized
named section)
file 2
.data
u_vars
(uninitialized
named section)
file 1
table_1
ÉÉÉÉÉ
ÉÉÉÉÉ
Data Memory
unconfigured
file1
.bss
file2
.bss
file1
U_vars
file2
U_vars
file2.obj
file 2
table_1
.text
file2
FFT
.data
.bss
table_1
(initialized
named section)
unused
ÉÉÉÉÉ
ÉÉÉÉÉ
unconfigured
unused
u_vars
(uninitialized
named section)
FFT
(initialized
named section)
In Figure 2–3, file1.obj and file2.obj have been assembled to be used as linker
input. Each contains the .text, .data, and .bss default sections; in addition,
each contains named sections. The executable output module shows the
combined sections. The linker combines file1.text with file2.text to form one
.text section, then combines the .data sections, then the .bss sections, and finally places the named sections at the end. The memory map shows how the
sections are put into memory; by default, the linker begins at address 080h and
places the sections one after the other as shown.
Introduction to Common Object File Format
2-11
How the Linker Handles Sections
2.3.2
Placing Sections in the Memory Map
Figure 2–3 illustrates the linker’s default methods for combining sections.
Sometimes you may not want to use the default setup. For example, you may
not want all of the .text sections to be combined into a single .text section. Or
you may want a named section placed where the .data section would normally
be allocated. Most memory maps contain various types of memory (RAM,
ROM, EPROM, etc.) in varying amounts; you may want to place a section in
a specific type of memory.
For further explanation of section placement within the memory map, see the
MEMORY directive discussion in Section 8.7 beginning on page 8-21, and the
SECTIONS directive discussion in Section 8.8 beginning on page 8-25.
2-12
Relocation
2.4
Relocation
The assembler treats each section as if it began at address 0. All relocatable
symbols (labels) are relative to address 0 in their sections. Of course, all sections can’t actually begin at address 0 in memory, so the linker relocates sections by:
Allocating them into the memory map so that they begin at the appropriate
address
Adjusting symbol values to correspond to the new section addresses
Adjusting references to relocated symbols to reflect the adjusted symbol
values
The linker uses relocation entries to adjust references to symbol values. The
assembler creates a relocation entry each time a relocatable symbol is referenced. The linker then uses these entries to patch the references after the
symbols are relocated. Example 2–2 contains a code segment for the ’C54x
that generates relocation entries.
Example 2–2.Code That Generates Relocation Entries
1
2 0000
3 0000 f073
0001 0004’
4
5 0002 f020
0003 0000!
6
7 0004 f7e0 Y:
.ref X
.text
B
Y
; Generates a Relocation Entry
LD
; Generates a Relocation Entry
#X, A
RESET
In Example 2–2, both symbols X and Y are relocatable. Y is defined in the .text
section of this module; X is defined in another module. When the code is
assembled, X has a value of 0 (the assembler assumes all undefined external
symbols have values of 0), and Y has a value of 3 (relative to address 0 in the
.text section). The assembler generates two relocation entries, one for X and
one for Y. The reference to X is an external reference (indicated by the ! character in the listing). The reference to Y is to an internally defined relocatable
symbol (indicated by the ’ character in the listing).
Introduction to Common Object File Format
2-13
Relocation
After the code is linked, suppose that X is relocated to address 7100h. Suppose also that the .text section is relocated to begin at address 7200h; Y now
has a relocated value of 7204h. The linker uses the two relocation entries to
patch the two references in the object code:
f073 B Y
0004’
f020 LD #X,A
0000!
becomes
becomes
f073
7204’
f020
7100!
Each section in a COFF object file has a table of relocation entries. The table
contains one relocation entry for each relocatable reference in the section. The
linker usually removes relocation entries after it uses them. This prevents the
output file from being relocated again (if it is relinked or when it is loaded). A
file that contains no relocation entries is an absolute file (all its addresses are
absolute addresses). If you want the linker to retain relocation entries, invoke
the linker with the –r option.
2-14
Runtime Relocation
2.5
Runtime Relocation
At times, you may want to load code into one area of memory and run it in
another. For example, you may have performance-critical code in a ROMbased system. The code must be loaded into ROM, but it would run faster in
RAM.
The linker provides a simple way to handle this. Using the SECTIONS directive, you can optionally direct the linker to allocate a section twice: first to set
its load address, and again to set its run address. Use the load keyword for the
load address and the run keyword for the run address.
The load address determines where a loader will place the raw data for the
section. Any references to the section (such as labels in it) refer to its run
address. The application must copy the section from its load address to its run
address; this does not happen automatically simply because you specify a
separate run address. For an example that illustrates how to move a block of
code at runtime, see Example 8–6, page 8-35.
If you provide only one allocation (either load or run) for a section, the section
is allocated only once and will load and run at the same address. If you provide
both allocations, the section is actually allocated as if it were two different sections of the same size.
Uninitialized sections (such as .bss) are not loaded, so the only significant
address is the run address. The linker allocates uninitialized sections only
once: if you specify both run and load addresses, the linker warns you and
ignores the load address.
For a complete description of runtime relocation, see Section 8.9, page 8-33.
Introduction to Common Object File Format
2-15
Loading a Program
2.6
Loading a Program
The linker produces executable COFF object modules. An executable object
file has the same COFF format as object files that are used as linker input; the
sections in an executable object file, however, are combined and relocated
into target memory.
To run a program, the data in the executable object module must be transferred, or loaded, into target system memory. Several methods can be used
for loading a program, depending on the execution environment. Two common
situations are described below.
The TMS320C54x debugging tools, including the software simulator,
XDS emulator, and software development system, have built-in loaders.
Each of these tools contains a LOAD command that invokes a loader; the
loader reads the executable file and copies the program into target
memory.
You can use the hex conversion utility (hex500, which is shipped as part
of the assembly language package) to convert the executable COFF
object module into one of several object file formats. You can then use the
converted file with an EPROM programmer to burn the program into an
EPROM.
2-16
Symbols in a COFF File
2.7
Symbols in a COFF File
A COFF file contains a symbol table that stores information about symbols in
the program. The linker uses this table when it performs relocation. Debugging
tools can also use the symbol table to provide symbolic debugging.
2.7.1
External Symbols
External symbols are symbols that are defined in one module and referenced
in another module. You can use the .def, .ref, or .global directives to identify
symbols as external:
Defined (.def)
Defined in the current module and used in another module
Referenced (.ref) Referenced in the current module, but defined in another
module
Global (.global)
May be either of the above
The following code segment illustrates these definitions.
x:
ADD
B
.global
.global
#56h, A
y
x
y
;
;
;
;
Define x
Reference y
DEF of x
REF of y
The .global definition of x says that it is an external symbol defined in this
module and that other modules can reference x. The .global definition of y says
that it is an undefined symbol that is defined in another module.
The assembler places both x and y in the object file’s symbol table. When the
file is linked with other object files, the entry for x defines unresolved references to x from other files. The entry for y causes the linker to look through the
symbol tables of other files for y’s definition.
The linker must match all references with corresponding definitions. If the
linker cannot find a symbol’s definition, it prints an error message about the
unresolved reference. This type of error prevents the linker from creating an
executable object module.
Introduction to Common Object File Format
2-17
Symbols in a COFF File
2.7.2
The Symbol Table
The assembler always generates an entry in the symbol table when it encounters an external symbol (both definitions and references). The assembler also
creates special symbols that point to the beginning of each section; the linker
uses these symbols to relocate references to other symbols.
The assembler does not usually create symbol table entries for any symbols
other than those described above, because the linker does not use them. For
example, labels are not included in the symbol table unless they are declared
with .global. For symbolic debugging purposes, it is sometimes useful to have
entries in the symbol table for each symbol in a program. To accomplish this,
invoke the assembler with the –s option.
2-18
Chapter 3
Assembler Description
The assembler translates assembly language source files into machine language object files. These files are in common object file format (COFF), which
is discussed in Chapter 2 and Appendix A. Source files can contain the following assembly language elements:
Assembler directives
described in Chapter 4
Assembly language instructions
described in Chapter 5
Macro directives
described in Chapter 6
Topic
Page
3.1
Assembler Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.3
Invoking the Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.4
Naming Alternate Directories for Assembler Input . . . . . . . . . . . . . . . 3-6
3.5
Source Statement Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.6
Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.7
Character Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3.8
Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.9
Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.10 Source Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23
3.11 Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
Assembler Description
3-1
Assembler Overview
3.1 Assembler Overview
This two-pass assembler does the following:
Processes the source statements in a text file to produce a relocatable
object file
Produces a source listing (if requested) and provides you with control over
this listing
Allows you to segment your code into sections and maintain an SPC (sec-
tion program counter) for each section of object code
Defines and references global symbols and appends a cross-reference
listing to the source listing (if requested)
Assembles conditional blocks
Supports macros, allowing you to define macros inline or in a library
3-2
Assembler Development Flow
3.2 Assembler Development Flow
Figure 3–1 illustrates the assembler’s role in the assembly language development flow. The assembler accepts assembly language source files as input,
whether created by the assembler itself or by the C compiler.
Figure 3–1. Assembler Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Absolute lister
Cross-reference
lister
’C54x
Assembler Description
3-3
Invoking the Assembler
3.3 Invoking the Assembler
To invoke the assembler, enter the following:
asm500 [input file [object file [listing file ] ] ] [–options ]
3-4
asm500
is the command that invokes the assembler.
input file
names the assembly language source file. If you do not supply
an extension, the assembler uses the default extension .asm. If
you do not supply an input filename, the assembler will prompt
you for one.
object file
names the object file that the assembler creates. If you do not
supply an extension, the assembler uses .obj as a default. If you
do not supply an object file, the assembler creates a file that uses
the input filename with the .obj extension.
listing file
names the optional listing file that the assembler can create. If
you do not supply a listing filename, the assembler does not create one unless you use the –l (lowercase L) option. In this case,
the assembler uses the input filename. If you do not supply an
extension, the assembler uses .lst as a default.
options
identifies the assembler options that you want to use. Options
are not case-sensitive and can appear anywhere on the command line, following the command. Precede each option with a
hyphen. Single-letter options without parameters can be combined: for example, –lc is equivalent to –l –c. Options that have
parameters, such as –i, must be specified separately.
–a
creates an absolute listing. When you use –a, the assembler does not produce an object file. The –a option is used
in conjunction with the absolute lister.
–c
makes case insignificant in the assembly language files.
For example, –c will make the symbols ABC and abc
equivalent. If you do not use this option, case is significant
(default).
–d
–dname [=value] sets the name symbol. This is equivalent to inserting name .set [value] at the beginning of the
assembly file. If value is omitted, the symbol is set to 1. For
more information, see subsection 3.8.3, page 3-16.
Invoking the Assembler
–i
specifies a directory where the assembler can find files
named by the .copy, .include, or .mlib directives. The format of the –i option is –ipathname. You can specify up to
10 directories in this manner; each pathname must be
preceded by the –i option. For more information, see
subsection 3.4.1, page 3-6.
–l
(lowercase L) produces a listing file.
–q
(quiet) suppresses the banner and all progress information.
–s
puts all defined symbols in the object file’s symbol table.
The assembler usually puts only global symbols into the
symbol table. When you use –s, symbols defined as
labels or as assembly-time constants are also placed in
the table.
–x
produces a cross-reference table and appends it to the
end of the listing file; also adds cross-reference information to the object file for use by the cross-reference utility.
If you do not request a listing file, the assembler creates
one anyway.
Assembler Description
3-5
Naming Alternate Directories for Assembler Input
3.4 Naming Alternate Directories for Assembler Input
The .copy, .include, and .mlib directives tell the assembler to use code from
external files. The .copy and .include directives tell the assembler to read
source statements from another file, and the .mlib directive names a library
that contains macro functions. Chapter 4, contains examples of the .copy,
.include, and .mlib directives. The syntax for these directives is:
.copy ”filename”
.include ”filename”
.mlib ”filename”
The filename names a copy/include file that the assembler reads statements
from or a macro library that contains macro definitions. The filename may be
a complete pathname, a partial pathname, or a filename with no path information. The assembler searches for the file in:
1) The directory that contains the current source file. The current source file
is the file being assembled when the .copy, .include, or .mlib directive is
encountered.
2) Any directories named with the – i assembler option
3) Any directories set with the environment variable A_DIR
You can augment the assembler’s directory search algorithm by using the – i
assembler option or the A_DIR environment variable.
3.4.1
–i Assembler Option
The – i assembler option names an alternate directory that contains copy/
include files or macro libraries. The format of the – i option is as follows:
asm500 –ipathname source filename
You can use up to 10 – i options per invocation; each – i option names one pathname. In assembly source, you can use the .copy, .include, or .mlib directive
without specifying path information. If the assembler doesn’t find the file in the
directory that contains the current source file, it searches the paths designated
by the – i options.
3-6
Naming Alternate Directories for Assembler Input
For example, assume that a file called source.asm is in the current directory;
source.asm contains the following directive statement:
.copy ”copy.asm”
Assume that the file is stored in the following directory:
DOS or OS/2
c:\320tools\files\copy.asm
UNIX
/320tools/files/copy.asm
Operating System
Enter
DOS or OS/2
asm500 –ic:\320tools\files source.asm
UNIX
asm500 –i/320tools/files source.asm
The assembler first searches for copy.asm in the current directory because
source.asm is in the current directory. Then the assembler searches in the
directory named with the – i option.
3.4.2
A_DIR Environment Variable
An environment variable is a system symbol that you define and assign a string
to. The assembler uses the environment variable A_DIR to name alternate
directories that contain copy/include files or macro libraries. The command for
assigning the environment variable is as follows:
Operating System
Enter
DOS or OS/2
set A_DIR= pathname;another pathname ...
UNIX
setenv A_DIR ”pathname;another pathname ...”
The pathnames are directories that contain copy/include files or macro
libraries. You can separate the pathnames with a semicolon or with blanks. In
assembly source, you can use the .copy, .include, or .mlib directive without
specifying path information. If the assembler doesn’t find the file in the directory that contains the current source file or in directories named by – i, it
searches the paths named by the environment variable.
For example, assume that a file called source.asm contains these statements:
.copy ”copy1.asm”
.copy ”copy2.asm”
Assembler Description
3-7
Naming Alternate Directories for Assembler Input
Assume that the files are stored in the following directories:
DOS or OS/2
c:\320tools\files\copy1.asm
c:\dsys\copy2.asm
UNIX
/320tools/files/copy1.asm
/dsys/copy2.asm
You could set up the search path with the commands shown in the following
table:
Operating System
Enter
DOS or OS/2
set A_DIR=c:\dsys
asm500 –ic:\320tools\files source.asm
UNIX
setenv A_DIR ”/dsys”
asm500 –i/320tools/files source.asm
The assembler first searches for copy1.asm and copy2.asm in the current
directory because source.asm is in the current directory. Then the assembler
searches in the directory named with the –i option and finds copy1.asm.
Finally, the assembler searches the directory named with A_DIR and finds
copy2.asm.
Note that the environment variable remains set until you reboot the system or
reset the variable by entering one of these commands:
3-8
Operating System
Enter
DOS or OS/2
set A_DIR=
UNIX
unsetenv A_DIR
Source Statement Format
3.5 Source Statement Format
TMS320C54x assembly language source programs consist of source statements that can contain assembler directives, assembly language instructions,
macro directives, and comments. Source statement lines can be as long as
the source file format allows, but the assembler reads up to 200 characters per
line. If a statement contains more than 200 characters, the assembler truncates the line and issues a warning.
The following are examples of source statements:
SYM1
Begin:
.set
LD
.word
2
#SYM1, AR1
016h
; Symbol SYM1 = 2.
; Load AR1 with 2.
; Initialize word (016h).
A source statement can contain four ordered fields. The general syntax for
source statements is as follows:
[label ] [:]
mnemonic
[operand list ]
[;comment ]
Follow these guidelines:
All statements must begin with a label, a blank, an asterisk, or a semicolon.
Labels are optional; if used, they must begin in column 1.
One or more blanks must separate each field. Tab characters are equiva-
lent to blanks.
Comments are optional. Comments that begin in column 1 can begin with
an asterisk or a semicolon (* or ;), but comments that begin in any other
column must begin with a semicolon.
3.5.1
Label Field
Labels are optional for all assembly language instructions and for most (but
not all) assembler directives. When used, a label must begin in column 1 of a
source statement. A label can contain up to 32 alphanumeric characters (A – Z,
a – z, 0 – 9, _, and $). Labels are case sensitive, and the first character cannot
be a number. A label can be followed by a colon (:); the colon is not treated as
part of the label name. If you don’t use a label, the first character position must
contain a blank, a semicolon, or an asterisk.
When you use a label, its value is the current value of the section program
counter (the label points to the statement it’s associated with). If, for example,
you use the .word directive to initialize several words, a label would point to
the first word. In the following example, the label Start has the value 40h.
Assembler Description
3-9
Source Statement Format
.
.
.
9
10
.
.
.
003F
0040
0041
0042
000A
0003
0007
.
.
.
.
.
.
; Assume some other code was assembled.
Start: .word 0Ah,3,7
A label on a line by itself is a valid statement. The label assigns the current
value of the section program counter to the label; this is equivalent to the following directive statement:
label .set $
; $ provides the current value of the SPC.
When a label appears on a line by itself, it points to the instruction on the next
line (the SPC is not incremented):
3
4
3.5.2
0050
0050
0003
Here:
.word 3
Mnemonic Field
The mnemonic field follows the label field. The mnemonic field must not start
in column 1; if it does, it will be interpreted as a label. The mnemonic field can
contain one of the following opcodes:
-
3.5.3
Machine-instruction mnemonic (such as ABS, MPYU, STH)
Assembler directive (such as .data, .list, .set)
Macro directive (such as .macro, .var, .mexit)
Macro call
Operand Field
The operand field is list of operands that follow the mnemonic field. An operand
can be a constant (see Section 3.6, page 3-12), a symbol (see Section 3.8,
page 3-15), or a combination of constants and symbols in an expression (see
Section 3.9, page 3-19). You must separate operands with commas.
- Operand Prefixes for Instructions
The assembler allows you to specify that a constant, symbol, or expression should be used as an address, an immediate value, or an indirect
value. The following rules apply to the operands of instructions.
J
# prefix — the operand is an immediate value. If you use the # sign
as a prefix, the assembler treats the operand as an immediate value.
This is true even when the operand is a register or an address; the
assembler treats the address as a value instead of using the contents
of the address. This is an example of an instruction that uses an operand with the # prefix:
Label:
3-10
ADD #123,B
Source Statement Format
The operand #123 is an immediate value. The assembler adds 123
(decimal) to the contents of accumulator B.
J
* prefix — the operand is an indirect address. If you use the * sign
as a prefix, the assembler treats the operand as an indirect address;
that is, it uses the contents of the operand as an address. This is an
example of an instruction that uses an operand with the * prefix:
Label:
LD *AR4,A
The operand *AR4 specifies an indirect address. The assembler goes
to the address specified by the contents of register AR4 and then
moves the contents of that location to accumulator A.
- Immediate Value for Directives
The immediate value mode is primarily used with instructions. In some
cases, it can also be used with the operands of directives.
It is not usually necessary to use the immediate value mode for directives.
Compare the following statements:
ADD #10, A
.byte 10
In the first statement, the immediate value mode is necessary to tell the
assembler to add the value 10 to accumulator A. In the second statement,
however, immediate value is not used; the assembler expects the operand
to be a value and initializes a byte with the value 10.
3.5.4
Comment Field
A comment can begin in any column and extends to the end of the source line.
A comment can contain any ASCII character, including blanks. Comments are
printed in the assembly source listing, but they do not affect the assembly.
A source statement that contains only a comment is valid. If it begins in column
1, it can start with a semicolon (;) or asterisk (*). Comments that begin anywhere else on the line must begin with a semicolon. The asterisk identifies a
comment only if it appears in column 1.
Assembler Description
3-11
Constants
3.6 Constants
The assembler supports six types of constants:
Binary integer
Octal integer
Decimal integer
Hexadecimal integer
Character
Assembly-time
The assembler maintains each constant internally as a 32-bit quantity.
Constants are not sign-extended. For example, the constant 0FFH is equal to
00FF (base 16) or 255 (base 10); it does not equal –1.
3.6.1
Binary Integers
A binary integer constant is a string of up to 16 binary digits (0s and 1s)
followed by the suffix B (or b). If fewer than 16 digits are specified, the
assembler right-justifies the value and zero-fills the unspecified bits. These are
examples of valid binary constants:
3.6.2
00000000B
Constant equal to 010 or 016
0100000b
Constant equal to 3210 or 2016
01b
Constant equal to 110 or 116
11111000B
Constant equal to 24810 or 0F816
Octal Integers
An octal integer constant is a string of up to 6 octal digits (0 through 7) followed
by the suffix Q (or q). These are examples of valid octal constants:
3.6.3
10Q
Constant equal to 810 or 816
100000Q
Constant equal to 32,76810 or 8,00016
226q
Constant equal to 15010 or 9616
Decimal Integers
A decimal integer constant is a string of decimal digits, ranging from –32,768
to 65,535. These are examples of valid decimal constants:
3-12
1000
Constant equal to 100010 or 3E816
–32768
Constant equal to –32,76810 or 8,00016
25
Constant equal to 2510 or 1916
Constants
3.6.4
Hexadecimal Integers
A hexadecimal integer constant is a string of up to four hexadecimal digits followed by the suffix H (or h). Hexadecimal digits include the decimal values 0–9
and the letters A–F and a–f. A hexadecimal constant must begin with a decimal
value (0–9). If fewer than four hexadecimal digits are specified, the assembler
right-justifies the bits. These are examples of valid hexadecimal constants:
3.6.5
78h
Constant equal to 12010 or 007816
0FH
Constant equal to 1510 or 000F16
37ACh
Constant equal to 14,25210 or 37AC16
Character Constants
A character constant is a string of one or two characters enclosed in single
quotes. The characters are represented internally as 8-bit ASCII characters.
Two consecutive single quotes are required to represent each single quote
that is part of a character constant. A character constant consisting only of two
single quotes is valid and is assigned the value 0. If only one character is specified, the assembler right-justifies the bits. These are examples of valid character constants:
’a’
Represented internally as 6116
’C’
Represented internally as 4316
’’’D’
Represented internally as 274416
Note the difference between character constants and character strings (Section 3.7, page 3-14, discusses character strings). A character constant represents a single integer value; a string is a list of characters.
3.6.6
Assembly-Time Constants
If you use the .set directive to assign a value to a symbol, the symbol becomes
a constant. To use this constant in expressions, the value that is assigned to
it must be absolute. For example:
shift3
.set
LD
3
#shift3,A
You can also use the .set directive to assign symbolic constants for register
names. In this case, the symbol becomes a synonym for the register:
AuxR1
.set AR1
MVMM AuxR1, SP
Assembler Description
3-13
Character Strings
3.7 Character Strings
A character string is a string of characters enclosed in double quotes. Double
quotes that are part of character strings are represented by two consecutive
double quotes. The maximum length of a string varies and is defined for each
directive that requires a character string. Characters are represented internally as 8-bit ASCII characters.
These are examples of valid character strings:
”sample program”
defines the 14-character string sample program.
”PLAN ””C”””
defines the 8-character string PLAN ”C”.
Character strings are used for the following:
3-14
Filenames, as in .copy ”filename”
Section names, as in .sect ”section name”
Data initialization directives, as in .byte ”charstring”
Operands of .string directives
Symbols
3.8 Symbols
Symbols are used as labels, constants, and substitution symbols. A symbol
name is a string of up to 32 alphanumeric characters (A – Z, a – z, 0 – 9, $,
and _ ). The first character in a symbol cannot be a number, and symbols cannot contain embedded blanks. The symbols you define are case sensitive; for
example, the assembler recognizes ABC, Abc, and abc as three unique
symbols. You can override case sensitivity with the – c assembler option. A
symbol is valid only during the assembly in which it is defined, unless you use
the .global directive to declare it as an external symbol.
3.8.1
Labels
Symbols used as labels become symbolic addresses associated with locations in the program. Labels used locally within a file must be unique. Mnemonic opcodes and assembler directive names (without the ”.” prefix) are valid
label names.
Labels can also be used as the operands of .global, .ref, .def, or .bss directives;
for example:
label2
3.8.2
.global
label1
NOP
ADD
B
label1,B
label2
Symbolic Constants
Symbols can be set to constant values. By using constants, you can equate
meaningful names with constant values. The .set and .struct/.tag/.endstruct
directives enable you to set constants to symbolic names. Symbolic constants
cannot be redefined. The following example shows how these directives can
be used:
K
.set
maxbuf .set
1024
2*K
item
;constant definitions
.struct
.int
value
.int
delta
i_len .endstruct
;item structure definition
;constant offsets value = 0
;constant offsets delta = 1
array .tag
.bss
;array declaration
item
array, i_len*K
The assembler also has several predefined symbolic constants; these are
discussed in the next section.
Assembler Description
3-15
Symbols
3.8.3
Defining Symbolic Constants (–d Option)
The –d option equates a constant value with a symbol. The symbol can then
be used in place of a value in assembly source. The format of the –d option
is as follows:
asm500 –dname=[value ]
The name is the name of the symbol you want to define. The value is the value
you want to assign to the symbol. If the value is omitted, the symbol will be set
to 1.
Within assembler source, you may test the symbol with the following directives:
Type of Test
Directive Usage
Existence
.if $isdefed(”name”)
Nonexistence
.if $isdefed(”name”) = 0
Equal to value
.if name = value
Not equal to value
.if name != value
Note that the argument to the $isdefed built-in function must be enclosed in
quotes. The quotes cause the argument to be interpreted literally rather than
as a substitution symbol.
3.8.4
Predefined Symbolic Constants
The assembler has several predefined symbols, including the following:
$, the dollar sign character, represents the current value of the section
program counter (SPC).
Register symbols, including AR0 – AR7
Symbols that are defined by using the .mmregs directive
3-16
Symbols
3.8.5
Substitution Symbols
Symbols can be assigned a string value (variable). This enables you to alias
character strings by equating them to symbolic names. Symbols that represent character strings are called substitution symbols. When the assembler
encounters a substitution symbol, its string value is substituted for the symbol
name. Unlike symbolic constants, substitution symbols can be redefined.
A string can be assigned to a substitution symbol anywhere within a program;
for example:
.asg
.asg
.asg
”errct”,
”*+”,
”*–”,
AR2
INC
DEC
;register 2
;indirect auto-increment
;indirect auto-decrement
When you are using macros, substitution symbols are important because
macro parameters are actually substitution symbols that are assigned a macro
argument. The following code shows how substitution symbols are used in
macros:
add2
.macro
ADDRA,ADDRB ;add2 macro definition
LD ADDRA, A
ADD ADDRB, A
STL A, ADDRB
.endm
*add2 invocation
add2 LOC1, LOC2
;add ”LOC1” argument to a
;second argument ”LOC2”.
For more information about macros, see Chapter 6.
3.8.6
Local Labels
Local labels are special labels whose scope and effect are temporary. A local
label has the form $n, where n is a decimal digit in the range 0–9. For example,
$4 and $1 are valid local labels.
Normal labels must be unique (they can be declared only once), and they can
be used as constants in the operand field. Local labels, however, can be
undefined and defined again.
A local label can be undefined or reset in one of four ways:
By using the .newblock directive
By changing sections (using a .sect, .text, or .data directive)
By entering an include file (specified by the .include or .copy directive)
By leaving an include file (specified by the .include or .copy directive)
Assembler Description
3-17
Symbols
This is an example of code that declares and uses a local label legally:
Label1:
$1
$2
$1
LD ADDRA, A
SUB ADDRB, A
BC $1, ALT
LD ADDRB, A
B $2
LD ADDRA, A
ADD ADDRC, A
.newblock
BC $1, ALT
STL A, ADDRC
NOP
;
;
;
;
;
;
;
;
;
;
;
Load Address A to Accumulator A.
Subtract Address B.
If less than zero, branch to $1;
otherwise, load ADDRB to A
and branch to $2.
$1: load ADDRA to Accumulator A.
$2: add ADDRC.
Undefine $1 so it can be used
again.
If less than zero, branch to $1.
Store ACC low in ADDRC.
The following code uses a local label illegally:
Label1:
$1
$2
$1
LD ADDRA, A
SUB ADDRB, A
BC $1, ALT
LD ADDRB, A
B $2
LD ADDRA, A
ADD ADDRC, A
BC $1, ALT
STL A, ADDRC
NOP
;
;
;
;
;
;
;
;
;
;
Load Address A to Accumulator A.
Subtract Address B.
If less than zero, branch to $1;
otherwise, load ADDRB To A
and Branch to $2.
$1: Load ADDRA To Accumulator A.
$2: Add ADDRC.
If less than 0, branch to $1.
Store Acc low in ADDRC.
WRONG: $1 is multiply defined.
Local labels are especially useful in macros. If a macro contains a normal label
and is called more than once, the assembler issues a multiple-definition error.
If you use a local label and .newblock within a macro, however, the local label
is used and reset each time the macro is expanded.
Up to ten local labels can be in effect at one time. After you undefine a local
label, you can define it and use it again. Local labels do not appear in the object
code symbol table.
3-18
Expressions
3.9 Expressions
An expression is a constant, a symbol, or a series of constants and symbols
separated by arithmetic operators. The range of valid expression values is
–32,768 to 32,767. Three main factors influence the order of expression evaluation:
Parentheses
Expressions that are enclosed in parentheses are
always evaluated first.
8 / (4 / 2) = 4, but 8 / 4 / 2 = 1
You cannot substitute braces ( { } ) or brackets ( [ ] )
for parentheses.
Precedence groups
The ’C54x assembler uses the same order of precedence as the C language does as summarized
in Table 3–1. This differs from the order of precedence of the ’C54x assembler. When parentheses
do not determine the order of expression evaluation, the highest precedence operation is evaluated first.
8 + 4 / 2 = 10 (4 / 2 is evaluated first)
Left-to-right evaluation When parentheses and precedence groups do not
determine the order of expression evaluation, the
expressions are evaluated as happens in the C
language.
8 / 4*2 = 4 , but 8 / (4*2) = 1
3.9.1
Operators
Table 3–1 lists the operators that can be used in expressions.
Note:
Differences in Precedence From Other TMS320 Assemblers
Some other TMS320 processors use a different order of precedence than
the TMS320C54x, and occasionally different results may be produced from
the same source code for this reason. The ’C54x uses the same order of precedence as the C language.
Assembler Description
3-19
Expressions
Table 3–1. Operators Used in Expressions (Precedence)
Symbols
Operators
Evaluation
+
–
~
Unary plus, minus, 1s complement
Right to left
*
/
%
Multiplication, division, modulo
Left to right
+
–
Addition, subtraction
Left to right
Left shift, right shift
Left to right
Less than, LT or equal, greater than,
GT or equal
Left to right
!=, =[=]
Not equal to, equal to
Left to right
&
Bitwise AND
Left to right
^
Bitwise exclusive OR
Left to right
|
Bitwise OR
Left to right
<<
<
Note:
3.9.2
>>
<=
>
>=
Unary +, –, and * have higher precedence than the binary forms.
Expression Overflow and Underflow
The assembler checks for overflow and underflow conditions when arithmetic
operations are performed at assembly time. It issues a Value Truncated warning whenever an overflow or underflow occurs. The assembler does not check
for overflow or underflow in multiplication.
3.9.3
Well-Defined Expressions
Some assembler directives require well-defined expressions as operands.
Well-defined expressions contain only symbols or assembly-time constants
that are defined before they are encountered in the expression. The evaluation
of a well-defined expression must be absolute.
This is an example of a well-defined expression:
1000h+X
where x was previously defined as an absolute symbol.
3-20
Expressions
3.9.4
Conditional Expressions
The assembler supports relational operators that can be used in any expression; they are especially useful for conditional assembly. Relational operators
include the following:
=
!=
<
>
Equal to
Not equal to
Less than
Greater than
==
Equal to
=
>=
Less than or equal to
Greater than or equal to
Conditional expressions evaluate to 1 if true and 0 if false; they can be used
only on operands of equivalent types, for example, absolute value compared
to absolute value, but not absolute value compared to relocatable value.
3.9.5
Relocatable Symbols and Legal Expressions
Table 3–2 summarizes valid operations on absolute, relocatable, and external
symbols. An expression cannot contain multiplication or division by a relocatable or external symbol. An expression cannot contain unresolved symbols
that are relocatable to other sections.
Symbols or registers that have been defined as global with the .global directive
can also be used in expressions; in Table 3–2, these symbols and registers are
referred to as external.
Relocatable registers can be used in expressions; the addresses of these registers are relocatable with respect to the register section they were defined in,
unless they have been declared as external.
Table 3–2. Expressions With Absolute and Relocatable Symbols
If A is...
and
If B is...
, then
A + B is...
and
A – B is...
absolute
absolute
absolute
absolute
absolute
external
external
illegal
absolute
relocatable
relocatable
illegal
relocatable
absolute
relocatable
relocatable
relocatable
relocatable
illegal
absolute †
relocatable
external
illegal
illegal
external
absolute
external
external
external
relocatable
illegal
illegal
external
external
illegal
illegal
† A and B must be in the same section; otherwise, this is illegal.
Assembler Description
3-21
Expressions
Following are examples of expressions that use relocatable and absolute symbols. These examples use four symbols that are defined in the same section:
.global extern_1
intern_1: .word ’”D’
LAB1: .set 2
intern_2
;
;
;
;
Defined in an external module
Relocatable, defined in current module
LAB1 = 2
Relocatable, defined in current module
Example 1
The statements in this example use an absolute symbol, LAB1 (which is
defined above to have a value of 2). The first statement loads the value 51
into the accumulator:
LD
LD
#LAB1
#LAB1
+
+
((4+3) * 7), A
4 + (3*7), A
;
;
ACC A = 51
ACC A = 27
Example 2
All legal expressions can be reduced to one of two forms:
relocatable symbol ± absolute symbol
or
absolute value
Unary operators can be applied only to absolute values; they cannot be
applied to relocatable symbols. Expressions that cannot be reduced to
contain only one relocatable symbol are illegal. The first statement in the
following example is valid; the statements that follow it are invalid.
LD
LD
LD
LD
LD
extern_1 – 10, B
10–extern_1, B
–(intern_1), B
extern_1/10, B
intern_1 + extern_1, B
;
;
;
;
;
Legal
Can’t negate reloc. symbol
Can’t negate reloc. symbol
/ isn’t additive operator
Multiple relocatables
Example 3
The first statement below is legal; although intern_1 and intern_2 are
relocatable, their difference is absolute because they’re in the same
section. Subtracting one relocatable symbol from another reduces the
expression to relocatable symbol + absolute value. The second statement
is illegal because the sum of two relocatable symbols is not an absolute
value.
LD intern_1 – intern_2 + extern_1, B
LD intern_1 + intern_2 + extern_1, B
; Legal
; Illegal
Example 4
An external symbol’s placement is important to expression evaluation.
Although the statement below is similar to the first statement in the previous example, it is illegal because of left-to-right operator precedence; the
assembler attempts to add intern_1 to extern_1.
LD intern_1 + extern_1 – intern_2, B
3-22
; Illegal
Source Listings
3.10 Source Listings
A source listing shows source statements and the object code they produce.
To obtain a listing file, invoke the assembler with the –l (lowercase L) option.
Two banner lines, a blank line, and a title line are at the top of each source listing page. Any title supplied by a .title directive is printed on the title line; a page
number is printed to the right of the title. If you don’t use the .title directive, the
name of the source file is printed. The assembler inserts a blank line below the
title line.
Each line in the source file may produce a line in the listing file that shows a
source statement number, an SPC value, the object code assembled, and the
source statement. A source statement may produce more than one word of
object code. The assembler lists the SPC value and object code on a separate
line for each additional word. Each additional line is listed immediately
following the source statement line.
Field 1: Source Statement Number
Line Number
The source statement number is a decimal. The assembler numbers
source lines as it encounters them in the source file; some statements increment the line counter but are not listed. (For example,
.title statements and statements following a .nolist are not listed.)
The difference between two consecutive source line numbers indicates the number of intervening statements in the source file that are
not listed.
Include File Letter
The assembler may precede a line with a letter; the letter indicates
that the line is assembled from an included file.
Nesting Level Number
The assembler may precede a line with a number; the number indicates the nesting level of macro expansions or loop blocks.
Field 2: Section Program Counter
This field contains the section program counter (SPC) value, which
is hexadecimal. All sections (.text, .data, .bss, and named sections)
maintain separate SPCs. Some directives do not affect the SPC and
leave this field blank.
Assembler Description
3-23
Source Listings
Field 3: Object Code
This field contains the hexadecimal representation of the object
code. All machine instructions and directives use this field to list
object code. This field also indicates the relocation type by appending one of the following characters to the end of the field:
!
undefined external reference
’
.text relocatable
”
.data relocatable
+
.sect relocatable
–
.bss, .usect relocatable
Field 4: Source Statement Field
This field contains the characters of the source statement as they
were scanned by the assembler. The assembler accepts a maximum
line length of 200 characters. Spacing in this field is determined by
the spacing in the source statement.
Example 3–1 shows an assembler listing with each of the four fields identified.
3-24
Source Listings
Example 3–1.Assembler Listing
A
A
A
A
A
A
A
A
1
1
1
1
1
1
1
2
3
4
5
6
1
2
3
4
5
6
7
8
7
8
9
10 0000
11 0000 F073
0001 0008+
12 0002 F073
0003 0000!
13 0004 F073
0005 0000!
14 0006 F073
0007 0000!
15
16
17 0000
18 0000 F073
0001 0000!
19 0002 F073
0003 0000!
20 0004 F073
0005 0000!
21 0006 F073
0007 0000!
22
23
24
25 0008
0008
0009
000a
000b
000c
F7B9
EA00
F4A7
E837
F6BB
Field 1 Field 2 Field 3
.global
.global
.global
.global
RESET, INT0, INT1, INT2
TINT, RINT, XINT, USER
ISR0, ISR1, ISR2
time, rcv, xmt, proc
.copy
”init.inc”
initmac
.macro
* initialize macro
SSBX OVM
; disable oflow
LD #0, DP
; dp = 0
LD #7, ARP ; arp = ar7
LD #037h, A ; acc = 03fh
RSBX INTM
; enable ints
.endm
*********************************************
*
Reset and interrupt vectors
*
*********************************************
.sect ”reset”
RESET: B init
INT0:
B
ISR0
INT1:
B
ISR1
INT2:
B
ISR2
*
TINT
.sect ”ints”
B time
RINT
B
rcv
XINT
B
xmt
USER
B
proc
*********************************************
*
Initialize processor.
*
*********************************************
init: initmac
* initialize macro
SSBX OVM
; disable oflow
LD #0, DP
; dp = 0
LD #7, ARP ; arp = ar7
LD #037h, A ; acc = 03fh
RSBX INTM
; enable ints
Field 4
Assembler Description
3-25
Cross-Reference Listings
3.11 Cross-Reference Listings
A cross-reference listing shows symbols and their definitions. To obtain a
cross-reference listing, invoke the assembler with the –x option or use the
.option directive. The assembler will append the cross-reference to the end of
the source listing.
Example 3–2.Assembler Cross-Reference Listing
LABEL
VALUE
DEFN
INT0
INT1
INT2
ISR0
ISR1
ISR2
RESET
RINT
TINT
VECS
XINT
init
0002+
0004+
0006+
REF
REF
REF
0000+
0002+
0000+
0006+
0004+
0000+
14
15
16
REF
2
2
2
4
4
4
13
24
23
26
27
34
2
3
3
3
13
Label
column contains each symbol that was defined or referenced
during the assembly.
Value
column contains a 4-digit hexadecimal number, which is the
value assigned to the symbol or a name that describes the
symbol’s attributes. A value may also be followed by a character that describes the symbol’s attributes. Table 3–3 lists these
characters and names.
Definition
(DEFN) column contains the statement number that defines
the symbol. This column is blank for undefined symbols.
Reference
(REF) column lists the line numbers of statements that reference the symbol. A blank in this column indicates that the symbol was never used.
Table 3–3. Symbol Attributes
3-26
14
15
16
Character or Name
Meaning
REF
External reference (.global symbol)
UNDF
Undefined
’
Symbol defined in a .text section
”
Symbol defined in a .data section
+
Symbol defined in a .sect section
–
Symbol defined in a .bss or .usect section
Chapter 4
Assembler Directives
Assembler directives supply data to the program and control the assembly
process. Assembler directives enable you to do the following:
Assemble code and data into specified sections
Reserve space in memory for uninitialized variables
Control the appearance of listings
Initialize memory
Assemble conditional blocks
Define global variables
Specify libraries from which the assembler can obtain macros
Examine symbolic debugging information
This chapter is divided into two parts: the first part (Sections 4.1 through 4.10)
describes the directives according to function, and the second part
(Section 4.11) is an alphabetical reference.
Topic
Page
4.1
Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.2
Compatibility With TMS320C1x/C2x/C2xx/C5x Assembler
Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.3
Directives That Define Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
4.4
Directives That Initialize Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
4.5
Directives That Align the Section Program Counter . . . . . . . . . . . . . 4-15
4.6
Directives That Format the Output Listing . . . . . . . . . . . . . . . . . . . . . . 4-17
4.7
Directives That Reference Other Files . . . . . . . . . . . . . . . . . . . . . . . . . 4-19
4.8
Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
4.9
Assembly-Time Symbol Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
4.10 Miscellaneous Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
4.11 Directives Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
Chapter Title—Attribute Reference
4-1
Directives Summary
4.1 Directives Summary
Table 4–1 summarizes the assembler directives.
Besides the assembler directives documented here, the TMS320C54x C
compiler uses several directives for symbolic debugging and absolute listing.
Unlike other directives, symbolic debugging directives are not used in most
assembly language programs. Appendix B discusses these directives; they
are not discussed in this chapter. Absolute listing directives are not entered by
the user but are inserted into the source program by the absolute lister. They
are discussed in Chapter 9.
Note:
Labels and Comments in Syntax
Any source statement that contains a directive may also contain a label and
a comment. Labels begin in the first column (and they are the only thing that
should appear in the first column) and comments should be preceded by a
semicolon or a star if the comment is the only thing in the line. To improve
readability, labels and comments are not shown as part of the directive
syntax.
Table 4–1. Assembler Directives Summary
(a) Directives that define sections
Mnemonic and Syntax
Description
Page
.bss symbol, size in words [, blocking]
[, alignment ]
Reserve size words in the .bss (uninitialized data)
section
4-28
.data
Assemble into the .data (initialized data) section
4-35
.sect ”section name”
Assemble into a named (initialized) section
4-68
.text
Assemble into the .text (executable code) section
4-77
symbol .usect ”section name”, size in words
[, blocking]
Reserve size words in a named (uninitialized) section
4-79
4-2
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(b) Directives that initialize constants (data and memory)
Mnemonic and Syntax
Description
Page
.bes size in bits
Reserve size bits in the current section; note that a
label points to the last addressable word in the
reserved space
4-70
.byte value1 [, ... , valuen ]
Initialize one or more successive bytes in the current
section
4-31
.field value [, size in bits]
Initialize a variable-length field
4-41
.float value [, ... , valuen ]
Initialize one or more 32-bit, IEEE single-precision,
floating-point constants
4-44
.int value1 [, ... , valuen ]
Initialize one or more 16-bit integers
4-50
.long value1 [, ... , valuen ]
Initialize one or more 32-bit integers
4-55
.space size in bytes;
Reserve size bits in the current section; note that a
label points to the beginning of the reserved space
4-70
.string ”string1 ” [, ... , ”stringn ”]
Initialize one or more text strings
4-72
.pstring ”string1” [, ... ,”stringn ”]
Initialize one or more text strings (packed).
4-72
.xfloat value1 [, ...,valuen ]
Initialize one or more 32-bit integers, IEEE single–
precision, floating point constants, but do not align
on long word boundary.
4-44
.xlong value1 [, ...,valuen ]
Initialize one or more 32-bit integers, but do not
align on long word boundary.
4-55
.word value1 [, ... , valuen ]
Initialize one or more 16-bit integers.
4-50
(c) Directives that align the section program counter (SPC)
Mnemonic and Syntax
Description
Page
.align [size in words]
Align the SPC on a word boundary specified by the
parameter, which must be a power of 2, or default to
page boundary. Aligns to word (1), even (2), etc.
4-25
Assembler Directives
4-3
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(d) Directives that format the output listing
Mnemonic and Syntax
Description
Page
.drlist
Enable listing of all directive lines (default)
4-36
.drnolist
Suppress listing of certain directive lines
4-36
.fclist
Allow false conditional code block listing (default)
4-40
.fcnolist
Suppress false conditional code block listing
4-40
.length page length
Set the page length of the source listing
4-52
.list
Restart the source listing
4-53
.mlist
Allow macro listings and loop blocks (default)
4-59
.mnolist
Suppress macro listings and loop blocks
4-59
.nolist
Stop the source listing
4-53
.option {B | L | M | R | T | W | X}
Select output listing options
4-64
.page
Eject a page in the source listing
4-66
.sslist
Allow expanded substitution symbol listing
4-71
.ssnolist
Suppress expanded substitution symbol listing
(default)
4-71
.tab size
Set tab size
4-76
.title ”string”
Print a title in the listing page heading
4-78
.width page width
Set the page width of the source listing
4-52
4-4
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(e) Directives that reference other files
Mnemonic and Syntax
Description
Page
.copy [”]filename[”]
Include source statements from another file
4-32
.def symbol1 [, ... , symboln ]
Identify one or more symbols that are defined in the
current module and may be used in other modules
4-45
.global symbol1 [, ... , symboln ]
Identify one or more global (external) symbols
4-45
.include [”]filename[”]
Include source statements from another file
4-32
.mlib [”]filename[”]
Define macro library
4-57
.ref symbol1 [, ... , symboln ]
Identify one or more symbols that are used in the current module but may be defined in another module
4-45
Mnemonic and Syntax
Description
Page
.break [well-defined expression]
End .loop assembly if condition is true. The .break
construct is optional.
4-56
.else well-defined expression
Assemble code block if the .if condition is false. The
.else construct is optional.
4-48
.elseif well-defined expression
Assemble code block if the .if condition is false and the
.elseif condition is true. The .elseif construct is
optional.
4-48
.endif
End .if code block
4-48
.endloop
End .loop code block
4-56
.if well-defined expression
Assemble code block if the condition is true
4-48
.loop [well-defined expression]
Begin repeatable assembly of a code block
4-56
(f) Directives that control conditional assembly
Assembler Directives
4-5
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(g) Directives that define symbols at assembly time
Mnemonic and Syntax
Description
Page
.asg [”]character string[”],
substitution symbol
Assign a character string to a substitution symbol
4-26
.endstruct
End structure definition
4-73
.equ/.set
Equate a value with a symbol
4-69
.eval well-defined expression,
substitution symbol
Perform arithmetic on numeric substitution
symbols
4-26
.label symbol
Define a load-time relocatable label in a section
4-51
.struct
Begin structure definition
4-73
.tag
Assign structure attributes to a label
4-73
Mnemonic and Syntax
Description
Page
.emsg string
Send user-defined error messages to the output
device
4-37
.end
End program
4-39
.mmregs
Enter memory-mapped registers into the symbol table
4-60
.mmsg string
Send user-defined messages to the output device
4-37
.newblock
Undefine local labels
4-63
.sblock ”section name”[, ... , ”section name”]
Designates sections for blocking
4-67
.wmsg string
Send user-defined warning messages to the output
device
4-37
(h) Miscellaneous directives
4-6
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives
4.2 Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives
This section explains how the TMS320C54x assembler directives differ from
the TMS320C1x/C2x/C2xx/C5x assembler directives.
The ’C54x .long and .float directives place the most significant word of the
value at the lower address, while the ’C1x/C2x/C2xx/C5x assembler directives place the least significant word at the lower address. Also, the ’C54x
.long and .float directives automatically align the SPC on an even word
boundary, while the C1x/C2x/C2xx/C5x assembler directives do not.
Without arguments, the ’C54x and the ’C1x/C2x/C2xx/C5x assemblers
both align the SPC at the next 128-word boundary. However, the ’C54x
.align directive also accepts a constant argument, which must be a power
of 2, and this argument causes alignment of the SPC on that word boundary. The .align directive for the ’C1x/C2x/C2xx/C5x assembler does not
accept this constant argument.
The .even directive, which causes alignment at word boundaries when
used with the ’C1x/C2x/C2xx/C5x assembler, is not supported by the
’C54x assembler. The .align directive with an argument of 1 replaces the
.even directive.
The .field directive for the ’C54x packs fields into words starting at the most
significant bit of the word. The ’C1x/C2x/C2xx/C5x assembler .field directive places fields into words starting at the least significant bit of the word.
The .field directive for the ’C54x handles values of 1 to 32 bits, contrasted
with the ’C1x/C2x/C2xx/C5x assembler which handles values of 1 to 16
bits. With the ’C54x assembler, objects that are 16 bits or larger start on
a word boundary and are placed with the most significant bits at the lower
address.
The ’C54x .bss and .usect directives have an additional flag called the
alignment flag which specifies alignment on an even word boundary. The
’C1x/C2x/C2xx/C5x .bss and .usect directives do not use this flag.
The .string directive for the ’C54x initializes one character per word, unlike
the ’C1x/C2x/C2xx/C5x assembler .string, which packs two characters
per word. The new .pstring directive packs two characters per word, as the
former .string did.
Assembler Directives
4-7
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives
The following directives are new with the ’C54x assembler and are not
supported by the ’C1x/C2x/C2xx/C5x assembler:
4-8
Directive
Usage
.xfloat
Same as .float without automatic alignment
.xlong
Same as .long without automatic alignment
.pstring
Same as .string, but packs two chars/word
Directives That Define Sections
4.3 Directives That Define Sections
These directives associate portions of an assembly language program with
the appropriate sections:
.bss reserves space in the .bss section for uninitialized variables.
.data identifies portions of code in the .data section. The .data section
usually contains initialized data.
.sect defines initialized named sections and associates subsequent code
or data with that section. A section defined with .sect can contain code or
data.
.text identifies portions of code in the .text section. The .text section
usually contains executable code.
.usect reserves space in an uninitialized named section. The .usect
directive is similar to the .bss directive, but it allows you to reserve space
separately from the .bss section.
Chapter 2 discusses COFF sections in detail.
Example 4–1 shows how you can use sections directives to associate code
and data with the proper sections. This is an output listing; column 1 shows line
numbers, and column 2 shows the SPC values. (Each section has its own program counter, or SPC.) When code is first placed in a section, its SPC equals
0. When you resume assembling into a section after other code is assembled,
the section’s SPC resumes counting as if there had been no intervening code.
The directives in Example 4–1 perform the following tasks:
.text
initializes words with the values 1, 2, 3, 4, 5, 6, 7, and 8.
.data
initializes words with the values 9, 10, 11, 12, 13, 14, 15,
and 16.
var_defs
initializes words with the values 17 and 18.
.bss
reserves 19 words.
xy
reserves 20 words.
The .bss and .usect directives do not end the current section or begin new sections; they reserve the specified amount of space, and then the assembler
resumes assembling code or data into the current section.
Assembler Directives
4-9
Directives That Define Sections
Example 4–1.Sections Directives
1
2
3
4 0000
5 0000 0001
0001 0002
6 0002 0003
0003 0004
7
8
9
10
11 0000
12 0000 0009
0001 000A
13 0002 000B
0003 000C
14
15
16
17
18
19 0000
20 0000 0011
0001 0012
21
22
23
24
25 0004
26 0004 000D
0005 000E
27 0000
28 0006 000F
0007 0010
29
30
31
32
33 0004
34 0004 0005
0005 0006
35 0000
36 0006 0007
0007 0008
4-10
**************************************************
*
Start assembling into the .text section
*
**************************************************
.text
.word
1,2
.word
3,4
**************************************************
*
Start assembling into the .data section
*
**************************************************
.data
.word
9, 10
.word
11, 12
**************************************************
*
Start assembling into a named,
*
*
initialized section, var_defs
*
**************************************************
.sect
”var_defs”
.word
17, 18
**************************************************
*
Resume assembling into the .data section
*
**************************************************
.data
.word
13, 14
.bss
.word
sym, 19
15, 16
; Reserve space in .bss
; Still in .data
**************************************************
*
Resume assembling into the .text section
*
**************************************************
.text
.word
5, 6
usym
.usect
.word
”xy”, 20
7, 8
; Reserve space in xy
; Still in .text
Directives That Initialize Constants
4.4 Directives That Initialize Constants
Several directives assemble values for the current section:
- The .bes and .space directives reserve a specified number of bits in the
current section. The assembler fills these reserved bits with 0s.
You can reserve a specified number of words by multiplying the number of
bits by 16.
J
When you use a label with .space, it points to the first word that
contains reserved bits.
J
When you use a label with .bes, it points to the last word that contains
reserved bits.
Figure 4–1 shows the .space and .bes directives. Assume the following
code has been assembled for this example:
1
2
3
4 0000
0001
5 0002
6 0004
7 0006
8 0007
** .space and .bes directives
0100
0200
Res_1:
000f
Res_2:
00ba
.word
100h, 200h
.space
.word
.bes
.byte
17
15
20
0BAh
Res_1 points to the first word in the space reserved by .space. Res_2
points to the last word in the space reserved by .bes.
Figure 4–1. The .space and .bes Directives
Res_1 = 02h
17 bits
reserved
20 bits
reserved
Res_2 = 06h
- .byte places one or more 8-bit values into consecutive words of the current
section. This directive is similar to .word, except that the width of each
value is restricted to 8 bits.
Assembler Directives
4-11
Directives That Initialize Constants
The .field directive places a single value into a specified number of bits
in the current word. With .field, you can pack multiple fields into a single
word; the assembler does not increment the SPC until a word is filled.
Figure 4–2 shows how fields are packed into a word. For this example,
assume the following code has been assembled; notice that the SPC
doesn’t change for the first three fields (the fields are packed into the same
word):
4
5
6
7
0000
0000
0000
0001
0002
8 0003
0004
6000
6400
6440
0123
4000
0000
1234
.field
.field
.field
.field
3, 3
8, 6
16, 5
01234h,20
.field
01234h,32
Figure 4–2. The .field Directive
15 14 13
0 1 1
3 bits
15
12 11 10 9 8 7
0 1 1 0 0 1 0 0 0
0
.field
0
3,3
.field
8,6
6 bits
15
6 5 4 3 2
0
0 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0
.field
16,5
5 bits
15
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
.field
01234h,20
.field
01234h,32
15
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15
0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
.float and .xfloat calculate the single-precision (32-bit) IEEE floating-
point representation of a single floating-point value and store it in two consecutive words in the current section. The most significant word is stored
first. The .float directive automatically aligns to the long word boundary,
and .xfloat does not.
4-12
Directives That Initialize Constants
.int and .word place one or more 16-bit values into consecutive words in
the current section.
.long and .xlong place 32-bit values into consecutive 2-word blocks in the
current section. The most significant word is stored first. The .long directive automatically aligns to a long word boundary, and the .xlong directive
does not.
.string and .pstring place 8-bit characters from one or more character
strings into the current section. The .string directive is similar to .byte, placing an 8-bit character in each consecutive word of the current section. The
.pstring also has a width of 8 bits but packs two characters into a word. For
.pstring, the last word in a string is padded with null characters (0) if necessary.
Note:
The .byte, .word, .int, .long, .xlong, .string, .pstring, .float,
.xfloat, and .field Directives in a .struct/.endstruct Sequence
The .byte, .word, .int, .long, .xlong, .string, .pstring, .float, .xfloat. and .field
directives do not initialize memory when they are part of a .struct/.endstruct
sequence; rather, they define a member’s size. For more information about
the .struct/.endstruct directives, see Section 4.9, page 4-21.
Figure 4–3 compares the .byte, .int, .long, .xlong, .float, .xfloat, .word, and
.string directives. For this example, assume that the following code has been
assembled:
1 0000
0001
2 0002
3 0003
0004
4 0006
0007
5 0008
6 0009
000a
7 000c
000d
8 000e
000f
0010
0011
00aa
00bb
0ccc
0eee
efff
eeee
ffff
dddd
3fff
ffac
3fff
ffac
0068
0065
006c
0070
.byte
0AAh, 0BBh
.word
.xlong
0CCCh
0EEEEFFFh
.long
0EEEEFFFFh
.int
.xfloat
0DDDDh
1.99999
.float
1.99999
.string
”help”
Assembler Directives
4-13
Directives That Initialize Constants
Figure 4–3. Initialization Directives
Code
Word
15
0
0
A
0
A
2
0
C
C
C
3, 4
0
E
E
E
E
F
F
6, 7
E
E
E
E
F
F
F
8
D
D
D
D
9, a
3
F
F
F
F
F
A
C
.xfloat 1.99999
c, d
3
F
F
F
F
F
A
C
.float
e, f
0
0
6
8
0
0
6
5
.string ”help”
0, 1
15
0
0
0
B
h
10, 11
0
0
6
4-14
.byte
OAAh, OBBh
.word
OCCCh
F
.xlong
0EEEEFFFh
F
.long
EEEEFFFFh
.int
DDDDh
e
C
l
B
0
0
7
0
p
1.99999
Directives That Align the Section Program Counter
4.5 Directives That Align the Section Program Counter
The .align directive aligns the SPC at a 1-word to 128-word boundary. This
ensures that the code following the directive begins on an x-word or page
boundary. If the SPC is already aligned at the selected boundary, it is not
incremented. Operands for the .align directive must equal a power of 2
between 20 and 216 (although directives beyond 27 are not meaningful). For
example:
Operand of 1
2
aligns SPC to word boundary
aligns SPC to long word / even boundary
128 aligns SPC to page boundary
The .align directive with no operands defaults to 128, that is, to a page
boundary.
Figure 4–4 demonstrates the .align directive. Assume that the following code
has been assembled:
1 0000 4000
2 0000 4160
3
4 0002 0045
0003 0072
0004 0072
0005 006f
0006 0072
0007 0063
0008 006e
0009 0074
5
6 0100 0004
.field
.field
.align
.string
2, 3
11, 8
2
”Errorcnt”
.align
.byte
4
Assembler Directives
4-15
Directives That Align the Section Program Counter
Figure 4–4. The .align Directive
(a) Result of .align 2
(a) Current
SPC =
00h
00h
2 words
02h
(b) New SPC =
02h after
assembling
a .align 2
directive
(b) Result of .align without an argument
80h
(a) Current
SPC =
88h
4-16
128
words
100h
(b) New SPC =
100h after
assembling
a .align
directive
Directives That Format the Output Listing
4.6 Directives That Format the Output Listing
The following directives format the listing file:
The .drlist directive causes printing of the directive lines to the listing; the
.drnolist directive turns it off. You can use the .drnolist directive to
suppress the printing of the following directives:
.asg
.break
.emsg
.eval,
.fclist
.fcnolist
.length
.mlist
.mmsg
.mnolist
.sslist
.ssnolist
.var
.width
.wmsg
You can use the .drlist directive to turn the listing on again.
The source code contains a listing of false conditional blocks that do not
generate code. The .fclist and .fcnolist directives turn this listing on and
off. You can use the .fclist directive to list false conditional blocks exactly
as they appear in the source code. You can use the .fcnolist directive to
list only the conditional blocks that are actually assembled.
The .length directive controls the page length of the listing file. You can
use this directive to adjust listings for various output devices.
The .list and .nolist directives turn the output listing on and off. You can
use the .nolist directive to stop the assembler from printing selected
source statements in the listing file. Use the .list directive to turn the listing
on again.
The source code contains a listing of macro expansions and loop blocks.
The .mlist and .mnolist directives turn this listing on and off. You can use
the .mlist directive to print all macro expansions and loop blocks to the listing, and the .mnolist directive to suppress this listing.
The .option directive controls certain features in the listing file. This
directive has the following operands:
B
limits the listing of .byte directives to one line.
L
limits the listing of .long directives to one line.
M
turns off macro expansions in the listing.
R
resets the B, M, T, and W options.
T
limits the listing of .string directives to one line.
W
limits the listing of .word directives to one line.
X
produces a symbol cross-reference listing. (You can also obtain
a cross-reference listing by invoking the assembler with the
–x option.)
The .page directive causes a page eject in the output listing.
Assembler Directives
4-17
Directives That Format the Output Listing
The .sslist and .ssnolist directives allow and suppress substitution sym-
bol expansion listing. These directives are useful for debugging the expansion of substitution symbols.
The .tab directive defines tab size.
The .title directive supplies a title that the assembler prints at the top of
each page.
The .width directive controls the page width of the listing file. You can use
this directive to adjust listings for various output devices.
4-18
Directives That Reference Other Files
4.7 Directives That Reference Other Files
These directives supply information for or about other files:
The .copy and .include directives tell the assembler to begin reading
source statements from another file. When the assembler finishes reading
the source statements in the copy/include file, it resumes reading source
statements from the current file. The statements read from a copied file are
printed in the listing file; the statements read from an included file are not
printed in the listing file.
The .def directive identifies a symbol that is defined in the current module
and that can be used by another module. The assembler includes the symbol in the symbol table.
The .global directive declares a symbol external so that it is available to
other modules at link time. (For more information about global symbols,
see Section 2.7.1, page 2-17.) The .global directive does double duty,
acting as a .def for defined symbols and as a .ref for undefined symbols.
The linker will resolve an undefined global symbol only if it is used in the
program.
The .mlib directive supplies the assembler with the name of an archive
library that contains macro definitions. When the assembler encounters
a macro that is not defined in the current module, it searches for it in the
macro library specified with .mlib.
The .ref directive identifies a symbol that is used in the current module but
defined in another module. The assembler marks the symbol as an undefined external symbol and enters it in the object symbol table so that the
linker can resolve its definition.
Assembler Directives
4-19
Conditional Assembly Directives
4.8 Conditional Assembly Directives
Conditional assembly directives enable you to instruct the assembler to
assemble certain sections of code according to a true or false evaluation of an
expression. Two sets of directives allow you to assemble conditional blocks of
code:
The .if /.elseif /.else/.endif directives tell the assembler to conditionally
assemble a block of code according to the evaluation of an expression.
.if expression
marks the beginning of a conditional block and
assembles code if the .if condition is true.
.elseif expression
marks a block of code to be assembled if the .if
conditiion is false and .elseif is true.
.else
marks a block of code to be assembled if the .if
condition is false.
.endif
marks the end of a conditional block and terminates the block.
The .loop /.break/.endloop directives tell the assembler to repeatedly
assemble a block of code according to the evaluation of an expression.
.loop expression
marks the beginning a repeatable block of code.
.break expression
tells the assembler to continue to repeatedly
assemble when the .break expression is false, and
to go to the code immediately after .endloop when
the expression is true.
.endloop
marks the end of a repeatable block.
The assembler supports several relational operators that are useful for conditional expressions. For more information about relational operators, see subsection 3.9.4, page 3-21.
4-20
Assembly-Time Symbol Directives
4.9 Assembly-Time Symbol Directives
Assembly-time symbol directives equate meaningful symbol names to constant values or strings.
The .asg directive assigns a character string to a substitution symbol. The
value is stored in the substitution symbol table. When the assembler
encounters a substitution symbol, it replaces the symbol with its character
string value. Substitution symbols can be redefined.
.asg
”10, 20, 30, 40”, coefficients
.byte coefficients
The .eval directive evaluates an expression, translates the results into a
character, and assigns the character string to a substitution symbol. This
directive is most useful for manipulating counters:
.asg
.loop
.byte
.break
.eval
.endloop
1 , x
x*10h
x = 4
x+1, x
The .label directive defines a special symbol that refers to the loadtime
address within the current section. This is useful when a section loads at
one address but runs at a different address. For example, you may want
to load a block of performance-critical code into slower off-chip memory
to save space, and move the code to high-speed on-chip memory to run.
The .set and .equ directives set a constant value to a symbol. The symbol
is stored in the symbol table and cannot be refined. For example:
bval
.set
0100h
.byte bval, bval*2, bval+12
B
bval
The .set and .equ directives produce no object code. The two directives
are identical and can be used interchangeably.
Assembler Directives
4-21
Assembly-Time Symbol Directives
The .struct /.endstruct directives set up C-like structure definitions, and
the .tag directive assigns the C-like structure characteristics to a label.
The .struct /.endstruct directives allow you to organize your information
into structures, so that similar elements can be grouped together. Element
offset calculation is then left up to the assembler. The .struct/.endstruct
directives do not allocate memory. They simply create a symbolic template
that can be used repeatedly.
The .tag directive assigns a label to a structure. This simplifies the symbolic representation and also provides the ability to define structures that
contain other structures. The .tag directive does not allocate memory, and
the structure tag (stag) must be defined before it’s used.
type
X
Y
T_LEN
.struct
.int
.int
.endstruct
COORD .tag type
ADD
; structure tag definition
; declare COORD (coordinate)
COORD.Y, A
.bss COORD, T_LEN ; actual memory allocation
4-22
Miscellaneous Directives
4.10 Miscellaneous Directives
These directives enable miscellaneous functions or features:
The .end directive terminates assembly. It should be the last source
statement of a program. This directive has the same effect as an
end-of-file.
The .mmregs directive defines symbolic names for the memory-mapped
register. Using .mmregs is the same as executing a .set for all
memory-mapped registers—for example, greg .set 4—and makes it
unnecessary to define these symbols. See Table 4–2, page 4-60, for a list
of memory-mapped registers.
The .newblock directive resets local labels. Local labels are symbols of
the form $n, where n is a decimal digit. They are defined when they appear
in the label field. Local labels are temporary labels that can be used as
operands for jump instructions. The .newblock directive limits the scope
of local labels by resetting them after they are used. For more information
about local labels, see subsection 3.8.6, page 3-17.
The .sblock directive designates sections for blocking. Blocking is an
address alignment mechanism similar to page alignment, but weaker. A
blocked section is guaranteed not to cross a page boundary (128 words)
if it is smaller than a page, or to start on a page boundary if it is larger than
a page. Note that this directive allows specification of blocking for initialized sections only, not uninitialized sections declared with .usect or the
.bss section. The section names may or may not be enclosed in quotes.
These three directives enable you to define your own error and warning
messages:
The .emsg directive sends error messages to the standard output device.
The .emsg directive generates errors in the same manner as the
assembler, incrementing the error count and preventing the assembler
from producing an object file.
The .mmsg directive sends assembly-time messages to the standard
output device. The .mmsg directive functions in the same manner as the
.emsg and .wmsg directives but does not set the error count or the warning
count. It does not affect the creation of the object file.
The .wmsg directive sends warning messages to the standard output
device. The .wmsg directive functions in the same manner as the .emsg
directive but increments the warning count, rather than the error count. It
does not affect the creation of the object file.
Assembler Directives
4-23
Directives Reference
4.11 Directives Reference
The remainder of this chapter is a reference. Generally, the directives are
organized alphabetically, one directive per page; however, related directives
(such as .if /.else/.endif) are presented together on one page. Following is an
alphabetical table of contents for the directives reference:
Directive
4-24
Page
Directive
Page
.align . . . . . . . . . . . . . . . . . . . . .
.asg . . . . . . . . . . . . . . . . . . . . . .
.bes . . . . . . . . . . . . . . . . . . . . . .
.break . . . . . . . . . . . . . . . . . . . .
.bss . . . . . . . . . . . . . . . . . . . . . .
4-25
4-26
4-70
4-56
4-28
.long . . . . . . . . . . . . . . . . . . . . . .
.loop . . . . . . . . . . . . . . . . . . . . . .
.mlib . . . . . . . . . . . . . . . . . . . . . .
.mlist . . . . . . . . . . . . . . . . . . . . .
.mmregs. . . . . . . . . . . . . . . . . . .
4-55
4-56
4-57
4-59
4-60
.byte . . . . . . . . . . . . . . . . . . . . . .
.copy . . . . . . . . . . . . . . . . . . . . .
.data . . . . . . . . . . . . . . . . . . . . . .
.def . . . . . . . . . . . . . . . . . . . . . . .
.drlist . . . . . . . . . . . . . . . . . . . . .
4-31
4-32
4-35
4-45
4-36
.mmsg . . . . . . . . . . . . . . . . . . . .
.mnolist . . . . . . . . . . . . . . . . . . .
.newblock . . . . . . . . . . . . . . . . .
.nolist . . . . . . . . . . . . . . . . . . . . .
.option . . . . . . . . . . . . . . . . . . . .
4-37
4-59
4-63
4-53
4-64
.drnolist . . . . . . . . . . . . . . . . . . .
.else . . . . . . . . . . . . . . . . . . . . . .
.elseif . . . . . . . . . . . . . . . . . . . . .
.emsg . . . . . . . . . . . . . . . . . . . . .
.end . . . . . . . . . . . . . . . . . . . . . .
4-36
4-48
4-48
4-37
4-39
.page . . . . . . . . . . . . . . . . . . . . .
.pstring . . . . . . . . . . . . . . . . . . . .
.ref . . . . . . . . . . . . . . . . . . . . . . .
.sblock . . . . . . . . . . . . . . . . . . . .
.sect . . . . . . . . . . . . . . . . . . . . . .
4-66
4-31
4-45
4-67
4-68
.endif . . . . . . . . . . . . . . . . . . . . .
.endloop . . . . . . . . . . . . . . . . . .
.endstruct . . . . . . . . . . . . . . . . .
.equ . . . . . . . . . . . . . . . . . . . . . .
.eval . . . . . . . . . . . . . . . . . . . . . .
4-48
4-56
4-73
4-69
4-26
.set . . . . . . . . . . . . . . . . . . . . . . .
.space . . . . . . . . . . . . . . . . . . . .
.sslist . . . . . . . . . . . . . . . . . . . . .
.ssnolist . . . . . . . . . . . . . . . . . . .
.string . . . . . . . . . . . . . . . . . . . . .
4-69
4-70
4-71
4-71
4-72
.fclist . . . . . . . . . . . . . . . . . . . . .
.fcnolist . . . . . . . . . . . . . . . . . . .
.field . . . . . . . . . . . . . . . . . . . . . .
.float . . . . . . . . . . . . . . . . . . . . . .
.global . . . . . . . . . . . . . . . . . . . .
4-40
4-40
4-41
4-44
4-45
.struct . . . . . . . . . . . . . . . . . . . . .
.tab . . . . . . . . . . . . . . . . . . . . . . .
.tag . . . . . . . . . . . . . . . . . . . . . . .
.text . . . . . . . . . . . . . . . . . . . . . .
.title . . . . . . . . . . . . . . . . . . . . . .
4-73
4-76
4-73
4-77
4-78
.if . . . . . . . . . . . . . . . . . . . . . . . .
.include . . . . . . . . . . . . . . . . . . .
.int. . . . . . . . . . . . . . . . . . . . . . . .
.label . . . . . . . . . . . . . . . . . . . . .
.length . . . . . . . . . . . . . . . . . . . .
.list . . . . . . . . . . . . . . . . . . . . . . .
4-48
4-32
4-50
4-51
4-52
4-53
.usect . . . . . . . . . . . . . . . . . . . . .
.width . . . . . . . . . . . . . . . . . . . . .
.wmsg . . . . . . . . . . . . . . . . . . . .
.word . . . . . . . . . . . . . . . . . . . . .
.xfloat . . . . . . . . . . . . . . . . . . . . .
.xlong . . . . . . . . . . . . . . . . . . . . .
4-79
4-52
4-37
4-50
4-44
4-55
Align SPC on a 128-Word Boundary
Syntax
Description
.align
.align [size in words]
The .align directive aligns the section program counter (SPC) on the next
boundary, depending on the size in words parameter. The size may be any
power of 2, although only certain values are useful for alignment. An operand
of 128 aligns the SPC on the next page boundary, and this is the default if no
size is given. The assembler assembles words containing null values (0) up
to the next x-word boundary.
Operand of 1
2
aligns SPC to word boundary
aligns SPC to long word / even boundary
128 aligns SPC to page boundary
Using the .align directive has two effects:
The assembler aligns the SPC on an x-word boundary within the current
section.
The assembler sets a flag that forces the linker to align the section so that
individual alignments remain intact when a section is loaded into memory.
Example
This example shows several types of alignment, including .align 2, .align 4, and
a default .align.
1 0000 0004
2
3 0002 0045
0003 0072
0004 0072
0005 006F
0006 0072
0007 0063
0008 006E
0009 0074
4
5 0080 6000
6 0080 6A00
7
8 0082 6000
9
10 0088 5000
11
12 0100 0004
.byte
.align
.string
.align
.field
.field
.align
.field
.align
.field
.align
.byte
4
2
”Errorcnt”
3,3
5,4
2
3,3
8
5,4
4
Assembler Directives
4-25
.asg/.eval
Syntax
Description
Assign Character Strings to Substitution Symbols
.asg [ ” ]character string[ ” ], substitution symbol
.eval well-defined expression, substitution symbol
The .asg directive assigns character strings to substitution symbols. Substitution symbols are stored in the substitution symbol table. The .asg directive can
be used in many of the same ways as the .set directive, but while .set assigns
a constant value (which cannot be redefined) to a symbol, .asg assigns a character string (which can be redefined) to a substitution symbol.
The assembler assigns the character string to the substitution symbol.
The quotation marks are optional. If there are no quotation marks, the
assembler reads characters up to the first comma and removes leading
and trailing blanks. In either case, a character string is read and assigned
to the substitution symbol.
The substitution symbol is a required parameter that must be a valid
symbol name. The substitution symbol may be 32 characters long and
must begin with a letter. Remaining characters of the symbol can be a
combination of alphanumeric characters, underscores, and dollar signs.
The .eval directive performs arithmetic on substitution symbols, which are
stored in the substitution symbol table. This directive evaluates the expression
and assigns the string value of the result to the substitution symbol. The .eval
directive is especially useful as a counter in .loop/.endloop blocks.
The well-defined expression is an alphanumeric expression consisting of
legal values that have been previously defined, so that the result is an
absolute.
4-26
Assign Character Strings to Substitution Symbols
Example
.asg/.eval
This example shows how .asg and .eval can be used.
1
2
3
4
5
6
7
8 0000 f000
0001 0064
9 0002 6d90
#
10 0003 6d90
11
12
13
14
15
16
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
0004 0001
0005 0002
0006 0003
0007 0004
0008 0005
.sslist;show expanded sub. symbols
*
*
*
.asg/.eval example
.asg
.asg
*+, INC
AR0, FP
ADD
#100, A
MAR
MAR
MAR
*FP+
*AR0+
*AR0+
.asg
0, x
.loop
5
.eval
x+1,
.word
x
.endloop
.eval
x+1,
.eval
0+1,
.word
x
.word
1
.eval
x+1,
.eval
1+1,
.word
x
.word
2
.eval
x+1,
.eval
2+1,
.word
x
.word
3
.eval
x+1,
.eval
3+1,
.word
x
.word
4
.eval
x+1,
.eval
4+1,
.word
x
.word
5
x
x
x
x
x
x
x
x
x
x
x
Assembler Directives
4-27
.bss
Reserve Space in the .bss Section
.bss symbol size in words [, blocking flag] [, alignment flag]
Syntax
Description
The .bss directive reserves space for variables in the .bss section. This directive is usually used to allocate variables in RAM.
The symbol is a required parameter. It defines a label that points to the first
location reserved by the directive. The symbol name should correspond
to the variable that you’re reserving space for.
The size in words is a required parameter; it must be an absolute expres-
sion. The assembler allocates size words in the .bss section. There is no
default size.
The blocking flag is an optional parameter. If you specify a value greater
than 0 for this parameter, the assembler allocates size words contiguously. This means that the allocated space will not cross a page boundary
unless size is greater than a page, in which case, the object will start on
a page boundary.
The alignment flag is an optional parameter. This flag causes the assem-
bler to allocate size on long word boundaries.
The assembler follows two rules when it allocates space in the .bss section:
Rule 1
Whenever a hole is left in memory (as shown in Figure 4–5), the
.bss directive attempts to fill it. When a .bss directive is assembled,
the assembler searches its list of holes left by previous .bss directives and tries to allocate the current block into one of the holes.
(This is the standard procedure whether the contiguous allocation
option has been specified or not.)
Rule 2
If the assembler does not find a hole large enough to contain the
requested space, it checks to see whether the blocking option is
requested.
If you do not request blocking, the memory is allocated at the
current SPC.
If you request blocking, the assembler checks to see whether
there is enough space between the current SPC and the page
boundary. If there is not enough space, the assembler creates
another hole and allocates the space on the next page.
The blocking option allows you to reserve up to 128 words in the .bss section
and ensure that they fit on one page of memory. (Of course, you can reserve
more than 128 words at a time, but they cannot fit on a single page.) The following example code reserves two blocks of space in the .bss section.
memptr:
memptr1:
4-28
.bss
.bss
A,64,1
B,70,1
Reserve Space in the .bss Section
.bss
Each block must be contained within the boundaries of a single page; after the
first block is allocated, however, the second block cannot fit on the current
page. As Figure 4–5 shows, the second block is allocated on the next page.
Figure 4–5. Allocating .bss Blocks Within a Page
Memory
0 a
Memory allocated by first .bss directive; 64 words left in the first page
Page
Boundary 127
Hole in memory left because second
.bss directive required more than 64
words
b
Memory allocated by second .bss
directive; 58 words left in the second
page
Unused memory
256
Section directives for initialized sections (.text, .data, and .sect) end the current section and begin assembling into another section. The .bss directive,
however, does not affect the current section. The assembler assembles the
.bss directive and then resumes assembling code into the current section. For
more information about COFF sections, see Chapter 2.
Assembler Directives
4-29
.bss
Reserve Space in the .bss Section
Example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
In this example, the .bss directive is used to allocate space for two variables,
TEMP and ARRAY. The symbol TEMP points to 4 words of uninitialized space
(at .bss SPC = 0). The symbol ARRAY points to 100 words of uninitialized
space (at .bss SPC = 04h); this space must be allocated contiguously within
a page. Note that symbols declared with the .bss directive can be referenced
in the same manner as other symbols and can also be declared external.
0000
0000 e800
0000
0001
0002
15 0003
0004
16
17
18
19
20
21
22 0004
23
24
25
26
27 0005
28
29
30
31
32
33
4-30
f000
0056
f066
0073
***********************************************
** Start assembling into the .text section. **
***********************************************
.text
LD
#0, A
***********************************************
**
Allocate 4 words in .bss for TEMP.
**
***********************************************
Var_1: .bss
TEMP, 4
***********************************************
**
Still in .text
**
***********************************************
ADD
#56h, A
MPY
#73h, A
***********************************************
** Allocate 100 words in .bss for the symbol **
** named ARRAY; this part of .bss must fit
*
**
on a single page.
**
***********************************************
.bss
ARRAY, 100, 1
***********************************************
**
Assemble more code into .text.
**
***********************************************
8000–
STL
A, Var_1
***********************************************
**
Declare external .bss symbols.
**
***********************************************
.global ARRAY, TEMP
.end
Initialize Bytes
Syntax
Description
.byte
.byte value1 [, ... , valuen ]
The .byte directive places one or more bytes into consecutive words of the current section. Each byte is placed in a word by itself; the 8 MSBs are filled with
0s. A value can be either:
An expression that the assembler evaluates and treats as an 8-bit signed
number, or
A character string enclosed in double quotes. Each character in a string
represents a separate value.
Values are not packed or sign-extended; each byte occupies the 8 least significant bits of a full 16-bit word. The assembler truncates values greater than 8
bits. You can use up to 100 value parameters, but the total line length cannot
exceed 200 characters.
If you use a label, it points to the location where the assembler places the first
byte.
Note that when you use .byte in a .struct/.endstruct sequence, .byte defines
a member’s size; it does not initialize memory. For more information about
.struct/.endstruct, see Section 4.9, page 4-21.
Example
In this example 8-bit values—10, –1, abc, and a—are placed into consecutive
words in memory. The label strx has the value 100h, which is the location of
the first initialized word.
1 0000
2 0100 000a
0101 00ff
0102 0061
0103 0062
0104 0063
0105 0061
STRX
.space
.byte
100h * 16
10, –1, ”abc”, ’a’
Assembler Directives
4-31
.copy/.include
Syntax
Description
Copy Source File
.copy [”]filename[”]
.include [”]filename[”]
The .copy and .include directives tell the assembler to read source statements from a different file. The statements that are assembled from a copy file
are printed in the assembly listing. The statements that are assembled from
an included file are not printed in the assembly listing, regardless of the number of .list/.nolist directives assembled. The assembler:
1) Stops assembling statements in the current source file.
2) Assembles the statements in the copied/included file.
3) Resumes assembling statements in the main source file, starting with the
statement that follows the .copy or .include directive.
The filename is a required parameter that names a source file. It may be
enclosed in double quotes and must follow operating system conventions.
You can specify a full pathname (for example, c:\dsp\file1.asm). If you do not
specify a full pathname, the assembler searches for the file in:
1) The directory that contains the current source file.
2) Any directories named with the –i assembler option.
3) Any directories specified by the environment variable A_DIR.
For more information about the –i option and A_DIR, see Section 3.4, page
3-6.
The .copy and .include directives can be nested within a file being copied or
included. The assembler limits nesting to ten levels; the host operating system
may set additional restrictions. The assembler precedes the line numbers of
copied files with a letter code to identify the level of copying. An A indicates the
first copied file, B indicates a second copied file, etc.
4-32
Copy Source File
Example 1
.copy/.include
In this example, the .copy directive is used to read and assemble source statements from other files; then the assembler resumes assembling into the current file.
The original file, copy.asm, contains a .copy statement copying the file
byte.asm. When copy.asm assembles, the assembler copies byte.asm into its
place in the listing (note listing below). The copy file byte.asm contains a .copy
statement for a second file, word.asm.
When it encounters the .copy statement for word.asm, the assembler switches
to word.asm to continue copying and assembling. Then the assembler returns
to its place in byte.asm to continue copying and assembling. After completing
assembly of byte.asm, the assembler returns to copy.asm to assemble its
remaining statement.
copy.asm
(source file)
byte.asm
(first copy file)
.space 29
.copy ”byte.asm”
** In byte.asm
.byte 32,1+ ’A’
.copy ”word.asm”
** Back in byte.asm
.byte 67h + 3q
**Back in original file
.pstring ”done”
word.asm
(second copy file)
** In word.asm
.word 0ABCDh, 56q
Listing file:
A
A
A
B
B
A
A
1 0000
2
1
2 0002 0020
0003 0042
3
1
2 0004 ABCD
0005 002E
4
5 0006 006A
3
4
5 0007 646F
0008 6E65
.space 29
.copy ”byte.asm”
** In byte.asm
.byte 32,1+ ’A’
.copy ”word.asm”
* In word.asm
.word 0ABCDh, 56q
** Back in byte.asm
.byte 67h + 3q
** Back in original file
.pstring ”done”
Assembler Directives
4-33
.copy/.include
Copy Source File
Example 2
In this example, the .include directive is used to read and assemble source
statements from other files; then the assembler resumes assembling into the
current file. The mechanism is similar to the .copy directive, except that statements are not printed in the listing file.
include.asm
(source file)
byte2.asm
(first include file)
.space 29
.include ”byte2.asm”
** In byte2.asm
.byte 32,1+ ’A’
.include ”word2.asm”
** Back in byte2.asm
.byte 67h + 3q
**Back in original file
.string ”done”
word2.asm
(second include file)
** In word2.asm
.word 0ABCDh, 56q
Listing file:
1 0000
2
3
4
5 0007 0064
0008 006F
0009 006E
000a 0065
4-34
.space 29
.include ”byte2.asm”
** Back in original file
.string ”done”
Assemble into .data Section
Syntax
.data
.data
Description
The .data directive tells the assembler to begin assembling source code into
the .data section; .data becomes the current section. The .data section is normally used to contain tables of data or preinitialized variables.
The assembler assumes that .text is the default section. Therefore, at the
beginning of an assembly, the assembler assembles code into the .text section
unless you use a section control directive.
For more information about COFF sections, see Chapter 2.
Example
In this example, code is assembled into the .data and .text sections.
1
2
3
4 0000
5 0000
6
7
8
9
10 0000
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
***********************************************
**
Reserve space in .data.
**
***********************************************
.data
.space
0CCh
0000
0000 e800
***********************************************
**
Assemble into .text.
**
***********************************************
.text
; constant into .data.
INDEX
.set
0
LD
#INDEX, A
000d
000d ffff
***********************************************
**
Assemble into .data.
**
***********************************************
Table: .data
.word
–1
; Assemble 16–bit
000e 00ff
.byte
0FFh
; Assemble 8–bit
; constant into .data.
***********************************************
**
Assemble into .text.
**
***********************************************
0001
.text
0001 000d”
ADD
Table, A
000f
***********************************************
** Resume assembling into the .data section **
** at address 0Fh.
**
***********************************************
.data
Assembler Directives
4-35
.drlist/.drnolist
Controls Listing of Directives
Syntax
Description
.drlist
.drnolist
Two directives enable you to control the printing of assembler directives to the
listing file:
The .drlist directive enables the printing of all directives to the listing file.
The .drnolist directive suppresses the printing of the following directives to the
listing file:
.asg
.fcnolist
.sslist
.break
.length
.ssnolist
.emsg
.mlist
.var
.eval
.mmsg
.width
.fclist
.mnolist
.wmsg
By default, the assembler acts as if the .drlist directive had been specified.
Example
This example shows how .drnolist inhibits the listing of the specified directives:
Source file:
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.drnolist
.asg
1, x
.loop
3
.eval
x+1, x
.endloop
Listing file:
1
2
3
4
1
1
5
6
7
9
10
11
4-36
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.eval
0+1, x
.eval
1+1, x
.drnolist
.loop
3
.eval
x+1, x
.endloop
Define Messages
.emsg string
.mmsg string
.wmsg string
Syntax
Description
.emsg/.mmsg/.wmsg
These directives allow you to define your own error and warning messages.
The assembler tracks the number of errors and warnings it encounters and
prints these numbers on the last line of the listing file.
The .emsg directive sends error messages to the standard output device in
the same manner as the assembler, incrementing the error count and preventing the assembler from producing an object file.
The .mmsg directive sends assembly-time messages to the standard output
device in the same manner as the .emsg and .wmsg directives, but it does not
set the error or warning counts, and it does not prevent the assembler from
producing an object file.
The .wmsg directive sends warning messages to the standard output device
in the same manner as the .emsg directive, but it increments the warning count
rather than the error count, and it does not prevent the assembler from
producing an object file.
Example
In this example. the message ERROR –– MISSING PARAMETER is sent to
the standard output device.
Source file:
MSG_EX
.global
PARAM
.macro parm1
.if
$symlen(parm1) = 0
.emsg ”ERROR –– MISSING PARAMETER”
.else
add
parm1, r7, r8
.endif
.endm
MSG_EX PARAM
MSG_EX
Assembler Directives
4-37
.emsg/.mmsg/.wmsg
Define Messages
Listing file:
1
2
3
4
5
6
7
8
9
10 0000
1
1
1
1
1
MSG_EX
.global
.macro
.if
.emsg
.else
add
.endif
.endm
PARAM
parm1
$symlen(parm1) = 0
”ERROR –– MISSING PARAMETER”
parm1, A
MSG_EX PARAM
.if
$symlen(parm1) = 0
.emsg
”ERROR –– MISSING PARAMETER”
.else
add
PARAM, A
.endif
0000 0000!
11
12 0001
MSG_EX
.if
$symlen(parm1) = 0
.emsg
”ERROR –– MISSING PARAMETER”
***** USER ERROR ***** – : ERROR –– MISSING PARAMETER
1
.else
1
add
parm1, A
1
.endif
1
1
1 Error, No Warnings
In addition, the following messages are sent to standard output by the assembler:
TMS320C54x COFF Assembler
Version x.xx
Copyright (c) 1993–1994
Texas Instruments Incorporated
PASS 1
PASS 2
*** ERROR!
line12: ***** USER ERROR ***** – : ERROR –– MISSING PARAMETER
.emsg ”ERROR –– MISSING PARAMETER”
1 Error,
No Warnings
Errors in source – Assembler Aborted
4-38
End Assembly
Syntax
Description
.end
.end
The .end directive is optional and terminates assembly. It should be the last
source statement of a program. The assembler ignores any source statements
that follow a .end directive.
This directive has the same effect as an end-of-file character. You can use .end
when you’re debugging and would like to stop assembling at a specific point
in your code.
Note:
Ending a Macro
Use .endm to end a macro.
Example
This example shows how the .end directive terminates assembly. If any source
statements follow the .end directive, the assembler ignores them.
Source File:
START:
TEMP
.space
.set
.bss
ABS
ADD
STL
.end
.byte
.word
300
15
LOC1, 48h
A
#TEMP, A
A, LOC1
4
CCCh
Listing file:
1
2
3
4
5
0000
0000
0013
0014
0015
6 0016
7
000F
F485
F000
000F
8000–
START:
TEMP
.space
.set
.bss
ABS
ADD
300
15
LOC1, 48h
A
#TEMP, A
STL
.end
A, LOC1
Assembler Directives
4-39
.fclist/.fcnolist
Control the Listing of False Conditional Blocks
Syntax
Description
.fclist
.fcnolist
Two directives enable you to control the listing of false conditional blocks.
The .fclist directive allows the listing of false conditional blocks (conditional
blocks that do not produce code).
The .fcnolist directive suppresses the listing of false conditional blocks until
a .fclist directive is encountered. With .fcnolist, only code in conditional blocks
that are actually assembled appears in the listing. The .if, .elseif, .else, and
.endif directives do not appear.
By default, all conditional blocks are listed; the assembler acts as if the .fclist
directive had been used.
Example
This example shows the assembly language and listing files for code with and
without the conditional blocks listed:
Source File:
AAA
BBB
.set 1
.set 0
.fclist
.if
AAA
ADD
#1024, A
.else
ADD
#1024*10, A
.endif
.fcnolist
.if
AAA
ADD
#1024, A
.else
ADD
#1024*10, A
.endif
Listing file:
1
2
3
4
5
6 0000
0001
7
8
9
10
11
12
14 0002
0003
4-40
0001
0000
F000
0400
AAA
BBB
.set 1
.set 0
.fclist
.if
ADD
AAA
#1024, A
.else
ADD
#1024*10, A
.endif
.fcnolist
F000
0400
ADD
#1024, A
Initialize Field
Syntax
Description
.field
.field value [, size in bits]
The .field directive can initialize multiple-bit fields within a single word of
memory. This directive has two operands:
The value is a required parameter; it is an expression that is evaluated and
placed in the field. If the value is relocatable, size must be 16.
The size is an optional parameter; it specifies a number from 1 to 32, which
is the number of bits in the field. If you do not specify a size, the assembler
assumes that the size is 16 bits. If you specify a size of 16 or more, the field
will start on a word boundary. If you specify a value that cannot fit into size
bits, the assembler truncates the value and issues an error message. For
example, .field 3,1 causes the assembler to truncate the value 3 to 1; the
assembler also prints the message:
***warning – value truncated.
Successive .field directives pack values into the specified number of bits starting at the current word. Fields are packed starting at the most significant part
of the word, moving toward the least significant part as more fields are added.
If the assembler encounters a field size that does not fit into the current word,
it writes out the word, increments the SPC, and begins packing fields into the
next word. You can use the .align directive with an operand of 1 to force the
next .field directive to begin packing into a new word.
If you use a label, it points to the word that contains the specified field.
When you use .field in a .struct/.endstruct sequence, .field defines a member’s
size; it does not initialize memory. For more information about .struct/
.endstruct, see Section 4.9, page 4-21.
Assembler Directives
4-41
.field
Initialize Field
Example
This example shows how fields are packed into a word. Notice that the SPC
does not change until a word is filled and the next word is begun. For more
examples of the .field directive, see page 4-12.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
4-42
0000 2AF0
************************************
**
Initialize a 14–bit field. **
************************************
.field 0ABCh, 14
0001 5000
************************************
**
Initialize a 5–bit field
**
**
in a new word.
**
************************************
L_F:
.field 0Ah, 5
0001 5600
***********************************
**
Initialize a 4–bit field
**
**
in the same word.
**
************************************
x:
.field 0Ch, 4
************************************
**
16–bit relocatable field
**
**
in the next word.
**
************************************
0002 0001’
.field x
0003 0000
0004 4321
************************************
**
Initialize a 32–bit field.
**
************************************
.field 04321h, 32
Initialize Field
.field
Figure 4–6 shows how the directives in this example affect memory.
Figure 4–6. The .field Directive
Word
(a) 0
15
0 0 1 0 1 0 1 0 1 1 1 1 0 0
Code
0
.field 0ABCh, 14
14-bit field
(b) 0
1
0 0 1 0 1 0 1 0 1 1 1 1 0 0
0 0
.field
00Ah, 5
.field
000Ch, 4
0 1 0 1 0
5-bit field
(c) 1
0 1 0 1 0
1 1 0 0
4-bit field
(d) 1
0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0
2
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(e) 3
4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
.field x
.field 04321,32
0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1
Assembler Directives
4-43
.float/.xfloat
Syntax
Description
Initialize Floating-Point Value
.float value1 [, ... , valuen ]
.xfloat value1 [, ... , valuen ]
The .float and .xfloat directives place the floating-point representation of one
or more floating-point constants into the current section. The value must be a
floating-point constant or a symbol that has been equated to a floating-point
constant. Each constant is converted to a floating-point value in IEEE singleprecision 32-bit format. Floating point constants are aligned on the long-word
boundaries unless the .xfloat directive is used. The .xfloat directive performs
the same function as the .float directive but does not align the result on the long
word boundary.
The 32-bit value consists of three fields:
Field
Meaning
s
A 1-bit sign field
e
An 8-bit biased exponent
f
A 23-bit fraction
The value is stored most significant word first, least significant word second,
in the following format:
31 30
s
23 22
0
e
f
When you use .float in a .struct/.endstruct sequence, .float defines a member’s
size; it does not initialize memory. For more information about .struct/
.endstruct, see Section 4.9, page 4-21.
Example
This example shows the .float directive.
1 0000
0001
2 0002
0003
3 0004
0005
4-44
E904
5951
4040
0000
42F6
0000
.float
–1.0e25
.float
3
.float
123
Identify Global Symbols
Syntax
Description
.global/.def/.ref
.global symbol1 [, ... , symboln ]
.def symbol1 [, ... , symboln ]
.ref symbol1 [, ... , symboln ]
The .global, .def, and .ref directives identify global symbols, which are defined
externally or can be referenced externally.
The .def directive identifies a symbol that is defined in the current module and
can be accessed by other files. The assembler places this symbol in the symbol table.
The .ref directive identifies a symbol that is used in the current module but
defined in another module. The linker resolves this symbol’s definition at link
time.
The .global directive acts as a .ref or a .def, as needed.
A global symbol is defined in the same manner as any other symbol; that is,
it appears as a label or is defined by the .set, .bss, or .usect directive. As with
all symbols, if a global symbol is defined more than once, the linker issues a
multiple-definition error. .ref always creates a symbol table entry for a symbol,
whether the module uses the symbol or not; .global, however, creates an entry
only if the module actually uses the symbol.
A symbol may be declared global for two reasons:
If the symbol is not defined in the current module (including macro, copy,
and include files), the .global or .ref directive tells the assembler that the
symbol is defined in an external module. This prevents the assembler from
issuing an unresolved reference error. At link time, the linker looks for the
symbol’s definition in other modules.
If the symbol is defined in the current module, the .global or .def directive
declares that the symbol and its definition can be used externally by other
modules. These types of references are resolved at link time.
Example
This example shows four files:
file1.lst and file3.lst are equivalent. Both files define the symbol Init and make
it available to other modules; both files use the external symbols x, y, and z.
file1.lst uses the .global directive to identify these global symbols; file3.lst uses
.ref and .def to identify the symbols.
file2.lst and file4.lst are equivalent. Both files define the symbols x, y, and z
and make them available to other modules; both files use the external symbol
Init. file2.lst uses the .global directive to identify these global symbols; file4.lst
uses .ref and .def to identify the symbols.
Assembler Directives
4-45
.global/.def/.ref
Identify Global Symbols
file1.lst:
1
2
3
4
5 0000
6 0000 F000
0001 0056
7 0002 0000!
8
9
10
11
; Global symbol defined in this file
.global INIT
; Global symbols defined in file2.lst
.global X, Y, Z
INIT:
ADD
#56h, A
;
;
;
.word
.
.
.
.end
X
file2.lst:
1
2
3
4
5
6
7
8 0000
9
10
11
12
; Global symbols defined in this file
.global X, Y, Z
; Global symbol defined in file1.lst
.global INIT
0001 X:
.set
1
0002 Y:
.set
2
0003 Z:
.set
3
0000!
.word
INIT
;
.
;
.
;
.
.end
file3.lst:
1
2
3
4
5 0000
6 0000 F000
0001 0056
7 0002 0000!
8
9
10
11
4-46
; Global symbol defined in this file
.def
INIT
; Global symbols defined in file4.lst
.ref
X, Y, Z
INIT:
ADD
#56h, A
;
;
;
.word
.
.
.
.end
X
Identify Global Symbols
.global/.def/.ref
file4.lst:
1
2
3
4
5
6
7
8 0000
9
10
11
12
; Global symbols defined in this file
.def
X, Y, Z
; Global symbol defined in file3.lst
.ref
INIT
0001 X:
.set
1
0002 Y:
.set
2
0003 Z:
.set
3
0000!
.word
INIT
;
.
;
.
;
.
.end
Assembler Directives
4-47
.if/.elseif/.else/.endif
Syntax
Assemble Conditional Blocks
.if well-defined expression
.elseif well-defined expression
.else
.endif
Description
Four directives provide conditional assembly:
The .if directive marks the beginning of a conditional block. The well-defined
expression is a required parameter.
If the expression evaluates to true (nonzero), the assembler assembles
the code that follows the expression (up to a .elseif, .else, or .endif).
If the expression evaluates to false (0), the assembler assembles code
that follows a .elseif (if present), .else (if present), or .endif (if no .elseif or
.else is present).
The .elseif directive identifies a block of code to be assembled when the .if
expression is false (0) and the .elseif expression is true (nonzero). When the
.elseif expression is false, the assembler continues to the next .elseif (if present), .else (if present) or .endif (if no .elseif or .else is present). The .elseif
directive is optional in the conditional blocks, and more than one .elseif can be
used. If an expression is false and there is no .elseif statement, the assembler
continues with the code that follows a .else (if present) or a .endif.
The .else directive identifies a block of code that the assembler assembles
when the .if expression and all .elseif expressions are false (0). This directive
is optional in the conditional block; if an expression is false and there is no .else
statement, the assembler continues with the code that follows the .endif.
The .endif directive terminates a conditional block.
The .elseif and .else directives can be used in the same conditional assembly
block and the .elseif directive can be used more than once within a conditional
assembly block.
For information about relational operators, see subsection 3.9.4, page 3-21.
4-48
Assemble Conditional Blocks
Example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
.if/.elseif/.else/.endif
This example shows conditional assembly.
SYM1
SYM2
SYM3
SYM4
.set
.set
.set
.set
1
2
3
4
If_4:
.if
.byte
.else
.byte
.endif
SYM4 = SYM2 * SYM2
SYM4
; Equal values
0000 0004
If_5:
0001 000a
If_6:
0002 0008
If_7:
0003 0005
SYM2 * SYM2
; Unequal values
.if
.byte
.else
.byte
.endif
SYM1 <= 10
10
; Less than / equal
SYM1
; Greater than
.if
.byte
.else
.byte
.endif
SYM3 * SYM2 != SYM4 + SYM2
SYM3 * SYM2
; Unequal value
SYM4 + SYM4
; Equal values
.if SYM1 = 2
.byte
SYM1
.elseif SYM2 + SYM3 = 5
.byte
SYM2 + SYM3
.endif
Assembler Directives
4-49
.int/.word
Initialize 16-bit Integer
.int value1 [, ... , valuen ]
.word value1 [, ... , valuen ]
Syntax
Description
The .int and .word directives are equivalent; they place one or more values
into consecutive 16-bit fields in the current section.
The values can be either absolute or relocatable expressions. If an expression
is relocatable, the assembler generates a relocation entry that refers to the
appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
You can use as many values as fit on a single line. If you use a label, it points
to the first word that is initialized.
When you use .int or .word in a .struct/.endstruct sequence, they define a
member’s size; they do not initialize memory. For more information about
.struct/.endstruct, see Section 4.9, page 4-21.
Example 1
1
2
3
4
5
0000
0000
0080
0008
0009
000a
000b
000c
000d
In this example, the .int directive is used to initialize words.
E856 INST:
000A
0080–
FFFF
0084
0008’
Example 2
1 0000
0001
0002
0003
4-50
.space
.bss
.bss
LD
.int
73h
PAGE, 128
SYMPTR, 3
#056h, A
10, SYMPTR, –1, 35 + ’a’, INST
In this example, the .word directive is used to initialize words. The symbol
WordX points to the first word that is reserved.
0C80
4143
FF51
0058
WORDX: .word
3200, 1 + ’AB’, –0AFh, ’X’
Create a Relocatable Label
Syntax
Description
.label
.label symbol
The .label directive defines a special symbol that refers to the loadtime
address rather than the runtime address within the current section. Most sections created by the assembler have relocatable addresses. The assembler
assembles each section as if it started at 0, and the linker relocates it to the
address at which it loads and runs.
For some applications, it is desirable to have a section load at one address and
run at a different address. For example, you may wish to load a block of performance-critical code into slower off-chip memory to save space, and then move
the code to high-speed on-chip memory to run it.
Such a section is assigned two addresses at link time: a load address and a
run address. All labels defined in the section are relocated to refer to the runtime address so that references to the section (such as branches) are correct
when the code runs.
The .label directive creates a special label that refers to the loadtime address.
This function is useful primarily to designate where the section was loaded for
purposes of the code that relocates the section.
Example
This example shows the use of a loadtime address label.
.sect ”.EXAMP”
.label EXAMP_LOAD ;
START:
;
<code>
FINISH:
;
.label EXAMP_END ;
load address of section.
run address of section.
run address of section end.
load address of section end.
For more information about assigning runtime and loadtime addresses in the
linker, see Section 8.9, page 8-33.
Assembler Directives
4-51
.length/.width
Syntax
Set Listing Page Size
.length page length
.width page width
Description
The .length directive sets the page length of the output listing file. It affects the
current and following pages. You can reset the page length with another
.length directive.
Default length: 60 lines
Minimum length: 1 line
Maximum length: 32,767 lines
The .width directive sets the page width of the output listing file. It affects the
next line assembled and the lines following; you can reset the page width with
another .width directive.
Default width: 80 characters
Minimum width: 80 characters
Maximum width: 200 characters
The width refers to a full line in a listing file; the line counter value, SPC value,
and object code are counted as part of the width of a line. Comments and other
portions of a source statement that extend beyond the page width are truncated in the listing.
The assembler does not list the .width and .length directives.
Example
In this example, the page length and width are changed.
*********************************************
**
Page length = 65 lines.
**
**
Page width = 85 characters.
**
*********************************************
.length
65
.width
85
*********************************************
**
Page length = 55 lines.
**
**
Page width = 100 characters.
**
*********************************************
.length
55
.width
100
4-52
Start/Stop Source Listing
Syntax
.list/.nolist
.list
.nolist
Description
Two directives enable you to control the printing of the source listing:
The .list directive allows the printing of the source listing.
The .nolist directive suppresses the source listing output until a .list directive
is encountered. The .nolist directive can be used to reduce assembly time and
the source listing size. It can be used in macro definitions to suppress the listing of the macro expansion.
The assembler does not print the .list or .nolist directives or the source statements that appear after a .nolist directive. However, it continues to increment
the line counter. You can nest the .list /.nolist directives; each .nolist needs a
matching .list to restore the listing.
By default, the source listing is printed to the listing file; the assembler acts as
if the .list directive had been specified.
Note:
Creating a Listing File (–l Option)
If you don’t request a listing file when you invoke the assembler, the assembler ignores the .list directive.
Example
This example shows how the .copy directive inserts source statements from
another file. The first time this directive is encountered, the assembler lists the
copied source lines in the listing file. The second time this directive is encountered, the assembler does not list the copied source lines, because a .nolist
directive was assembled. Note that the .nolist, the second .copy, and the .list
directives do not appear in the listing file. Note also that the line counter is
incremented, even when source statements are not listed.
Assembler Directives
4-53
.list/.nolist
Start/Stop Source Listing
Source file:
.copy ”copy2.asm”
* Back in original file
NOP
.nolist
.copy ”copy2.asm”
.list
* Back in original file
.string ”Done”
Listing file:
A
A
4-54
1
1
2 0000
0001
2
3 0002
7
8 0005
0006
0007
0008
0020
0042
F495
0044
006F
006E
0065
.copy
”copy2.asm”
* In copy2.asm (copy file)
.word 32, 1 + ’A’
* Back in original file
NOP
* Back in original file
.string ”Done”
Initialize Long Word
Syntax
.long/.xlong
.long value1 [, ... , valuen ]
.xlong value1 [, ... , valuen ]
Description
The .long and .xlong directives place one or more 32-bit values into consecutive words in the current section. The most significant word is stored first. The
.long directive aligns the result on the long word boundary, while the .xlong
directive does not.
The value operand can be either an absolute or relocatable expression. If an
expression is relocatable, the assembler generates a relocation entry that
refers to the appropriate symbol; the linker can then correctly patch ( relocate)
the reference. This allows you to initialize memory with pointers to variables
or with labels.
You can use up to 100 values, but they must fit on a single source statement
line. If you use a label, it points to the first word that is initialized.
When you use .long in a .struct /.endstruct sequence, .long defines a member’s size; it does not initialize memory. For more information about .struct /
.endstruct, see Section 4.9, page 4-21.
Example
This example shows how the .long and .xlong directives initialize double
words.
1 0000
0001
0002
0003
0004
0005
0006
0007
2 0008
0009
000a
000b
3 000c
0000 DAT1: .long 0ABCDh, ’A’ + 100h, ’g’, ’o’
ABCD
0000
0141
0000
0067
0000
006F
0000’
.xlong DAT1, 0AABBCCDDh
0000
AABB
CCDD
DAT2:
Assembler Directives
4-55
.loop/.break/.endloop
Assemble Code Block Repeatedly
.loop [well-defined expression]
Syntax
.break [well-defined expression]
.endloop
Description
Three directives enable you to repeatedly assemble a block of code:
The .loop directive begins a repeatable block of code. The optional expression
evaluates to the loop count (the number of loops to be performed). If there is
no expression, the loop count defaults to 1024, unless the assembler first
encounters a .break directive with an expression that is true (nonzero) or
omitted.
The .break directive is optional, along with its expression. When the expression is false ( 0 ), the loop continues. When the expression is true ( nonzero),
or omitted, the assembler breaks the loop and assembles the code after the
.endloop directive.
The .endloop directive terminates a repeatable block of code; it executes
when the .break directive is true (nonzero) or when number of loops performed
equals the loop count given by .loop
Example
This example illustrates how these directives can be used with the .eval directive.
1
2
3
4
5
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4-56
COEF
0000 0000
0001 0064
0002 00C8
0003 012C
0004 0190
0005 01F4
.eval
.loop
.word
.eval
.break
.endloop
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
0,x
x*100
x+1, x
x = 6
0*100
0+1, x
1 = 6
1*100
1+1, x
2 = 6
2*100
2+1, x
3 = 6
3*100
3+1, x
4 = 6
4*100
4+1, x
5 = 6
5*100
5+1, x
6 = 6
Define Macro Library
Syntax
Description
.mlib
.mlib [”]filename[”]
The .mlib directive provides the assembler with the name of a macro library.
A macro library is a collection of files that contain macro definitions. These files
are bound into a single file (called a library or archive) by the archiver. Each
member of a macro library may contain one macro definition that corresponds
to the name of the file. Macro library members must be source files (not object
files).
The filename of a macro library member must be the same as the macro name,
and its extension must be .asm. The filename must follow host operating system conventions; it may be enclosed in double quotes. You can specify a full
pathname (for example, c:\dsp\macs.lib). If you do not specify a full pathname,
the assembler searches for the file in:
1) The directory that contains the current source file.
2) Any directories named with the –i assembler option .
3) Any directories specified by the environment variable A_DIR.
For more information about the –i option and the environment variable, see
Section 3.4, page 3-6.
When the assembler encounters a .mlib directive, it opens the library and
creates a table of the library’s contents. The assembler enters the names of
the individual library members into the opcode table as library entries. This
redefines any existing opcodes or macros that have the same name. If one of
these macros is called, the assembler extracts the entry from the library and
loads it into the macro table. The assembler expands the library entry in the
same way it expands other macros, but it does not place the source code into
the listing. Only macros that are actually called from the library are extracted,
and they are extracted only once.
assembler Directives
4-57
.mlib
Define Macro Library
Example
This example creates a macro library that defines two macros, inc1 and zac1.
The file inc1.asm contains the definition of inc1, and zac1.asm contains the
definition of zac1.
inc1.asm
* Macro for incrementing
inc1 .macro
ADD #1,A
ADD #1,B
.endm
zac1.asm
* Macro for zero accumulators
zac1 .macoro
SUB A,A
SUB B,B
.endm
Use the archiver to create a macro library:
ar500 –a mac inc1.asm zac1.asm
Now you can use the .mlib directive to reference the macro library and define
the inc1 and dec1 macros:
1
1
1
1
4-58
1
2 0000
0000
0001
3 0002
0002
0003
0004
0005
F420
F720
F000
0001
F300
0001
.mlib
”mac.lib”
zac1
; Macro call
SUB A,A
SUB B,B
inc1
; Macro call
ADD #1,A
ADD #1,B
Start/Stop Expansion Listing
Syntax
Description
.mlist/.mnolist
.mlist
.mnolist
Two directives enable you to control the listing of macro and repeatable block
expansions in the listing file:
The .mlist directive allows macro and .loop/.endloop block expansions in the
listing file.
The .mnolist directive suppresses macro and .loop/.endloop block expansions in the listing file.
By default, the assembler behaves as if the .mlist directive had been specified.
Example
This example defines a macro named STR_3. The first time the macro is
called, the macro expansion is not listed, because a .mnolist directive was
assembled. The second time the macro is called, the macro expansion is
listed, because a .mlist directive was assembled.
1
1
1
2
3
4
5 0000
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
000a
000b
6
7 000c
8
9 0018
0018
0019
001a
001b
001c
001d
001e
001f
0020
0021
0022
0023
STR_3
003A
0070
0031
003A
003A
0070
0032
003A
003A
0070
0033
003A
003A
0070
0031
003A
003A
0070
0032
003A
003A
0070
0033
003A
.macro
P1, P2, P3
.string ”:p1:”, ”:p2:”, ”:p3:”
.endm
STR_3 ”as”, ”I”, ”am”
.string ”:p1:”, ”:p2:”, ”:p3:”
.mnolist
STR_3 ”as”, ”I”, ”am”
.mlist
STR_3 ”as”, ”I”, ”am”
.string ”:p1:”, ”:p2:”, ”:p3:”
Assembler Directives
4-59
.mmregs Assign Memory-Mapped Register Names as Global Symbols
Syntax
Description
.mmregs
The .mmregs directive defines global symbolic names for the ’C54x registers
and places them in the global symbol table. It is equivalent to executing AL .set
8, AH .set 9, etc. The symbols are local and absolute. Using the .mmregs directive makes it unnecessary to define these symbols.
Table 4–2. Memory-Mapped Registers
Name
Address HEX
Description
IMR
0000
Interrupt mask register
IFR
0001
Interrupt flag register
–
2–5
Reserved
ST0
0006
Status 0 register
ST1
0007
Status 1 register
AL
0008
A accumulator low (A [15:0])
AH
0009
A accumulator high (A [31:16])
AG
000A
A accumulator guard (A [39:32])
BL
000B
B accumulator low (B [15:0])
BH
000C
B accumulator high (B [31:16])
BG
000D
B accumulator guard (B [39:32])
T
000E
Temporary register
TRN
000F
Transition register
AR0
0010
Auxiliary register zero
AR1
0011
Auxiliary register one
AR2
0012
Auxiliary register two
AR3
0013
Auxiliary register three
AR4
0014
Auxiliary register four
AR5
0015
Auxiliary register five
AR6
0016
Auxiliary register six
AR7
0017
Auxiliary register seven
Note:
4-60
Duplication of address hex values in the table supports the different names of the registers as they are implemented on different ’C54x devices.
Assign Memory-Mapped Register Names as Global Symbols
.mmregs
Table 4–2. Memory-Mapped Registers (Continued)
Name
Address HEX
Description
SP
0018
Stack pointer register
BK
0019
Circular size register
BRC
001A
Block repeat counter
RSA
001B
Block repeat start address
REA
001C
Block repeat end address
PMST
001D
PMST register
DRR0
0020
Data receive register 0
BDRR
0020
Data receive register
DRR
0020
Data receive register
DXR0
0021
Data transmit register 0
BDXR
0021
Data transmit register
DXR
0021
Data transmit register
SPC0
0022
Serial port control register 0
BSPC
0022
Serial port control register
SPC
0022
Serial port control register
BSPCE
0023
BSP control extension register
TIM
0024
Timer register
PRD
0025
Period register
TCR
0026
Timer control register
PDWSR
0028
Program/data S/W wait-state register
SWWSR
0028
Program/data S/W wait-state register
IOWSR
0029
Bank-switching control register
BSCR
0029
Bank-switching control register
HPIC
002C
HPI control register
Note:
Duplication of address hex values in the table supports the different names of the registers as they are implemented on different ’C54x devices.
Assembler Directives
4-61
.mmregs Assign Memory-Mapped Register Names as Global Symbols
Table 4–2. Memory-Mapped Registers (Continued)
Name
Address HEX
Description
DRR1
0030
Data receive register 1
TRCV
0030
Data receive register
DXR1
0031
Data transmit register 1
TDXR
0031
Data transmit register
SPC1
0032
Serial port control register 1
TSPC
0032
Serial port control register
TCSR
0033
TDM channel select register
TRTA
0034
TDM receive/transmit register
TRAD
0035
TDM receive address register
AXR
0038
ABU transmit address register
ARX
0038
ABU transmit address register
BKX
0039
ABU transmit buffer size register
ARR
003A
ABU receive address register
BKR
003B
ABU receive buffer size register
Note:
4-62
Duplication of address hex values in the table supports the different names of the registers as they are implemented on different ’C54x devices.
Terminate Local Symbol Block
Syntax
Description
.newblock
.newblock
The .newblock directive undefines any local labels currently defined. Local
labels, by nature, are temporary; the .newblock directive resets them and terminates their scope.
A local label is a label in the form $n, where n is a single decimal digit. A local
label, like other labels, points to an instruction word. Unlike other labels, local
labels cannot be used in expressions. Local labels are not included in the symbol table.
After a local label has been defined and (perhaps) used, you should use the
.newblock directive to reset it. The .text, .data, and named sections also reset
local labels. Local labels that are defined within an include file are not valid outside of the local file.
Example
1
2
0076
3
4 0000 1000!
5 0001 F010
0002 0076
6 0003 F843
0004 0008’
7 0005 1000!
8 0006 F073
0007 0009’
9
10 0008 1000!
11 0009 0000!
12
13 000a F843
000b 000D’
14 000c 8000!
15 000d F495
This example shows how the local label $1 is declared, reset, and then
declared again.
B
.ref
.set
LABEL1: LD
SUB
$1
$2
$1
ADDRA, ADDRB, ADDRC
76h
ADDRA, A
#B, A
BC
$1, ALT
LD
B
ADDRB, A
$2
LD
ADDRA, A
ADD
ADDRC, A
.newblock
; Undefine $1 to use again.
BC
$1, ALT
STL
NOP
A, ADDRC
Assembler Directives
4-63
.option
Select Listing Options
Syntax
Description
.option
option list
The .option directive selects several options for the assembler output listing.
Option list is a list of options separated by vertical lines; each option selects
a listing feature. These are valid options:
B
limits the listing of .byte directives to one line.
L
limits the listing of .long directives to one line.
M
turns off macro expansions in the listing.
R
resets the B, M, T, and W options.
T
limits the listing of .string directives to one line.
W
limits the listing of .word directives to one line.
X
produces a symbol cross-reference listing. (You can also obtain a
cross-reference listing by invoking the assembler with the
–x option.)
Options are not case-sensitive.
4-64
Select Listing Options
Example
.option
This example shows how to limit the listings of the .byte, .word, .long, and
.string directives to one line each.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0000
0004
0008
000a
001c
001d
001e
17 0020
0021
0022
0023
18 0024
0025
19 0026
0027
0028
0029
002a
002b
002c
002d
002e
002f
0030
0031
0032
0033
0034
0035
0036
0037
00BD
AABB
15AA
0045
00BD
00B0
0005
AABB
CCDD
0000
0259
15AA
0078
0045
0078
0074
0065
006E
0064
0065
0064
0020
0052
0065
0067
0069
0073
0074
0065
0072
0073
****************************************
** Limit the listing of .byte, .word, **
** .long, and .string directives to 1 **
**
to 1 line each.
**
****************************************
.option B, W, L, T
.byte
–’C’, 0B0h, 5
.long
0AABBCCDDh, 536 + ’A’
.word
5546, 78h
.string ”Extended Registers”
****************************************
**
Reset the listing options.
**
****************************************
.option R
.byte
–’C’, 0B0h, 5
.long
0AABBCCDDh, 536 + ’A’
.word
5546, 78h
.string ”Extended Registers”
Assembler Directives
4-65
.page
Eject Page in Listing
Syntax
.page
Description
The .page directive produces a page eject in the listing file. The .page directive
is not printed in the source listing, but the assembler increments the line
counter when it encounters it. Using the .page directive to divide the source
listing into logical divisions improves program readability.
Example
This example shows how the.page directieve causes the assembler to begin
a new page of the source listing.
Source file:
;
;
;
.title
.
.
.
.page
”**** Page Directive Example ****”
Listing file:
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
Version x.xx
Sun Apr 23 13:06:08 1995
Texas Instruments Incorporated
**** Page Directive Example ****
2
;
3
;
4
;
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
1
.
.
.
Version x.xx
Sun Apr 23 13:06:08 1995
Texas Instruments Incorporated
**** Page Directive Example ****
4-66
PAGE
PAGE
2
Specify Blocking for an Initialized Section
.sblock
.sblock [”]section name[”] [, ”section name”, . . . ]
Syntax
Description
The .sblock directive designates sections for blocking. Blocking is an address
alignment mechanism similar to page alignment, but weaker. A blocked section is guaranteed to not cross a page boundary (128 words) if it is smaller than
a page, or to start on a page boundary if it is larger than a page. This directive
allows specification of blocking for initialized sections only, not uninitialized
sections declared with .usect or the .bss directives. The section names may
optionally be enclosed in quotes.
Example
This example designates the .text and .data sections for blocking.
1
2
3
4
5
****************************************
** Specify blocking for the .text
**
** and .data sections.
**
****************************************
.sblock
.text, .data
Assembler Directives
4-67
.sect
Assemble into Named Sections
.sect ”section name”
Syntax
Description
The .sect directive defines a named section that can be used like the default
.text and .data sections. The .sect directive begins assembling source code
into the named section.
The section name identifies a section that the assembler assembles code into.
The name is significant to eight characters and must be enclosed in double
quotes.
For more information about COFF sections, see Chapter 2.
Example
1
2
3
4 0000
5 0000 E878
6 0001 F000
0002 0036
7
8
9
10 0000
11 0000 3D4C
0001 CCCD
12 0002 00AA
13 0003 F000
0004 0002+
14
15
16
17 0000
18
0010
19
0020
20
0008
21
22
23
24 0003
25 0003 F000
0004 0042
26 0005 0003
0006 0004
27
28
29
30 0000
31 0000 000D
32 0001 0A00
33 0002 0000
0003 0008
34
4-68
This example defines two special-purpose sections, Sym_Defs and Vars, and
assembles code into them.
**********************************************
**
Begin assembling into .text section.
**
**********************************************
.text
LD
#78h, A ; Assembled into .text
ADD
#36h, A ; Assembled into .text
**********************************************
** Begin assembling into Sym_Defs section. **
**********************************************
.sect
”Sym_Defs”
.float 0.05
; Assembled into Sym_Defs
X:
.word
ADD
0AAh
#X, A
; Assembled into Sym_Defs
; Assembled into Sym_Defs
**********************************************
**
Begin assembling into Vars section.
**
**********************************************
.sect
”Vars”
WORD_LEN
.set
16
DWORD_LEN
.set
WORD_LEN * 2
BYTE_LEN
.set
WORD_LEN / 2
**********************************************
**
Resume assembling into .text section. **
**********************************************
.text
ADD
#42h, A ; Assembled into .text
.byte
3, 4
; Assembled into .text
**********************************************
**
Resume assembling into Vars section.
**
**********************************************
.sect
”Vars”
.field 13, WORD_LEN
.field 0Ah, BYTE_LEN
.field 10q, DWORD_LEN
Define Assembly-Time Constant
.set/.equ
symbol .set value
symbol .equ value
Syntax
Description
The .set and .equ directives equate a constant value to a symbol. The symbol
can then be used in place of a value in assembly source. This allows you to
equate meaningful names with constants and other values.
The symbol is a label that must appear in the label field.
The value must be a well-defined expression; that is, all symbols in the
expression must be previously defined in the current source module.
Undefined external symbols and symbols that are defined later in the module
cannot be used in the expression. If the expression is relocatable, the symbol
to which it is assigned is also relocatable.
The value of the expression appears in the object field of the listing. This value
is not part of the actual object code and is not written to the output file.
Symbols defined with .set can be made externally visible with the .def or .global
directive. In this way, you can define global absolute constants.
Example
1
2
3
4
5
6 0000
0001
7
8
9
10
11
12
13 0002
0003
14
15
16
17
18
19 0004
20
21
22
23
24
25
26
27 0005
This example shows how symbols can be assigned with .set and .equ.
0011
7711
0056
0035
F000
0035
**********************************************
**
Equate symbol AUX_R1 to register AR1
**
**
and use it instead of the register.
**
**********************************************
AUX_R1 .set
AR1
STM
#56h, AUX_R1
**********************************************
**
Set symbol index to an integer expr.
**
**
and use it as an immediate operand.
**
**********************************************
INDEX
.equ
100/2 +3
ADD
#INDEX, A
**********************************************
** Set symbol SYMTAB to a relocatable expr. **
**
and use it as a relocatable operand.
**
**********************************************
000A LABEL
.word
10
0005’ SYMTAB .set
LABEL + 1
0035
0035
**********************************************
**
Set symbol NSYMS equal to the symbol
**
**
INDEX and use it as you would INDEX.
**
**********************************************
NSYMS
.set
INDEX
.word
NSYMS
Assembler Directives
4-69
.space/.bes
Reserve Space
Syntax
Description
.space size in bits
.bes size in bits
The .space and .bes directives reserve size number of bits in the current section and fill them with 0s.
When you use a label with the .space directive, it points to the first word
reserved. When you use a label with the .bes directive, it points to the last word
reserved.
Example
1
2
3
4 0000
5
6
7
8
9
10 0000
11 000f 0100
0010 0200
12
13
14
15 0000
16 0000 0049
0001 006E
0002 0020
0003 002E
0004 0064
0005 0061
0006 0074
0007 0061
17
18
19
20
21
22 0008
23 000f 000F
24 0010 0008”
25
26
27
28
29
30
31 0012
32 0013 0036
33 0014 0012”
4-70
This example shows how memory is reserved with the .space and .bes directives.
*********************************************
** Begin assembling into .text section.
**
*********************************************
.text
*********************************************
** Reserve 0F0 bits (15 words in the
**
**
.text section.
**
*********************************************
.space 0F0h
.word
100h, 200h
*********************************************
** Begin assembling into .data section.
**
*********************************************
.data
.string ”In .data”
*********************************************
** Reserve 100 bits in the .data section; **
**
RES_1 points to the first word that
**
**
contains reserved bits.
**
*********************************************
RES_1: .space 100
.word
15
.word
RES_1
*********************************************
** Reserve 20 bits in the .data section; **
** RES_2 points to the last word that
**
**
contains reserved bits.
**
*********************************************
RES_2: .bes
20
.word
36h
.word
RES_2
Control Listing of Substitution Symbols
Syntax
Description
.sslist/.ssnolist
.sslist
.ssnolist
Two directives enable you to control substitution symbol expansion in the listing file:
The .sslist directive allows substitution symbol expansion in the listing file.
The expanded line appears below the actual source line.
The .ssnolist directive suppresses substitution symbol expansion in the listing file.
By default, all substitution symbol expansion in the listing file is inhibited. Lines
with the pound (#) character denote expanded substitution symbols.
Example
This example shows code that, by default, suppresses the listing of substitution symbol expansion, and it shows the .sslist directive assembled, instructing
the assembler to list substitution symbol code expansion.
1
2
3
4
5
6
7
8
9
10
1
1
1
1
#
1
#
1
#
0000
0001
ADD2
0000
0001
0001
0002
0003
8094
1000–
0001–
8001–
11
12
13
14 0004 8094
15 0005 8090
16
17 0006
0006 1000–
0007 0001–
0008 8001–
.bss
.bss
.macro
LD
ADD
STL
.endm
ADDRX, 1
ADDRY, 1
ADDRA, ADDRB
ADDRA, A
ADDRB, A
A, ADDRB
STL
ADD2
LD
ADD
STL
A, *AR4+
ADDRX, ADDRY
ADDRX, A
ADDRY, A
A, ADDRY
.sslist
STL
STL
A, *AR4+
A, *AR0+
ADD2
LD
LD
ADD
ADD
STL
STL
ADDRX, ADDRY
ADDRA, A
ADDRX, A
ADDRB, A
ADDRY, A
A, ADDRB
A, ADDRY
Assembler Directives
4-71
.string
Initialize Text
Syntax
.string ”string1 ” [, ... , ”stringn ”]
.pstring ”string1 ” [, ... , ”stringn ”]
Description
The .string and .pstring directives place 8-bit characters from a character
string into the current section. With the .string directive, each 8 bit character
has its own 16-bit word, but with the .pstring directive, the data is packed so
that each word contains two 8-bit bytes. Each string is either:
An expression that the assembler evaluates and treats as a 16-bit signed
number, or
A character string enclosed in double quotes. Each character in a string
represents a separate byte.
With .pstring, values are packed into words starting with the most significant
byte of the word. Any unused space is padded with null bytes.
The assembler truncates any values that are greater than 8 bits. You may have
up to 100 operands, but they must fit on a single source statement line.
If you use a label, it points to the location of the first word that is initialized.
Note that when you use .string in a .struct/.endstruct sequence, .string defines
a member’s size; it does not initialize memory. For more information about
.struct/.endstruct, see Section 4.9, page 4-21.
Example
This example shows 8-bit values placed into words in the current section.
1 0000
0001
0002
0003
2 0004
0005
0006
0007
3 0008
0009
000a
000b
000c
000d
000e
4 000f
4-72
0041
0042
0043
0044
0041
0042
0043
0044
4175
7374
696E
486F
7573
746F
6E00
0030
Str_Ptr:
.string
”ABCD”
.string
41h, 42h, 43h, 44h
.pstring ”Austin”, ”Houston”
.string
36 + 12
Declare Structure Type
Syntax
Description
[ stag ]
[ mem0 ]
[ mem1 ]
.
.
.
[ memn ]
.
.
.
[ memN ]
[ size ]
.struct
element
element
.
.
.
.tag stag
.
.
.
element
.endstruct
[ expr ]
[ expr0 ]
[ expr1 ]
.
.
.
[ exprn ]
.
.
.
[ exprN ]
label
.tag
stag
.struct/.endstruct/.tag
The .struct directive assigns symbolic offsets to the elements of a data structure definition. This enables you to group similar data elements together and
then let the assembler calculate the element offset. This is similar to a C structure or a Pascal record. The .struct directive does not allocate memory; it
merely creates a symbolic template that can be used repeatedly.
The .endstruct directives terminates the structure defintion.
The .tag directive gives structure characteristics to a label, simplifying the
symbolic representation and providing the ability to define structures that
contain other structures. The .tag directive does not allocate memory. The
structure tag (stag) of a .tag directive must have been previously defined.
stag
is the structure’s tag. Its value is associated with the beginning
of the structure. If no stag is present, the assembler puts the
structure members in the global symbol table with the value of
their absolute offset from the top of the structure. Stag is optional
for .struct, but required for .tag.
expr
is an optional expression indicating the beginning offset of the
structure. Structures default to start at 0.
memn
is an optional label for a member of the structure. This label is absolute and equates to the present offset from the beginning of the
structure. A label for a structure member cannot be declared
global.
element
is one of the following descriptors: .string, .byte, .word, .float, .tag,
or .field. All of these except .tag are typical directives that initialize
memory. Following a .struct directive, these directives describe
the structure element’s size. They do not allocate memory. A .tag
directive is a special case because a stag must be used (as in the
definition).
Assembler Directives
4-73
.struct/.endstruct/.tag
Declare Structure Types
exprn
is an optional expression for the number of elements described.
This value defaults to 1. A .string element is considered to be one
word in size, and a .field element is one bit.
size
is an optional label for the total size of the structure.
Note:
Directives That Can Appear in a .struct /.endstruct Sequence
The only directives that can appear in a .struct/.endstruct sequence are element descriptors, conditional assembly directives, and the .align directive,
which aligns the member offsets on word boundaries. Empty structures are
illegal.
These examples show various uses of the .struct, .tag, and .endstruct directives.
Example 1
1
2
3
4
5
6 0000
7
8
9 0000
0000
0001
0002
REAL_REC
NOM
DEN
REAL_LEN
0001–
.struct
.int
.int
.endstruct
ADD
;
;
;
;
stag
member1 = 0
member2 = 1
real_len = 4
REAL + REAL_REC.DEN, A
; access structure element
.bss REAL, REAL_LEN
; allocate mem rec
Example 2
1
2
3
4
5
6
7
8
9
10
11
12
13
0000
0002
0004
CPLX_REC
REALI
IMAGI
CPLX_LEN
.struct
.tag REAL_REC
.tag REAL_REC
.endstruct
; stag
; member1 = 0
; cplx_len = 8
COMPLEX
.tag CPLX_REC
; assign structure attrib
0002
.bss COMPLEX, CPLX_LEN
0001 0002–
0002 8002–
ADD
STL
COMPLEX.REALI, A
A, COMPLEX.REALI
; access structure
0003 0104–
ADD
COMPLEX.IMAGI, B
; allocate space
Example 3
1
2
3
4
5
6
4-74
.struct
0000
0001
0002
0003
X
Y
Z
.int
.int
.int
.endstruct
; no stag puts mems into
; global symbol table
; create 3 dim templates
Declare Structure Types
.struct/.endstruct/.tag
Example 4
1
2
0000
3
0040
4
0040
5
0041
6
0042
7
0043
8
9
10 0000 0040–
11 0001 f030
0002 007f
12
13 0000
BIT_REC
STREAM
BIT7
BIT9
BIT10
X_INT
BIT_LEN
.struct
.string 64
.field 7
.field 9
.field 10
.int
.endstruct
; stag
;
;
;
;
;
BITS
.tag BIT_REC
ADD BITS.BIT7, A
AND #007Fh, A
; move into acc
; mask off garbage bits
bits1 = 64
bits2 = 64
bits3 = 65
x_int = 67
length = 68
.bss BITS, BIT_REC
Assembler Directives
4-75
.tab
Define Tab Size
Syntax
.tab size
Description
The .tab directive defines the tab size. Tabs encountered in the source input
will be translated to size spaces in the listing. The default tab size is eight
spaces.
Example
Each of the following lines consists of a single tab character followed by an
NOP instruction.
Source file:
; default tab size
NOP
NOP
NOP
.tab 4
NOP
NOP
NOP
.tab 16
NOP
NOP
NOP
Listing file:
1
2
3
4
5
7
8
9
10
12
13
14
4-76
0000 F495
0001 F495
0002 F495
0003 F495
0004 F495
0005 F495
0006 F495
0007 F495
0008 F495
; default tab size
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Assemble into .text Sections
Syntax
Description
.text
.text
The .text directive tells the assembler to begin assembling into the .text section, which usually contains executable code. The section program counter is
set to 0 if nothing has yet been assembled into the .text section. If code has
already been assembled into the .text section, the section program counter is
restored to its previous value in the section.
.text is the default section. Therefore, at the beginning of an assembly, the
assembler assembles code into the .text section unless you specify a different
sections directives (.data or .sect).
For more information about COFF sections, see Chapter 2.
Example
This example assembles code into the .text and .data sections. The .data section contains integer constants, and the .text section contains character
strings.
1
2
3
4 0000
5 0000 000a
0001 000b
6
7
8
9
10 0000
11 0000 0041
0001 0042
0002 0043
12 0003 0058
0004 0059
0005 005a
13
14 0006 0000’
15 0007 0003’
16
17
18
19
20 0002
21 0002 000c
0003 000d
22
23
24
25
26 0008
27 0008 0051
0009 0075
000a 0069
000b 0074
*****************************************
** Begin assembling into .data section.**
*****************************************
.data
.byte
0Ah, 0Bh
******************************************
** Begin assembling into .text section. **
******************************************
.text
START: .string ”A”,”B”,”C”
END:
.string ”X”,”Y”,”Z”
ADD
ADD
START, A
END, A
*******************************************
** Resume assembling into .data section.**
*******************************************
.data
.byte
0Ch, 0Dh
*******************************************
** Resume assembling into .text section.**
*******************************************
.text
.string ”Quit”
Assembler Directives
4-77
.title
Define Page Title
Syntax
Description
.title
”string”
The .title directive supplies a title that is printed in the heading on each listing
page. The source statement itself is not printed, but the line counter is incremented.
The string is a quote-enclosed title of up to 65 characters. If you supply more
than 65 characters, the assembler truncates the string and issues a warning.
The assembler prints the title on the page that follows the directive, and on subsequent pages until another .title directive is processed. If you want a title on
the first page, the first source statement must contain a .title directive.
Example
In this example, one title is printed on the first page and a different title on
succeeding pages.
Source file:
;
;
;
.title
.
.
.
.title
.page
”**** Fast Fourier Transforms ****”
”**** Floating–Point Routines ****”
Listing file:
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
Version x.xx
Sun Apr 23 16:25:49 1995
Texas Instruments Incorporated
**** Fast Fourier Transforms ****
2
;
3
;
4
;
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
1
.
.
.
Version x.xx
Sun Apr 23 16:25:49 1995
Texas Instruments Incorporated
**** Floating–Point Routines ****
4-78
PAGE
PAGE
2
Reserve Uninitialized Space
Syntax
Description
.usect
symbol .usect ”section name”, size in words [, blocking flag] [, alignment flag]
The .usect directive reserves space for variables in an uninitialized, named
section. This directive is similar to the .bss directive; both simply reserve space
for data and have no contents. However, .usect defines additional sections
that can be placed anywhere in memory, independently of the .bss section.
symbol
points to the first location reserved by this invocation of the
.usect directive. The symbol corresponds to the name of
the variable for which you’re reserving space.
section name
must be enclosed in double quotes; only the first 8
characters are significant. This parameter names the
uninitialized section.
size in words
is an expression that defines the number of words that are
reserved in section name.
blocking flag
is an optional parameter. If specified and nonzero, the flag
means that this section will be blocked. Blocking is an
address mechanism similar to alignment, but weaker. It
means a section is guaranteed to not cross a page boundary (128 words) if it is smaller than a page, and to start on
a page boundary if it is larger than a page. This blocking
applies to the section, not to the object declared with this
instance of the .usect directive.
alignment flag
is an optional parameter. This flag causes the assembler
to allocate size on long word boundaries.
Other sections directives (.text, .data, and .sect) end the current section and
tell the assembler to begin assembling into another section. The .usect and the
.bss directives, however, do not affect the current section. The assembler
assembles the .usect and the .bss directives and then resumes assembling
into the current section.
Variables that can be located contiguously in memory can be defined in the
same specified section; to do so, repeat the .usect directive with the same section name.
For more information about COFF sections, see Chapter 2.
Assembler Directives
4-79
.usect
Example
Reserve Uninitialized Space
This example uses the .usect directive to define two uninitialized, named sections, var1 and var2. The symbol ptr points to the first word reserved in the var1
section. The symbol array points to the first word in a block of 100 words
reserved in var1, and dflag points to the first word in a block of 50 words in var1.
The symbol vec points to the first word reserved in the var2 section.
Figure 4–7, page 4-81, shows how this example reserves space in two uninitialized sections, var1 and var2.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
0000
0000 E803
******************************************
**
Assemble into .text section.
**
******************************************
.text
LD
#03h, A
0000
******************************************
**
Reserve 1 word in var1.
**
******************************************
ptr
.usect ”var1”, 1
0001
******************************************
**
Reserve 100 words in var1.
**
******************************************
array
.usect ”var1”, 100
0001 F000
0002 0037
18
19
20
21
22 0065
23
24 0003 F000
0004 0065–
25
26
27
28
29 0000
30
31 0005 F000
0006 0000–
32
33
34
35
4-80
ADD
#037h, A
; Still in .text
******************************************
**
Reserve 50 words in var1.
**
******************************************
dflag
.usect ”var1”, 50
ADD
#dflag, A ; Still in .text
******************************************
**
Reserve 100 words in var2.
**
******************************************
vec
.usect ”var2”, 100
ADD
#vec, A
; Still in .text
******************************************
** Declare an external .usect symbol. **
******************************************
.global array
Reserve Uninitialized Space
.usect
Figure 4–7. The .usect Directive
section var1
ptr
section var2
1 word
array
100 words
100 words
100 words reserved in var2
dflag
50 words
151 words reserved in var1
Assembler Directives
4-81
Chapter 5
Instruction Set Summary
The TMS320C54x device supports a base set of general-purpose instructions
as well as arithmetic-intensive instructions that are particularly suited for DSP
and other numeric-intensive applications.
This chapter contains a table that summarizes the TMS320C54x instructions
alphabetically. Each table entry shows the syntax for the instruction and
describes instruction operation. Section 5.1 describes the abbreviations used
in the table and shows a sample table entry.
This chapter does not cover topics such as opcodes, instruction timing, or
addressing modes.
Topic
Page
5.1
Using the Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.2
Instruction Set Summary Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
Chapter Title—Attribute Reference
5-1
Using the Summary Table
5.1 Using the Summary Table
To help you read the summary table, this section provides an example of a
table entry and a list of acronyms.
An Example of a Table Entry
This is how the AND instruction appears in the table:
Syntax
Description
AND Smem, src
#lk, [SHIFT1,] src [, dst
#lk, 16, src [, dst]
src [, SHIFT] [, dst]
AND With Accumulator
AND the 16-bit single-addressed mode data value or a 16-bit constant with
the source accumulator (A or B). If a shift is specified, left-shift the constant
before the AND. For a left (positive) shift, the low-order bits are cleared and
the high-order bits are not sign extended. For right (negative) shift, sign is
not extended. Store the result in the destination accumulator, if specified;
otherwise, store the result in the source accumulator.
The first column lists the mnemonic and the syntax for the AND instruction.
Alternate syntax is shown in the lines following the first syntax. Abbreviations
used in syntax are found in the Symbols and Acronyms subsection.
The second column briefly describes how the instruction functions. Often, an
instruction functions slightly differently with different parameters. Read the
entire description before using the instruction.
Symbols and Acronyms
The following table lists the instruction set symbols and acronyms used
throughout this chapter.
Table 5–1. Symbols and Acronyms Used in the Instruction Set Summary
5-2
Symbol
Definition
ARP
Auxilliary register pointer
ARX
Auxiliary register (AR0–AR7)
ASM
Accumulator shift mode (from ST1)
BITX
Bit position for bit test instructions
BRC
Block repeat counter
C
Carry bit
C16
Dual 16-bit/double-precision bit
Using the Summary Table
Table 5–1. Symbols and Acronyms Used in the Instruction Set Summary (Continued)
Symbol
Definition
CC Cond
Condition code
CMPT
Compatibility mode bit
CPL
Compiler mode bit
dmad
16-bit data immediate addressed value
DP
Data page pointer
dst
Destination accumulator (A or B)
dst1, dst2
If dst1 = A, then dst2 = B
If dst1 = B, then dst2 = A
FRCT
Fractional mode bit
IFR
Interrupt flag register
INTM
Interrupt mask bit
K
Short immediate value (less than 9 bits)
lk
Long immediate value (16 bits)
Lmem
32-bit single-addressed mode value (direct or indirect) (long word
addressing)
MMR
Memory-mapped register
N
Operand for the XC instruction indicating the number of instructions to conditionally execute
1 = One instruction executes
0 = Two instructions execute
OVM
Overflow mode bit
PA
16-bit port immediate addressed value
PAR
Program address register
PC
Program counter
pmad
16-bit program immediate addresed value
REA
Reset end address
RC
Repeat counter
RSA
Reset start address
SBIT
Status register bit for RSBX/SSBX instruction
0 SBIT 15
Instruction Set Summary
5-3
Using the Summary Table
Table 5–1. Symbols and Acronyms Used in the Instruction Set Summary (Continued)
Symbol
Definition
SHIFT
Shift value in –16 to +15 range
SHIFT1
Shift value in 0 to 15 range
SHIFT2
Shift value in 0 to 16 range
Sind
Single indirect address mode
Smem
16-bit single-addressed mode value (direct or indirect)
SP
Stack pointer register
src
Source accumulator (A or B)
stn
Status register (0 or 1)
SXM
Sign extension mode bit
TC
Test/control flag bit
TREG
Temporary register
TRN
Transition register
TS
Shift value held in TREG (–16, +31 range)
Xmem
16-bit dual addressed mode value (indirect only) used in dual operand instructions and some single operand instructions
Ymem
16-bit dual addressed mode value (indirect only) used mainly in
dual operands instructions
Z
Delay instruction bit
0 = Execute without delay
1 = Delay
5-4
()
Contents of
[ ]
Optional items
#
Prefix of constants used in immediate addressing
||
Parallel instructions
Summary Table
5.2 Summary Table
Syntax
Description
ABDST Xmem, Ymem
Absolute Distance
Compute the distance of two vectors, based on the absolute value. Each
vector is a 16-bit dual addressed mode value from data memory. If FRCT
is set, the absolute value is multiplied by 2. Absolute value is computed on
bits 32 to 16 of accumulator A.
ABS src [, dst]
Absolute Value of Accumulator
Load the absolute value of the source accumulator into the destination
accumulator. If no destination is given, load the absolute value into the
source accumulator.
ADD Smem, src
Smem, TS, src
Smem, 16, src [, dst ]
Smem, [SHIFT,] src [, dst ]
Xmem, SHIFT1, src
Xmem, Ymem, dst
#lk, [SHIFT2,] src [, dst ]
src [, SHIFT] [, dst ]
src, ASM [, dst ]
Add to Accumulator
Add the 16-bit value, shifted if indicated, to the value of the selected accumulator (A or B) or to the 16-bit dual-addressed mode value (Ymem). Store
the result in the destination accumulator, if specified; otherwise, store the
result in the source accumulator.
The 16-bit value can be a 16-bit single-addressed mode value or a 16-bit
dual-addressed mode value. It can also be a 16-bit long Immediate value,
or the value of the accumulator shifted in the –16 to +15 range.
For a left shift, the low-order bits are cleared and high-order bits are sign
extended if SXM = 1 or cleared if SXM = 0. For a right shift, the high-order
bits are sign-extended if SXM = 1 or cleared if SXM = 0. For instructions
indicating a 16-bit shift, if the result of the addition generates a carry, C is
set to 1, otherwise C is not affected.
ADDC Smem, src
Add to Accumulator With Carry
Add the 16-bit single-addressed mode value from the data memory location
and the value of C to the source accumulator. Sign-extension is suppressed
regardless of the SXM value. Store the result in the accumulator.
ADDM lk, Smem
Add to Memory Long Immediate
Add the 16-bit single-addressed mode value from a data memory location
to the 16-bit long immediate memory value. Store the result in the data
memory location specified by Smem.
ADDS Smem, src
Add to Accumulator With Sign Extension Suppressed
Add the 16-bit single-addressed mode value from data memory to the
source accumulator. Store the result in the accumulator. Sign-extension is
suppressed regardless of the SXM value.
Instruction Set Summary
5-5
Summary Table
Syntax
Description
AND Smem, src
#lk, [SHIFT1,] src [, dst ]
#lk, 16, src [, dst ]
src [, SHIFT] [, dst ]
AND With Accumulator
ANDM lk, Smem
AND the 16-bit single-addressed mode data value or a 16-bit constant with
the source accumulator (A or B). If a shift is specified, left-shift the data value
before the AND. For a left (positive) shift, the low-order bits are cleared and
the high-order bits are not sign extended. For right (negative) shift, sign is
not extended. Store the result in the destination accumulator, if specified;
otherwise, store the result in the source accumulator.
AND Memory With Long Immediate
AND the 16-bit single-addressed mode data memory value with a 16-bit
long constant. Store the result in the data memory location specified by
Smem.
B pmad
BD pmad
Branch Unconditionally
Pass control to the designated program memory address (pmad). pmad can
be either a symbolic or numeric address.
For a delayed branch (BD), the one 2-word instruction or the two 1-word
instructions following the branch instruction are fetched from program
memory and executed before the branch is taken.
BACC src
BACCD src
Branch to Address Specified by Accumulator
Pass control to the 16-bit address residing in the lower part of the source
accumulator.
For a delayed branch (BACCD), the one 2-word instruction or the two
1-word instructions following the branch instruction are fetched from program memory and executed before the branch is taken.
BANZ pmad, Sind
BANZD pmad, Sind
Branch on Auxiliary Register Not Zero
Pass control to the designated program memory address (pmad). If the
value of the current auxiliary register designated by Sind (single indirect
address mode) is not equal to 0, branch to the specified program memory
address; otherwise, add two to the program counter and store the result in
the program counter.
For a delayed branch (BANZD), the one 2-word instruction or the two
1-word instructions following the branch instruction are fetched from program memory and executed before the branch is taken.
5-6
Summary Table
Syntax
Description
BC pmad, cond [, cond] [, cond]
BCD pmad, cond [, cond] [, cond]
Branch Conditionally With Optional Delay
If the specified condition is met, pass control to the designated program
memory address (pmad). The one 2-word instruction or the two 1-word
instructions following the branch instruction are fetched from program
memory and executed before the branch is taken. If the specified condition
is not met, increment the PC by two.
For a delayed branch (BCD), the one 2-word instruction or the two 1-word
instructions have no effect on the condition tested.
BC[D] allows you to choose one or multiple conditions from two groups as
shown below. You can select conditions from group 1 or group 2, but you
cannot select conditions from both groups:
Group 1: You can select two conditions from group 1, but you cannot
select two conditions from the same column. For example, you can
select srcEQ and srcOV, but you cannot select srcEQ and srcGEQ.
Group 2: You can select three conditions from group 2, but you cannot
select more than one condition from each column. For example, you
can select C, BIO, and TC, but you cannot select C, NC, and BIO.
Conditions for Group 1:
srcEQ
srcOV
srcNEQ
srcNOV
srcLT
srcLEQ
srcGT
srcGEQ
Conditions for Group 2:
C
BIO
TC
NC
NBIO
NTC
At least one condition must be chosen. Not all combinations are meaningful.
cond:
BIO
NBIO
C
NC
TC
NTC
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
srcOV
srcNOV
UNC
BIO low
BIO high
C=1
C=0
TC = 1
TC = 0
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
src overflow
src no overflow
Uncondition
Instruction Set Summary
5-7
Summary Table
Syntax
Description
BIT Xmem, BITX
Test Bit
Copy the specified bit of the dual mode 16-bit data memory value into the
TC bit of status register ST0. Each bit code (BITX) corresponds to a bit
number in the data memory value.
Bit Code (BITX)
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
BITF Smem, lk
Bit Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Test Bit Field Specified by Immediate Value
Test the specified bit of the data memory value by masking the data value
with an immediate value (lk). To mask the data value, lk is ANDed with
Smem. If the specified bit is 0, the TC bit in status register ST0 is cleared
to 0, otherwise, TC is set to 1.
5-8
Summary Table
Syntax
Description
BITT Smem
Test Bit Specified by TREG
Copy the specified bit of the data memory value to the TC bit in status register ST0. The four LSBs of TREG contain a bit code that specifies which bit
is copied.
Bit Code
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
CALA src
CALAD src
Bit Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Call Subroutine at Location Specified by Accumulator
Increment the PC and push it onto the stack; then pass control to the 16-bit
address residing in the lower part of the source accumulator.
For a delayed branch (CALAD), the one 2-word instruction or the two 1-word
instructions following the call instruction are fetched from program memory
and executed before the call.
CALL pmad
CALLD pmad
Call Unconditionally With Optional Delay
Pass control to the specified program memory address (pmad). Push the
return address onto the stack.
For a delayed call (CALLD), the next two instruction words (one 2-word
instruction or two 1-word instructions) are fetched and executed before the
call is taken.
Instruction Set Summary
5-9
Summary Table
Syntax
Description
CC pmad cond1 [, cond] [, cond]
CCD pmad cond1 [, cond]
[, cond]
Call Conditionally With Optional Delay
If the specified conditions are met, push the return address onto the stack,
then pass control to the program memory address (pmad). The one 2-word
instruction or the two 1-word instructions following the branch instruction
are fetched from program memory and executed before the branch is taken.
If the specified condition is not met, increment the PC by two.
For a delayed call (CCD), the next two instruction words (one 2-word
instruction or two 1-word instructions) are fetched and executed before the
call is taken.
CC[D] allows you to choose one or multiple conditions from two groups as
shown below. You can select conditions from group 1 or group 2, but you
cannot select conditions from both groups:
Group 1: You can select two conditions from group 1, but you cannot
select two conditions from the same column. For example, you can
select srcEQ and srcOV, but you cannot select srcEQ and srcGEQ.
Group 2: You can select three conditions from group 2, but you cannot
select more than one condition from each column. For example, you
can select C, BIO, and TC, but you cannot select C, NC, and BIO.
Conditions for Group 1:
srcEQ
srcOV
srcNEQ
srcNOV
srcLT
srcLEQ
srcGT
srcGEQ
Conditions for Group 2:
C
BIO
TC
NC
NBIO
NTC
At least one condition must be chosen. Not all combinations are meaningful.
cond:
BIO
NBIO
C
NC
TC
NTC
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
srcOV
srcNOV
UNC
5-10
BIO low
BIO high
C=1
C=0
TC = 1
TC = 0
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
src overflow
src no overflow
Uncondition
Summary Table
Syntax
Description
CMPL src [, dst ]
Complement Accumulator
Complement the value of the source accumulator (logical inversion). The
result is stored in the destination accumulator.
CMPM Smem, lk
Compare Memory With Long Immediate
Compare the 16-bit single-addressed mode value to the 16-bit constant
specified in the instruction. If Smem = lk then TC is set to 1; otherwise, TC
is cleared.
CMPR CC, ARX
Compare Auxiliary Register With AR0
Compare the condition of the designated auxiliary register (ARX) to AR0
and place the result in the TC bit. The comparison is specified by the CC
value. If the condition is true, TC is set to 1. If the condition is false, TC is
cleared. All conditions are computed as unsigned operations.
CC = 0 or EQ : Test if (ARX) = (AR0)
CC = 1 or LT : Test if (ARX) < (AR0)
CC = 2 or GT : Test if (ARX) > (AR0)
CC = 3 or NE : Test if (ARX) (AR0)
CMPS src, Smem
Compare Select Max and Store
Compare the two 16-bit signed values located in the 16 MSBs and the 16
LSBs of the source accumulator (considered 2s-complement values). Store
the maximum value in the 16-bit single-addressed memory location. Shift
TRN left one bit.
If the value in the 16 MSBs of the accumulator is the maximum value, the
TRN 0 bit is cleared and TC is cleared. If the value in the LSBs of the accumulator is the maximum value, set the TRN 0 bit to 1 and set TC to 1.
This instruction does not conform to standard pipeline operation. The
comparison is performed in the read phase, so the src value is the value of
the source accumulator one cycle before the CMPS instruction executes.
TRN and TC are updated at the execution phase.
Instruction Set Summary
5-11
Summary Table
Syntax
Description
DADD Lmem, src [, dst ]
Double Precision/Dual Mode Add to Accumulator
Add the value of the source accumulator to the 32-bit long-addressed mode
value. The value of C16 determines how the instruction is treated:
If C16 is not set, the instruction is treated as double-precision mode.
The 40-bit long accumulator value is added to the 32-bit long word, and
the saturation and overflow bits are set as indicated.
If C16 is set, the instruction is treated as a dual 16-bit mode add. The
accumulator high is added to the 16 MSBs of the memory location, and
the accumulator low is added to the 16 LSBs of the memory location.
The saturation and overflow bits are not affected in this mode.
The result of the operation is stored in the destination accumulator, if specified; otherwise, the result is stored in the source accumulator.
This instruction uses long word (32-bit) operands. When C16 is set (dual
16-bit mode), the result is not saturated, regardless of the value of the OVM
bit.
DADST Lmem, dst
Double Precision Load With TREG Add/Dual 16-Bit Load With TREG
Add/Subtract
The value of C16 determines the execution of the instruction:
If C16 is not set, the instruction is treated as double-precision mode.
The value of TREG is left–shifted 16 bits and ORed with itself. The
resulting 32-bit value is added to the 32-bit long memory word, and the
result is stored in the destination accumulator.
If C16 is set, the instruction is treated as dual 16-bit mode. The 16
MSBs of the long memory location are added to the value of TREG and
stored in the upper 24 bits of the destination accumulator. At the same
time, the value of TREG is subtracted from the 16 LSBs of the memory
location. The result is stored in the destination accumulator low.
This instruction uses long word (32 bit) operands. It is meaningful only if C16
is set (dual 16-bit mode). The result is not saturated when C16 = 1, regardless of the value of the OVM bit.
DELAY Smem
Memory Delay
Copy the data memory value referenced by Smem into the next higher
address. When the data is copied, the content of the addressed location
remains the same. This function is useful in implementing the Z delay
encountered in digital signal processing. This functionality is also contained
in the LTD and MACD instructions.
DLD Smem, dst
Long Word Load to Accumulator
Load the destination accumulator with a 32-bit long operand value.
5-12
Summary Table
Syntax
Description
DRSUB Lmem, src
Double Precision/Dual 16-Bit Subtract From Long Word
The value of C16 determines the execution of the instruction:
If C16 is not set, the instruction is treated as double-precision mode.
The value of the source accumulator (32 bits) is subtracted from the
32-bit long memory word. The result is stored in the source accumulator.
If C16 is set, the instruction is treated as dual 16-bit mode. The source
accumulator high is subtracted from the 16 MSBs of the long memory
location, and the result is stored in the accumulator high. At the same
time, the source accumulator low is subtracted from the 16 LSBs of the
memory location, and the result is stored in the accumulator low.
When C16 is set (dual 16-bit mode), the result is not saturated, regardless
of the value of the OVM bit.
DSADT Lmem, dst
Long Load With TREG Add/Dual 16-Bit Load With TREG
Subtract/Add
The value of C16 determines the execution of the instruction:
If C16 is not set, the instruction is treated as double-precision mode.
The value of TREG is left-shifted 16 bits and ORed with itself. The
resulting 32-bit value is subtracted from the 32-bit long memory word.
The result is stored in the destination accumulator.
If C16 is set, the instruction is treated as dual 16-bit mode. The value
of TREG is subtracted from the 16 MSBs of the long memory location,
and the result is stored in the destination accumulator high. At the same
time, the value of TREG is added to the 16 LSBs of the memory location, and the result is stored in the destination accumulator low.
This instruction uses long word (32 bit) operands. It is meaningful only if C16
is set (dual 16-bit mode). The result is not saturated when C16 = 1, regardless of the value of the OVM bit.
DST src, Lmem
Store Accumulator in Long Word
Store the value of accumulator A or B in a 32-bit long memory word.
Instruction Set Summary
5-13
Summary Table
Syntax
Description
DSUB Lmem, src
Double Precision/Dual 16-Bit Subtract From Accumulator
The value of C16 determines the execution of the instruction:
If C16 is not set, the instruction is treated as double-precision mode.
The value of the 32-bit long memory word is subtracted from the source
accumulator (32 bits), and the result is stored in the accumulator.
If C16 is set, it is treated as dual 16-bit mode. The value of the 16 MSBs
of the long memory location is subtracted from the source accumulator
high, and the result is stored in the accumulator high. At the same time,
the 16 LSBs of the long memory location are subtracted from the
source accumulator low, and the result is stored in the accumulator low.
This instruction uses long word (32 bit) operands.
DSUBT Lmem, dst
Long Load With TREG Subtract/Dual 16-Bit Load With TREG
Subtract
The value of C16 determines the execution of the instruction:
If C16 is not set, the instruction is treated as double-precision mode.
The value of TREG is left-shifted 16 bits and ORed with itself. The
resulting 32-bit value is subtracted from the 32-bit long memory word.
The result is stored in the destination accumulator.
If C16 is set, it is treated as dual 16-bit mode. The value of TREG is subtracted from the 16 MSBs of the long memory word, and the result is
stored in the destination accumulator high. At the same time, the value
of TREG (16 bits) is subtracted from the 16 LSBs of the memory location, and the result is stored in the destination accumulator low.
This instruction uses long word (32 bit) operands. It is meaningful only if C16
is set (dual 16-bit mode). The result is not saturated when C16 = 1, regardless of the value of the OVM bit.
EXP src
Accumulator Exponent
Compute the exponent value defined as a signed 2s-complement value in
the –8 to +31 range, and store the result in TREG.
The number of leading bits is equivalent to the number of left shifts needed
to eliminate the bits from the 40-bit accumulator with the exception of the
sign bit. The value 8 is subtracted from the number of leading bits resulting
in a negative exponent value for accumulator values having a significant bit
among the guard bits (the eight upper bits of the accumulator used in error
detection/correction).
The source accumulator is not modified after this instruction.
5-14
Summary Table
Syntax
Description
FIRS Xmem, Ymem, pmad
Symmetrical Finite Impulse Response Filter
Multiply the accumulator A[32–16] by the program memory value (pmad).
Accumulate the result in accumulator B. At the same time, add the two data
memory values (Xmem and Ymem), left-shift the result 16 bits, and store
the result into accumulator A. When FIRS is repeated, the program memory
address is incremented by 1 during execution. Once the repeat pipeline is
started, the instruction becomes a single-cycle instruction. FIRS is useful
to implement symmetrical FIR filters.
FRAME K
Stack Pointer Immediate Offset
Perform a short immediate offset on the stack pointer. There is no latency
for the address generation with the compiler mode (CPL = 1) or for stack
manipulation by the next instruction.
IDLE K
Idle Until Interrupt
Forces the executing program to halt until an unmasked interrupt or reset
occurs. The PC is incremented only once, and the device remains in an idle
state (power-down mode) until it is interrupted.
The idle state is exited by an unmasked interrupt, even if INTM = 1. If INTM
= 1, the program will continue executing the instruction following the idle. If
INTM = 0, the program will branch to the corresponding interrupt service
routine. The interrupt service routine is enabled by the IMR, regardless of
the INTM value. This interrupt depends on the option parameter (K)
described below:
K = 1 : Peripherals remain active (timer serial ports). The peripheral
interrupts as well as the reset or external interrupts will remove the
processor from idle mode.
K = 2 : Peripherals are inactive (timer serial ports). Because interrupts
are not latched, as in normal device operation, idle mode is exited by
a low logic level on an external interrupt or reset with a duration of at
least one shot low pulse or five machine cycles (’C540).
K = 3 : Peripherals are inactive (timer serial ports). The PLL is halted
in this mode. Because interrupts are not latched, as in normal device
operation, idle mode is exited by a low logic level on an external interrupt or reset with a duration of at least one shot low pulse or five
machine cycles (’C540).
The number of cycles depends on the idle period. Because the whole device
is halted when K = 3, the number of cycles cannot be specified.
Instruction Set Summary
5-15
Summary Table
Syntax
Description
INTR K
Software Interrupt
Transfer program control to the corresponding interrupt vector specified by
K. This instruction allows you to use your software to execute any interrupt
service routine.
During execution of the instruction, the value of PC + 1 are pushed onto the
stack. Note that the interrupt mask has no effect on the INTR instruction, the
corresponding bit in the IFR is cleared, and interrupts are globally disabled
(INTM = 1).
LD Smem, dst
Smem, TS, dst
Smem, 16, dst
Smem, [SHIFT,] dst
Xmem, SHIFT1, dst
#K, dst
#lk, [SHIFT1,] src [, dst ]
#lk, 16, src [, dst ]
src, ASM [, dst ]
src, [SHIFT,] dst
Load Accumulator With Shift
Load destination accumulator with a data memory value or an immediate
value. This instruction has various shift capabilities. Accumulator–to-accumulator move with immediate shift or accumulator shift mode is supported.
Load TREG or Status Register
LD Smem, T
Smem, DP
Smem, ASM
LD #k9, DP
#k5, ASM
#k3, ARP
LDM MMR, dst
Load a data memory value into TREG or the specified bit field of the
status register (DP or ASM).
Load an immediate value into the specified bit field of the status register
(DP, ASM, ARP).
0 k9 511
–16 k5 +15
0 k3 7
Load Memory Mapped Register
Load the accumulator with a memory-mapped register value. The nine
MSBs of the effective address are cleared to 0 regardless of the current
value of DP or the upper nine bits of ARX. This instruction is not affected by
the value of the SXM.
LD Xmem, dst1
|| MAC Ymem [, dst2 ]
LD Xmem, dst1
|| MACR Ymem [, dst2 ]
5-16
Multiply/Accumulate With/Without Rounding and Parallel Load
Multiply the dual-addressed data memory value Ymem by the value of
TREG and add the result of the multiplication to the accumulator that is not
the destination accumulator (dst2). In parallel, load the destination accumulator high with dual-addressed data memory value Xmem. If rounding is
selected (specified by the R suffix), 215 is added to the result of the multiplication/addition and the 16 LSBs of the result are cleared.
Summary Table
Syntax
Description
LD Xmem, dst
|| MAS Ymem [, dst2 ]
Multiply/Subtract With/Without Rounding and Parallel Load
LD Xmem, dst
|| MASR Ymem [, dst2 ]
LDR Smem, dst
Multiply the dual-addressed data memory value Ymem by the value of
TREG and subtract the result of the multiplication from the accumulator that
is not the destination accumulator (dst2). In parallel, load the destination
accumulator high with the dual-addressed data memory value Xmem. If
rounding is selected (specified by the R suffix), 215 is added to the result of
the multiplication/subtraction and the 16 LSBs of the result are cleared.
Load Memory Value in Accumulator High With Rounding
Load the data memory value into accumulator high. The value is rounded
by adding 1/2 LSB, that is, the 15 low bits (14–0) of the accumulator are
cleared to 0 and bit 15 is set to 1.
LDU Smem, dst
Load Memory Unsigned Value
Load the data memory value into accumulator low. Guard bits and accumulator high are cleared. Data is then treated as an unsigned 16-bit number.
There is no sign extension, regardless of the value of SXM.
LMS Xmem, Ymem
Least Mean Square Instruction
Sets up the basis for computing the least mean square. Replace the value
of the accumulator B with the result of B plus Xmem multiplied by Ymem.
Replace the value of accumulator A with the result of A plus Xmem leftshifted 16 bits and added to 215. Xmem is not overwritten to TREG, so
TREG always contains the error value for coefficient update. After the
instruction executes, the high bits of accumulator A contain the rounded
16-bit coefficient.
LTD Smem
Load TREG and Memory Delay
Load the data memory value into TREG, and copy the value to the next
higher address. When the data is copied, the content of the addressed location remains unchanged. This function is useful in implementing the Z delay
encountered in digital signal processing. This functionality is also contained
in the DELAY and MACD instructions.
Instruction Set Summary
5-17
Summary Table
Syntax
Description
Multiply/Accumulate With/Without Rounding
There are four versions of the MAC/MACR instruction:
Multiply TREG by a 16-bit single- or dual-addressed mode data
memory value and add the product to the source accumulator. Store
the result in the source accumulator.
Multiply TREG by an immediate value and add the product to the accumulator (MAC only). Store the result in the destination accumulator, if
specified; otherwise, store the result in the source accumulator.
MAC Xmem, Ymem, src [, dst ]
MACR Xmem, Ymem, src [, dst ]
Multiply two 16-bit dual addressed mode values (Xmem and Ymem)
and add the product to the accumulator. Store the result in the destination accumulator, if specified; otherwise, store the result in the source
accumulator. After this instruction, TREG contains the Xmem value.
MAC Smem, #lk, src [, dst ]
Multiply a 16-bit single-addressed mode data memory value by a 16-bit
immediate value and add the product to the accumulator (MAC only).
Store the result in the destination accumulator, if specified; otherwise,
store the result in the source accumulator. After this instruction, TREG
contains the data memory value.
MAC Smem, src
MACR Smem, src
MAC
#lk, src [, dst ]
If rounding is selected (specified by the R suffix), 215 is added to the result
of the multiplication/addition and the 16 LSBs of the result are cleared.
Multiply by Accumulator A and Accumulate
There are two versions of the MACA/MACAR instruction:
MACA Smem, [, B]
MACAR Smem, [, B]
MACA T, src [, dst ]
MACAR T, src [, dst ]
Multiply the high bits of accumulator A by a single-addressed mode
data memory value, and add the product to the value of accumulator
B. Store the result in accumulator B.
Multiply the high bits of accumulator A by the value of TREG, and add
the product to the value of the source accumulator (A or B). If a destination is specified, store the result in the destination accumulator. If no
destination is specified, store the result in the source accumulator.
Accumulator A high (A(32–16)) is used as a 17-bit operand for the multiplier.
If rounding is selected (specified by the R suffix), 215 is added to the result
of the multiplication/addition and the 16 LSBs of the result are cleared.
MACD Smem, pmad, src
Multiply by Program Memory and Accumulate With Delay
Multiply a data memory value by a program memory value. Add the product
to the source accumulator value and store the result in that accumulator.
The data memory value is copied into TREG and into the next higher
address. When this instruction is repeated, the program memory address
is incremented. Once the repeat pipeline starts, the instruction becomes a
single-cycle instruction.
5-18
Summary Table
Syntax
Description
MACP Smem, pmad, src
Multiply by Program Memory and Accumulate
Multiply a data memory value by a program memory value. Add the product
to the source accumulator value and store the result in that accumulator.
The data memory value is copied into TREG. When this instruction is
repeated, the program memory address is incremented. Once the repeat
pipeline starts, the instruction becomes a single-cycle instruction.
MACSU Xmem, Ymem, src
Multiply Signed by Unsigned and Accumulate
Multiply a 16-bit unsigned data memory value (Xmem) by a 16-bit signed
data memory value (Ymem), and add the product to the source accumulator. Store the resutl in the source accumulator. The 16-bit unsigned data
memory value is stored in TREG.
MAR Smem
Modify Auxiliary Register
This instruction works in indirect addressing mode. The value of CMPT
determines the execution of the instruction:
Compatibility mode is on (CMPT = 1) : If ARX = AR0 or if ARX = null,
modify the auxilliary register pointed to by ARP. ARP is unchanged. If
X is a nonnull value, then modify the auxillliary register and place the
value X into ARP.
Compatibility mode is off (CMPT = 0) : Modify ARX, but do not change
ARP.
If direct addressing is used, MAR functions as a NOP.
Multiply and Subtract
There are two versions of the MAS/MASR instruction:
MAS Smem, src
MASR Smem, src
Multiply TREG by a 16-bit single-addressed mode data memory value,
and subtract the product from the accumulator. Store the result in the
source accumulator.
MAS Xmem, Ymem, src [, dst ]
MASR Xmem, Ymem, src [, dst ]
Multiply two 16-bit dual addressed mode values (Xmem and Ymem),
and subtract the product from the accumulator. Store the result in the
destination accumulator, if specified; otherwise, store the result in the
source accumulator. After the instruction, TREG contains the Xmem
value.
If rounding is selected (specified by the R suffix), 215 is added to the result
of the multiplication/subtraction and the 16 LSBs of the result are cleared.
Instruction Set Summary
5-19
Summary Table
Syntax
Description
Multiply by Accumulator A and Subtract
There are two versions of the MASA instruction:
MASA Smem [, B]
Multiply the high bits of accumulator A by a 16-bit single-addressed
mode data memory (Smem) value, and subtract the product from accumulator B (MASA only). Store the result in accumulator B. After the
instruction, TREG contains the Smem value.
MASA T, src [, dst ]
MASAR T, src [, dst ]
Multiply the high bits of accumulator A by the TREG value. Subtract the
product from the source accumulator. Store the result in the destination
accumulator, if specified; otherwise, store the result in the source accumulator.
If rounding is selected (specified by the R suffix), 215 is added to the
result of the multiplication/subtraction and the 16 LSBs of the result are
cleared.
MAX dst
Accumulator Maximum
Compare the values of the accumulators, and store the maximum value in
the destination accumulator. If the value in accumulator A is the maximum
value, the carry bit is cleared; otherwise, the carry bit is set to 1.
MIN dst
Accumulator Minimum
Compare the values of the accumulators, and store the minimum value in
the destination accumulator. If the value in accumulator A is the minimum
value, the carry bit is cleared; otherwise, the carry bit is set to 1.
Multiply
There are three versions of the MPY instruction:
MPY Smem, dst
MPYR Smem, dst
MPY #lk, dst
Multiply the value of TREG by the value of the single-addressed data
memory location (unsigned) or by the 16-bit constant (MPY only). Store
the result in the destination accumulator.
If rounding is selected (specified by the R suffix), 215 is added to the
result of the multiplication/subtraction and the 16 LSBs of the result are
cleared.
MPY Smem, #lk, dst
Multiply the value of the single-addressed data memory location
(unsigned) by the 16-bit constant #lk (MPY only). Store the result in the
destination accumulator.
MPY Xmem, Ymem, dst
Multiply the value of the 16-bit dual addressed data memory location
Xmem by the 16-bit dual addressed data memory location Ymem.
Store the result in the destination accumulator.
5-20
Summary Table
Syntax
Description
Multiply by Accumulator A
There are two versions of the MPYA instruction:
MPYA dst
Multiply the high bits of accumulator A by the value of TREG. Store the
result in the destination accumulator.
MPYA Smem
Multiply the high bits of accumulator A by the value of the singleaddressed data memory location. Store the result in accumulator B.
After this instruction, TREG contains the Smem value.
Accumulator A(32–16) (17-bit value) is used as an input operand of the
multiplier.
MPYU Smem, dst
Multiply Unsigned
Multiply the unsigned value of TREG by the unsigned value of the singleaddressed data memory location Smem. Store the result in the destination
accumulator.
The multiplier acts as a signed 1717 bit multiplier for this instruction, with
the MSB of both operands cleared to 0.
The MPYU instruction is particularly useful for computing multiple-precision
products, such as when multiplying two 32-bit numbers to yield a 64-bit
product.
MVDD Xmem, Ymem
Move Data From Data Memory to Data Memory With X, Y
Addressing
Move the value of the data memory location addressed by Xmem to the data
memory location addressed by Ymem.
MVDK Smem, dmad
Move Data From Data Memory to Data Memory With Destination
Addressing
Move the value of the addressed data memory location (Smem) to a data
memory location addressed by a long immediate value (dmad). This
instruction can be used in single repeat indirect addressing mode to move
consecutive words in data memory. The number of words to be moved is
one greater than the number contained in the repeat counter at the beginning of the instruction.
MVDM dmad, MMR
Move Data From Data Memory to Memory-Mapped Register
Move the value of the immediate-addressed data memory location (dmad)
to a memory-mapped register (MMR). The word of the source space is
addressed with a long immediate value.
When MVDM is repeated, it executes in one cycle.
Instruction Set Summary
5-21
Summary Table
Syntax
Description
MVDP Smem, pmad
Move Data From Data Memory to Program Memory
Move a 16-bit single-addressed mode value (Smem) to a program memory
location addressed by a long immediate value (dmad). The RPT instruction
can be used with MVDP to move consecutive words indirectly addressed
in data memory to a contiguous program memory space addressed by long
immediate values.
Note that source and destination blocks do not have be entirely on-chip or
off-chip. When used with RPT, MVDP becomes a single-cycle instruction
after the RPT pipeline starts; additionally, interrupts are inhibited. When
MVDP is repeated, it executes in one cycle.
MVKD dmad, Smem
Move Data From Data Memory to Data Memory With Source
Addressing
Move the value of the immediate-addressed data memory location dmad to
a 16-bit single-addressed mode value (Smem). The word of the source
space is addressed with a long immediate value.
The MVKD instruction can be used with the RPT instruction to move consecutive words in data memory. The number of words to be moved is one
greater than the number contained in the repeat counter at the beginning
of the instruction. When MVKD is repeated, it executes in one cycle.
MVMD MMR, dmad
Move Data From Memory-Mapped Register to Data Memory
Move the 16-bit dual-addressed value found in the memory-mapped register MMR to the 16-bit immediate-addressed value dmad. The word of the
destination space is addressed with a long immediate value.
When MVMD is repeated, it executes in one cycle.
MVMM MMR1, MMR2
Move Data From Memory-Mapped Register to Memory-Mapped
Register
Move the value of the memory-mapped register MMR1 to the memorymapped register MMR2. Operands can only be the nine memory mappedregisters: AR0 – AR7 and SP. The read operation from MMR1 is executed
in the decode phase. The write operation to MMR2 is executed as a MAR
operation in the access phase.
MVPD pmad, Smem
Move Data From Program Memory to Data Memory
Move the 16-bit single-addressed value found in the program memory
address pmad to a data memory location addressed by Smem. The RPT
instruction can be used with MVPD to move consecutive words addressed
by a long immediate program memory address to a contiguous data
memory space addressed by Smem.
Note that source and destination blocks do not have be entirely on-chip or
off-chip. When RPT is used with MVPD, it becomes a single-cycle instruction after the RPT pipeline starts. In addition, when MVPD is repeated, interrupts are inhibited.
5-22
Summary Table
Syntax
Description
NEG src [, dst ]
Negate Accumulator
Negate (1s-complement) the value of the source accumulator (A or B). The
value is stored in the source accumulator or in the destination accumulator,
if given. The carry bit is cleared to 0 by this instruction for all nonzero values
of the accumulator. If the accumulator equals 0, the carry bit is set to 1.
NOP
No Operation
No operation is performed. Only the program counter is incremented. NOP
is useful to create pipeline and execution delays.
NORM src [, dst ]
Normalization
Allow single cycle normalization of the accumulator once the EXP instruction has been executed. The shift value is defined by TREG[5:0] and coded
as a 2s-complement value. For the normalization, the CALU shifter requires
the TREG value that contains the shift value in the read phase and executes
normalization in the execution phase.
OR With Accumulator
There are three versions of the OR instruction:
OR Smem, src
OR the 16 LSBs of the source accumulator with the value of the
addressed data memory location. The result replaces the 16 LSBs of
the source accumulator, leaving the rest of the accumulator
unchanged.
OR #lk, [SHIFT2,] src [, dst ]
OR the source accumulator with a 16-bit immediate addressed value,
left-shifted as indicated (0 to 16 range). Store in the destination accumulator, if specified; otherwise, store in the source accumulator.
OR src [, SHIFT] [, dst ]
OR the source accumulator with itself or the destination accumulator,
if specified, left shifted as indicated (–16 to +15 range). Store in the destination accumulator, if specified; otherwise, store in the source accumulator.
For a positive (left) shift, low-order bits are cleared and high-order bits are
not sign extended. For a negative (right) shift, sign is not extended.
ORM #lk, Smem
OR Memory With Constant
OR the 16-bit single-addressed mode value Smem with the 16-bit constant
lk. Store the result in Smem. ORM is a memory-to-memory operation.
POLY Smem
Polynomial Evaluation
Shift the value of the 16-bit single-addressed mode value Smem 16 bits to
the left, and store the result in accumulator B. In parallel, multiply the value
of accumulator A (17 MSBs) by the value of TREG, add it to accumulator
B, and round the result. Store the result in accumulator A.
This instruction is useful for polynomial evaluation in implementing onecycle-per-monomial computation. A(32–16) (17 bits) is an input operand of
the multiplier.
Instruction Set Summary
5-23
Summary Table
Syntax
Description
POPD Smem
Pop Top of Stack to Data Memory
Move the value of the data memory addressed by the stack pointer to the
memory specified by Smem. Increment the stack pointer by 1. SP has a twocycle latency for address generation in the decode phase, regardless of the
value of CPL.
POPM MMR
Pop Top of Stack to Memory-Mapped Register
Move the value of the data memory addressed by the stack pointer to specified memory-mapped register. Increment the stack pointer by 1.
PORTR PA, Smem
Read Data From Port
Read a 16-bit value from an external I/O port (PA) into the specified data
memory location (Smem). The IS line goes low to indicate an I/O access and
the IOSTRB and READY timings are explicit I/O write. The number of cycles
depends on external I/O operation.
PORTR can be used with the RPT instruction to read in consecutive words
from I/O space to data space.
PORTW Smem, PA
Write Data to Port
Write a 16-bit value to an external I/O port (PA) from the specified data
memory location (Smem). The IS line goes low to indicate an I/O access and
the IOSTRB and READY timings are explicit I/O read. The number of cycles
depends on external I/O operation.
PORTW can be used with the RPT instruction to write consecutive words
from data space to I/O space.
PSHD Smem
Push Data Memory Value Onto Stack
Decrement the stack pointer by 1. Move the value of the addressed data
memory location (Smem) to the data memory location addressed by the
stack pointer. The stack pointer is read at the decode phase; it is stored at
the access phase.
PSHM MMR
Push Memory-Mapped Register Onto Stack
Decrement the stack pointer by 1. Move the value of the selected memory
mapped register to the data memory location addressed by the stack
pointer. The stack pointer is read at the decode phase; it is stored at the
access phase.
5-24
Summary Table
Syntax
Description
RC cond [, cond] [, cond]
RCD cond [, cond] [, cond]
Return Conditionally With Optional Delay
If the specified condition is met, return from subroutine. Replace the
program counter with the data memory value addressed by the stack
pointer and increment the stack pointer by 1. If the condition is not met,
increment the PC by 1.
For a delayed return (RCD), fetch the next two instruction words
(two 1-word instructions or one 2-word instruction) and execute them
before the return. The two instruction words have no effect on the condition(s) being tested.
RC[D] allows you to choose one or multiple conditions from two gourps as
shown below. You can select conditions from group 1 or group 2, but you
cannot select conditions from both groups:
Group 1: You can select two conditions from group 1, but you cannot
select two conditions from the same column. For example, you can
select srcEQ and srcOV, but you cannot select srcEQ and srcGEQ.
Group 2: You can select three conditions from goup 2, but you cannot
select more than one condition from each column. For example, you
can select C, BIO, and TC, but you cannot select C, NC, and BIO.
Conditions for Group 1:
srcEQ
srcOV
srcNEQ
srcNOV
srcLT
srcLEQ
srcGT
srcGEQ
Conditions for Group 2:
C
BIO
TC
NC
NBIO
NTC
At least one condition must be chosen. Not all combinations are meaningful.
cond:
BIO
NBIO
C
NC
TC
NTC
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
srcOV
srcNOV
UNC
BIO low
BIO high
c=1
c=0
TC = 1
TC = 0
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
src overflow
src no overflow
Uncondition
Instruction Set Summary
5-25
Summary Table
Syntax
Description
READA Smem
Read Memory Data Addressed by Accumulator A
Transfer a 16-bit word from a program memory location to a data memory
location (Smem). The program memory address is specified by the 16 LSBs
of accumulator A. The RPT instruction can be used with READA to move
consecutive words pointed at by A(15–0) in program memory to a contiguous data memory space pointed at by an indirect addressing mode.
Note that source and destination blocks do not have be entirely on-chip or
off-chip. When READA is repeated, interrupts are inhibited. This instruction
executes in one cycle.
RESET
Software Reset
This non-maskable software reset instruction can be used at any time to put
the DSP into a known state. This instruction is not affected by INTM.
Instead, it sets INTM to 1 (disables interrupts).
RET
RETD
Return With Optional Delay
Replace the program counter with the 16-bit value addressed by the stack
pointer. Increment the stack pointer by 1. Execution continues from this
point.
For a delayed return (RETD), fetch the next two instruction words
(two 1-word instructions or one 2-word instruction), and execute them
before the return.
RETE
RETED
Enable Interrupts and Return From Interrupt With Optional Delay
Replace the program counter with the 16-bit value addressed by the stack
pointer. Execution continues from this point. RETE automatically clears the
global interrupt mask bit (INTM in ST1). (Clearing INTM enables interrupts.)
For a delayed return (RETED), fetch the next two instruction words (two
1-word instructions or one 2-word instruction), and execute them before the
return.
RETF
RETFD
Enable Interrupts and Fast Return From Interrupt
Replace the program counter with the 16-bit value addressed by the stack
pointer. Execution continues at this point. RETF automatically sets the
global interrupt mask bit (INTM in ST1). (Clearing INTM enables interrupts.)
For a delayed return (RETFD), fetch the next two instruction words (two
1-word instructions or one 2-word instruction) and execute them before the
return.
Note that RETF[D] may be used provided no call is performed during the
interrupt service routine and no interrupt routine is executed.
5-26
Summary Table
Syntax
Description
ROL src
Rotate Accumulator Left
Rotate the source accumulator left one bit. The MSB of the source accumulator is shifted into the carry bit, and the value of the carry bit before the
execution of the instruction is shifted into the LSB. The guard bits of the
source accumulator are cleared.
ROLTC src
Rotate Accumulator Left With TC
Rotate the source accumulator left one bit. The MSB of the source accumulator is shifted into the carry bit, and the value of TC before the execution
of the instruction is shifted into the LSB. The guard bits of the source accumulator are cleared.
ROR src
Rotate Accumulator Right
Rotate the source accumulator right one bit. The LSB of the source accumulator is shifted into the carry bit, and the value of the carry bit before the
execution of the instruction is shifted into the MSB. The guard bits of the
source accumulator are cleared.
RPT Smem
#K
#lk
Repeat Next Instruction
RPTB pmad
RPTBD pmad
Block Repeat
Set the repeat counter (RC) with the iteration value when RPT is executed.
Load the 16-bit single-addressed mode value or the 8- or 16-bit constant
into the repeat counter. The instruction following the RPT is repeated. As
the RP decrements, you cannot access it. The total number of repetitions
is RC plus 1.
The RPTB instruction allows a block of instructions to be repeated the
number of times specified by the memory-mapped block repeat counter
(BRC). BRC must be loaded before execution of an RPTB instruction. When
the RPTB is executed, the reset start address pointer (RSA) is loaded with
PC + 2 (PC = 4 if delayed) and the reset end address pointer (REA) is loaded
with the program memory address pmad.
The RPTB instruction is interruptible. Single instruction repeat loops (RPT,
RPTZ) can be included as part of RPTB blocks. Instructions cannot be
nested unless the following occurs:
The BRC, RSA, and REA registers are appropriately saved and
restored.
The block repeat active flag (BRAF) is properly set.
For a delayed repeat (RPTBD), fetch the next two instruction words (two
1-word instructions or one 2-word instruction) and execute them before the
repeat.
Note that block repeat can be deactivated by clearing the BRAF bit.
Instruction Set Summary
5-27
Summary Table
Syntax
Description
RPTZ dst, lk
Repeat Next Instruction With Clearing Accumulator
Clear the destination accumulator and load the 16-bit immediate value into
the repeat counter register (RC). Repeat the instruction following the RPTZ
instruction n times, where n is the value of the RC plus 1.
RSBX stn, SBIT
Reset Status Register Bit
Clears the specified bit SBIT of the status register stn (0 or 1) to a logic 0.
SACCD src, Xmem, cond
Store Accumulator Conditionally
If the condition is met, store the source accumulator (A or B) left-shifted as
defined by (ASM – 16) in Xmem. If the condiition is not true, execute a read
and a write at the Xmem address with the same value. (Xmem will remain
unchanged.) Regardless of the condition, Xmem is always read and
updated according to its modifier.
cond:
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
SAT src
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
Saturate Accumulator
Regardless of the OVM value, saturate the source accumulator content on
32 bits.
SFTA src, SHIFT [, dst ]
Shift Accumulator Arithmetically
Shift the source accumulator arithmetically. Store the result in the destination accumulator, if specifed; otherwise, replace the value of the source
accumulator. The execution of the instruction depends on the SHIFT value:
SFTC src
If SHIFT is less than 0, src(–(SHIFT) – 1) is copied into the carry bit,
an arithmetic right shift is produced. If SXM = 1, the MSB of the accumulator is shifted into dst(39–39 + SHIFT + 1) or src(39–39 + SHIFT + 1).
If SXM = 0, 0 is shifted into dst(39–39 + SHIFT + 1) or src(39–39 +
SHIFT + 1).
If SHIFT is greater than 0, src(31 – SHIFT + 1) is copied to the carry
bit, an arithmetic left shift of dst or src is produced, and 0 is shifted into
dst(SHIFT – 1–0)) or src(SHIFT – 1–0)).
Accumulator Conditional Shift
If the source accumulator has two significant sign bits, shift the 32-bit accumulator left one bit. If there are two sign bits, TC is cleared; otherwise, TC
is set to 1.
5-28
Summary Table
Syntax
Description
SFTL src, SHIFT [, dst ]
Shift Accumulator Logically
Shift the source accumulator logically. Store the result in the destination
accumulator, if specified; otherwise, replace the value of the source accumulator. Clear the bits of the source accumulator as it is shifted. The guard
bits of the accumulator are also cleared.
SQDST Xmem, Ymem
If SHIFT is less than 0, src(–(SHIFT) – 1) is copied into the carry bit.
An arithmetic right shift of dst or src is produced.
If SHIFT is 0, 0 is copied into the carry bit.
If SHIFT is greater than 0, src(31 – SHIFT + 1) is copied into the carry
bit. An arithmetic left shift of dst or src is produced. Load 0 into
dst(SHIFT – 1–0)) or src(SHIFT – 1–0)).
Square Distance
Used in repeat single mode, compute the distance between two vectors
based on the square value. The high bits of accumulator A are squared,
added to accumulator B, and stored in accumulator B. Then,
Xmem – Ymem is left-shifted by 16, and stored in accumulator A.
This instruction affects the overflow bits and the carry bit.
SQUR Smem, dst
A, dst
SQURA Smem, src
Square
Square the value of Smem, or the 16 MSBs of accumulator A and store the
result in the destination accumulator. Store the value of Smem in TREG.
When accumulator A is used, TREG is unaffected.
Square and Accumulate
Store the value of Smem in the T register. Square the value of Smem and
add the result to the source accumulator. Store the result of the square/
addition in the source accumulator.
SQURS Smem, src
Square and Subtract
Store the value of Smem in TREG. Square the value of Smem and subtract
the result from the source accumulator. Store the results of the square/
subtraction in the source accumulator.
Instruction Set Summary
5-29
Summary Table
Syntax
Description
SRCCD Xmem, cond
Store Block Repeat Counter Conditionally
If the condition is true, store the value of the BRC in Xmem. If the condition
is false, execute a read and a write at the Xmem address with the same
value. Regardless of the condition, Xmem is always updated and read
according to its modifier.
cond:
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
SSBX stn, SBIT
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
Set Status Register Bit
Set the specified bit SBIT on the status register stn (0 or 1) to a logic 1.
ST T, Smem
TRN, Smem
#lk, Smem
Store T, TRN, Immediate Value Into Memory
STH src, Smem
src, ASM, Smem
src, SHIFT1, Xmem
src, [SHIFT,] Smem
Store Accumulator High Into Memory
STL src, Smem
src, ASM, Smem
src, SHIFT1, Xmem
src, [SHIFT,] Smem
Store Accumulator Low Into Memory
STLM src, MMR
Store Accumulator Low Into Memory-Mapped Register
Store the value of TREG, TRN, or the 16-bit immediate value in data
memory.
Store the 16 MSBs of the source accumulator in data memory (Smem or
Xmem). When a shift is used with STH, the source accumulator (40 bits) is
shifted by the CALU shifter, as specified in the instruction. The shifted value
is stored in data memory. If SXM = 1, copies of src(39) are shifted in the
MSBs. The accumulator itself remains unaffected.
Store the 16 LSBs of the source accumulator in data memory (Smem or
Xmem). When a shift is used with STL, the source accumulator (40 bits) is
shifted by the CALU shifter, as specified in the instruction. Bits 15 thorugh
0 of the shifted value are stored into data memory. When the shifted value
is positive, the zeroes are shifted in the LSBs.
Store the 16 LSBs of the source accumulator into the memory-mapped
register. The upper nine bits of the effective address are cleared to 0,
regardless of the current value of DP or the upper nine bits of ARX. This
instruction allows the accumulator to be stored in any memory location on
data page 0 without modifying the DP field in status register ST0.
STM #lk, MMR
Store Immediate Value Into Memory-Mapped Register
Store the 16-bit immediate value into the specified memory-mapped
register or any memory location on data page 0 without modifying the DP
field in status reister ST0. The nine MSBs of the effective address are
cleared to 0, regardless of the current value of DP or the upper nine bits of
ARX.
5-30
Summary Table
Syntax
Description
ST src, Ymem
|| ADD Xmem, dst
Store Accumulator With Parallel Add
ST src, Ymem
|| LD Xmem, dst
Store Accumulator With Parallel Load
ST src, Ymem
|| LD Xmem, T
Store the value of the source accumulator shifted as defined by the ASM
field of ST1 in the memory location Ymem. At the same time, add the value
of the accumulator that is not the destination accumulator to the 16-bit leftshifted data memory location Xmem, and store the result in the destination
accumulator. If the source accumulator is equal to the destination accumulator, the value stored in Ymem is the value of the accumulator before the
operation.
Store the value of the source accumulator shifted as defined by the ASM
field of ST1 in the memory location Ymem. At the same time, load the 16-bit
dual addressed mode value Xmem into the destination accumulator or
TREG. If the source accumulator is equal to the destination accumulator,
the value stored in Ymem is the value of the accumulator before the operation.
ST src, Ymem
|| MAC Xmem, dst
Store Acumulator and Parallel Multiply/Accumulate With/Without
Rounding
ST src, Ymem
|| MACR Xmem, dst
Store the value of the source accumulator high shifted as defined by the
ASM field of ST1 in the memory location Ymem. At the same time, multiply
the 16-bit dual addressed mode value Xmem by the value of TREG, add the
result to the value of the destination accumulator, round if indicated, and
store the final result in the destination accumulator.
If rounding is selected (specified by the R suffix), 215 is added to the result
of the multiplication/addition and the 16 LSBs of the result are cleared.
If the source accumulator is equal to the destination accumulator, the value
stored in Ymem is the value of the accumulator before the operation.
ST src, Ymem
|| MAS Xmem, dst
Store Accumulator and Parallel Multiply/Subtract With/Without
Rounding
ST src, Ymem
|| MASR Xmem, dst
Store the value of the source accumulator high shifted as defined by the
ASM field of ST1 in the memory location Ymem. At the same time, multiply
the 16-bit dual addressed mode value Xmem by the value of TREG, subtract the result from the value of the destination accumulator, round if indicated, and store the result in the destination accumulator.
If rounding is selected (specified by the R suffix), 215 is added to the result
of the multiplication/addition and the 16 LSBs of the result are cleared.
If the source accumulator is equal to the destination accumulator, the value
stored in Ymem is the value of the accumulator before the operation.
Instruction Set Summary
5-31
Summary Table
Syntax
Description
ST src, Ymem
|| MPY Xmem, dst
Store Accumulator With Parallel Multiply
Store the value of the source accumulator high shifted as defined by the
ASM field of ST1 in the memory location Ymem. At the same time, multiply
the value of TREG by the 16-bit dual addressed mode value Xmem, and
store the result in the destination accumulator.
If the source accumulator is equal to the destination accumulator, the value
stored in Ymem is the value of the accumulator before the operation.
ST src, Ymem
|| SUB Xmem, dst
Store Accumulator With Parallel Subtract
Store the source accumulator high shifted as defined by the ASM field of
ST1 in the memory location Ymem. At the same time, left-shift the 16-bit
dual addressed mode value Xmem 16 bits, subtract the value of the accumulator that is not the destination accumulator, and store the result in the
destination accumulator.
If the source accumulator is equal to the destination accumulator, the value
stored in Ymem is the value of the accumulator before the operation.
STRCD Xmem, cond
Store TREG Conditionally
If the condition is true, store the value of TREG in Xmem. Regardless of the
condition, Xmem is always read and updated according to its modifier. If the
condition is true, execute a read and a write at the Xmem address with the
same value.
SUB Smem, src
Smem, TS, src
Smem, 16, src, [, dst ]
Smem, [SHIFT,] src [, dst ]
Xmem, SHIFT1, src
Xmem, Ymem, dst
#lk, [SHIFT1,] src [, dst ]
#lk, 16, src [, dst ]
src [, SHIFT] [, dst ]
src, ASM [, dst ]
Subtract From Accumulator
Subtract the value of a single- or dual-addressed data memory location,
16-bit constant, or the source accumulator (A or B), shifted if indicated, from
the value of the source accumulator (A or B) or from the 16-bit dualaddressed mode value (Ymem). Store the result in the destination accumulator, if specified; otherwise, store the result in the source accumulator.
For a postive (left) shift, if SXM = 1, the low-order bits are cleared and the
high-order bits are sign-extended; if SXM = 0, both low-order bits and highorder bits are cleared.
For instructions indicating a 16-bit shift, if the result of the addition generates
a borrow, C is set to 1; otherwise C is not affected.
SUBB Smem, src
Subtract From Accumulator With Borrow
Subtract the value of the 16-bit single-addressed mode value from the value
of the source accumulator. Subtract the logical inversion of C from the
result. The final result is stored in the source accumulator.
5-32
Summary Table
Syntax
Description
SUBC Smem, src
Subtract From Accumulator Conditionally
Subtract the 16-bit single-addressed mode value, left-shifted 15 bits, from
the value of the source accumulator. If the result is greater than 0, left-shift
the result by 1, add 1, and store the final result in the source accumulator.
Otherwise, left-shift the value of the source accumulator by 1 and store the
result in the source accumulator.
SUBC performs conditional subtraction, which may be used for division.
The 16-bit dividend is placed placed in the low accumulator, and the high
accumulator is zeroed. The divisor is in data memory. SUBC is executed 16
times for 16-bit division. After completion of the last SUBC, the quotient of
the division is in the lower-order 16-bit field of the accumulator, and the
remainder is in the higher-order 16-bit field of the accumulator. SUBC
assumes that the divisor and the dividend are both positive. The divisor is
not sign extended. If SXM = 1, the divisor must have a 0 value in the MSB.
If SXM = 0, any 16-bit divisor produces the expected result. The dividend,
which is in the accumulator, must initially be positive (i.e. bit 31 must be 0)
and must remain positive following the accumulator shift, which occurs in
the first portion of the instruction.
Note that SUBC is not affected by OVM and therefore, the accumulator
does not saturate upon positive or negative overflows when executing this
instruction. The carry bit is affected in the normal manner.
SUBS Smem, src
Subtract From Accumulator With Sign-Extension Suppressed
Subtract the 16-bit single-addressed mode value from the value of the
source accumulator. Smem is considered to be a 16-bit unsigned number
regardless of the value of SXM. The result is stored in the source accumulator.
TRAP K
Software Interrupt
Transfer program control to the interrupt routine specified by K. Decrement
the stack pointer by 1. Push the value of PC + 1 onto the data memory
addressed by the stack pointer. This enbles a return instruction to pop the
return PC, which points to the instruction after the TRAP, from the data
memory addressed by the stack pointer. The TRAP instruction is not maskable; it is not affected by INTM nor does it affect INTM.
WRITA Smem
Write Memory Data Addressed by Accumulator A
Transfer a 16-bit word from a data memory location (Smem) to a program
memory location specified by the 16 LSBs of accumulator A.
The RPT instruction can be used with WRITA to move consecutive words
indirectly addressed in data memory to a contiguous program memory
space addressed by PAR with auto-increment. The initial value is set with
the value of accumulator A low. Note that source and destination blocks do
not have be entirely on-chip or off-chip. When used with RPT, WRITA
becomes a single-cycle instruction after the RPT pipeline starts; additionally, interrupts are inhibited.
Instruction Set Summary
5-33
Summary Table
Syntax
Description
XC N [,cond1] [, cond2]
Execute Conditionally
The value of N and the selected conditions determine the execution of the
instruction:
If N = 1 and the condition is met, fetch and execute the next 1-word
instruction.
If N = 2 and the condition is met, fetch and execute the next two 1-word
instructions or the next one 2-word instruction.
If the condition is not met, then one or two NOPs are executed.
The XC instruction and the two instruction words following it are uninterruptible.
Note that conditions tested are sampled two full cycles before the XC is
executed. If the two instructions before the XC affect the conditions being
tested, the interrupt operation with the XC can cause undesired results.
At least one condition must be chosen. Not all combinations are meaningful.
cond:
BIO
NBIO
C
NC
TC
NTC
srcEQ
srcNEQ
srcGT
srcGEQ
srcLT
srcLEQ
srcOV
srcNOV
UNC
XOR Smem, src
#lk, [SHIFT1,] src [, dst ]
#lk, 16, src [, dst ]
src, [SHIFT] [, dst ]
BIO low
BIO high
C=1
C=0
TC = 1
TC = 0
(src) = 0
(src) 0 0
(src) u 0
(src) w 0
(src) t 0
(src) v 0
src overflow
src no overflow
Uncondition
Exclusive-OR With Accumulator
Exclusive-OR the 16-bit single-addressed mode value, shifted if indicated,
with the value of the source accumulator (A or B). Store the result in the
destination accumulator, if specified; otherwise, store the result in the
source accumulator.
For a positive (left) shift, the low-order bits are cleared and the high-order
bits are not sign extended. For negative (right) shift, sign is not extended.
XORM #lk, Smem
Exclusive-OR Memory With Constant
Exclusive-OR the value of the data memory location with the 16-bit immediate value lk. Store the result in the data memory location.
5-34
Chapter 6
Macro Language
The assembler supports a macro language that enables you to create your
own instructions. This is especially useful when a program executes a
particular task several times. The macro language lets you:
Define your own macros and redefine existing macros
Simplify long or complicated assembly code
Access macro libraries created with the archiver
Define conditional and repeatable blocks within a macro
Manipulate strings within a macro
Control expansion listing
Topic
Page
6.1
Using Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.2
Defining Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.3
Macro Parameters/Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.4
Macro Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13
6.5
Using Conditional Assembly in Macros . . . . . . . . . . . . . . . . . . . . . . . . 6-14
6.6
Using Labels in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
6.7
Producing Messages in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17
6.8
Formatting the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19
6.9
Using Recursive and Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20
6.10 Macro Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
Chapter Title—Attribute Reference
6-1
Using Macros
6.1 Using Macros
Programs often contain routines that are executed several times. Instead of
repeating the source statements for a routine, you can define the routine as
a macro, then call the macro in the places where you would normally repeat
the routine. This simplifies and shortens your source program.
If you want to call a macro several times, but with different data each time, you
can assign parameters within a macro. This enables you to pass different
information to the macro each time you call it. The macro language supports
a special symbol called a substitution symbol, which is used for macro parameters. In this chapter, we use the terms macro parameters and substitution symbols interchangeably.
Using a macro is a three-step process.
Step 1: Define the macro. You must define macros before you can use them
in your program. There are two methods for defining macros:
Macros can be defined at the beginning of a source file or in a
.copy/.include file. See Section 6.2 for more information.
Macros can also be defined in a macro library. A macro library
is a collection of files in archive format created by the archiver.
Each member of the archive file (macro library) contains one
macro definition corresponding to the member name. You can
access a macro library by using the .mlib directive. Macro
libraries are discussed in Section 6.4, page 6-13.
Step 2: Call the macro. After you have defined a macro, you can call it by
using the macro name as an opcode in the source program. This is
referred to as a macro call.
Step 3: Expand the macro. The assembler expands your macros when the
source program calls them. During expansion, the assembler
passes arguments by variable to the macro parameters, replaces
the macro call statement with the macro definition, then assembles
the source code. By default, the macro expansions are printed in the
listing file. You can turn off expansion listing by using the .mnolist
directive. For more information, see Section 6.8, page 6-19.
When the assembler encounters a macro definition, it places the macro name
in the opcode table. This redefines any previously defined macro, library entry,
directive, or instruction mnemonic that has the same name as the macro. This
allows you to expand the functions of directives and instructions, as well as to
add new instructions.
6-2
Defining Macros
6.2 Defining Macros
You can define a macro anywhere in your program, but you must define the
macro before you can use it. Macros can be defined at the beginning of a
source file or in a .include/.copy file; they can also be defined in a macro library.
For more information about macro libraries, see Section 6.4, page 6-13.
Macro definitions can be nested, and they can call other macros, but all
elements of any macro must be defined in the same file. Nested macros are
discussed in Section 6.9, page 6-20.
A macro definition is a series of source statements in the following format:
macname
.macro [parameter1 ] [, ... , parametern ]
model statements or macro directives
[.mexit]
.endm
macname
names the macro. You must place the name in the
source statement’s label field. Only the first 32
characters of a macro name are significant. The
assembler places the macro name in the internal
opcode table, replacing any instruction or previous
macro definition with the same name.
.macro
is a directive that identifies the source statement as
the first line of a macro definition. You must place
.macro in the opcode field.
[parameters]
are optional substitution symbols that appear as
operands for the .macro directive. Parameters are
discussed in Section 6.3, page 6-5.
model statements
are instructions or assembler directives that are
executed each time the macro is called.
macro directives
are used to control macro expansion.
[.mexit]
functions as a “goto .endm”. The .mexit directive is
useful when error testing confirms that macro
expansion will fail.
.endm
terminates the macro definition.
Macro Language
6-3
Defining Macros
Example 6–1 shows the definition, call, and expansion of a macro.
Example 6–1.Macro Definition, Call, and Expansion
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 0000
1
1
1
1
1
0000
0001
0002
0003
*
*
*
*
add3
add3
.macro
P1, P2, P3, ADDRP
LD
ADD
ADD
STL
.endm
P1, A
P2, A
P3, A
A, ADDRP
ADDRP = P1 + P2 + P3
.global abc, def, ghi, adr
add3 abc, def, ghi, adr
1000!
0000!
0000!
8000!
LD
ADD
ADD
STL
abc, A
def, A
ghi, A
A, adr
19
If you want to include comments with your macro definition but don’t want
those comments to appear in the macro expansion, use an exclamation point
to precede your comments. If you do want your comments to appear in the
macro expansion, use an asterisk or semicolon. For more information about
macro comments, see Section 6.7, page 6-17.
6-4
Macro Parameters/Substitution Symbols
6.3 Macro Parameters/Substitution Symbols
If you want to call a macro several times with different data each time, you can
assign parameters within the macro. The macro language supports a special
symbol, called a substitution symbol, which is used for macro parameters.
6.3.1
Substitution Symbols
Macro parameters are substitution symbols that represent a character string.
These symbols can also be used outside of macros to equate a character
string to a symbol name.
Valid substitution symbols may be 32 characters long and must begin with a
letter. The remainder of the symbol can be a combination of alphanumeric
characters, underscores, and dollar signs.
Substitution symbols used as macro parameters are local to the macro they
are defined in. You can define up to 32 local substitution symbols (including
substitution symbols defined with the .var directive) per macro. For more
information about the .var directive, see subsection 6.3.7, page 6-12.
During macro expansion, the assembler passes arguments by variable to the
macro parameters. The character-string equivalent of each argument is assigned to the corresponding parameter. Parameters without corresponding
arguments are set to the null string. If the number of arguments exceeds the
number of parameters, the last parameter is assigned the character-string
equivalent of all remaining arguments.
If you pass a list of arguments to one parameter, or if you pass a comma or
semicolon to a parameter, you must enclose the arguments in quotation
marks.
At assembly time, the assembler replaces the substitution symbol with its corresponding character string, then translates the source code into object code.
Example 6–2 shows the expansion of a macro with varying numbers of
arguments.
Macro Language
6-5
Macro Parameters/Substitution Symbols
Example 6–2.Calling a Macro With Varying Numbers of Arguments
Macro definition
Parms .macro a,b,c
;
a = :a:
;
b = :b:
;
c = :c:
.endm
Calling the macro:
6.3.2
;
;
;
Parms 100,label
a = 100
b = label
c = ” ”
Parms 100,label,x,y
; a = 100
; b = label
; c = x,y
;
;
;
Parms 100, , x
a = 100
b = ” ”
c = x
Parms ”100,200,300”,x,y
; a = 100,200,300
; b = x
; c = y
;
;
;
Parms ”””string”””,x,y
a = ”string”
b = x
c = y
Directives That Define Substitution Symbols
You can manipulate substitution symbols with the .asg and .eval directives.
The .asg directive assigns a character string to a substitution symbol.
The syntax of the .asg directive is:
.asg [”]character string[”], substitution symbol
The quotation marks are optional. If there are no quotation marks, the
assembler reads characters up to the first comma and removes leading
and trailing blanks. In either case, a character string is read and assigned
to the substitution symbol.
Example 6–3 shows character strings being assigned to substitution symbols.
Example 6–3.The .asg Directive
.asg
.asg
.asg
.asg
.asg
6-6
AR0 ,FP
*AR1+ ,Ind
*AR1+0b,Rc_Prop
”””string”””,strng
”a,b,c”
,parms
;
;
;
;
;
frame pointer
indirect addressing
reverse carry propagation
string
parameters
Macro Parameters/Substitution Symbols
The .eval directive performs arithmetic on numeric substitution symbols.
The syntax of the .eval directive is
.eval well-defined expression, substitution symbol
The .eval directive evaluates the expression and assigns the string value
of the result to the substitution symbol. If the expression is not well defined,
the assembler generates an error and assigns the null string to the symbol.
Example 6–4 shows arithmetic being performed on substitution symbols.
Example 6–4.The .eval Directive
.asg
1,counter
.loop 100
.word counter
.eval counter + 1,counter
.endloop
In Example 6–4, the .asg directive could be replaced with the .eval directive
(.eval 1, counter) without changing the output. In simple cases like this, you
can use .eval and .asg interchangeably. However, you must use .eval if you
want to calculate a value from an expression. While .asg only assigns a character string to a substitution symbol, the .eval directive evaluates an expression and then assigns the character string equivalent to a substitution symbol.
6.3.3
Built-In Substitution Symbol Functions
The following built-in substitution symbol functions enable you to make
decisions based on the string value of substitution symbols. These functions
always return a value, and they can be used in expressions. Built-in substitution symbol functions are especially useful in conditional assembly expressions. Parameters to these functions are substitution symbols or characterstring constants.
In Table 6–1 function definitions, a and b are parameters that represent substitution symbols or character string constants. The term string refers to the string
value of the parameter.
Macro Language
6-7
Macro Parameters/Substitution Symbols
Table 6–1. Functions and Return Values
Function
Return Value
$symlen(a)
length of string a
$symcmp(a,b)
< 0 if a < b
$firstch(a,ch)
index of the first occurrence of character constant ch in string a
$lastch(a,ch)
index of the last occurrence of character constant ch in string a
$isdefed(a)
1 if string a is defined in the symbol table
0 if string a is not defined in the symbol table
$ismember(a,b)
top member of list b is assigned to string a
0 if b is a null string
$iscons(a)
1 if string a is a binary constant
2 if string a is an octal constant
3 if string a is a hexadecimal constant
4 if string a is a character constant
5 if string a is a decimal constant
$isname(a)
1 if string a is a valid symbol name
0 if string a is not a valid symbol name
$isreg(a)†
1 if string a is a valid predefined register name
0 if string a is not a valid predefined register name
0 if a = b
> 0 if a > b
† For more information about predefined register names, see Section 3.8, page 3-15.
Example 6–5 shows built-in substitution symbol functions.
Example 6–5.Using Built-In Substitution Symbol Functions
.asg label, ADDR
; ADDR = label
.if
($symcmp(ADDR,”label”) = 0) ; evaluates to true
SUB
ADDR, A
.endif
.asg ”x,y,z” , list
; list = x,y,z
.if
($ismember(ADDR,list))
; addr = x, list = y,z
SUB
ADDRA, A
; sub x
.endif
6-8
Using Recursive and Nested Macros
6.3.4
Recursive Substitution Symbols
When the assembler encounters a substitution symbol, it attempts to
substitute the corresponding character string. If that string is also a substitution
symbol, the assembler performs substitution again. The assembler continues
doing this until it encounters a token that is not a substitution symbol or until
it encounters a substitution symbol that it has already encountered during this
evaluation.
In Example 6–6, the x is substituted for z; z is substituted for y; and y is
substituted for x. The assembler recognizes this as infinite recursion and
ceases substitution.
Example 6–6.Recursive Substitution
.asg
.asg
.asg
add
*
6.3.5
add
”x”,z
”z”,y
”y”,x
x,
; declare z and assign z = ”x”
; declare y and assign y = ”z”
; declare x and assign x = ”y”
A
x, A
; recursive expansion
Forced Substitution
In some cases, substitution symbols are not recognizable to the assembler.
The forced substitution operator, which is a set of colons, enables you to force
the substitution of a symbol’s character string. Simply enclose a symbol in
colons to force the substitution. Do not include any spaces between the colons
and the symbol.
The syntax for the forced substitution operator is
:symbol:
The assembler expands substitution symbols enclosed in colons before it
expands other substitution symbols.
You can use the forced substitution operator only inside macros, and you
cannot nest a forced substitution operator within another forced substitution
operator.
Example 6–7 shows how the forced substitution operator is used.
Macro Language
6-9
Macro Parameters/Substitution Symbols
Example 6–7.Using the Forced Substitution Operator
force .macro x
.asg
0,x
.loop 8
AUX:x: .set
x
.eval x+1,x
.endloop
.endm
The force macro would generate the following source code:
AUX0
AUX1
.
.
.
AUX7
6.3.6
.set
.set
0
1
.set
7
Accessing Individual Characters of Subscripted Substitution Symbols
In a macro, you can access the individual characters (substrings) of a substitution symbol with subscripted substitution symbols. You must use the forced
substitution operator for clarity.
You can access substrings in two ways:
:symbol (well-defined expression):
This method of subscripting evaluates to a character string with one
character.
:symbol (well-defined expression1 , well-defined expression2 ):
In this method, expression1 represents the substring’s starting position,
and expression2 represents the substring’s length. You can specify
exactly where to begin subscripting and the exact length of the resulting
character string. The index of substring characters begins with 1, not 0.
Example 6–8 and Example 6–9 show built-in substitution symbol functions
used with subscripted substitution symbols.
6-10
Macro Parameters/Substitution Symbols
Example 6–8.Using Subscripted Substitution Symbols to Redefine an Instruction
ADDX
.macro
.var
.asg
.if
ADD
.else
.emsg
.endif
.endm
ABC
TMP
:ABC(1):,TMP
$symcmp(TMP,”#”) = 0
ABC, A
ADDX
ADDX
#100
*AR1
”Bad Macro Parameter”
;macro call
;macro call
In Example 6–8, subscripted substitution symbols redefine the add instruction
so that it handles short immediates.
Example 6–9.Using Subscripted Substitution Symbols to Find Substrings
substr
.macro
.var
.if
.eval
.endif
.eval
.eval
.eval
.eval
.loop
.break
.asg
.if
.eval
.break
.else
.eval
.endif
.endloop
.endm
start,strg1,strg2,pos
LEN1,LEN2,I,TMP
$symlen(start) = 0
1,start
.asg
.asg
substr
.word
0,pos
”ar1 ar2 ar3 ar4”,regs
1,”ar2”,regs,pos
pos
0,pos
1,i
$symlen(strg1),LEN1
$symlen(strg2),LEN2
i = (LEN2 – LEN1 + 1)
”:strg2(I,LEN1):”,TMP
$symcmp(strg1,TMP) = 0
i,pos
i + 1,i
In Example 6–9, the subscripted substitution symbol is used to find a substring
strg1, beginning at position start in the string strg2. The position of the substring strg1 is assigned to the substitution symbol pos.
Macro Language
6-11
Macro Parameters/Substitution Symbols
6.3.7
Substitution Symbols as Local Variables in Macros
If you want to use substitution symbols as local variables within a macro, you
can use the .var directive to define up to 32 local macro substitution symbols
(including parameters) per macro. The .var directive creates temporary substitution symbols with the initial value of the null string. These symbols are not
passed in as parameters, and after expansion they are lost.
.var sym1 [,sym2 ] ... [,symn ]
The .var directive is used in Example 6–8 and Example 6–9, page 6-11.
6-12
Macro Libraries
6.4 Macro Libraries
One way to define macros is by creating a macro library. A macro library is a
collection of files that contain macro definitions. You must use the archiver to
collect these files, or members, into a single file (called an archive). Each
member of a macro library contains one macro definition. The files in a macro
library must be unassembled source files. The macro name and the member
name must be the same, and the macro filename’s extension must be .asm.
For example:
Macro Name
Filename in Macro Library
simple
simple.asm
add3
add3.asm
You can access the macro library by using the .mlib assembler directive.
The syntax is:
.mlib macro library filename
When the assembler encounters the .mlib directive, it opens the library and
creates a table of the library’s contents. The assembler enters the names of
the individual members within the library into the opcode tables as library
entries; this redefines any existing opcodes or macros that have the same
name. If one of these macros is called, the assembler extracts the entry from
the library and loads it into the macro table.
The assembler expands the library entry in the same way it expands other
macros. You can control the listing of library entry expansions with the .mlist
directive. For more information about the .mlist directive, see Section 6.8,
page 6-19. Only macros that are actually called from the library are extracted,
and they are extracted only once. For more information about the .mlib directive, see page 4-57.
You can create a macro library with the archiver by simply including the desired
files in an archive. A macro library is no different from any other archive, except
that the assembler expects the macro library to contain macro definitions. The
assembler expects only macro definitions in a macro library; putting object
code or miscellaneous source files into the library may produce undesirable
results.
Macro Language
6-13
Using Conditional Assembly in Macros
6.5 Using Conditional Assembly in Macros
The conditional assembly directives are .if/.elseif/.else/.endif and .loop/
.break/.endloop. They can be nested within each other up to 32 levels deep.
The format of a conditional block is:
.if well-defined expression
[.elseif well-defined expression]
[.else well-defined expression]
.endif
The .elseif and .else directives are optional, and they can be used more than
once within a conditional assembly code block. When .elseif and .else are
omitted, and when the .if expression is false (0), the assembler continues to
the code following the .endif directive. For more information on the .if/
.elseif/.else/.endif directives, see page 4-48.
The .loop/.break/.endloop directives enable you to assemble a code block
repeatedly. The format of a repeatable block is:
.loop [well-defined expression]
[.break [well-defined expression]]
.endloop
The .loop directive’s optional expression evaluates to the loop count (the
number of loops to be performed). If the expression is omitted, the loop count
defaults to 1024 unless the assembler encounters a .break directive with an
expression that is true (nonzero). For more information on the .loop/
.break/.endloop directives, see page 4-56.
The .break directive and its expression are optional. If the expression evaluates to false, the loop continues. The assembler breaks the loop when the
.break expression evaluates to true or when the .break expression is omitted.
When the loop is broken, the assembler continues with the code after the
.endloop directive.
Example 6–10, Example 6–11, and Example 6–12 show the .loop/.break/
.endloop directives, properly nested conditional assembly directives, and
built-in substitution symbol functions used in a conditional assembly code
block.
6-14
Using Conditional Assembly in Macros
Example 6–10. The .loop/.break/.endloop Directives
.asg
1,x
.loop
.break (x == 10) ;
;
if x == 10, quit loop/break with
expression
.eval x+1,x
.endloop
Example 6–11. Nested Conditional Assembly Directives
.asg
1,x
.loop
.if (x == 10) ;
.break
;
.endif
if x == 10 quit loop
force break
.eval
x+1,x
.endloop
Example 6–12. Built-In Substitution Symbol Functions Used in a Conditional Assembly
Code Block
.fcnolist
*
*Double Add or Subtract
*
DBL
.macro ABC, ADDR, src
; add or subtract double
.if $symcmp(ABC,”+”)
dadd
ADDR, src
; add double
.elseif $symcmp(ABC,”–”)
dsub
ADDR, src
; subtract double
.else
.emsg ”Incorrect Operator Parameter”
.endif
.endm
*Macro Call
DBL –, OPZ, ALP
For more information about conditional assembly directives, see Section 4.8,
page 4-20.
Macro Language
6-15
Using Labels in Macros
6.6 Using Labels in Macros
All labels in an assembly language program must be unique. This includes
labels in macros. If a macro is expanded more than once, its labels are defined
more than once. Defining a label more than once is illegal. The macro language provides a method of defining labels in macros so that the labels are
unique. Simply follow the label with a question mark, and the assembler will
replace the question mark with a unique number. When the macro is expanded, you will not see the unique number in the listing file. Your label will appear
with the question mark as it did in the macro definition. You cannot declare this
label as global. The syntax for a unique label is:
label?
Example 6–13 shows unique label generation in a macro.
Example 6–13. Unique Labels in a Macro
1
3
4
5
6
7
8
9
10
11
12
13
14
15 0000
1
1
1
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
1
1
1
1
1
; define macro
MIN
.macro AVAR, BVAR ; find minimum
M1?
M2?
LD
SUB
BC
LD
B
LD
AVAR, A
#BVAR, A
M1?, ALT
#BVAR, A
M2?
AVAR, A
.endm
; call macro
MIN 50, 100
1032
f010
0064
f843
0008’
e864
f073
0009’
1032 M1?
M2?
LD
SUB
50, A
#100, A
BC
M1?, ALT
LD
B
#100, A
M2?
LD
50, A
16
The maximum label length is shortened to allow for the unique suffix. For
example, if the macro is expanded fewer than 10 times, the maximum label
length is 126 characters. If the macro is expanded from 10 to 99 times, the
maximum label length is 125. The label with its unique suffix is shown in the
cross-listing file.
6-16
Producing Messages in Macros
6.7 Producing Messages in Macros
The macro language supports three directives that enable you to define your
own assembly-time error and warning messages. These directives are
especially useful when you want to create messages specific to your needs.
The last line of the listing file shows the error and warning counts. These
counts alert you to problems in your code and are especially useful during
debugging.
.emsg
sends error messages to the listing file. The .emsg directive
generates errors in the same manner as the assembler, incrementing the error count and preventing the assembler from
producing an object file.
.mmsg
sends assembly-time messages to the listing file. The .mmsg
directive functions in the same manner as the .emsg directive
but does not set the error count or prevent the creation of an
object file.
.wmsg
sends warning messages to the listing file. The .wmsg
directive functions in the same manner as the .emsg directive,
but it increments the warning count and does not prevent the
generation of an object file.
Macro comments are comments that appear in the definition of the macro but
do not show up in the expansion of the macro. An exclamation point in column
1 identifies a macro comment. If you want your comments to appear in the
macro expansion, precede your comment with an asterisk or semicolon.
Example 6–14 shows user messages in macros and macro comments that will
not appear in the macro expansion.
Macro Language
6-17
Producing Messages in Macros
Example 6–14. Producing Messages in a Macro
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 0000
1
1
1
1
1
1
1
1
1
1
1
1
testparam
0000 1002
0001 1101
0002 F500
17
18 0003
1
1
1
.macro x,y
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
.mexit
.elseif ($symlen(y) == 0)
.emsg ”ERROR == Missing Parameter”
.mexit
.else
ld y, A
ld x, B
add A, B
.endif
.endm
testparam 1,2
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
.mexit
.elseif ($symlen(y) == 0)
.emsg ”ERROR == Missing Parameter”
.mexit
.else
ld 2, A
ld 1, B
add A, B
.endif
testparam
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
***** USER ERROR ***** – : ERROR –– Missing Parameter
1
.mexit
1 Error, No Warnings
6-18
Formatting the Output Listing
6.8 Formatting the Output Listing
Macros, substitution symbols, and conditional assembly directives may hide
information. You may need to see this hidden information, so the macro
language supports an expanded listing capability.
By default, the assembler shows macro expansions and false conditional
blocks in the output list file. You may want to turn this listing off or on within your
listing file. Four sets of directives enable you to control the listing of this
information:
Macro and Loop Expansion Listing
.mlist
expands macros and .loop/.endloop blocks. The .mlist directive prints all code encountered in those blocks..
.mnolist
suppresses the listing of macro expansions and .loop/
.endloop blocks.
For macro and loop expansion listing, .mlist is the default.
False Conditional Block Listing
.fclist
causes the assembler to include in the listing file all conditional blocks that do not generate code (false conditional
blocks). Conditional blocks appear in the listing exactly as
they appear in the source code.
.fcnolist
suppresses the listing of false conditional blocks. Only the
code in conditional blocks that actually assemble appears in
the listing. The .if, .elseif, .else, and .endif directives do not
appear in the listing.
For false conditional block listing, .flist is the default.
Substitution Symbol Expansion Listing
.sslist
expands substitution symbols in the listing. This is useful for
debugging the expansion of substitution symbols. The expanded line appears below the actual source line.
.ssnolist turns off substitution symbol expansion in the listing.
For substitution symbol expansion listing, .ssnolist is the default.
Directive Listing
.drlist
causes the assembler to print to the listing file all directive
lines.
.drnolist suppresses the printing of the following directives in the listing file: .asg, .eval, .var, .sslist, .mlist, .fclist, .ssnolist,
.mnolist, .fcnolist, .emsg, .wmsg, .mmsg, .length, .width, and
.break.
For directive listing, .drlist is the default.
Macro Language
6-19
Using Recursive and Nested Macros
6.9 Using Recursive and Nested Macros
The macro language supports recursive and nested macro calls. This means
that you can call other macros in a macro definition. You can nest macros up
to 32 levels deep. When you use recursive macros, you call a macro from its
own definition (the macro calls itself).
When you create recursive or nested macros, you should pay close attention
to the arguments that you pass to macro parameters, because the assembler
uses dynamic scoping for parameters. This means that the called macro uses
the environment of the macro from which it was called.
Example 6–15 shows nested macros. Note that the y in the in_block macro
hides the y in the out_block macro. The x and z from the out_block macro,
however, are accessible to the in_block macro.
Example 6–15. Using Nested Macros
in_block
.macro y,a
.
.
.endm
; visible parameters are y,a and
;
x,z from the calling macro
out_block .macro x,y,z
.
; visible parameters are x,y,z
.
in_block x,y ; macro call with x and y as
;
arguments
.
.
.endm
out_block
; macro call
6-20
Using Recursive and Nested Macros
Example 6–16 shows recursive macros. The fact macro produces assembly
code necessary to calculate the factorial of n where n is an immediate value.
The result is placed in data memory address loc. The fact macro accomplishes
this by calling fact1, which calls itself recursively.
Example 6–16. Using Recursive Macros
fact
.macro N, loc
.if
N < 2
ST
#1, loc
.else
ST
#N, loc
.eval N – 1, N
fact1
; n is an integer constant
; loc memory address = n!
; 0! = 1! = 1
; n >= 2 so, store n at loc
; decrement n, and do the
;
factorial of n – 1
; call fact with current
;
environment
.endif
.endm
fact1 .macro
.if
LD
MPY
STL
.eval
fact1
.endif
N > 1
loc, T
#N, A
A, loc
N – 1, N
;
;
;
;
;
multiply present factorial
by present position
save result
decrement position
recursive call
.endm
Macro Language
6-21
Macro Directives Summary
6.10 Macro Directives Summary
Table 6–2. Creating Macros
Mnemonic and Syntax
Description
macname .macro [parameter1 ]...[parametern ]
Define macro
.mlib filename
Identify library containing macro definitions
.mexit
Go to .endm
.endm
End macro definition
Table 6–3. Manipulating Substitution Symbols
Mnemonic and Syntax
Description
.asg [“]character string[“], substitution symbol
Assign character string to substitution symbol
.eval well-defined expression, substitution symbol
Perform arithmetic on numeric substitution symbols
.var substitution symbol1 ...[substitution symboln ]
Define local macro symbols
Table 6–4. Conditional Assembly
Mnemonic and Syntax
Description
.if well-defined expression
Begin conditional assembly
.elseif well-defined expression
Optional conditional assembly block
.else
Optional conditional assembly block
.endif
End conditional assembly
.loop [well-defined expression]
Begin repeatable block assembly
.break [well-defined expression]
Optional repeatable block assembly
.endloop
End repeatable block assembly
6-22
Macro Directives Summary
Table 6–5. Producing Assembly-Time Messages
Mnemonic and Syntax
Description
.emsg
Send error message to standard output
.wmsg
Send warning message to standard output
.mmsg
Send warning or assembly-time message to standard
output
Table 6–6. Formatting the Listing
Mnemonic and Syntax
Description
.fclist
Allow false conditional code block listing (default)
.fcnolist
Inhibit false conditional code block listing
.mlist
Allow macro listings (default)
.mnolist
Inhibit macro listings
.sslist
Allow expanded substitution symbol listing
.ssnolist
Inhibit expanded substitution symbol listing (default)
Macro Language
6-23
Chapter 7
Archiver Description
The TMS320C54x archiver lets you combine several individual files into a
single archive file. For example, you can collect several macros into a macro
library. The assembler will search the library and use the members that are
called as macros by the source file. You can also use the archiver to collect a
group of object files into an object library. The linker will include in the library
the members that resolve external references during the link.
Topic
Page
7.1
Archiver Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7.2
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
7.3
Invoking the Archiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7.4
Archiver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
Chapter Title—Attribute Reference
7-1
Archiver Overview
7.1 Archiver Overview
The TMS320C54x archiver lets you combine several individual files into a single file called an archive or a library. Each file within the archive is called a
member. Once you have created an archive, you can use the archiver to add,
delete, or extract members.
You can build libraries from any type of files. Both the assembler and the linker
accept archive libraries as input; the assembler can use libraries that contain
individual source files, and the linker can use libraries that contain individual
object files.
One of the most useful applications of the archiver is building libraries of object
modules. For example, you can write several arithmetic routines, assemble
them, and use the archiver to collect the object files into a single, logical group.
You can then specify the object library as linker input. The linker will search the
library and include members that resolve external references.
You can also use the archiver to build macro libraries. You can create several
source files, each of which contains a single macro, and use the archiver to
collect these macros into a single, functional group. The .mlib assembler directive lets you specify the name of a macro library; during the assembly process,
the assembler will search the specified library for the macros that you call.
Chapter 6 discusses macros and macro libraries in detail.
7-2
Archiver Development Flow
7.2 Archiver Development Flow
Figure 7–1 shows the archiver’s role in the assembly language development
process. Both the assembler and the linker accept libraries as input.
Figure 7–1. Archiver Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Absolute lister
Cross-reference
lister
’C54x
Archiver Description
7-3
Invoking the Archiver
7.3 Invoking the Archiver
To invoke the archiver, enter:
ar500 [–]command [option ] libname [filename1 ... filenamen ]
ar500
is the command that invokes the archiver.
libname
names an archive library. If you don’t specify an extension for
libname, the archiver uses the default extension .lib.
filename
names individual member files that are associated with the
library. If you don’t specify an extension for a filename, the
archiver uses the default extension .obj.
Note:
Naming Library Members
It is possible (but not desirable) for a library to contain several members with
the same name. If you attempt to delete, replace, or extract a member, and
the library contains more than one member with the specified name, then the
archiver deletes, replaces, or extracts the first member with that name.
command
7-4
tells the archiver how to manipulate the library members. A
command can be preceded by an optional hyphen. You must
use one of the following commands when you invoke the
archiver, but you can use only one command per invocation.
Valid archiver commands are:
a
adds the specified files to the library. This command
does not replace an existing member that has the same
name as an added file; it simply appends new members
to the end of the archive.
d
deletes the specified members from the library.
r
replaces the specified members in the library. If you
don’t specify filenames, the archiver replaces the library
members with files of the same name in the current directory. If the specified file is not found in the library, the
archiver adds it instead of replacing it.
t
prints a table of contents of the library. If you specify filenames, only those files are listed. If you don’t specify any
filenames, the archiver lists all the members in the
specified library.
Invoking the Archiver
x
extracts the specified files. If you don’t specify member
names, the archiver extracts all library members. When
the archiver extracts a member, it simply copies the
member into the current directory; it doesn’t remove it
from the library.
In addition to one of the commands, you can specify the following options:
–e
tells the archiver not to use the default extension .obj for
member names. This allows the use of filenames without extensions.
–q
(quiet) suppresses the banner and status messages.
–s
prints a list of the global symbols that are defined in the
library. (This option is valid only with the –a, –r, and –d
commands.)
–v
(verbose) provides a file-by-file description of the creation of a new library from an old library and its constituent members.
Archiver Description
7-5
Archiver Examples
7.4 Archiver Examples
The following are some archiver examples:
Example 1
This example creates a library called function.lib that contains the files
sine.obj, cos.obj, and flt.obj.
ar500 –a function sine cos flt
TMS320C54x Archiver
Version x.xx
Copyright (c) 1993–1995
Texas Instruments Incorporated
==>
new archive ’function.lib’
==>
building archive ’function.lib’
Because Example 1 and 2 use the default extensions (.lib for the library
and .obj for the members), it is not necessary to specify extensions in
these examples.
Example 2
You can print a table of contents of function.lib with the –t option:
ar500 –t function
TMS320C54x Archiver
Version x.xx
Copyright (c) 1993–1995
Texas Instruments Incorporated
FILE NAME
SIZE
DATE
–––––––––––––––––
––––– –––––––––––––––––––––––
sine.obj
248
Mon Nov 19 01:25:44 1993
cos.obj
248
Mon Nov 19 01:25:44 1993
flt.obj
248
Mon Nov 19 01:25:44 1993
Example 3
You can explicitly specify extensions if you don’t want the archiver to use
the default extensions; for example:
ar500 –av function.fn sine.asm cos.asm flt.asm
TMS320C54x Archiver
Copyright (c) 1993–1995
==>
==>
==>
==>
Version x.xx
Texas Instruments Incorporated
add ’sine.asm’
add ’cos.asm’
add ’flt.asm’
building archive ’function.fn’
This creates a library called function.fn that contains the files sine.asm,
cos.asm, and flt.asm. (–v is the verbose option.)
7-6
Archiver Examples
Example 4
If you want to add new members to the library, specify:
ar500 –as function tan.obj arctan.obj area.obj
TMS320C54x Archiver
Version x.xx
Copyright (c) 1993–1995
Texas Instruments Incorporated
==>
symbol defined: ’K2’
==>
symbol defined: ’Rossignol’
==>
building archive ’function.lib’
Because this example doesn’t specify an extension for the libname, the
archiver adds the files to the library called function.lib. If function.lib didn’t
exist, the archiver would create it. (The –s option tells the archiver to list the
global symbols that are defined in the library.)
Example 5
If you want to modify a library member, you can extract it, edit it, and replace it. In this example, assume there’s a library named macros.lib that
contains the members push.asm, pop.asm, and swap.asm.
ar500 –x macros push.asm
The archiver makes a copy of push.asm and places it in the current
directory, but it doesn’t remove push.asm from the library. Now you can
edit the extracted file. To replace the copy of push.asm in the library with
the edited copy, enter:
ar500 –r macros push.asm
Archiver Description
7-7
Chapter 8
Linker Description
The TMS320C54x linker creates executable modules by combining COFF
object files. The concept of COFF sections is basic to linker operation; Chapter
2 discusses the COFF format in detail.
Topic
Page
8.1
Linker Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8.2
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8.3
Invoking the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4
8.4
Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6
8.5
Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
8.6
Object Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-19
8.7
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-21
8.8
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-25
8.9
Specifying a Section’s Runtime Address . . . . . . . . . . . . . . . . . . . . . . . 8-33
8.10 Using UNION and GROUP Statements . . . . . . . . . . . . . . . . . . . . . . . . . 8-37
8.11 Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-40
8.12 Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-45
8.13 Special Section Types (DSECT, COPY, and NOLOAD) . . . . . . . . . . . 8-47
8.14 Assigning Symbols at Link Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48
8.15 Creating and Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-52
8.16 Partial (Incremental) Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-56
8.17 Linking C Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-58
8.18 Linker Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-62
Linker Description
8-1
Linker Overview
8.1 Linker Overview
The TMS320C54x linker allows you to configure system memory by allocating
output sections efficiently into the memory map. As the linker combines object
files, it preforms the following tasks:
Allocates sections into the target system’s configured memory.
Relocates symbols and sections to assign them to final addresses.
Resolves undefined external references between input files.
The linker command language controls memory configuration, output section
definition, and address binding. The language supports expression assignment and evaluation. You configure system memory by defining and creating
a memory model that you design. Two powerful directives, MEMORY and
SECTIONS, allow you to:
Allocate sections into specific areas of memory.
Combine object file sections.
Define or redefine global symbols at link time.
8-2
Linker Development Flow
8.2 Linker Development Flow
Figure 8–1 illustrates the linker’s role in the assembly language development
process. The linker accepts several types of files as input, including object
files, command files, libraries, and partially linked files. The linker creates an
executable COFF object module that can be downloaded to one of several
development tools or executed by a TMS320C54x device.
Figure 8–1. Linker Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Macro
library
Assembler
Archiver
Library of
object
files
COFF
object
files
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
Assembler
source
Absolute lister
Cross-reference
lister
’C54x
Linker Description
8-3
Invoking the Linker
8.3 Invoking the Linker
The general syntax for invoking the linker is:
lnk500 [–options ] filename1 . ... filenamen
lnk500
is the command that invokes the linker.
options
can appear anywhere on the command line or in a linker
command file. (Options are discussed in Section 8.4, page
8-6.)
filenames
can be object files, linker command files, or archive libraries.
The default extension for all input files is .obj ; any other extension must be explicitly specified. The linker can determine
whether the input file is an object or ASCII file that contains
linker commands. The default output filename is a.out.
There are three methods for invoking the linker:
- Specify options and filenames on the command line. This example links
two files, file1.obj and file2.obj, and creates an output module named
link.out.
lnk500 file1.obj file2.obj –o link.out
- Enter the lnk500 command with no filenames and no options; the linker
prompts for them:
Object files [.obj] :
Command files :
Output file [a.out] :
Options :
8-4
J
For object files, enter one or more object filenames. The default extension is .obj. Separate the filenames with spaces or commas; if the last
character is a comma, the linker prompts for an additional line of object
filenames.
J
For command files, enter one or more command filenames.
J
The output file is the name of the linker output module. This overrides
any – o options entered with any of the other prompts. If there are no
– o options and you do not answer this prompt, the linker creates an
object file with a default filename of a.out.
J
The options prompt is for additional options, although you can also
enter them in a command file. Enter them with hyphens, just as you
would on the command line.
Invoking the Linker
Put filenames and options in a linker command file. For example, assume
that the file linker.cmd contains the following lines:
–o link.out
file1.obj
file2.obj
Now you can invoke the linker from the command line; specify the command filename as an input file:
lnk500 linker.cmd
When you use a command file, you can also specify other options and files
on the command line. For example, you could enter:
lnk500 –m link.map linker.cmd file3.obj
The linker reads and processes a command file as soon as it encounters
the filename on the command line, so it links the files in this order: file1.obj,
file2.obj, and file3.obj. This example creates an output file called link.out
and a map file called link.map.
Linker Description
8-5
Linker Options
8.4 Linker Options
Linker options control linking operations. They can be placed on the command
line or in a command file. Linker options must be preceded by a hyphen (–).
The order in which options are specified is unimportant, except for the – l and
–i options. Options may be separated from arguments (if they have them) by
an optional space. Table 8–1 summarizes the linker options.
Table 8–1. Linker Options Summary
Option
Description
–a
Produce an absolute, executable module. This is the default; if neither –a nor –r is specified,
the linker acts as if –a were specified.
– ar
Produce a relocatable, executable object module.
–b
Disable merge of symbolic debugging information.
–c
Use linking conventions defined by the ROM autoinitialization model of the TMS320C54x
C compiler.
– cr
Use linking conventions defined by the RAM autoinitialization model of the TMS320C54x
C compiler.
– e global_symbol
Define a global_symbol that specifies the primary entry point for the output module.
– f fill_value
Set the default fill value for holes within output sections; fill_value is a 16-bit constant.
– g global_symbol
Make a global_symbol static (overrides –h).
–h
Make all global symbols static.
– heap size
Set heap size (for the dynamic memory allocation in C) to size words and define a global
symbol that specifies the heap size. Default = 1K words.
– i dir †
Alter the library-search algorithm to look in dir before looking in the default location. This
option must appear before the – l option.
– l filename †
Name an archive library file as linker input; filename is an archive library name.
– m filename †
Produce a map or listing of the input and output sections, including holes, and place the
listing in filename.
–n
Ignore all fill specifications in memory directives.
– o filename †
Name the executable output module. The default filename is a.out.
–q
Request a quiet run (suppress the banner).
–r
Produce a relocatable output module.
–s
Strip symbol table information and line number entries from the output module.
– stack size
Set C system stack size to size words and define a global symbol that specifies the stack
size. Default = 1K words.
– u symbol
Place an unresolved external symbol into the output module’s symbol table.
–x
Force rereading of libraries. Resolves back references.
† The directory or filename must follow operating system conventions.
8-6
Linker Options
8.4.1
Relocation Capabilities (–a and –r Options)
The linker performs relocation, which is the process of adjusting all references
to a symbol when the symbol’s address changes. The linker supports two
options (– a and – r) that allow you to produce an absolute or a relocatable output module. If neither –a nor –r is specified, the linker acts as if –a is specified
by default.
- Producing an Absolute Output Module (–a Option)
When you use the –a option without the – r option, the linker produces an
absolute, executable output module. Absolute files contain no relocation
information. Executable files contain the following:
J
Special symbols defined by the linker (subsection 8.14.4, page 8-51,
describes these symbols)
J
An optional header that describes information such as the program
entry point
J
No unresolved references
The following example links file1.obj and file2.obj and creates an absolute
output module called a.out:
lnk500 –a file1.obj file2.obj
Note:
– a and – r Options
If you do not use the –a or the –r option, the linker acts as if you specified –a.
- Producing a Relocatable Output Module (– r Option)
When you use the –r option without the –a option, the linker retains relocation entries in the output module. If the output module will be relocated (at
load time) or relinked (by another linker execution), use –r to retain the
relocation entries.
The linker produces a file that is not executable when you use the –r option
without –a. A file that is not executable does not contain special linker symbols or an optional header. The file may contain unresolved references,
but these references do not prevent creation of an output module.
The following example links file1.obj and file2.obj and creates a relocatable output module called a.out:
lnk500 –r file1.obj file2.obj
The output file a.out can be relinked with other object files or relocated at
load time. (Linking a file that will be relinked with other files is called partial
linking. For more information, see Section 8.18, page 8-62.)
Linker Description
8-7
Linker Options
Producing an Executable Relocatable Output Module (–ar)
If you invoke the linker with both the –a and –r options, the linker produces
an executable, relocatable object module. The output file contains the
special linker symbols, an optional header, and all resolved symbol references; however, the relocation information is retained.
The following example links file1.obj and file2.obj and creates an executable, relocatable output module called xr.out:
lnk500 –ar file1.obj file2.obj –o xr.out
You can string the options together (lnk500 –ar) or enter them separately
(lnk500 –a –r).
Relocating or Relinking an Absolute Output Module
The linker issues a warning message (but continues executing) when it
encounters a file that contains no relocation or symbol table information.
Relinking an absolute file can be successful only if each input file contains
no information that needs to be relocated (that is, each file has no unresolved references and is bound to the same virtual address that it was
bound to when the linker created it).
8.4.2
Disable Merge of Symbolic Debugging Information (–b Option)
By default, the linker eliminates duplicate entries of symbolic debugging
information. Such duplicate information is commonly generated when a C
program is compiled for debugging. For example:
–[ header.h ]–
typedef struct
{
<define some structure members>
} XYZ;
–[ f1.c ]–
#include ”header.h”
...
–[ f2.c ]–
#include ”header.h”
...
When these files are compiled for debugging, both f1.obj and f2.obj will have
symbolic debugging entries to describe type XYZ. For the final output file, only
one set of these entries is necessary. The linker will eliminate the duplicate
entries automatically.
Use the –b option if you do not want the linker to keep such duplicate entries.
Using the –b option has the effect of the linker running faster and using less
machine memory.
8-8
Linker Options
8.4.3
C Language Options (–c and –cr Options)
The –c and –cr options cause the linker to use linking conventions that are
required by the C compiler.
The –c option tells the linker to use the ROM autoinitialization model.
The –cr option tells the linker to use the RAM autoinitialization model.
For more information about linking C code, see Section 8.17, page 8-58, and
subsection 8.17.5, page 8-61.
8.4.4
Define an Entry Point (–e global_symbol Option)
The memory address at which a program begins executing is called the entry
point. When a loader loads a program into target memory, the program counter
must be initialized to the entry point; the PC then points to the beginning of the
program.
The linker can assign one of four possible values to the entry point. These
values are listed below in the order in which the linker tries to use them. If you
use one of the first three values, it must be an external symbol in the symbol
table.
The value specified by the –e option. The syntax is –e global_symbol,
where global_symbol defines the entry point and must appear as an external symbol in one of the input files.
The value of symbol _c_int00 (if present). _c_int00 must be the entry point
if you are linking code produced by the C compiler.
The value of symbol _main (if present).
Zero (default value).
This example links file1.obj and file2.obj. The symbol begin is the entry point;
begin must be defined as external in file1 or file2.
lnk500 –e begin file1.obj file2.obj
8.4.5
Set Default Fill Value (–f cc Option)
The –f option fills the holes formed within output sections or initializes uninitialized sections when they are combined with initialized sections. This allows you
to initialize memory areas during link time without reassembling a source file.
The argument cc is a 16-bit constant (up to four hexadecimal digits). If you do
not use –f, the linker uses 0 as the default fill value.
This example fills holes with the hexadecimal value ABCD.
lnk500 –f 0ABCDh file1.obj file2.obj
Linker Description
8-9
Linker Options
8.4.6
Make All Global Symbols Static (–h and –g global_symbol Options)
The –h option makes all symbols defined with the .global assembler directive
static. This effectively hides the symbols, because static symbols are not visible to externally linked modules. This allows external symbols with the same
name (in different files) to be treated as unique. The –g option retains
global_symbol as a global even if the –h option is used. The –h option will not
modify symbols that were made global with the –g linker option.
The –h option effectively nullifies all .global assembler directives. All symbols
become local to the module in which they are defined, so no external references are possible. For example, assume that b1.obj, b2.obj, and b3.obj are
related and reference a global variable GLOB. Also assume that d1.obj,
d2.obj, and d3.obj are related and reference a separate global variable GLOB.
By using the –h option and partial linking, you can link the related files without
conflict.
lnk16 –h –r b1.obj b2.obj b3.obj –o bpart.out
lnk16 –h –r d1.obj d2.obj d3.obj –o dpart.out
The –h option guarantees that bpart.out and dpart.out do not have global symbols and therefore, that two distinct versions of GLOB exist. The –r option is
used to allow bpart.out and dpart.out to retain their relocation entries. These
two partially linked files can then be linked together safely with the following
command:
lnk16 bpart.out dpart.out –o system.out
8.4.7
Define Heap Size (–heap constant Option)
The C compiler uses an uninitialized section called .sysmem for the C runtime
memory pool used by malloc( ). You can set the size of this memory pool at
link time by using the –heap option. Specify the size as a constant immediately
after the option:
lnk500 –heap 0x0800 /* defines a 2k heap (.sysmem section)*/
The linker creates the .sysmem section only if there is a .sysmem section in
an input file.
The linker also creates a global symbol _ _SYSMEM_SIZE and assigns it a
value equal to the size of the heap. The default size is 1K words.
For more information about linking C code, see Section 8.17, page 8-58.
8-10
Linker Options
8.4.8
Alter the Library Search Algorithm (–i dir Option/C_DIR)
Usually, when you want to specify a library as linker input, you simply enter the
library name as you would any other input filename; the linker looks for the
library in the current directory. For example, suppose the current directory
contains the library object.lib. Assume that this library defines symbols that are
referenced in the file file1.obj. This is how you link the files:
lnk500 file1.obj object.lib
If you want to use a library that is not in the current directory, use the –l (lowercase L) linker option. The syntax for this option is –l filename. The filename is
the name of an archive library; the space between –l and the filename is
optional.
You can augment the linker’s directory search algorithm by using the –i linker
option or the environment variable. The linker searches for object libraries in
the following order:
1) It searches directories named with the –i linker option.
2) It searches directories named with the environment variable C_DIR.
3) If C_DIR is not set, it searches directories named with the assembler’s
environment variable, A_DIR.
4) It searches the current directory.
–i linker option
The –i option names an alternate directory that contains object libraries. The
syntax for this option is –i dir. dir names a directory that contains object
libraries; the space between –i and the directory name is optional.
When the linker is searching for object libraries named with the –l option, it
searches through directories named with –i first. Each –i option specifies only
one directory, but you can use several –i options per invocation. When you use
the –i option to name an alternate directory, it must precede the –l option on
the command line or in a command file.
For example, assume that there are two archive libraries called r.lib and
lib2.lib. The table below shows the directories that r.lib and lib2.lib reside in,
how to set environment variable, and how to use both libraries during a link.
Select the row for your operating system:
Operating System
Pathname
Invocation Command
DOS or OS/2
\ld and \ld2
lnk500 f1.obj f2.obj –i\ld –i\ld2 –lr.lib –llib2.lib
UNIX
/ld and /ld2
lnk500 f1.obj f2.obj –i/ld –i/ld2 –lr.lib –llib2.lib
Linker Description
8-11
Linker Options
Environment variable (C_DIR)
An environment variable is a system symbol that you define and assign a string
to. The linker uses an environment variable named C_DIR to name alternate
directories that contain object libraries. The commands for assigning the environment variable are:
Operating System
Enter
DOS or OS/2
set C_DIR= pathname;another pathname ...
UNIX
setenv C_DIR ”pathname;another pathname ...”
The pathnames are directories that contain object libraries. Use the –l option
on the command line or in a command file to tell the linker which libraries to
search for.
For example, assume that two archive libraries called r.lib and lib2.lib reside
in ld and ld2 directories. The table below shows the directories that r.lib and
lib2.lib reside in, how to set the environment variable, and how to use both
libraries during a link. Select the row for your operating system:
Operating System
Pathname
Invocation Command
DOS or OS/2
\ld and \ld2
set C_DIR=\ld;\ld2
lnk500 f1.obj f2.obj –l r.lib –l lib2.lib
UNIX
/ld and /ld2
setenv C_DIR ”/ld ;/ld2”
lnk500 f1.obj f2.obj –l r.lib –l lib2.lib
Note that the environment variable remains set until you reboot the system or
reset the variable by entering:
Operating System
Enter
DOS or OS/2
set C_DIR=
UNIX
unsetenv C_DIR
The assembler uses an environment variable named A_DIR to name alternate
directories that contain copy/include files or macro libraries. If C_DIR is not set,
the linker will search for object libraries in the directories named with A_DIR.
Section 8.6, page 8-19, contains more information about object libraries.
8-12
Linker Options
8.4.9
Create a Map File (–m filename Option)
The –m option creates a linker map listing and puts it in filename. This map
describes:
Memory configuration
Input and output section allocation
The addresses of external symbols after they have been relocated
The map file contains the name of the output module and the entry point; it may
also contain up to three tables:
A table showing the new memory configuration if any nondefault memory
is specified
A table showing the linked addresses of each output section and the input
sections that make up the output sections
A table showing each external symbol and its address. This table has two
columns: the left column contains the symbols sorted by name, and the
right column contains the symbols sorted by address
This example links file1.obj and file2.obj and creates a map file called map.out:
lnk500 file1.obj file2.obj –m map.out
Example 8–14, page 8-64, shows an example of a map file.
8.4.10 Ignore the Memory Directive Fill Specification (–n Option)
The –n option will force the linker to ignore any MEMORY directive fill specification. This option can be used in the development stage of a project to avoid
generating large .out files, which can result from the use of MEMORY directive
fill specifications.
8.4.11 Name an Output Module (–o filename Option)
The linker creates an output module when no errors are encountered. If you
do not specify a filename for the output module, the linker gives it the default
name a.out. If you want to write the output module to a different file, use the
–o option. The filename is the new output module name.
This example links file1.obj and file2.obj and creates an output module named
run.out:
lnk500 –o run.out file1.obj file2.obj
8.4.12 Specify a Quiet Run (–q Option)
The –q option suppresses the linker’s banner when –q is the first option on the
command line or in a command file. This option is useful for batch operation.
Linker Description
8-13
Linker Options
8.4.13 Strip Symbolic Information (–s Option)
The –s option creates a smaller output module by omitting symbol table
information and line number entries. The –s option is useful for production
applications when you must create the smallest possible output module.
This example links file1.obj and file2.obj and creates an output module,
stripped of line numbers and symbol table information, named nosym.out:
lnk500 –o nosym.out –s file1.obj file2.obj
Using the –s option limits later use of a symbolic debugger and may prevent
a file from being relinked.
8.4.14 Define Stack Size (–stack constant Option)
The TMS320C54x C compiler uses an uninitialized section, .stack, to allocate
space for the runtime stack. You can set the size of the .stack section at link
time with the –stack option. Specify the size as a constant immediately after
the option:
lnk500 –stack 0x1000 /* defines a 4K stack (.stack section) */
If you specified a different stack size in an input section, the input section stack
size is ignored. Any symbols defined in the input section remain valid; only the
stack size will be different.
When the linker defines the .stack section, it also defines a global symbol,
_ _STACK_SIZE, and assigns it a value equal to the size of the section. The
default stack size is 1K words.
8.4.15 Introduce an Unresolved Symbol (–u symbol Option)
The –u option introduces an unresolved symbol into the linker’s symbol table.
This forces the linker to search a library and include the member that defines
the symbol. The linker must encounter the –u option before it links in the member that defines the symbol.
For example, suppose a library named rts.lib contains a member that defines
the symbol symtab; none of the object files being linked reference symtab.
However, suppose you plan to relink the output module, and you would like to
include the library member that defines symtab in this link. Using the –u option
as shown below forces the linker to search rts.lib for the member that defines
symtab and to link in the member.
lnk500 –u symtab file1.obj file2.obj rts.lib
If you do not use –u, this member is not included because there is no explicit
reference to it in file1.obj or file2.obj.
8-14
Linker Options
8.4.16 Exhaustively Read Libraries (–x Option)
The linker normally reads input files, including archive libraries, only once
when they are encountered on the command line or in the command file. When
an archive is read, any members that resolve references to undefined symbols
are included in the link. If an input file later references a symbol defined in a
previously read archive library (this is called a back reference), the reference
will not be resolved.
With the –x option, you can force the linker to repeatedly reread all libraries.
The linker will continue to reread libraries until no more references can be
resolved. For example, if a.lib contains a reference to a symbol defined in b.lib,
and b.lib contains a reference to a symbol defined in a.lib, you can resolve the
mutual dependencies by listing one of the libraries twice, as in:
lnk500 –la.lib –lb.lib –la.lib
or you can force the linker to do it for you:
lnk500 –x –la.lib –lb.lib
Linking using the –x option may be slower, so you should use it only as needed.
Linker Description
8-15
Linker Command Files
8.5 Linker Command Files
Linker command files allow you to put linking information in a file; this is useful
when you invoke the linker often with the same information. Linker command
files are also useful because they allow you to use the MEMORY and
SECTIONS directives to customize your application. You must use these
directives in a command file; you cannot use them on the command line. Command files are ASCII files that contain one or more of the following:
Input filenames, which specify object files, archive libraries, or other com-
mand files. (If a command file calls another command file as input, this
statement must be the last statement in the calling command file. The
linker does not return from called command files.)
Linker options, which can be used in the command file in the same manner
that they are used on the command line
The MEMORY and SECTIONS linker directives. The MEMORY directive
defines the target memory configuration. The SECTIONS directive controls how sections are built and allocated.
Assignment statements, which define and assign values to global symbols
To invoke the linker with a command file, enter the lnk500 command and follow
it with the name of the command file:
lnk500 command_filename
The linker processes input files in the order that it encounters them. If the linker
recognizes a file as an object file, it links it. Otherwise, it assumes that a file
is a command file and begins reading and processing commands from it.
Command filenames are case sensitive, regardless of the system used.
Example 8–1 shows a sample linker command file called link.cmd. (Subsection 2.3.2, page 2-12, contains another example of a linker command file.)
Example 8–1.Linker Command File
a.obj
b.obj
–o prog.out
–m prog.map
/*
/*
/*
/*
First input filename
Second input filename
Option to specify output file
Option to specify map file
*/
*/
*/
*/
The sample file in Example 8–1 contains only filenames and options. (You can
place comments in a command file by delimiting them with /* and */.) To invoke
the linker with this command file, enter:
lnk500 link.cmd
8-16
Linker Command Files
You can place other parameters on the command line when you use a
command file:
lnk500 –r link.cmd c.obj d.obj
The linker processes the command file as soon as it encounters it, so a.obj and
b.obj are linked into the output module before c.obj and d.obj.
You can specify multiple command files. If, for example, you have a file called
names.lst that contains filenames and another file called dir.cmd that contains
linker directives, you could enter:
lnk500 names.lst dir.cmd
One command file can call another command file; this type of nesting is limited
to 16 levels. If a command file calls another command file as input, this
statement must be the last statement in the calling command file.
Blanks and blank lines are insignificant in a command file except as delimiters.
This also applies to the format of linker directives in a command file.
Example 8–2 shows a sample command file that contains linker directives.
(Linker directive formats are discussed in later sections.)
Example 8–2.Command File With Linker Directives
a.obj b.obj c.obj
–o prog.out –m prog.map
/* Input filenames
/* Options
*/
*/
MEMORY
{
RAM:
ROM:
}
/* MEMORY directive
*/
SECTIONS
{
.text:
.data:
.bss:
}
origin = 100h
origin = 01000h
length = 0100h
length = 0100h
/* SECTIONS directive
*/
> ROM
> ROM
> RAM
Linker Description
8-17
Linker Command Files
The following names are reserved as keywords for linker directives. Do not use
them as symbol or section names in a command file.
align
ALIGN
attr
ATTR
block
BLOCK
COPY
DSECT
f
fill
FILL
group
GROUP
l (lowercase L)
len
length
LENGTH
load
LOAD
MEMORY
NOLOAD
o
org
origin
ORIGIN
page
PAGE
range
run
RUN
SECTIONS
spare
type
TYPE
UNION
Constants in command files
Constants can be specified with either of two syntax schemes: the scheme
used for specifying decimal, octal, or hexadecimal constants used in the
assembler (see Section 3.6, page 3-12) or the scheme used for integer
constants in C syntax.
Examples:
8-18
Decimal
Octal
Hexadecimal
Assembler Format:
32
40q
20h
C Format:
32
040
0x20
Object Libraries
8.6 Object Libraries
An object library is a partitioned archive file that contains complete object files
as members. Usually, a group of related modules are grouped together into
a library. When you specify an object library as linker input, the linker includes
any members of the library that define existing unresolved symbol references.
You can use the archiver to build and maintain libraries. Chapter 7 contains
more information about the archiver.
Using object libraries can reduce link time and the size of the executable module. Normally, if an object file that contains a function is specified at link time,
it is linked whether it is used or not; however, if that same function is placed
in an archive library, it is included only if it is referenced.
The order in which libraries are specified is important because the linker
includes only those members that resolve symbols that are undefined when
the library is searched. The same library can be specified as often as necessary; it is searched each time it is included. Alternatively, the –x option can be
used. A library has a table that lists all external symbols defined in the library;
the linker searches through the table until it determines that it cannot use the
library to resolve any more references.
The following examples link several files and libraries. Assume that:
Input files f1.obj and f2.obj both reference an external function named
clrscr
Input file f1.obj references the symbol origin
Input file f2.obj references the symbol fillclr
Member 0 of library libc.lib contains a definition of origin
Member 3 of library liba.lib contains a definition of fillclr
Member 1 of both libraries defines clrscr
If you enter:
lnk500 f1.obj liba.lib f2.obj libc.lib,
then:
Member 1 of liba.lib satisfies both references to clrscr because the library
is searched and clrscr is defined before f2.obj references it.
Member 0 of libc.lib satisfies the reference to origin.
Member 3 of liba.lib satisfies the reference to fillclr.
Linker Description
8-19
Object Libraries
If, however, you enter
lnk500 f1.obj f2.obj libc.lib liba.lib,
the references to clrscr are satisfied by member 1 of libc.lib.
If none of the linked files reference symbols defined in a library, you can use
the –u option to force the linker to include a library member. The next example
creates an undefined symbol rout1 in the linker’s global symbol table. If you
enter
lnk500 –u rout1 libc.lib
and if any members of libc.lib define rout1, the linker includes those members.
It is not possible to control the allocation of individual library members; members are allocated according to the SECTIONS directive default allocation
algorithm.
Subsection 8.4.8, page 8-11, describes methods for specifying directories that
contain object libraries.
8-20
The MEMORY Directive
8.7 The MEMORY Directive
The linker determines where output sections should be allocated in memory;
it must have a model of target memory to accomplish this task. The MEMORY
directive allows you to specify a model of target memory so that you can define
the types of memory your system contains and the address ranges they
occupy. The linker maintains the model as it allocates output sections and uses
it to determine which memory locations can be used for object code.
The memory configurations of TMS320C54x systems differ from application
to application. The MEMORY directive allows you to specify a variety of
configurations. After you use MEMORY to define a memory model, you can
use the SECTIONS directive to allocate output sections into defined memory.
Refer to Section 2.3, page 2-10, for details on how the linker handles sections.
Refer to Section 2.4, page 2-13, for information on the relocation of sections.
8.7.1
Default Memory Model
The assembler enables you to assemble code for the TMS320C54x device.
The assembler inserts a field in the output file’s header, identifying the device.
The linker reads this information from the object file’s header. If you do not use
the MEMORY directive, the linker uses a default memory model specific to the
named device. For more information about the default memory model, see
subsection 8.12.1, page 8-45.
8.7.2
MEMORY Directive Syntax
The MEMORY directive identifies ranges of memory that are physically
present in the target system and can be used by a program. Each memory
range has a name, a starting address, and a length.
’C54x devices have separate memory spaces that occupy the same address
ranges. In the default model, one space is dedicated to program areas, while
a second is dedicated to data (the number of separate address spaces
depends on the customized configuration of your chip. See the TMS320C54x
User’s Guide for more information.)
The linker allows you to configure these address spaces separately by using
the MEMORY directive’s PAGE option. In the default model, PAGE 0 refers to
program memory, and PAGE 1 refers to data memory. The linker treats these
two pages as completely separate memory spaces. The ’C54x supports as
many as 255 PAGES, but the number available to you depends on the configuration you have chosen.
Linker Description
8-21
The MEMORY Directive
When you use the MEMORY directive, be sure to identify all the memory
ranges that are available for object code. Memory defined by the MEMORY
directive is configured memory; any memory that you do not explicitly account
for with the MEMORY directive is unconfigured memory. The linker does not
place any part of a program into unconfigured memory. You can represent nonexistent memory spaces by simply not including an address range in a
MEMORY directive statement.
The MEMORY directive is specified in a command file by the word MEMORY
(uppercase), followed by a list of memory range specifications enclosed in
braces. The MEMORY directive in Example 8–3 defines a system that has 4K
words of ROM at address 0h in program memory, 32 words of RAM at address
60h in data memory, and 512 words at address 200h in data memory.
Example 8–3.The MEMORY Directive
/**************************************************/
/*
Sample command file with MEMORY directive
*/
/**************************************************/
file1.obj
file2.obj
/* Input files */
–o prog.out
/* Options
*/
MEMORY
directive
PAGE
options
MEMORY
{
PAGE 0: ROM:
PAGE 1: SCRATCH:
ONCHIP:
origin = C00h,
length = 1000h
origin =
origin =
length =
20h
length – 1000h
60h,
80h,
}
names
origins
lengths
You could then use the SECTIONS directive to tell the linker where to link the
sections. For example, you could allocate the .text and .data sections into the
memory area named ROM and allocate the .bss section into B2 or B0B1.
You normally use the MEMORY directive in conjunction with the SECTIONS
directive to control allocation of output sections. After you use the MEMORY
directive to specify the target system’s memory model, you can use the
SECTIONS directive to allocate output sections into specific named memory
ranges or into memory that has specific attributes. For example, you could
allocate the .text and .data sections into the area named ROM and allocate the
.bss section into the area name ONCHIP.
8-22
The MEMORY Directive
The general syntax for the MEMORY directive is:
MEMORY
{
PAGE 0 : name 1 [(attr)] : origin = constant , length = constant;
PAGE n : name n [(attr)] : origin = constant , length = constant;
}
PAGE
identifies a memory space. You can specify up to 255 pages,
depending on your configuration; usually, PAGE 0 specifies program memory, and PAGE 1 specifies data memory. If you do not
specify a PAGE, the linker acts as if you specified PAGE 0. Each
PAGE represents a completely independent address space. Configured memory on PAGE 0 can overlap configured memory on
PAGE 1.
name
Names a memory range. A memory name may be one to eight
characters; valid characters include A–Z, a–z, $, ., and _. The
names have no special significance to the linker; they simply identify memory ranges. Memory range names are internal to the linker
and are not retained in the output file or in the symbol table.
Memory ranges on separate pages can have the same name; within a page, however, all memory ranges must have unique names
and must not overlap.
attr
Specifies one to four attributes associated with the named range.
Attributes are optional; when used, they must be enclosed in parentheses. Attributes restrict the allocation of output sections into
certain memory ranges. If you do not use any attributes, you can
allocate any output section into any range with no restrictions. Any
memory for which no attributes are specified (including all memory
in the default model) has all four attributes. Valid attributes include:
R
W
X
I
origin
specifies that the memory can be read
specifies that the memory can be written to
specifies that the memory can contain executable code
specifies that the memory can be initialized
Specifies the starting address of a memory range; enter as origin,
org, or o. The value, specified in bytes, is a 16-bit constant and may
be decimal, octal, or hexadecimal.
Linker Description
8-23
The MEMORY Directive
length
Specifies the length of a memory range; enter as length, len, or l.
The value, specified in bytes, is a 16-bit constant and may be decimal, octal, or hexadecimal.
fill
Specifies a fill character for the memory range; enter as fill or f. Fills
are optional. The value is a 2-byte integer constant and may be
decimal, octal, or hexadecimal. The fill value will be used to fill
areas of the memory range that are not allocated to a section.
Note:
Filling Memory Ranges
If you specify fill values for large memory ranges, your output file will be very
large because filling a memory range (even with 0s) causes raw data to be
generated for all unallocated blocks of memory in the range.
The following example specifies a memory range with the R and W attributes
and a fill constant of 0FFFFh:
MEMORY
{
RFILE (RW) : o = 02h, l = 0FEh, f = 0FFFFh
}
Figure 8–2 illustrates the memory map shown in Example 8–3.
Figure 8–2. Memory Map Defined in Example 8–3
Data Memory
ÉÉÉÉ
ÉÉÉÉ
0005Fh
00060h
0007Fh
00080h
SCRATCH
ONCHIP
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
on-chip
RAM
00FFFh
01000h
0FFFFh
8-24
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
Program Memory
00000h
00000h
00C00h
ROM
0FF80h
0FFFFh
on-chip
ROM
The SECTIONS Directive
8.8 The SECTIONS Directive
The SECTIONS directive:
Describes how input sections are combined into output sections
Defines output sections in the executable program
Specifies where output sections are placed in memory (in relation to each
other and to the entire memory space)
Permits renaming of output sections
Refer to Section 2.3, page 2-10, for details on how the linker handles sections.
Refer to Section 2.4, page 2-13, for information on the relocation of sections.
8.8.1
Default Configuration
If you do not specify a SECTIONS directive, the linker uses a default algorithm
for combining and allocating the sections. Section 8.12, page 8-45, describes
this algorithm in detail.
8.8.2
SECTIONS Directive Syntax
The SECTIONS directive is specified in a command file by the word
SECTIONS (uppercase), followed by a list of output section specifications
enclosed in braces.
The general syntax for the SECTIONS directive is:
SECTIONS
{
name : [property, property, property,...]
name : [property, property, property,...]
name : [property, property, property,...]
}
Each section specification, beginning with name, defines an output section.
(An output section is a section in the output file.) After the section name is a
list of properties that define the section’s contents and how the section is allocated. The properties may be separated by optional commas. Possible properties for a section are:
Load allocation, which defines where in memory the section is to be
loaded
Syntax:
load = allocation
allocation
> allocation
or
or
Linker Description
8-25
The SECTIONS Directive
Run allocation, which defines where in memory the section is to be run
Syntax:
run = allocation
run > allocation
or
Input sections, which defines the input sections that constitute the output
section
Syntax:
{ input_sections }
Section type, which defines flags for special section types
Syntax:
type = COPY
or
type = DSECT
or
type = NOLOAD
For more information on section types, see Section 8.13, page 8-47.
Fill value, which defines the value used to fill uninitialized holes
or
fill = value
name: ... { ... } = value
For more information on creating and filling holes, see Section 8.15, page
8-52.
Syntax:
Example 8–4 shows a SECTIONS directive in a sample linker command file.
Figure 8–3 shows how these sections are allocated in memory.
Example 8–4.The SECTIONS Directive
/**************************************************/
/* Sample command file with SECTIONS directive
*/
/**************************************************/
file1.obj
file2.obj
/* Input files */
–o prog.out
/* Options
*/
SECTIONS
directive
section
specifications
SECTIONS
{
.text:
load = ROM, run = 800h
.const:
load = ROM
.bss:
load = RAM
.vectors: load = FF80h
{
t1.obj(.intvec1)
t2.obj(.intvec2)
endvec = .;
}
.data:
align = 16
}
Figure 8–3 shows the five output sections defined by the sections directive in
Example 8–4: .vectors, .text, .const, .bss, and .data.
8-26
The SECTIONS Directive
Figure 8–3. Section Allocation Defined by Example 8–4
RAM
00h
.bss
– allocated in RAM
.data
– aligned on 16-word
boundary
ÉÉÉÉÉÉ
ÉÉÉÉÉÉ
ÉÉÉÉÉÉ
The .bss section combines the .bss sections from
file1.obj and file2.obj.
The .data section combines the .data sections from
file1.obj and file2.obj. The linker will place it anywhere there is space for it (in RAM in this illustration)
and align it to a 16-word boundary.
ROM
.text
– allocated in ROM
.const
– allocated in ROM
The .text section combines the .text sections from
file1.obj and file2.obj. The linker combines all sections named .text into this section. The application
must relocate the section to run at 0800h.
The .const section combines the .const sections
from file1.obj and file2.obj.
FF80h
8.8.3
.vectors
– bound at 0FF80h
The .vectors section is composed of the .intvec1
section from t1.obj and the .intvec2 section from
t2.obj.
Specifying the Address of Output Sections (Allocation)
The linker assigns each output section two locations in target memory: the
location where the section will be loaded and the location where it will be run.
Usually, these are the same, and you can think of each section as having only
a single address. In any case, the process of locating the output section in the
target’s memory and assigning its address(es) is called allocation. For more
information about using separate load and run allocation, see Section 8.9,
page 8-33.
If you do not tell the linker how a section is to be allocated, it uses a default
algorithm to allocate the section. Generally, the linker puts sections wherever
they fit into configured memory. You can override this default allocation for a
section by defining it within a SECTIONS directive and providing instructions
on how to allocate it.
Linker Description
8-27
The SECTIONS Directive
You control allocation by specifying one or more allocation parameters. Each
parameter consists of a keyword, an optional equal sign or greater-than sign,
and a value optionally enclosed in parentheses. If load and run allocation is
separate, all parameters following the keyword LOAD apply to load allocation,
and those following RUN apply to run allocation. Possible allocation
parameters are:
Binding
allocates a section at a specific address.
.text: load = 0x1000
Memory
allocates the section into a range defined in the MEMORY
directive with the specified name (like ROM) or attributes.
.text: load > ROM
Alignment
uses the align keyword to specify that the section should
start on an address boundary.
.text: align = 0x80
Blocking
uses the block keyword to specify that the section must fit
between two address boundaries: if the section is too big, it
will start on an address boundary.
.text: block(0x80)
Page
specifies the memory page to be used (see Section 8.11,
page 8-40).
.text: PAGE 0
For the load (usually the only) allocation, you may simply use a greater-than
sign and omit the load keyword:
.text: > ROM
.text: > 0x1000
.text: {...} > ROM
If more than one parameter is used, you can string them together as follows:
.text: > ROM align 16 PAGE 2
Or, if you prefer, use parentheses for readability:
.text: load = (ROM align(16) page (2))
8-28
The SECTIONS Directive
Binding
You can supply a specific starting address for an output section by following
the section name with an address:
.text: 0x1000
This example specifies that the .text section must begin at location 1000h. The
binding address must be a 16-bit constant.
Output sections can be bound anywhere in configured memory (assuming
there is enough space), but they cannot overlap. If there is not enough space
to bind a section to a specified address, the linker issues an error message.
Note:
Binding and Alignment or Named Memory are Incompatible
You cannot bind a section to an address if you use alignment or named
memory. If you try to do so, the linker issues an error message.
Named memory
You can allocate a section into a memory range that is defined by the
MEMORY directive. This example names ranges and links sections into them:
MEMORY
{
ROM (RIX) :
RAM (RWIX) :
}
origin = C00h,
origin = 80h,
SECTIONS
{
.text :
.data ALIGN(128) :
.bss
:
length = 1000h
length = 1000h
> ROM
> RAM
> RAM
In this example, the linker places .text into the area called ROM. The .data and
.bss output sections are allocated into RAM. You can align a section within a
named memory range; the .data section is aligned on a 128-word boundary
within the RAM range.
Similarly, you can link a section into an area of memory that has particular
attributes. To do this, specify a set of attributes (enclosed in parentheses)
instead of a memory name. Using the same MEMORY directive declaration,
you can specify:
SECTIONS
{
.text:
.data:
.bss :
}
> (X)
> (RI)
> (RW)
/* .text ––> executable memory
/* .data ––> read or init memory
/* .bss ––> read or write memory
Linker Description
*/
*/
*/
8-29
The SECTIONS Directive
In this example, the .text output section can be linked into either the ROM or
RAM area because both areas have the X attribute. The .data section can also
go into either ROM or RAM because both areas have the R and I attributes.
The .bss output section, however, must go into the RAM area because only
RAM is declared with the W attribute.
You cannot control where in a named memory range a section is allocated,
although the linker uses lower memory addresses first and avoids fragmentation when possible. In the preceding examples, assuming that no conflicting
assignments exist, the .text section would start at address 0. If a section must
start on a specific address, use binding instead of named memory.
Alignment and blocking
You can tell the linker to place an output section at an address that falls on an
n-word boundary, where n is a power of 2. For example:
.text: load = align(128)
allocates .text so that it falls on a page boundary.
Blocking is a weaker form of alignment that allocates a section anywhere
within a block of size n. If the section is larger than the block size, the section
will begin on that boundary. As with alignment, n must be a power of 2. For
example:
bss: load = block(0x80)
allocates .bss so that the section either is contained in a single 128K-word
page or begins on a page.
You can use alignment or blocking alone or in conjunction with a memory area,
but alignment and blocking cannot be used together.
Specifying input sections
An input section specification identifies the sections from input files that are
combined to form an output section. The linker combines input sections by
concatenating them in the order in which they are specified. The size of an
output section is the sum of the sizes of the input sections that comprise it.
Example 8–5 shows the most common type of section specification; note that
no input sections are listed.
8-30
The SECTIONS Directive
Example 8–5.The Most Common Method of Specifying Section Contents
SECTIONS
{
.text:
.data:
.bss:
}
In Example 8–5 the linker takes all the .text sections from the input files and
combines them into the .text output section. The linker concatenates the .text
input sections in the order that it encounters them in the input files. The linker
performs similar operations with the .data and .bss sections. You can use this
type of specification for any output section.
You can explicitly specify the input sections that form an output section. Each
input section is identified by its filename and section name:
SECTIONS
{
.text :
{
f1.obj(.text)
f2.obj(sec1)
f3.obj
f4.obj(.text,sec2)
}
}
/* Build .text output section
*/
/*
/*
/*
/*
*/
*/
*/
*/
Link
Link
Link
Link
.text section from f1.obj
sec1 section from f2.obj
ALL sections from f3.obj
.text and sec2 from f4.obj
It is not necessary for input sections to have the same name as each other or
as the output section they become part of. If a file is listed with no sections, all
of its sections are included in the output section. If any additional input sections
have the same name as an output section, but are not explicitly specified by
the SECTIONS directive, they are automatically linked in at the end of the output section. For example, if the linker found more .text sections in the preceding example, and these .text sections were not specified anywhere in the
SECTIONS directive, the linker would concatenate these extra sections after
f4.obj(sec2).
The specifications in Example 8–5 are actually a shorthand method for the
following:
SECTIONS
{
.text: { *(.text) }
.data: { *(.data) }
.bss: { *(.bss) }
}
Linker Description
8-31
The SECTIONS Directive
The specification *(.text) means the unallocated .text sections from all the
input files. This format is useful when:
You want the output section to contain all input sections that have a speci-
fied name, but the output section name is different than the input sections’
name.
You want the linker to allocate the input sections before it processes addi-
tional input sections or commands within the braces.
The following example illustrates the two purposes above:
SECTIONS
{
.text
:
{
abc.obj(xqt)
*(.text)
.data
}
:
{
*(.data)
fil.obj(table)
}
}
In this example, the .text output section contains a named section xqt from file
abc.obj, which is followed by all the .text input sections. The .data section contains all the .data input sections, followed by a named section table from the
file fil.obj. This method includes all the unallocated sections. For example, if
one of the .text input sections was already included in another output section
when the linker encountered *(.text), the linker could not include that first .text
input section in the second output section.
8-32
Specifying a Section’s Runtime Address
8.9 Specifying a Section’s Runtime Address
At times, you may want to load code into one area of memory and run it in
another. For example, you may have performance-critical code in a ROMbased system. The code must be loaded into ROM, but it would run faster in
RAM.
The linker provides a simple way to accomplish this. You can use the
SECTIONS directive to direct the linker to allocate a section twice: once to set
its load address and again to set its run address. For example:
.fir: load = ROM, run = RAM
Use the load keyword for the load address and the run keyword for the run
address.
Refer to Section 2.5, page 2-15, for an overview on runtime relocation.
8.9.1
Specifying Load and Run Addresses
The load address determines where a loader will place the raw data for the
section. All references to the section (such as labels in it) refer to its run
address. The application must copy the section from its load address to its run
address; this does not happen automatically when you specify a separate run
address.
If you provide only one allocation (either load or run) for a section, the section
is allocated only once and will load and run at the same address. If you provide
both allocations, the section is allocated as if it were two sections of the same
size. This means that both allocations occupy space in the memory map and
cannot overlay each other or other sections. (The UNION directive provides
a way to overlay sections; see subsection 8.10.1, page 8-37.)
If either the load or run address has additional parameters, such as alignment
or blocking, list them after the appropriate keyword. Everything related to allocation after the keyword load affects the load address until the keyword run is
seen, after which, everything affects the run address. The load and run allocations are completely independent, so any qualification of one (such as alignment) has no effect on the other. You may also specify run first, then load. Use
parentheses to improve readability.
Linker Description
8-33
Specifying a Section’s Runtime Address
The examples below specify load and run addresses:
.data: load = ROM, align = 32, run = RAM
(align applies only to load )
.data: load = (ROM align 32), run = RAM
(identical to previous example)
.data: run
load
=
=
RAM, align 32,
align 16
(align 32 in RAM for run; align 16 anywhere for load)
8.9.2
Uninitialized Sections
Uninitialized sections (such as .bss) are not loaded, so their only significant
address is the run address. The linker allocates uninitialized sections only
once: if you specify both run and load addresses, the linker warns you and
ignores the load address. Otherwise, if you specify only one address, the linker
treats it as a run address, regardless of whether you call it load or run. The
example below specifies load and run addresses for an uninitialized section:
.bss: load = 0x1000, run = RAM
A warning is issued, load is ignored, and space is allocated in RAM. All of the
following examples have the same effect. The .bss section is allocated in RAM.
.bss: load = RAM
.bss: run = RAM
.bss: > RAM
8.9.3
Referring to the Load Address by Using the .label Directive
Normally, any reference to a symbol in a section refers to its runtime address.
However, it may be necessary at runtime to refer to a load-time address.
Specifically, the code that copies a section from its load address to its run
address must have access to the load address. The .label directive defines a
special symbol that refers to the section’s load address. Thus, whereas normal
symbols are relocated with respect to the run address, .label symbols are relocated with respect to the load address. For more information on the .label
directive, see page 4-51.
8-34
Specifying a Section’s Runtime Address
Example 8–6.Copying a Section From ROM to RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; define a section to be copied from ROM to RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
.sect ”.fir”
.label fir_src
; load address of section
fir:
; run adddress of section
<code here>
; code for the section
.label fir_end
; load address of section end
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; copy .fir section from ROM into RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
.text
STM
RPT
MVDP
fir_src, AR1
; get load address
#(fir_end – fir_src – 1)
*AR1+, fir
; copy address to program memory
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; jump to section, now in RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
CALL fir
Linker Command File
/**************************************************/
/* PARTIAL LINKER COMMAND FILE FOR FIR EXAMPLE
*/
/**************************************************/
MEMORY
{
PAGE 0 :
PAGE 0 :
PAGE 1 :
}
ONCHIP :
PROG
:
DATA
:
origin = 0800h, length = 02400h
origin = 02C00h, length = 0D200h
origin = 0800h, length – 0F800h
SECTIONS
{
.text: load = PROG PAGE 0
.fir: load = DATA PAGE 1, run ONCHIP PAGE 0
}
Figure 8–4 illustrates the runtime execution of this example.
Linker Description
8-35
Specifying a Section’s Runtime Address
Figure 8–4. Runtime Execution of Example 8–6
Program Memory
800h
800h
ONCHIP
fir (relocated
to run here)
2C00h
PROG
.text
FE00h
8-36
Data Memory
DATA
.fir
(loads here)
Using UNION and GROUP Statements
8.10 Using UNION and GROUP Statements
Two SECTIONS statements allow you to conserve memory: GROUP and
UNION. Unioning sections causes the linker to allocate them to the same run
address. Grouping sections causes the linker to allocate them contiguously in
memory.
8.10.1 Overlaying Sections With the UNION Statement
For some applications, you may want to allocate more than one section to run
at the same address. For example, you may have several routines you want
in on-chip RAM at various stages of execution. Or you may want several data
objects that will not be active at the same time to share a block of memory. The
UNION statement within the SECTIONS directive provides a way to allocate
several sections at the same runtime address.
Example 8–7.The UNION Statement
SECTIONS
{
.text: load = ROM
UNION: run = RAM
{
.bss1: { file1.obj(.bss) }
.bss2: { file2.obj(.bss) }
}
.bss3: run = RAM { globals.obj(.bss) }
In Example 8–7, the .bss sections from file1.obj and file2.obj are allocated at
the same address in RAM. In the memory map, the union occupies as much
space as its largest component. The components of a union remain independent sections; they are simply allocated together as a unit.
Allocation of a section as part of a union affects only its run address. Under no
circumstances can sections be overlaid for loading. If an initialized section is
a union member (an initialized section has raw data, such as .text), its load
allocation must be separately specified. For example:
Example 8–8.Separate Load Addresses for UNION Sections
UNION: run = RAM
{
.text1: load = ROM, { file1.obj(.text) }
.text2: load = ROM, { file2.obj(.text) }
}
Linker Description
8-37
Using UNION and GROUP Statements
Figure 8–5. Memory Allocation Shown in Example 8–7 and Example 8–8
Allocation for Example 8–7
Allocation for Example 8–8
RAM
.bss2
.bss1
RAM
Sections can run
as a union. This is
runtime allocation
only.
.text 2 (run)
.text 1 (run)
copies at
runtime
.bss3
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ROM
.text
Sections cannot
load as a union.
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ROM
.text 1 (load)
.text 2 (load)
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
Since the .text sections contain data, they cannot load as a union, although
they can be run as a union. Therefore, each requires its own load address. If
you fail to provide a load allocation for an initialized section within a union, the
linker issues a warning and allocates load space anywhere it fits in configured
memory.
Uninitialized sections are not loaded and do not require load addresses.
The UNION statement applies only to allocation of run addresses, so it is
redundant to specify a load address for the union itself. For purposes of allocation, the union is treated as an uninitialized section: any one allocation specified is considered a run address, and, if both are specified, the linker issues
a warning and ignores the load address.
Note:
UNION and Overlay Page Are Not the Same
The UNION capability and the overlay page capability (see Section 8.11,
page 8-40) may sound similar because they both deal with overlays. They
are, in fact, quite different. UNION allows multiple sections to be overlaid
within the same memory space. Overlay pages, on the other hand, define
multiple memory spaces. It is possible to use the page facility to approximate
the function of UNION, but this is cumbersome.
8-38
Using UNION and GROUP Statements
8.10.2 Grouping Output Sections Together
The SECTIONS directive has a GROUP option that forces several output sections to be allocated contiguously. For example, assume that a section named
term_rec contains a termination record for a table in the .data section. You can
force the linker to allocate .data and term_rec together:
Example 8–9.Allocate Sections Together
SECTIONS
{
.text
.bss
GROUP 1000h :
{
.data
term_rec
}
}
/* Normal output section
/* Normal output section
/* Specify a group of sections
*/
*/
*/
/* First section in the group
*/
/* Allocated immediately after .data */
You can use binding, alignment, or named memory to allocate a GROUP in the
same manner as a single output section. In the preceding example, the
GROUP is bound to address 1000h. This means that .data is allocated at
1000h, and term_rec follows it in memory.
Note:
You Cannot Specify Addresses for Sections Within a GROUP
When you use the GROUP option, binding, alignment, or allocation into
named memory can be specified for the group only. You cannot use binding,
named memory, or alignment for sections within a group.
Linker Description
8-39
Overlay Pages
8.11 Overlay Pages
Some target systems use a memory configuration in which all or part of the
memory space is overlaid by shadow memory. This allows the system to map
different banks of physical memory into and out of a single address range in
response to hardware selection signals. In other words, multiple banks of
physical memory overlay each other at one address range. You may want the
linker to load various output sections into each of these banks or into banks
that are not mapped at load time.
The linker supports this feature by providing overlay pages. Each page represents an address range that must be configured separately with the MEMORY
directive. You can then use the SECTIONS directive to specify the sections to
be mapped into various pages.
8.11.1 Using the MEMORY Directive to Define Overlay Pages
To the linker, each overlay page represents a completely separate memory
comprising the full 16-bit range of addressable locations. This allows you to
link two or more sections at the same (or overlapping) addresses if they are
on different pages.
Pages are numbered sequentially, beginning with 0. If you do not use the
PAGE option, the linker allocates initialized sections into PAGE 0 (program
memory) and uninitialized sections into PAGE 1 (data memory).
For example, assume that your system can select between two banks of physical memory for data memory space: address range A00h to FFFFh for PAGE 1
and 0A00h to 2BFF for PAGE 2. Although only one bank can be selected at
a time, you can initialize each bank with different data. This is how you use the
MEMORY directive to obtain this configuration:
Example 8–10. Memory Directive With Overlay Pages
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
MEMORY
{
PAGE 0 :
:
PAGE 1 :
:
PAGE 2 :
}
8-40
ONCHIP
PROG
OVR_MEM
DATA
OVR_MEM
:
:
:
:
:
origin
origin
origin
origin
origin
=
=
=
=
=
0800h,
02C00h,
0A00h,
02C00h,
0A00h,
length
length
length
length
length
=
=
=
=
=
0240h
0D200h
02200h
0D400h
02200h
Overlay Pages
Example 8–10 defines three separate address spaces. PAGE 0 defines an
area of on-chip program memory and the rest of program memory space.
PAGE 1 defines the first overlay memory area and the rest of data memory
space. PAGE 2 defines another area of overlay memory for data space. Both
OVR_MEM ranges cover the same address range. This is possible because
each range is on a different page and therefore represents a different memory
space.
Figure 8–6 shows overlay pages defined by the MEMORY directive in
Example 8–10 and the SECTIONS directive in Example 8–11.
Figure 8–6. Overlay Pages Defined by Example 8–10 and Example 8–11
Data Memory
Page 1
Program Memory
Page 0
800h
ONCHIP
A00h
Run address
for f1, f2, f3,
f4
2C00h
PROG
.text
OVR_MEM
Data Memory
Page 2
A00h
f1.obj (.text)
f2.obj (.text)
2C00h
OVR_MEM
f3.obj (.text)
f4.obj (.text)
2C00h
DATA
.bss
FC00h
Linker Description
8-41
Overlay Pages
8.11.2 Using Overlay Pages With the SECTIONS Directive
Assume that you are using the MEMORY directive as shown in Example 8–10.
Further assume that your code consists of, besides the usual sections, four
modules of code that you want to load in data memory space but that you
intend to run in the on-chip RAM in program memory space. Example 8–11
shows how to use the SECTIONS directive overlays accordingly.
Example 8–11. SECTIONS Directive Definition for Overlays in Figure 8–6
SECTIONS
{
UNION : run = ONCHIP
{
S1 : load = OVR_MEM PAGE 1
{
s1_load = 0A00h;
s1_start = .;
f1.obj (.text)
f2.obj (.text)
s1_length = . – s1_start;
}
S2 : load = OVR_MEM PAGE 2
{
s2_load = 0A00h;
s2_start = .;
f3.obj (.text)
f4.obj (.text)
s2_length = . – s2_start;
}
}
.text: load = PROG PAGE 0
.data: load = PROG PAGE 0
.bss : load = DATA PAGE 1
}\
The four modules of code are f1, f2, f3, and f4. The modules f1 and f2 are combined into output section S1, and f3 and f4 are combined into output section
S2. The PAGE specifications for S1 and S2 tell the linker to link these sections
into the corresponding pages. As a result, they are both linked to load address
A00h, but in different memory spaces. When the program is loaded, a loader
can configure hardware so that each section is loaded into the appropriate
memory bank.
Output sections S1 and S2 are placed in a union that has a run address in
on-chip RAM. The application must move these sections at runtime before
executing them. You can use the symbols s1_load and s1_length to move section S1, and s2_load and s2_length to move section S2. The special symbol
”.” refers to the current run address, not the current load address.
8-42
Overlay Pages
Within a page, you can bind output sections or use named memory areas in
the usual way. In Example 8–11, S1 could have been allocated:
S1 : load = 01200h, page = 1
{ . . . }
This binds S1 at address 1200h in page 1. You can also use page as a qualifier
on the address. For example:
S1 : load = (01200h PAGE 1)
{ . . . }
If you do not specify any binding or named memory range for the section, the
linker allocates the section into the page wherever it can (just as it normally
does with a single memory space). For example, S2 could also be specified
as:
S2 : PAGE 2
{ . . . }
Because OVR_MEM is the only memory on page 2, it is not necessary (but
acceptable) to specify = OVR_MEM for the section.
8.11.3 Page Definition Syntax
To specify overlay pages as illustrated in Example 8–10 and Example 8–11,
use the following syntax for the MEMORY directive:
MEMORY
{
PAGE 0 : name 1 [(attr)] : origin = constant, length = constant;
PAGE n : name n [(attr)] : origin = constant, length = constant;
}
Each page is introduced by the keyword PAGE and a page number, followed
by a colon and a list of memory ranges the page contains. Bold portions must
be entered as shown. Memory ranges are specified in the normal way. You can
define up to 255 overlay pages.
Because each page represents a completely independent address space,
memory ranges on different pages can have the same name. Configured
memory on any page can overlap configured memory on any other page.
Within a single page, however, all memory ranges must have unique names
and must not overlap.
Linker Description
8-43
Overlay Pages
Memory ranges listed outside the scope of a PAGE specification default to
PAGE 0. Consider the following example:
MEMORY
{
PAGE1:
ROM
EPROM
RAM
XROM
XRAM
:
:
:
:
:
org
org
org
org
org
=
=
=
=
=
0h
1000h
2000h
0h
2000h
len
len
len
len
len
=
=
=
=
=
1000h
1000h
0E000h
1000h
0E000h
}
The memory ranges ROM, EPROM, and RAM are all on PAGE 0 (since no
page is specified). XROM and XRAM are on PAGE 1. Note that XROM on
PAGE 1 overlays ROM on PAGE 0, and XRAM on PAGE 1 overlays RAM on
PAGE 0.
In the output link map (obtained with the –m linker option), the listing of the
memory model is keyed by pages. This provides an easy method of verifying
that you specified the memory model correctly. Also, the listing of output sections has a PAGE column that identifies the memory space into which each
section will be loaded.
8-44
Default Allocation Algorithm
8.12 Default Allocation Algorithm
The MEMORY and SECTIONS directives provide flexible methods for building, combining, and allocating sections. However, any memory locations or
sections that you choose not to specify must still be handled by the linker. The
linker uses default algorithms to build and allocate sections within the specifications you supply. Subsections 8.12.1 and 8.12.2 describe default allocation.
8.12.1 Allocation Algorithm
If you do not use the MEMORY and SECTIONS directives, the linker allocates
output sections as though the following definitions are specified.
Example 8–12. Default Allocation for TMS320C54x Devices
MEMORY
{
PAGE 0: PROG: origin = 0x0080
length = 0xFF00
PAGE 1: DATA: origin = 0x0080
length = 0xFF80
}
SECTIONS
{
.text:
PAGE = 0
.data:
PAGE = 0
.cinit:
PAGE = 0
;cflag option only
.bss:
PAGE = 1
}
All .text input sections are concatenated to form a .text output section in the
executable output file, and all .data input sections are combined to form a .data
output section. The .text and .data sections are allocated into configured
memory on PAGE 0, which is the program memory space. All .bss sections are
combined to form a .bss output section. The .bss section is allocated into configured memory on PAGE 1, which is the data memory space.
If the input files contain initialized named sections, the linker allocates them
into program memory following the .data section. If the input files contain uninitialized named sections, the linker allocates them into data memory following
the .bss section. You can override this by specifying an explicit PAGE in the
SECTIONS directive.
If you use a SECTIONS directive, the linker performs no part of the default
allocation. Allocation is performed according to the rules specified by the
SECTIONS directive and the general algorithm described in subsection
8.12.2.
Linker Description
8-45
Default Allocation Algorithm
8.12.2 General Rules for Output Sections
An output section can be formed in one of two ways:
Rule 1
As the result of a SECTIONS directive definition.
Rule 2
By combining input sections with the same names into an output section that is not defined in a SECTIONS directive.
If an output section is formed as a result of a SECTIONS directive (rule 1), this
definition completely determines the section’s contents. (See Section 8.8,
page 8-25, for examples of how to define an output section’s content.)
An output section can also be formed when input sections are not specified by
a SECTIONS directive (rule 2). In this case, the linker combines all such input
sections that have the same name into an output section with that name. For
example, suppose the files f1.obj and f2.obj both contain named sections
called Vectors and that the SECTIONS directive does not define an output
section for them. The linker combines the two Vectors sections from the input
files into a single output section named Vectors, allocates it into memory, and
includes it in the output file.
After the linker determines the composition of all output sections, it must allocate them into configured memory. The MEMORY directive specifies which
portions of memory are configured; if there is no MEMORY directive, the linker
uses the default configuration.
The linker’s allocation algorithm attempts to minimize memory fragmentation.
This allows memory to be used more efficiently and increases the probability
that your program will fit into memory. This is the algorithm:
1) Output sections for which you have supplied a specific binding address
are placed in memory at that address.
2) Output sections that are included in a specific, named memory range or
that have memory attribute restrictions are allocated. Each output section
is placed into the first available space within the named area, considering
alignment where necessary.
3) Any remaining sections are allocated in the order in which they are
defined. Sections not defined in a SECTIONS directive are allocated in the
order in which they are encountered. Each output section is placed into the
first available memory space, considering alignment where necessary.
Note:
The PAGE Option
If you do not use the PAGE option to explicitly specify a memory space for
an output section, the linker allocates the section into PAGE 0. This occurs
even if PAGE 0 has no room and other pages do. To use a page other than
PAGE 0, you must specify the page with the SECTIONS directive.
8-46
Special Section Types (DSECT, COPY, and NOLOAD)
8.13 Special Section Types (DSECT, COPY, and NOLOAD)
You can assign three special type designations to output sections: DSECT,
COPY, and NOLOAD. These types affect the way that the program is treated
when it is linked and loaded. You can assign a type to a section by placing the
type (enclosed in parentheses) after the section definition. For example:
SECTIONS
{
sec1 2000h
sec2 4000h
sec3 6000h
}
(DSECT)
(COPY)
(NOLOAD)
: {f1.obj}
: {f2.obj}
: {f3.obj}
- The DSECT type creates a dummy section with the following qualities:
J
It is not included in the output section memory allocation. It takes up no
memory and is not included in the memory map listing.
J
It can overlay other output sections, other DSECTs, and unconfigured
memory.
J
Global symbols defined in a dummy section are relocated normally.
They appear in the output module’s symbol table with the same value
they would have if the DSECT had actually been loaded. These symbols can be referenced by other input sections.
J
Undefined external symbols found in a DSECT cause specified
archive libraries to be searched.
J
The section’s contents, relocation information, and line number information are not placed in the output module.
In the preceding example, none of the sections from f1.obj are allocated,
but all of the symbols are relocated as though the sections were linked at
address 2000h. The other sections can refer to any of the global symbols
in sec1.
- A COPY section is similar to a DSECT section, except that its contents and
associated information are written to the output module. The .cinit section
that contains initialization tables for the TMS320C54x C compiler has this
attribute under the RAM model.
- A NOLOAD section differs from a normal output section in one respect: the
section’s contents, relocation information, and line number information
are not placed in the output module. The linker allocates space for it, and
it appears in the memory map listing.
Linker Description
8-47
Assigning Symbols at Link Time
8.14 Assigning Symbols at Link Time
Linker assignment statements allow you to define external (global) symbols
and assign values to them at link time. You can use this feature to initialize a
variable or pointer to an allocation-dependent value.
8.14.1 Syntax of Assignment Statements
The syntax of assignment statements in the linker is similar to that of assignment statements in the C language:
symbol
symbol
symbol
symbol
symbol
=
+=
–=
*=
/=
expression;
expression;
expression;
expression;
expression;
assigns the value of expression to symbol
adds the value of expression to symbol
subtracts the value of expression from symbol
multiplies symbol by expression
divides symbol by expression
The symbol should be defined externally. If it is not, the linker defines a new
symbol and enters it into the symbol table. The expression must follow the
rules defined in subsection 8.14.3. Assignment statements must terminate
with a semicolon.
The linker processes assignment statements after it allocates all the output
sections. Therefore, if an expression contains a symbol, the address used for
that symbol reflects the symbol’s address in the executable output file.
For example, suppose a program reads data from one of two tables identified
by two external symbols, Table1 and Table2. The program uses the symbol
cur_tab as the address of the current table. cur_tab must point to either Table1
or Table2. You could accomplish this in the assembly code, but you would need
to reassemble the program to change tables. Instead, you can use a linker
assignment statement to assign cur_tab at link time:
prog.obj
cur_tab = Table1;
/* Input file
*/
/* Assign cur_tab to one of the tables */
8.14.2 Assigning the SPC to a Symbol
A special symbol, denoted by a dot ( . ), represents the current value of the SPC
during allocation. The linker’s “.” symbol is analogous to the assembler’s $
symbol. The “.” symbol can be used only in assignment statements within a
SECTIONS directive because “.” is meaningful only during allocation, and
SECTIONS controls the allocation process.
The ”.” symbol refers to the current run address, not the current load address,
of the section.
8-48
Assigning Symbols at Link Time
For example, suppose a program needs to know the address of the beginning
of the .data section. By using the .global directive, you can create an external
undefined variable called Dstart in the program. Then assign the value of “ . ”
to Dstart:
SECTIONS
{
.text:
.data:
.bss:
}
{}
{ Dstart = .; }
{}
This defines Dstart to be the first linked address of the .data section. (Dstart
is assigned before .data is allocated.) The linker will relocate all references to
Dstart.
A special type of assignment assigns a value to the “.” symbol. This adjusts
the SPC within an output section and creates a hole between two input sections. Any value assigned to “.” to create a hole is relative to the beginning of
the section, not to the address actually represented by “.”. Assignments to “.”
and holes are described in Section 8.15, page 8-52.
8.14.3 Assignment Expressions
These rules apply to linker expressions:
Expressions can contain global symbols, constants, and the C language
operators listed in Table 8–2.
All numbers are treated as long (32-bit) integers.
Constants are identified by the linker in the same way as by the assembler.
That is, numbers are recognized as decimal unless they have a suffix (H
or h for hexadecimal and Q or q for octal). C language prefixes are also
recognized (0 for octal and 0x for hex). Hexadecimal constants must begin
with a digit. No binary constants are allowed.
Symbols within an expression have only the value of the symbol’s
address. No type-checking is performed.
Linker expressions can be absolute or relocatable. If an expression con-
tains any relocatable symbols (and zero or more constants or absolute
symbols), it is relocatable. Otherwise, the expression is absolute. If a symbol is assigned the value of a relocatable expression, it is relocatable; if
it is assigned the value of an absolute expression, it is absolute.
Linker Description
8-49
Assigning Symbols at Link Time
The linker supports the C language operators listed in Table 8–2 in order of
precedence. Operators in the same group have the same precedence.
Besides the operators listed in Table 8–2, the linker also has an align operator
that allows a symbol to be aligned on an n-word boundary within an output section (n is a power of 2). For example, the expression
. = align(16);
aligns the SPC within the current section on the next 16-word boundary.
Because the align operator is a function of the current SPC, it can be used only
in the same context as “.” —that is, within a SECTIONS directive.
Table 8–2. Operators Used in Expressions (Precedence)
Symbols
Operators
Evaluation
+
–
~
Unary plus, minus, 1s complement
Right to left
*
/
%
Multiplication, division, modulo
Left to right
+
–
Addition, subtraction
Left to right
Left shift, right shift
Left to right
Less than, LT or equal, greater than,
GT or equal
Left to right
!=, =[=]
Not equal to, equal to
Left to right
&
Bitwise AND
Left to right
^
Bitwise exclusive OR
Left to right
|
Bitwise OR
Left to right
<<
<
Note:
8-50
>>
<=
>
>=
Unary +, –, and * have higher precedence than the binary forms.
Assigning Symbols at Link Time
8.14.4 Symbols Defined by the Linker
The linker automatically defines several symbols that a program can use at
runtime to determine where a section is linked. These symbols are external,
so they appear in the link map. They can be accessed in any assembly language module if they are declared with a .global directive. Values are assigned
to these symbols as follows:
.text
is assigned the first address of the .text output section.
(It marks the beginning of executable code.)
etext
is assigned the first address following the .text output section.
(It marks the end of executable code.)
.data
is assigned the first address of the .data output section.
(It marks the beginning of initialized data tables.)
edata is assigned the first address following the .data output section.
(It marks the end of initialized data tables.)
.bss
is assigned the first address of the .bss output section.
(It marks the beginning of uninitialized data.)
end
is assigned the first address following the .bss output section.
(It marks the end of uninitialized data.)
Symbols defined only for C support (–c or –cr option)
_ _STACK_SIZE
is assigned the size of the .stack section.
_ _SYSMEM_SIZE
is assigned the size of the .sysmem section.
Linker Description
8-51
Creating and Filling Holes
8.15 Creating and Filling Holes
The linker provides you with the ability to create areas within output sections
that have nothing linked into them. These areas are called holes. In special
cases, uninitialized sections can also be treated as holes. The following text
describes how the linker handles such holes and how you can fill holes (and
uninitialized sections) with a value.
8.15.1 Initialized and Uninitialized Sections
An output section contains either:
Raw data for the entire section, or
No raw data.
A section that has raw data is referred to as initialized. This means that the
object file contains the actual memory image contents of the section. When the
section is loaded, this image is loaded into memory at the section’s specified
starting address. The .text and .data sections always have raw data if anything
was assembled into them. Named sections defined with the .sect assembler
directive also have raw data.
By default, the .bss section and sections defined with the .usect directive have
no raw data (they are uninitialized ). They occupy space in the memory map
but have no actual contents. Uninitialized sections typically reserve space in
RAM for variables. In the object file, an uninitialized section has a normal section header and may have symbols defined in it; however, no memory image
is stored in the section.
8.15.2 Creating Holes
You can create a hole in an initialized output section. A hole is created when
you force the linker to leave extra space between input sections within an output section. When such a hole is created, the linker must follow the first guideline above and supply raw data for the hole.
Holes can be created only within output sections. Space can exist between
output sections, but such space is not holes. There is no way to fill or initialize
the space between output sections.
To create a hole in an output section, you must use a special type of linker
assignment statement within an output section definition. The assignment
statement modifies the SPC (denoted by “.”) by adding to it, assigning a greater
value to it, or aligning it on an address boundary. The operators, expressions,
and syntaxes of assignment statements are described in Section 8.14, page
8-48.
8-52
Creating and Filling Holes
The following example uses assignment statements to create holes in output
sections:
SECTIONS
{
outsect:
{
file1.obj(.text)
. += 100h;
/* Create a hole with size 100h
*/
file2.obj(.text)
. = align(16); /* Create a hole to align the SPC */
file3.obj(.text)
}
}
The output section outsect is built as follows:
The .text section from file1.obj is linked in.
The linker creates a 256-word hole.
The .text section from file2.obj is linked in after the hole.
The linker creates another hole by aligning the SPC on a 16-word
boundary.
Finally, the .text section from file3.obj is linked in.
All values assigned to the “ . ” symbol within a section refer to the relative
address within the section. The linker handles assignments to the “ . ” symbol
as if the section started at address 0 (even if you have specified a binding
address). Consider the statement . = align(16) in the example. This statement
effectively aligns file3.obj .text to start on a 16-word boundary within outsect.
If outsect is ultimately allocated to start on an address that is not aligned,
file3.obj .text will not be aligned either.
Note that the “.” symbol refers to the current run address, not the current load
address, of the section.
Expressions that decrement “.” are illegal. For example, it is invalid to use the
– = operator in an assignment to “.”. The most common operators used in
assignments to “.” are += and align.
If an output section contains all input sections of a certain type (such as .text),
you can use the following statements to create a hole at the beginning or end
of the output section:
.text:
.data:
{
{
.+= 100h; }
/* Hole at the beginning */
*(.data)
. += 100h; }
/* Hole at the end
Linker Description
*/
8-53
Creating and Filling Holes
Another way to create a hole in an output section is to combine an uninitialized
section with an initialized section to form a single output section. In this case,
the linker treats the uninitialized section as a hole and supplies data for it. The
following example illustrates this method:
SECTIONS
{
outsect:
{
file1.obj(.text)
file1.obj(.bss)
}
}
/* This becomes a hole */
Because the .text section has raw data, all of outsect must also contain raw
data (rule 1). Therefore, the uninitialized .bss section becomes a hole.
Uninitialized sections become holes only when they are combined with initialized sections. If several uninitialized sections are linked together, the resulting
output section is also uninitialized.
8.15.3 Filling Holes
When a hole exists in an initialized output section, the linker must supply raw
data to fill it. The linker fills holes with a 16-bit fill value that is replicated through
memory until it fills the hole. The linker determines the fill value as follows:
1) If the hole is formed by combining an uninitialized section with an initialized
section, you can specify a fill value for the uninitialized section. Follow the
section name with an = sign and a 16-bit constant:
SECTIONS
{
outsect:
{
file1.obj(.text)
file2.obj(.bss) = 00FFh
}
}
/* Fill this hole */
/* with 0FFh
*/
2) You can also specify a fill value for all the holes in an output section by supplying the fill value after the section definition:
SECTIONS
{
outsect:fill = 0FF00h /* fills holes with 0FF00h */
{
. += 10h;
/* This creates a hole
*/
file1.obj(.text)
file1.obj(.bss)
/* This creates another hole*/
}
}
8-54
Creating and Filling Holes
3) If you do not specify an initialization value for a hole, the linker fills the hole
with the value specified with –f. For example, suppose the command file
link.cmd contains the following SECTIONS directive:
SECTIONS
{
.text: { .= 100; }
}
/* Create a 100-word hole */
Now invoke the linker with the –f option:
lnk500 –f 0FFFFh link.cmd
This fills the hole with 0FFFFh.
4) If you do not invoke the linker with the –f option, the linker fills holes with 0s.
Whenever a hole is created and filled in an initialized output section, the hole
is identified in the link map along with the value the linker uses to fill it.
8.15.4 Explicit Initialization of Uninitialized Sections
An uninitialized section becomes a hole only when it is combined with an initialized section. When uninitialized sections are combined with each other, the
resulting output section remains uninitialized.
However, you can force the linker to initialize an uninitialized section by specifying an explicit fill value for it in the SECTIONS directive. This causes the
entire section to have raw data (the fill value). For example:
SECTIONS
{
.bss: fill = 1234h
}
Note:
/* Fills .bss with 1234h */
Filling Sections
Because filling a section (even with 0s) causes raw data to be generated for
the entire section in the output file, your output file will be very large if you
specify fill values for large sections or holes.
Linker Description
8-55
Partial (Incremental) Linking
8.16 Partial (Incremental) Linking
An output file that has been linked can be linked again with additional modules.
This is known as partial linking or incremental linking. Partial linking allows you
to partition large applications, link each part separately, and then link all the
parts together to create the final executable program.
Follow these guidelines for producing a file that you will relink:
Intermediate files must have relocation information. Use the –r option
when you link the file the first time.
Intermediate files must have symbolic information. By default, the linker
retains symbolic information in its output. Do not use the –s option if you
plan to relink a file, because –s strips symbolic information from the output
module.
Intermediate link steps should be concerned only with the formation of out-
put sections and not with allocation. All allocation, binding, and MEMORY
directives should be performed in the final link step.
If the intermediate files have global symbols that have the same name as
global symbols in other files and you wish them to be treated as static
(visible only within the intermediate file), you must link the files with the –h
option (See subsection 8.4.6 on page 8-10.)
If you are linking C code, don’t use –c or –cr until the final link step. Every
time you invoke the linker with the –c or –cr option the linker will attempt
to create an entry point.
The following example shows how you can use partial linking:
Step 1: Link the file file1.com; use the –r option to retain relocation information in the output file tempout1.out.
lnk500 –r –o tempout1 file1.com
file1.com contains:
SECTIONS
{
ss1:
}
8-56
{
f1.obj
f2.obj
.
.
.
fn.obj
}
Partial (Incremental) Linking
Step 2: Link the file file2.com; use the –r option to retain relocation information in the output file tempout2.out.
lnk500 –r –o tempout2 file2.com
file2.com contains:
SECTIONS
{
ss2:
{
g1.obj
g2.obj
.
.
.
gn.obj
}
}
Step 3: Link tempout1.out and tempout2.out:
lnk500 –m final.map –o final.out tempout1.out tempout2.out
Linker Description
8-57
Linking C Code
8.17 Linking C Code
The TMS320C54x C compiler produces assembly language source code that
can be assembled and linked. For example, a C program consisting of modules prog1, prog2, etc., can be assembled and then linked to produce an
executable file called prog.out:
lnk500 –c –o prog.out prog1.obj prog2.obj ... rts.lib
The –c option tells the linker to use special conventions that are defined by the
C environment. The archive library rts.lib contains C runtime-support functions.
For more information about C, including the runtime environment and runtimesupport functions, see the TMS320C54x Optimizing C Compiler User’s Guide.
8.17.1 Runtime Initialization
All C programs must be linked with an object module called boot.obj. When a
program begins running, it executes boot.obj first. boot.obj contains code and
data for initializing the runtime environment. The module performs the following tasks:
Sets up the system stack
Processes the runtime initialization table and autoinitializes global vari-
ables (in the ROM model)
Disables interrupts and calls _main
The runtime-support object library, rts.lib, contains boot.obj. You can:
Use the archiver to extract boot.obj from the library and then link the
module in directly.
Include rts.lib as an input file (the linker automatically extracts boot.obj
when you use the –c or –cr option).
8.17.2 Object Libraries and Runtime Support
The TMS320C54x Optimizing C Compiler User’s Guide describes additional
runtime-support functions that are included in rts.lib. If your program uses any
of these functions, you must link rts.lib with your object files.
You can also create your own object libraries and link them. The linker includes
and links only those library members that resolve undefined references.
8-58
Linking C Code
8.17.3 Setting the Size of the Stack and Heap Sections
C uses two uninitialized sections called .sysmem and .stack for the memory
pool used by the malloc( ) functions and the runtime stack, respectively. You
can set the size of these by using the –heap (section 8.4.7, page 8-10) or
–stack (subsection 8.4.14, page 8-14) option and specifying the size of the
section as a constant immediately after the option. The default size for both,
if the options are not used, is 1K words.
8.17.4 Autoinitialization (ROM and RAM Models)
The C compiler produces tables of data for autoinitializing global variables.
These are in a named section called .cinit. The initialization tables can be used
in either of two ways:
- RAM Model (–cr option)
Variables are initialized at load time. This enhances performance by
reducing boot time and by saving memory used by the initialization tables.
You must use a smart loader (i.e. one capable of initializing variables) to
take advantage of the RAM model of autoinitialization.
When you use –cr, the linker marks the .cinit section with a special attribute. This attribute tells the linker not to load the .cinit section into memory.
The linker also sets the cinit symbol to –1; this tells the C boot routine that
initialization tables are not present in memory. Thus, no runtime initialization is performed at boot time.
When the program is loaded, the loader must be able to:
J
Detect the presence of the .cinit section in the object file
J
Detect the presence of the attribute that tells it not to copy the .cinit
section
J
Understand the format of the initialization tables. (This format is
described in the TMS320C54x Optimizing C Compiler User’s Guide.)
The loader then uses the initialization tables directly from the object file to
initialize variables in .bss.
Figure 8–7 illustrates the RAM autoinitialization model.
Linker Description
8-59
Linking C Code
Figure 8–7. RAM Model of Autoinitialization
Memory
Object File
loader
.cinit
.bss
ROM Model (–c option)
Variables are initialized at runtime. The .cinit section is loaded into
memory along with all the other sections. The linker defines a special symbol called cinit that points to the beginning of the tables in memory. When
the program begins running, the C boot routine copies data from the tables
into the specified variables in the .bss section. This allows initialization
data to be stored in ROM and copied to RAM each time the program is
started.
Figure 8–8 illustrates the ROM autoinitialization model.
Figure 8–8. ROM Model of Autoinitialization
Memory
Object File
.cinit
loader
initialization
tables
(possibly ROM)
boot
routine
.bss
8-60
Linking C Code
8.17.5 The –c and –cr Linker Options
The following list outlines what happens when you invoke the linker with the
–c or –cr option.
- The symbol _c_int00 is defined as the program entry point. _c_int00 is the
start of the C boot routine in boot.obj; referencing _c_int00 ensures that
boot.obj is automatically linked in from the runtime-support library rts.lib.
- The .cinit output section is padded with a termination record to designate
to the boot routine (ROM model) or the loader (RAM model) when to stop
reading the initialization tables.
- In the ROM model (–c option), the linker defines the symbol cinit as the
starting address of the .cinit section. The C boot routine uses this symbol
as the starting point for autoinitialization.
- In the RAM model (–cr option):
J
The linker sets the symbol cinit to –1. This indicates that the initialization tables are not in memory, so no initialization is performed at
runtime.
J
The STYP_COPY flag (0010h) is set in the .cinit section header.
STYP_COPY is the special attribute that tells the loader to perform
autoinitialization directly and not to load the .cinit section into memory.
The linker does not allocate space in memory for the .cinit section.
Linker Description
8-61
Linker Example
8.18 Linker Example
This example links three object files named demo.obj, fft.obj, and tables.obj
and creates a program called demo.out. The symbol SETUP is the program
entry point.
Assume that target memory has the following configuration:
Program Memory
Address Range
0080 to 7000
C000 to FF80
Contents
On-chip RAM_PG
On-chip ROM
Data Memory
Address Range
0080 to 0FFF
0060 to FFFF
Contents
RAM block ONCHIP
Mapped external addresses EXT
The output sections are constructed from the following input sections:
Executable code, contained in the .text sections of demo.obj, fft.obj, and
tables.obj must be linked into program ROM.
Variables, contained in the var_defs section of demo.obj, must be linked
into data memory in block ONCHIP.
Tables of coefficients in the .data sections of demo.obj, tables.obj and
fft.obj must be linked into RAM block ONCHIP in data memory. A hole is
created with a length of 100 and a fill value of 07A1Ch. The remainder of
block ONCHIP must be initialized to the value 07A1Ch.
The .bss sections from demo.obj. tables.obj, and fft.obj, which contain
variables, must be linked into block RAM_PG of program RAM. The
unused part of this RAM must be initialized to 0FFFFh.
The xy section from demo.obj, which contains buffers and variables, will
have the default linking into block ONCHIP of data RAM, since it was not
explicitly linked.
Example 8–13 shows the linker command file for this example. Example 8–14
shows the map file.
8-62
Linker Example
Example 8–13. Linker Command File, demo.cmd
/***************************************************************/
/***
Specify Linker Options
***/
/***************************************************************/
–e coeff
/* Define the program entry point */
–o demo.out
/* Name the output file
*/
–m demo.map
/* Create an output map
*/
/***************************************************************/
/***
Specify the Input Files
***/
/***************************************************************/
demo.obj
fft.obj
tables.obj
/***************************************************************/
/***
Specify the Memory Configurations
***/
/***************************************************************/
MEMORY
{
PAGE 0: RAM_PG:
ROM:
origin=00080h
origin=0C000h
length=06F80h
length=03F80h
PAGE 1: ONCHIP:
EXT:
origin=00080h
origin=01000h
length=0F7Fh
length=0EFFFh
}
/****************************************************************/
/***
Specify the Output Sections
***/
/****************************************************************/
SECTIONS
{
.text: load = ROM, page = 0
/*
var_defs: load = ONCHIP, page=1 /*
link .text into ROM */
defs in RAM
*/
.data: fill = 07A1Ch, load=ONCHIP, page=1
{
tables.obj(.data) /* .data input */
fft.obj(.data)
/* .data input */
. = 100h;
/* create hole, fill with 07A1Ch */
}
/* and link with ONCHIP
*/
.bss: load=RAM_PG,page=0,fill=0FFFFh
/* Remaining .bss; fill and link */
}
/***************************************************************/
/***
End of Command File
***/
/***************************************************************/
Linker Description
8-63
Linker Example
Invoke the linker with the following command:
lnk500 demo.cmd
This creates the map file shown in Example 8–14 and an output file called
demo.out that can be run on a TMS320C54x.
Example 8–14. Output Map File, demo.map
OUTPUT FILE NAME:
<demo.out>
ENTRY POINT SYMBOL: 0
MEMORY CONFIGURATION
name
origin
––––––––
––––––––
PAGE 0: RAM_PG
00000080
ROM
0000c000
PAGE 1: ONCHIP
00000080
EXT
00001000
SECTION ALLOCATION MAP
output
section
page
origin
–––––––– –––– ––––––––––
.text
0
0000c000
0000c000
0000c008
0000c00f
var_defs
1
00000080
00000080
.data
1
00000082
00000082
00000082
00000082
00000182
.bss
0
00000080
00000080
00000093
00000093
xy
1
0000018a
0000018a
GLOBAL SYMBOLS
address name
–––––––– ––––
00000080 .bss
00000082 .data
0000c000 .text
00000097 ARRAY
00000093 TEMP
0000018a edata
000000fb end
0000c015 etext
[8 symbols]
8-64
length
–––––––––
000006f80
000003f80
000000f7f
00000efff
length
––––––––––
00000015
00000008
00000007
00000006
00000002
00000002
00000108
00000000
00000000
00000100
00000008
0000007b
00000013
00000000
00000068
00000014
00000014
attributes
––––––––––
RWIX
RWIX
RWIX
RWIX
fill
––––––––
attributes/
input sections
––––––––––––––––
demo.obj (.text)
fft.obj (.text)
tables.obj (.text)
demo.obj (var_defs)
tables.obj (.data)
fft.obj (.data)
––HOLE–– [fill = 7a1c]
demo.obj (.data)
demo.obj (.bss) [fill=ffff]
fft.obj (.bss)
tables.obj (.bss) [fill=ffff]
UNINITIALIZED
demo.obj (xy)
address
––––––––
00000080
00000082
00000093
00000097
000000fb
0000018a
0000c000
0000c015
name
––––
.bss
.data
TEMP
ARRAY
end
edata
.text
etext
Running Title—Attribute Reference
Chapter 9
Absolute Lister Description
The absolute lister is a debugging tool that accepts linked object files as input
and creates .abs files as output. These .abs files can be assembled to produce
a listing that shows the absolute addresses of object code. Manually, this could
be a tedious process requiring many operations; however, the absolute lister
utility performs these operations automatically.
Topic
Page
9.1
Producing an Absolute Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.2
Invoking the Absolute Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.3
Absolute Lister Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
Chapter Title—Attribute Reference
9-1
Producing an Absolute Listing
9.1
Producing an Absolute Listing
Figure 9–1 illustrates the steps required to produce an absolute listing.
Figure 9–1. Absolute Lister Development Flow
Step 1:
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
Assembler
Source Files
First, assemble a source file.
Assembler
Object
File
Step 2:
Link the resulting object file.
Linker
Linked Object
File
Step 3:
Absolute
Lister
Invoke the absolute lister; use the linked object
file as input. This creates a file with an .abs
extension.
.abs
File
Step 4:
Assembler
Absolute
Listing
9-2
Finally, assemble the .abs file; you must
invoke the assembler with the –a option. This
produces a listing file that contains absolute
addresses.
Invoking the Absolute Lister
9.2
Invoking the Absolute Lister
The syntax for invoking the absolute lister is:
abs500 [–options ] input file
abs500
is the command that invokes the absolute lister.
options
identifies the absolute lister options that you want to use.
Options are not case- sensitive and can appear anywhere on
the command line following the command. Precede each option
with a hyphen (–). The absolute lister options are as follows:
–e
enables you to change abs500’s default naming-conventions for filename extensions on assembly files, C
source files, and C header files. The three options are
listed below.
–ea [.]asmext
–ec [.]cext
–eh [.]hext
for assembly files (default is .asm)
for C source files (default is .c)
for C header files (default is .h)
The “.” in the extensions and the space between the
option and the extension are optional.
–q
input file
(quiet) suppresses the banner and all progress information.
names the linked object file. If you do not supply an extension,
the absolute lister assumes that the input file has the default
extension .out. If you do not supply an input filename when you
invoke the absolute lister, the absolute lister will prompt you for
one.
The absolute lister produces an output file for each file that was linked. These
files are named with the input filenames and an extension of .abs. Header files,
however, do not generate a corresponding .abs file.
Assemble these files with the –a assembler option as follows to create the
absolute listing:
asm500 –a filename.abs
The –e options affect both the interpretation of filenames on the command line
and the names of the output files. They should always precede any filename
on the command line.
Absolute Lister Description
9-3
Invoking the Absolute Lister
The –e options are useful when the linked object file was created from C files
compiled with the debugging option (–g compiler option). When the debugging
option is set, the resulting linked object file contains the name of the source
files used to build it. In this case, the absolute lister will not generate a corresponding .abs file for the C header files. Also, the .abs file corresponding to
a C source file will use the assembly file generated from the C source file rather
than the C source file itself.
For example, suppose the C source file hello.csr is compiled with debugging
set; this generates the assembly file hello.s. hello.csr also includes hello.hsr.
Assuming the executable file created is called hello.out, the following
command will generate the proper .abs file:
abs500 –ea s –c csr –eh hsr hello.out
An .abs file will not be created for hello.hsr (the header file), and hello.abs will
include the assembly file hello.s, not the C source file hello.csr.
9-4
Absolute Lister Example
9.3
Absolute Lister Example
This example uses three source files. module1.asm and module2.asm both
include the file globals.def.
module1.asm
.text
.bss
.bss
.copy
ld
ld
array,100
dflag, 2
globals.def
#offset, A
dflag, A
module2.asm
.bss
.copy
ld
ld
offset, 2
globals.def
#offset, A
#array, A
globals.def
.global dflag
.global array
.global offset
The following steps create absolute listings for the files module1.asm and
module2.asm:
Step 1: First, assemble module1.asm and module2.asm:
asm500 module1
asm500 module2
This creates two object files called module1.obj and module2.obj.
Absolute Lister Description
9-5
Absolute Lister Example
Step 2: Next, link module1.obj and module2.obj. using the following linker
command file, called bttest.cmd:
/************************************************/
/* File bttest.cmd –– COFF linker command file */
/*
for linking TMS320C54x modules
*/
/*********************************** ************/
–o bttest.out
/* Name the output file */
–m bttest.map
/* Create an output map */
/************************************************/
/*
Specify the Input Files
*/
/************************************************/
module1.obj
module2.obj
/************************************************/
/*
Specify the Memory Configurations
*/
/************************************************/
MEMORY
{
PAGE 0:
ROM: origin=2000h
length=2000h
PAGE 1:
RAM: origin=8000h
length=8000h
}
/************************************************/
/*
Specify the Output Sections
*/
/************************************************/
SECTIONS
{
.data: >RAM
.text: >ROM
.bss:
>RAM
}
Invoke the linker:
lnk500 bttest.cmd
This creates an executable object file called bttest.out; use this new
file as input for the absolute lister.
9-6
Absolute Lister Example
Step 3: Now, invoke the absolute lister:
abs500 bttest.out
This creates two files called module1.abs and module2.abs:
module1.abs:
array
dflag
offset
.data
edata
.text
etext
.bss
end
.nolist
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
08000h
08064h
08066h
08000h
08000h
02000h
02007h
08000h
08068h
”.text”,02000h
”.data”,08000h
”.bss”,08000h
”module1.asm”
module2.abs:
array
dflag
offset
.data
edata
.text
etext
.bss
end
.nolist
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
08000h
08064h
08066h
08000h
08000h
02000h
02007h
08000h
08068h
”.text”,02003h
”.data”,08000h
”.bss”,08066h
”module2.asm”
These files contain the following information that the assembler
needs when you invoke it in step 4:
They contain .setsym directives, which equate values to global
symbols. Both files contain global equates for the symbol dflag.
The symbol dflag was defined in the file globals.def, which was
included in module1.asm and module2.asm.
They contain .setsect directives, which define the absolute
addresses for sections.
Absolute Lister Description
9-7
Absolute Lister Example
They contain .copy directives, which tell the assembler which
assembly language source file to include.
The .setsym and .setsect directives are not useful in normal assembly; they are useful only for creating absolute listings.
Step 4: Finally, assemble the .abs files created by the absolute lister
(remember that you must use the –a option when you invoke the
assembler):
asm500
asm500
–a
–a
module1.abs
module2.abs
This creates two listing files called module1.lst and module2.lst; no
object code is produced. These listing files are similar to normal listing files; however, the addresses shown are absolute addresses.
The absolute listing files created are:
module1.lst:
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
Version x.xx
Wed Apr 26 12:00:05 1995
Texas Instruments Incorporated
module1.abs
A
A
A
A
B
B
B
A
A
15
16
1
2
3
4
1
2
3
5
2000
2000
8000
8064
2000 F020
2001 8066!
6 2002 1064–
PAGE
1
.text
.copy
”module1.asm”
.text
.bss
array, 100
.bss
dflag, 2
.copy globals.def
.global dflag
.global array
.global offset
ld
#offset, A
ld
dflag, A
No Errors, No Warnings
module2.lst:
TMS320C54x COFF Assembler
Copyright (c) 1993–1995
Version x.xx
Wed Apr 26 12:00:17 1995
Texas Instruments Incorporated
module2.abs
A
A
B
B
B
A
A
15 2003
16
1 8066
2
1
2
3
3 2003 F020
2004 8066–
4 2005 F020
2006 8000!
No Errors, No Warnings
9-8
PAGE
.text
.copy
”module2.asm”
.bss
offset, 2
.copy globals.def
.global dflag
.global array
.global offset
ld
#offset, A
ld
#array, A
1
Running Title—Attribute Reference
Chapter 10
Cross-Reference Lister
The cross-reference lister is a debugging tool. This utility accepts linked object
files as input and produces a cross-reference listing as output. This listing
shows symbols, their definitions, and their references in the linked source files.
Topic
Page
10.1 Producing a Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
10.2 Invoking the Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
10.3 Cross-Reference Listing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
Chapter Title—Attribute Reference
10-1
Producing a Cross-Reference Listing
10.1 Producing a Cross-Reference Listing
Figure 10–1. Cross-Reference Lister Development Flow
Step 1:
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
Assembler
Source File
Assembler
First, invoke the assembler with the –x option.
This option produces a cross-reference table
in the listing file and adds to the object file
cross-reference information. By default, the
assembler cross-references only global symbols. If you use the –s option when invoking
the assembler, it will cross-reference local
variables as well.
Object
File
Step 2:
Link the object file (.obj) to obtain an executable object file (.out).
Linker
Linked Object
File
Step 3:
Cross-Reference
Lister
Cross-Reference
Listing
10-2
Invoke the cross-reference lister. The following section provides the command syntax for
invoking the cross-reference lister utility.
Invoking the Cross-Reference Lister
10.2 Invoking the Cross-Reference Lister
To use the cross-reference utility, the file must be assembled with the correct
options and then linked into an executable file. Assemble the assembly language files with the –x option. This option creates a cross-reference listing and
adds cross-reference information to the object file. By default, the assembler
cross-references only global symbols, but if assembler is invoked with the –s
option, local symbols are also added. Link the object files to obtain an executable file.
To invoke the cross-reference lister, enter the following:
xref500 [–options] [input filename [output filename] ]
xref500
is the command that invokes the cross-reference utility.
options
identifies the cross-reference lister options you want to
use. Options are not case- sensitive and can appear anywhere on the command line following the command. Precede each option with a hyphen (–). The cross-reference
lister options are as follows:
–l
(lowercase L) specifies the number of lines per
page for the output file. The format of the –l option
is –lnum, where num is a decimal constant. For
example, –l30 sets the number of lines per page in
the output file to 30. The space between the option
and the decimal constant is optional. The default is
60 lines per page.
–q
(quiet) suppresses the banner and all progress
information.
input filename
is a linked object file. If you omit the input filename, the
utility prompts for a filename.
output filename
is the name of the cross-reference listing file. If you omit
the output filename, the default filename will be the input
filename with an .xrf extension.
Cross-Reference Lister
10-3
Cross-Reference Listing Example
10.3 Cross-Reference Listing Example
================================================================================
Symbol: done
Filename
________
x.asm
RTYP
____
STAT
AsmVal
________
’000c
LnkVal
________
380c
DefLn
______
18
RefLn
_______
14
RefLn
_______
RefLn
_______
================================================================================
Symbol: f1
Filename
________
x.asm
RTYP
____
STAT
AsmVal
________
3.45e+00
LnkVal
________
3.45e+00
DefLn
______
4
RefLn
_______
RefLn
_______
RefLn
_______
================================================================================
Symbol: g3
Filename
________
x.asm
y.asm
RTYP
____
EDEF
EREF
AsmVal
________
ffff
0000
LnkVal
________
ffff
ffff
DefLn
______
3
RefLn
_______
9
3
RefLn
_______
RefLn
_______
6
================================================================================
Symbol: start
Filename
________
x.asm
RTYP
____
STAT
AsmVal
________
’0000
LnkVal
________
3800
DefLn
______
12
RefLn
_______
17
RefLn
_______
RefLn
_______
================================================================================
Symbol: table
Filename
________
x.asm
RTYP
____
STAT
AsmVal
________
–1000
LnkVal
________
3000
DefLn
______
21
RefLn
_______
13
RefLn
_______
RefLn
_______
================================================================================
Symbol: y
Filename
________
x.asm
y.asm
RTYP
____
EREF
EDEF
AsmVal
________
0000
’0000
LnkVal
________
380d
380d
DefLn
______
5
RefLn
_______
7
1
RefLn
_______
10
RefLn
_______
================================================================================
10-4
Cross-Reference Listing Example
The terms defined below appear in the preceding cross-reference listing:
Symbol Name
Name of the symbol listed
Filename
Name of the file where the symbol appears
RTYP
The symbol’s reference type in this file. The possible reference types are:
STAT
The symbol is defined in this file and is not
declared as global.
EDEF
The symbol is defined in this file and is declared
as global.
EREF
The symbol is not defined in this file but is referenced as a global.
UNDF
The symbol is not defined in this file and is not
declared as global.
AsmVal
This hexadecimal number is the value assigned to the
symbol at assembly time. A value may also be preceded
by a character that describes the symbol’s attributes.
Table 10–1 lists these characters and names.
LnkVal
This hexadecimal number is the value assigned to the
symbol after linking.
DefLn
The statement number where the symbol is defined.
RefLn
The line number where the symbol is referenced. If the line
number is followed by an asterisk(*), then that reference
may modify the contents of the object. A blank in this column indicates that the symbol was never used.
Table 10–1.Symbol Attributes
Character
Meaning
’
Symbol defined in a .text section
”
Symbol defined in a .data section
+
Symbol defined in a .sect section
–
Symbol defined in a .bss or .usect section
=
Symbol defined in a .reg section
Cross-Reference Lister
10-5
Running Title—Attribute Reference
Chapter 11
Hex Conversion Utility Description
The TMS320C54x assembler and linker create object files that are in common
object file format (COFF). COFF is a binary object file format that encourages
modular programming and provides more powerful and flexible methods for
managing code segments and target system memory.
Most EPROM programmers do not accept COFF object files as input. The hex
conversion utility converts a COFF object file into one of several standard
ASCII hexadecimal formats, suitable for loading into an EPROM programmer.
The utility is also useful in other applications requiring hexadecimal conversion
of a COFF object file (for example, when using debuggers and loaders). This
utility also supports the on-chip boot loader built into the target device, automating the code creation process for the ’C54x.
The hex conversion utility can produce these output file formats:
ASCII-Hex, supporting 16-bit addresses
Extended Tektronix (Tektronix)
Intel MCS-86 (Intel)
Motorola Exorciser (Motorola-S), supporting 16-bit addresses
Texas Instruments SDSMAC (TI-Tagged), supporting 16-bit addresses
Topic
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
11.12
Page
Hex Conversion Utility Development Flow
Invoking the Hex Conversion Utility
Command Files
Understanding Memory Widths
The ROMS Directive
The SECTIONS Directive
Output Filenames
Image Mode and the –fill Option
Building a Table for an On-Chip Boot Loader
Controlling the ROM Device Address
Description of the Object Formats
Hex Conversion Utility Error Messages
Chapter Title—Attribute Reference
11-2
11-3
11-5
11-7
11-14
11-20
11-22
11-24
11-26
11-32
11-36
11-42
11-1
Hex Conversion Utility Development Flow
11.1 Hex Conversion Utility Development Flow
Figure 11–1 highlights the role of the hex conversion utility in the assembly language development process.
Figure 11–1. Hex Conversion Utility Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
11-2
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Absolute lister
Cross-reference
lister
’C54x
Invoking the Hex Conversion Utility
11.2 Invoking the Hex Conversion Utility
There are two basic methods for invoking the hex conversion utility:
Specify the options and filenames on the command line. The following
example converts the file firmware.out into TI-Tagged format, producing
two output files, firm.lsb and firm.msb.
hex500 –t firmware –o firm.lsb –o firm.msb
Specify the options and filenames in a command file. You can create
a batch file that stores command line options and filenames for invoking
the hex conversion utility. The following example invokes the utility using
a command file called hexutil.cmd:
hex500 hexutil.cmd
In addition to regular command line information, you can use the hex
conversion utility ROMS and SECTIONS directives in a command file.
Invoking the hex conversion utility from the command line
To invoke the hex conversion utility, enter:
hex500 [–options] filename
hex500
is the command that invokes the hex conversion utility.
–options
supplies additional information that controls the hex conversion
process. You can use options on the command line or in a command file.
All options are preceded by a dash and are not case-sensi-
tive.
Several options have an additional parameter that must be
separated from the option by at least one space.
Options with multicharacter names must be spelled exactly
as shown in this document; no abbreviations are allowed.
Options are not affected by the order in which they are used.
The exception to this rule is the –q option, which must be
used before any other options.
Table 11–1 lists basic options. Table 11–2, page 11-27, lists
options that apply only to the on-chip boot loader. The boot
loader is discussed in Section 11.9, page 11-26.
filename
names a COFF object file or a command file (for more information on command files, see Section 11.3, page 11-5).
Hex Conversion Utility Description
11-3
Invoking the Hex Conversion Utility
Table 11–1. Basic Options
11-4
General Options
Option
Description
Page
Control the overall
operation of the hex
conversion utility.
–byte
Number bytes sequentially
11-34
–map filename
Generate a map file
11-19
–o filename
Specify an output filename
11-22
–q
Run quietly (when used, it
must appear before other
options)
11-5
Image Options
Option
Description
Page
Allow you to create a
continuous image of
a range of target
memory.
–fill value
Fill holes with value
11-25
–image
Specify image mode
11-24
–zero
Reset the address origin to
zero
11-33
Memory Options
Option
Description
Page
Allow you to configure the memory
widths for your output
files.
–memwidth value
Define the system memory
word width (default 16 bits)
11-8
–order {LS | MS}
Specify the memory word
ordering
11-12
–romwidth value
Specify the ROM device width
(default depends on format
used)
11-9
Output Formats
Option
Description
Page
Allow you to specify
the output format.
format
–a
Select ASCII-Hex
11-37
–i
Select Intel
11-38
–m
Select Motorola-S
11-39
–t
Select TI-Tagged
11-40
–x
Select Tektronix
11-41
Command Files
11.3 Command Files
A command file is useful if you plan to invoke the utility more than once with
the same input files and options. It is also useful if you want to use the ROMS
and SECTIONS hex conversion utility directives to customize the conversion
process.
Command files are ASCII files that contain one or more of the following:
Options and filenames. These are specified in a command file in exactly
the same manner as on the command line.
ROMS directive. The ROMS directive defines the physical memory con-
figuration of your system as a list of address-range parameters. (For more
information about the ROMS directive, see Section 11.5, page 11-14.)
SECTIONS directive. The SECTIONS directive specifies which sections
from the COFF object file should be selected. (For more information about
the SECTIONS directive, see Section 11.6, page 11-20.) You can also use
this directive to identify specific sections that will be initialized by an onchip boot loader. (For more information on the on-chip boot loader, see
Section 11.9, page 11-26.)
Comments. You can add comments to your command file by using the /*
and */ delimiters. For example:
/*
This is a comment
*/
To invoke the utility and use the options you defined in a command file, enter:
hex500 command_filename
You can also specify other options and files on the command line. For example, you could invoke the utility by using both a command file and command
line options:
hex500 firmware.cmd –map firmware.mxp
The order in which these options and file names appear is not important. The
utility reads all input from the command line and all information from the command file before starting the conversion process. However, if you are using the
–q option, it must appear as the first option on the command line or in a command file.
The –q option suppresses the utility’s normal banner and progress information.
Hex Conversion Utility Description
11-5
Command Files
Examples of command files
Assume that a command file named firmware.cmd contains these lines:
firmware.out
–t
–o
firm.lsb
–o
firm.msb
/*
/*
/*
/*
input file
TI–Tagged
output file
output file
*/
*/
*/
*/
You can invoke the hex conversion utility by entering:
hex500 firmware.cmd
This example converts a file called appl.out into four hex files in Intel for-
mat. Each output file is one byte wide and 16K bytes long. The .text section
is converted to boot loader format.
appl.out
–i
–map appl.mxp
/* input file
*/
/* Intel format */
/* map file
*/
ROMS
{
ROW1: origin=01000h len=04000h romwidth=8
files={ appl.u0 appl.u1 }
ROW2: origin 05000h len=04000h romwidth=8
files={ app1.u2 appl.u3 }
}
SECTIONS
{
.text: BOOT
.data, .cinit, .sect1, .vectors, .const:
}
11-6
Understanding Memory Widths
11.4 Understanding Memory Widths
The hex conversion utility makes your memory architecture more flexible by
allowing you to specify memory and ROM widths. In order to use the hex conversion utility, you must understand how the utility treats word widths.
Four widths are important in the conversion process: target width, data width,
memory width, and ROM width. The terms target word, data word, memory
word and ROM word, refer to a word of such a width.
Figure 11–2 illustrates the three separate and distinct phases of the hex conversion utility’s process flow.
Figure 11–2. Hex Conversion Utility Process Flow
COFF Input File
Phase I
The raw data in the COFF file is
truncated to the size specified
by the default data width (16 bits).
Phase II
The data-width-sized internal
representation is divided into words
according to size specified by the
–memwidth option.
Phase III
The memwidth-sized words are
broken up according to the size
specified by the –romwidth option
and are written to a file(s)
according to the specified format
(i.e. Intel, Tektronix, etc..).
Raw data in COFF files is represented in target-width-sized
words. For the ’C54x this is 16
bits. The target width is fixed
and cannot be changed.
Output File(s)
Hex Conversion Utility Description
11-7
Understanding Memory Widths
11.4.1 Target Width
Target width is the unit size (in bits) of raw data fields in the COFF file. This
corresponds to the size of an opcode on the target processor. The width is fixed
for each target and cannot be changed. The TMS320C54x targets have a
width of 16 bits.
11.4.2 Data Width
Data width is the logical width (in bits) of the data words stored in a particular
section of a COFF file. Usually, the logical data width is the same as the target
width. The data width is fixed at 16 bits for the TMS320C54x and cannot be
changed.
11.4.3 Memory Width
Memory width is the physical width (in bits) of the memory system. Usually, the
memory system is physically the same width as the target processor width: a
16-bit processor has a 16-bit memory architecture. However, some
applications, such as boot loaders, require target words to be broken up into
multiple, consecutive, narrower memory words. Moreover, with certain processors like the ’C54x, the memory width can be narrower than the target
width.
The hex conversion utility defaults memory width to the target width (in this
case, 16 bits).
You can change the memory width by:
Using the –memwidth option. This changes the memory width value for
the entire file.
Setting the memwidth parameter of the ROMS directive. This changes
the memory width value for the address range specified in the ROMS
directive and overrides the –memwidth option for that range. See Section
11.5, page 11-14.
For both methods, use a value that is a power of 2 greater than or equal to 8.
You should change the memory width default value of 16 only in exceptional
situations: for example, when you need to break single target words into consecutive, narrower memory words. Situations in which memory words are narrower than target words are most common when you use on-chip boot loaders —several of which support booting from narrower memory. For example,
a 16-bit TMS320C54x can be booted from 8-bit memory or an 8-bit serial port,
with each 16-bit value occupying two memory locations (this would be specified as –memwidth 8).
11-8
Understanding Memory Widths
Figure 11–3 demonstrates how the memory width is related to the data width.
Figure 11–3. Data and Memory Widths
Source File
.word 0AABBh
.word 01122h
. . .
Data Width = 16 (fixed)
Data After
Phase I
of hex500
0AABBh
01122h
. . .
Memory Widths (variable)
Data Width = 16
–memwidth 16 (default)
Data After
Phase II
of hex500
–memwidth 8
AABB
BB
1122
. . .
AA
22
11
. . .
11.4.4 ROM Width
ROM width specifies the physical width (in bits) of each ROM device and corresponding output file (usually one byte or eight bits). The ROM width determines how the hex conversion utility partitions the data into output files. After
the target words are mapped to the memory words, the memory words are broken into one or more output files. The number of output files is determined by
the following formula:
number of files = memory width ROM width
where memory width ROM width
For example, for a memory width of 16, you could specify a ROM width of 16
and get a single output file containing 16-bit words. Or you can use a ROM
width value of 8 to get two files, each containing 8 bits of each word.
Hex Conversion Utility Description
11-9
Understanding Memory Widths
The default ROM width that the hex conversion utility uses depends on the output format:
All hex formats except TI-Tagged are configured as lists of 8-bit bytes; the
default ROM width for these formats is 8 bits.
TI-Tagged is a 16-bit format; the default ROM width for TI-Tagged is 16
bits.
Note:
The TI-Tagged Format Is 16 Bits Wide
You cannot change the ROM width of the TI-Tagged format. The TI-Tagged
format supports a 16-bit ROM width only.
You can change ROM width (except for TI-Tagged) by:
Using the –romwidth option. This changes the ROM width value for the
entire COFF file.
Setting the romwidth parameter of the ROMS directive. This changes the
ROM width value for a specific ROM address range and overrides the
–romwidth option for that range. See Section 11.5, page 11-14.
For both methods, use a value that is a power of 2 greater than or equal to 8.
If you select a ROM width that is wider than the natural size of the output format
(16 bits for TI-Tagged or 8 bits for all others), the utility simply writes multibyte
fields into the file.
Figure 11–4 illustrates how the target, memory, and ROM widths are related
to one another.
11-10
Understanding Memory Widths
Figure 11–4. Data, Memory, and ROM Widths
Source File
.word 0AABBCDDh
.word 01122344h
. . .
Data Width = 16 (fixed)
Data After
Phase I
of hex500
0AABBh
01122h
. . .
Memory Widths (variable)
Data After
Phase II
of hex500
–memwidth 16
–memwidth 8
AABB
BB
1122
. . .
AA
22
11
. . .
Output Files
Data After
Phase III
of hex500
–romwidth 16
–o file.wrd
AABB1122
–romwidth 8
–o file.b0
BB 22
–o file.b1
AA 11
–romwidth 8
–o file.byt
. . .
. . .
. . .
BBAA2211
. . .
Hex Conversion Utility Description
11-11
Understanding Memory Widths
11.4.5 A Memory Configuration Example
Figure 11–5 shows a typical memory configuration example. This memory
system consists of two 128K 8-bit ROM devices.
Figure 11–5. ’C54x Memory Configuration Example
Data Width = 16 Bits
Lower 8 Bits (data)
AABBh
Upper 8 Bits (data)
CPU
’C54x
Source File
Word AABBh
AAh
BBh
128K x 8
ROM0
128K x 8
ROM1
ROM Width
8 Bits
ROM Width
8 Bits
System Memory Width 16 Bits
11.4.6 Specifying Word Order for Output Words
When memory words are narrower than target words (memory width < 16), target words are split into multiple consecutive memory words. There are two
ways to split a wide word into consecutive memory locations in the same hex
conversion utility output file:
–order MS specifies big-endian ordering, in which the most significant
part of the wide word occupies the first of the consecutive locations
–order LS specifies little-endian ordering, in which the the least signifi-
cant part of the wide word occupies the first of the consecutive locations
By default, the utility uses little-endian format because the ’C54x boot loaders
expect the data in this order. Unless you are using your own boot loader program, avoid the using –order MS.
11-12
Understanding Memory Widths
Note:
When the –order Option Applies
This option applies only when you use a memory width with a value less
than 16. Otherwise, –order is ignored.
This option does not affect the way memory words are split into output
files. Think of the files as a set: the set contains a least significant file and
a most significant file, but there is no ordering over the set. When you list
filenames for a set of files, you always list the least significant first, regardless of the –order option.
Figure 11–6 demonstrates how –order affects the conversion process. This
figure, and the previous figure, Figure 11–4, explain the condition of the data
in the hex conversion utility output files.
Figure 11–6. Varying the Word Order
Source File
.word 0AABBh
.word 01122h
. . .
Target Width = 16 (fixed)
0AABBh
01122h
. . .
Memory Widths (variable)
–memwidth 8
–order LS (default)
BB
AA
22
11
. . .
–memwidth 8
–order MS
AA
BB
11
22
. . .
Hex Conversion Utility Description
11-13
The ROMS Directive
11.5 The ROMS Directive
The ROMS directive specifies the physical memory configuration of your system as a list of address-range parameters.
Each address range produces one set of files containing the hex conversion
utility output data that corresponds to that address range. Each file can be
used to program one single ROM device.
The ROMS directive is similar to the MEMORY directive of the TMS320C54x
linker: both define the memory map of the target address space. Each line
entry in the ROMS directive defines a specific address range. The general
syntax is:
ROMS
{
[PAGE n:]
romname: [origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value,]
[files={filename1, filename2, ...}]
romname: [origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value,]
[files={filename1, filename2, ...}]
...
}
11-14
ROMS
begins the directive definition.
PAGE
identifies a memory space for targets that use program- and
data-address spaces. If your program has been linked normally, PAGE 0 specifies program memory and PAGE 1 specifies data memory. Each memory range after the PAGE command belongs to that page until you specify another PAGE. If
you don’t include PAGE, all ranges belong to page 0.
romname
identifies a memory range. The name of the memory range
may be one to eight characters in length. The name has no significance to the program; it simply identifies the range. (Duplicate memory range names are allowed.)
The ROMS Directive
origin
specifies the starting address of a memory range. It can be
entered as origin, org, or o. The associated value must be a
decimal, octal, or hexadecimal constant. If you omit the origin
value, the origin defaults to 0.
The following table summarizes the notation you can use to
specify a decimal, octal, or hexadecimal constant:
Constant
Notation
Example
Hexadecimal
0x prefix or h suffix
0x77 or 077h
Octal
0 prefix
077
Decimal
No prefix or suffix
77
length
specifies the length of a memory range as the physical length
of the ROM device. It can be entered as length, len, or l. The
value must be a decimal, octal, or hexadecimal constant. If you
omit the length value, it defaults to the length of the entire
address space.
romwidth
specifies the physical ROM width of the range in bits (see
subsection 11.4.4, page 11-9). Any value you specify here
overrides the –romwidth option. The value must be a decimal,
octal, or hexadecimal constant that is a power of 2 greater than
or equal to 8.
memwidth
specifies the memory width of the range in bits (see subsection
11.4.3, page 11-8). Any value you specify here overrides the
–memwidth option. The value must be a decimal, octal, or
hexadecimal constant that is a power of 2 greater than or equal
to 8. When using the memwidth parameter, you must also
specify the paddr parameter for each section in the SECTIONS
directive.
fill
specifies a fill value to use for the range. In image mode, the hex
conversion utility uses this value to fill any holes between sections in a range. The value must be a decimal, octal, or hexadecimal constant with a width equal to the target width. Any value
you specify here overrides the –fill option. When using fill, you
must also use the –image command line option. See subsection 11.8.2, page 11-25.
Hex Conversion Utility Description
11-15
The ROMS Directive
files
identifies the names of the output files that correspond to this
range. Enclose the list of names in curly braces and order them
from least significant to most significant output file.
The number of file names should equal the number of output
files that the range will generate. To calculate the number of
output files, refer to Section 11.4.4, page 11-9. The utility
warns you if you list too many or too few filenames.
Unless you are using the –image option, all of the parameters defining a range
are optional; the commas and equals signs are also optional. A range with no
origin or length defines the entire address space. In image mode, an origin and
length are required for all ranges.
Ranges on the same page must not overlap and must be listed in order of
ascending address.
11.5.1 When to Use the ROMS Directive
If you don’t use a ROMS directive, the utility defines a single default range that
includes the entire program address space (PAGE 0). This is equivalent to a
ROMS directive with a single range without origin or length.
Use the ROMS directive when you want to:
Program large amounts of data into fixed-size ROMs. When you spe-
cify memory ranges corresponding to the length of your ROMs, the utility
automatically breaks the output into blocks that fit into the ROMs.
Restrict output to certain segments. You can also use the ROMS direc-
tive to restrict the conversion to a certain segment or segments of the target address space. The utility does not convert the data that falls outside
of the ranges defined by the ROMS directive. Sections can span range
boundaries; the utility splits them at the boundary into multiple ranges. If
a section falls completely outside any of the ranges you define, the utility
does not convert that section and issues no messages or warnings. In this
way, you can exclude sections without listing them by name with the
SECTIONS directive. However, if a section falls partially in a range and
partially in unconfigured memory, the utility issues a warning and converts
only the part within the range.
Use image mode. When you use the –image option, you must use a
ROMS directive. Each range is filled completely so that each output file in
a range contains data for the whole range. Gaps before, between, or after
sections are filled with the fill value from the ROMS directive, with the value
specified with the –fill option, or with the default value of 0.
11-16
The ROMS Directive
11.5.2 An Example of the ROMS Directive
The ROMS directive in Example 11–1 shows how 16K words of 16-bit memory
could be partitioned for four 8K 8-bit EPROMs.
Example 11–1. A ROMS Directive Example
infile.out
–image
–memwidth 16
ROMS
{
EPROM1: org = 04000h, len = 02000h, romwidth = 8
files = { rom4000.b0, rom4000.b1 }
EPROM2: org = 06000h, len = 02000h, romwidth = 8,
fill = 0FFh,
files = { rom6000.b0, rom6000.b1 }
}
In this example, EPROM1 defines the address range from 4000h through
5FFFh. The range contains the following sections:
This section
Has this range
.text
4000h through 487Fh
.data
5B80H through 5FFFh
The rest of the range is filled with 0h (the default fill value). The data from this
range is converted into two output files:
rom4000.b0 contains bits 0 through 7
rom4000.b1 contains bits 8 through 15
EPROM2 defines the address range from 6000h through 7FFFh. The range
contains the following sections:
This section
Has this range
.data
6000h through 633Fh
.table
6700h through 7C7Fh
The rest of the range is filled with 0FFh (from the specified fill value). The data
from this range is converted into two output files:
rom6000.b0 contains bits 0 through 7
rom6000.b1 contains bits 8 through 15
Hex Conversion Utility Description
11-17
The ROMS Directive
Figure 11–7 shows how the ROMS directive partitions the infile.out file into
four output files.
Figure 11–7. The infile.out File From Example 11–1 Partitioned Into Four Output Files
COFF File:
Output Files:
EPROM1
rom4000.b0 rom4000.b1
infile.out
04000h
.text
04000h
(org)
.text
0487Fh
04880h
05B80h
.data
0633Fh
06700h
05B80h
05FFFh
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
0h
0h
.data
.data
width = 8 bits
.table
len =
2000h (8K)
EPROM2
rom6000.b0 rom6000.b1
07C7Fh
memwidth = 16 bits
06000h
06340h
06700h
07C80h
07FFFh
11-18
.text
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
.data
0FFh
.data
0FFh
.table
.table
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
0FFh
0FFh
The ROMS Directive
11.5.3 Creating a Map File of the ROMS Directive
The map file (specified with the –map option) is advantageous when you use
the ROMS directive with multiple ranges. The map file shows each range, its
parameters, names of associated output files, and a list of contents (section
names and fill values) broken down by address. Following is a segment of the
map file resulting from the example in Example 11–1.
Example 11–2. Map File Output From Example 11–1 Showing Memory Ranges
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00004000..00005fff Page=0 Width=8 ”EPROM1”
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES:
rom4000.b0
[b0..b7]
rom4000.b1
[b8..b15]
CONTENTS: 00004000..0000487f .text
00004880..00005b7f FILL = 00000000
00005b80..00005fff .data
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00006000..00007fff Page=0 Width=8 ”EPROM2”
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES:
rom6000.b0
[b0..b7]
rom6000.b1
[b8..b15]
CONTENTS: 00006000..0000633f
00006340..000066ff
00006700..00007c7f
00007c80..00007fff
.data
FILL = 000000ff
.table
FILL = 000000ff
Hex Conversion Utility Description
11-19
The SECTIONS Directive
11.6 The SECTIONS Directive
You can convert specific sections of the COFF file by name with the
SECTIONS directive. You can also specify those sections you want the utility
to configure for loading from an on-chip boot loader, and those sections that
you want to locate in ROM at a different address than the load address specified in the linker command file. If you:
Use a SECTIONS directive, the utility converts only the sections that you
list in the directive and ignores all other sections in the COFF file.
Don’t use a SECTIONS directive, the utility converts all initialized sections
that fall within the configured memory. The TMS320C54x compiler-generated initialized sections include: .text, .const, .cinit, and .switch.
Uninitialized sections are never converted, whether or not you specify them
in a SECTIONS directive.
Note:
Sections Generated by the C Compiler
The TMS320C54x C compiler automatically generates these sections:
Initialized sections: .text, .const, .cinit, and .switch.
Uninitialized sections: .bss, .stack, and .sysmem.
Use the SECTIONS directive in a command file. (For more information about
using a command file, see Section 11.3, page 11-5.) The general syntax for
the SECTIONS directive is:
SECTIONS
{
sname: [paddr=value]
sname: [paddr=boot]
sname: [= boot ],
...
}
SECTIONS begins the directive definition.
sname
11-20
identifies a section in the COFF input file. If you specify a section that doesn’t exist, the utility issues a warning and ignores
the name.
The SECTIONS Directive
paddr
specifies the physical ROM address at which this section
should be located. This value overrides the section load
address given by the linker. (See Section 11.10, page
11-32).This value must be a decimal, octal, or hexadecimal
constant; it can also be the word boot (to indicate a boot table
section for use with the on-chip boot loader). If your file contains
multiple sections, and if one section uses a paddr parameter,
then all sections must use a paddr parameter.
= boot
configures a section for loading by the on-chip boot loader. This
is equivalent to using paddr=boot. Boot sections have a physical address determined both by the target processor type and
by the various boot-loader-specific command line options.
The commas are optional. For similarity with the linker’s SECTIONS directive,
you can use colons after the section names (in place of the equal sign on the
boot keyboard). For example, the following statements are equivalent:
SECTIONS { .text: .data: boot }
SECTIONS { .text, .data = boot }
In another example, the COFF file contains six initialized sections: .text, .data,
.const, .vectors, .coeff, and .tables. Suppose you want only .text and .data to
be converted. Use a SECTIONS directive to specify this:
SECTIONS { .text, .data }
To configure both of these sections for boot loading, add the boot keyword:
SECTIONS { .text = boot, .data = boot }
Note:
Using the –boot Option and the SECTIONS Directive
When you use the SECTIONS directive with the on-chip boot loader, the
–boot option is ignored. You must explicitly specify any boot sections in the
SECTIONS directive. For more information about –boot and other command
line options associated with the on-chip boot loader, see Table 11–2, page
11-27.
Hex Conversion Utility Description
11-21
Output Filenames
11.7 Output Filenames
When the hex conversion utility translates your COFF object file into a data format, it partitions the data into one or more output files. When multiple files are
formed by splitting data into byte-wide or word-wide files, filenames are always
assigned in order from least to most significant. This is true, regardless of target or COFF endian ordering, or of any –order option.
Assigning output filenames
The hex conversion utility follows this sequence when assigning output filenames:
1) It looks for the ROMS directive. If a file is associated with a range in the
ROMS directive and you have included a list of files (files = {. . .}) on that
range, the utility takes the filename from the list.
For example, assume that the target data is 16-bit words being converted
to two files, each eight bits wide. To name the output files using the ROMS
directive, you could specify:
ROMS
{
RANGE1: romwidth=8, files={ xyz.b0 xyz.b1 }
}
The utility creates the output files by writing the least significant bits (LSBs)
to xyz.b0 and the most significant bits (MSBs) to xyz.b1.
2) It looks for the –o options. You can specify names for the output files by
using the –o option. If no filenames are listed in the ROMS directive and
you use –o options, the utility takes the filename from the list of –o options.
The following line has the same effect as the example above using the
ROMS directive:
–o xyz.b0 –o xyz.b1
Note that if both the ROMS directive and –o options are used together, the
ROMS directive overrides the –o options.
3) It assigns a default filename. If you specify no filenames or fewer names
than output files, the utility assigns a default filename. A default filename
consists of the base name from the COFF input file plus a 2- to 3-character
extension. The extension has three parts:
a) A format character, based on the output format:
a
i
t
m
x
11-22
for ASCII-Hex
for Intel
for TI-Tagged
for Motorola-S
for Tektronix
Output Filenames
b) The range number in the ROMS directive. Ranges are numbered
starting with 0. If there is no ROMS directive, or only one range, the
utility omits this character.
c) The file number in the set of files for the range, starting with 0 for the
least significant file.
For example, assume coff.out is for a 16-bit target processor and you are
creating Intel format output. With no output filenames specified, the utility
produces two output files named coff.i0 and coff.i1.
If you include the following ROMS directive when you invoke the hex conversion utility, you would have two output files:
ROMS
{
range1: o = 1000h l = 1000h
range2: o = 2000h l = 1000h
}
These output files
Contain this data
coff.i01
1000h through 1FFFh
coff.i11
2000h through 2FFFh
Hex Conversion Utility Description
11-23
Image Mode and the –fill Option
11.8 Image Mode and the –fill Option
This section points out the advantages of operating in image mode and
describes the method of producing output files with a precise, continuous
image of a target memory range.
11.8.1 The –image Option
With the –image option, the utility generates a memory image by completely
filling all of the mapped ranges specified in the ROMS directive.
A COFF file consists of blocks of memory (sections) with assigned memory
locations. Typically, all sections are not adjacent: there are gaps between sections in the address space for which there is no data. When such a file is converted without the use of image mode, the hex conversion utility bridges these
gaps by using the address records in the output file to skip ahead to the start
of the next section. In other words, there may be discontinuities in the output
file addresses. Some EPROM programmers do not support address discontinuities.
In image mode, there are no discontinuities. Each output file contains a continuous stream of data that corresponds exactly to an address range in target
memory. Any gaps before, between, or after sections are filled with a fill value
that you supply.
An output file converted by using image mode still has address records
because many of the hexadecimal formats require an address on each line.
However, in image mode, these addresses will always be contiguous.
Note:
Defining the Ranges of Target Memory
If you use image mode, you must also use a ROMS directive. In image mode,
each output file corresponds directly to a range of target memory. You must
define the ranges. If you don’t supply the ranges of target memory, the utility
tries to build a memory image of the entire target processor address space—
potentially a huge amount of output data. To prevent this situation, the utility
requires you to explicitly restrict the address space with the ROMS directive.
11-24
Image Mode and the –fill Option
11.8.2 Specifying a Fill Value
The –fill option specifies a value for filling the holes between sections. The fill
value must be specified as an integer constant following the –fill option. The
width of the constant is assumed to be that of a word on the target processor.
For example, for the ’C54x, specifying –fill 0FFh results in a fill pattern of
00FFh. The constant value is not sign-extended.
The hex conversion utility uses a default fill value of zero if you don’t specify
a value with the fill option. The –fill option is valid only when you use –image;
otherwise, it is ignored.
11.8.3 Steps to Follow in Image Mode
Step 1: Define the ranges of target memory with a ROMS directive. See Section 11.5, page 11-14 for details.
Step 2: Invoke the hex conversion utility with the –image option. To number
the bytes sequentially, use the –byte option; to reset the address
origin to zero for each output file, use the –zero option. See subsection 11.10.3, page 11-34, for details on the –byte option, and page
11-33 for details on the –zero option. If you don’t specify a fill value
with the ROMS directive and you want a value other than the default
of zero, use the –fill option.
Hex Conversion Utility Description
11-25
Building a Table for an On-Chip Boot Loader
11.9 Building a Table for an On-Chip Boot Loader
Some DSP devices, such as the ’C54x, have a built-in boot loader that initializes memory with one or more blocks of code or data. The boot loader uses
a special table (a boot table) stored in memory (such as EPROM) or loaded
from a device peripheral (such as a serial or communications port) to initialize
the code or data. The hex conversion utility supports the boot loader by automatically building the boot table.
11.9.1 Description of the Boot Table
The input for a boot loader is the boot table (also known as a source program).
The boot table contains records that instruct the on-chip loader to copy blocks
of data contained in the table to specified destination addresses. Some boot
tables also contain values for initializing various processor control registers.
The boot table can be stored in memory or read in through a device peripheral.
The hex conversion utility automatically builds the boot table for the boot
loader. Using the utility, you specify the COFF sections you want the boot
loader to initialize, the table location, and the values for any control registers.
The hex conversion utility identifies the target device type from the COFF file,
builds a complete image of the table according to the format required by that
device, and converts it into hexadecimal in the output files. Then, you can burn
the table into ROM or load it by other means.
The boot loader supports loading from memory that is narrower than the normal width of memory. For example, you can boot a 16-bit TMS320C54x from
a single 8-bit EPROM by using the –memwidth option to configure the width
of the boot table. The hex conversion utility automatically adjusts the table’s
format and length. See the boot loader example in the TMS320C54x User’s
Guide for an illustration of a boot table.
11.9.2 The Boot Table Format
The boot table format is simple. Typically, there is a header record containing
the width of the table and possibly some values for various control registers.
Each subsequent block has a header containing the size and destination
address of the block followed by data for the block. Multiple blocks can be
entered; a termination block follows the last block. Finally, the table can have
a footer containing more control register values. See the boot loader section
in the TMS320C54x User’s Guide for more information.
11-26
Building a Table for an On-Chip Boot Loader
11.9.3 How to Build the Boot Table
Table 11–2 summarizes the hex conversion utility options available for the
boot loader.
Table 11–2. Boot-Loader Utility Options
Option
Description
–boot
Convert all sections into bootable form (use instead of a
SECTIONS directive)
–bootorg PARALLEL
Specify the source of the boot loader table as the parallel
port
–bootorg SERIAL
Specify the source of the boot loader table as the serial port
–bootorg value
Specify the source address of the boot loader table
–bootpage value
Specify the target page number of the boot loader table
To build the boot table, follow these steps:
Step 1: Link the file. Each block of the boot table data corresponds to an
initialized section in the COFF file. Uninitialized sections are not converted by the hex conversion utility (see Section 11.6, page 11-20).
When you select a section for placement in a boot-loader table, the
hex conversion utility places the section’s load address in the destination address field for the block in the boot table. The section content is then treated as raw data for that block.
The hex conversion utility does not use the section run address.
When linking, you need not worry about the ROM address or the
construction of the boot table —the hex conversion utility handles
this.
Step 2: Identify the bootable sections. You can use the –boot option to tell
the hex conversion utility to configure all sections for boot loading.
Or, you can use a SECTIONS directive to select specific sections to
be configured (see Section 11.6, page 11-20). Note that if you use
a SECTIONS directive, the –boot option is ignored.
Hex Conversion Utility Description
11-27
Building a Table for an On-Chip Boot Loader
Step 3: Set the ROM address of the boot table. Use the –bootorg option
to set the source address of the complete table. For example, if you
are using the ’C54x and booting from memory location 8000h,
specify –bootorg 8000h. The address field in the the hex conversion
utility output file will then start at 8000h.
If you use –bootorg SERIAL or –bootorg PARALLEL, or if you do not
use the –bootorg option at all, the utility places the table at the origin
of the first memory range in a ROMS directive. If you do not use a
ROMS directive, the table will start at the first section load address.
There is also a –bootpage option for starting the table somewhere
other than page 0.
Step 4: Set boot-loader-specific options. Set such options as entry point
and memory control registers as needed.
Step 5: Describe your system memory configuration. See Section 11.4,
page 11-7, and Section 11.5, page 11-14, for details.
The complete boot table is similar to a single section containing all of the
header records and data for the boot loader. The address of this “section” is
the boot table origin. As part of the normal conversion process, the hex conversion utility converts the boot table to hexadecimal format and maps it into the
output files like any other section.
Be sure to leave room in your system memory for the boot table, especially
when you are using the ROMS directive. The boot table cannot overlap other
nonboot sections or unconfigured memory. Usually, this is not a problem; typically, a portion of memory in your system is reserved for the boot table. Simply
configure this memory as one or more ranges in the ROMS directive, and use
the –bootorg option to specify the starting address.
11.9.4 Booting From a Device Peripheral
You can choose to boot from a serial or parallel port by using the SERIAL or
PARALLEL keyword with the –bootorg option. Your selection of a keyword
depends on the target device and the channel you want to use. For example,
to boot a ’C54x from its serial port, specify –bootorg SERIAL on the command
line or in a command file. To boot a ’C54x from one of its parallel ports, specify
–bootorg PARALLEL.
11-28
Building a Table for an On-Chip Boot Loader
Note:
On-Chip Boot Loader Concerns
Possible memory conflicts. When you boot from a device peripheral,
the boot table is not actually in memory; it is being received through the
device peripheral. However, as explained in Step 3 on page 11-28, a
memory address is assigned.
If the table conflicts with a nonboot section, put the boot table on a different page. Use the ROMS directive to define a range on an unused page
and the –bootpage option to place the boot table on that page. The boot
table will then appear to be at location 0 on the dummy page.
Why the System Might Require an EPROM Format for a Peripheral
Boot Loader Address. In a typical system, a parent processor boots a
child processor through that child’s peripheral. The boot loader table
itself may occupy space in the memory map of the parent processor. The
EPROM format and ROMS directive address correspond to those used
by the parent processor, not those that are used by the child.
11.9.5 Setting the Entry Point for the Boot Table
After completing the boot load process, program execution starts at the address of the first block loaded (the default entry point). By using the –e option
with the hex conversion utility, you can set the entry point to a different address.
For example, if you want your program to start running at address 0123h after
loading, specify –e 0123h on the command line or in a command file. You can
determine the –e address by looking at the map file that the linker generates.
Note:
Valid Entry Points
The value must be a constant; the hex conversion utility cannot evaluate
symbolic expressions like c_int00 (default entry point assigned by the
TMS320C54x C compiler).
When you use the –e option, the utility builds a dummy block of length 1 and
data value 0 that loads at the specified address. Your blocks follow this dummy
block. Since the dummy block is loaded first, the dummy value of 0 is overwritten by the subsequent blocks. Then, the boot loader jumps to the –e option
address after the boot load is completed.
Hex Conversion Utility Description
11-29
Building a Table for an On-Chip Boot Loader
11.9.6 Using the ’C54x Boot Loader
This subsection explains and gives an example on using the hex conversion
utility with the boot loader for ’C54x devices. The ’C54x boot loader has six different modes. You can select these modes by using the –bootorg and –memwidth options:
Mode
–bootorg Setting
–memwidth Setting
8-bit parallel I/O
–bootorg PARALLEL
–memwidth 8
16-bit parallel I/O
–bootorg PARALLEL
–memwidth 16
8-bit serial RS232
–bootorg SERIAL
–memwidth 8
16-bit serial RS232
–bootorg SERIAL
–memwidth 16
8-bit parallel EPROM
–bootorg 0x8000
–memwidth 8
16-bit parallel EPROM
–bootorg 0x8000
–memwidth 16
You should set the –romwidth equal to the –memwidth unless you want to have
multiple output files.
The ’C54x can boot through either the serial or parallel interface with either 8or 16-bit data. The format is the same for any combination: the boot table consists of a field containing the destination address, a field containing the length,
and a block containing the data.
You can boot only one section. If you are booting from an 8-bit channel, 16-bit
words are stored in the table with the MSBs first; the hex conversion utility
automatically builds the table in the correct format.
To boot from a serial port, specify –bootorg SERIAL when invoking the util-
ity. Use either –memwidth 8 or –memwidth 16.
To load from a parallel I/O port, invoke the utility by specifying –bootorg
PARALLEL. Use either –memwidth 8 or –memwidth 16.
To boot from external memory (EPROM), specify the source address of
the boot memory by using the –bootorg option. Use either –memwidth 8
or –memwidth 16.
For example, the command file in Figure 11–8 allows you to boot the .text section of abc.out from a byte-wide EPROM at location 0x8000.
11-30
Building a Table for an On-Chip Boot Loader
Figure 11–8. Sample Command File for Booting From a ’C54x EPROM
abc.out
–o abc.i
–i
–memwidth 8
–romwidth 8
–bootorg 0x8000
/*
/*
/*
/*
/*
/*
input file
output file
Intel format
8-bit memory
outfile is bytes, not words
external memory boot
*/
*/
*/
*/
*/
*/
SECTIONS { .text: BOOT }
Hex Conversion Utility Description
11-31
Controlling the ROM Device Address
11.10 Controlling the ROM Device Address
The hex conversion utility output address field corresponds to the ROM device
address. The EPROM programmer burns the data into the location specified
by the hex conversion utility output file address field. The hex conversion utility
offers some mechanisms to control the starting address in ROM of each section and/or to control the address index used to increment the address field.
However, many EPROM programmers offer direct control of the location in
ROM in which the data is burned.
11.10.1 Controlling the Starting Address
Depending on whether or not you are using the boot loader, the hex conversion
utility output file controlling mechanisms are different.
Nonboot-loader mode. The address field of the hex conversion utility
output file is controlled by the following mechanisms listed from low to high
priority:
1) The linker command file. By default, the address field of the hex
conversion utility output file is a function of the load address (as given
in the linker command file) and the hex conversion utility parameter
values. The relationship is summarized as follows:
out_file_addr† = load_addr (data_width mem_width)
out_file_addr
is the address of the output file.
load_addr
is the linker-assigned load address.
data_width
is specified as 16 bits for the TMS320C54x devices.
See subsection 11.4.2, page 11-8.
mem_width
is the memory width of the memory system. You can
specify the memory width by the –memwidth option
or by the memwidth parameter inside the ROMS
directive. See subsection 11.4.3, page 11-8.
† If paddr is not specified
The value of data width divided by memory width is a correction factor
for address generation. When data width is larger than memory width,
the correction factor expands the address space. For example, if the
load address is 01 and data width divided by memory width is 2, the
output file address field would be 02. The data is split into two consecutive locations the size of the memory width.
11-32
Controlling the ROM Device Address
2) The paddr parameter of the SECTIONS directive. When the paddr
parameter is specified for a section, the hex conversion utility
bypasses the section load address and places the section in the
address specified by paddr. The relationship between the hex conversion utility output file address field and the paddr parameter can be
summarized as follows:
out_file_addr† = paddr_val + ( load_addr – sect_beg_load_addr ) (data_width mem_width)
out_file_addr
is the address of the output file.
paddr_val
is the value supplied with the paddr parameter
inside the SECTIONS directive.
sec_beg_load_addr
is the section load address assigned by the
linker.
† If paddr is not specified
The value of data width divided by memory width is a correction factor
for address generation. The section beginning load address factor
subtracted from the load address is an offset from the beginning of the
section.
3) The –zero option. When you use the –zero option, the utility resets
the address origin to 0 for each output file. Since each file starts at 0
and counts upward, any address records represent offsets from the
beginning of the file (the address within the ROM) rather than actual
target addresses of the data.
You must use the –zero option in conjunction with the –image option
to force the starting address in each output file to be zero. If you specify the –zero option without the –image option, the utility issues a
warning and ignores the –zero option.
Boot-Loader Mode. When the boot loader is used, the hex conversion
utility places the different COFF sections that are in the boot table into consecutive memory locations. Each COFF section becomes a boot table
block whose destination address is equal to the linker-assigned section
load address.
The address field of the the hex conversion utility output file is not related to
the section load addresses assigned by the linker. The address fields are
simply offsets to the beginning of the table, multiplied by the correction factor (data width divided by memory width).
Hex Conversion Utility Description
11-33
Controlling the ROM Device Address
The beginning of the boot table defaults to the linked load address of the
first bootable section in the COFF input file, unless you use one of the following mechanisms, listed here from low to high priority. Higher priority
mechanisms override the values set by low priority options in an overlapping range.
1) The ROM origin specified in the ROMS directive. The hex conversion utility places the boot table at the origin of the first memory range
in a ROMS directive.
2) The –bootorg option. The hex conversion utility places the boot table
at the address specified by the –bootorg option if you select boot loading from memory. Neither –bootorg PARALLEL nor –bootorg SERIAL
affect the address field.
11.10.2 Controlling the Address Increment Index
By default, the hex conversion utility increments the output file address field
according to the memory width value. If memory width equals 16, the address
increments on the basis of how many 16-bit words are present in each line of
the output file.
11.10.3 The –byte Option
Some EPROM programmers may require the output file address field to
contain a byte count rather than a word count. If you use the –byte option, the
output file address increments once for each byte. For example, if the starting
address is 0h, the first line contains eight words, and you use no –byte option,
the second line would start at address 8 (8h). If the starting address is 0h, the
first line contains eight words, and you use the –byte option, the second line
would start at address 16 (010h). The data in both examples are the same;
–byte affects only the calculation of the output file address field, not the actual
target processor address of the converted data.
The –byte option causes the address records in an output file to refer to byte
locations within the file, whether the target processor is byte-addressable or
not.
11-34
Controlling the ROM Device Address
11.10.4 Dealing With Address Holes
When memory width is different from data width, the automatic multiplication
of the load address by the correction factor might create holes at the beginning
of a section or between sections.
For example, assume you want to load a COFF section (.sec1) at address
0x0100 of an 8-bit EPROM. If you specify the load address in the linker command file at location 0x0100, the hex conversion utility will multiply the address
by 2 (data width divided by memory width = 16/8 = 2), giving the output file a
starting address of 0x0200. Unless you control the starting address of the
EPROM with your EPROM programmer, you could create holes within the
EPROM. The programmer will burn the data starting at location 0x0200
instead of 0x0100. To solve this, you can:
Use the paddr parameter of the SECTIONS directive. This forces a sec-
tion to start at the specified value. Figure 11–9 shows a command file that
can be used to avoid the hole at the beginning of .sec1.
Figure 11–9. Hex Command File for Avoiding a Hole at the Beginning of a Section
–i
a.out
–map a.map
ROMS
{
ROM : org = 0x0100, length = 0x200, romwidth = 8,
memwidth = 8
}
SECTIONS
{
sec1: paddr = 0x100
}
Note:
If your file contains multiple sections, and, if one section uses a paddr parameter, then all
sections must use the paddr parameter.
Use the –bootorg option or use the ROMS origin parameter (for boot
loading only). As described on page 11-33, when you are boot loading,
the EPROM address of the entire boot-loader table can be controlled by
the –bootorg option or by the ROMS directive origin. For another example,
see Section C.3, page 0-9.
Hex Conversion Utility Description
11-35
Description of the Object Formats
11.11 Description of the Object Formats
The hex conversion utility converts a COFF object file into one of five object
formats that most EPROM programmers accept as input: ASCII-Hex, Intel
MCS-86, Motorola-S, Extended Tektronix, or TI-Tagged.
Table 11–3 specifies the format options.
If you use more than one of these options, the last one you list overrides
the others.
The default format is Tektronix (–x option).
Table 11–3. Options for Specifying Hex Conversion Formats
Address
Bits
Default
Width
ASCII-Hex
16
8
–i
Intel
32
8
–m
Motorola-S
16
8
–t
TI-Tagged
16
16
–x
Tektronix
32
8
Option
Format
–a
Address bits determine how many bits of the address information the format
supports. Formats with 16-bit addresses support addresses up to 64K only.
The utility truncates target addresses to fit in the number of available bits.
The default width determines the default output width. You can change the
default width by using the –romwidth option or by using the romwidth parameter in the ROMS directive. You cannot change the default width of the TITagged format, which supports a 16-bit width only.
11-36
Description of the Object Formats
11.11.1
ASCII-Hex Object Format (–a Option)
The ASCII-Hex object format supports 16-bit addresses. The format consists
of a byte stream with bytes separated by spaces. Figure 11–10 illustrates the
ASCII-Hex format.
Figure 11–10.ASCII-Hex Object Format
Nonprintable
Start Code
Nonprintable
End Code
Address
^B $AXXXX,
XX XX XX XX XX XX XX XX XX XX. . .^C
Data Byte
The file begins with an ASCII STX character (ctrl-B, 02h) and ends with an
ASCII ETX character (ctrl-C, 03h). Address records are indicated with
$AXXXX, in which XXXX is a 4-digit (16-bit) hexadecimal address. The
address records are present only in the following situations:
When discontinuities occur
When the byte stream does not begin at address 0
You can avoid all discontinuities and any address records by using the –image
and –zero options. This creates output that is simply a list of byte values.
Hex Conversion Utility Description
11-37
Description of the Object Formats
11.11.2
Intel MCS-86 Object Format (–i Option)
The Intel object format supports 16-bit addresses and 32-bit extended
addresses. Intel format consists of a 9-character (4-field) prefix— which
defines the start of record, byte count, load address, and record type —the
data, and a 2-character checksum suffix.
The 9-character prefix represents three record types:
Record Type
Description
00
Data record
01
End-of-file record
04
Extended linear address record
Record type 00, the data record, begins with a colon ( : ) and is followed by the
byte count, the address of the first data byte, the record type (00), and the
checksum. Note that the address is the least significant 16 bits of a 32-bit
address; this value is concatenated with the value from the most recent 04
(extended linear address) record to create a full 32-bit address. The checksum
is the 2s complement (in binary form) of the preceding bytes in the record,
including byte count, address, and data bytes.
Record type 01, the end-of-file record, also begins with a colon ( : ), followed
by the byte count, the address, the record type (01), and the checksum.
Record type 04, the extended linear address record, specifies the upper 16
address bits. It begins with a colon ( : ), followed by the byte count, a dummy
address of 0h, the record type (04), the most significant 16 bits of the address,
and the checksum. The subsequent address fields in the data records contain
the least significant bits of the address.
Figure 11–11 illustrates the Intel hexadecimal object format.
Figure 11–11. Intel Hex Object Format
Start
Character
Address
Extended Linear
Address Record
Most Significant 16 Bits
:2000000000000100020003000400050006000700080009000A000B000C000D000E000F0068
:2000200010001100120013001400150016001700180019001A001B001C001D001E001F0048 Data
:2000400000000100020003000400050006000700080009000A000B000C000D000E000F0028 Records
:2000600010001100120013001400150016001700180019001A001B001C001D001E001F0008
:00000001FF
Byte Record
Count Type
11-38
Checksum
End-of-File
Record
Description of the Object Formats
11.11.3
Motorola Exorciser Object Format (–m Option)
The Motorola-S format supports 16-bit addresses. It consists of a start-of-file
(header) record, data records, and an end-of-file (termination) record. Each
record is made up of five fields: record type, byte count, address, data, and
checksum. The three record types are:
Record Type
Description
S0
Header record
S1
Code/data record
S2
Termination record
The byte count is the character pair count in the record, excluding the type and
byte count itself.
The checksum is the least significant byte of the 1s complement of the sum
of the values represented by the pairs of characters making up the byte count,
address, and the code/data fields.
Figure 11–12 illustrates the Motorola-S object format.
Figure 11–12.Motorola-S Format
Record
Type
Address
Checksum
S00600004844521B
S1137000D514D515D516D5178E700D07FB7001173D
S10B70100703700115F9FFFFED
S9030000FC
Byte
Count
Header
Record
Data
Records
Termination
Record
Checksum
Hex Conversion Utility Description
11-39
Description of the Object Formats
11.11.4
Texas Instruments SDSMAC Object Format (–t Option)
The TI-Tagged object format supports 16-bit addresses. It consists of a startof-file record, data records, and end-of-file record. Each of the data records is
made up of a series of small fields and is signified by a tag character. The significant tag characters are:
Tag Character
Description
K
followed by the program identifier
7
followed by a checksum
8
followed by a dummy checksum (ignored)
9
followed by a 16-bit load address
B
followed by a data word (four characters)
F
identifies the end of a data record
*
followed by a data byte (two characters)
Figure 11–13 illustrates the tag characters and fields in TI-Tagged object format.
Figure 11–13.TI-Tagged Object Format
Program
Identifier
Start-of-File
Record
Tag Characters
K000COFFTOTI
90000BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F234F
90020BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F400F
90040BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F3FFF
90050BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F3FDF
:
End-of-File
Record
Load
Address
Data
Words
Data
Records
Checksum
If any data fields appear before the first address, the first field is assigned
address 0000h. Address fields may be expressed for any data byte, but none
is required. The checksum field, which is preceded by the tag character 7, is
a 2s complement of the sum of the 8-bit ASCII values of characters, beginning
with the first tag character and ending with the checksum tag character (7 or
8). The end-of-file record is a colon ( : ).
11-40
Description of the Object Formats
11.11.5
Extended Tektronix Object Format (–x Option)
The Tektronix object format supports 32-bit addresses and has two types of
records:
data record
contains the header field, the load address, and the
object code.
termination record signifies the end of a module.
The header field in the data record contains the following information:
Number of
ASCII
Characters
Item
Description
%
1
Data type is Tektronix format
Block length
2
Number of characters in the record, minus the %
Block type
1
6 = data record
8 = termination record
Checksum
2
A 2-digit hex sum modulo 256 of all values in the
record except the % and the checksum itself.
The load address in the data record specifies where the object code will be
located. The first digit specifies the address length; this is always 8. The
remaining characters of the data record contain the object code, two characters per byte.
Figure 11–14 illustrates the Tektronix object format.
Figure 11–14.Extended Tektronix Object Format
Checksum: 21h =
Block Length
15h = 21
Header
Character
1+5+6+8+1+0+0+0+0+0+0+0+
2+0+2+0+2+0+2+0+2+0+2+0
Object Code: 6 bytes
%15621810000000202020202020
Load Address: 10000000h
Block Type:
6 (data)
Length of
Load Address
Hex Conversion Utility Description
11-41
Hex Conversion Utility Error Messages
11.12 Hex Conversion Utility Error Messages
section mapped to reserved memory message
Description A section or a boot-loader table is mapped into a reserved
memory area listed in the processor memory map.
Action
Correct the section or boot-loader address. Refer to the
TMS320C54x User’s Guide for valid memory locations.
sections overlapping
Description Two or more COFF section load addresses overlap or a boot
table address overlaps another section.
Action
This problem may be caused by an incorrect translation from
load address to hex output file address that is performed by the
hex conversion utility when memory width is less than data
width. See Section 11.4, page 11-7, and Section 11.10, page
11-32.
unconfigured memory error
Description This error could have one of two causes:
Action
11-42
J
The COFF file contains a section whose load address falls
outside the memory range defined in the ROMS directive.
J
The boot-loader table address is not within the memory
range defined by the ROMS directive.
Correct the ROM range as defined by the ROMS directive to
cover the memory range as needed, or modify the section load
address or boot-loader table address. Remember that if the
ROMS directive is not used, the memory range defaults to the
entire processor address space. For this reason, removing the
ROMS directive could also be a workaround.
Running Title—Attribute Reference
Appendix
AppendixAA
Common Object File
Format
The assembler and linker create object files in common object file format
(COFF). COFF is an implementation of an object file format of the same name
that was developed by AT&T for use on UNIX-based systems. This format is
used because it encourages modular programming and provides more powerful and flexible methods for managing code segments and target system
memory.
Sections are a basic COFF concept. Chapter 2 discusses COFF sections in
detail. If you understand section operation, you will be able to use the assembly language tools more efficiently.
This appendix contains technical details about COFF object file structure.
Much of this information pertains to the symbolic debugging information that
is produced by the C compiler. The purpose of this appendix is to provide supplementary information about the internal format of COFF object files.
Topic
Page
A.1
COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A.2
File Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
A.3
Optional File Header Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
A.4
Section Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
A.5
Structuring Relocation Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
A.6
Line-Number Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
A.7
Symbol Table Structure and Content . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
Chapter Title—Attribute Reference
A-1
COFF File Structure
A.1 COFF File Structure
The elements of a COFF object file describe the file’s sections and symbolic
debugging information. These elements include:
A file header
Optional header information
A table of section headers
Raw data for each initialized section
Relocation information for each initialized section
Line-number entries for each initialized section
A symbol table
A string table
The assembler and linker produce object files with the same COFF structure;
however, a program that is linked for the final time does not usually contain
relocation entries. Figure A–1 illustrates the overall object file structure.
Figure A–1. COFF File Structure
file header
optional file header
section 1 header
section headers
section n header
section 1
raw data
section n
raw data
raw data
(executable code
and initialized data)
section 1
relocation information
section n
relocation information
relocation
information
section 1
line numbers
line-number
entries
section n
line numbers
symbol table
string table
A-2
COFF File Structure
Figure A–2 shows a typical example of a COFF object file that contains the
three default sections, .text, .data, and .bss, and a named section (referred to
as <named>). By default, the tools place sections into the object file in the
following order: .text, .data, initialized named sections, .bss, and uninitialized
named sections. Although uninitialized sections have section headers, notice
that they have no raw data, relocation information, or line-number entries. This
is because the .bss and .usect directives simply reserve space for uninitialized
data; uninitialized sections contain no actual code.
Figure A–2. COFF Object File
file header
.text
section header
.data
section header
section headers
.bss
section header
<named> section
section header
.text
raw data
.data
raw data
raw data
<named> section
raw data
.text
relocation information
.data
relocation information
relocation
information
<named> section
relocation information
.text
line numbers
.data
line numbers
line-number
entries
<named> section
line numbers
symbol table
string table
Common Object File Format
A-3
File Header Structure
A.2 File Header Structure
The file header contains 22 bytes of information that describe the general
format of an object file. Table A–1 shows the structure of the Version 1 COFF
file header.
Table A–1.File Header Contents
Byte
Number Type
Description
0–1
Unsigned short integer
Version id; indicates version of COFF file
structure
2–3
Unsigned short integer
Number of section headers
4–7
Long integer
Time and date stamp; indicates when the file
was created
8–11
Long integer
File pointer; contains the symbol table’s
starting address
12–15
Long integer
Number of entries in the symbol table
16–17
Unsigned short integer
Number of bytes in the optional header. This
field is either 0 or 28; if it is 0, then there is no
optional file header
18–19
Unsigned short integer
Flags (see Table A–2)
20–21
Unsigned short integer
Target id; magic number (108h) indicates
the file can be executed in a TMS320C54x
system
Table A–2 lists the flags that can appear in bytes 18 and 19 of the file header.
Any number and combination of these flags can be set at the same time (for
example, if bytes 18 and 19 are set to 0003h, F_RELFLG and F_EXEC are
both set.)
A-4
File Header Structure
Table A–2.File Header Flags (Bytes 18 and 19)
Mnemonic
Flag
Description
F_RELFLG
0001h
Relocation information was stripped from the file.
F_EXEC
0002h
The file is relocatable (it contains no unresolved
external references).
F_LNNO
0004h
Line numbers were stripped from the file.
F_LSYMS
0010h
Local symbols were stripped from the file.
F_LENDIAN
0100h
The file has the byte ordering used by ’C54x
devices (16 bits per word, least significant byte first)
F_SYMMERGE
1000h
Duplicate symbols were removed.
Common Object File Format
A-5
Optional File Header Format
A.3 Optional File Header Format
The linker creates the optional file header and uses it to perform relocation at
download time. Partially linked files do not contain optional file headers.
Table A–3 illustrates the optional file header format.
Table A–3.Optional File Header Contents
Byte
Number
A-6
Type
Description
0–1
Short integer
Magic number (108h)
2–3
Short integer
Version stamp
4–7
Long integer
Size (in words) of executable code
8–11
Long integer
Size (in words) of initialized words
12–15
Long integer
Size (in words) of uninitialized data
16–19
Long integer
Entry point
20–23
Long integer
Beginning address of executable code
24–27
Long integer
Beginning address of initialized data
Section Header Structure
A.4 Section Header Structure
COFF object files contain a table of section headers that define where each
section begins in the object file. Each section has its own section header.
Table A–4.Section Header Contents
Byte
Number
Type
Description
0–7
Character
8-character section name, padded with nulls
8–11
Long integer
Section’s physical address
12–15
Long integer
Section’s virtual address
16–19
Long integer
Section size in words
20–23
Long integer
File pointer to raw data
24–27
Long integer
File pointer to relocation entries
28–31
Long integer
File pointer to line-number entries
32–33
Unsigned short integer
Number of relocation entries
34–35
Unsigned short integer
Number of line-number entries
36–37
Unsigned short integer
Flags (see Table A–5)
38
Character
Reserved
39
Character
Memory page number
Table A–5 lists the flags that can appear in bytes 36 and 37 of the section
header.
Common Object File Format
A-7
Section Header Structure
Table A–5.Section Header Flags (Bytes 36 and 37)
Mnemonic
Flag
Description
STYP_REG
0000h
Regular section (allocated, relocated, loaded)
STYP_DSECT
0001h
Dummy section (relocated, not allocated, not loaded)
STYP_NOLOAD
0002h
Noload section (allocated, relocated, not loaded)
STYP_GROUP
0004h
Grouped section (formed from several input sections)
STYP_PAD
0008h
Padding section (loaded, not allocated, not relocated)
STYP_COPY
0010h
Copy section (relocated, loaded, but not allocated; relocation and line-number entries are processed normally)
STYP_TEXT
0020h
Section that contains executable code
STYP_DATA
0040h
Section that contains initialized data
STYP_BSS
0080h
Section that contains uninitialized data
STYP_ALIGN
0700h
Section that is aligned on a page boundary
Note:
The term loaded means that the raw data for this section appears in the object file.
The flags listed in Table A–5 can be combined; for example, if the flag’s word
is set to 024h, both STYP_GROUP and STYP_TEXT are set.
Figure A–3 illustrates how the pointers in a section header would point to the
elements in an object file that are associated with the .text section.
A-8
Section Header Structure
Figure A–3. Section Header Pointers for the .text Section
.text
Section
Header
0–7
.text
8–11
12–15 16–19 20–23 24–27
•
•
28–31 32–33
34–35 36–37
38
39
•
.text
raw data
.text
relocation information
.text
line-number entries
As Figure A–2, page A-3, shows, uninitialized sections (created with the .bss
and .usect directives) vary from this format. Although uninitialized sections
have section headers, they have no raw data, relocation information, or linenumber information. They occupy no actual space in the object file. Therefore,
the number of relocation entries, the number of line-number entries, and the
file pointers are 0 for an uninitialized section. The header of an uninitialized
section simply tells the linker how much space for variables it should reserve
in the memory map.
Common Object File Format
A-9
Structuring Relocation Information
A.5 Structuring Relocation Information
A COFF object file has one relocation entry for each relocatable reference.
The assembler automatically generates relocation entries. The linker reads
the relocation entries as it reads each input section and performs relocation.
The relocation entries determine how references within each input section are
treated.
Version 1 COFF file relocation information entries use the 12-byte format
shown in Table A–6.
Table A–6.Relocation Entry Contents
Byte
Number
Type
Description
0–3
Long integer
Virtual address of the reference
4–7
Unsigned long integer
Symbol table index
8–9
Unsigned short integer
Reserved
10–11
Unsigned short integer
Relocation type (see Table A–7)
The virtual address is the symbol’s address in the current section before relocation; it specifies where a relocation must occur. (This is the address of the
field in the object code that must be patched.)
Following is an example of code that generates a relocation entry:
0002
0003
0000
0001
FF80
0000!
.global
B
X
X
In this example, the virtual address of the relocatable field is 0001.
The symbol table index is the index of the referenced symbol. In the
preceding example, this field would contain the index of X in the symbol table.
The amount of the relocation is the difference between the symbol’s current
address in the section and its assembly-time address. The relocatable field
must be relocated by the same amount as the referenced symbol. In the
example, X has a value of 0 before relocation. Suppose X is relocated to
address 2000h. This is the relocation amount (2000h – 0 = 2000h), so the
relocation field at address 1 is patched by adding 2000h to it.
You can determine a symbol’s relocated address if you know which section it
is defined in. For example, if X is defined in .data and .data is relocated by
2000h, X is relocated by 2000h.
If the symbol table index in a relocation entry is –1 (0FFFFh), this is called an
internal relocation. In this case, the relocation amount is simply the amount by
which the current section is being relocated.
A-10
Structuring Relocation Information
The relocation type specifies the size of the field to be patched and describes
how the patched value should be calculated. The type field depends on the
addressing mode that was used to generate the relocatable reference. In the
preceding example, the actual address of the referenced symbol (X) will be
placed in a 16-bit field in the object code. This is a 16-bit direct relocation, so
the relocation type is R_RELWORD. Table A–7 lists the relocation types.
Table A–7.Relocation Types (Bytes 8 and 9)
Mnemonic
Flag
Relocation Type
R_ABS
0000h
No relocation
R_RELBYTE
000Fh
8-bit direct reference to symbol’s address
R_REL13
002Ah
13-bit direct reference
R_RELWORD
0010h
16-bit direct reference to symbol’s address
R_PARTLS7
0028h
7 LSBs of an address
R_PARTMS9
0029h
9 MSBs of an address
Common Object File Format
A-11
Line-Number Table Structure
A.6 Line-Number Table Structure
The object file contains a table of line-number entries that are useful for
symbolic debugging. When the C compiler produces several lines of assembly
language code, it creates a line-number entry that maps these lines back to
the original line of C source code that generated them. Each single linenumber entry contains 6 bytes of information. Table A–8 shows the format of
a line-number entry.
Table A–8.Line-Number Entry Format
Byte
Number Type
0–3
Long integer
Description
This entry may have one of two values:
1) If it is the first entry in a block of line-number entries,
it points to a symbol entry in the symbol table.
2) If it is not the first entry in a block, it is the physical address of the line indicated by bytes 4–5.
4–5
Unsigned
short integer
This entry may have one of two values:
1) If this field is 0, this is the first line of a function entry.
2) If this field is not 0, this is the line-number of a line of
C source code.
Figure A–4 shows how line-number entries are grouped into blocks.
Figure A–4. Line-Number Blocks
Symbol Index 1
0
physical address
line number
physical address
line number
Symbol Index n
0
physical address
line number
physical address
line number
As Figure A–4 shows, each entry is divided into halves:
For the first line of a function, bytes 0–3 point to the name of a symbol or
a function in the symbol table, and bytes 4–5 contain a 0, which indicates
the beginning of a block.
A-12
Line-Number Table Structure
For the remaining lines in a function, bytes 0 –3 show the physical address
(the number of words created by a line of C source) and bytes 4 –5 show
the address of the original C source, relative to its appearance in the C
source program.
The line-number entry table can contain many of these blocks.
Figure A–5 illustrates line-number entries for a function named XYZ. As
shown, the function name is entered as a symbol in the symbol table. The first
portion on XYZ’s block of line-number entries points to the function name in
the symbol table. Assume that the original function in the C source contained
three lines of code. The first line of code produces 4 words of assembly language code, the second line produces 3 words, and the third line produces 10
words.
Figure A–5. Line-Number Entries
•
0
4
7
XYZ
•
0
1
2
3
line-number
entries
symbol table
(Note that the symbol table entry for XYZ has a field that points back to the
beginning of the line-number block.)
Because line numbers are not often needed, the linker provides an option (–s)
that strips line-number information from the object file; this provides a more
compact object module.
Common Object File Format
A-13
Symbol Table Structure and Content
A.7 Symbol Table Structure and Content
The order of symbols in the symbol table is very important; they appear in the
sequence shown in Figure A–6.
Figure A–6. Symbol Table Contents
filename 1
function 1
local symbols
for function 1
function 2
local symbols for
function 2
filename 2
function 1
local symbols
for function 1
static variables
defined global symbols
undefined global symbols
Static variables refer to symbols defined in C that have storage class static outside any function. If you have several modules that use symbols with the same
name, making them static confines the scope of each symbol to the module
that defines it (this eliminates multiple-definition conflicts).
A-14
Symbol Table Structure and Content
The entry for each symbol in the symbol table contains the symbol’s:
Name (or a pointer into the string table)
Type
Value
Section it was defined in
Storage class
Basic type (integer, character, etc.)
Derived type (array, structure, etc.)
Dimensions
Line number of the source code that defined the symbol
Section names are also defined in the symbol table.
All symbol entries, regardless of class and type, have the same format in the
symbol table. Each symbol table entry contains the 18 bytes of information
listed in Table A–9. Each symbol may also have an 18-byte auxiliary entry; the
special symbols listed in Table A–10, page A-16, always have an auxiliary
entry. Some symbols may not have all the characteristics listed above; if a particular field is not set, it is set to null.
Table A–9.Symbol Table Entry Contents
Byte
Number
0–7
Type
Description
Character
This field contains one of the following:
1) An 8-character symbol name, padded with nulls
2) A pointer into the string table if the symbol name
is longer than 8 characters
8–11
Long integer
Symbol value; storage class dependent
12–13
Short integer
Section number of the symbol
14–15
Unsigned short
integer
Basic and derived type specification
16
Character
Storage class of the symbol
17
Character
Number of auxiliary entries (always 0 or 1)
Common Object File Format
A-15
Symbol Table Structure and Content
A.7.1 Special Symbols
The symbol table contains some special symbols that are generated by the
compiler, assembler, and linker. Each special symbol contains ordinary
symbol table information as well as an auxiliary entry. Table A–10 lists these
symbols.
Table A–10. Special Symbols in the Symbol Table
Symbol
Description
.file
File name
.text
Address of the .text section
.data
Address of the .data section
.bss
Address of the .bss section
.bb
Address of the beginning of a block
.eb
Address of the end of a block
.bf
Address of the beginning of a function
.ef
Address of the end of a function
.target
Pointer to a structure or union that is returned by a function
.nfake
Dummy tag name for a structure, union, or enumeration
.eos
End of a structure, union, or enumeration
etext
Next available address after the end of the .text output section
edata
Next available address after the end of the .data output section
end
Next available address after the end of the .bss output section
Several of these symbols appear in pairs:
.bb/.eb indicate the beginning and end of a block.
.bf/.ef indicate the beginning and end of a function.
n fake/.eos name and define the limits of structures, unions, and enumera-
tions that were not named. The .eos symbol is also paired with named
structures, unions, and enumerations.
When a structure, union, or enumeration has no tag name, the compiler
assigns it a name so that it can be entered into the symbol table. These names
are of the form nfake, where n is an integer. The compiler begins numbering
these symbol names at 0.
A-16
Symbol Table Structure and Content
Symbols and Blocks
In C, a block is a compound statement that begins and ends with braces. A
block always contains symbols. The symbol definitions for any particular block
are grouped together in the symbol table and are delineated by the .bb/.eb
special symbols. Blocks can be nested in C, and their symbol table entries can
be nested correspondingly. Figure A–7 shows how block symbols are grouped
in the symbol table.
Figure A–7. Symbols for Blocks
Symbol Table
Block 1:
.bb
symbols for
block 1
.eb
Block 2:
.bb
symbols for
block 2
.eb
Symbols and Functions
The symbol definitions for a function appear in the symbol table as a group,
delineated by .bf/.ef special symbols. The symbol table entry for the function
name precedes the .bf special symbol. Figure A–8 shows the format of symbol
table entries for a function.
Figure A–8. Symbols for Functions
function name
.bf
symbols for
the function
.ef
If a function returns a structure or union, a symbol table entry for the special
symbol .target will appear between the entries for the function name and the
.bf special symbol.
Common Object File Format
A-17
Symbol Table Structure and Content
A.7.2 Symbol Name Format
The first eight bytes of a symbol table entry (bytes 0–7) indicate a symbol’s
name:
If the symbol name is eight characters or less, this field has type character.
The name is padded with nulls (if necessary) and stored in bytes 0–7.
If the symbol name is greater than 8 characters, this field is treated as two
long integers. The entire symbol name is stored in the string table. Bytes
0–3 contain 0, and bytes 4–7 are an offset into the string table.
A.7.3 String Table Structure
Symbol names that are longer than eight characters are stored in the string
table. The field in the symbol table entry that would normally contain the symbol’s name contains, instead, a pointer to the symbol’s name in the string table.
Names are stored contiguously in the string table, delimited by a null byte. The
first four bytes of the string table contain the size of the string table in bytes;
thus, offsets into the string table are greater than or equal to four.
Figure A–9 is a string table that contains two symbol names, Adaptive-Filter
and Fourier-Transform. The index in the string table is 4 for Adaptive-Filter and
20 for Fourier-Transform.
Figure A–9. String Table
38
A-18
‘A’
‘d’
‘a’
‘p’
‘t’
‘i’
‘v’
‘e’
‘-’
‘F’
‘i’
‘l’
‘t’
‘e’
‘r’
‘\0’
‘F’
‘o’
‘u’
‘r’
‘i’
‘e’
‘r’
‘-’
‘T’
‘r’
‘a’
‘n’
‘s’
‘f’
‘o’
‘r’
‘m’
‘\0’
Symbol Table Structure and Content
A.7.4 Storage Classes
Byte 16 of the symbol table entry indicates the storage class of the symbol.
Storage classes refer to the method in which the C compiler accesses a
symbol. Table A–11 lists valid storage classes.
Table A–11. Symbol Storage Classes
Mnemonic
Value
Storage Class
Mnemonic
Value
Storage Class
C_NULL
0
No storage class
C_UNTAG
12
Union tag
C_AUTO
1
Automatic variable
C_TPDEF
13
Type definition
C_EXT
2
External symbol
C_USTATIC
14
Uninitialized static
C_STAT
3
Static
C_ENTAG
15
Enumeration tag
C_REG
4
Register variable
C_MOE
16
Member of an enumeration
C_EXTDEF
5
External definition
C_REGPARM
17
Register parameter
C_LABEL
6
Label
C_FIELD
18
Bit field
C_ULABEL
7
Undefined label
C_BLOCK
100
Beginning or end of a block;
used only for the .bb and .eb
special symbols
C_MOS
8
Member of a structure
C_FCN
101
Beginning or end of a function; used only for the .bf and
.ef special symbols
C_ARG
9
Function argument
C_EOS
102
End of structure; used only
for the .eos special symbol
C_STRTAG
10
Structure tag
C_FILE
103
Filename; used only for the
.file special symbol
C_MOU
11
Member of a union
C_LINE
104
Used only by utility programs
Some special symbols are restricted to certain storage classes. Table A–12
lists these symbols and their storage classes.
Common Object File Format
A-19
Symbol Table Structure and Content
Table A–12. Special Symbols and Their Storage Classes
Special
Symbol
Restricted to This
Storage Class
Special
Symbol
Restricted to This
Storage Class
.file
C_FILE
.eos
C_EOS
.bb
C_BLOCK
.text
C_STAT
.eb
C_BLOCK
.data
C_STAT
.bf
C_FCN
.bss
C_STAT
.ef
C_FCN
A.7.5 Symbol Values
Bytes 8–11 of a symbol table entry indicate a symbol’s value. A symbol’s value
depends on the symbol’s storage class; Table A–13 summarizes the storage
classes and related values.
Table A–13. Symbol Values and Storage Classes
Storage Class Value Description
Storage Class Value Description
C_AUTO
Stack offset in bits
C_UNTAG
0
C_EXT
Relocatable address
C_TPDEF
0
C_STAT
Relocatable address
C_ENTAG
0
C_REG
Register number
C_MOE
Enumeration value
C_LABEL
Relocatable address
C_REGPARM
Register number
C_MOS
Offset in bits
C_FIELD
Bit displacement
C_ARG
Stack offset in bits
C_BLOCK
Relocatable address
C_STRTAG
0
C_FCN
Relocatable address
C_MOU
Offset in bits
C_FILE
0
If a symbol’s storage class is C_FILE, the symbol’s value is a pointer to the next
.file symbol. Thus, the .file symbols form a one-way linked list in the symbol
table. When there are no more .file symbols, the final .file symbol points back
to the first .file symbol in the symbol table.
The value of a relocatable symbol is its virtual address. When the linker
relocates a section, the value of a relocatable symbol changes accordingly.
A-20
Symbol Table Structure and Content
A.7.6 Section Number
Bytes 12–13 of a symbol table entry contain a number that indicates which
section the symbol was defined in. Table A–14 lists these numbers and the
sections they indicate.
Table A–14. Section Numbers
Mnemonic
Section
Number
N_DEBUG
–2
Special symbolic debugging symbol
N_ABS
–1
Absolute symbol
N_UNDEF
0
Undefined external symbol
N_SCNUM
1
.text section (typical)
N_SCNUM
2
.data section (typical)
N_SCNUM
3
.bss section (typical)
N_SCNUM
4 –32,767
Description
Section number of a named section, in the order in
which the named sections are encountered
If there were no .text, .data, or .bss sections, the numbering of named sections
would begin with 1.
If a symbol has a section number of 0, –1, or –2, it is not defined in a section.
A section number of –2 indicates a symbolic debugging symbol, which
includes structure, union, and enumeration tag names; type definitions; and
the filename. A section number of –1 indicates that the symbol has a value but
is not relocatable. A section number of 0 indicates a relocatable external
symbol that is not defined in the current file.
A.7.7 Type Entry
Bytes 14–15 of the symbol table entry define the symbol’s type. Each symbol
has one basic type and one to six derived types.
Following is the format for this 16-bit type entry:
Size
(in bits):
Derived
Type
6
Derived
Type
5
Derived
Type
4
Derived
Type
3
Derived
Type
2
Derived
Type
1
Basic
Type
2
2
2
2
2
2
4
Bits 0–3 of the type field indicate the basic type. Table A–15 lists valid basic
types.
Common Object File Format
A-21
Symbol Table Structure and Content
Table A–15. Basic Types
Mnemonic
Value
Type
T_NULL
0
Type not assigned
T_CHAR
2
Character
T_SHORT
3
Short integer
T_INT
4
Integer
T_LONG
5
Long integer
T_FLOAT
6
Floating point
T_DOUBLE
7
Double word
T_STRUCT
8
Structure
T_UNION
9
Union
T_ENUM
10
Enumeration
T_MOE
11
Member of an enumeration
T_UCHAR
12
Unsigned character
T_USHORT
13
Unsigned short integer
Bits 4–15 of the type field are arranged as six 2-bit fields that can indicate one
to six derived types. Table A–16 lists the possible derived types.
Table A–16. Derived Types
Mnemonic
Value
Type
DT_NON
0
No derived type
DT_PTR
1
Pointer
DT_FCN
2
Function
DT_ARY
3
Array
An example of a symbol with several derived types would be a symbol with a
type entry of 00000000110100112. This entry indicates that the symbol is an
array of pointers to short integers.
A-22
Symbol Table Structure and Content
A.7.8 Auxiliary Entries
Each symbol table entry may have one or no auxiliary entry. An auxiliary symbol table entry contains the same number of bytes as a symbol table entry (18),
but the format of an auxiliary entry depends on the symbol’s type and storage
class. Table A–17 summarizes these relationships.
Table A–17. Auxiliary Symbol Table Entries Format
N
Name
Storage
Class
.file
Type Entry
Derived
Type 1
Basic
Type
A ili
Auxiliary
E
Entry F
Format
C_FILE
DT_NON
T_NULL
Filename (see Table A–18)
.text, .data, .bss
C_STAT
DT_NON
T_NULL
Section (see Table A–19)
tagname
C_STRTAG
C_UNTAG
C_ENTAG
DT_NON
T_NULL
Tag name (see Table A–20)
.eos
C_EOS
DT_NON
T_NULL
End of structure (see Table A–21)
fcname
C_EXT
C_STAT
DT_FCN
(See note 1)
Function (see Table A–22)
arrname
(See note 2)
DT_ARY
(See note 1)
Array (see Table A–23)
.bb, .eb
C_BLOCK
DT_NON
T_VOID
Beginning and end of a block (see
Table 24 and Table A–25)
.bf, .ef
C_FCN
DT_NON
T_VOID
Beginning and end of a function (see
Table 24 and Table A–25)
Name related to a
structure, union, or
enumeration
(See note 2)
DT_PTR
DT_ARR
DT_NON
T_STRUCT
T_UNION
T_ENUM
Name related to a structure, union, or
enumeration (see Table A–26)
Notes:
1) Any except T_MOE
2) C_AUTO, C_STAT, C_MOS, C_MOU, C_TPDEF
In Table A–17, tagname refers to any symbol name (including the special
symbol nfake). Fcname and arrname refer to any symbol name.
A symbol that satisfies more than one condition in Table A–17 should have a
union format in its auxiliary entry. A symbol that satisfies none of these conditions should not have an auxiliary entry.
Common Object File Format
A-23
Symbol Table Structure and Content
Filenames
Each of the auxiliary table entries for a filename contains a 14-character filename in bytes 0–13. Bytes 14–17 are unused.
Table A–18. Filename Format for Auxiliary Table Entries
Byte
Number
Type
0–13
Character
14–17
—
Description
File name
Unused
Sections
Table A–19 illustrates the format of auxiliary table entries.
Table A–19. Section Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–6
Unsigned short integer
Number of relocation entries
7–8
Unsigned short integer
Number of line-number entries
9–17
—
Description
Section length
Not used (zero filled)
Tag Names
Table A–20 illustrates the format of auxiliary table entries for tag names.
Table A–20. Tag Name Format for Auxiliary Table Entries
A-24
Byte
Number
Type
0–5
—
6–7
Unsigned short integer
8–11
—
12–15
Long integer
16–17
—
Description
Unused (zero filled)
Size of structure, union, or enumeration
Unused (zero filled)
Index of next entry beyond this function
Unused (zero filled)
Symbol Table Structure and Content
End of Structure
Table A–21 illustrates the format of auxiliary table entries for ends of
structures.
Table A–21. End-of-Structure Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
—
6–7
Unsigned short integer
8–17
—
Description
Tag index
Unused (zero filled)
Size of structure, union, or enumeration
Unused (zero filled)
Functions
Table A–22 illustrates the format of auxiliary table entries for functions.
Table A–22. Function Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
Tag index
4–7
Long integer
Size of function (in bits)
8–11
Long integer
File pointer to line number
12–15
Long integer
Index of next entry beyond this function
16–17
—
Description
Unused (zero filled)
Common Object File Format
A-25
Symbol Table Structure and Content
Arrays
Table A–23 illustrates the format of auxiliary table entries for arrays.
Table A–23. Array Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
Unsigned short integer
line-number declaration
6–7
Unsigned short integer
Size of array
8–9
Unsigned short integer
First dimension
10–11
Unsigned short integer
Second dimension
12–13
Unsigned short integer
Third dimension
14–15
Unsigned short integer
Fourth dimension
16–17
—
Description
Tag index
Unused (zero filled)
End of Blocks and Functions
Table A–24 illustrates the format of auxiliary table entries for the ends of blocks
and functions.
Table A–24. End-of-Blocks/Functions Format for Auxiliary Table Entries
A-26
Byte
Number
Type
0–3
—
4–5
Unsigned short integer
6–17
—
Description
Unused (zero filled)
C source line number
Unused (zero filled)
Symbol Table Structure and Content
Beginning of Blocks and Functions
Table A–25 illustrates the format of auxiliary table entries for the beginnings
of blocks and functions.
Table A–25. Beginning-of-Blocks/Functions Format for Auxiliary Table Entries
Byte
Number
Type
0–3
—
4–5
Unsigned short integer
6–11
—
12–15
Long integer
16–17
—
Description
Unused (zero filled)
C source line number
Unused (zero filled)
Index of next entry past this block
Unused (zero filled)
Names Related to Structures, Unions, and Enumerations
Table A–26 illustrates the format of auxiliary table entries for the names of
structures, unions, and enumerations.
Table A–26. Structure, Union, and Enumeration Names Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
—
6–7
Unsigned short integer
8–17
—
Unused (zero filled)
16–17
—
Unused (zero filled)
Description
Tag index
Unused (zero filled)
Size of the structure, union, or enumeration
Common Object File Format
A-27
Running Title—Attribute Reference
Appendix
AppendixBA
Symbolic Debugging Directives
The TMS320C54x assembler supports several directives that the
TMS320C54x C compiler uses for symbolic debugging:
The .sym directive defines a global variable, a local variable, or a function.
Several parameters allow you to associate various debugging information
with the symbol or function.
The .stag, .etag, and .utag directives define structures, enumerations,
and unions, respectively. The .member directive specifies a member of a
structure, enumeration, or union. The .eos directive ends a structure, enumeration, or union definition.
The .func and .endfunc directives specify the beginning and ending lines
of a C function.
The .block and .endblock directives specify the bounds of C blocks.
The .file directive defines a symbol in the symbol table that identifies the
current source file name.
The .line directive identifies the line number of a C source statement.
These symbolic debugging directives are not usually listed in the assembly
language file that the compiler creates. If you want them to be listed, invoke
the compiler shell with the –g option, as shown below:
cl500 –g input file
This appendix contains an alphabetical directory of the symbolic debugging
directives. With the exception of the .file directive, each directive contains an
example of C source and the resulting assembly language code.
Chapter Title—Attribute Reference
B-1
.block/.endblock
Define a Block
.block beginning line number
.endblock ending line number
Syntax
Description
The .block and .endblock directives specify the beginning and end of a C
block. The line numbers are optional; they specify the location in the source
file where the block is defined.
Block definitions can be nested. The assembler will detect improper block
nesting.
Example
Following is an example of C source that defines a block, and the resulting
assembly language code.
C source:
.
.
.
{
/*
Beginning of a block */
/*
End of a block
int a,b;
a = b;
}
.
.
.
Resulting assembly language code:
.block 6
.sym
_a,0,4,1,16
.sym
_b,1,4,1,16
.line 5
LD
*SP(1),A
STL
A,*SP(0)
.endblock
8
B-2
; cycle 3
; cycle 4
*/
Supply a File Identifier
.file ”filename”
Syntax
Description
.file
The .file directive allows a debugger to map locations in memory back to lines
in a C source file. The filename is the name of the file that contains the original
C source program. The first 14 characters of the filename are significant.
You can also use the .file directive in assembly code to provide a name in the
file and improve program readability.
Example
In the following example, the filename text.c contained the C source that produced this directive.
.file
”text.c”
Assembler Directives
B-3
.func/.endfunc
Define a Function
.func beginning line number
Syntax
.endfunc ending line number
Description
The .func and .endfunc directives specify the beginning and end of a C function. The line numbers are optional; they specify the location in the source file
where the function is defined. Function definitions cannot be nested.
Example
Following is an example of C source that defines a function, and the resulting
assembly language code:
C source:
power(x, n) /* Beginning of a function */
int x,n;
{
int i, p;
p = 1;
for (i = 1; i <= n; ++i)
p = p * x;
return p;
/* End of function */
}
B-4
Define a Function
.func/.endfunc
Resulting assembly language code:
8
9
10
11
12
13
14
15
16
17
19
20
21
22
23
24
25
26
27
.global _power
.sym
_power,_power,36,2,0
.func
3
0000
0000
0001
0002
0003
0004
28
29 0005
0006
30 0007
31 0008
32 0009
33 000a
34 000b
000c
35
36 000d
37
38 000d
39 000e
40 000f
41
42 0010
0011
43 0012
44 0013
45 0014
46 0015
47 0016
0017
48
49 0018
50
51 0018
52
53 0019
54 001a
55
56
;***************************************************************
;* FUNCTION DEF: _power
*
;***************************************************************
_power:
eefd
FRAME
#–3
; cycle 1
f495
nop
;* A
assigned to _x
.sym
_x,8,4,17,16
.sym
_n,4,4,9,16
.sym
_x,0,4,1,16
.sym
_i,1,4,1,16
.sym
_p,2,4,1,16
.line
2
8000
STL
A,*SP(0)
; cycle 3
.line
4
7602
ST
#1,*SP(2)
; cycle 4
0001
.line
5
7601
ST
#1,*SP(1)
; cycle 6
0001
f7b8
SSBX
SXM
; cycle 8
f495
nop
1004
LD
*SP(4),A
; cycle 10
0801
SUB
*SP(1),A
; cycle 11
f843
BC
L3,ALT
; cycle 12
0018’
; branch occurs
; cycle 17
L2:
.line
6
4400
LD
*SP(0),16,A
; cycle 1
3102
MPYA
*SP(2)
; cycle 2
8102
STL
B,*SP(2)
; cycle 3
.line
5
6b01
ADDM
#1,*SP(1)
; cycle 4
0001
f7b8
SSBX
SXM
; cycle 6
f495
nop
1004
LD
*SP(4),A
; cycle 8
0801
SUB
*SP(1),A
; cycle 9
f842
BC
L2,AGEQ
; cycle 10
000d’
; branch occurs
; cycle 15
L3:
.line 7
1002
LD
*SP(2),A
; cycle
.line
8
ee03
FRAME
#3
; cycle 1
fc00
RET
; cycle 2
; branch occurs
; cycle 7
.endfunc
10,000000000h,
Symbolic Debugging Directives
B-5
.line
Create a Line Number Entry
.line line number [, address]
Syntax
Description
The .line directive creates a line number entry in the object file. Line number
entries are used in symbolic debugging to associate addresses in the object
code with the lines in the source code that generated them.
The .line directive has two operands:
The line number indicates the line of the C source that generated a portion
of code. Line numbers are relative to the beginning of the current function.
This is a required parameter.
The address is an expression that is the address associated with the line
number. This is an optional parameter; if you don’t specify an address, the
assembler will use the current SPC value.
Example
The .line directive is followed by the assembly language source statements
that are generated by the indicated line of C source. For example, assume that
the lines of C source below are line 4 and 5 in the original C source; line 5 produces the assembly language source statements that are shown below.
C source:
for (i = 1; i <= n; ++i)
p = p * x;
Resulting assembly language code:
31
32
33
34
35
36
37
38
39
40
41
000d
000e
000f
0010
0011
0012
0013
0014
6b00
0001
f7b8
f495
1002
0800
f842
000a’
42
43 0015
44
45 0015 ee05
46 0016 fc00
47
48
49
50
B-6
.line
LD
MPYA
STL
.line
ADDM
000a 4403
000b 3101
000c 8101
SSBX
nop
LD
SUB
BC
5
*SP(3),16,A
*SP(1)
B,*SP(1)
; cycle 1
; cycle 2
; cycle 3
#1,*SP(0)
; cycle 4
SXM
; cycle 6
*SP(2),A
*SP(0),A
L2,AGEQ
; cycle 8
; cycle 9
; cycle 10
4
; branch occurs
; cycle 15
L3:
.line
7
FRAME
#5
; cycle 1
RET
; cycle 2
; branch occurs
; cycle 7
.endfunc
9,000000000h,5
Define a Member
.member name, value [, type, storage class, size, tag, dims]
Syntax
Description
.member
The .member directive defines a member of a structure, union, or enumeration. It is valid only when it appears in a structure, union, or enumeration definition.
Name is the name of the member that is put in the symbol table. The first
32 characters of the name are significant.
Value is the value associated with the member. Any legal expression
(absolute or relocatable) is acceptable.
Type is the C type of the member. Appendix A contains more information
about C types.
Storage class is the C storage class of the member. Appendix A contains
more information about C storage classes.
Size is the number of bits of memory required to contain this member.
Tag is the name of the type (if any) or structure of which this member is a
type. This name must have been previously declared by a .stag, .etag, or
.utag directive.
Dims may be one to four expressions separated by commas. This allows
up to four dimensions to be specified for the member.
The order of parameters is significant. The name and value are required
parameters. All other parameters may be omitted or empty. (Adjacent commas
indicate an empty entry.) This allows you to skip a parameter and specify a
parameter that occurs later in the list. Operands that are omitted or empty
assume a null value.
Example
Following is an example of a C structure definition and the corresponding assembly language statements:
C source:
struct doc {
char title;
char group;
int
job_number;
} doc_info;
Resulting assembly language code:
.stag
.member
.member
.member
.eos
_doc,64
_title,0,2,8,16
_group,16,2,8,16
_job_number,32,4,8,16
Symbolic Debugging Directives
B-7
.stag/.etag/.utag/.eos
Syntax
Define a Structure
.stag name [, size]
member definitions
.eos
.etag name [, size]
member definitions
.eos
.utag name [, size]
member definitions
.eos
Description
The .stag directive begins a structure definition. The .etag directive begins an
enumeration definition. The .utag directive begins a union definition. The .eos
directive ends a structure, enumeration, or union definition.
Name is the name of the structure, enumeration, or union. The first 32
characters of the name are significant. This is a required parameter.
Size is the number of bits the structure, enumeration, or union occupies
in memory. This is an optional parameter; if omitted, the size is unspecified.
The .stag, .etag, or.utag directive should be followed by a number of .member
directives, which define members in the structure. The .member directive is
the only directive that can appear inside a structure, enumeration, or union
definition.
The assembler does not allow nested structures, enumerations, or unions.
The C compiler unwinds nested structures by defining them separately and
then referencing them from the structure they are referenced in.
Example 1
Following is an example of a structure definition.
C source:
struct doc
{
char title;
char group;
int
job_number;
} doc_info;
Resulting assembly language code:
.stag
.member
.member
.member
.eos
B-8
_doc,96
_title,0,2,8,32
_group,32,2,8,32
_job_number,64,4,8,32
Define a Structure
Example 2
.stag/.etag/.utag/.eos
Following is an example of a union definition.
C source:
union u_tag
int
float
char
} valu;
{
val1;
val2;
valc;
Resulting assembly language code:
.utag
.member
.member
.member
.eos
Example 3
_u_tag,96
_val1,0,2,8,32
_val2,32,4,8,32
_valc,64,4,8,32
Following is an example of an enumeration definition.
C Source:
{
enum o_ty { reg_1, reg_2, result } optypes;
}
Resulting assembly language code:
.etag
.member
.member
.member
.eos
_o_ty,32
_reg_1,0,11,16,32
_reg_2,1,11,16,32
_result,2,11,16,32
Symbolic Debugging Directives
B-9
.sym Define a Symbol
.sym name, value [, type, storage class, size, tag, dims]
Syntax
Description
The .sym directive specifies symbolic debug information about a global variable, local variable, or a function.
Name is the name of the variable that is put in the object symbol table. The
first 32 characters of the name are significant.
Value is the value associated with the variable. Any legal expression
(absolute or relocatable) is acceptable.
Type is the C type of the variable. Appendix A contains more information
about C types.
Storage class is the C storage class of the variable. Appendix A contains
more information about C storage classes.
Size is the number of words of memory required to contain this variable.
Tag is the name of the type (if any) or structure of which this variable is a
type. This name must have been previously declared by a .stag, .etag, or
.utag directive.
Dims may be up to four expressions separated by commas. This allows
up to four dimensions to be specified for the variable.
The order of parameters is significant. The name and value are required
parameters. All other parameters may be omitted or empty (adjacent commas
indicate an empty entry). This allows you to skip a parameter and specify a
parameter that occurs later in the list. Operands that are omitted or empty
assume a null value.
Example
These lines of C source produce the .sym directives shown below:
C source:
struct s { int member1, member2; } str;
int
ext;
int
array[5][10];
long *ptr;
int
strcmp();
main(arg1,arg2)
int
arg1;
char *arg2;
{
register r1;
}
B-10
Define a Symbol
.sym
Resulting assembly language code:
.global
.bss
.sym
.global
.bss
.sym
.global
.bss
.sym
.global
.bss
.sym
_array
_array,50,0,0
_array,_array,244,2,800,,5,10
_ptr
_ptr,1,0,0
_ptr,_ptr,21,2,16
_str
_str,2,0,1
_str,_str,8,2,32,_s
_ext
_ext,1,0,0
_ext,_ext,4,2,16
Symbolic Debugging Directives
B-11
Hex Conversion Utility Examples
Appendix
AppendixCA
Hex Conversion Utility Examples
The flexible hex conversion utility offers many options and capabilities. Once
you understand the proper ways to configure the EPROM system and the
requirements of the EPROM programmer, you will find that converting a file for
a specific application is easy.
The three major examples in this appendix show how to develop a hex command file for multiple EPROM memory systems, avoid holes, and generate a
boot table. The examples use the assembly code shown in Example C–1.
Example C–1. Assembly Code for Hex Conversion Utility Examples
**********************************************************
* Assemble two words into section, ”sec1”
*
**********************************************************
.sect ”sec1”
.word 1234h
.word 5678h
**********************************************************
* Assemble two words into section, ”sec2”
*
**********************************************************
.sect ”sec2”
.word 0aabbh
.word 0ccddh
.end
Topic
Page
C.1
Example 1: Building a Hex Command File
for Two 8-Bit EPROMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
C.2
Example 2: Avoiding Holes With Multiple Sections . . . . . . . . . . . . . . . C-7
C.3
Example 3: Generating a Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-9
Hex Conversion Utility Examples
C-1
Example 1: Building a Command File for Two 8-Bit EPROMS
C.1 Example 1: Building A Hex Command File for Two 8-Bit EPROMs
Example 1 shows how to build the hex command file you need for converting
a COFF object file for the memory system shown in Figure C–1. In this system,
there are two external 64K 8-bit EPROMs interfacing with a ’C54x target
processor. Each of the EPROMs contributes 8 bits of a 16-bit word for the target processor.
Figure C–1.A Two 8-Bit EPROM System
Upper 8 Bits
Lower 8 Bits
CPU
C54x
64K 8
ROM0
64K 8
ROM1
ROM Width
8 Bits
ROM Width
8 Bits
Width 16 Bits
EPROM System Memory Width 16 Bits
By default, the hex conversion utility uses the linker load address as the base
for generating addresses in the converted output file. However, for this
application, the code will reside at physical EPROM address 0x0010, rather
than the address specified by the linker (0x1400). The circuitry of the target
board handles the translation of this address space. The paddr parameter allocates a section and burns the code at EPROM address 0x0010.
The paddr parameter is specified within the SECTIONS directive (see Section
11.6, page 11-20, for details.). If you use the paddr parameter to specify a load
address for one section included in the conversion, then you must specify a
paddr for each section included in the conversion. When setting the paddr
parameter, you must ensure that the specified addresses do not overlap the
linker-assigned load addresses of sections that follow.
In Example 1, two sections are defined: sec1 and sec2. You can easily add a
paddr parameter for each of these sections from within the SECTIONS directive. However, the task may become unmanageable for large applications with
many sections, or in cases where section sizes may change often during code
development.
C-2
Example 1: Building a Command File for Two 8-Bit EPROMS
To work around this problem, you can combine the sections at link stage, creating a single section for conversion. To do this, use the linker command shown
in Example C–2.
Example C–2. A Linker Command File for Two 8-Bit EPROMs
test.obj
–o test.out
–m test.map
MEMORY
{
PAGE 0 : EXT_PRG ; org = 0x1400 , len = 0xEB80
}
SECTIONS
{
outsec: { *(sec1)
*(sec2)
}
} > EXT_PRG PAGE 0
The EPROM programmer in this example has the following system requirements:
EPROM system memory width must be 16 bits.
ROM1 contains the upper 8 bits of a word.
ROM0 contains the lower 8 bits of a word.
The hex conversion utility must locate code starting at EPROM address
0x0010.
Intel format must be used.
Byte increment must be selected for addresses in the hex conversion
utility output file (memory width is the default).
Use the following options to select the requirements of the system:
Option
Description
–i
Create Intel format
–byte
Select byte increment for addresses in converted
output file
–memwidth 16
Set EPROM system memory width to 16
–romwidth 8
Set physical ROM width to 8
Hex Conversion Utility Examples
C-3
Example 1: Building a Command File for Two 8-Bit EPROMS
With the memory width and ROM width values above, the utility will automatically generate two output files. The ratio of memory width to ROM width determines the number of output files. The ROM0 file contains the lower 8 of the 16
bits of raw data, and the ROM1 file contains the upper 8 bits of the corresponding data.
Example C–3 shows the hex command file with all of the selected options.
Example C–3. A Hex Command File for Two 8-Bit EPROMs
test.out
/* COFF object input file
–map example1.mxp
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
/* Set parameters for EPROM programmer
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
–i
–byte
/* Select Intel format
/* Select byte increment for addresses
*/
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
/* Set options required to describe EPROM memory system */
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
–memwidth 16
–romwidth 8
/* Set EPROM system memory width
/* Set physical width of ROM device
*/
*/
ROMS
{
PAGE 0 : EPROM : origin = 0x00, length = 0x10000,
files = {low8.bit, upp8.bit}
}
SECTIONS
{ outsec: paddr = 0x10 }
Figure C–2 (a) shows the contents of the converted file for ROM0 (low8.bit)
containing the lower 8 bits. Figure C–2 (b) shows the contents of the converted
file for ROM1 (upp8.bit) containing the upper 8 bits of data.
C-4
Example 1: Building a Command File for Two 8-Bit EPROMS
Figure C–2.Data From Output File
(a) low8.bit( Lower Bits)
Data from converted output file
:040010003478BBDDA8
:00000001FF
Corresponding Map in EPROM — ROM0 (See Example C–1)
0x0010
34
78
BB
DD
(b) upp8.bit (Upper Bits)
Data from converted output file
:040010001256AACC0E
:00000001FF
Corresponding Map in EPROM — ROM1 (See Example C–1)
0x0010
12
56
AA
CC
Hex Conversion Utility Examples
C-5
Example 1: Building a Command File for Two 8-Bit EPROMS
To illustrate precisely how the utility performs the conversion, specify the –map
option. Although not required, the –map option generates useful information
about the output. The resulting map is shown in Example C–4.
Example C–4. Map File Resulting From Hex Command File in Example C–3
******************************************************
TMS320C54x COFF/Hex Converter
Version x.xx
******************************************************
Fri May 12 15:10:53 1995
INPUT FILE NAME: <test.out>
OUTPUT FORMAT:
Intel
PHYSICAL MEMORY PARAMETERS
Default data width:
16
Default memory width: 16
Default output width: 8
OUTPUT TRANSLATION MAP
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00000000..0000ffff Page=0 ROM Width=8 Memory Width=16
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES: low8.bit [b0..b7]
upp8.bit [b8..b15]
CONTENTS: 00000010..00000013
C-6
Data Width=2
outsec
”EPROM”
Example 2: Avoiding Holes With Multiple Sections
C.2 Example 2: Avoiding Holes With Multiple Sections
When the memory width is less than the data width, holes may appear at
the beginning of a section or between sections. This is due to multiplication
of the load address by a correction factor. See Section 11.10, page 11-32,
for more information.
You must eliminate the holes between converted sections. The sections
can be made contiguous in one of two ways:
Specify a paddr value for each section listed in a SECTIONS directive.
This forces the hex conversion utility to use that specific address for the
output file address field. You must ensure that the section addresses do
not overlap. Example C–5 shows a linker command file for this method.
The linker should be executed with this command file; then, the hex
conversion utility should be executed with the set of commands shown in
Example C–6.
Link the sections together into one output section for conversion.
Example C–7 shows a linker command file for this method. The linker
should be executed with this command file; then, the hex conversion utility
should be executed with the set of commands shown in Example C–8.
Example C–5. Linker Command File: Method One for Avoiding Holes
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
PAGE 0: DARAM: org = 0x0080
EXT: org = 0x1400
}
, length = 0x1370
, length = 0xEB80
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
sec1 : load = EXT PAGE 0
sec2 : load = EXT PAGE 0
}
Hex Conversion Utility Examples
C-7
Example 2: Avoiding Holes With Multiple Sections
Example C–6. Hex Command File: Method One for Avoiding Holes
–i
test.out
–map example.mxp
ROMS
{
PAGE 0: ROM: org = 0x0000,
}
length = 0x800, romwidth = 8, memwidth = 8
SECTIONS
{
sec1: paddr = 0x0000
sec2: paddr = 0x0004
}
Example C–7. Linker Command File: Method Two for Avoiding Holes
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
PAGE 0: DARAM: org = 0x0080
EXT: org = 0x1400
}
, length = 0x1370
, length = 0xEB80
SECTIONS
{
outsec: { *(sec1)
*(sec2) } > EXT PAGE 0
}
Example C–8. Hex Command File: Method Two for Avoiding Holes
–i
test.out
–map example.mxp
ROMS
{
PAGE 0: ROM : org = 0x0100, length = 0x0800, romwidth = 8, memwidth = 8,
files = {examp2_2.hex}
}
SECTIONS
{
outsec: paddr = 0x100
}
C-8
Example 3: Generating a Boot Table
C.3 Example 3: Generating a Boot Table
Example 3 shows how to use the linker and the hex conversion utility to build
a boot load table for the ’C54x. The assembly code used in this section is
shown in Example C–1 on page C-1.
Example C–9. C Code for a ’C54x
int array[]={1,2,3,4};
main()
{
array[0] = 5;
}
Figure C–3 shows the EPROM memory system for which the output file will be
generated. In this application, the single ’C54x device is booted from a 128K
8-bit EPROM. The requirements of the system are that the boot table must
reside at EPROM memory address 0.
Figure C–3.EPROM System for a ’C54x
CPU
’C54x
128K 8
ROM0
Width 16 Bits
ROM Width
8 Bits
EPROM System Memory Width
8 Bits
Two concerns should be addressed when the boot table is generated for the
’C54x:
Linking required sections for boot load
Formation and placement of the boot routine selection word
Hex Conversion Utility Examples
C-9
Example 3: Generating a Boot Table
Linking required sections for boot load
The on-chip boot loader loads only a single block. This may present a problem
when you are loading C code compiled with the TMS320C54x C compiler. The
TMS320C54x C compiler creates several sections or blocks when it compiles
C source code. Some applications may require that all sections associated
with the program be included in the boot to have a complete executable
program. In this case, the individual sections must be combined into a single
section for boot.
The hex conversion utility does not combine individual sections; therefore, you
must use the linker to group those sections.
The sections that the compiler creates are divided into two categories: initialized sections (sections that contain data or code) and uninitialized sections
(sections that reserve space but contain no actual data). Initialized sections
created by the TMS320C54x C compiler include .text, .cinit, .const, and .data.
Uninitialized sections are ignored by the hex conversion utility and are not
converted.
Most applications require that .text and .cinit sections are included in the boot.
This allows code and information for the C boot routine (c_int00 defined in
boot.asm) to load and run, initializing the C environment and branching to the
main function in the applications code.
The .text and .cinit sections must be linked together as a single section in the
linker command file. The .cinit section contains the initialization data and
tables for all global or static C symbols that were declared with an initial value
(i.e. int x = 5; ). Note that the linker handles the .cinit section differently than
the other sections.
When the linker encounters a .cinit section specified as an output section in
the link, it automatically:
Sets the symbol cinit to point to the start of the included .cinit section
Appends a single word to the end of the section
This last word contains a zero that is used to mark the end of the initialization
table. However, if .cinit is included as an input section only, the linker sets cinit
to –1, indicating that no initialization tables were loaded. Therefore, the C boot
routine, c_int00, does not attempt to initialize any of the global or static C
symbols.
When linking the .cinit section into an output section other than .cinit, the linker
does not perform the automatic functions listed above. Therefore, these functions must be implemented explicitly within the linker command file.
Example C–10 on page C-11 shows a linker command file that places .text and
.cinit into a single output section named boot_sec.
C-10
Example 3: Generating a Boot Table
Example C–10. Linker Command File to Form a Single Boot Section for a ’C54x
–c
–l rts.lib
–m boot1.map
–o boot.out
MEMORY
{
PAGE 0 : PROG
PAGE 1 : DATA
: origin = 001400h, length = 01000h
: origin = 0080h,
length = 01000h
}
SECTIONS
{
boot_sec: { *(.text)
/*–––––––––––––––––––––––––––––––––––––*/
/* Set start address for C init table */
/*–––––––––––––––––––––––––––––––––––––*/
cinit = .;
/*–––––––––––––––––––––––––––––––––––––*/
/* Include all cinit sections
*/
/*–––––––––––––––––––––––––––––––––––––*/
*(.cinit)
/*–––––––––––––––––––––––––––––––––––––*/
/* Reserve a single space for the zero */
/* word to mark end of C init
*/
/*–––––––––––––––––––––––––––––––––––––*/
.+=1;
}
fill = 0x0000, /* Make sure fill value is 0
load = PROG PAGE 0
.data
.bss
.const
.sysmem
.stack
:
:
:
:
:
{}
{}
{}
{}
{}
>
>
>
>
>
DATA
DATA
DATA
DATA
DATA
PAGE
PAGE
PAGE
PAGE
PAGE
*/
1
1
1
1
1
}
Example C–11 shows a portion of the map file generated when the linker is
executed with the command file in Example C–10.
Hex Conversion Utility Examples
C-11
Example 3: Generating a Boot Table
Example C–11. Section Allocation Portion of Map File Resulting From the Command File
in Example C–10
SECTION ALLOCATION MAP
output
section
––––––––
boot_sec
page
––––
0
origin
––––––––––
00001400
00001400
00001404
0000142f
00001464
0000146a
0000146d
length
––––––––––
0000006e
00000004
0000002b
00000035
00000006
00000003
00000001
attributes/
input sections
––––––––––––––––
boot.obj (.text)
rts.lib : boot.obj (.text)
: exit.obj (.text)
boot.obj (.cinit)
rts.lib : exit.obj (.cinit)
––HOLE–– [fill = 0000]
.data
1
00000080
00000080
00000080
00000080
00000000
00000000
00000000
00000000
UNINITIALIZED
boot.obj (.data)
rts.lib : exit.obj (.data)
: boot.obj (.data)
.bss
1
00000080
00000080
00000084
00000084
00000025
00000004
00000000
00000021
UNINITIALIZED
boot.obj (.bss)
rts.lib : boot.obj (.bss)
: exit.obj (.bss)
.const
1
00000080
00000000
UNINITIALIZED
.sysmem
1
00000080
00000000
UNINITIALIZED
.stack
1
000000a5
000000a5
00000400
00000000
UNINITIALIZED
rts.lib : boot.obj (.stack)
GLOBAL SYMBOLS
address
––––––––
00000080
00000080
00000400
0000145e
00000080
00001448
00001404
0000142f
00001400
00001464
00000080
000000a5
name
––––
.bss
.data
__STACK_SIZE
_abort
_array
_atexit
_c_int00
_exit
_main
cinit
edata
end
[12 symbols]
C-12
address
––––––––
00000080
00000080
00000080
00000080
000000a5
00000400
00001400
00001404
0000142f
00001448
0000145e
00001464
name
––––
edata
.data
_array
.bss
end
__STACK_SIZE
_main
_c_int00
_exit
_atexit
_abort
cinit
Example 3: Generating a Boot Table
Notice that the linker placed a hole at the end of the section boot_sec with a
fill value of 0, as specified in the command file. Also, the global symbol cinit
coincides with the start of the first .cinit section included in the link. When the
linker is executed with the command file in Example C–10, the linker issues
warnings that the output file contains no .text section and that the global
symbol cinit is being redefined. These warnings may be ignored in this
instance.
Formation and placement of the boot routine selection word
The boot routine selection word determines the mode in which the on-chip
boot loader operates. The on-chip boot loader reads this word from location
0xFFFF in program memory. For this ’C54x application, the on-chip boot
loader must operate in 8-bit parallel EPROM mode.
The hex conversion utility does not automatically generate and place the boot
routine selection word. Therefore, you must make sure that the correct value
is placed in the correct memory address. For this ’C54x boot table the linker
command file in Example C–12 performs this task.
Hex Conversion Utility Examples
C-13
Example 3: Generating a Boot Table
Example C–12. Linker Command for Setting the Boot Routine Selection Word for a ’C54x
–c
–l rts.lib
–m boot2.map
MEMORY
{
PAGE 0 : PROG
PAGE 0 : BRSW
PAGE 1 : DATA
}
–o boot.out
: origin = 01400h, length = 01000h
: origin = 0ffffh, length = 00001h
: origin = 0080h, length = 01000h
SECTIONS
{
boot_sec: { *(.text)
cinit = .;
/* Set start address for C init table. */
*(.cinit)
/* Include all cinit sections.
*/
/*–––––––––––––––––––––––––––––––––––––*/
/* Reserve a single space for the zero */
/* word to mark end of C init
*/
/*–––––––––––––––––––––––––––––––––––––*/
.+=1;
}
fill = 0x0000,
load = PROG PAGE 0
/* Make sure fill value is 0 */
.brsw : {
/*–––––––––––––––––––––––––––––––––––––*/
/* Create a single word section that
*/
/* contains the proper fill value for */
/* the needed boot routine select mode */
/*–––––––––––––––––––––––––––––––––––––*/
.+= 1;
/* Reserve a word in this section
*/
/*–––––––––––––––––––––––––––––––––––––*/
/* Select fill value that corresponds */
/* to correct boot routine select mode */
/*–––––––––––––––––––––––––––––––––––––*/
}
fill = 0x0001,
load = 0xffff PAGE 0
.data
.bss
.const
.sysmem
.stack
}
C-14
:
:
:
:
:
{}
{}
{}
{}
{}
>
>
>
>
>
DATA
DATA
DATA
DATA
DATA
PAGE
PAGE
PAGE
PAGE
PAGE
1
1
1
1
1
Example 3: Generating a Boot Table
The command file in Example C–12, page C-14, creates a new section called
.brsw that contains a single word whose value equals 0x0001. This corresponds to a boot routine selection mode for 8-bit parallel EPROM mode and
a source address of 0x0000.
Executing the linker with the command file in Example C–12 yields a COFF file
that can be used as input to the hex conversion utility to build the desired boot
table.
Options
The hex conversion utility has options that describe the requirements for the
EPROM programmer and options that describe the EPROM memory system.
For Example 3, assume that the EPROM programmer has only one requirement: that the hex file be in Intel format.
In the EPROM memory system illustrated in Figure C–3, page C-9, the
EPROM system memory width is 8 bits, and the physical ROM width is 8 bits.
The following options are selected to reflect the requirements of the system:
Option
Description
–i
Create Intel format
–memwidth 8
Set EPROM system memory width to 8
–romwidth 8
Set physical ROM width to 8
Because the application requires the building of a boot table for parallel boot
mode, the following options must be selected as well:
Option
Description
–boot
Create a boot load table
–bootorg 0x0000
Place boot table at address 0x0000
Because two sections must be loaded, boot_sec and .brsw, and only one of
these sections is included in the boot table, you must use a hex command file
to specify which sections are bootable.
You must use a ROMS directive to specify the address range for the boot table
in physical ROM. Example C–13 depicts the complete command file needed
to convert the COFF file.
Hex Conversion Utility Examples
C-15
Example 3: Generating a Boot Table
Example C–13. Hex Command File for Converting a COFF File
boot.out
–i
–map boot.mxp
–o boot.hex
/* Input COFF file
/* Select Intel format
*/
*/
/* Name hex output file boot.hex */
–memwidth 8
–romwidth 8
/* Set EPROM system memory width */
/* Set physical ROM width
*/
–boot
–bootorg 0x0000
/* Build a boot table
/* Place boot table in EPROM
/* starting at address 0x0000
*/
*/
*/
ROMS
{
PAGE 0 : ROM : origin = 0x0000, length = 0x20000
}
SECTIONS
{
boot_sec : paddr=boot
.brsw
: paddr=0x1fffe
}
The paddr parameter overrides the linked section address for a given section.
Because the system memory width is 8 bits, the address space is expanded
by a factor of 2 (data width divided by memory width). So the address for allocating the .brsw section is multiplied by a factor of 2: 0xFFFF * 2 –> 0x1FFFE.
In Example 3, memory width and ROM width are the same; therefore, the hex
conversion utility creates a single output file. The number of output files is
determined by the ratio of memwidth to romwidth.
Example C–14, page C-17, shows the map file boot.map, resulting from
executing the command file in Example C–13, which includes the –map
option.
C-16
Example 3: Generating a Boot Table
Example C–14. Map File Resulting From the Command File in Example C–13
******************************************************
TMS320C54x COFF/Hex Converter
Version x.xx
******************************************************
Fri May 12 15:27:46 1995
INPUT FILE NAME: <boot.out>
OUTPUT FORMAT:
Intel
PHYSICAL MEMORY PARAMETERS
Default data width:
16
Default memory width: 8 (MS––>LS)
Default output width: 8
BOOT LOADER PARAMETERS
Table Address: 0000, PAGE 0
OUTPUT TRANSLATION MAP
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00000000..0001ffff Page=0 ROM Width=8 Memory Width=8
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES: boot.hex [b0..b7]
CONTENTS: 00000000..000000df
width=00000002
0001fffe..0001ffff
”ROM”
BOOT TABLE
boot_sec : dest=00001400
Data Width=2
size=0000006e
.brsw
The hex conversion utility output file boot.hex, resulting from the command file
in Example C–13, is shown in Example C–15.
Example C–15. Hex Conversion Utility Output File Resulting From the Command File in
Example C–13
:200000001400006D76F800800005FC00771800A56BF8001803FF68F80018FFFEF7B8F7BEE6
:20002000F4A0F6B7F6B5F6B6F0201464F1000001F84D142BF07314257EF80012F000000115
:2000400047F800117E9200F80011F00000017EF80011F00000016C89141AF0741400F074CF
:20006000145E4A167216008410F80016FA4514464A17EEFF771700856D8E48174916F600DB
:200080008811F495F4951081F4E3F4956C86143AF0731446F7B811F80084F3100020F84B25
:2000A0001453F273145DF495E80172110084491180E10085F3000001E80081F80084FC0075
:2000C000EEFFE801F074142FEE01FC000004008000010002000300040001008400000000A5
:020000040001F9
:02FFFE00000100
:00000001FF
Hex Conversion Utility Examples
C-17
General Syntax Errors
Appendix
AppendixDA
Assembler Error Messages
The assembler issues three types of error messages:
Fatal
Nonfatal
Macro
When the assembler completes its second pass, it reports any errors that it
encountered during the assembly. It also prints these errors in the listing file
(if one is created); an error is printed following the source line that incurred it.
This appendix lists the three types of assembler error messages in alphabetical order according to the error message number. Most errors are fatal errors;
if an error is not fatal or if it is a macro error, this is noted in the assembler listing
file. Each error message consists of its class number and text showing the specific error that was detected. Each class number group has a Description of
the problem and an Action that suggests possible remedies.
E0000:
Comma required to separate arguments
Left parenthesis expected
Matching right parenthesis is missing
Missing right quote of string constant
Syntax Error
Description These are errors about general syntax. The required syntax is
not present.
Action
Correct the source per the error message text.
E0001:
Section sym is not defined
Section sym is not an initialized section
Description These are errors about invalid symbol names. A symbol is
invalid for the context in which it is used.
Action
Correct the source per the error message text.
Assembler Error Messages
D-1
Assembler Error Messages
E0002:
Invalid directive specification
Invalid mnemonic specification
Description These errors are about invalid mnemonics. The instruction,
macro, or directive specified was not recognized.
Action
Check the directive or instruction used.
E0003:
Cluttered character operand encountered
Cluttered string constant operand encountered
Cluttered identifier operand encountered
Condition must be EQ, LT, GT, or NEQ
Condition must be srcLT, LEQ, GT, GEQ
Illegal condition operand or combination
Illegal indirect memaddr specification
Invalid binary constant specified
Incorrect bit symbol for specified status register
Invalid constant specification
Invalid decimal constant specified
Invalid float constant specified
Invalid hex constant specified
Invalid immediate expression or shift value
Invalid octal constant specified
Invalid operand xShift value out of range
Description These are errors about invalid operands. The instruction,
parameter, or other operand specified was not recognized.
Action
D-2
Correct the source per the error message text.
Assembler Error Messages
E0004:
Absolute, well-defined integer value expected
Accumulator specified in second half of parallel
instruction may not be the same as the first
Data size must be equal to pointer size
Expecting accumulator A or B
Expecting ASM or shift value
Expecting dual memory addressing
Identifier operand expected
Illegal character argument specified
Illegal endian flag specified
Illegal floating-point expression
Illegal string constant operand specified
Invalid identifier, sym, specified
Invalid macro parameter specified
No parameters available for macro arguments
Not expecting direct operand op
Not expecting indirect operand op
Not expecting immediate value operand op
Operand must be auxiliary register or SP
Operand must be auxiliary register
Offset Addressing modes not legal for MMRs
Pointer too big for this data size
String constant or substitution symbol expected
Structure/Union tag symbol expected
Substitution symbol operand expected
Description These errors are about illegal operands. The instruction, parameter or other operand specified was not legal for this syntax.
Action
Correct the source per the error message text.
E0005:
Missing field value operand
Missing operand(s)
Description These are errors about missing operands; a required operand is
not supplied.
Action
Correct the source so that all required operands are declared.
Assembler Error Messages
D-3
Assembler Error Messages
E0006:
.break must occur within a loop
Conditional assembly mismatch
Matching .endloop missing
Matching .macro missing
No matching .if specified
No matching .endif specified
No matching .endloop specified
No matching .loop specified
Open block(s) inside macro
Unmatched .endloop directive
Unmatched .if directive
Description These are errors about unmatched conditional assembly directives. A directive was encountered that requires a matching
directive but the assembler could not find the matching directive.
Action
Correct the source per the error message text.
E0007:
Conditional nesting is too deep
Loop count out of range
Description These are errors about conditional assembly loops. Conditional
block nesting cannot exceed 32 levels.
Action
Correct the .macro/.endmacro, .if/.elseif/.else/.endif or .loop/
.break/.endloop source.
E0008:
Matching .struct directive is not present
Description This is an error about unmatched structure definition directives.
In a .struct/.endstruct sequence, a directive was encountered
that requires a matching directive but the assembler could not
find the matching directive.
Action
Check the source for mismatched structure definition directives
and correct.
E0009:
Cannot apply bitwise NOT to floats
Illegal struct/union reference dot operator
Missing structure tag
Unary operator must be applied to a constant
Description These are errors about an illegally used operator. The operator
specified was not legal for the given operands.
Action
D-4
Correct the source per the error message text so that all required
operands are declared.
Assembler Error Messages
E0100:
Label missing
.setsym requires a label
Description These are errors about required labels. The given directive
requires a label, but none is specified.
Action
Correct the source by specifying the required label.
E0101:
Labels are not allowed with this directive
Standalone labels not permitted in structure/union defs
Description These are errors about invalid labels. The given directive does
not permit a label, but one is specified.
Description Remove the invalid label.
E0102:
Local label label number is multiply defined
Local label label number is not defined in this section
Local labels can’t be used with directives
Description These are errors about the illegal use of local labels.
Action
Correct the source per the error message text. Use .newblock to
reuse local labels.
E0200:
Binary operator can’t be applied
Difference between segment symbols not permitted
Division by zero is illegal
Expression must be absolute integer value
Offset expression must be integer value
Operation cannot be performed on given operands
Unary operator can’t be applied
Well–defined expression required
Description These are errors about general expressions. An illegal operand
combination was used, or an arithmetic type is required but not
present.
Action
Correct the source per the error message text.
Assembler Error Messages
D-5
Assembler Error Messages
E0201:
Absolute operands required for FP operations!
Cannot apply bitwise NOT to floats
Floating–point divide by zero
Floating–point overflow
Floating–point underflow
Floating–point expression required
llegal floating–point expression
Invalid floating–point operation
Description These are errors about floating-point expressions. A floating-point expression was used where an integer expression is
required, an integer expression was used where a floating-point
expression is required, or a floating-point value is invalid.
Action
Correct the source per the error message text.
E0300:
Cannot equate an external symbol to an external
Cannot redefine this section name
Cannot tag an undefined symbol
Empty structure or union definition
Illegal structure or union tag
Structure member previously defined
Structure tag can’t be global
Symbol can’t be defined in terms of itself
Symbol expected in label field
Symbol, sym, has already been defined
Symbol, sym, is not defined in this source file
Symbol, sym, is operand to both .ref and .def
Structure/union member, sym, not found
Description These are errors about general symbols. An attempt was made
to redefine a symbol or to define a symbol illegally.
Action
Correct the source per the error message text.
E0301:
Cannot redefine local substitution symbol
Substitution Stack Overflow
Substitution symbol not found
Description These are errors about general substitution symbols. An attempt
was made to redefine a symbol or to define a symbol illegally.
Action
D-6
Correct the source per the error message text. Make sure that
the operand of a substitution symbol is defined either as a macro
parameter or with a .asg or .eval directive.
Assembler Error Messages
E0400:
Symbol table entry is not balanced
Description A symbolic debugging directive does not have a complementing
directive (i.e., a .block without a .endblock).
Action
Check the source for mismatched conditional assembly directives.
E0500:
Macro argument string is too long
Missing macro name
Too many variables declared in macro
Description These are errors about general macros. A macro definition was
probably corrupted.
Action
Correct the source per the error message text.
E0501:
Macro definition not terminated with .endm
Matching .endm missing
Matching .macro missing
.mexit directive outside macro definition
No active macro definition
Description These are errors about macro definition directives. A macro
directive does not have a complementing directive (that is, a
.macro without a .endm).
Action
Correct the source per the error message text.
E0600:
Bad archive entry for macro name
Bad archive name
Can’t read a line from archive entry
library name macro library not found
library name is not in archive format
Description These are errors about macro library accessing. A problem was
encountered reading from or writing to a macro library archive
file. It is likely that the creation of the archive file was not done
properly.
Action
Make sure that the macro libraries are unassembled assembler
source files. Also make sure that the macro name and member
name are the same, and the extension of the file is .asm.
Assembler Error Messages
D-7
Assembler Error Messages
E0700:
Illegal structure/union member
No structure/union currently open
.sym not allowed inside structure/union
Description These are errors about the illegal use of symbolic debugging
directives; a symbolic debugging directive is not used in an
appropriate place.
Action
Correct the source per the error message text.
E0800:
Delayed branch – too many words in delay slot
Delayed branch – control flow in delay slot
Description These are errors about branch instructions. These errors are
normally target specific.
Action
Correct the source per the error message text.
E0801:
Instructions not permitted in structure/union definitions
Description An invalid instruction was encountered in a structure or union
definition.
Action
Correct the source by removing the invalid instruction(s).
E0802:
Expecting parallel instruction
Incorrect instruction used in parallel
Illegal form of LD used in parallel
Description These are errors about illegal used parallel instructions.
Action
Correct the source per the error message text.
E0900:
Can’t include a file inside a loop or macro
Illegal structure member
Illegal structure definition contents
Invalid load–time label
Invalid structure/union contents
.setsect only valid if absolute listing produced (use
–a option)
.setsym only valid if absolute listing produced (use
–a option)
.var allowed only within macro definitions
Description These are errors about illegally used directives. Specific directives were encountered where they are not permitted because
they will cause a corruption of the object file. Many directives are
not permitted inside of structure or union definitions.
Action
D-8
Correct the source per the error message text.
Assembler Error Messages
E1000:
Include/Copy file not found or opened
Description The specified filename cannot be found.
Action
Check spelling, pathname, environment variables, etc.
E1300:
Copy limit has been reached
Exceeded limit for macro arguments
Macro nesting limit exceeded
Description These errors are about general assembler limits that have been
exceeded. The nesting of .copy/.include files in limited to 10
levels. Macro arguments are limited to 32 parameter. Macro
nesting is limited to 32 levels.
Action
Check the source to determine how limits have been exceeded.
W0000:
No operands expected. Operands ignored
Trailing operands ignored
*+ARn addressing is for write-only
Description These are warnings about operands. The assembler encountered operands that it did not expect.
Action
Check the source to determine what caused the problem and
whether you need to correct the source.
W0001:
Field value truncated to value
Field width truncated to size in bits
Line too long, will be truncated
Power of 2 required, next larger power of 2 assumed
Section Name is limited to 8 characters
String is too long – will be truncated
Value truncated
Value truncated to byte size
Value out of range
Description These are warnings about truncated values. The expression
given was too large to fit within the instruction opcode or the
required number of bits.
Action
Check the source to make sure the result will be acceptable, or
change the source if an error has occurred.
Assembler Error Messages
D-9
Assembler Error Messages
W0002:
Address expression will wrap–around
Expression will overflow, value truncated
Description These are warnings about arithmetic expressions. The assembler has done a calculation that will produce the indicated result,
which may or may not be acceptable.
Action
Verify the result will be acceptable, or change the source if an
error has occurred.
W0003:
.sym for function name required before .func
Description This is a warning about problems with symbolic debugging
directives. A .sym directive defining the function does not appear
before the .func directive.
Action
D-10
Correct the source.
Linker Error Messages
Appendix
AppendixEA
Linker Error Messages
The linker issues three types of error messages:
Syntax and command errors
Allocation errors
I/O errors
This appendix lists the three types of linker error messages in alphabetical
order according to the error message. In these listings, the symbol (...) represents the name of an object that the linker is attempting to interact with when
an error occurs. Most error messages have a Description of the problem and
an Action that suggests possible remedies. Where the error message itself is
an adequate description, you may find only the Action suggested. Where the
Action is obvious from the description (to inspect and correct your code), the
Action is omitted.
A
absolute symbol (...) being redefined
Description An absolute symbol cannot be redefined.
Action
Check the syntax of all expressions, and check the input directives for accuracy.
adding name (...) to multiple output sections
Description The input section is mentioned twice in the SECTIONS directive.
ALIGN illegal in this context
Description Alignment of a symbol is performed outside of a SECTIONS
directive.
alignment for (...) must be a power of 2
Description Section alignment was not a power of 2.
Action
Make sure that in hexadecimal, all powers of 2 consist of the integers 1, 2, 4, or 8 followed by a series of zero or more 0s.
Linker Error Messages
E-1
Linker Error Messages
alignment for (...) redefined
Description More than one alignment is supplied for a section.
attempt to decrement DOT
Description A statement such as .– = value is supplied; this is illegal. Assignments to dot can be used only to create holes.
B
bad fill value
Description The fill value must be a 16-bit constant.
binding address (...) for section (...) is outside all memory on page (...)
Description Not every section falls within memory configured with the
MEMORY directive.
Action
If you are using a linker command file, check that MEMORY and
SECTIONS directives allow enough room to ensure that no sections are being placed in unconfigured memory.
binding address (...) for section (...) overlays (...) at (...)
Description Two sections overlap and cannot be allocated.
Action
If you are using a linker command file, check that MEMORY and
SECTIONS directives allow enough room to ensure that no sections are being placed in unconfigured memory.
binding address for (...) redefined
Description More than one binding value is supplied for a section.
binding address (...) incompatible with alignment for section (...)
Description The section has an alignment requirement from an .align
directive or previous link. The binding address violates this
requirement.
blocking for (...) must be a power of 2
Description Section blocking is not a power of 2
Action
Make sure that in hexadecimal, all powers of 2 consist of the integers 1, 2, 4, or 8 followed by a series of zero or more 0s.
blocking for (...) redefined
Description More than one blocking value is supplied for a section.
E-2
Linker Error Messages
C
–c requires fill value of 0 in .cinit (... overridden)
Description The .cinit tables must be terminated with 0, therefore, the fill
value of the .cinit section must be 0.
cannot complete output file (...), write error
Description This usually means that the file system is out of space.
cannot create output file (...)
Description This usually indicates an illegal filename.
Action
Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions.
cannot resize (...), section has initialized definition in (...)
Description An initialized input section named .stack or .heap exists, preventing the linker from resizing the section.
cannot specify a page for a section within a GROUP
Description A section was specified to a specific page within a group. The
entire group is treated as one unit, so the group may be specified
to a page of memory, but the sections making up the group
cannot be handled individually.
cannot specify both binding and memory area for (...)
Description Both binding and memory were specified. The two are mutually
exclusive.
Action
If you wish the code to be placed at a specific address, use binding only.
can’t align a section within GROUP – (...) not aligned
Description A section in a group was specified for individual alignment. The
entire group is treated as one unit, so the group may be aligned
or bound to an address, but the sections making up the group
cannot be handled individually.
can’t align within UNION – section (...) not aligned
Description A section in a union was specified for individual alignment. The
entire union is treated as one unit, so the union may be aligned or
bound to an address, but the sections making up the union
cannot be handled individually.
Linker Error Messages
E-3
Linker Error Messages
can’t allocate (...), size ... (page ...)
Description A section can’t be allocated, because no existing configured
memory area is large enough to hold it.
Action
If you are using a linker command file, check that the MEMORY
and SECTIONS directives allow enough room to ensure that no
sections are being placed in unconfigured memory.
can’t create map file (...)
Description Usually indicates an illegal filename.
Action
Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions.
can’t find input file filename
Description The file, filename, is not in your PATH, is misspelled, etc.
Action
Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions.
can’t open (...)
Description The specified file does not exist.
Action
Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions.
can’t open filename
Description The specified file does not exist.
Action
Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions.
can’t read (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
can’t seek (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
can’t write (...)
Description Disk may be full or protected.
Action
Check disk volume and protection.
command file nesting exceeded with file (...)
Description Command file nesting is allowed up to 16 levels.
E-4
Linker Error Messages
E
–e flag does not specify a legal symbol name (...)
Description The –e option is not supplied with a valid symbol name as an
operand.
entry point other than _c_int00 specified
Description For –c or –cr option only. A program entry point other than the
value of _c_int00 was supplied. The runtime conventions of the
compiler assume that _c_int00 is the one and only entry point.
entry point symbol (...) undefined
Description The symbol used with the –e option is not defined.
errors in input – (...) not built
Description Previous errors prevent the creation of an output file.
F
fail to copy (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to read (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to seek (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to skip (...)
Description The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to write (...)
Description The disk may be full or protected.
Action
Check disk volume and protection.
Linker Error Messages
E-5
Linker Error Messages
file (...) has no relocation information
Description You have attempted to relink a file that was not linked with –r.
file (...) is of unknown type, magic number = (...)
Description The binary input file is not a COFF file.
fill value for (...) redefined
Description More than one fill value is supplied for an output section. Individual holes can be filled with different values with the section
definition.
I
–i path too long (...)
Description The maximum number of characters in an –i path is 256.
illegal input character
Description There is a control character or other unrecognized character in
the command file.
illegal memory attributes for (...)
Description The attributes are not some combination of R, W, I, and X.
illegal operator in expression
Description Review legal expression operators.
illegal option within SECTIONS
Description The –l (lowercase L) option is the only option allowed within a
SECTIONS directive.
illegal relocation type (...) found in section(s) of file (...)
Description The binary file is corrupt.
internal error (...)
Description This linker has an internal error.
invalid archive size for file (...)
Description The archive file is corrupt.
invalid path specified with –i flag
Description The operand of the –i option (flag) is not a valid file or pathname.
E-6
Linker Error Messages
invalid value for –f flag
Description The value for –f option (flag) is not a 2-byte constant.
invalid value for –heap flag
Description The value for –heap option (flag) is not a 2-byte constant.
invalid value for –stack flag
Description The value for –stack option (flag) is not a 2-byte constant.
invalid value for –v flag
Description The value for –v option (flag) is not a constant.
I/O error on output file (...)
Description The disk may be full or protected.
Action
Check disk volume and protection.
L
length redefined for memory area (...)
Description A memory area in a MEMORY directive has more than one
length.
library (...) member (...) has no relocation information
Description The library member has no relocation information. It is possible
for a library member to not have relocation information; this
means that it cannot satisfy unresolved references in other files
when linking.
line number entry found for absolute symbol
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
load address for uninitialized section (...) ignored
Description A load address is supplied for an uninitialized section. Uninitialized sections have no load addresses—only run addresses.
load address for UNION ignored
Description UNION refers only to the section’s run address.
load allocation required for initialized UNION member (...)
Description A load address is supplied for an initialized section in a union.
UNIONs refer to runtime allocation only. You must specify the
load address for all sections within a union separately.
Linker Error Messages
E-7
Linker Error Messages
M
–m flag does not specify a valid filename
Description You did not specify a valid filename for the file you are writing the
output map file to.
making aux entry filename for symbol n out of sequence
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
memory area for (...) redefined
Description More than one named memory allocation is supplied for an output section.
memory page for (...) redefined
Description More than one page allocation is supplied for a section.
memory attributes redefined for (...)
Description More than one set of memory attributes is supplied for an output
section.
memory types (...) and (...) on page (...) overlap
Description Memory ranges on the same page overlap.
Action
If you are using a linker command file, check that MEMORY and
SECTIONS directives allow enough room to ensure that no sections are being placed in unconfigured memory.
missing filename on –l; use –l <filename>
Description No filename operand is supplied for the –l (lowercase L) option.
misuse of DOT symbol in assignment instruction
Description The ”.” symbol is used in an assignment statement that is outside
the SECTIONS directive.
N
no allocation allowed for uninitialized UNION member
Description A load address was supplied for an uninitialized section in a
union. An uninitialized section in a union gets its run address
from the UNION statement and has no load address, so no load
allocation is valid for the member.
E-8
Linker Error Messages
no allocation allowed with a GROUP–allocation for section (...) ignored
Description A section in a group was specified for individual allocation. The
entire group is treated as one unit, so the group may be aligned
or bound to an address, but the sections making up the group
cannot be handled individually.
no input files
Description No COFF files were supplied. The linker cannot operate without
at least one input COFF file.
no load address specified for (...); using run address
Description No load address is supplied for an initialized section. If an initialized section has a run address only, the section is allocated to
run and load at the same address.
no run allocation allowed for union member (...)
Description A UNION defines the run address for all of its members; therefore, individual run allocations are illegal.
no string table in file filename
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
no symbol map produced – not enough memory
Description Available memory is insufficient to produce the symbol list. This
is a nonfatal condition that prevents the generation of the symbol
list in the map file.
O
–o flag does not specify a valid file name : string
Description The filename must follow the operating system file naming
conventions.
origin missing for memory area (...)
Description An origin is not specified with the MEMORY directive. An origin
specifies the starting address of a memory range.
out of memory, aborting
Description Your system does not have enough memory to perform all
required tasks.
Action
Try breaking the assembly language files into multiple smaller
files and do partial linking. See Section 8.16 on page 8-56.
Linker Error Messages
E-9
Linker Error Messages
output file has no .bss section
Description This is a warning. The .bss section is usually present in a COFF
file. There is no real requirement for it to be present.
output file has no .data section
Description This is a warning. The .data section is usually present in a COFF
file. There is no real requirement for it to be present.
output file has no .text section
Description This is a warning. The .text section is usually present in a COFF
file. There is no real requirement for it to be present.
output file (...) not executable
Description The output file created may have unresolved symbols or other
problems stemming from other errors. This condition is not fatal.
overwriting aux entry filename of symbol n
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
P
PC-relative displacement overflow at address (...) in file (...)
Description The relocation of a PC-relative jump resulted in a jump displacement too large to encode in the instruction.
R
–r incompatible with –s (–s ignored)
Description Both the –r option and the –s option were used. Since the –s
option strips the relocation information and –r requests a relocatable object file, these options are in conflict with each other.
relocation entries out of order in section (...) of file (...)
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
relocation symbol not found: index (...), section (...), file (...)
Description The input file may be corrupt.
Action
E-10
If the input file is corrupt, try reassembling it.
Linker Error Messages
S
section (...) at (...) overlays at address (...)
Description Two sections overlap and cannot be allocated.
Action
If you are using a linker command file, check that MEMORY and
SECTIONS directives allow enough room to ensure that no sections overlap.
section (...) enters unconfigured memory at address (...)
Description A section can’t be allocated because no existing configured
memory area is large enough to hold it.
Action
If you are using a linker command file, check that MEMORY and
SECTIONS directives allow enough room to ensure that no sections are being placed in unconfigured memory.
section (...) not built
Description Most likely there is a syntax error in the SECTIONS directive.
section (...) not found
Description An input section specified in a SECTIONS directive was not
found in the input file.
section (...) won’t fit into configured memory
Description A section can’t be allocated, because no configured memory
area exists that is large enough to hold it.
Action
If you are using a linker command file, check that the MEMORY
and SECTIONS directives allow enough room to ensure that no
sections are being placed in unconfigured memory.
seek to (...) failed
Description The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
semicolon required after assignment
Description There is a syntax error in the command file.
statement ignored
Description There is a syntax error in an expression.
symbol referencing errors — (...) not built
Description Symbol references could not be resolved. Therefore, an object
module could not be built.
Linker Error Messages
E-11
Linker Error Messages
symbol (...) from file (...) being redefined
Description A defined symbol is redefined in an assignment statement.
T
too few symbol names in string table for archive n
Description The archive file may be corrupt.
Action
If the input file is corrupt, try recreating the archive.
too many arguments – use a command file
Description You used more than ten arguments on a command line or in
response to prompts.
too many –i options, 7 allowed
Action
More than seven –i options were used. Additional search directories can be specified with a C_DIR or A_DIR environment variable.
type flags for (...) redefined
Description More than one section type is supplied for a section. Note that
type COPY has all of the attributes of type DSECT, so DSECT
need not be specified separately.
type flags not allowed for GROUP or UNION
Description A type is specified for a section in a group or union. Special section types apply to individual sections only.
U
–u does not specify a legal symbol name
Description The –u option did not specify a legal symbol name that exists in
one of the files that you are linking.
unexpected EOF(end of file)
Description There is a syntax error in the linker command file.
undefined symbol (...) first referenced in file (...)
Description Either a referenced symbol is not defined, or the –r option was
not used. Unless the –r option is used, the linker requires that all
referenced symbols be defined. This condition prevents the creation of an executable output file.
Action
E-12
Link using the –r option or define the symbol.
Linker Error Messages
undefined symbol in expression
Description An assignment statement contains an undefined symbol.
unrecognized option (...)
Action
Check the list of valid options.
Z
zero or missing length for memory area (...)
Description A memory range defined with the MEMORY directive did not
have a nonzero length.
Linker Error Messages
E-13
Running Title—Attribute Reference
Appendix
AppendixFA
Glossary
A
absolute address: An address that is permanently assigned to a
TMS320C54x memory location.
absolute lister: A debugging tool that accepts linked files as input and
creates .abs files as output. These .abs files can be assembled to produce a listing that shows the absolute addresses of object code. Without
the tool, an absolute listing can be prepared with the use of many manual
operations.
alignment: A process in which the linker places an output section at an
address that falls on an n-bit boundary, where n is a power of 2. You can
specify alignment with the SECTIONS linker directive.
allocation: A process in which the linker calculates the final memory
addresses of output sections.
archive library: A collection of individual files that have been grouped into
a single file.
archiver: A software program that allows you to collect several individual
files into a single file called an archive library. The archiver also allows
you to delete, extract, or replace members of the archive library, as well
as to add new members.
ASCII: American Standard Code for Information Exchange. A standard
computer code for representing and exchanging alphanumeric information.
assembler: A software program that creates a machine-language program
from a source file that contains assembly language instructions, directives, and macro directives. The assembler substitutes absolute operation codes for symbolic operation codes, and absolute or relocatable
addresses for symbolic addresses.
assembly-time constant: A symbol that is assigned a constant value with
the .set directive.
Chapter Title—Attribute Reference
F-1
Glossary
assignment statement: A statement that assigns a value to a variable.
autoinitialization: The process of initializing global C variables (contained
in the .cinit section) before beginning program execution.
auxiliary entry: The extra entry that a symbol may have in the symbol table
and that contains additional information about the symbol (whether it is
a filename, a section name, a function name, etc.).
B
binding: A process in which you specify a distinct address for an output section or a symbol.
block: A set of declarations and statements that are grouped together with
braces.
.bss:
One of the default COFF sections. You can use the .bss directive to
reserve a specified amount of space in the memory map that can later
be used for storing data. The .bss section is uninitialized.
C
C compiler: A program that translates C source statements into assembly
language source statements.
command file: A file that contains linker options and names input files for
the linker.
comment: A source statement (or portion of a source statement) that is
used to document or improve readability of a source file. Comments are
not compiled, assembled, or linked; they have no effect on the object file.
common object file format (COFF): A binary object file format that promotes modular programming by supporting the concept of sections.
conditional processing: A method of processing one block of source code
or an alternate block of source code, according to the evaluation of a
specified expression.
configured memory: Memory that the linker has specified for allocation.
constant:
A numeric value that can be used as an operand.
cross-reference listing: An output file created by the assembler that lists
the symbols that were defined, what line they were defined on, which
lines referenced them, and their final values.
F-2
Glossary
D
.data: One of the default COFF sections. The .data section is an initialized
section that contains initialized data. You can use the .data directive to
assemble code into the .data section.
directives: Special-purpose commands that control the actions and
functions of a software tool (as opposed to assembly language instructions, which control the actions of a device).
E
emulator: A hardware development system that emulates TMS320C54x
operation.
entry point: The starting execution point in target memory.
executable module: An object file that has been linked and can be
executed in a TMS320C54x system.
expression: A constant, a symbol, or a series of constants and symbols
separated by arithmetic operators.
external symbol: A symbol that is used in the current program module but
is defined in a different program module.
F
field:
For the TMS320C54x, a software-configurable data type whose length
can be programmed to be any value in the range of 1–16 bits.
file header: A portion of a COFF object file that contains general information
about the object file (such as the number of section headers, the type of
system the object file can be downloaded to, the number of symbols in
the symbol table, and the symbol table’s starting address).
G
global: A kind of symbol that is either 1) defined in the current module and
accessed in another, or 2) accessed in the current module but defined
in another.
GROUP: An option of the SECTIONS directive that forces specified output
sections to be allocated contiguously (as a group).
Glossary
F-3
Glossary
H
hex conversion utility: A program which accepts COFF files and converts
them into one of several standard ASCII hexadecimal formats suitable
for loading into an EPROm programmer.
high-level language debugging: The ability of a compiler to retain symbolic and high-level language information (such as type and function
definitions) so that a debugging tool can use this information.
hole:
An area between the input sections that compose an output section
that contains no actual code or data.
I
incremental linking: Linking files that will be linked in several passes. Often
this means a very large file that will have sections linked and then will
have the sections linked together.
initialized section: A COFF section that contains executable code or initialized data. An initialized section can be built up with the .data, .text, or
.sect directive.
input section: A section from an object file that will be linked into an
executable module.
L
label: A symbol that begins in column 1 of a source statement and corresponds to the address of that statement.
line-number entry: An entry in a COFF output module that maps lines of
assembly code back to the original C source file that created them.
linker: A software tool that combines object files to form an object module
that can be allocated into TMS320C54x system memory and executed
by the device.
listing file: An output file, created by the assembler, that lists source statements, their line numbers, and their effects on the SPC.
loader: A device that loads an executable module into TMS320C54x system
memory.
F-4
Glossary
M
member: The elements or variables of a structure, union, archive, or enumeration.
macro: A user-defined routine that can be used as an instruction.
macro call: The process of invoking a macro.
macro definition: A block of source statements that define the name and
the code that make up a macro.
macro expansion: The source statements that are substituted for the
macro call and are subsequently assembled.
macro library: An archive library composed of macros. Each file in the
library must contain one macro; its name must be the same as the macro
name it defines, and it must have an extension of .asm.
magic number: A COFF file header entry that identifies an object file as a
module that can be executed by the TMS320C54x.
map file: An output file, created by the linker, that shows the memory
configuration, section composition, and section allocation, as well as
symbols and the addresses at which they were defined.
memory map: A map of target system memory space, which is partitioned
into functional blocks.
mnemonic: An instruction name that the assembler translates into machine
code.
model statement: Instructions or assembler directives in a macro definition
that are assembled each time a macro is invoked.
N
named section: An initialized section that is defined with a .sect directive.
O
object file: A file that has been assembled or linked and contains machinelanguage object code.
object format converter: A program that converts COFF object files into
Intel format or Tektronix format object files.
Glossary
F-5
Glossary
object library: An archive library made up of individual object files.
operands: The arguments, or parameters, of an assembly language
instruction, assembler directive, or macro directive.
optional header: A portion of a COFF object file that the linker uses to
perform relocation at download time.
options: Command parameters that allow you to request additional or
specific functions when you invoke a software tool.
output module: A linked, executable object file that can be downloaded and
executed on a target system.
output section: A final, allocated section in a linked, executable module.
overlay page: A section of physical memory that is mapped into the same
address range as another section of memory. A hardware switch determines which range is active.
P
partial linking: The linking of a file that will be linked again.
Q
quiet run: Suppresses the normal banner and the progress information.
R
RAM model: An autoinitialization model used by the linker when linking C
code. The linker uses this model when you invoke the linker with the –cr
option. The RAM model allows variables to be initialized at load time
instead of runtime.
raw data: Executable code or initialized data in an output section.
relocation: A process in which the linker adjusts all the references to a symbol when the symbol’s address changes.
ROM model: An autoinitialization model used by the linker when linking C
code. The linker uses this model when you invoke the linker with the –c
option. In the ROM model, the linker loads the .cinit section of data tables
into memory, and variables are initialized at runtime.
F-6
Glossary
ROM width: The width (in bits) of each output file, or , more specifically, the
width of a single data value in the file. The ROM width determines how
the utility partitions the data into output files. After the target words are
mapped to memory words, the memory words are broken into one or
more output files. The number of output files is determined by the ROM
width.
run address: The address where a section runs.
S
section: A relocatable block of code or data that will ultimately occupy contiguous space in the TMS320C54x memory map.
section header: A portion of a COFF object file that contains information
about a section in the file. Each section has its own header; the header
points to the section’s starting address, contains the section’s size, etc.
section program counter:
sign-extend:
See SPC.
To fill the unused MSBs of a value with the value’s sign bit.
simulator: A software development system that simulates TMS320C54x
operation.
source file: A file that contains C code or assembly language code that will
be compiled or assembled to form an object file.
SPC (Section Program counter): An element of the assembler that keeps
track of the current location within a section; each section has its own
SPC.
static: A kind of variable whose scope is confined to a function or a program.
The values of static variables are not discarded when the function or program is exited; their previous value is resumed when the function or program is re-entered.
storage class: Any entry in the symbol table that indicates how a symbol
should be accessed.
string table: A table that stores symbol names that are longer than 8 characters (symbol names of 8 characters or longer cannot be stored in the
symbol table; instead, they are stored in the string table). The name portion of the symbol’s entry points to the location of the string in the string
table.
structure: A collection of one or more variables grouped together under a
single name.
Glossary
F-7
Glossary
symbol: A string of alphanumeric characters that represents an address or
a value.
symbolic debugging: The ability of a software tool to retain symbolic information so that it can be used by a debugging tool such as a simulator or
an emulator.
symbol table: A portion of a COFF object file that contains information
about the symbols that are defined and used by the file.
T
tag:
An optional type name that can be assigned to a structure, union, or
enumeration.
target memory: Physical memory in a TMS320C54x system into which executable object code is loaded.
.text:
One of the default COFF sections. The .text section is an initialized
section that contains executable code. You can use the .text directive to
assemble code into the .text section.
U
unconfigured memory: Memory that is not defined as part of the memory
map and cannot be loaded with code or data.
uninitialized section: A COFF section that reserves space in the memory
map but that has no actual contents. These sections are built up with the
.bss and .usect directives.
UNION: An option of the SECTIONS directive that causes the linker to allocate the same address to multiple sections.
union:
A variable that may hold objects of different types and sizes.
unsigned: A kind of value that is treated as a positive number, regardless
of its actual sign.
W
well-defined expression: An expression that contains only symbols or
assembly-time constants that have been defined before they appear in
the expression.
word: A 16-bit addressable location in target memory.
F-8
Running Title—Attribute Reference
TOKEN
REFERENCE
SEE (ALSO) . . .
A_DIR
environment variables
abs500 command
absolute lister, invoking
ar500 command
archiver, invoking
asm500 command
assembler, invoking
assembler, directives
directives, assembler
boot loader
on-chip boot loader
boot table
on-chip boot loader, boot table
C_DIR
environment variables
_c_int00
entry points
COFF, conversion to hexadecimal format
hex conversion utility
COFF, named sections
COFF, sections, named
common object file format
COFF
debugging
symbolic debugging
default, section
COFF, sections
defining macros
macros
directives, assembler, that format output
assembler output
directives, assembler, that format output
assembler, output listing
filenames
hex conversion utility, output filenames
fill value
holes
hex500 command
hex conversion utility, invoking
hex conversion util’, on-chip boot loader
on-chip boot loader
hex conversion utility, options
on-chip boot loader, options
image mode
hcu image mode
installation instructions
TMS320C54x CGT GS
lnk500 command
linker, invoking
macros, parameters
substitution symbols
_main
entry points
named sections
COFF, sections, named
object formats
COFF
options, absolute lister
absolute lister, options
options, archiver
archiver
Chapter Title—Attribute Reference
11-9
Running Title—Attribute Reference
TOKEN
11-10
REFERENCE
SEE (ALSO) . . .
options, assembler
assembler
options, cross–reference lister
cross-reference lister
options, hex conversion utility, summary
table
hex conversion utility
options, linker
linker
output, filenames
hex conversion utility, output filenames
output, listing
listing
path
alternate directories
path
environment variables
program counters
SPC
ROMS hex conversion utility directive
hex conversion utility, ROMS directive
section directives
directives, assembler
section program counters
SPC
sections
COFF, sections
SECTIONS hex conversion utility
directive
hex conversion utility, SECTIONS
directive
software installation
TMS320C54x CGT GS
widths
memory widths
Index
Index
; in assembly language source 3-11
# operand prefix 3-10
$ symbol for SPC 3-16
* in assembly language source 3-11
* operand prefix 3-11
A
–a archiver command 7-4
–a assembler option 3-4
–a hex conversion utility option 11-4, 11-37
–a linker option 8-7
A_DIR environment variable 3-7, 8-11, 8-12
See also environment variables
abs500 command. See absolute lister, invoking
absolute lister 1-3, 9-1 to 9-8
creating the absolute listing file 3-4, 9-2
definition F-1
development flow 9-2
example 9-5 to 9-8
invoking 9-3
options
–e 9-3
–q 9-3
absolute listing
–a assembler option 3-4
producing 9-2
absolute output module 8-7
relocatable 8-8
acronyms and symbols 5-2
.align assembler directive 4-15, 4-25
compatibility with C1x/C2x/C2xx/C5x 4-7
alignment 4-15 to 4-16, 4-25, 8-30
definition F-1
allocation 2-2, 4-28, 8-27 to 8-32
alignment 4-25, 8-30
binding 8-29
allocation (continued)
blocking 8-30
default algorithm 8-45 to 8-46
definition F-1
GROUP 8-39
memory
default 2-11, 8-29
UNION 8-37
alternate directories 3-6 to 3-8, 8-11
naming with –i option 3-6
naming with A_DIR 3-7
–ar linker option
8-8
ar500 command 7-4
See also archiver, invoking
archive libraries 4-57, 8-11, 8-15, 8-19 to 8-20
back referencing 8-15
definition F-1
types of files 7-2
archiver 1-3, 7-1 to 7-8
commands 7-4
–a 7-4
–d 7-4
–r 7-4
–t 7-4
–x 7-5
definition F-1
examples 7-6
in the development flow
invoking 7-4
options
–e 7-5
–q 7-5
–s 7-5
–v 7-5
arithmetic operators
array definitions
7-3
3-19
A-26
ASCII-Hex object format
11-1, 11-37
Index-1
Index
.asg assembler directive 4-21, 4-26
listing control 4-17, 4-36
use in macros 6-6
asm500 command 3-4
See also assembler, invoking
assembler 1-3, 3-1 to 3-26
character strings 3-14
constants 3-12 to 3-13
cross-reference listings 3-5, 3-26
definition F-1
development flow 3-3
directives. See directives, assembler
error messages D-1 to D-10
expressions 3-19, 3-20
handling COFF sections 2-4 to 2-9
invoking 3-4
macros 6-1 to 6-24
options
–a 3-4
–c 3-4
–d 3-4, 3-16
–i 3-5, 3-6
–l 3-5, 3-23
–q 3-5
–s 3-5
–x 3-5, 3-26
output listing 4-17 to 4-18
directive listing 4-17, 4-36
enable 4-17, 4-53
false conditional block listing 4-17, 4-40
list options 4-17, 4-64
macro listing 4-57, 4-59
page eject 4-17, 4-66
page length 4-17, 4-52
page width 4-18, 4-52
substitution symbol listing 4-71
suppress 4-17, 4-53
tab size 4-18, 4-76
title 4-18, 4-78
overview 3-2
relocation 2-13 to 2-14, 8-7
at runtime 2-15
sections directives 2-4 to 2-9
source listings 3-23 to 3-25
source statement format 3-9 to 3-11
symbols 3-15, 3-17
assembler output
3-25
assembly language development flow
7-3, 8-3
Index-2
1-2, 3-3,
assembly-time constants 3-13, 4-69
definition F-1
assigning a value to a symbol 4-69
assignment expressions 8-49 to 8-50
attr MEMORY specification 8-23
attributes 3-26, 8-23
autoinitialization 8-9, 8-59 to 8-60
definition F-2
RAM model 8-9, 8-59
ROM model 8-9, 8-60
auxiliary entries A-23 to A-28
auxilliary entries
definition F-2
B
–b linker option 8-8
.bes assembler directive 4-11, 4-70
big-endian ordering 11-12
binary integer constants 3-12
binding 8-29
definition F-2
block definitions A-17, A-26, A-27, B-2
.block symbolic debugging directive B-2
blocking 4-28, 8-30
–boot hex conversion utility option 11-27
boot loader. See on-chip boot loader
boot table. See on-chip boot loader, boot table
boot.obj 8-58, 8-61
–bootorg hex conversion utility option 11-27, 11-28
–bootpage hex conversion utility option 11-27
.break assembler directive 4-20, 4-56
listing control 4-17, 4-36
use in macros 6-14
.bss
assembler directive 2-4, 4-9, 4-28
compatibility with C1x/C2x/C2xx/C5x 4-7
linker definition 8-51
definition F-2
holes 8-54
initializing 8-54
section 4-9, 4-28, A-3
.byte assembler directive 4-11, 4-31
limiting listing with the .option directive 4-17,
4-64
–byte hex conversion utility option 11-4
Index
C
–c assembler option
3-4
C code
linking 8-58 to 8-61
C compiler 8-9, 8-58 to 8-61, A-1, B-1
block definitions B-2
definition F-2
enumeration definitions B-8
file identification B-3
function definitions B-4
line-number entries B-6
line-number information A-12 to A-13
member definitions B-7
special symbols A-16 to A-17
storage classes A-19
structure definitions B-8
symbol table entries B-10
union definitions B-8
–c linker option
8-9, 8-51
C memory pool
8-10, 8-59
C system stack
8-14, 8-59
C_DIR environment variable 8-11, 8-12
See also environment variables
_c_int00 8-9, 8-61
See also entry points
character constants
character strings
3-13
3-14
.cinit section
8-59 to 8-60
cinit symbol
8-59 to 8-60
.cinit tables
8-59
COFF 2-1 to 2-18, 8-1, A-1 to A-28
auxiliary entries A-23 to A-28
conversion to hexadecimal format 11-1 to 11-42
See also hex conversion utility
default allocation 8-45
file headers A-4 to A-5
file in development flow 8-3, 11-2
file structure A-2 to A-3
initialized sections 2-5 to 2-6
line number entries B-6
loading a program 2-16
named sections. See COFF, sections, named
object file example A-3
optional file header A-6
relocation 2-13 to 2-14
COFF (continued)
relocation information A-10 to A-11
relocation type A-11
symbol table index A-10
virtual address A-10
runtime relocation 2-15
section headers A-7 to A-9
sections 2-2 to 2-3
allocation 2-2
assembler 2-4 to 2-9
initialized 2-5 to 2-6
linker 2-10 to 2-12
named 2-6, 8-52
special types 8-47
uninitialized 2-4 to 2-5
special symbols A-16 to A-17
storage classes A-19
string table A-18
symbol table A-14 to A-28
symbol values A-20
symbolic debugging A-12 to A-13
symbols 2-17 to 2-18
type entry A-21
uninitialized sections 2-4 to 2-5
command files 11-5 to 11-6
definition F-2
invoking 11-5
hex conversion utility 11-3
linker 8-4, 8-16 to 8-18
constants in 8-18
example 8-62, 8-63
reserved words 8-18
ROMS directive 11-5
SECTIONS directive 11-5
comment field
3-11
comments
definition F-2
in a linker command file 8-16
in assembly language source code
in macros 6-17
that extend past page width 4-52
3-11
common object file format
See also COFF
definition F-2
conditional
assembly directives 4-20, 4-48
in macros 6-14 to 6-15
maximum nesting levels 6-14
Index-3
Index
.data
assembler directive 2-4, 4-9, 4-35
linker definition 8-51
definition F-3
section 4-9, 4-35, A-3
conditional (continued)
blocks 4-48, 6-14
listing 4-40
expressions 3-21
procession
definition F-2
configured memory
definition F-2
data memory
8-46
constants 3-12 to 3-13, 3-15
assembly-time 3-13, 4-69
binary integers 3-12
character 3-13
decimal integers 3-12
definition F-2
floating-point 4-44
hexadecimal integers 3-13
in command files 8-18
octal integers 3-12
symbolic 3-16
$ 3-16
.mmregs defined symbols
register symbols 3-16
symbols as 3-15
.copy assembler directive
copy files
debugging
See also symbolic debugging
producing error messages in macros
decimal integer constants
–cr linker option
creating holes
3-16
8-9, 8-51
cross-reference listings 3-5, 3-26
definition F-2
producing with the .option directive
cross-reference lister 10-1 to 10-6
creating the cross-reference listing
development flow 10-2
example 10-4
invoking 10-3
options
–l 10-3
–q 10-3
symbol attributes 10-5
xref500 command 10-3
Index-4
7-4
3-4, 3-16
1-2
directives
assembler 4-1 to 4-24
absolute lister
8-52 to 8-54
–d assembler option
defining macros 6-3 to 6-4
See also macros
development tools overview
8-47
–d archiver command
3-12
default
allocation 8-45
fill value for holes 8-9
memory allocation 2-11
MEMORY configuration 8-45
MEMORY model 8-21
section. See COFF, section
SECTIONS configuration 8-25, 8-45
3-6, 4-19, 4-32
D
6-17
.def assembler directive 4-19, 4-45
identifying external symbols 2-17
3-6, 4-32
COPY section
8-21
.setsect 9-7
.setsym 9-7
4-17, 4-64
10-2
assembly-time constants 4-69
assembly-time symbols 4-21 to 4-22
.asg 4-21, 4-26
.endstruct 4-22, 4-73
.equ 4-21, 4-69
.eval 4-21, 4-26
.label 4-21, 4-51
.set 4-21, 4-69
.struct 4-22, 4-73
.tag 4-22, 4-73
compatibility with C1x/C2x/C2xx/C5x 4-7
conditional assembly 4-20
.break 4-20, 4-56
.else 4-20, 4-48
.elseif 4-20, 4-48
.endif 4-20, 4-48
.endloop 4-20, 4-56
.if 4-20, 4-48
.loop 4-20, 4-56
default directive 2-4
example 2-7 to 2-9
Index
directives, assembler (continued)
miscellaneous 4-23
.emsg 4-23, 4-37
.end 4-23, 4-39
.mmregs 4-23, 4-60
.mmsg 4-23, 4-37
.newblock 4-23, 4-63
.sblock 4-23, 4-67
.wmsg 4-23, 4-37
summary table 4-2 to 4-6
that align the section program counter (SPC)
.align 4-15, 4-25
that define sections 4-9 to 4-10
.bss 2-4, 4-9, 4-28
.data 2-4, 4-9, 4-35
.sect 2-4, 4-9, 4-68
.text 2-4, 4-9, 4-77
.usect 2-4, 4-9, 4-79
that format the output listing 4-17 to 4-18
See also assembler output; assembler, output
listing
.drlist 4-17, 4-36
.drnolist 4-17, 4-36
.fclist 4-17, 4-40
.fcnolist 4-17, 4-40
.length 4-17, 4-52
.list 4-17, 4-53
.mlist 4-17, 4-59
.mnolist 4-17, 4-59
.nolist 4-17, 4-53
.option 4-17, 4-64
.page 4-17, 4-66
.sslist 4-18, 4-71
.ssnolist 4-18, 4-71
.tab 4-18, 4-76
.title 4-18, 4-78
.width 4-18, 4-52
that initialize constants 4-11 to 4-14
.bes 4-11, 4-70
.byte 4-11, 4-31
.field 4-12, 4-41
.float 4-12, 4-44
.int 4-13, 4-50
.long 4-13, 4-55
.pstring 4-13, 4-72
.space 4-11, 4-70
.string 4-13, 4-72
.word 4-13, 4-50
.xfloat 4-12, 4-44
.xlong 4-13, 4-55
that reference other files 4-19
.copy 4-19, 4-32
.def 4-19, 4-45
.global 4-19, 4-45
.include 4-19, 4-32
directives, assembler, that reference other files
(continued)
.mlib 4-19, 4-57
.ref 4-19, 4-45
definition F-3
linker
MEMORY 2-10, 8-21 to 8-24
SECTIONS 2-10, 8-25 to 8-32
symbolic debugging directives B-1
.block/.endblock B-2
.etag/.eos B-8
.file B-3
.func/.endfunc B-4
.line B-6
.member B-7
.stag/.eos B-8
.sym B-10
.utag/.eos B-8
directory search algorithm
assembler 3-6
linker 8-11
.drlist assembler directive 4-17, 4-36
use in macros 6-19
.drnolist assembler directive 4-17, 4-36
use in macros 6-19
DSECT section 8-47
dummy section 8-47
E
–e absolute lister option 9-3
–e archiver option 7-5
–e hex conversion utility option 11-29
.edata linker symbol 8-51
.else assembler directive 4-20, 4-48
use in macros 6-14
.elseif assembler directive 4-20, 4-48
use in macros 6-14
.emsg assembler directive 4-23, 4-37
listing control 4-17, 4-36
.emsg macro directive 6-17
.end assembler directive 4-23, 4-39
.end linker symbol 8-51
.endblock symbolic debugging directive B-2
.endfunc symbolic debugging directive B-4
.endif assembler directive 4-20, 4-48
use in macros 6-14
.endloop assembler directive 4-56
use in macros 6-14
Index-5
Index
.endm macro directive 6-3
.endstruct assembler directive 4-22, 4-73
entry points 8-9
_c_int00 8-9, 8-61
default value 8-9
definition F-3
for C code 8-61
for the linker 8-9
_main 8-9
enumeration definitions B-8
environment variables
A_DIR 3-7, 8-11
C_DIR 8-11, 8-12
.eos symbolic debugging directive B-8
.equ assembler directive 4-21, 4-69
error messages
assembler D-1 to D-10
generating 4-23
hex conversion utility 11-42
linker E-1 to E-14
producing in macros 6-17
.etag symbolic debugging directive B-8
.etext linker symbol 8-51
.eval assembler directive 4-21, 4-26
listing control 4-17, 4-36
use in macros 6-7
executable module definition F-3
executable output 8-7
relocatable 8-8
expressions 3-19, 3-20
absolute and relocatable 3-21
examples 3-22
conditional 3-21
definition F-3
illegal 3-21
left-to-right evaluation 3-19
linker 8-49 to 8-50
overflow 3-20
parentheses effect on evaluation 3-19
precedence of operators 3-19
that are well defined 3-20
that contain arithmetic operators 3-19
that contain conditional operators 3-21
that contain relocatable symbols 3-21
underflow 3-20
well-defined 3-20
external symbols 2-17, 3-21, 4-45
definition F-3
Index-6
F
–f linker option 8-9
.fclist assembler directive 4-17, 4-40
listing control 4-17, 4-36
use in macros 6-19
.fcnolist assembler directive 4-17, 4-40
listing control 4-17, 4-36
use in macros 6-19
.field assembler directive 4-12, 4-41
compatibility with C1x/C2x/C2xx/C5x 4-7
file headers A-4 to A-5
definition F-3
file identification B-3
.file symbolic debugging directive B-3
filenames
See also hex conversion utility, output filenames
as character strings 3-14
copy/include files 3-6
extensions
changing defaults 9-3
list file 3-4
macros
in macro libraries 6-13
object code 3-4
files ROMS specification 11-16
–fill hex conversion utility option 11-4, 11-25
fill MEMORY specification 8-24
fill ROMS specification 11-15
fill value 8-55
See also holes
default 8-9
overriding the MEMORY specification 8-13
setting 8-9
filling holes 8-54 to 8-55
.float assembler directive 4-12, 4-44
compatibility with C1x/C2x/C2xx/C5x 4-7
floating-point constants 4-44
.func symbolic debugging directive B-4
function definitions A-17, A-26, A-27, B-4
G
–g linker option 8-10
.global assembler directive 4-19, 4-45
identifying external symbols 2-17
Index
global symbols 8-10
definition F-3
making static with –h option
overriding –h option 8-10
GROUP
definition F-3
GROUP linker directive 8-39
8-10
hex conversion utility (continued)
memory width (memwidth) 11-8 to 11-9
exceptions 11-8
object formats
address bits 11-36
ASCII-Hex 11-1, 11-37
selecting 11-4
Intel 11-1, 11-38
selecting 11-4
H
–h linker option 8-10
–heap linker option 8-10
.sysmem section 8-59
hex conversion utility 1-3, 11-1 to 11-42
command files 11-5 to 11-6
invoking 11-3, 11-5
ROMS directive 11-5
SECTIONS directive 11-5
configuring memory widths
defining memory word width
(memwidth) 11-4
ordering memory words 11-4
specifying output width (romwidth) 11-4
controlling the ROM device address 11-32 to
11-35
boot-loader mode 11-33 to 11-35
nonboot-loader mode 11-32 to 11-33
data width 11-8
definition F-4
development flow 11-2
error messages 11-42
examples C-1 to C-18
avoiding holes with multiple sections C-7 to
C-8
building a hex command file for two 8-bit
EPROMS C-2 to C-6
generating a boot table C-9 to C-18
generating a map file 11-4
generating a quiet run 11-4
hex500 command 11-3
image mode
defining the target memory 11-25
filling holes 11-4, 11-25
invoking 11-4, 11-24
numbering bytes sequentially 11-4
resetting address origin 11-4, 11-24
invoking 11-3 to 11-4
from the command line 11-3
in a command file 11-3
Motorola-S 11-1, 11-39
selecting 11-4
output width 11-36
Tektronix 11-1, 11-41
selecting 11-4
TI-Tagged 11-1, 11-40
selecting 11-4
on-chip boot loader 11-26 to 11-31
See also on-chip boot loader
options
See also on-chip boot loader, options
–a 11-37
–byte 11-34
–fill 11-25
–i 11-38
–image 11-24
–m 11-39
–map 11-19
–memwidth 11-8
–o 11-22
–order 11-12
restrictions 11-13
–q 11-5
–romwidth 11-10
summary table 11-4
–t 11-40
–x 11-41
–zero 11-33
ordering memory words 11-12 to 11-13
big-endian ordering 11-12
little-endian ordering 11-12
output filenames 11-4, 11-22
default filenames 11-22
ROMS directive 11-6
ROM width (romwidth) 11-9 to 11-11
ROMS directive 11-14 to 11-19
creating a map file of 11-19
defining the target memory 11-25
example 11-17 to 11-18
parameters 11-14 to 11-16
specifying output filenames 11-6
Index-7
Index
hex conversion utility (continued)
SECTIONS directive 11-20 to 11-21
commas and colons 11-21
parameters 11-20 to 11-21
target width 11-8
hex500 command 11-3
See also hex conversion utility, invoking
hexadecimal integer constants
3-13
holes 8-9, 8-52 to 8-55
creating 8-52 to 8-54
definition F-4
fill value 8-26
ignoring fill specs 8-13
filling 8-54 to 8-55
in output sections 8-52 to 8-55
in uninitialized sections 8-55
K
keywords
allocation parameters 8-28
load 2-15, 8-28, 8-33
run 2-15, 8-28, 8-33 to 8-35
I
–i assembler option 3-5, 3-6
examples by operating system 3-7
maximum number per invocation 3-6
–i hex conversion utility option
–i linker option
11-4, 11-38
8-11
I MEMORY attribute
8-23
.if assembler directive 4-20, 4-48
use in macros 6-14
–image hex conversion utility option
11-4, 11-24
image mode. See hex conversion utility, image
mode
.include assembler directive
include files
3-6, 4-19, 4-32
3-6, 4-32
incremental linking
definition F-4
8-56 to 8-57
initialized sections 2-5 to 2-6, 8-52
.data section 2-5, 4-35
definition F-4
.sect section 2-5, 4-68
.text section 2-5, 4-77
input
linker 8-3, 8-19 to 8-20
sections 8-30 to 8-32
definition F-4
installation instructions. See TMS320C54x Code
Generation Tools Getting Started
Index-8
instruction set 5-1 to 5-34
summary table 5-5
acronyms and symbols 5-2
using the summary table 5-2
.int assembler directive 4-13, 4-50
Intel object format 11-1, 11-38
invoking the ...
absolute lister 9-3
archiver 7-4
assembler 3-4
cross-reference lister 10-3
hex conversion utility 11-3 to 11-4
linker 8-4 to 8-5
L
–l assembler option 3-5
source listing format 3-23
–l cross-reference lister option 10-3
–l linker option 8-11
.label assembler directive 4-21, 4-51
label field 3-9
labels 3-15
case sensitivity
–c assembler option 3-4
defined and referenced (cross-reference
list) 3-26
definition F-4
in assembly language source 3-9
local 3-17, 4-63
symbols used as 3-15
syntax 3-9
using with .byte directive 4-31
left-to-right evaluation (of expressions) 3-19
.length assembler directive 4-17, 4-52
listing control 4-17, 4-36
length MEMORY specification 8-24
length ROMS specification 11-15
library search algorithm, linker 8-11
.line symbolic debugging directive B-6
Index
line-number entries
definition F-4
B-6
line-number table
entry format A-12
line number entries A-13
line-number blocks A-12 to A-13
linker 1-3, 8-1 to 8-64
assigning symbols 8-48
assignment expressions 8-48, 8-49 to 8-50
C code 8-58 to 8-61
COFF 8-1
command files 8-4, 8-16 to 8-18
example 8-62, 8-63
configured memory 8-46
definition F-4
development flow 8-3
error messages E-1 to E-14
example 8-62 to 8-64
GROUP statement 8-37, 8-39
handling COFF sections 2-10 to 2-12
input 8-3, 8-16 to 8-18
invoking 8-4 to 8-5
keywords 8-18, 8-33 to 8-35, 8-43
linking C code 8-9, 8-58 to 8-61
lnk500 command 8-4
loading a program 2-16
MEMORY directive 2-10, 8-21 to 8-24
object libraries 8-19 to 8-20
operators 8-50
options
–a 8-7
–ar 8-8
–b 8-8
–c 8-9
–cr 8-9
–e 8-9
–f 8-9
–g 8-10
–h 8-10
–heap 8-10
–i 8-11
–m 8-13
–n 8-13
–o 8-13
–q 8-13
–r 8-7
–s 8-14
–stack 8-14
summary table 8-6
–u 8-14
–x 8-15
linker (continued)
output 8-3, 8-13, 8-62
overlay pages 8-40
overview 8-2
partial linking 8-56 to 8-57
section runtime address 8-33
sections 2-12
output 8-46
special 8-47
SECTIONS directive 2-10, 8-25 to 8-32
symbols 2-17 to 2-18, 8-51
unconfigured memory 8-47
UNION statement 8-37 to 8-38
.list assembler directive 4-17, 4-53
lister
absolute 9-1 to 9-8
cross-reference 10-1 to 10-6
listing
control 4-53, 4-59, 4-64, 4-66, 4-78
cross-reference listing 4-17, 4-64
file 4-17 to 4-18
creating with the –l option 3-5
definition F-4
format 3-23 to 3-25
page eject 4-17
page size 4-17, 4-52
little-endian ordering 11-12
lnk500 command 8-4
See also linker, invoking
load address of a section 8-33
referring to with a label 8-34 to 8-36
load linker keyword 2-15, 8-33 to 8-35
loader definition F-4
loading a program 2-16
local labels 3-17
logical operators 3-19
.long assembler directive 4-13, 4-55
compatibility with C1x/C2x/C2xx/C5x 4-7
limiting listing with the .option directive 4-17,
4-64
.loop assembler directive 4-20, 4-56
use in macros 6-14
M
–m hex conversion utility option
–m linker option 8-13
11-4, 11-39
Index-9
Index
macro
call definition F-5
definition F-5
expansion definition F-5
.macro assembler directive 6-3
summary table 6-22
macro comments 6-4
macro libraries 7-2
definition F-5
macros 6-1 to 6-24
conditional assembly 6-14 to 6-15
defining a macro 6-3
description 6-2
directives summary 6-22
disabling macro expansion listing 4-17, 4-64
formatting the output listing 6-19
labels 6-16
macro comments 6-4
macro libraries 6-13
.mlib assembler directive 3-6, 4-19, 4-57
.mlist assembler directive 4-17, 4-59
nested macros 6-20 to 6-21
parameters 6-5 to 6-12
See also substitution symbols
producing messages 6-17
recursive macros 6-20 to 6-21
substitution symbols 6-5 to 6-12
using a macro 6-2
using comments in 6-17
magic number definition F-5
_main 8-9
See also entry points
malloc() 8-10, 8-59
map file 8-13
definition F-5
example 8-64
–map hex conversion utility option
member definitions B-7
Index-10
N
11-4
.member symbolic debugging directive
memory 8-29 to 8-30
allocation 8-45 to 8-46
default 2-11
map 2-12
definition F-5
model 8-21
named 8-29
pool C language 8-10, 8-59
unconfigured 8-22
MEMORY linker directive 2-10, 8-21 to 8-24
default model 8-21, 8-45
ignoring fill specifications 8-13
overlay pages 8-40 to 8-44
PAGE option 8-21 to 8-23, 8-46
syntax 8-21 to 8-24
memory widths
memory width (memwidth) 11-8 to 11-9
exceptions 11-8
ordering memory words 11-12 to 11-13
big-endian ordering 11-12
little-endian ordering 11-12
ROM width (romwidth) 11-9 to 11-11
target width 11-8
memory words ordering 11-12 to 11-13
big-endian 11-12
little-endian 11-12
–memwidth hex conversion utility option 11-4
memwidth ROMS specification 11-15
.mexit macro directive 6-3
.mlib assembler directive 4-19, 4-57, 6-13
use in macros 3-6
.mlist assembler directive 4-17, 4-59
listing control 4-17, 4-36
use in macros 6-19
.mmregs assembler directive 4-23, 4-60
.mmsg assembler directive 4-23, 4-37
listing control 4-17, 4-36
.mmsg macro directive 6-17
mnemonic field 3-10
syntax 3-9
.mnolist assembler directive 4-17, 4-59
listing control 4-17, 4-36
use in macros 6-19
Motorola-S object format 11-1, 11-39
B-7
–n linker option 8-13
name MEMORY specification 8-23
named memory 8-29
named sections 2-6, A-3
See also COFF, sections, named
definition F-5
.sect directive 2-6, 4-68
.usect directive 2-6, 4-79
nested macros 6-20
.newblock assembler directive 4-23, 4-63
Index
.nolist assembler directive
NOLOAD section
4-17, 4-53
8-47
O
–o hex conversion utility option
–o linker option
11-4
8-13
object code (source listing)
object file definition
3-24
F-5
object formats
See also COFF
address bits 11-36
ASCII-Hex 11-1, 11-37
Intel 11-1, 11-38
Motorola-S 11-1, 11-39
output width 11-36
Tektronix 11-1, 11-41
TI-Tagged 11-1, 11-40
object libraries 8-11, 8-19 to 8-20, 8-58
definition F-6
using the archiver to build 7-2
octal integer constants
3-12
on-chip boot loader
boot table
building using the hex conversion utility
11-26 to 11-31
description 11-26
format 11-26
how to build 11-27
booting from device peripheral 11-28 to 11-29
booting from EPROM 11-30
booting from the parallel port 11-30
booting from the serial port 11-30
controlling ROM device address 11-33 to 11-35
description 11-26, 11-30 to 11-32
modes 11-30
options
–boot 11-27
–bootorg 11-27, 11-28
–bootpage 11-27
–e 11-29
setting the entry point 11-29
using the boot loader 11-30 to 11-32
operands
definition F-6
field 3-10 to 3-11
immediate addressing
3-11
operands (continued)
label 3-15
local label 3-17
prefixes 3-10
source statement format 3-10 to 3-11
operator precedence order 3-20
.option assembler directive 4-17, 4-64
optional file header A-6
definition F-6
options
absolute lister 9-3
See also absolute lister, options
archiver 7-4
See also archiver, options
assembler 3-4
See also assembler, options
cross-reference lister 10-3
See also cross-reference lister, options
definition F-6
hex conversion utility 11-4
See also hex conversion utility, options
linker 8-6 to 8-15
See also linker, options
–order hex conversion utility option 11-4
restrictions 11-13
ordering memory words 11-12 to 11-13
big-endian ordering 11-12
little-endian ordering 11-12
origin MEMORY specification 8-23
origin ROMS specification 11-15
output
assembler 3-1
executable 8-7
relocatable 8-8
filenames
See also hex conversion utility, output filenames
hex conversion utility 11-22
linker 8-3, 8-13, 8-62
listing 4-17 to 4-18
See also listing
module
definition F-6
module name (linker) 8-13
sections
allocation 8-27 to 8-32
definition F-6
rules 8-46
overflow (in expression) 3-20
Index-11
Index
overlay pages 8-40 to 8-44
definition F-6
maximum number of 8-43
PAGE definition 8-43 to 8-45
syntax of page definitions 8-43 to 8-45
using the MEMORY directive 8-40 to 8-41
using the SECTIONS directive 8-42 to 8-43
overlaying sections 8-37 to 8-38
R
P
paddr SECTIONS specification 11-21
page
eject 4-66
length 4-52
title 4-78
width 4-52
.page assembler directive 4-17, 4-66
PAGE option MEMORY directive 8-21 to 8-23,
8-43 to 8-45, 8-46
definition 8-43 to 8-45
PAGE ROMS specification 11-14
pages
overlay 8-40 to 8-44
defining with MEMORY directive 8-40 to
8-41
using with the SECTIONS directive 8-42 to
8-43
PAGE syntax 8-43 to 8-45
parentheses in expressions 3-19
partial linking
definition F-6
partially linked files 8-56 to 8-57
path. See alternate directories; environment variables
precedence groups 3-19
predefined names
–d assembler option 3-4
prefixes for operands 3-10
program counters. See SPC
program memory 8-21
.pstring assembler directive 4-13, 4-72
Q
–q absolute lister option
–q archiver option 7-5
Index-12
–q assembler option 3-5
–q cross-reference lister option 10-3
–q hex conversion utility option 11-4
–q linker option 8-13
quiet run 3-5
definition F-6
linker 8-13
9-3
–r archiver command 7-4
–r linker option 8-7, 8-56 to 8-57
R MEMORY attribute 8-23
RAM model
definition F-6
RAM model of autoinitialization 8-59
recursive macros 6-20
.ref assembler directive 4-19, 4-45
identifying external symbols 2-17
register symbols 3-16
relational operators
in conditional expressions 3-21
relocatable output module 8-7
executable 8-8
relocatable symbols 3-21
relocation 2-13 to 2-14, 3-13, 8-7 to 8-8
at runtime 2-15
capabilities 8-7 to 8-8
definition F-6
relocation information A-10 to A-11
reserved words, linker 8-18
resetting local labels 4-63
ROM device address, controlling 11-32 to 11-35
boot-loader mode 11-33 to 11-35
nonboot-loader mode 11-32 to 11-33
ROM model
definition F-6
ROM model of autoinitialization 8-60
ROM width definition F-7
ROM width (romwidth) 11-9 to 11-11
romname ROMS specification 11-14
ROMS hex conversion utility directive 11-14 to
11-19
See also hex conversion utility, ROMS directive
–romwidth hex conversion utility option 11-4
romwidth ROMS specification 11-15
Index
rts.lib 8-58, 8-61
run address of a section 8-33 to 8-35
run linker keyword 2-15, 8-33 to 8-35
runtime
initialization 8-58
support 8-58
S
–s archiver option 7-5
–s assembler option 3-5
–s linker option 8-14, 8-56 to 8-57
.sblock assembler directive 4-23, 4-67
.sect
assembler directive 2-4, 4-9, 4-68
section 4-9
section
definition F-7
directives
See also directives, assembler
default 2-4
headers A-7 to A-9
definition F-7
number A-21
program counters. See SPC
specifications 8-25
sections 2-1 to 2-18
See also COFF, sections
allocation into memory 8-45 to 8-46
COFF 2-2 to 2-3
creating your own 2-6
default allocation 8-45 to 8-46
in the linker SECTIONS directive 8-26
initialized 2-5 to 2-6
named 2-2, 2-6
overlaying with UNION directive 8-37 to 8-38
relocation 2-13 to 2-14
at runtime 2-15
special types 8-47
specifying a runtime address 8-33 to 8-36
specifying linker input sections 8-30 to 8-32
uninitialized 2-4 to 2-5
initializing 8-55
specifying a run address 8-34
SECTIONS hex conversion utility directive
11-20 to 11-21
See also hex conversion utility SECTIONS
directive
SECTIONS linker directive 2-10, 8-25 to 8-32
alignment 8-30
allocation 8-27 to 8-32
binding 8-29
blocking 8-30
default
allocation 8-45 to 8-46
model 8-23
fill value 8-26
GROUP 8-39
input sections 8-26, 8-30 to 8-32
.label directive 8-34 to 8-36
load allocation 8-25
memory 8-29 to 8-30
named memory 8-29 to 8-30
overlay pages 8-40 to 8-44
reserved words 8-18
run allocation 8-26
section specifications 8-25
section type 8-26
specifying
runtime address 2-15, 8-33 to 8-36
two addresses 2-15, 8-33 to 8-34
syntax 8-25
uninitialized sections 8-34
UNION 8-37 to 8-39
use with MEMORY directive 8-21
.set assembler directive 4-21, 4-69
.setsect assembler directive 9-7
.setsym assembler directive 9-7
sign-extend definition F-7
sname SECTIONS specification 11-20
software installation. See TMS320C54x Code
Generation Tools Getting Started
source file definition F-7
source listings 3-23 to 3-25
source statement
field (source listing) 3-24
format 3-9 to 3-11
comment field 3-11
label field 3-9
mnemonic field 3-10
operand field 3-10 to 3-11
number (source listing) 3-23
.space assembler directive 4-11, 4-70
SPC 2-7
aligning
by creating a hole 8-52
to word boundaries 4-15 to 4-16, 4-25
Index-13
Index
SPC (continued)
assembler symbol 3-10
assembler’s effect on 2-7 to 2-9
assigning a label to 3-10
definition F-7
linker symbol 8-48 to 8-49, 8-52
maximum number of 2-7
predefined symbol for 3-16
value
associated with labels 3-10
shown in source listings 3-23
special section types
8-47
special symbols in the symbol table
A-16 to A-17
.sslist assembler directive 4-18, 4-71
listing control 4-17, 4-36
use in macros 6-19
.ssnolist assembler directive 4-18, 4-71
listing control 4-17, 4-36
use in macros 6-19
–stack linker option 8-14
.stack section 8-14, 8-59
_ _STACK_SIZE
8-14, 8-51
.stag
assembler directive 4-22, 4-73
symbolic debugging directive B-8
static symbols
creating with –h option
8-10
static variables A-14
definition F-7
storage classes A-19
definition F-7
string . . ., functions (substitution symbols)
$firstch 6-8
$iscons 6-8
$isdefed 6-8
$ismember 6-8
$isname 6-8
$isreg 6-8
$lastch 6-8
$symcmp 6-8
$symlen 6-8
.string assembler directive 4-13, 4-72
compatibility with C1x/C2x/C2xx/C5x 4-7
limiting listing with the .option directive 4-17,
4-64
string table A-18
definition F-7
Index-14
stripping
line number entries 8-14
symbolic information 8-14
.struct assembler directive 4-22, 4-73
structure
definition of F-7
definitions A-25, B-8
tag (.stag) 4-22, 4-73
style and symbol conventions, iv to viii
substitution symbols 3-17
arithmetic operations on 4-21, 6-7
as local variables in macros 6-12
assigning character strings to 3-17, 4-21
built-in functions 6-7
directives that define 6-6 to 6-7
expansion listing 4-18, 4-71
forcing substitution 6-9 to 6-10
in macros 6-5 to 6-12
maximum number per macro 6-5
passing commas and semicolons 6-5
recursive substitution 6-9
subscripted substitution 6-10 to 6-11
.var macro directive 6-12
.sym symbolic debugging directive B-10
symbol
attributes 3-26
definition of F-8
definitions A-17
names A-18
table 2-18
creating entries 2-18
definition F-8
entry from .sym directive B-10
index A-10
placing unresolved symbols in 8-14
special symbols used in A-16 to A-17
stripping entries 8-14
structure and content A-14 to A-28
symbol values A-20
unresolved 8-14
symbolic constants 3-16
$ 3-16
defining 3-16
.mmregs defined symbols 3-16
register symbols 3-16
symbolic debugging A-14 to A-28, B-1
–b linker option 8-8
block definitions B-2
definition F-8
Index
symbolic debugging (continued)
directives B-1
.block/.endblock B-2
.etag/.eos B-8
.file B-3
.func/.endfunc B-4
.line B-6
.member B-7
.stag/.eos B-8
.sym B-10
.utag/.eos B-8
disable merge for linker 8-8
enumeration definitions B-8
file identification B-3
function definitions B-4
line-number entries B-6
member definitions B-7
–s assembler option 3-5
stripping symbolic information
structure definitions B-8
union definitions B-8
T
8-14
symbols 2-17 to 2-18, 3-15
and their definitions (cross-reference list) 3-26
assigning values to 4-69
at link time 8-48 to 8-51
case 3-4
character strings 3-14
cross-reference lister 10-5
defined
by the assembler 2-17 to 2-18, 3-4
by the linker 8-51
only for C support 8-51
external 2-17, 4-45
global 8-10
number of statements that reference 3-26
predefined 3-16
relocatable symbols in expressions 3-21
reserved words 8-18
setting to a constant value 3-15
statement number that defines 3-26
substitution 3-17
used as labels 3-15
value assigned 3-26
syntax of assignment statements
.sysmem section
8-10
_ _SYSMEM_SIZE 8-10, 8-51
system stack
C language
8-14, 8-59
8-48
–t archiver command 7-4
–t hex conversion utility option 11-4, 11-40
.tab assembler directive 4-18, 4-76
.tag assembler directive 4-22, 4-73
target memory definition F-8
target width 11-8
Tektronix object format 11-1, 11-41
.text
assembler directive 2-4, 4-9, 4-77
linker definition 8-51
definition F-8
section 4-9, 4-77, A-3
TI-Tagged object format 11-1, 11-40
.title assembler directive 4-18, 4-78
type entry A-21
U
–u linker option 8-14
unconfigured memory 8-22, 8-47
definition F-8
underflow (in expression) 3-20
uninitialized sections 2-4 to 2-5, 8-52
.bss section 2-4, 4-28
definition F-8
initialization of 8-55
specifying a run address 8-34
.usect section 2-4, 4-79
UNION
definition F-8
union definitions B-8
UNION linker directive 8-37 to 8-39
.usect assembler directive 2-4, 4-9, 4-79
compatibility with C1x/C2x/C2xx/C5x 4-7
.utag symbolic debugging directive B-8
V
–v archiver option 7-5
.var macro directive 6-12
listing control 4-17, 4-36
variables
local
substitution symbols used as
6-12
Index-15
Index
W
W MEMORY attribute 8-23
well-defined expressions 3-20
definition F-8
.width assembler directive 4-18, 4-52
listing control 4-17, 4-36
widths. See memory widths
.wmsg assembler directive 4-23
listing control 4-17, 4-36
.wmsg macro directive 6-17
word
definition of F-8
word alignment 4-25
.word assembler directive 4-13, 4-50
limiting listing with the .option directive
4-64
Index-16
X
–x archiver command
7-5
–x assembler option 3-5
cross-reference listing 3-26
–x hex conversion utility option
–x linker option
11-4, 11-41
8-15
X MEMORY attribute
8-23
.xfloat assembler directive
4-12, 4-44
.xlong assembler directive
4-13, 4-55
xref500 command
10-3
Z
4-17,
–zero hex conversion utility option
11-4
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