STMicroelectronics STA540SAN Datasheet
Reklama
Reklama
STA540SAN
4 x 10-watt dual/quad power amplifier
Features
High output-power capability:
– 4 x 9 W / 2 Ω at 12 V, 1 kHz, 10%
– 4 x 10 W / 4 Ω at 17 V, 1 kHz, 10%
– 2 x 26 W / 4 Ω at 14.4 V, 1 kHz, 10%
– 2 x 15 W / 8 Ω at 16 V, 1 kHz, 10%
Minimum external component count:
– No bootstrap capacitors
– No Boucherot cells
– Internally fixed gain of 20 dB
Standby function (CMOS compatible)
No audible pop during standby operations
Diagnostic facilities:
– Clip detector
– Out to GND short circuit
– Out to VS short circuit
– Soft short at turn-on
– Thermal shutdown proximity
Protection for
– Output AC/DC short circuit
– Soft short circuit at turn-on
Clipwatt15
– Thermal cut-off limiter to prevent chip from overheating
– High inductive loads
– ESD
Description
The STA540SAN contains four single-ended, class-AB audio amplifiers assembled in a
Clipwatt15 package.
These amplifiers are used for high-quality sound applications. Each amplifier has integrated short-circuit and thermal protection and diagnostic functions. Two amplifiers can be paired up for applications requiring high power output.
Table 1.
Device summary
Order code Temperature range
STA540SAN -40 to 150 °C
Package
Clipwatt15
Packaging
Tube
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26
Contents
Contents
2/26
STA540SAN
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test and applications board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Standard applications circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Easy single-ended to bridge transition . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Silent turn on/off and muting/standby functions . . . . . . . . . . . . . . . . . . . . 18
Rail-to-rail output voltage swing with no need of bootstrap capacitors . 19
Absolute stability without any external compensation . . . . . . . . . . . . . . 19
Handling of the diagnostic information . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PCB-layout grounding (general rules) . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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STA540SAN
Contents
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Block diagram STA540SAN
Figure 1.
Block diagram
VCC2
13
VCC1
3
IN1
4
ST_BY
7
IN2
5
IN3
12
IN4
11
6
SVR
A3
+
-
A4 INV
+
-
A1
+
-
A2 INV
+
-
8
P_GND
1
OUT1
2
OUT2
15
OUT3
14
OUT4
10
DIAGNOSTIC
OUTPUT
9
S_GND
D06AU1630_bc
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STA540SAN Pin description
Figure 2.
Pin connection (top view)
12
11
10
9
8
7
6
5
4
3
2
1
15
14
13
OUT3
OUT4
VCC2
IN3
IN4
DIAG
S_GND
P_GND
ST_BY
SVR
IN2
IN1
VCC1
OUT2
OUT1 clp15_pins_540san_bc
Table 2.
Pin
Pin description
Name Type Function
6
7
4
5
8
9
1
2
3
OUT1 OUTPUT Channel 1 output
OUT2 OUTPUT Channel 2 output
VCC1 POWER Power
IN1
IN2
SVR
ST_BY
P_GND
S_GND
INPUT
INPUT
INPUT
INPUT
Channel 1 input
Channel 2 input
Supply voltage rejection
Standby control pin
POWER Power ground
POWER Signal ground
10 DIAG OUTPUT Diagnostics
11 IN4 INPUT Channel 4 input
12 IN3 INPUT Channel 3 input Obsolete Product(s) - Obsolete Product(s)
13 VCC2 POWER Power supply
14 OUT4 OUTPUT Channel 4 output
15 OUT3 OUTPUT Channel 3 output
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Electrical specifications STA540SAN
3.1 Absolute maximum ratings
Table 3.
Symbol
Absolute maximum ratings
Parameter
V
Smax
Supply voltage idle mode (no signal)
Supply voltage operating
Supply voltage AC-DC short safe
V
ST_BYmax
P tot
T stg
, T j
T op
Voltage on pin ST_BY
Total power dissipation (T case
= 70 °C)
Storage and junction temperature
Operating temperature
Value
24
22
20
V
Smax
35
-40 to150
0 to 70
Unit
-
W
°C
°C
V
V
V
Table 4.
Symbol
R th j-case
R th j-amb
Thermal data
Parameter
Thermal resistance junction to case
Thermal resistance junction to ambient -
-
Min Typ Max Unit
-
2.5
45
°C/W
°C/W
The results in Table 5 below were measured under the conditions V
S
= 15 V, R
L
= 4 Ω, f = 1 kHz and T amb
= 25 °C unless otherwise specified. Refer also to the test circuit in
Table 5.
Symbol
Electrical characteristics
Parameter Test condition Min Typ Max Unit
Supply voltage range 8 22 V V
S
I d
V os
Total quiescent drain current -
Output offset voltage -
-
-250 -
80 150 mA
250 mV
THD = 10% 6.5
7.5
W
P o
THD
I
SC
Output power
Distortion
Short-circuit current -
THD = 10%, V
S
S.E. R
L
= 4 Ω
= 17 V
THD = 10%, V
S
BTL, R
L
= 8 Ω
= 17 V
R
L
= 4 Ω, P o
= 0.1 to 4 W -
-
-
10
20
0.02
-
3.5
-
-
W
W
%
A
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STA540SAN Electrical specifications
Table 5.
Symbol
Electrical characteristics (continued)
Parameter Test condition
I
I
I
I
C
R
G
G
E
V
V
T in v v
N
SVR
A
SB
V
SB
SB
SB
ST_BY cd off cd on
DIAG
T
W
Crosstalk
Input impedance
Voltage gain
Voltage gain match -
-
f = 1 kHz f = 10 kHz
THD = 1%
THD = 5%
(1)
(1)
-
-
-
Total output noise
Supply voltage rejection
Standby attenuation
ST_BY pin current
Rg = 0, “A” weighted
Inverting channels:
Non-inverting channels:
-
Rg = 0, f = 300 Hz,
C
SVR
= 470 µF
ST_BY current consumption V
ST_BY
= 0 to 1.5 V
ST_BY IN threshold voltage -
ST_BY OUT threshold voltage
-
Play mode V
ST_BY
= 5 V -
Driving current under fault -
-
-
-
-
50
80
3.5
Clipping detector output average current
Clipping detector output average current
20
-
19
Voltage saturation on DIAG
Thermal warning
T
M
Thermal muting
T
S
Thermal shutdown
1.
Pin DIAG pulled-up to 5 V with 10 k
Ω
-
-
-
Sink current on pin DIAG
I
DIAG
= 1 mA
-
-
-
-
Min Typ Max Unit
70
60
30
-
20
-
-
21
0.5
dB k Ω dB dB
-
-
-
-
-
-
-
50
20
90
90
160
140
150 -
160 -
-
-
-
-
-
-
-
-
100
1.5
50
5
0.7
µV dB dB
µA
V
V
µA mA
µA
µA
V
°C
°C
°C
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4 Test and applications board
This chapter includes information about the test and applications board including the test circuit, board layout, and parts list.
Figure 3.
Test circuit
2 IN1
1
3 IN2
5 IN4
4
6 IN3
VCC
CN-5-02P
1
CN7
2
PGND
CN1
RCA4CH_6P
SGND
SGND
VCC
1
SW1
SLIDSWITCH-2.54-3P
2
R2
3
1K8
SGND
DO7
ZD1
C13
100 nF
R1
10K
C12
10 µF
25 V
SGND
SGND
JP5
JUMPER2X1(DIP)
JP6
JUMPER2X1(DIP)
VCC
C6
100 nF
25 V
C5
1000 µF
50 V
PGND
C1
0.22uF
C2 0.22uF
C3 0.22uF
C4
0.22uF
C11
47 µF
25 V
SGND
4 IN1
5 IN2
12 IN3
OUT1
1
IC1
STA540SAN
OUT2
CLIPWATT15
OUT3
2
15
11 IN4
6 SVR
OUT4
14
Diagnostics
PGND SGND
TP
TP1
C7 2200 µF, 25 V CN-5-02P
1
CN3
2
JP1
JUMPER2X1(DIP)
C8 2200 µF, 25 V
JP1, JP2 :
Open = SE
Closed = BTL
PGND
CN-5-02P
1
CN4
2
JP2
JUMPER2X1(DIP)
PGND
C9 2200 µF, 25 V CN-5-02P
1
CN5
2
JP3
JUMPER2X1(DIP)
C10 2200 µF, 25 V
JP3, JP4 :
Open = SE
Closed = BTL
PGND
CN-5-02P
1
CN6
2
JP4
JUMPER2X1(DIP)
PGND
Obsolete Product(s) - Obsolete Product(s)
STA540SAN
Figure 4.
Component layout
Test and applications board
Figure 5.
Component side
Figure 6.
Solder side
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Test and applications board
Table 6.
List of components
Components Suggested value
R1
R2
C1, C2, C3, C4
C5
C6
C7, C8, C9, C10
C11
C12
C13
ZD1
10 k Ω
1.8 k Ω
0.22
µF
0.1
µF
1000 µF
2200 µF
47 µF
10 µF
100 nF
10 µF
STA540SAN
Purpose
Standby time constant
Ripple rejection
Input AC coupling
Voltage supply decoupling
Voltage supply decoupling
Output AC coupling
Ripple rejection
Standby time constant
Ripple rejection
Standby time constant
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STA540SAN
5 Standard applications circuits
Standard applications circuits
Figure 7.
Quad stereo
10K
ST-BY
IN1
IN2
IN3
IN4
0.22
µF
0.22
µF
0.22
µF
0.22
µF
47 µF
10 µF 100nF
VS
1000 µF
4
7 13 3
1
2200 µF
5
2
2200 µF
12
15
11 2200 µF
6
8 9
14
10
P-GND S-GND
DIAGNOSTICS
2200
µF
D04AU1555B
OUT1
OUT2
Suggested applications:
4 x 12 W at 2 Ω, 14.4 V
4 x 10 W at 4 Ω, 17 V
4 x 9 W at 2 Ω, 12 V
4 x 5 W at 4 Ω, 12 V
OUT3
OUT4
Figure 8.
Audio performance option
1
14
2
15
470
µF
470
µF
The best audio performance is obtained with the configuration where each speaker has its own DC blocking capacitor. If the application allows a little degradation of the spatial image it is possible to connect a couple of speakers with only one low-value DC blocking capacitor.
Figure 9.
Double bridge
10K
ST-BY
100nF
VS
1000
µF
10
µF
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IN R
0.47
µF
0.47
µF
5
11
7 13 3
1
OUT L
Suggested applications:
2 x 9 W at 8
Ω, 12 V
2 x 18 W at 4 Ω, 12 V
2 x 13 W at 8 Ω, 14 V
2 x 26 W at 8 Ω, 14 V
2 x 15 W at 8 Ω, 16 V
12
2
14
OUT R
6
8 47
µF 9 10
15
DIAGNOSTICS
D95AU1600
A dedicated evaluation board is available for this application (see
).
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Standard applications circuits STA540SAN
Figure 10.
Stereo Bridge
10K
ST-BY
10
µF
100nF
VS
1000 µF
IN L
IN R
IN BRIDGE
4
7 13 3
1
OUT L
0.22
µF
2200
µF
5 2
OUT R
0.22
µF
2200
µF
0.47
µF
11
12
6
8 9
14
10
15
47
µF
DIAGNOSTICS
D05AU1601
Suggested applications:
2 x 9 W into 2 Ω + 1 x 18 W into 4 Ω, 12 V
2 x 12 W into 2 Ω + 1 x 26 W into 4 Ω, 14.4 V
2 x 8 W into 4 Ω + 1 x 16 W into 8 Ω, 16 V
OUT
BRIDGE
A dedicated evaluation board is available for this application (see
).
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STA540SAN
6 Electrical characteristics curves
Electrical characteristics curves
Figure 11.
Quiescent drain current vs supply voltage (single-ended and bridge)
Figure 12.
Quiescent output voltage vs supply voltage (single-ended and bridge)
Figure 13.
Output power vs supply voltage Figure 14.
Distortion vs output power
Figure 15.
Output power vs supply voltage Figure 16.
Distortion vs output power
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Electrical characteristics curves
Figure 17.
Output power vs supply voltage
STA540SAN
Figure 18.
Distortion vs output power
Figure 19.
Output power vs supply voltage Figure 20.
Crosstalk vs frequency
Figure 21.
Output power vs voltage Figure 22.
Standby attenuation vs threshold voltage
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STA540SAN
Figure 23.
Supply voltage rejection vs frequency
Electrical characteristics curves
Figure 24.
Total power dissipation and efficiency vs output power
Figure 25.
Total power dissipation and efficiency vs output power
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Thermal information STA540SAN
In order to avoid the thermal protection intervention that is placed at T j
=150 °C (thermal muting) or T j
=160 °C (thermal shutdown), it is important to design the heatsink R th
(°C/W) value correctly.
The parameters that influence the design are: z z z
Maximum dissipated power for the device (P dmax
)
Maximum thermal resistance junction to case (R th_j-case
)
Maximum ambient temperature T amb_max
There is also an additional term that depends on the quiescent current, Iq, but this is negligible in this case.
Example 1: 4-channel single-ended amplifier
V
CC
=14.4 V, R
L
= 4 Ω x 4 channels, R th_j-case
= 2.5 °C/W, T amb_max
= 50 °C, P out
= 4 x 7 W
P dmax
=
NChannel
⋅
V
2 Π
CC
2
2
R
L
= ⋅ =
10.5W
The required thermal resistance for the heatsink is
"" R th_c-amb
=
150 – T
P dmax
– th_j-case
=
150 –
10.5
50
– = 7 °C/W
Example 2: 2-channel single-ended plus 1-channel (BTL) amplifier
V
CC
= 14.4 V, R
L
= 2 x 2
Ω (SE) + 1 x 4 Ω (BTL), P out
= 2 x 12 W + 1 x 26 W
2
P dmax
= 2 ⋅ ------------------
2 Π 2
R
L
+
R
L
2
2V
CC = ⋅ + 10.5
= 21W
Π 2
The required thermal resistance for the heatsink is
"" R th_c-amb
=
150 T amb_max –
P dmax th_j-case
=
150
–
21
50
– =
2.2
°C/W
Design notes on examples 1 and 2
Obsolete Product(s) - Obsolete Product(s)
But, as explained in the applications note AN1965, the heatsink can be smaller when a realistic application is considered where a musical program is used.
When the average listening power concept is considered, the dissipated power is about 40% less than the P dmax
. Therefore, in examples 1 and 2, the resulting average dissipated power is reduced as follows:
– Example 1: 10.5 W - 40% = 6.3 W giving R th_c-amb
= 13.4 °C/W
– Example 2: 21 W - 40% = 12.6 W giving R th_c-amb
= 5.4 °C/W
below shows the power derating curve for the device.
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STA540SAN
Figure 26.
Power derating curve
Thermal information
20 40 60 80 100 120 140 160
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General structure STA540SAN
8.1
8.2
8.3
High application flexibility
The availability of four independent channels makes it possible to accomplish several kinds of applications ranging from four-speaker stereo (F/R) to two-speaker bridge solutions.
When working with single-ended conditions, the polarity of the speakers driven by the inverting amplifier must be reversed with respect to those driven by non-inverting channels.
This is to avoid phase irregularities causing sound alterations especially during the reproduction of low frequencies.
Easy single-ended to bridge transition
The change from single-ended to bridge configurations is made simple by means of a short circuit across the inputs (resulting in no need of additional external components).
Internally fixed gain
The gain is internally fixed to 20 dB in single-ended mode and 26 dB in bridge mode.
z z
The advantages of this design choice are in terms of: components and space saving output noise, supply voltage rejection and distortion optimization.
8.4 Silent turn on/off and muting/standby functions
Standby mode can be easily activated by means of a CMOS logic level applied to pin 7 through a RC filter.
Under standby conditions, the device is turned off completely (supply current = 1 mA typical, output attenuation = 80 dB minimum).
All on/off operations are virtually pop-free. Furthermore, at turn-on the device stays in mute condition for a time determined by the value assigned to the SVR capacitor. In mute mode, the device outputs are insensitive to any kind of signal that may be present at the input terminals. In other words, any transients coming from previous stages produce no unpleasant acoustic effects at the speakers.
Obsolete Product(s) - Obsolete Product(s)
8.5 Standby driving (pin 7)
Some precautions need to be taken when defining standby driving networks. Pin 7 cannot be directly driven by a voltage source having a current capability higher than 5 mA. In practical cases a series resistance must be inserted, giving it the double purpose of limiting the current at pin 7 and smoothing down the standby on/off transitions. And, when done in combination with a capacitor, prevents output pop.
A capacitor of at least 100 nF from pin 7 to S_GND, with no resistance in between, is necessary to ensure correct turn-on.
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STA540SAN General structure
8.6.1
8.6.2
The fully complementary output stage is possible with the power ICV PNP component.
This novel design is based on the connection shown in
exploitation of its capabilities. The clear advantages this new approach has over classical output stages are described in the following sections.
Rail-to-rail output voltage swing with no need of bootstrap capacitors
The output swing is limited only by the V
CEsat
of the output transistors, which are in the range of 0.3
Ω (R sat
) each.
Classical solutions adopting composite PNP-NPN for the upper output stage have higher saturation loss on the top side of the waveform.
This unbalanced saturation causes a significant power reduction. The only way to recover power includes the addition of expensive bootstrap capacitors.
Absolute stability without any external compensation
With reference to the circuit shown in Figure 27
, the gain V out
/V in
is greater than unity, that is, approximately 1+R2/R1. The DC output (V
CC
/2) is fixed by an auxiliary amplifier common to all the channels.
By controlling the amount of this local feedback, it is possible to force the loop gain (A* β) to less than unity at a frequency where the phase shift is 180 °. This means that the output buffer is intrinsically stable and not prone to oscillation.
The above feature has been achieved even though there is very low closed-loop gain of the amplifier.
This is in contrast with the classical PNP-NPN stage where the solution adopted for reducing the gain at high frequencies makes use of external RC networks, namely the
Boucherot cells.
Figure 27.
The new output stage
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General structure STA540SAN
Reliable and safe operation in the presence of all kinds of short circuits involving the outputs is assured by built-in protection. Additionally, a soft short-condition is signalled out (to the
AC/DC short circuit to GND, to VS, and across the speaker) during the turn-on phase to ensure correct operation of the device and the speakers.
This particular kind of protection acts in such a way as to prevent the device being turned on
(by ST_BY) when a resistive path (less than 16 Ω) is present between the output and GND.
It is important to have the external current source driving the ST_BY pin limited to 5 mA.
This is because the associated circuitry is normally disabled with currents >5 mA.
This extra function becomes particularly attractive when, in the single-ended configuration,
one capacitor is shared between two outputs as shown in Figure 28 .
Figure 28.
Sharing a capacitor
8.7.1
If the output capacitor C out
is shorted for any reason, the loudspeaker is not damaged.
Diagnostic facilities (pin 10) z z
The STA540SAN is equipped with diagnostic circuitry that is able to detect the following events: z Clipping in the output signal
Thermal shutdown
Output fault:
– short to GND
– short to VS
– soft short at turn on
The information is available across an open collector output (pin 10) through a current sinking when the event is detected.
Figure 29.
Clipping detection waveforms
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A current sinking at pin 10 is provided when a certain distortion level is reached at each output. This function initiates a gain-compression facility whenever the amplifier is overdriven.
Doc ID 18306 Rev 1
STA540SAN General structure
With the thermal shutdown feature, the output (pin 10) signals the proximity of the junction temperature to the shutdown threshold. Typically, current sinking at pin 10 starts at approximately 10 °C before the shutdown threshold is reached.
Figure 30.
Output fault waveforms
10
10
Figure 31.
Fault waveforms
ST_BY PIN
VOLTAGE
2V
OUT TO Vs SHORT
OUTPUT
WAVEFORM
SOFT SHORT
Vpin 10
OUT TO GND SHORT
CORRECT TURN-ON
FAULT DETECTION
CHECK AT TURN-ON
(TEST PHASE)
D05AU1603
SHORT TO GND
OR TO Vs t t t
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General structure
8.8
STA540SAN
Handling of the diagnostic information
As different diagnostic information is available at the same pin (clipping detection, output fault, thermal proximity), the signal must be handled correctly in order to discriminate the event. This could be done by taking into account the different timing of the diagnostic output during each case.
Normally, clip-detector signalling under faulty conditions produces a low level at pin 10.
Based on this assumption, an interface circuitry to differentiate the information is shown in
.
Figure 32.
Waveforms
ST_BY PIN
VOLTAGE t
Vs
OUTPUT
WAVEFORM t
Vpin 10
WAVEFORM
D05AU1604_bc
Figure 33.
Interface circuit diagram
CLIPPING
SHORT TO GND
OR TO Vs
THERMAL
PROXIMITY t
10
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STA540SAN
8.9
General structure
PCB-layout grounding (general rules)
The device has two distinct ground leads, P_GND (power ground) and S_GND (signal ground) which are practically disconnected from each other at chip level. Correct operation requires that P_GND and S_GND leads be connected together on the PCB layout by means of reasonably low-resistance tracks.
For the PCB ground configuration a star-like arrangement, where the center is represented by the supply-filtering electrolytic capacitor ground, is recommended. In such context, at least two separate paths must be provided; one for power ground and one for signal ground.
z z z z
The correct ground assignments are as follows: standby capacitor (pin 7, or any other standby driving networks): on signal ground
SVR capacitor (pin 6): on signal ground and to be placed as close as possible to the device input signal ground (from active/passive signal processor stages): on signal ground supply filtering capacitors (pins 3 and 13): on power ground. The negative terminal of the electrolytic capacitor must be directly tied to the battery negative line and this should represent the starting point for all the ground paths.
If the mute function is required, it can be accessed on SVR (pin 6) as shown in
Figure 34.
Components for layout
10K
ST-BY
10 µF
IN L
IN R
0
PLAY
MUTE
5V
R2 10K
IN BRIDGE
R1 3.3K
0.22
µF
4
7
0.22
µF
5
0.47
µF
12
11
6
8
470 µF
13
100nF
3
1
2
15
9 10
14
DIAGNOSTICS
2200 µF
2200
µF
VS
1000
µF
OUT L
OUT R
OUT
BRIDGE
D06AU1632_bc
Using a different value for R1 than the suggested 3.3 k
Ω, results in two different situations: z R1 > 3.3 k Ω:
– Pop noise improved z
– Lower mute attenuation
R1 < 3.3 k
Ω:
– Pop noise degradation
– Higher mute attenuation
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Package mechanical data
9 Package mechanical data
STA540SAN
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Figure 35.
Mechanical data and package dimensions
A
B
G
G1
H1
H2
E
F
C
D
L3
M
M1
H3
L
L1
L2
DIM.
mm inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
3.2
1.05
0.126
0.041
0.15
1.50
0.006
0.061
0.49
0.67
0.55
0.019
0.73
0.026
0.022
0.029
1.14
1.27
1.4
0.045
0.050
0.055
17.57
17.78
17.91
0.692
0.700
0.705
12
18.6
0.480
0.732
19.85
10.7
17.9
14.55
11
5.5
2.54
2.54
0.781
0.704
0.572
11.2
0.421
0.433
0.441
0.217
0.100
0.100
OUTLINE AND
MECHANICAL DATA
Weight: 1.92gr
Clipwatt15
Obsolete Product(s) - Obsolete Product(s)
0044538 G
24/26 Doc ID 18306 Rev 1
STA540SAN
Table 7.
Date
Document revision history
Revision
16-Dec-2010 1 Initial release
Changes
Revision history
Obsolete Product(s) - Obsolete Product(s)
Doc ID 18306 Rev 1 25/26
STA540SAN
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Obsolete Product(s) - Obsolete Product(s)
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