AMS AS5047P Position Sensor Datasheet
AMS AS5047P is a high-resolution rotary position sensor capable of measuring angles with up to 14-bit core resolution. With its wide range of features, it is ideal for use in various applications, including industrial automation, robotics, and motor control. Some of its key capabilities include:
- High-speed operation: It can handle speeds up to 28,000 RPM, making it suitable for high-speed applications.
- Dynamic angle error compensation: It features dynamic angle error compensation (DAEC) technology, which minimizes angle errors in real-time, leading to highly accurate measurements.
- Robust design: It is immune to external stray magnetic fields, ensuring reliable operation in challenging environments.
โฆษณา
โฆษณา
AS5047P
14-Bit On-Axis Magnetic Rotary
Position Sensor with 12-Bit Decimal and Binary Incremental Pulse Count for 28krpm High Speed Capability
General Description
Figure 1:
Added Value of Using the AS5047P
Benefits
• High speed application
• Easy to use – saving costs on DSP
• Good resolution for motor and position control
The AS5047P is a high-resolution rotary position sensor for high speed (up to 28krpm) angle measurement over a full 360 degree range. This new position sensor is equipped with revolutionary integrated dynamic angle error compensation (DAEC™) with almost 0 latency and offers a robust design that suppresses the influence of any homogenous external stray magnetic field.
A standard 4-wire SPI serial interface allows a host microcontroller to read 14-bit absolute angle position data from the AS5047P and to program non-volatile settings without a dedicated programmer.
Incremental movements are indicated on a set of ABI signals with a maximum resolution of 4000 steps /1000 pulses per revolution in decimal mode and 4096 steps /1024 pulses per revolution in binary mode. The resolution of the ABI signal is programmable and can be reduced to 100 steps per revolution, or 25 pulses per revolution.
Brushless DC (BLDC) motors are controlled through a standard
UVW commutation interface with a programmable number of pole pairs from 1 to 7. The absolute angle position is also provided as PWM-encoded output signal.
The AS5047P is available as a single die in a compact 14-pin
TSSOP package.
and
Content Guide appear at end of
datasheet.
Key Benefits & Features
The benefits and features of AS5047P, 14-Bit On-Axis Magnetic
Rotary Position Sensor with 12-Bit Decimal and Binary
Incremental Pulse Count for 28krpm High Speed Capability are listed below:
Features
• Up to 28krpm
• DAEC™ Dynamic angle error compensation
• 14-bit core resolution
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General Description
Benefits
• Simple optical encoder replacement
• No programmer needed (via SPI command)
• Versatile choice of the interface
• Lower system costs (no shielding)
Features
• ABI programmable decimal and binary pulse-count: 1000,500,400,300,200,100,
50,25,1024,512,256 ppr
• Zero position, configuration programmable
• Independent output interfaces: SPI, ABI, UVW,
PWM
• Immune to external stray field
Applications
The AS5047P is ideally suited to support BLDC motor commutation for the most challenging industrial applications such as factory automation, building automation, robotics,
PMSM (permanent magnet synchronous motor) and stepper motors closed loop regulation, as well as optical encoder replacement.
Block Diagram
The functional blocks of this device are shown below:
Figure 2:
AS5047P Block Diagram
VDD
VDD3V3
Volatile Memory
OTP
SPI
LDO
ABI
Hall
Sensors
Analog
Front-End
A/D
AGC
GND
ATAN
(CORDIC)
INTERPOLATOR
Dynamic Angle
Error
Compensation
UWV
PWM Decoder
Selectable on I or W
CSn
SCL
MISO
MOSI
A
B
I/PWM
U
V
W / PWM
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Pin Assignment
Pin Assignment
Figure 3:
TSSOP-14 Pin Assignment
CSn
CLK
MISO
MOSI
TEST
B
A
Figure 4:
Pin Description
Pin Number Pin Name
5
6
7
3
4
1
2
CSn
CLK
MISO
MOSI
Test
B
A
Pin Type
Digital input
Digital input
Digital output
Digital input
Digital output
Digital output
Description
SPI chip select (active low)
SPI clock
SPI master data input, slave output
SPI master data output, slave input
Test pin (connect to ground)
Incremental signal B
Incremental signal A
I / PWM
GND
VDD3V
VDD
U
V
W / PWM
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Pin Assignment
Pin Number Pin Name
10
11
8
9
W/PWM
V
U
VDD
12
13
14
VDD3V3
GND
I
Pin Type
Digital output
Digital output
Digital output
Power supply
Power supply
Power supply
Digital output
Note(s) and/or Footnote(s):
1. Floating state of a digital input is not allowed.
2. If SPI is not used, a Pull up resistor on CSn is required.
3. If SPI is not used, a Pull down resistor on CLK and MOSI is required.
4. If SPI is not used, the pins MISO can be left open.
5. If ABI, UVW or PWM is not used, the pins can be left open.
Description
Commutation signal W or PWM
Commutation signal V
Commutation signal U
5V power supply voltage for on-chip regulator
3.3V on-chip low-dropout (LDO) output. Requires an external decoupling capacitor (1uF)
Ground
Incremental signal I (index) or PWM
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Absolute Maximum Ratings
Absolute Maximum Ratings
Stresses beyond those listed parameters under
Absolute Maximum Ratings may cause permanent damage to
the device. These are stress ratings only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters regarding normal operation of the sensor are listed in section
.
Figure 5:
Absolute Maximum Ratings
Symbol
VDD5
VDD3
V
SS
V in
Parameter Min
DC supply voltage at VDD pin -0.3
DC supply voltage at VDD3V3 pin
-0.3
DC supply voltage at GND pin -0.3
I scr
ESD
P t
Input pin voltage
Input current
(latch-up immunity)
Electrostatic discharge
Total power dissipation
(all supplies and outputs)
-100
±2
Max
7.0
5.0
0.3
VDD+0.3
100
150
Units
V
V
V
V mA kV mW
Note
AEC-Q100-004
AEC-Q100-002
Ta5V0
Ta3V3
TaProg
Ambient temperature 5V0
Ambient temperature 3V3
Programming temperature
-40
-40
5
125
125
45
°C
°C
°C
In the 5.0V power supply mode only
In the 3.3V power supply mode if
= 0
Programming @ room temperature (25°C ± 20°C)
T strg
T body
RH
NC
Storage temperature
Package body temperature
Relative humidity non-condensing
-55
5
150
260
85
°C
°C
%
IPC/JEDEC J-STD-020
MSL Moisture sensitivity level 3
Represents a maximum floor lifetime of 168h
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Electrical Characteristics
Electrical Characteristics
All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical
Quality Control) methods.
Figure 6:
Electrical Characteristics
Symbol Parameter Conditions
VDD
VDD3V3
VDD_Burn
V
REG
Positive supply voltage 5.0V operation mode
Positive supply voltage
3.3V operation mode; only from -40 to 125°C
Positive supply voltage
Regulated Voltage
Supply voltage required for programming in 3.3V operation
Voltage at VDD3V3 pin if
VDD ≠ VDD3V3
I
DD
Supply current
V
IH
High-level input voltage
V
IL
Low-level input voltage
V
V
OH
OL
High-level output voltage
Low-level output voltage
I_Out
C_L
Current on digital output (ABI, UVW)
I_Out_MISO
Current on digital output MISO
Capacitive load on digital output
Min
4.5
3.0
3.3
3.2
0.7
×
VDD
VDD-0.5
Typ
5.0
3.3
3.4
Max
5.5
3.6
3.5
3.6
15
0.3
×
VDD
V
SS
+0.4
1
4
50
Units
V
V
V
V mA
V
V
V
V mA mA pf
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Magnetic Characteristics
Magnetic Characteristics
Figure 7:
Magnetic Specifications
Symbol
Bz
Parameter Conditions
Orthogonal magnetic field strength, normal operating mode
Required orthogonal component of the magnetic field strength measured at the die's surface along a circle of 1.1mm
Min Max Unit
35 70 mT
Note(s) and/or Footnote(s):
1. it is possible to operate the AS5047P below 35mT with reduced noise performance.
System Characteristics
Figure 8:
System Specifications
Symbol Parameter Conditions
RES_ABI
INL
INL
OPT
25°C
@
DIS+TEMP
Non-linearity, optimum placement of the magnet
INL
OPT+TEMP
Non-linearity optimum placement of the magnet over the full
Temperature Range
Non-linearity @ displacement of magnet and temperature -40°C to
150°C
Assuming N35H Magnet
(D=8mm, H=3mm) 500
μ m displacement in x and y z-distance @ 2000
μ m
ON_PWM t
RES
ONL delay
Core resolution
Resolution of the ABI interface
RMS output noise
(1 sigma). Not tested, guaranteed by design.
RMS output noise
(1 sigma) on PWM interface
System propagation delay –core
Programmable with register setting (
)
Orthogonal component for the magnetic field within the specified range (Bz),
Orthogonal component for the magnetic field within the specified range (Bz)
Reading angle via SPI
Min Typ Max
14
100
90
4096
±0.8
±1
±1.2
0.068
0.068
110
Units
bit
Steps per revolution degree degree degree degree degree
μs
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Timing Characteristics
Symbol
t delay_
DAEC t sampl
DAE
1700
DAE max
DAE acc
MS
Parameter Conditions
System propagation delay after dynamic angle error correction.
Sampling rate
Dynamic angle error
At ABI and UVW interfaces
Refresh rate at SPI
At 1700 RPM constant speed
Dynamic angle error
At 14500 RPM constant speed
Dynamic angle error at constant acceleration
(25krad/s²)
Maximum speed
25k radians/s² constant acceleration
Min Typ Max
1.5
202 222
1.9
247
0.02
0.18
0.175
28000
Units
μs ns degree degree degree
RPM
Reference magnet:
N35H, 8mm diameter; 3mm thickness.
Timing Characteristics
Figure 9:
Timing Specifications
Symbol
t pon
Parameter
Power-on time
Conditions
Time frame between
VDD > VDDmin and first valid angular value. Not tested, guaranteed by design
Min Typ Max
10
Units
ms
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Detailed Description
Detailed Description
The AS5047P is a Hall-effect magnetic sensor using a CMOS lateral technology. The lateral Hall sensors convert the magnetic field component perpendicular to the surface of the chip into a voltage.
The signals from the Hall sensors are amplified and filtered by the analog front-end (AFE) before being converted by the analog-to-digital converter (ADC). The output of the ADC is processed by the hardwired CORDIC (coordinate rotating digital computer) block to compute the angle and magnitude of the magnetic vector. The intensity of the magnetic field
(magnitude) is used by the automatic gain control (AGC) to adjust the amplification level for compensation of the temperature and magnetic field variations.
The internal 14-bit resolution is available by readout register via the SPI interface. The resolution on the ABI output can be programmed from 4096 to 100 steps per revolution.
The Dynamic Angle Error Compensation block corrects the calculated angle regarding latency, by using a linear prediction calculation algorithm. At constant rotation speed the latency time is internally compensated by the AS5047P, reducing the dynamic angle error at the SPI, ABI and UVW outputs. The
AS5047P allows to switch OFF the UVW output interface to display the absolute angle as PWM-encoded signal on the pin W.
At higher speeds, the interpolator fills in missing ABI pulses and generates the UVW signals with no loss of resolution. The non-volatile settings in the AS5047P can be programmed through the SPI interface without any dedicated programmer.
The AS5047P is built for high speed application up to 28krpm.
Power Management
The AS5047P can be either powered from a 5.0V supply using the on-chip low-dropout regulator or from a 3.3V voltage supply. The LDO regulator is not intended to power any other loads, and it needs a 1 μF capacitor to ground located close to the chip for decoupling as shown in
.
In 3.3V operation, VDD and VREG must be tied together.
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Detailed Description
Figure 10:
5.0V and 3.3V Power Supply Options
4.5 - 5.5V
VDD
100n F
5.0V Operation
LDO
VDD3V3
3.0 – 3.6V
VDD
1µF
100n F
3.3V Operation
LDO
GND GND
AS5047P AS5047P
VDD3V3
After applying power to the chip, the power-on time ( t
) must elapse before the AS5047P provides the first valid data.
Dynamic Angle Error Compensation
The AS5047P uses 4 integrated Hall sensors which produce a voltage proportional to the orthogonal component of the magnetic field to the die. These voltage signals are amplified, filtered, and converted into the digital domain to allow the
CORDIC digital block to calculate the angle of the magnetic vector. The propagation of these signals through the analog front-end and digital back-end generates a fixed delay between the time of measurement and the availability of the measured angle at the outputs. This latency generates a dynamic angle error represented by the product of the angular speed (
ω
)and the system propagation delay ( t
):
DAE
=
ω
x
t
The dynamic angle compensation block calculates the current magnet rotation speed (
ω
) and multiplies it with the system propagation delay ( t
) to determine the correction angle to reduce this error. At constant speed, the residual system propagation delay is t
The angle represented on the
compensated by the Dynamic Angle Error Compensation algorithm. It is also possible to disable the Dynamic Angle Error
Compensation with the setting
. Disabling the
Dynamic Angle Error Compensation gives a noise benefit of
0.016 degree rms.This setting can be advantageous for low speed (under 100rpm) respectively static positioning applications.
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Detailed Description
Figure 11:
SPI Timing Diagram
SS/
(Input)
SCK
(Input)
MISO
(Output)
MOSI
(Input) t
L t sck t sckH t sckL t
MISO data[15] t
MOSI data[15] data[14] data[14]
SPI Interface (slave)
The SPI interface is used by a host microcontroller (master) to read or write the volatile memory as well as to program the non-volatile OTP registers. The AS5047P SPI only supports slave operation mode. It communicates at clock rates up to 10 MHz.
The AS5047P SPI uses mode=1 (CPOL=0, CPHA=1) to exchange data. As shown in
, a data transfer starts with the falling edge of CSn (SCL is low). The AS5047P samples MOSI data on the falling edge of SCL. SPI commands are executed at the end of the frame (rising edge of CSn). The bit order is MSB first.
Data is protected by parity.
SPI Timing
The AS5047P SPI timing is shown in
.
t
XSSH t
H data[0] t
OZ t
OZ data[0]
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Detailed Description
Figure 12:
SPI Timing
Parameter
t
L t clk t clkL t clkH t
H t
CSn t
MOSI t
MISO t
OZ
Description
Time between CSn falling edge and CLK rising edge
Serial clock period
Low period of serial clock
High period of serial clock
Time between last falling edge of CLK and rising edge of CSn
High time of CSn between two transmissions
Data input valid to falling clock edge
CLK edge to data output valid
Release bus time after CS rising edge.
Min
350
100
50
50 tclk / 2
350
20
Max
51
10
SPI Transaction
An SPI transaction consists of a 16-bit command frame followed by a 16-bit data frame.
shows the structure of the command frame.
Units
ns ns ns ns ns ns ns ns ns
Figure 13:
SPI Command Frame
Bit
15
14
13:0
Name
PARC
R/W
ADDR
Description
Parity bit (even) calculated on the lower 15 bits of command frame
0: Write
1: Read
Address to read or write
To increase the reliability of communication over the SPI, an even parity bit
PARC must be generated and sent. A wrong
setting of the parity bit causes an parity bit error which is shown the PARERR bit in the error flag register. The parity bit is calculated from the lower 15 bits of the command frame. The
16-bit command consists of a register address and read/write bit which indicates if the transaction is a read or write and the parity bit.
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Detailed Description
Figure 14:
SPI Read Data Frame
Bit
15
14
13:0
Figure 14 shows the read data frame.
Name
PARD
EF
DATA
Description
Parity bit (even) calculated on the lower 15 bits
0: No command frame error occurred
1: Error occurred
Data
The parity bit
is calculated by the AS5047D of the lower
15 bits of data frame. If an error occurred in the previous SPI command frame, the EF bit is set high. The SPI read is sampled on the rising edge of CSn and the data is transmitted on MISO with the next read command, as shown in
.
Figure 15:
SPI Read
CSn
MOSI
MISO
Command
Read ADD[m]
Command
Read ADD[n]
Command
Read ADD[o]
Command
Read ADD[p]
Data
DATA (
ADD[m]
)
Data
DATA (
ADD[n]
)
Data
DATA (
ADD[o]
)
Figure 16:
SPI Write Data Frame
Bit
15
14
13:0
Name
PARD
0
DATA
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Description
Parity bit (even)
Always low
Data
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Detailed Description
The parity bit
must be calculated from the 16-bit data.
In an SPI write transaction, the write command frame is followed by a write data frame at MOSI. The write data frame consists of the new content of register which address is in the command frame.
During the new content is transmitted on MOSI by the write data frame, the old content is send on MISO. At the next command on MOSI the actual content of the register is transmitted on MISO, as shown in
Figure 17:
SPI Write Transaction
CSn
MOSI
MISO
Comm and
Write ADD[n]
Data to write into A DD[n]
DATA (x)
Comm and
Write ADD[m]
Data to write into A DD[m]
DATA (y)
Comm and
Next command
Data content ADD[n]
DATA (
ADD[n]
)
New Data content of ADD[n] Data content ADD[m]
DATA (x) DATA (
ADD[m]
)
New Data content of ADD[m]
DATA (y)
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Detailed Description
Volatile Registers
The volatile registers are shown in
a 14-bit address.
Figure 18:
Volatile Register Table
Address
0x0000
0x0001
0x0003
0x3FFC
0x3FFD
0x3FFE
0x3FFF
Name
NOP
ERRFL
PROG
DIAAGC
MAG
ANGLEUNC
ANGLECOM
Default
0x0000
0x0000
0x0000
0x0180
0x0000
0x0000
0x0000
Description
No operation
Error register
Programming register
Diagnostic and AGC
CORDIC magnitude
Measured angle without dynamic angle error compensation
Measured angle with dynamic angle error compensation
Reading the NOP register is equivalent to a nop (no operation) instruction for the AS5047P.
Figure 19:
ERRFL (0x0001)
Name
PARERR
INVCOMM
FRERR
Read/Write Bit Position
R 2
R
R
1
0
Description
Parity error
Invalid command error: set to 1 by reading or writing an invalid register address
Framing error: is set to 1 when a non-compliant SPI frame is detected
Reading the ERRFL register automatically clears its contents
(ERRFL=0x0000).
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Detailed Description
Figure 20:
PROG (0x0003)
Name
PROGVER
PROGOTP
OTPREF
PROGEN
Read/Write Bit Position
R/W
R/W
R/W
R/W
6
3
2
0
Description
Program verify: must be set to 1 for verifying the correctness of the OTP programming
Start OTP programming cycle
Refreshes the non-volatile memory content with the
OTP programmed content
Program OTP enable: enables programming the entire
OTP memory
The PROG register is used for programming the OTP memory.
(See programming the zero position.)
Figure 21:
DIAAGC (0x3FFC)
Name
MAGL
MAGH
COF
LF
AGC
Read/Write Bit Position
R
R
R
11
10
9
R
R
8
7:0
Description
: Magnetic field strength too low; AGC=0xFF
: Magnetic field strength too high; AGC=0x00
: CORDIC overflow
: Offset compensation
LF=0:internal offset loops not ready regulated
LF=1:internal offset loop finished
value
Figure 22:
MAG (0x3FFD)
Name
CMAG
Read/Write Bit Position
R 13:0
Description
CORDIC magnitude information
Figure 23:
ANGLE (0x3FFE)
Name
CORDICANG
Read/Write Bit Position
R 13:0
Description
Angle information without dynamic angle error compensation
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Detailed Description
Figure 24:
ANGLECOM (0x3FFF)
Name Read/Write
DAECANG R
Bit Position Description
Non-Volatile Registers (OTP)
The OTP (One-Time Programmable) memory is used to store the absolute zero position of the sensor and the customer settings permanently in the sensor IC.
SPI write/read access is possible several times for all non-volatile registers (soft write). Soft written register content will be lost after a hardware reset.
The programming itself can be done just once. Therefore the content of the non-volatile registers is stored permanently in the sensor. The register content is still present after a hardware reset and cannot be overwritten.
For a correct function of the sensor the OTP programming is not required. If no configuration or programming is done, the non-volatile registers are in default state 0x0000h..
Figure 25:
Non-Volatile Register Table
Address
0x0016
0x0017
0x0018
0x0019
Name
ZPOSM
ZPOSL
SETTINGS1
SETTINGS2
Default
0x0000
0x0000
0x0001
0x0000
Description
Zero position LSB /MAG diagnostic
Custom setting register 1
Custom setting register 2
Figure 26:
ZPOSM (0x0016)
Name
ZPOSM
Read/Write/Program Bit Position
R/W/P 7:0
Description
8 most significant bits of the zero position
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Detailed Description
Figure 27:
ZPOSL (0x0017)
Name
ZPOSL comp_l_error_en comp_h_error_en
Read/Write/Program Bit Position
R/W/P 5:0
R/W/P
R/W/P
6
7
Description
6 least significant bits of the zero position
This bit enables the contribution of
MAGH (Magnetic field strength too high) to the error flag
This bit enables the contribution of MAGL
(Magnetic field strength too low) to the error flag
Figure 28:
SETTINGS1 (0x0018)
Name
Factory
Setting
NOISESET
DIR
Read/Write/Program Bit Position
R
R/W/P
R/W/P
0
1
2
UVW_ABI
DAECDIS
Dataselect
PWMon
R/W/P
R/W/P
R/W/P
R/W/P
R/W/P
3
4
5
6
7
Description
Pre-Programmed to 1
Defines the PWM Output
(0 = ABI is operating, W is used as PWM
1 = UVW is operating, I is used as PWM)
Disable Dynamic Angle Error Compensation
(0 = DAE compensation ON, 1 = DAE compensation OFF)
ABI decimal or binary selection of the ABI
pulses per revolution
This bit defines which data can be read form address 16383dec (3FFFhex).
0->DAECANG
1->CORDICANG
Enables PWM (setting of UVW_ABI Bit necessary)
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Detailed Description
Figure 29:
SETTINGS2 (0x0019)
Name
UVWPP
HYS
ABIRES
Read/Write/Program Bit Position
R/W/P
R/W/P
R/W/P
2:0
4:3
7:5
Description
number of pole pairs
(000 = 1, 001 = 2, 010 = 3, 011 = 4, 100 = 5,
101 = 6, 110 = 7, 111 = 7)
ABI Incremental Interface
The AS5047P can send the angle position to the host microcontroller through an incremental interface. This interface is available simultaneously with the other interfaces.
By default, the incremental interface is set to work at the highest resolution 4096 step per revolution, or 1024 pulses per revolution (ppr). It is possible to select between a decimal and binary pulses per revolution, respectively with the bit
and select the pulses per revolution with the bit
as shown in
Figure 30:
ABI Resolution Setting
ABIRES
100
101
110
111
000
001
010
011
000
001
010
ABIBIN
0
0
0
0
0
0
0
0
1
1
1
Steps Per Revolution
800
400
200
100
4000
2000
1600
1200
4096
2048
1024
Pulses Per Revolution
200
100
50
25
1000
500
400
300
1024
512
256
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Detailed Description
The phase shift between the signals A and B indicates the rotation direction: e.g. DIR-Bit = 0, clockwise (A leads, B follows) or counterclockwise (B leads, A follows). During the start-up time, after power ON to the chip, all three ABI signals are high.
Figure 31:
ABI Signals at 11-Bit Resolution
A
B
I
Steps
N-7 N-6 N-5 N-4 N-3 N-2 N-1 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 N-1 N-2 N-3 N-4
Clockwise rotation Counter-clockwise rotation
The
Figure 31 shows the ABI signal flow if the magnet rotates
in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047D. With the bit
DIR , it is possible to invert the rotation direction.
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AS5047P −
Detailed Description
UVW Commutation Interface
The AS5047P can emulate the UVW signals generated by the three discrete Hall switches commonly used in BLDC motors.
The
field in the SETTINGS register selects the number of pole pairs of the motor (from 1 to 7 pole pairs). The UVW signals are generated with 14-bit resolution.
During the start-up time, after power ON of the chip, the UVW signals are low.
Figure 32:
UVW Signals
U
V
W
angle
0° 60° 120° 180° 240° 300° 360°
Clockwise rotation
360° 300° 240° 180° 120° 60° 0°
Counter-clockwise rotation
shows the UVW signal flow if the magnet rotates in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047D. With the bit
DIR , it is possible to invert the rotation direction.
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Figure 33:
Pulse Width Modulation Encoded Signal
AS5047P −
Detailed Description
PWM
The PWM can be enabled with the bit setting PWMon. The PWM encoded signal is displayed on the pin W or the pin I. The bit setting UVW_ABI defines which output is used as PWM.The
PWM output consists of a frame of 4119 PWM clock periods, as shown in
. The PWM frame has the following sections:
• 12 PWM Clocks for INIT
• 4 PWM Clocks for Error detection
• 4095 PWM clock periods of data
• 8 PWM clock periods low
The angle is represented in the data part of the frame with a
12-bit resolution. One PWM clock period represents 0.088 degree and has a typical duration of 444 ns.
If the embedded diagnostic of the AS5047P detects any error the PWM interface displays only 12 clock periods high
(0.3% duty-cycle). Respectively the 4 clocks for error detection are forced to low.
frame
12 clock periods high
4 clock periods
Error detection
4095 clock periods data
8 clock periods low time
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AS5047P −
Detailed Description
Hysteresis
The hysteresis can be programmed in the
bits if the
SETTINGS2 register and depends on the chosen resolution of the incremental interface (
), as shown in the
.
Figure 34:
Hysteresis Settings
HYS
00
01
10
11
Hysteresis Related to 11 Bit
ABI Resolution
1
0
3
2
Automatic Gain Control (AGC) and CORDIC
Magnitude
The AS5047P uses AGC to compensate for variations in the magnetic field strength due to changes of temperature, air gap between the chip and the magnet, and demagnetization of the magnet. The automatic gain control value can be read in the
AGC field of the DIAAGC register. Within the specified input magnetic field strength (
), the Automatic Gain Control works in a closed loop and keeps the CORDIC magnitude value (
constant. Below the minimum input magnetic field strength, the CORDIC magnitude decreases and the MAGL bit is set.
Diagnostic Features
The AS5047P supports embedded self-diagnostics.
MAGH : magnetic field strength too high, set if AGC = 0x00
.
This indicates the non-linearity error may be increased.
: magnetic field strength too low, set if AGC = 0xFF
.
This indicates the output noise of the measured angle may be increased.
: CORDIC overflow. This indicates the measured angle is not reliable.
: offset compensation completed. At power-up, an internal offset compensation procedure is started, and this bit is set when the procedure is completed.
ams Datasheet
[v1-01] 2016-Apr-28
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AS5047P −
Detailed Description
OCF Error / COF Error
In case of an OCF or COF error, all outputs are changing into a safe state:
SPI Output: Information in the DIAAGC (0x3FFC) register. The angle information is still valid.
PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock
Periods = low. Additional there is no angle information valid
(all 4096 clock periods = low)
ABI Output: The state of ABI is frozen to ABI = 111
UVW Output: The state of UVW is frozen to UVW = 000
MAGH Error / MAGL Error
Default diagnostic setting for MAGH error /MAGL error:
In case of a MAGH error or MAGL error, there is no safe state on the PWM,ABI or UVW outputs if comp_h_error_en is 0 and comp_l_error_en is 0.
The error flags can be read out with the DIAAGC (0x3FFC) register.
Enhanced diagnosis setting for MAGH error / MAGL error:
In case of a MAGH error or MAGL error, the PWM,ABI or UVW outputs are going into a safe state if comp_h_error_en is 1 and comp_l_error_en is 1. The device is operating with the performance as explained.
SPI Output: Information in the DIAAGC (0x3FFC) register. The angle information is still valid, if the MAGH or MAGL error flag is on.
PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock
Periods = low. Additional there is no angle information valid (all
4096 clock periods = low)
ABI Output: The state of ABI is frozen to ABI = 111
UVW Output: The state of UVW is frozen to UVW = 000
Important:
When comp_(h/l)_error_en is enabled a marginal magnetic field input can cause toggling of MAGH or MAGL which will lead to toggling of the ABI/UVW outputs between operational mode and failure mode.
ams Datasheet
[v1-01] 2016-Apr-28
AS5047P −
Application Information
Application Information
Burn and Verification of the OTP Memory
Step-by-step procedure to permanently program the non-volatile memory (OTP):
Figure 35:
Minimum Programming Diagram for the AS5047P in 5 V Operation
5V operation
VDD during programming 4.5 – 5.5V
VDD
Programmer
CSn
CLK
MISO
MOSI
TEST
A
B
I
GND
VDD3V
VDD
U
V
W
100nF 1μF
GND
Note(s) and/or Footnote(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
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AS5047P −
Application Information
Figure 36:
Minimum Programming Diagram for the AS5047P in 3.3V Operation
3.3V operation
VDD during programming: 3.3V – 3.5V
VDD
Programmer
CSn
CLK
MISO
MOSI
TEST
A
B
I
GND
VDD3V
VDD
U
V
W
100nF
GND
Note(s) and/or Footnote(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
Figure 37:
Programming Parameter
Symbol Parameter
T aProg
Programming temperature
V
DD
V
DD
I
Prog
Positive supply voltage
Positive supply voltage
Current for programming
Conditions
Programming @ Room
Temperature
(25°C ±20°C
5 V operation mode. Supply voltage during programming
3.3 V operation mode.
Supply voltage during programming
Max current during OTP burn procedure.
Min
5
4.5
3.3
Typ Max Units
5
45
5.5
3.5
100
°C
V
V mA
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AS5047P −
Application Information
The programming can either be performed in 5V operation using the internal LDO (1uF on regulator output pin), or in 3V
Operation but using a supply voltage between 3.3V and 3.5V.
1.
Power ON cycle
2.
Write the
registers with the
Custom settings for this application (Bit0 of Settings1 is a factory bit. For programming its mandatory to set this bit to 0).
3.
Place the magnet at the desired zero position
4.
Read out the measured angle from the
register
5.
Write ANGLE [5:0] into the
register and ANGLE
[13:6] into the
register
6.
Read reg(0x0016) to reg(0x0019)
→
Read register step1
7.
Comparison of written content (settings and angle) with content of read register step1 (Removing of Bit0 of
Settings1 from the comparison is mandatory. Bit0 is preprogrammed)
8.
If point 7 is correct, enable OTP read / write by setting
= 1 in the
9.
Start the OTP burn procedure by setting
= 1 in the
register
10. Read the
register until it reads 0x0001
(Programming procedure complete)
11. Clear the memory content writing 0x00 in the whole non-volatile memory
12. Set the
= 1 to set the Guard band for the guard band test
13. Refresh the non-volatile memory content with the OTP content by setting
= 1
14. Read reg(0x0016) to reg(0x0019)
→
Read register step2
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AS5047P −
Application Information
15. Comparison of written content (settings and angle) with content of read register step2.
Mandatory: guard band test (Removing of Bit0 of
Settings1 from the comparison is mandatory. Bit0 is preprogrammed)
16. New power ON cycle, if
point 16
is correct. If
point 16
fails, the test with the guard band test
1
was not successful and the device is incorrectly programmed. A reprogramming is not allowed!
17. Read reg(0x0016) to reg(0x0019)
→
Read register step3
18. Comparision of written content (settings and angle) with content of read register step3(Removing of Bit0 of
Settings1 from the comparison is mandatory. Bit0 is preprogrammed).
19. If
point 19
is correct, the programming was successful.
If
point 19
fails, device is incorrectly programmed. A reprogramming is not allowed
1. Guard band test:
- Restricted to temperature range: 25 °C ± 20 °C
- Right after the programming procedure (max. 1 hour with same conditions 25°C ± 20 °C), same VDD voltage.
The guard band test is only for the verification of the burned OTP fuses during the programming sequence.
A use of the guard band in other cases is not allowed.
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ams Datasheet
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AS5047P −
Application Information
Figure 38:
OTP Memory Burn and Verification Flowchart
Power on cycle START
AS5147 settings
Write reg(0x0018)
Write reg(0x0019)
Write
Reg(0x0016)=0x00
Reg(0x0017)=0x00
Reg(0x0018=0x00
Reg(0x0019)=0x00
Write
Reg(0x0003)=0x40
Clear memory
Position of the magnet to the zero position
Set the magnet to the zero position
Set Guardband
Read ANGLE
Write Angle into ZPOSL and ZPOSM
Read Register step 1
Comparison of written content
(settings and angle) with content of Read Register step 1
Unlock OTParea for burning
(PROGEN=1)
Start OTP burning procedure
(PROGOTP=1)
Read OTP_CTRL
Read reg(0x3FFF)
Not correct
Write
Reg(0x0017(5:0))= reg(0x3FFF(5:0))
Reg(0x0016(7:0))= reg(0x3FFF(13:6))
Read
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Verify 1 correct
Write
Reg(0x0003)=0x01
Write
Reg(0x0003)=0x08
Read
Reg(0x0003)
Write
Reg(0003)=0x04
Refresh memory with OTP content
YES
Read
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0016)
Read Register step 2
Verify 2
Not correct correct
Power-on cycle
Guardbandtest fails.
Wrong programming.
Reprogramming not allowed
Comparison of written content (settings and angle) with content of Read Register step 2 mandatory Guardband-Test
Read
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0016)
Read Register step 3
Verify 3
Not correct correct
END
Correct programming and verification
END
Wrong programming
Reprogramming not allowed
Comparison of written content (settings and angle) with content of Read Register step 3
NO
OTP burning procedure complete if Reg(0x0003) =0x01
Reg(0x0003)=0x01
ams Datasheet
[v1-01] 2016-Apr-28
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AS5047P −
Application Information
Figure 39:
Minimum Circuit Diagram for the AS5047P
4.5 – 5.5V
VDD
MCU
CSn
CLK
MISO
MOSI
TEST
A
B
GND
I
GND
VDD3V
VDD
U
V
W
100nF 1μF
Note(s) and/or Footnote(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
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ams Datasheet
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AS5047P −
Package Drawings & Markings
Package Drawings & Markings
The axis of the magnet must be aligned over the center of the package.
Figure 40:
Package Outline Drawing
RoHS
Green
Symbol Min
E
E1 c
D
A
A1
A2 b e
L
L1
0.09
4.90
-
4.30
-
0.05
0.80
0.19
-
0.45
-
Nom
-
-
1.00
-
-
5.00
6.40 BSC
4.40
0.65 BSC
0.60
1.00 REF
Max
0.20
5.10
-
4.50
1.20
0.15
1.05
0.30
-
0.75
-
Note(s) and/or Footnote(s):
1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.
2. All dimensions are in millimeters. Angles are in degrees.
3. N is the total number of terminals.
bbb ccc ddd
N
R
R1
S
Θ
1
Θ
2
Θ
3 aaa
Symbol Min
-
-
-
-
0.09
0.09
0.20
0º
-
-
Nom
12 REF
12 REF
0.10
0.10
-
-
-
-
0.05
0.20
14
Max
-
-
-
-
-
-
-
8º
-
-
ams Datasheet
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AS5047P −
Pack age Drawings & Mark ings
Figure 41:
Packaging Code
YY
Last two digits of the current year
WW
Manufacturing week
M
Plant identifier
ZZ
Free choice / traceability code
@
Sublot identifier
Figure 42:
Package Marking
AS5047P
YYWWMZZ
@
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AS5047P −
Mechanical Data
Mechanical Data
Figure 43:
Angle Detection by Default (no zero position programmed)
0 degree
S
N
90 degree
N
180 degree
S
270 degree
ams Datasheet
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AS5047P −
Mechanical Data
Figure 44:
Die Placement and Hall Array Position
ɩŜɨɪɥʭɥŜɩɪɬ ɥŜɪɥɭʭɥŜɨɥɥ ɥŜɭɰɫʭɥŜɨɬɥ ɥŜɩɪɭʭɥŜɨɥɥ
Note(s) and/or Footnote(s):
1. Dimensions are in mm.
2. The Hall array center is located in the center of the IC package. Hall array radius is 1.1mm.
3. Die thickness is 203μm nominal.
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AS5047P −
Ordering & Contact Information
Ordering & Contact Information
Figure 45:
Ordering Information
Ordering
Code
AS5047P-ATST
AS5047P-ATSM
Package
TSSOP-14
TSSOP-14
Marking
AS5047P
AS5047P
Delivery Form
13” Tape & Reel in dry pack
7” Tape & Reel in dry pack
Delivery
Quantity
4500 pcs/reel
500 pcs/reel
Buy our products or get free samples online at: www.ams.com/ICdirect
Technical Support is available at: www.ams.com/Technical-Support
Provide feedback about this document at: www.ams.com/Document-Feedback
For further information and requests, e-mail us at: [email protected]
For sales offices, distributors and representatives, please visit: www.ams.com/contact
Headquarters
ams AG
Tobelbaderstrasse 30
8141 Premstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0
Website: www.ams.com
ams Datasheet
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AS5047P −
RoHS Compliant & ams Green Statement
RoHS Compliant & ams Green
Statement
RoHS:
The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes.
ams Green (RoHS compliant and no Sb/Br):
ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous material).
Important Information:
The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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AS5047P −
Copyrights & Disclaimer
Copyrights & Disclaimer
Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,
Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services.
ams Datasheet
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AS5047P −
Document Status
Document Status
Document Status
Product Preview
Preliminary Datasheet
Datasheet
Datasheet (discontinued)
Product Status
Pre-Development
Pre-Production
Production
Discontinued
Definition
Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice
Information in this datasheet is based on products in the design, validation or qualification phase of development.
The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice
Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of
Trade
Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and should not be used for new designs
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AS5047P −
Revision Information
Revision Information
Changes from 1-00 (2014-Oct-31) to current revision 1-01 (2016-Apr-28)
Updated Applications section
Updated notes under Figure 4
Updated text under Absolute Maximum Ratings
Updated Figure 6
Updated Figure 9
Updated text under Detailed Description
Updated text under Dynamic Angle Error Compensation
Updated Figure 11
Updated SPI Transaction section
Updated Figure 21
Updated Non-Volatile Registers (OTP) section
Updated Figure 32 and text under it
Updated Figure 33
Updated PWM section
Updated text under Diagnostic Features
Updated text under MAGH Error / MAGL Error
Updated text under Figure 37
Updated Figure 38
Updated Figure 43
Updated Figure 44
Note(s) and/or Footnote(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
2. Correction of typographical errors is not explicitly mentioned.
Page
ams Datasheet
[v1-01] 2016-Apr-28
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Content Guide
AS5047P −
Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
2 Block Diagram
3 Pin Assignment
5 Absolute Maximum Ratings
6 Electrical Characteristics
7 Magnetic Characteristics
7 System Characteristics
8 Timing Characteristics
9 Detailed Description
9 Power Management
10 Dynamic Angle Error Compensation
11 SPI Interface (slave)
11 SPI Timing
12 SPI Transaction
15 Volatile Registers
17 Non-Volatile Registers (OTP)
19 ABI Incremental Interface
21 UVW Commutation Interface
22 PWM
23 Hysteresis
23 Automatic Gain Control (AGC) and CORDIC Magnitude
23 Diagnostic Features
24 OCF Error / COF Error
24 MAGH Error /MAGL Error
25 Application Information
25 Burn and Verification of the OTP Memory
31 Package Drawings & Markings
33 Mechanical Data
35 Ordering & Contact Information
36 RoHS Compliant & ams Green Statement
37 Copyrights & Disclaimer
38 Document Status
39 Revision Information
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[v1-01] 2016-Apr-28
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