Application note
ST231 to ST240 software porting guide
Introduction
Most application software written in C or C++ for the ST231 runs on the ST240 after recompilation without modification to the source code. Some highly optimised application code may benefit from reoptimisation for the ST240.
This guide is written to help programmers understand any changes that must be made to
ST231 software in order to port it to the ST240.
Chapter 1: ST240 new features lists some of
the new capabilities of the ST240.
Chapter 2: Differences between ST231 and ST240 ,
identifies the most important differences between the ST231 and the ST240.
References
This document should be read in conjunction with:
●
●
●
ST240 Core and instruction set architecture reference manual
ST200 Micro toolset compiler manual
ST200 Micro toolset user manual
(ADCS 7508723)
(ADCS 8063762)
(ADCS 8059133)
January 2008 8100869 Rev A 1/10 www.st.com
Contents
Contents
ST231 to ST240 Software porting guide
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3
ST240 new features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Differences between ST231 and ST240 . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1
2.1.2
2.1.3
Deletion of redundant multiplication operations . . . . . . . . . . . . . . . . . . . . 4
Deletion of entire operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Deletion of immediate forms of operations . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Processor mechanisms and control registers . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1
2.2.2
2.2.3
2.2.4
Trap handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Performance monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Minimum page size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Removal of dismissible loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Cacheability management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Branch register width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5
Performance counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.6
Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2/10 8100869
ST231 to ST240 Software porting guide ST240 new features
The ST240 contains several new features that improve the performance of applications.
Most of these features are exploited by applications without any need for programmer intervention. Application code can benefit from the following new features:
● floating point hardware:
– code using single precision floating point runs much faster
– some applications can be implemented in floating point almost as efficiently as fixed point; this can speed up the development of new applications
● 4-way set associative instruction cache:
– the ST240 cache delivers excellent performance without the need for profiling driven cache optimisation
●
●
●
– the performance of applications running on the ST240 is less sensitive to changes to source code organisation than application run on the ST231
64-bit load and store operations, and conditional load, store and prefetch:
– 64-bit loads and stores provide performance and code size benefits (in particular, function entry and exit sequences are improved by pairing memory accesses)
– loop pipelining uses conditional loads to schedule required memory reads at the earliest possible time in a safe way; in the ST231 the use of dismissible loads to implement this optimization can trigger memory accesses not required by the program, possibly generating unnecessary cache misses saturating arithmetic support:
– ETSI functions map onto efficient processor operations enhanced set of cache operations:
– data side: invalidate and flush address added
●
– instruction side: purge by address or set added
SIMD:
– the use of SIMD operations can significantly speed up data-parallel applications that use 8- and 16-bit data (in particular video encoding and decoding, and imaging applications)
– programmers have to explicitly recode to use SIMD operations, as in general the compiler cannot deduce their use
For full details of these features please refer to the ST240 Core and instruction set architecture manual (8059133) .
8100869 3/10
Differences between ST231 and ST240
2
ST231 to ST240 Software porting guide
Differences between ST231 and ST240
The areas in which minor incompatibilities exist between the ST231 and the ST240 are in the operations (instructions) implemented, some of the processor control mechanisms and control registers, details of the cache management, the performance counters, the branch registers, and some of the peripherals. Most of these differences are hidden from the application programmer by the compiler, the operating system and the board support packages.
2.1 Operations
The ST231 and ST240 instruction set architectures (ISAs) support both register and immediate forms of many operations. Some of the operations in the ST231 ISA are completely absent from the ST240 ISA; in other cases, the immediate form has been deleted leaving only the register form.
The ST231 ISA contains a number of multiplication operations that perform 16-bit by 32-bit multiplication. The ST231 operations mulhhs, mull , mulhs, mulhu and mullhus exist primarily to implement 32-bit by 32-bit multiplication on a processor without a 32-bit by 32-bit multiplier. These operations have been completely deleted from the ST240 ISA. The immediate forms of the ST231 operations mulh, mulhh, mulhhu, mullh and mullhu either serve no useful function, or have a direct replacement; these forms have been deleted from the ST240 ISA.
The deleted forms of multiplication are listed in
Table 1 .
Table 1.
Multiplications removed from the ISA
Operation Description
Deleted operations mulhhs , mull , mulhs , mulhu , mullhus
Deleted forms of operations, other forms remain in the ISA mulh R
DEST
= R
SRC1
, I
SRC2
Can be replaced by mul32 R
IDEST
= R
SRC1
, I
SRC2
>>16 mulhh R
DEST
= R
SRC1
, I
SRC2 mulhhu R
DEST
= R
SRC1
, I
SRC2
These operations do not perform useful functions and there are no direct replacements.
mullh R mullhu
DEST
R
= R
IDEST
SRC1
= R
, I
SRC1
SRC2
, I
SRC2
Can be replaced by mulll R
IDEST
= R
SRC1
, I
SRC2
>>16
Can be replaced by mulllu R
IDEST
= R
SRC1
, I
SRC2
>>16
If it is necessary to implement the function of one of the deleted ST231 16-bit by 32-bit multiplication operations, they can be implemented using the ST240's 32-bit by 32-bit multiplication operations. Table 2 shows how each operation can be coded in C.
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ST231 to ST240 Software porting guide Differences between ST231 and ST240
The declarations for the variables used are: int a, b, c;
Table 2.
Sequences to replace removed multiply operations
32 x16 mul
Replacement user C sequence mulhu c = ((unsigned)a * ((unsigned)b >>16)) mull c = ((unsigned)a * (unsigned short)b) mulhs c = a * ((unsigned short)(b >> 16)) << 16 mulhhs c = (int)(((unsigned long long)a *( b >> 16)) >> 16) mullhus c = (int)((unsigned long long)a * (unsigned short)b >> 32)
Replacement mul operation
Worst case additional bundles mul32 mul32 mul32 mul64h mul64h
1
1
1
1
1
2.1.2 Deletion of entire operations
The non-multiplication operations that have been entirely deleted are listed in
Table 3 .
Table 3.
Operations removed from the ISA
Operation Description ldb.d
, ldbu.d
, ldh.d
, ldhu.d
, ldw.d
The dismissible load instructions. The ST240 ISA has conditional load instructions ( ldbc , ldbuc , ldhc , ldhuc , ldwc , ldlc ). Although these are not direct replacements, the compiler uses them to obtain similar performance.
prgins , prginspg Replaced by prginsadd and prginset .
divs pswset sh4add
, pswclr
ST240 has a set of divide and remainder operations; div , divu , rem , remu
Replaced by pswmask
In general can be replaced by the sequence shl ; add . Specific instances of sh4add may have better replacements.
Note:
The non-multiplication operations that have had their immediate forms deleted are listed in
Table 4 . In most cases another ST240 operation can be used in place of the deleted
operation.
The replacement operation will often depend on the value of the immediate operand of the deleted instruction. The register form of these instructions remain in the ST240 ISA.
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Differences between ST231 and ST240 ST231 to ST240 Software porting guide
Table 4.
Immediate forms removed from the ISA
Operation Description andl R
DEST
= R
SRC1
, I
SRC2 andl B
DEST
= R
SRC1
, I
SRC2 nandl R
DEST
= R
SRC1
, I
SRC2 nandl B
DEST
= R
SRC1
, I
SRC2 norl R
DEST
= R
SRC1
, I
SRC2 norl B
DEST
= R
SRC1
, I
SRC2 orl R
DEST
= R
SRC1
, I
SRC2 orl B
DEST
= R
SRC1
, I
SRC2 orc R
DEST
= R
SRC1
, I
SRC2
This operation can be replaced by:
If (ISRC2 == 0) R
IDEST
= 0; else R
IDEST
= (R
SRC1
> 0);
Similarly for B
IDEST
The compiler can select between the assignment of zero and the comparison operation because the value of the immediate I
SRC2
is known at compile time.
This operation can be replaced by:
If (I
SRC2
== 0) R
IDEST
= 1; else R
IDEST
= (R
SRC1
== 0);
Similarly for B
IDEST
The compiler can select between the assignment of one and the comparison operation because the value of the immediate I
SRC2
is known at compile time.
This operation can be replaced by:
If (I
SRC2
== 1) R
IDEST
= 0; else R
IDEST
= (R
SRC1
== 0);
Similarly for B
IDEST
The compiler can select between the assignment of zero and the comparison operation because the value of the immediate I
SRC2
is known at compile time.
This operation can be replaced by:
If (I
SRC2
== 1) R
IDEST
= 1; else R
IDEST
= (R
SRC1
> 0);
Similarly for B
IDEST
The compiler can select between the assignment of one and the comparison operation because the value of the immediate I
SRC2
is known at compile time.
The only known use of this operation is in the Linux kernel, where it is used with an immediate value of 0. In this case an alternative replacement operation is: xor R
IDEST
= R
SRC1
, -1 orc R
IDEST
= R
SRC1
, R0
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2.2
Differences between ST231 and ST240
Processor mechanisms and control registers
A number of processor mechanisms have changed between the ST231 and the ST240.
These are reflected by changes in the control registers.
In the ST231 there is a single trap entry point, defined by the HANDLER_PC control register, which is executed when a trap is taken. In the ST240 there are four entry points, defined by the control registers TRAP_EXCEPTION, TRAP_TLB, TRAP_INTERRUPT, and
TRAP_BREAK. The HANDLER_PC control register is not present in the ST240.
2.2.3
2.2.4
The ST240 supports more performance monitors than the ST231. Consequently the
PM_CR bit fields have changed.
Minimum page size
The ST240 has a minimum page size of 4 Kbytes, whereas the ST231 has minimum page size of 8 Kbytes. This change is hidden from most ST231 applications by the operating system and board support package.
In the ST240, entries in TLB_ENTRY1 and TLB_ENTRY2 must be shifted one place left relative to entries in the ST231. Entries to SCUi are affected in the same way.
Removal of dismissible loads
●
●
In the ST240, two bits [4:3] of the program status word (PSW) have become reserved due to the removal of dismissible loads:
TLB_DYNAMIC
SPECLOAD_MALIGN_EN
TLB_EXCAUSE bit 18 (SPEC on the ST231) has changed meaning and is now part of the
CAUSE field.
2.4
The ST231 maintains coherency between cached, uncached and write-combininguncached accesses to the same physical address. The ST240 does not. ST240 software must manage any references to the same physical address by multiple TLB cache policies.
Branch register width
The branch registers have expanded from 1 bit to 4 bits to support the ST240 SIMD instruction set.
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Differences between ST231 and ST240 ST231 to ST240 Software porting guide
The performance counters have been renamed for clarity; their functions have not changed.
The performance counters are listed in Table 5 .
Table 5.
Renamed performance counters
Old name
PM_EVENT_DMISSCYCLES
PM_EVENT_IBUFINVALID
PM_EVENT_NOPBUNDLES
New name
PM_EVENT_DSTALLCYCLES
PM_EVENT_IFETCHSTALL
PM_EVENT_BUBBLEORNOP
2.6 Peripherals
The interrupt control registers have been modified to allow 68 interrupts instead of 64 and their addresses have changed.
The timer register addresses have changed.
DSR31 (debug support virtual PC register) is no longer read/write, it is read only and it represents the PC of the last completed bundle.
8/10 8100869
ST231 to ST240 Software porting guide
Table 6.
Date
22-Jan-2008
Document revision history
Revision
A Initial release.
Changes
Revision history
8100869 9/10
ST231 to ST240 Software porting guide
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