STMicroelectronics VND810P-E Datasheet
বিজ্ঞাপন
বিজ্ঞাপন
VND810P-E
Double channel high-side driver
Features
Type R
DS(on)
VND810P-E 160 m Ω (1)
1.
Per each channel.
I
OUT
3.5 A
(1)
V
CC
36 V
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ECOPACK®: lead free and RoHS compliant
Automotive Grade: compliance with AEC
Guidelines
Very low standby current
CMOS compatible input
On-state open-load detection
Off-state open-load detection
Thermal shutdown protection and diagnosis
Undervoltage shutdown
Overvoltage clamp
Output stuck to V
CC
detection
Load current limitation
Reverse battery protection
Electrostatic discharge protection
SO-16
Description
The VND810P-E is a monolithic device designed in STMicroelectronics™ VIPower™ M0-3 technology, intended for driving any kind of load with one side connected to ground.
Active V
CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protect the device against overload.
The device detects open-load condition both in on-state and off-state. Output shorted to V
CC is detected in the off-state. Device automatically turns off in case of ground pin disconnection.
Table 1.
Device summary
Package
SO-16
September 2013
Tube
VND810P-E
Order codes
Tape and reel
VND810PTR-E
Doc ID 17606 Rev 2 1/28 www.st.com
1
Contents
Contents
VND810P-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
GND
) in the ground line . . . . . . . . . . . . . . . . . . . . 18
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Maximum demagnetization energy (V
CC
= 13.5 V) . . . . . . . . . . . . . . . . . 20
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-16 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/28 Doc ID 17606 Rev 2
VND810P-E
List of tables
List of tables
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Doc ID 17606 Rev 2 3/28
List of figures
List of figures
VND810P-E
case
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
LIM
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum turn-off current versus load inductance
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4/28 Doc ID 17606 Rev 2
VND810P-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
V cc
GND
INPUT1
STATUS1
V cc
CLAMP
OVERTEMP. 1
LOGIC
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
DRIVER 1
CURRENT LIMITER 1
OPEN LOAD ON 1
INPUT2
STATUS2
OPEN LOAD OFF 1
OVERTEMP. 2
CLAMP 2
DRIVER 2
CURRENT LIMITER 2
OPEN LOAD ON 2
OPEN LOAD OFF 2
OUTPUT1
OUTPUT2
Figure 2.
Configuration diagram (top view)
V
CC
N.C.
GND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
V
CC
1
8
16
9
V
CC
V
CC
OUTPUT 1
OUTPUT 1
OUTPUT 2
OUTPUT 2
V
CC
V
CC
Table 2.
Suggested connections for unused and not connected pins
Connection / pin Status N.C.
Output Input
Floating
To ground
X X
X
X X
Through 10K Ω resistor
Doc ID 17606 Rev 2 5/28
Electrical specifications VND810P-E
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.
Symbol
V
CC
- V
CC
- I
GND
I
OUT
- I
OUT
I
IN
I
STAT
V
ESD
E
MAX
P tot
T j
T c
T stg
Absolute maximum ratings
Parameter
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC Status current
Electrostatic discharge (human body model: R=1.5K
Ω;
C = 100pF)
– INPUT
– STATUS
– OUTPUT
– V
CC
Maximum switching energy
(L = 1.5mH; R
L
= 0 Ω ; V bat
= 13.5V; T jstart
= 150ºC; I
L
= 5A)
Power dissipation (per island) at T lead
= 25°C
Junction operating temperature
Case operating temperature
Storage temperature
Value
41
- 0.3
- 200
Internally limited
- 6
+/- 10
+/- 10
4000
4000
5000
5000
26
8.3
Internally limited
- 40 to 150
- 55 to 150
V
V
V
V mJ
W
°C
°C
Unit
V
V mA
A
A mA mA
6/28 Doc ID 17606 Rev 2
VND810P-E Electrical specifications
Table 4.
Symbol
Thermal data (per island)
Parameter Value Unit
R thj-lead
Thermal resistance junction-lead 15 °C/W
R thj-amb
Thermal resistance junction-ambient 77
(1)
57
(2)
°C/W
1.
When mounted on a standard single-sided FR-4 board with 0.5 cm
2
of Cu (at least 35 µm thick) connected to all V
CC
pins. Horizontal mounting and no artificial air flow.
2.
When mounted on a standard single-sided FR-4 board with 4 cm
2 all V
CC
pins. Horizontal mounting and no artificial air flow.
of Cu (at least 35 µm thick) connected to
Values specified in this section are for 8 V < V
CC
< 36 V; -40 °C < T otherwise stated.
j
< 150 °C, unless
Figure 3.
Current and voltage conventions
I
S
I
IN1
INPUT 1
V
CC
V
IN1
I
STAT1
STATUS 1 OUTPUT 1
V
STAT1
I
IN2
V
IN2
I
STAT2
INPUT 2
STATUS 2
GND
OUTPUT 2
V
STAT2
I
GND
V
F1
(1)
I
OUT1
V
CC
V
OUT1
I
OUT2
V
OUT2
1.
V
Fn
= V
CCn
- V
OUTn
during reverse battery condition.
Doc ID 17606 Rev 2 7/28
Electrical specifications VND810P-E
Table 5.
Symbol
Power output
Parameter Test conditions
V
CC
(1)
Operating supply voltage
V
USD
V
OV
Undervoltage shutdown
Overvoltage shutdown
I
I
I
I
R
I
ON
L(off1)
L(off2)
L(off3)
L(off4)
On-state resistance
Supply current
I
OUT
= 1 A; T j
= 25 °C
I
OUT
= 1 A; V
CC
> 8 V
Off-state; V
CC
= 13 V;
V
IN
= V
OUT
= 0 V
Off-state; V
CC
= 13 V;
V
IN
= V
OUT
= 0 V;
T j
= 25 °C
On-state; V
CC
= 13 V; V
IN
= 5 V;
I
OUT
= 0 A
Off-state output current V
IN
= V
OUT
= 0 V
Off-state output current V
IN
= 0 V; V
OUT
= 3.5 V
Off-state output current
Off-state output current
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25 °C
1.
Per device.
Min. Typ. Max. Unit
5.5
13
3
36
4
12
36 V
5.5
160
320
V
V m Ω m Ω
40 µA
0
-75
12 25 µA
5 7 mA
50 µA
0 µA
5 µA
3 µA
Table 6.
Symbol
Protections (1)
Parameter Test conditions Min.
Typ.
Max.
Unit
T
TSD
T
R
T hyst
Shutdown temperature
Reset temperature
Thermal hysteresis
150
135
7
175
15
200 t
SDL
Status delay in overload conditions
T j
> T
TSD
20 µs
I lim
V demag
V
CC
= 13 V
Current limitation
5.5 V < V
CC
< 36 V
Turn-off output clamp voltage I
OUT
= 1 A; L = 6 mH
3.5
5 7.5
7.5
A
A
V
CC
-41 V
CC
-48 V
CC
-55 V
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
°C
°C
°C
8/28 Doc ID 17606 Rev 2
VND810P-E Electrical specifications
Table 7.
Symbol
V
F
V
CC
- output diode
Parameter Test conditions
Forward on voltage -I
OUT
= 0.5 A; T j
= 150 °C
Min.
Typ. Max.
Unit
— — 0.6
V
Table 8.
Symbol
Status pin
Parameter Test conditions
V
STAT
I
LSTAT
C
STAT
V
SCL
Status low output voltage
Status leakage current
I
STAT
= 1.6 mA
Normal operation; V
STAT
= 5 V
Status pin Input capacitance Normal operation; V
STAT
= 5 V
I
STAT
= 1mA
Status clamp voltage
I
STAT
= - 1mA
Min.
Typ. Max.
Unit
6 6.8
-0.7
0.5
10
V
µA
100 pF
8 V
V
Table 9.
Symbol t t d(on) d(off) dV
OUT
/dt
(on) dV
OUT
/dt
(off)
Switching (V
CC
= 13V)
Parameter Test conditions
Turn-on delay time
Turn-off delay time
Turn-on voltage slope
Turn-off voltage slope
R
L
= 13 Ω from V
IN
rising edge to V
OUT
)
R
L
= 13 Ω from V
IN
falling edge to V
OUT
= 11.7 V
(see
)
R
L
= 13 Ω from V
OUT
= 1.3 V to V
OUT
= 10.4 V (see
)
R
L
= 13 Ω from V
OUT
= 11.7 V to V
OUT
)
Min.
—
—
—
—
Typ.
30
30
See
See
Max. Unit
—
—
µs
µs
— V/µs
— V/µs
Table 10.
Open-load detection
Symbol
I
OL t
DOL(on)
V
OL t
DOL(off)
Parameter
Open-load on-state detection threshold V
IN
= 5 V
Open-load on-state detection delay I
OUT
= 0 A
Open-load off-state voltage detection threshold
Open-load detection delay at turn-off
V
Test conditions Min. Typ. Max. Unit
IN
= 0 V
20
1.5
40
2.5
80 mA
200 µs
3.5
1000
V
µs
Doc ID 17606 Rev 2 9/28
Electrical specifications VND810P-E
Table 11.
Logic inputs
Symbol Parameter
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Input low level
Low level input current
Input high level
High level input current
Input hysteresis voltage
V
ICL
Input clamp voltage
Test conditions
V
IN
= 1.25 V
V
IN
= 3.25 V
I
IN
= 1 mA
I
IN
= -1 mA
Figure 4.
Status timings
OPEN LOAD STATUS TIMING (with external pull-up)
V
OUT
> V
OL
I
OUT
< I
OL
V
INn
Min.
Typ.
Max.
Unit
1.25
1
3.25
0.5
6 6.8
-0.7
10
8
µA
V
V
V
V
µA
V
V
INn
OVER TEMP STATUS TIMING
T j
> T
TSD
V
STATn t
DOL(off) t
DOL(on)
Figure 5.
Switching time waveforms
V
STATn t
SDL t
SDL
10/28 Doc ID 17606 Rev 2
VND810P-E
Table 12.
Truth table
Conditions
Normal operation
Current limitation
Overtemperature
Undervoltage
Overvoltage
Output voltage > V
OL
Output current < I
OL
Input
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
Output
H
H
L
L
L
H
L
L
L
L
L
X
X
L
H
Electrical specifications
Status
H
H
H
(T j
< T
TSD
) H
(T j
> T
TSD
) L
H
L
H
H
X
X
L
H
H
L
Doc ID 17606 Rev 2 11/28
Electrical specifications VND810P-E
Table 13.
Electrical transient requirements (part 1/3)
ISO T/R
7637/1
Test pulse
I II III
Test level
IV
3b
4
5
1
2
3a
- 25 V
+ 25 V
- 25 V
+ 25 V
- 4 V
+ 26.5 V
- 50 V
+ 50 V
- 50 V
+ 50 V
- 5 V
+ 46.5 V
- 75 V
+ 75 V
- 100 V
+ 75 V
- 6 V
+ 66.5 V
- 100 V
+ 100 V
- 150 V
+ 100 V
- 7 V
+ 86.5 V
Delays and impedance
2 ms, 10 Ω
0.2 ms, 10 Ω
0.1 µs, 50 Ω
0.1 µs, 50 Ω
100 ms, 0.01
Ω
400 ms, 2 Ω
Table 14.
Electrical transient requirements (part 2/3)
Test level results
ISO 7637-1:
Test pulse
I II III
1
2
3a
3b
4
5
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
IV
C
C
C
C
C
E
Table 15.
Electrical transient requirements (part 3/3)
Class Contents
C
E
All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
12/28 Doc ID 17606 Rev 2
VND810P-E
Figure 6.
Waveforms
NORMAL OPERATION
INPUT n
OUTPUT VOLTAGE n
STATUS n
V
CC
INPUT n
OUTPUT VOLTAGE n
STATUS n
V
USD
UNDERVOLTAGE
V
USDhyst undefined
V
CC
INPUT n
OUTPUT VOLTAGE n
STATUS n
V
CC
<V
OV
INPUT n
OUTPUT VOLTAGE n
STATUS n
OVERVOLTAGE
V
CC
> V
OV
OPEN LOAD with external pull-up
V
OUT
> V
OL
V
OL
OPEN LOAD without external pull-up
INPUT n
OUTPUT VOLTAGE n
STATUS n
OVERTEMPERATURE
T j
INPUT n
OUTPUT CURRENT n
STATUS n
T
TSD
T
R
Electrical specifications
Doc ID 17606 Rev 2 13/28
Electrical specifications VND810P-E
Figure 7.
Off-state output current
1.12
0.96
0.8
0.64
0.48
0.32
IL(off1) (uA)
1.6
1.44
1.28
Off state
Vcc=36V
Vin=Vout=0V
0.16
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 9.
Input clamp voltage
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
Iin=1mA
6.6
6.4
6.2
6
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 11. Status low output voltage
Vstat (V)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25
Istat=1.6mA
0 25 50 75
Tc (°C)
100 125 150 175
Figure 8.
High level input current
Iih (uA)
5
4.5
4
3.5
Vin=3.25V
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 10. Status leakage current
Ilstat (uA)
0.05
0.04
0.03
Vstat=5V
0.02
0.01
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 12. Status clamp voltage
Vscl (V)
8
7.8
Istat=1mA
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
14/28 Doc ID 17606 Rev 2
VND810P-E
Figure 13. On-state resistance vs T case
300
250
200
150
100
Ron (mOhm)
400
350
Iout=0.5A
Vcc=8V; 13V & 36V
50
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 15. Open-load on-state detection threshold
40
35
30
25
20
Iol (mA)
60
55
50
45
Vcc=13V
Vin=5V
15
10
-50 -25 0 25 50 75
Tc (°C)
Figure 17. Input high level
100 125 150 175
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Electrical specifications
Figure 14. On-state resistance vs V
CC
250
225
200
175
150
Ron (mOhm)
300
275
125
100
75
50
5 10
Iout=0.5A
15 20
Vcc (V)
25
Tc= 150°C
Tc= 25°C
Tc= - 40°C
30 35 40
Figure 16. Open-load off-state voltage detection threshold
Vol (V)
5
4.5
4
3.5
Vin=0V
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75
Tc (°C)
Figure 18. Input low level
100 125 150 175
2.2
2
1.8
1.6
Vil (V)
2.6
2.4
1.4
1.2
1
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 17606 Rev 2 15/28
Electrical specifications
Figure 19. Input hysteresis voltage
1.3
1.2
1.1
1
0.9
0.8
0.7
Vhyst (V)
1.5
1.4
0.6
0.5
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 21. Turn-on voltage slope dVout/dt(on) (V/ms)
1000
900
800
700
600
Vcc=13V
Rl=13Ohm
500
400
300
200
100
0
-50 -25 0 25 50 75
Tc (ºC)
Figure 23. I
LIM
vs T case
100 125 150 175
7
6
5
4
Ilim (A)
10
9
8
3
2
1
0
-50 -25
Vcc=13V
0 25 50 75
Tc (°C)
100 125 150 175
VND810P-E
Figure 20. Overvoltage shutdown
46
44
42
40
Vov (V)
50
48
38
36
34
32
30
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 22. Turn-off voltage slope dVout/dt(off) (V/ms)
500
450
400
Vcc=13V
Rl=13Ohm
350
300
250
200
150
100
50
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
16/28 Doc ID 17606 Rev 2
VND810P-E Application information
Figure 24. Application schematic
+5V +5V
+5V
R prot STATUS1
μ
C
R prot
R prot
R prot
INPUT1
STATUS2
INPUT2
V
CC
OUTPUT1
GND
V
GND
R
GND
D
GND
OUTPUT2
D ld
3.1
3.1.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against reverse battery.
Solution 1: a resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following show how to dimension the R
GND resistor:
Equation 1:
R
GND
≤
600 mV / I
S(on)max
Equation 2
R
GND
≥ (
-V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Doc ID 17606 Rev 2 17/28
Application information
3.1.2
VND810P-E
Power dissipation in R
GND
(when V
CC
< 0 during reverse battery situations) is:
P
D
= (-V
CC
)
2
/ R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with Equation 1
where I
S(on)max
becomes the sum of the maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
GND produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several highside drivers sharing the same R
GND
.
If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below.
Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
= 1 k Ω ) should be inserted in parallel to D
GND
if the device is driving an inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produces a shift ( ≈ 600 mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift not varies if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.3
18/28
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
maximum DC rating. The same applies if the device is subject to transients on the V
CC line that are greater than those shown in the ISO T/R 7637/1 table.
MCU I/O protection
If a ground protection network is used and negative transients are present on the V
CC
line, the control pins are pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os:
-V
CCpeak
/ I latchup
≤
R prot
≤
(V
OHµC
- V
IH
- V
GND
) / I
IHmax
Example
For the following conditions:
V
CCpeak
= - 100 V
I latchup
≥
20 mA
V
OHµC
≥ 4.5 V
5 k
Ω ≤
R prot
≤
65 k
Ω
.
Doc ID 17606 Rev 2
VND810P-E
Recommended values are:
R prot
= 10 k Ω
Application information
Off-state open-load detection requires an external pull-up resistor (R
PU
) connected between
OUTPUT pin and a positive supply voltage (V
PU
) like the +5 V line used to supply the microprocessor.
The external resistor has to be selected according to the following requirements:
1.
No false open-load indication when load is connected: in this case we have to avoid
V
OUT
to be higher than V
Olmin
; this results in the following condition
V
OUT
= (V
PU
/ (R
L
+ R
PU
))R
L
< V
Olmin.
2. No misdetection when load is disconnected: in this case the V
OUT
has to be higher than
V
OLmax
; this results in the following condition R
PU
< (V
PU
- V
OLmax
) / I
L(off2)
.
Because I s(OFF)
may significantly increase if V out
is pulled high (up to several mA), the pullup resistor R
PU
should be connected to a supply that is switched OFF when the module is in standby.
The values of V
OLmin
, V
OLmax
and I
L(off2)
are available in Section 2.3: Electrical
Figure 25. Open-load detection in off-state
V batt.
V
PU
V
CC
R
PU
INPUT
DRIVER
+
LOGIC
I L(off2)
OUT
STATUS
+
-
V
OL
R
R
L
GROUND
Doc ID 17606 Rev 2 19/28
Application information
3.5 Maximum demagnetization energy (V
CC
Figure 26. Maximum turn-off current versus load inductance
I
LM AX (A)
10
= 13.5 V)
VND810P-E
20/28
1
0,1 1
L(mH)
10
C
B
A
100
A = single pulse at T
Jstart
= 150 °C
B= repetitive pulse at T
Jstart
= 100 °C
C= repetitive pulse at T
Jstart
= 125 °C
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
1.
Values are generated with R
L
= 0
Ω.
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
t
Doc ID 17606 Rev 2
VND810P-E
4 Package and PCB thermal data
Package and PCB thermal data
4.1 SO-16 thermal data
1.
Layout condition of R th
and Z th
measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 1.6 mm, Cu thickness = 35 µm, Copper areas: 0.26 cm
2
, 4 cm
2
).
Figure 28. R thj-amb
vs PCB copper area in open box free air condition
RTH j-amb
(°C/W)
85
80
75
70
65
60
55
50
45
40
0 1 2 3
PCB Cu heatsink area (cm^2)
4 5
Doc ID 17606 Rev 2 21/28
Package and PCB thermal data
Figure 29. Thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
10
1
0.1
VND810P-E
0.01
0.0001
0.001
0.01
0.1
Time (s)
1 10 100
Equation 3 : pulse calculation formula
Z
TH δ where
= R
TH
⋅ δ
+ Z
THtp
(
1 –
δ )
δ = t p
⁄ T
Figure 30. Thermal fitting model of a quad channel HSD in SO-16
Tj_1
C1 C2 C3 C4 C5
Pd1
Tj_2
R1
C1
Pd2
R1
C2
R2
R2
R3 R4 R5
T_amb
1000
C6
R6
0.26 cm
2
4 cm
2
22/28 Doc ID 17606 Rev 2
VND810P-E
Table 16.
Thermal parameters
Area / island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Package and PCB thermal data
4 0.5
0.35
1.8
4.5
10
16
48
0.0001
7E-04
6E-03
0.2
0.7
2
25
4
Doc ID 17606 Rev 2 23/28
Package and packing information
5 Package and packing information
VND810P-E
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
5.2 SO-16 package information
Figure 31. SO-16 package dimensions
24/28 Doc ID 17606 Rev 2
VND810P-E
Table 17.
SO-16 mechanical data
DIM.
Min.
M
S
G
L
E e e3
F b1
C c1
D
A a1 a2 b
0.1
0.35
0.19
9.8
5.8
3.8
4.6
0.5
Package and packing information mm.
Typ.
Max.
1.75
0.2
1.65
0.46
0.25
0.5
45° (typ.)
10
6.2
1.27
8.89
4.0
5.3
1.27
0.62
8°
Doc ID 17606 Rev 2 25/28
Package and packing information
5.3 SO-16 packing information
Figure 32. SO-16 tube shipment (no suffix)
B
C
A
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
All dimensions are in mm.
50
1000
532
3.2
6
0.6
VND810P-E
Figure 33. SO-16 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
16.4
60
22.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
16
4
P 8
D (± 0.1/-0) 1.5
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
1.5
7.5
6.5
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
26/28 Doc ID 17606 Rev 2
VND810P-E
Table 18.
Document revision history
Date Revision
20-Jul-2010
19-Sep-2013
1
2
Initial release.
Updated Disclaimer
Changes
Revision history
Doc ID 17606 Rev 2 27/28
VND810P-E
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28/28 Doc ID 17606 Rev 2
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