STMicroelectronics L99VR01 Datasheet
Hirdetés
Hirdetés
L99VR01
Datasheet
Automotive low dropout linear voltage regulator with configurable output voltage having 200 mA current capability
Product status link
L99VR01
Features
Max. supply voltage (load dump)
Max. output voltage tolerance
Output current
Quiescent current
1. Maximum value with regulator disabled
V
S
ΔV
O
I
O
I qn
40 V
+/-2%
200 mA
• AEC-Q100 qualified
• Operating DC power supply voltage range from 2.15 V to 28 V
• Battery and post regulation operating modes are allowed
• Low dropout voltage
• Low quiescent current consumption
• User-selectable output voltage (0.8 V; 1.2 V; 1.5 V; 1.8 V; 2.5 V; 2.8 V; 3.3 V or
5 V)
• Output voltage precision ±2%
• Enable input for enabling/disabling the voltage regulator
• Output voltage monitoring with reset output
• Negligible ESR effect on output voltage stability for load capacitor
• Programmable autonomous watchdog through external capacitor (L99VR01J only)
• Undervoltage lockout UVLO
• Fast output discharge
• Thermal shutdown and short-circuit current limitation
• Advanced thermal warning and output overvoltage diagnostic (L99VR01J only)
• Programmable short-circuit output current (L99VR01J only)
• Wide operating temperature range (T
J
= -40°C to 175°C L99VR01J only)
• Documentation available for customers that need support when dealing with
ASIL requirements as per ISO 26262
DS13649 - Rev 2 - April 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
L99VR01
Description
L99VR01 is a low dropout linear voltage regulator designed for automotive applications available in SO-8 and in PowerSSO-12 packages. The LDO delivers up to 200 mA of load current and consumes as low as 1 μA of quiescent current when the regulator is disabled. The input is 40 V tolerant to withstand load dump, while the operating input voltage range is between 2.15 V and 28 V. The L99VR01 can be configured, through SELx pins, to generate a fixed selectable output voltage
(0.8 V; 1.2 V; 1.5 V; 1.8 V; 2.5 V; 2.8 V; 3.3 V or 5 V). High output voltage accuracy (±2%) is kept over wide temperature range, line and load variation. The
L99VR01 features enable, reset, autonomous watchdog, advanced thermal warning, fast output discharge and IShort control (IShort control, autonomous watchdog and advanced thermal warning are available only for the L99VR01J). The regulator output current is internally limited so that the device is protected against short-circuit and overload, besides it features over temperature protection; the short current value is configurable by an external resistance in the L99VR01J version. The L99VR01 can operate both in post regulation, attached to a pre-regulated voltage or directly connected to battery.
DS13649 - Rev 2 page 2/47
1
L99VR01
Block diagram and pins description
Block diagram and pins description
Figure 1. Functional block diagram of L99VR01S
DS13649 - Rev 2 page 3/47
L99VR01
Block diagram and pins description
Figure 2. Functional block diagram of L99VR01J
DS13649 - Rev 2
Pin name
V
S
SEL1
SEL2
SEL3
TW
I
Short
EN
GND
V
CW
1
2
3
4
SO-8 pin
5
6
Table 1. Pins description
PowerSSO-12 pin
1
Function
Supply voltage.
Block directly to ground with ceramic capacitor ≥ 4.7 µF and a 100 nF capacitator as close as possible to the pin
2
3
4
Output voltage selectors.
5
6
7
8
9
Advanced thermal warning output.
If the device detects a junction temperature above the warning threshold, the pin is pulled low. If an overvoltage condition occurs, a square wave is provided through the TW output. Leave floating if not used.
Programmable short circuit output current input pin. A resistor between
Ishort pin and GND sets the short circuit output current value.
Enable input.
With the Enable high, regulator, watchdog and reset are operating.
With the Enable low, regulator, watchdog and reset are shutdown, while the fast discharge circuit is turned on.
Connect the Enable to Vs to keep the device always enabled
Ground reference.
Watchdog timer adjust.
A capacitor between V
CW
pin and GND sets the time response of the watchdog monitor (just for L99VR01J).
page 4/47
DS13649 - Rev 2
L99VR01
Block diagram and pins description
Pin name
Wi
RST
V
O
TAB
SO-8 pin
7
8
PowerSSO-12 pin
10
11
12
TAB
Function
Watchdog refresh input.
If the square wave frequency at this input pin is too low, a low pulse at
RST pin is generated (just for L99VR01J).
Reset output.
It is pulled down when output voltage goes below Vo_th or frequency at
Wi is too low (just for L99VR01J). Leave floating if not used.
Voltage regulator output.
Block to ground with a capacitor ≥ 3.3 µF (needed for regulator stability).
Connected to ground
Figure 3. Pins configuration
SO-8 PowerSSO-12 page 5/47
L99VR01
Electrical specifications
2
Electrical specifications
2.1
Symbol
V
S
V
S
V
Wi
V
CW
V rst
I rst
I
S
V
O
I
O
V tw
I tw
V sh_ctrl
V
EN
V
SELx
VESD HBM
VESD CDM
Absolute maximum ratings
Stressing the device above the rating listed in the
Table 2. Absolute maximum ratings may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute maximum ratings
Parameter
DC supply voltage
Single pulse / tmax < 400 ms “transient load dump”
Input current
DC output voltage
DC output current
Watchdog input voltage
Watchdog delay voltage
Reset output voltage
Reset output current
Thermal warning output voltage
Thermal warning output current
“Short current” control voltage
Enable input
Selectors input voltage
ESD HBM voltage level (HBM-MIL STD 883C)
ESD CDM voltage level (CDM AEC-Q100-011)
ESD CDM voltage level on corner pins (CDM
AEC-Q100-011)
Value
-0.3 to 28
40
±750 internally limited
-0.3 to 6.7
internally limited
-0.3 to V
O
+ 0.3
- 0.3 to V
O
+ 0.3
-0.3 to V
O
+ 0.3
Internally limited
-0.3 to V
O
+ 0.3
Internally limited
-0.3 to 3.6
-0.3 to V
S
+ 0.3
-0.3 to V
S
+ 0.3
±2
±500
Unit
V
V
V
V
V
V kV
V
V
V
V
V
V
DS13649 - Rev 2 page 6/47
2.2
2.2.1
Note:
2.2.2
L99VR01
Thermal data
Thermal data
Thermal resistance
Item
A.001
A.057
Symbol
R thj-case
R thj-lead
Table 3. Operation junction temperature
Value
Parameter
PowerSSO-12
Thermal resistance junction to case
Thermal resistance junction to
Thermal resistance junction to ambient
8.5
27.4
SO-8
54.5
Unit
°C/W
°C/W
A.002
R thj-amb
1. Measured on Vs
71 °C/W the values quoted are for PCB 77 mm x 86 mm x 1.6 mm, FR4, four layers; Cu thickness 0.070 mm (outer layers) . Cu thickness 0.035 mm (inner layers), Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm
+/- 0.08 mm, Cu thickness on vias 0.025 mm.
Thermal protection
Table 4. Temperature threshold
Item Symbol Parameter
A.003
A.004
T prot_s
T prot_j
T prot_hyst
Thermal protection temperature
Thermal protection temperature
A.005
A.006
T
J
Thermal protection hysteresis
Operating junction temperature
SO-8
Power-SSO-12
A.007
T stg
Storage temperature
1. Thermal protection is guaranteed by design and characterization.
Test condition
L99VR01S
L99VR01J
T
T
J stg
Min.
Typ.
Max.
Unit
150 180 °C
175
11
200 °C
°C
-40
-40
150
175
°C
150 °C
DS13649 - Rev 2 page 7/47
2.3
L99VR01
Electrical characteristics
Electrical characteristics
Values specified in this section are for V
S
= 2.15 V to 18 V, T
J
= - 40 °C to +150 °C, unless otherwise stated.
Item Pin
A.008
V
O
A.009
V
O
A.010
V
O
A.011
V
O
A.012
V
S
, V
O
Symbol
V
O
I
O
I short
I short
∆V
O
/ V
O
Table 5. Electrical characteristics
Parameter
Output voltage
DC output current
Short-circuit current lower
Short-circuit current upper value
L99VR01J
L99VR01S
L99VR01J
Static line regulation
Test condition
V
S
= 2.15 to 18 V
I
O
= 1 to 200 mA
SEL_CONF=[0;0;0]
I
V
S
O
= 2.15 to 18 V
= 1 to 200 mA
SEL_CONF=[0;0;1]
I
V
S
O
= 2.15 to 18 V
= 1 to 200 mA
SEL_CONF=[0;1;0]
I
V
S
O
= 2.45 to 18 V
= 1 to 200 mA
SEL_CONF=[0;1;1]
I
V
S
O
= 3.15 to 18 V
= 1 to 200 mA
SEL_CONF=[1;0;0]
V
S
= 3.45 to 18 V
I
O
= 1 to 200 mA
SEL_CONF=[1;0;1]
V
S
= 3.95 to 18 V I to 200 mA
O
= 1
SEL_CONF=[1;1;0]
V
S
= 5.65 to 18 V I
O
= 1 to 200 mA
SEL_CONF=[1;1;1]
V
O
=0.8 V; 1.2 V, 1.5 V;
1.8 V; 2.5 V; 2.8 V; 3.3 V;
5 V
V
S
= 4V for V
O
=3.3 V
V
S
= 5.8 V for V
O
=5 V with I short pin connected to GND
V
S
= 4 V for V
O
=3.3 V
I
V
S
= 5.8 V for V
O short
> I
O
=5 V
V
S
= 4 V for V
O
=3.3 V
V
S
= 5.8 V for V
O
=5 V with Ishort pin floating;
Ishort > I
O
V
S
is from V s_low
V; I
O
= 1 mA; 100 mA;
200 mA
V
O
=3.3 V; V
O
=5 V
V
S
is from V
S_low
V,Tr,f=1ms; I
O
= 1 mA; 50 mA; 200 mA; V
O
V
O
=5 V
= 3.3 V;
Min.
Typ . Max.
0.784
0.8
0.816
1.176
1.2
1.224
1.470
1.5
1.530
1.764
1.8
1.836
2.450
2.5
2.550
2.744
2.8
2.856
3.234
3.3
3.366
4.9
30
240
5
65
360
5.1
200
100
480
1
3
Unit
V mA mA mA
%
%
DS13649 - Rev 2 page 8/47
DS13649 - Rev 2
L99VR01
Electrical characteristics
Item
A.013
Pin
V
O
A.014
V
S
, V
O
A.015
V
S
, V
O
A.017
V
S
, V
O
A.058
V
S
, V
O
A.018
A.019
V
A.020
V
V
A.021
V
S
S
S
S
, V
, V
, V
, V
O
O
O
O
Symbol
∆V
O
/ V
O
I
I
V dp
PSRR
I
I
I
I qn qn_LL qn_O qn_50 qn_100 qn_200
Parameter Test condition
Static load regulation
Dynamic load regulation
Drop voltage
Power supply rejection ratio
I
O
= 1 mA to 100 mA
V
O
V
O
= 3.3 V for V
= 5 V for V
S
S
=5 V;
= 6 V
I
O
= 10 mA to 100 mA,
Tr, f=10 us V
O
V
S
=5 V; V
O
=3.3 V for
= 5 V for V
S
=
6 V
I
O
= 150 mA
V
O
= 5 V
I
V
O
= 150 mA
O
= 3.3 V
I
O
= 150 mA
V
O
= 2.8 V
I
O
= 150 mA
V
O
= 2.5 V
I
V
O
= 150 mA
O
= 1.8 V
I
V
O
= 200 mA
O
= 5 V
I
V
O
= 200 mA
O
= 3.3 V
I
V
O
= 200 mA
O
= 2.8 V
I
V
O
= 200 mA
O
= 2.5 V
I
V
O
= 200 mA
O
= 1.8 V
V
S
= 13.5 V; V
= 200 mA
O
= 5 V; I
O fr = 1 kHz
Current consumption with regulator disabled I qn
= I
S
–
I
O
Current consumption with regulator enabled I qn_LL
= I
S
– I
O
Current consumption with
I regulator enabled qn_O
= I s
– I
O
Current consumption with regulator enabled
I qn_50
= I s
– I
O
Current consumption with
I regulator enabled qn_100
= I s
– I
O
Current consumption with regulator enabled
I qn_200
= I s
– I
O
VS = 3.5V; 13.5 V, EN = low
V
S
= 3.5 V; 13.5 V, I
µA; EN = high
O
= 0
V
S
= 3.5 V; 13.5 V, 0 < I
≤100 µA; EN = high
O
V
S
= 3.5 V; 13.5 V, I
O
=
50 mA
EN = high
V
S
= 3.5 V; 13.5 V, I
100 mA EN = high
O
=
V
S
= 3.5 V; 13.5 V, I
200 mA EN = high
O
=
Min.
Typ . Max.
Unit
75
75
100
1
1.7
3.1
1
3
500
530
1
100
130
1.3
2.0
3.5
%
% mV mV dB
µA
µA
µA mA mA mA page 9/47
DS13649 - Rev 2
L99VR01
Electrical characteristics
Item
A.022
A.023
Pin
V
V
S
S
V
V
Symbol
UVLO_fall
UVLO_ rise
Parameter
Undervoltage lockout, falling
Undervoltage lockout, rising
Test condition
V
O
= 0.8 V; 1.2 V; 1.5 V;
1.8 V
V
O
= 2.5 V; 2.8 V; 3.3 V
V
O
= 5 V
V
O
= 0.8 V; 1.2 V; 1.5 V;
1.8 V
V
O
=2.5 V; 2.8 V; 3.3 V
V
O
=5 V
Min.
1.5
2.3
4.6
1.7
2.6
4.9
Typ . Max.
1.6
2.4
4.8
1.8
2.7
5.1
1.7
2.55
4.9
2.1
2.8
5.3
Unit
V
V
1. Ishort typical value of 120 mA for t= 400 µs during the power on
2. V s_Low
= 3.5 V@V
O
= 0.8 V, 1.2 V,1.5 V,1.8 V& 2.5 V; V s_Low
=5 V@ V
O
= 2.8 V & 3.3 V, V s_Low
= 6 V@V
O
= 5 V
3. Parameters are guaranteed by design
4. Referred to Figure 30. Maximum load variation response
5. Considering that the minimum operating input voltage is 2.15 V, the dropout voltage (V dp
) is not defined for output voltages below 1.8 V.
Item Pin
A.024
V
O
Symbol
R
FD
Table 6. Fast output discharge
Parameter
Fast discharge - pull down resistor
Test condition
V
S
= 3.95 V; 13.5 V; V
O
3.3 V, V
O
= 5 V
EN = low
=
Min.
50
Typ.
Max.
Unit
75 105 Ω
Item Pin
A.025
RST
A.026
RST
A.027
RST
A.055
RST
A.028
RST
A.029
RST
Symbol
V rst_l
I rst_lkg
V
O_th
V
O_th_hyst
T rr
T rd
Table 7. Reset
Parameter
Reset output low voltage
Test condition
V
S
= 5 V; 13.5 V
Rext ≥ 4.7 KΩ to V
O
V
O
= 3.3 V, V
O
= 5 V
Reset output high leakage current
V rst
= 0.8 V
V
O
out of regulation – low threshold
V
S
= 5 V; 13.5 V
V
O
decreasing
V
O
=3.3 V,
V
O
=5 V
V
O
out of regulation – low threshold hysteresis
V
S
= 5 V; 13.5 V; V
O increasing; V
O
=3.3 V ;
V
O
=5 V
Reset reaction time
Reset delay time
V
S
= 5 V; 13.5 V; V
O
=3.3
V ; V
O
=5 V
V
S
= 5 V; 13.5 V ; V
O
=3.3
V ; V
O
= 5 V
Min.
Typ.
13.5% 10%
10
160
2%
16
250
Max.
Unit
0.2 x
V
O
1
V
µA
6.5%
Below
V
O
37
300
V
O_th
µs
µs page 10/47
DS13649 - Rev 2
L99VR01
Electrical characteristics
Table 8. Watchdog (only for L99VR01J)
Item
A.030
A.031
A.033
A.034
A.035
A.036
A.037
A.040
A.041
Pin
V
V
V
V
V
V
W
W
W i i i
CW
CW
CW
CW
CW
CW
Symbol
I
V
I
I
I
V
I
V
V ih il
Wi wlth whth
CWc
CWd w_off w_on
Parameter
Input high voltage
Pull down current
Low threshold
High threshold
Charge current
Discharge current
Watchdog deactivation current threshold
Watchdog activation current threshold
Test condition
V
S
=5 V; 13.5 V
V
O
=3.3 V; V
O
=5 V
V
S
= 5 V; 13.5 V
V
O
=3.3 V; V
O
=5 V
V wi
= 3.3 V
V
S
= 5V; 13.5 V
Vo=3.3V; Vo=5V
V
S
= 5V; 13.5 V
Vo=3.3V; Vo=5V
V
S
= 5V; 13.5 V
V
CW
= 0.1V
Vo=3.3V; Vo=5V
V
S
= 5 V; 13.5 V
V
CW
= 2.5 V
V
O
=3.3 V; V
O
=5 V
V
S
= 5 V; 13.5 V
V
O
=3.3 V; V
O
=5 V
V
S
= 5 V; 13.5 V
V
O
=3.3 V; V
O
=5 V
1. Watchdog input requires a square wave signal (duty cycle of 50 %)
Min.
0.7 x
V
O
Typ.
Max.
0.25 x
V
O
10 6
10 % 13 % 16 %
Unit
V
V
μA
V
O
44 % 47 % 50 % V
O
5 10
1.25
2.5
20
5
μA
μA
0.6
1.05
1.5
mA
2.2
3.35
4.5
mA
Item
A.042
A.043
A.045
Pin
EN
EN
EN
Table 9. Enable
Symbol
V
En_low
V
En_high
I
En
Parameter
EN input low voltage
Test condition
EN input high voltage
Pull down current V
S
= 13.5 V
Min.
1.5
Typ.
4
Max.
0.6
12
Unit
V
V
µA
Item
A.046
A.047
A.048
Pin
SELx
SELx
SELx
Item
A.049
Pin
TW
Symbol
V
SELx_low
V
SELx_high
I
SELx
Table 10. Output voltages selectors
Parameter
SELx input low voltage
SELx input high voltage
Pull down current
Test condition
V
S
= 3.5V; 13.5 V
Min.
0.7
Typ.
Max.
0.3
0.1
0.4
Unit
V
V
µA
Table 11. Thermal warning and protection (only for L99VR01J)
Symbol
V
Tw_low
Parameter
Thermal warning output low voltage
Test condition
R ext
≥ 4.7 kΩ to V
O
V
O
=3.3 V; V
O
=5 V
Min.
Typ.
Max.
0.2xVo
Unit
V page 11/47
Note:
Note:
L99VR01
Electrical characteristics
Item
A.050
A.051
A.052
A.056
A.054
Pin
TW
TW
V
O
V
O
TW
Symbol
T warn
T warn_hyst
OV
O
V__hyst
T w_per
Parameter
Thermal warning temperature
Thermal warning hysteresis
Test condition
V
V
O
O
overvoltage
overvoltage hysteresis
Thermal warning square wave period
V
S
= 5 V; 13.5 V; V increasing
O
V
O
=3.3 V; V
O
=5 V
V
S
= 5 V; 13.5 V; Vo decreasing
V
O
=3.3 V; V
O
=5 V
V
S
= 5V; 13.5 V
V
O
=3.3 V; V
O
=5 V
Min.
140
3
6.5%
160
Typ.
150
11
Max.
160
Unit
°C
10% 13.5%
Above
VO
2%
250
15
300
°C
Below
OV
µs all parameters are guaranteed in the junction temperature range -40°C to 150°C (unless otherwise specified);
L99VR01J device is still operative and functional at higher temperatures (up to 175°C). Parameters limit at higher junction temperature than 150°C may change respect to what is specified as per the standard temperature range. device functionality at high junction temperature is guaranteed by characterization.
All parameters are guaranteed by design for Vo not reported in test condition.
minimum input voltage values are achievable adopting an input ceramic capacitator: C5750X7R2A475M230KA
– ceramic capacitor multistrate SMD, 4.7 μF, 100 V, ±20%, X7R, C series TDK.
DS13649 - Rev 2 page 12/47
5.50
5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
1.00
0.50
I = 1 mA
V = 13. 5 V
0.00
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj (⁰C)
Vo = 5 V
Vo = 3 V 3
Vo = 2 V 8
Vo = 2 V 5
Vo = 1 V 8
Vo = 1 V 5
Vo = 1 V 2
Vo = 0 V 8
L99VR01
Electrical characteristics curves
2.4
Electrical characteristics curves
Figure 4. Output voltage vs Tj
5.50
5.00
4.50
4.00
I = 1 mA
V = 13.5 V
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj (⁰C)
Vo = 5 V
Vo = 3 V 3
Vo = 2 V 8
Vo = 2 V 5
Vo = 1 V 8
Vo = 1 V 5
Vo = 1 V 2
Vo = 0 V 8
Figure 6. Drop voltage vs output current
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0 20 40 60 80 100 120 140 160 180 200
Io(mA)
Vo = 5 V
Vo = 3 V 3
Vo =2 V 8
Vo = 2 V 5
Vo = 1 V 8
Figure 8. Current consumption vs input voltage (Io < 1mA)
0.2
I qn
0.1
Io<1mA
TC= 25 ⁰C
0.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VS(V)
Vo = 5 V
Vo = 3.3 V
Vo = 2.8 V
Vo = 2.5 V
Vo = 1.8 V
Vo = 1.5 V
Vo = 1.2 V
Vo = 0.8 V
Figure 5. Output voltage vs VS
V OUT
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
5.5
5.0
4.5
4.0
3.5
3.0
0
I
O
= 100 mA
Ta = 25 ⁰C
1 2 3 4 5
VS (V)
6 7 8 9 10
Vo = 5 V
Vo = 3.3 V
Vo =2.8 V
Vo = 2.5 V
Vo = 1.8 V
Vo = 1.5 V
Vo = 1.2 V
Vo = 0.8 V
Figure 7. Current consumption vs output current
I qn
3.9
3.6
3.3
3.0
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
-0.3
-0.6
0 20 40 60 80 100
Io(mA)
120 140
T
C
= 25 ⁰C
160 180 200
Vo=5 V
Vo=3 V 3
Vo=2 V 8
Vo=2 V 5
Vo=1 V 8
Vo=1 V 5
Vo=1 V 2
Vo=0 V 8
Figure 9. Current consumption vs input voltage (Io = 50 mA)
1.0
0.8
0.6
I qn 0.4
0.2
I
O
= 50 mA
T
C
= 25 ⁰C
0.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VS(V)
Vo=5V
Vo=3.3V
Vo=2.8V
Vo=2.5V
Vo=1.8V
Vo=1.5V
Vo=1.2V
Vo=0.8V
DS13649 - Rev 2 page 13/47
L99VR01
Electrical characteristics curves
Figure 10. Current consumption vs input voltage (Io= 100 mA)
2.0
1.5
1.0
I qn
0.5
Io = 100 mA
Tc = 25 ⁰C
0.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VS(V)
Vo = 5 V
Vo = 3.3 V
Vo = 2.8 V
Vo = 2.5 V
Vo = 1.8 V
Vo = 1.5 V
Vo = 1.2 V
Vo = 0.8 V
Figure 11. Short-circuit current vs Tj (Ishort pin floating)
I sht
360.00
355.00
350.00
345.00
340.00
335.00
330.00
325.00
320.00
315.00
310.00
305.00
Vs = 13.5 V
300.00
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj (⁰C)
Figure 12. Short-circuit current vs Tj (Ishort pin tied to
GND)
65
60
55
50
V s
= 13.5 V
45
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj (⁰C)
5 V
3 V 3
2 V 8
2 V 5
1 V 8
1 V 5
1 V 2
0 V 8
Figure 13. Short-circuit current vs input voltage
0.40
0.35
0.30
R
SH
= Floating
TC= 25 ⁰C
0.25
0.20
0.15
I SHT 0.10
0.05
0.00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
VS (V)
5 V_Ishort_max
5 V_Ishort_min
3 V 3_Ishort_max
3 V 3_Ishort_min
2 V 8_Ishort_max
2 V 8_Ishort_min
2 V 5_Ishort_max
2 V 5_Ishort_min
1 V 8_Ishort_max
1 V 8_Ishort_min
1 V 5_Ishort_max
1 V 5_Ishort_min
1 V 2_Ishort_max
1 V 2_Ishort_min
0 V 8_Ishort_max
0 V 8_Ishort_min
Figure 14. Output voltage vs enable voltage (V
O
=0.8 V)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
0.0
IO= 100 mA
Ta = 25 ⁰C
VS= 13.5 V
0.2
0.4
0.6
0.8
1.0
V
EN (V)
Vo=0.8 V
1.2
1.4
1.6
1.8
2.0
Figure 15. Output voltage vs enable voltage (V
O
=1.2 V)
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
IO= 100 mA
Ta = 25 ⁰C
VS= 13.5 V
0.0
0.2
0.4
0.6
0.8
1.0
VEN(V)
Vo=1.2 V
1.2
1.4
1.6
1.8
2.0
1V8
1V5
1V2
0V8
5V
3V3
2V8
2V5
DS13649 - Rev 2 page 14/47
L99VR01
Electrical characteristics curves
Figure 16. Output voltage vs enable voltage (V
O
=1.5 V)
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
Tc = 25 ⁰C
VS= 13.5 V
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
0.0
0.2
0.4
0.6
0.8
1.0
VEN(V)
Vo=1.5 V
1.2
1.4
1.6
1.8
2.0
Figure 18. Output voltage vs enable voltage (V
O
=2.5 V)
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
0.0
IO= 100 mA
Ta= 25 ⁰C
VS= 13.5 V
0.2
0.4
0.6
0.8
1.0
VEN (V)
Vo=2.5 V
1.2
1.4
1.6
1.8
2.0
Figure 20. Output voltage vs enable voltage (V
O
=3.3 V)
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.0
I
O
T a
V
S
= 100 mA
= 25 ⁰C
= 13.5V
0.2
0.4
0.6
0.8
1.0
VEN (V)
Vo=3.3 V
1.2
Vo=3.3V
1.4
1.6
1.8
2.0
Figure 22. VEn_high vs Tj
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
-60
Vs = 13.5 V
-40 -20 0 20 40
Tj (⁰C
)
60 80 100 120 140 160
Figure 17. Output voltage vs enable voltage (V
O
=1.8 V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
0.0
IO= 100 mA
TC= 25 ⁰C
VS = 13.5 V
0.2
0.4
0.6
0.8
1.0
1.2
VEN (V)
Vo=1.8 V
1.4
1.6
1.8
2.0
Figure 19. Output voltage vs enable voltage (V
O
=2.8 V)
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
0.0
I
V
O
S
= 100 mA
Ta = 25 ⁰C
= 13.5V
0.2
0.4
0.6
0.8
1.0
VEN (V)
Vo=2.8 V
1.2
1.4
1.6
1.8
2.0
Figure 21. Output voltage vs enable voltage (V
O
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
0.0
I
O
T
C
V
S
= 100 mA
= 25 ⁰C
= 13.5 V
0.2
0.4
0.6
0.8
1.0
V
EN
(V)
Vo=5 V
1.2
1.4
1.6
1.8
2.0
Figure 23. VEn_low vs Tj
=5 V)
V En_I
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
1.20
1.15
1.10
1.05
1.00
-60
Vs = 13.5 V
-40 -20 0 20 40
Tj (⁰C)
60 80 100 120 140 160
DS13649 - Rev 2 page 15/47
L99VR01
Electrical characteristics curves
46.00
44.00
42.00
50.00
Vs = 13.5 V
48.00
Figure 24. Vwhth vs Tj
40.00
-60 -40 -20 0 20 40 60
Tj (⁰C )
Vo=5 V
Vo=0 V 8
80 100 120 140 160
Figure 26. Icwc vs Tj
15.00
13.00
Vs = 13.5 V
11.00
I cwc
9.00
7.00
5.00
-60 -40 -20 0 20 40
Tj (⁰C )
60
Vo=5 V
Vo=0 V 8
80 100 120 140 160
Figure 25. Vwlth vs Tj
15.00
Vs = 13.5 V
14.00
13.00
12.00
11.00
10.00
-60 -40 -20 0 20 40 60
Tj (⁰C)
Vo=5 V
Vo=0 V 8
80
Figure 27. Icwd vs Tj
100 120 140 160
4.00
Vs = 13.5 V
3.00
I cwd
2.00
1.00
0.00
-60 -40 -20 0 20 40 60
Tj (⁰C
)
Vo=5 V
Vo=0 V 8
80 100 120 140 160
Figure 28. PSRR
150
125
100
75
50
25
0
1 10 100
FREQUENCY (KHz)
1000 10000
DS13649 - Rev 2 page 16/47
L99VR01
Test circuit and waveforms plot
3
Test circuit and waveforms plot
3.1
5.08
5.06
5.04
5.02
5
4.98
4.96
4.94
4.92
0
Load regulation
0.001
Vbat
C 1 C 2
C tw
Figure 29. Load regulation test circuit
Vs
TW
E N
Wi
Vo
R
RST
Io
3.3 µF
ESR
Vcw
Ishort
SEL 1
SEL 2
SEL 3
R ST
GND
R sh
Vo
+
LOAD
-
Step Change of Load
Current
200
100
0
0 250 750 1000
Time (µs)
Resultant
Output Voltage xx x
0
0 250 750 1000
Time (µs)
0.002
0.003
Iout_5V_100mA Vout_5V
Vo=5V
Figure 30. Maximum load variation response
1.50E-01
1.00E-01
5.00E-02
3.36
3.34
3.32
0.00E+00
0.004
-5.00E-02
-1.00E-01
-1.50E-01
-2.00E-01
0.005
-2.50E-01
3.3
3.28
3.26
3.24
0 0.001
0.002
Vout_3.3V
0.003
Iout_3.3V_100mA
Vo=3.3V
0.004
-0.05
-0.1
-0.15
-0.2
0.005
-0.25
0.15
0.1
0.05
0
DS13649 - Rev 2 page 17/47
4
Application information
Figure 31. Application schematic
L99VR01
Application information
Figure 32. Application schematic – Post regulation
DS13649 - Rev 2
Input ceramic capacitor C
2
≥ 4.7 μF is necessary for the regulator to operate properly. The other input capacitor
C1 can be used as backup supply for the application. The C
0
capacitor, connected to the output pin, is for bypassing to GND the high-frequency noise and it guarantees stability even during sudden line and load variations.
Suggested value is C
0
= 3.3 µF.
The ESR of the SMD output ceramic capacitor has a negligible effect on the stability of the L99VR01 family for capacitors with low ESR. A ceramic SMD capacitor is recommended on Vo pin.
page 18/47
4.1
4.2
L99VR01
Voltage regulator
Voltage regulator
The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure, a very low dropout voltage at current up to Io = 200 mA is obtained. The high-precision of the output voltage (±2%) is obtained with a pre-trimmed reference voltage. The voltage regulator automatically adapts its own quiescent current to the output current level. In light load conditions the quiescent current goes down to I qn_LL = 75
µA (low consumption mode). L99VR01 operates with reduced input voltage (post regulation) minimizing the internal power dissipation and maximizing the output current.
Output current limitation
Output current limitation is present to protect the regulator and the application from overload condition, such as short to ground.
Figure 33. Behavior of output current versus regulated voltage Vo
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
I
O
(A)
V
T a s
= 13.5V
= 25 ⁰C
Vo_5V
Vo_3V3
Vo_2V8
Vo_2V5
Vo_1V8
Vo_1V5
Vo_1V2
Vo_0V8
The Ishort current can be set in the range from 65 mA to 360 mA through an external resistor R sh
connected between I
Short
pin and ground (L99VR01J version only).
DS13649 - Rev 2 page 19/47
Figure 34. Ishort versus Rsh
L99VR01
Output voltage selection
4.3
Open pin (no resistance on the Ishort pin), is seen as a max resistance corresponding to the maximum Ishort current.
Output voltage selection
The L99VR01 can provide one out of 8 different output voltages. The combination of three digital input selectors
(SELx) determines the output voltage according to the following truth table.
V
O
5
3.3
2.8
2.5
1.8
1.5
1.2
0.8 (Default)
SEL1
1
1
0
0
1
1
0
0
Table 12. Truth table
SEL2
0
0
1
1
1
1
0
0
SEL3
1
0
1
0
1
0
1
0
The SELx pins configuration is acquired at the device start-up (EN transition from low to high) and once configuration is acknowledged, it cannot be changed until next EN transition.
When all the pins are left not connected, the default configuration will be selected.
DS13649 - Rev 2 page 20/47
Figure 35. Example of output voltage selection
L99VR01
Enable
4.4
SELx pins are internally connected to GND via pull down current source.
Enable
The L99VR01 is enabled/disabled by the enable input; a high voltage signal switches the regulator ON. When the enable pin is set low, the output is switched-off, the current consumption of the device becomes as low as 1 μA and the Fast Output Discharge circuit is activated.
It may happen that the enable pin must be driven by components supplied at a voltage different from the regulator supply voltage. In this case the EN input pin must be set high only once Vs > 1.5 V. A solution to drive the enable pin is depicted in the following figure.
Figure 36. Typical example of enable control
DS13649 - Rev 2
In any case, since the enable input voltage is linked to the maximum DC supply voltage (V
S
) applied to the
L99VR01 (-0.3 V to Vs + 0.3 V), special care must be adopted in driving EN pin to avoid exceeding absolute maximum rating.
page 21/47
Note:
4.5
L99VR01
Reset
A diode (0.25 V < VF < 0.75 V) connected in series with EN pin is requested only if the regulator is directly supplied by car battery.
Reset
The reset circuit supervises the output voltage V
O
. If the output voltage falls below V
O_th then RST is pulled low with a reaction time Trr. When the output voltage rises above V
O_th
+ V
O_th_hyst
then RST is pulled high with a delay time T rd
. The delay is generated by an internal circuit. The reset circuit is active when En is high. Being
RST an open-drain output an external resistance (Rrst) is needed between the RST pin and the Vo pin. The external resistance value can be in a range between 4.7 KΩ and 20 KΩ. Leave the RST pin floating if not used.
Be aware that the current flowing through the RST pin drawn from Vo when the RST pin is pulled low may affect the watchdog activation/deactivation based on the regulator output current consumption monitoring.
Figure 37. Reset timing diagram
4.6
Autonomous watchdog
A supplied microcontroller is monitored by the watchdog input Wi (L99VR01J version only). If pulses are missing, the RST output pin is set low. The watchdog timeout can be set within a wide range with the external capacitor,
C tw
. The watchdog circuit discharges the capacitor C tw
, with the constant current I
CWd
. If the lower threshold V is reached, a watchdog reset is generated. To prevent this from happening the microcontroller must generate a wlth positive edge during the discharge of the capacitor before the voltage reaches the threshold V wlth
. To calculate the sawtooth period “Twop”, taking care that the microcontroller triggers the positive edge during the discharge phase of C tw
(Td), the following equations can be used:
(V whth
-V wlth
) x C tw
= I
CWd
x Td
(V whth
-V wlth
) x C tw
= I
CWc x Twol
T wop
= T d
+ Twol
Every Wi positive edge switches the current source from discharging to charging. The same happens when the lower threshold is reached. When the voltage reaches the upper threshold, V whth
, the current switches from charging to discharging. The result is a saw-tooth voltage at the watchdog timer capacitor C tw
. If a microcontroller operates in low power mode it will not be able to generate any pulse to refresh the voltage regulator watchdog, triggering so the microcontroller reset. In such a case, to avoid generating the microcontroller reset, the watchdog functionality will be automatically deactivated any time the microcontroller current consumption falls under the
I w_off
threshold. On the other hand, when the current consumption rises above the I w_on
threshold the watchdog functionality will be once again activated. Once the regulator is enabled for the first time, if Io < Iw_off the watchdog will not be activated, while if Io > Iw_off the watchdog will be activated.
DS13649 - Rev 2 page 22/47
I
O
RST
W i
V
CW
T wol
Figure 38. Watchdog timing diagram
T wop
L99VR01
Thermal warning and thermal shutdown
V whth
V wlth
I w_on
I w_off
Note:
Note:
4.7
Since the RST output pin is shared between the watchdog circuit and the output voltage monitoring circuit, for applications where the watchdog is not needed, to prevent the watchdog from generating RST pulses without anyhow losing the reset functionality of the Vo monitoring, the V cw
pin has to be connected to Vo. V cw
pin must be always tied to ground by an external capacitor (C tw
) when the watchdog is used.
when the watchdog timer is used and the regulator recovers from a thermal shut-down event or recovers from an output under-voltage event (including the recovery from output under-voltage event at the regulator output turning on), the reset pin might be pulled back high with a delay longer than Trd, in the range between Trd and Trd +Twol due to the watchdog that might affect the RST pin release. The watchdog will not affect the
RST pin release in the case where recovering from a thermal shut-down event or recovering from an output under-voltage event (including the recovery from output under-voltage event at the regulator output turning on) the Io drops below I w_off
before T rd
. The output current Io consists in the load current, the current drawn from the
RST pin and the TW pin through the pull-down resistors connected to Vo when the RST and the TW pins are asserted low and the current needed to charge/discharge the output capacitor Co.
when the watchdog timer is used, in case of an output under-voltage event not making Vo drop to zero volt, since the watchdog will still be running during the output under-voltage condition, the first watchdog timeout after the reset pin is released coming out of the output under-voltage event might occur before expected
(0≤Timeout≤Twop-Twol).
Usage of watchdog timer
Watchdog timer is not used
Watchdog timer is used
Table 13. Watchdog timer
Connection of Vcw Pin
Connect to the Vo pin
Connect to an external capacitor C tw
Thermal warning and thermal shutdown
To warn the microcontroller about a severe temperature increase, a thermal warning output has been implemented (L99VR01J version only). If the device detects a junction temperature above T warn
, the advanced thermal warning (TW) output pin is pulled low while the voltage regulator and its features remain all active. The
TW pin will return to its high logic level (equal to the Vo output value) once the temperature falls below the threshold T warn
- T warn_hyst
.
DS13649 - Rev 2 page 23/47
L99VR01
Overvoltage detection by advanced thermal warning read-out
Figure 39. Thermal warning diagram
4.8
When junction temperature reaches the T prot_j/s
thermal shutdown threshold the regulator output is quickly shutoff through the internal Fast Output Discharge circuit; to be reactivated, junction temperature has to decrease below T prot_j/s
- T prot_hyst
. Being TW an open-drain output an external resistance (R
TW
) is needed between the TW pin and the Vo pin. The external resistance value can be in a range between 4.7 KΩ and 20 KΩ. Be aware that the current flowing through the TW pin drawn from Vo when the TW pin is pulled low may affect the watchdog activation/deactivation based on the regulator output current consumption monitoring. Leave floating if not used.
Overvoltage detection by advanced thermal warning read-out
The TW pin also provides diagnostics about output overvoltage (OV); to distinguish between a thermal warning event and an output overvoltage event, two different signals are generated at the same TW output pin. How reported in the previous paragraph a thermal warning event detection sets the TW pin LOW, instead an output overvoltage event generates a square wave at the TW pin (
Figure 40. Square wave on TW pin generated during an overvoltage
). Overvoltage detection has higher priority than thermal warning detection so that concurrence of thermal warning and over voltage events leads to a square wave like in the case of overvoltage detection (as shown in
Figure 41. Warning signal caused by overvoltage and thermal warning on TW pin
).
Figure 40. Square wave on TW pin generated during an overvoltage
TW
T
w_per
t
.
DS13649 - Rev 2 page 24/47
L99VR01
Fast output discharge
Vo
Figure 41. Warning signal caused by overvoltage and thermal warning on TW pin
Vo_hth t
T
150ºC t
TW
4.9
4.10
t
Fast output discharge
To assure a quick discharge of the external capacitor tied to the output pin down to around 1.3 V the L99VR01 uses an internal pulldown circuit. Activated each time the EN pin goes low, during thermal shut down and during undervoltage lockout, the output current will flow through the pulldown resistor of the fast output discharge circuit to ground. The fast output discharge feature is available for the output voltages Vo= 2.5 V (SELx = [1;0;0]) Vo=
2.8 V (SELx = [1;0;1]) Vo= 3.3 V (SELx = [1;1;0]) and Vo= 5 V (SELx = [1;1;1]).
Undervoltage lockout UVLO
The undervoltage lockout (UVLO) circuit allows a fast regulating element to turn off (activating the internal Fast
Output Discharge circuit) if the input voltage drops below the threshold, V
UVLO_fall
, avoiding undesired unknown output state during low input voltage. When the input voltage is above the V
UVLO_rise
threshold, the regulating element is again turned on.
DS13649 - Rev 2 page 25/47
L99VR01
Functional safety management
V
S
Figure 42. Undervoltage lockout on output voltage
V
UVLO_rise
V
UVLO_fall
V
O
4.11
Functional safety management
The device was designed to offer a set of features to support applications that need to fulfill functional safety requirements as defined by ASIL classification in ISO26262-2018. The IC was developed for different applications, hence can be considered a SEooC (Safety Element out of Context) as defined in the normative.
Analysis of the IC’s capability to reach the required safety level, should be made at system level under user responsibility.
The following device safety requirements have been considered for a typical application:
ID
SR-001
SR-002
SR-003
SR-004
Table 14. Safety requirement
Description
Operation of the voltage regulator(s) is allowed till over temperature limit.
Operation of voltage regulator(s) is enabled until programmed current limit is reached.
Output voltage of regulator(s) shall remain within programmed range when RST pin is not asserted.
Output voltage of regulator(s) shall remain within programmed range when square wave at TW pin is not generated.
Based on above requirements list the following safety mechanism has been implemented:
ID
SM1
SM2
SM3
SM4
Table 15. Implemented safety mechanism
Description
Thermal sensor acting by TW pin
Overtemperature protection
Limitation on maximum output current
Output voltage V
O
monitoring for undervoltage detection
SR covered
SR-004
SR-001
SR-002
SR-002
DS13649 - Rev 2 page 26/47
L99VR01
Functional safety management
ID
SM5
SM6
Description
Output voltage V
O
monitoring for overvoltage detection
RST reset assertion in case ofV
O undervoltage detection
SR covered
SR-002
SR-003
In addition to the internal watchdog for checking the correct operation of the microcontroller, it can be considered a system-level safety mechanism.
More details about functional safety can be found in the device safety manual, provided on customer request.
DS13649 - Rev 2 page 27/47
5
Application
Figure 43. Typical application
L99VR01
Application
DS13649 - Rev 2 page 28/47
6
Package and PCB thermal data
6.1
PowerSSO-12 Thermal data
Figure 44. PowerSSO-12 PC board
L99VR01
Package and PCB thermal data
Note: layout condition of Rth and Zth measurements (PCB: Double layer and Four layers, Thermal Vias, FR4 area= 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness=0.070 mm (front and back side), Cu thickness 0.035 mm
(inner layers). Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias
0.025 mm, Footprint dimension 2.2 mm x 2.9 mm.
DS13649 - Rev 2 page 29/47
L99VR01
PowerSSO-12 Thermal data
Figure 45. Rthj-amb vs PCB copper area in open box free air condition (PowerSSO-12)
Figure 46. PowerSSO-12 thermal impedance junction ambient single pulse
DS13649 - Rev 2
Pulse calculation:
Z
THδ
=R
TH
.δ+ Z
THtp
(1-δ) where δ=tp/T page 30/47
DS13649 - Rev 2
Figure 47. Thermal fitting model of a Vreg in PowerSSO-12
L99VR01
PowerSSO-12 Thermal data
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Table 16. PowerSSO-12 thermal parameter
Footprint
4.4
4.5
6
18
22
26
0.001
0.03
0.1
0.4
0.27
3
2
0.4
0.8
6
9
15
20
8
8
10
15
0.4
1
9
4L
4.5
4
4
0.8
7
15 page 31/47
6.2
SO-8 thermal data
Figure 48. SO-8 PC board
L99VR01
SO-8 thermal data
Note: Layout condition of Rth and Zth measurements (PCB: double layer and four layers; FR4 area = 77 mm x 86 mm;
PCB thickness = 1.6 mm; Cu thickness = 0.070 mm (front and back side), Cu thickness 0.035mm (inner layers);
Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias of 0.025 mm,
Footprint dimension 2.2 mm x 2.9 mm.
DS13649 - Rev 2 page 32/47
DS13649 - Rev 2
Pulse calculation formula:
Z
THδ
= R
TH
.δ+ Z
THtp
(1-δ)
Z
THδ
= R
TH
.δ+ Z
THtp
(1-δ) where δ = tp/T
Figure 49. Rthj-amb vs PCB copper area in open box free air condition
L99VR01
SO-8 thermal data
Figure 50. SO-8 thermal impedance junction ambient single pulse page 33/47
DS13649 - Rev 2
Figure 51. Thermal fitting model of a Vreg in SO-8
L99VR01
SO-8 thermal data
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Footprint
4.4
4.5
6
28
30
41.6
0.0001
0.002
0.03
0.05
0.15
1.4
Table 17. SO-8 thermal parameter
2
23
24
25
3
8
23
21
21
5 5.5
4L
23
19
14 page 34/47
7
7.1
L99VR01
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
PowerSSO-12 package information
Figure 52. PowerSSO-12 package dimensions
DS13649 - Rev 2
Symbol
A
A1
A2 b c
D
Table 18. PowerSSO-12 package mechanical data
Millimeters
Typ.
Min
1.250
0.000
1.100
0.230
0.190
4.800
Max
1.620
0.100
1.650
0.410
0.250
5.000
page 35/47
7.2
Symbol
L k
X
Y ddd
H h
E e
3.800
5.800
0.250
0.400
0°
2.200
2.900
Millimeters
0.800
SO-8 package information
Figure 53. SO-8 package dimension
L99VR01
SO-8 package information
4.000
6.200
0.500
1.270
8°
2.800
3.500
0.100
DS13649 - Rev 2
Symbol
A
A1
A2 b c
E
Table 19. SO-8 package mechanical data
Min
Millimeters
Typ.
0.10
1.25
0.28
0.17
4.80
5.80
4.90
6.00
Max
1.75
0.25
0.48
0.23
5.00
6.20
page 36/47
L99VR01
SO-8 package information
Symbol
e h
L
L1 k ccc
3.80
0.25
0.40
0°
Millimeters
3.90
1.27
1.04
4.00
0.50
1.27
8°
0.10
1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side.
DS13649 - Rev 2 page 37/47
7.3
L99VR01
PowerSSO-12 packaging information
PowerSSO-12 packaging information
Figure 54. PowerSSO-12 tape and reel shipment (suffix “TR”)
DS13649 - Rev 2 page 38/47
7.4
SO-8 packaging information
Figure 55. SO-8 tape and reel shipment (suffix “TR”)
L99VR01
SO-8 packaging information
DS13649 - Rev 2 page 39/47
8
L99VR01
Order codes
Order codes
Package
P/N
L99VR01STR
L99VR01JTR
Order code
Tape & reel
Enable
X
X
Reset
X
X
Order codes
SO-8
PowerSSO-12
Autonomous watchdog
-
X
L99VR01
L99VR01STR
L99VR01JTR
Advanced thermal warning
-
X
Ishort CTRL
-
X
DS13649 - Rev 2 page 40/47
L99VR01
Revision history
Date
02-Mar-2021
13-Apr-2021 2
Table 20. Document revision history
Version
1
Changes
Initial release
Updated Table 11. Thermal warning and protection (only for L99VR01J)
;
Section 2.4 Electrical characteristics curves
.
DS13649 - Rev 2 page 41/47
L99VR01
Contents
Contents
DS13649 - Rev 2 page 42/47
L99VR01
Contents
DS13649 - Rev 2 page 43/47
L99VR01
List of tables
List of tables
DS13649 - Rev 2 page 44/47
L99VR01
List of figures
List of figures
Figure 14. Output voltage vs enable voltage (V
=0.8 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Output voltage vs enable voltage (V
=1.2 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Output voltage vs enable voltage (V
Figure 17. Output voltage vs enable voltage (V
=1.8 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Output voltage vs enable voltage (V
=2.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Output voltage vs enable voltage (V
Figure 20. Output voltage vs enable voltage (V
=3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Output voltage vs enable voltage (V
DS13649 - Rev 2 page 45/47
L99VR01
List of figures
DS13649 - Rev 2 page 46/47
L99VR01
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS13649 - Rev 2 page 47/47
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