STMicroelectronics VL53L4CD Datasheet
STMicroelectronics VL53L4CD is a high accuracy proximity and short-range ranging sensor that offers reliable distance measurements, ideal for various applications. With an impressive measuring range of 1mm to 1300mm and a fast ranging frequency of up to 100Hz, it ensures accurate and rapid readings. Its fully integrated design, including a 940nm VCSEL emitter, microcontroller, and advanced digital firmware, simplifies integration and reduces BOM cost. The VL53L4CD operates with a single power supply of 2.
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VL53L4CD
VL53L4CD
Datasheet
Time-of-Flight high accuracy proximity sensor
Features
High accuracy proximity ranging
• High performance proximity sensor
• From 0 to 1300 mm with full field of view (FoV)
• Short distance linearity down to 1 mm
• FoV of 18°
• Autonomous low power mode with programmable interrupt threshold to wake up the host
• Fast ranging frequency up to 100 Hz
Fully integrated miniature module
• 940 nm invisible laser emitter (VCSEL) and analog driver
• Low power microcontroller running advanced digital Firmware
• 4.4 x 2.4 x 1 mm size
• Pin-to-pin compatible with VL53L0X, VL53L1X, VL53L1CB, VL53L3CX and
VL53L4CX
Easy integration
• Reflowable component
• Single power supply 2v8
• Can be hidden behind cover glass
• I 2 C interface (up to 1 MHz)
• Full set of C software drivers (Linux compatible) for turnkey ranging
• Embedded processing for very low memory footprint in the host
Applications
• Proximity ranging applications such as:
– Wall tracking and cliff detection for robotics
– System activation and presence detection
– Touchless switch
• Very low power consumption for battery powered devices including:
– Access control
– Sanitary (faucets, dispensers, etc.)
– Home appliances (thermostats, lighting control, etc.)
• Fast ranging
– Bar code readers
– Biometric distance applications
– Virtual fences
DS13812 - Rev 3 - January 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
VL53L4CD
Description
Specifically designed for proximity and short-range measurements, the VL53L4CD provides very accurate distance measurements from only 1 mm up to 1300 mm. A new generation laser emitter with 18° FoV improves performances under ambient light, with ranging speed up to 100 Hz.
With very low power consumption thanks to an Autonomous mode with programmable distance threshold, the VL53L4CD is ideal for use in battery powered devices. Its fully embedded on-chip processing helps to reduce design complexity as well as BOM cost since less powerful and less expensive microcontrollers can be used.
Like all Time-of-Flight (ToF) sensors based on ST's FlightSense technology, the
VL53L4CD records an absolute distance measurement regardless of the target color and reflectance.
Housed in a miniature reflowable package, which integrates a SPAD (single photon avalanche diode) array, the VL53L4CD achieves the best ranging performance in various ambient lighting conditions and for a wide range of cover glass materials.
All of ST's ToF sensors integrate a VCSEL (vertical cavity surface emitting laser).
It emits a fully invisible 940 nm IR light that is totally safe for eyes (Class 1 certification).
DS13812 - Rev 3 page 2/36
VL53L4CD
Product overview
1
Product overview
1.1
1.2
Technical specification
Feature
Package
Size
Operating voltage
Operating temperature
Infrared emitter
I2C
Table 1. Technical specification
Detail
Optical LGA12
4.4 x 2.4 x 1 mm
2.6 to 3.5 V
-30 to 85°C
940 nm
Up to 1 MHz (Fast mode plus) serial bus
Address: 0x52
System block diagram
Figure 1. VL53L4CD block diagram
DS13812 - Rev 3 page 3/36
1.3
Note:
Note:
VL53L4CD
Device pinout
Device pinout
The following figure shows the pinout of the VL53L4CD (see also
Figure 2. VL53L4CD pinout (bottom view)
GPIO1 7
GND3
6 5 XSHUT
DNC 8 4 GND2
SDA 9
SCL 10
3
2
GND
AVSSVCSEL
AVDD 11 12
GND4
1 AVDDVCSEL
Pin number
5
6
7
8
3
4
1
2
9
10
11
12
Signal name
AVDDVCSEL
AVSSVCSEL
GND
GND2
XSHUT
GND3
GPIO1
DNC
SDA
SCL
AVDD
GND4
Table 2. VL53L4CD pin description
Signal type
Supply
Signal description
VCSEL supply, to be connected to main supply
VCSEL ground, to be connected to main ground
Ground
Digital input
Ground
Digital output
Digital input
Digital input/output
Digital input
Supply
Ground
To be connected to main ground
Xshutdown pin, active low
To be connected to main ground
Interrupt output. Open drain output
Do not connect, must be left floating
I2C serial data
I2C serial clock input
Supply, to be connected to main supply
To be connected to main ground
AVSSVCSEL and GND are ground pins and can be connected together in the application schematics.
GND2, GND3, and GND4 are standard pins that are forced to the ground domain in the application schematics to avoid possible instabilities if set to other states.
DS13812 - Rev 3 page 4/36
1.4
Application schematic
The following figure shows the application schematic of the VL53L4CD.
Figure 3. VL53L4CD schematic
VL53L4CD
Application schematic
DS13812 - Rev 3
Capacitors on external supply AVDD should be placed as close as possible to the AVDDVCSEL and AVSSVCSEL module pins.
External pull up resistor values can be found in I2C-bus specification. Pull ups are typically fitted only once per bus, near the host. For suggested values see
Table 3. Suggested pull-up and series resistors for I2C Fast mode
and Table 4. Suggested pull up and series resistors for I2C Fast mode plus
.
XSHUT pin must always be driven to avoid leakage current. A pull up is needed if the host state is not known.
XSHUT is needed to use HW standby mode (no I2C communication).
XSHUT and GPIO1 pull up recommended values are 10 kOhms.
GPIO1 should be left unconnected if not used.
The following tables list recommended values for pull up and series resistors for an AVDD of 1.8 V to 2.8 V in I2C
Fast mode (up to 400 kHz) and Fast mode plus (up to 1 MHz).
Table 3. Suggested pull-up and series resistors for I2C Fast mode
C
L
≤ 90 pF
90 pF < C
L
≤ 140 pF
140 pF < C
L
≤ 270 pF
270 pF < C
L
≤ 400 pF
Pull up resistor (Ohms)
3.6 k
2.4 k
1.2 k
0.8 k
1. For each bus line, CL is measured in application PCB by customer.
Series resistor (Ohms)
0
0
0
0 page 5/36
VL53L4CD
Application schematic
Table 4. Suggested pull up and series resistors for I2C Fast mode plus
C
L
≤ 90 pF
90 pF < C
L
≤ 140 pF
140 pF < C
L
≤ 270 pF
270 pF < C
L
≤ 400 pF
Pull up resistor (Ohms)
1.5 k
1 k
0.5 k
0.3 k
1. For each bus line, CL is measured in application PCB by customer.
Series resistor (Ohms)
100
50
50
50
DS13812 - Rev 3 page 6/36
VL53L4CD
Functional description
2
Functional description
2.1
System functional description
Figure 4. VL53L4CD system functional description shows the system level functional description.
The host customer application controls the VL53L4CD device using a driver called Ultra Lite Driver (ULD). The
ULD contains a set of high level functions that allow control of the VL53L4CD Firmware (FW), like initialization, ranging start/stop, setting the system accuracy.
The driver is a turnkey solution consisting of a set of “C” functions that enable fast development of end user applications without the complication of direct multiple register access. The driver is structured in a way that it can be compiled on any kind of platform through a well abstracted platform layer. The driver package allows the user to take full advantage of the VL53L4CD capabilities.
A detailed description of the driver is available in the user manual (UM2931).
The FW fully manages the hardware (HW) registers access.
Section 2.2 State machine description details the Firmware state machine.
Figure 4. VL53L4CD system functional description
DS13812 - Rev 3 page 7/36
2.2
State machine description
The following figure shows the device state machine.
Figure 5. Device state machine
VL53L4CD
State machine description
2.3
2.4
2.5
Customer manufacturing calibration flow
Up to two calibrations are needed to ensure the best sensor performances. Offset needed in all applications. If a cover glass is used, cross-talk calibration is needed also.
The detailed procedure is provided in the VL53L4CD Ultra Lite Driver user manual (UM2931).
Device programming and control
The device physical control interface is I2C, described in Section 3 Control interface
.
A software layer (driver) is provided to control the device. This avoids complex I2C register operations with turnkey functions to start, stop and read the ranging values.
The driver structure and functions are described in the VL53L4CD Ultra Lite Driver user manual.
Digital processing and reading the results
Digital processing is the final operation of the ranging sequence that computes, validates or rejects a ranging measurement.All the processing is performed by the VL53L4CD internal firmware. The software driver allows reading the results when they are valid.
If the distance cannot be measured (no target or weak signal), a corresponding status error code is generated and can be read by the host.
A full description of the status errors is provided in the VL53L4CD Ultra Lite Driver user manual (UM2931).
DS13812 - Rev 3 page 8/36
2.6
2.7
Note:
VL53L4CD
Reading the results
Reading the results
The software driver provides turnkey functions to read output results after the measurement:
• Signal rate
• Ranging distance
• Measurement status
A full description is provided in the VL53L4CD Ultra Lite Driver user manual (UM2931).
Power sequence
There are two options available for device power up and boot sequence.
In all cases, XSHUT has to be raised only when AVDD is tied on.
Option 1
The XSHUT pin is connected and controlled from the host.
This option optimizes power consumption as the device can be completely powered off when not used, and then woken up through the host (using the XSHUT pin).
HW Standby mode is the period when AVDD is present and XSHUT is low.
Figure 6. Power up and boot sequence
Note: t
BOOT
is 1.2 ms maximum.
Option 2
The XSHUT pin is not controlled by the host; it is tied to AVDD through the pull up resistor.
When the XSHUT pin is not controlled, the power-up sequence is presented in the following figure. In this case, the device goes automatically to SW STANDBY after FW BOOT, without entering HW STANDBY.
Figure 7. Power up and boot sequence with XSHUT not controlled
Note: t
BOOT
is 1.2 ms maximum.
DS13812 - Rev 3 page 9/36
2.8
Ranging sequence
Figure 8. Ranging sequence
VL53L4CD
Ranging sequence
Note:
Note:
2.9
API in the figure above means application programmable interface.
t timing_budget
is a parameter set by the user, using a dedicated driver function.
Handshake management
Once a ranging measurement is available, an interrupt is generated. This is communicated to the host as a physical signal on the GPIO1 pin, which is driven low, and the output of a driver function. The former operating method is called “hardware interrupt”, and the latter is referred to as “polling mode”.
Once the host reads the result, the interrupt is cleared by the driver and the ranging sequence can continue. If the interrupt is not cleared, the ranging operation inside the device is on hold. The interrupt behavior allows a good synchronization between the device and the host, which avoids losing results if the host is not available to acquire or process the data.
It is strongly recommended to use the hardware interrupt pin to manage this handshake.
For more details refer to VL53L4CD Ultra Lite Driver user manual.
DS13812 - Rev 3 page 10/36
3
VL53L4CD
Control interface
Control interface
This section specifies the control interface. The I2C interface uses two signals: serial data line (SDA) and serial clock line (SCL). Each device connected to the bus uses a unique address and a simple master / slave relationship exists.
Both SDA and SCL lines are connected to a positive supply voltage using pull-up resistors located on the host.
Lines are only actively driven low. A high condition occurs when lines are floating and the pull up resistors pull lines up. When no data is transmitted both lines are high.
Clock signal generation is performed by the master device. The master device initiates data transfer. The I2C bus has a maximum speed of 1 Mbits/s and uses a default device address of 0x52.
Figure 9. Data transfer protocol
Start condition
SDA
SCL
S
Acknowledge
MSB
1 2 3 4 5
Address or data byte
6 7
LSB
8
Ac/Am
Stop condition
P
Information is packed in 8 bit packets (bytes) and is always followed by an acknowledge bit, Ac for VL53L4CD acknowledge and Am for master acknowledge (host bus master). The internal data is produced by sampling SDA at a rising edge of SCL. The external data must be stable during the high period of SCL. The exceptions to this are start (S) or stop (P) conditions when SDA falls or rises respectively, while SCL is high.
A message contains a series of bytes preceded by a start condition and followed by either a stop or repeated start (another start condition but without a preceding stop condition) followed by another message. The first byte contains the device address (0x52) and also specifies the data direction. If the least significant bit is low (that is, 0x52) the message is a master-write-to-the-slave. If the LSB is set (that is, 0x53) then the message is a master-read-from-the-slave.
Figure 10. I2C device address: 0x52
MSBit
0 1 0 1 0 0 1
LSBit
R/W
All serial interface communications with the Time-of-Flight sensor must begin with a start condition. The
VL53L4CD module acknowledges the receipt of a valid address by driving the SDA wire low. The state of the read/write bit (LSB of the address byte) is stored and the next byte of data, sampled from SDA, can be interpreted. During a write sequence, the second byte received provides a 16 bit index which points to one of the internal 8 bit registers.
DS13812 - Rev 3 page 11/36
DS13812 - Rev 3
VL53L4CD
Control interface
Figure 11. Data format (write)
As data are received by the slave, they are written bit by bit to a serial/parallel register. After each data byte has been received by the slave, an acknowledge is generated, the data are then stored in the internal register addressed by the current index.
During a read message, the contents of the register addressed by the current index is read out in the byte following the device address byte. The contents of this register are parallel loaded into the serial/parallel register and clocked out of the device by the falling edge of SCL.
Figure 12. Data format (read)
S
0x52 (write)
ADDRESS[7:0]
S
As INDEX[15:8]
0x53 (read)
ADDRESS[7:0] As
As INDEX[7:0]
DATA[7:0] Am P
As P
At the end of each byte, in both read and write message sequences, an acknowledge is issued by the receiving device (that is, the VL53L4CD for a write and the host for a read).
A message can only be terminated by the bus master, either by issuing a stop condition or by a negative acknowledge (that is, not pulling the SDA line low) after reading a complete byte during a read operation.
The interface also supports auto increment indexing. After the first data byte has been transferred, the index is automatically incremented by 1. The master can therefore send data bytes continuously to the slave until the slave fails to provide an acknowledge or the master terminates the write communication with a stop condition. If the auto increment feature is used the master does not have to send address indexes to accompany the data bytes.
Figure 13. Data format (sequential write)
S
0x52 (write)
ADDRESS[7:0] As INDEX[15:8] As INDEX[7:0] As P
DATA[7:0] As DATA[7:0] As DATA[7:0] As P page 12/36
VL53L4CD
I2C interface - timing characteristics
Figure 14. Data format (sequential read)
S
0x52 (write)
ADDRESS[7:0] As INDEX[15:8]
S
0x53 (read)
ADDRESS[7:0] As DATA[7:0]
As
Am
INDEX[7:0]
DATA[7:0]
As P
Am
DATA[7:0] Am DATA[7:0] Am DATA[7:0] Am P
3.1
Symbol
F
I2C t
LOW t
HIGH t
SP t
BUF t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R t
F t
SU.STO
Ci/o
Cin
C
L
I2C interface - timing characteristics
Timing characteristics are shown in the following tables. Refer to
Figure 15. I2C timing characteristics
for an explanation of the parameters used.
Timings are given for all PVT conditions
Table 5. I2C interface - timing characteristics for Fast mode plus (1 MHz)
Parameter
Operating frequency
Clock pulse width low
Clock pulse width high
Pulse width of spikes which are suppressed by the input filter
Bus free time between transmissions
Start hold time
Start setup time
Data in hold time
Data in setup time
SCL/SDA rise time - -
SCL/SDA fall time
Stop set-up time
Input/output capacitance (SDA)
Input capacitance (SCL)
Load capacitance
Minimum
0
0.5
0.26
-
0.5
50
-
-
0.26
0.26
0
0.26
-
-
-
Typical
-
-
-
-
-
-
-
-
-
-
-
140
-
-
-
Maximum
1000
-
-
50
-
-
120
120
-
10
4
550
-
-
0.9
μs ns
μs pF
Unit kHz
μs ns
DS13812 - Rev 3 page 13/36
DS13812 - Rev 3
VL53L4CD
I2C interface - timing characteristics
Symbol
F
I2C t
LOW t
HIGH t
SP t
BUF t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R t
F t
SU.STO
Ci/o
Cin
C
L
SDA
Table 6. I2C interface - timing characteristics for Fast mode (400 kHz)
Parameter
Operating frequency
Clock pulse width low
Clock pulse width high
Pulse width of spikes which are suppressed by the input filter
Bus free time between transmissions
Start hold time
Start setup time
Data in hold time
Data in setup time
SCL/SDA rise time - -
SCL/SDA fall time
Stop set-up time
Input/output capacitance (SDA)
Input capacitance (SCL)
Load capacitance
Minimum
0
1.3
0.6
-
1.3
0.26
0.26
0
50
0.6
-
-
-
-
-
Typical
-
-
-
-
-
-
-
-
-
-
-
-
-
-
125
Maximum
400
-
-
50
-
0.9
-
-
-
300
300
-
10
4
400
Figure 15. I2C timing characteristics stop start start stop
...
V
IH
V
IL
Unit kHz
μs ns
μs ns
μs pF
SCL
V
IH
V
IL t
BUF t
HD.STA
t
LOW t
R t
HD.DAT
IL
or V
IH
.
t
F t
HIGH t
SU.DAT
...
t
HD.STA
t
SU.STA
t
SU.STO
All timings are measured from either V
IL
or V
IH
.
page 14/36
3.2
Note:
VL53L4CD
I2C interface - reference registers
I2C interface - reference registers
The registers shown in the table below can be used to validate the user I2C interface.
Register name
Model_ID
Module_Type
Table 7. Reference registers
Index
0x010F
0x0110
Value
0xEB
0xAA
The I2C read/writes can be 8,16 or 32-bit. Multi-byte reads/writes are always addressed in ascending order with
MSB first as shown in the following table.
The customer must use the VL53L4CD software driver for easy and efficient ranging operations to match performance and accuracy criteria. Hence full register details are not exposed. The customer should refer to the VL53L4CD Ultra Lite Driver user manual.
Table 8. 32-bit register example
Register address
Address
Address + 1
Address + 2
Address + 3
Byte
MSB
-
-
LSB
DS13812 - Rev 3 page 15/36
VL53L4CD
Electrical characteristics
4
Electrical characteristics
4.1
4.2
4.3
Absolute maximum ratings
Warning:
Stresses above those listed in the following table may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameter
AVDD
SCL, SDA, XSHUT and GPIO1
Table 9. Absolute maximum ratings
Min.
Typ.
-0.5
-
Max.
3.6
Unit
V
Recommended operating conditions
There are no power supply sequencing requirements. The I/Os may be high, low or floating when AVDD is applied. The I/Os are internally failsafe with no diode connecting them to AVDD.
Table 10. Recommended operating conditions
There are no power supply sequencing requirements. The I/Os may be high, low or floating when AVDD is applied. The I/Os are internally failsafe with no diode connecting them to AVDD.
Parameter Min.
Typ.
Max.
Unit
Voltage (AVDD)
Ambient operating temperature
2.6
1.6
-30
2.8
1.8/2.8
—
3.5
3.5
85
V
°C
1. XSHUT should be high level only when AVDD is on
2. Performances described in the datasheet are given under 23deg ambient temperature
ESD
The VL53L4CD is compliant with ESD values presented in the following table.
Parameter
Human body model
Charged device model
Table 11. ESD performances
Specification
JS-001-2012
JESD22-C101
Conditions
± 2 kV, 1500 Ohms, 100 pF
± 500 V
DS13812 - Rev 3 page 16/36
4.4
4.5
VL53L4CD
Current consumption
Current consumption
Table 12. Power consumption at ambient temperature
All current consumption values include silicon process variations. Temperature and voltage are nominal conditions (23°C and
2v8). All values include AVDD and AVDDVCSEL.
Parameter Min.
Typ.
Max.
Unit
HW STANDBY
SW STANDBY
Active ranging average consumption
(including VCSEL)
3
4
5
6
22
1. Active ranging is an average value, measured using default driver settings.
2. Peak current (including VCSEL) can reach 40 mA
7
9
24
μA mA
Digital input and output
Table 13. Digital I/O electrical characteristics
Symbol
VIL
VIH
VOL
VOH
FGPIO
VIL
VIH
VOL
IIL/IH
Parameter
Low level input voltage
High level input voltage
Low level output voltage (IOUT = 4 mA)
High level output voltage (IOUT = 4 mA)
Min.
Interrupt pin (GPIO1)
-
0.7 IOVDD
-
IOVDD-0.4
Operating frequency (CLOAD = 20 pF)
0
Low level input voltage
I2C interface (SDA/SCL)
-0.5
1.12
High level input voltage
Low level output voltage
(IOUT = 4 mA)
-
-
-
1. AVDD = 0 V
2. AVDD = 2.85 V; I/O voltage = 1.8 V
Typ.
-
-
Max.
0.3 IOVDD
-
0.4
-
108
0.6
IOVDD+0.5
0.4
10
0.15
Unit
V
MHz
V
μA
DS13812 - Rev 3 page 17/36
VL53L4CD
Ranging performances
5
Ranging performances
5.2
5.3
5.1
•
•
•
•
•
•
•
•
Measurement conditions
In all the measurement tables of this document, it is considered that:
• All ranging performances are measured with the target covering the full FoV.
Charts used as targets are: gray (17% reflectance, N4.74 Munsell) and white (88% reflectance N9.5
Munsell).
Nominal voltage is 2.8 V and temperature is 23°C.
The device is controlled through the driver using the default settings (refer to the user manual for driver settings description).
Indoor (no IR) means there is no contribution of light in the band 940 nm ± 30 nm
Outdoor overcast corresponds to an ambient light level of 10 kcps/SPAD. For reference, this corresponds to a 1.2 W/m 2 at 940 nm following the AM1.5G spectrum and is equivalent to 5 kLux daylight as reflected by a gray 17% chart at 40 cm.
No cover glass is present.
Typical samples are used.
Offset correction made at 100 mm from sensor with gray 17% target.
Minimum ranging distance
The minimum detection distance is 0 mm. The minimum ranging distance with a linear response is 1 mm.
Maximum ranging distance
The following table shows the ranging specification for the VL53L4CD bare module, without cover glass, at room temperature (23°C), with nominal voltage (2.8 V) and full FoV covered.
Table 14. Max. ranging capabilities with 33 ms timing budget
Target reflectance level, full FoV
(reflectance %)
White target (88%)
Gray target (17%)
Indoor
(detection rate %)
Typical: 1200 mm @ 90% min
Typical: 1300 mm @ 50% min
Typical: 450 mm @ 90% min
Typical: 475 mm @ 50% min
Outdoor overcast
(detection rate %)
Typical: 550 mm @ 90% min
Typical: 600 mm @ 50% min
Typical: 400 mm @ 90% min
Typical: 450 mm @ 50% min
Detection rate is a statistical value indicating the worst case percentage of measurements that return a valid ranging. For example, taking 1000 measurements with 90% detection rate will give 900 valid distances. The 100 other distances may be outside of the specification and are flagged with an error status.
DS13812 - Rev 3 page 18/36
5.4
Ranging accuracy
The figure below illustrates how range accuracy is defined over distance.
Figure 16. Ranging accuracy vs. distance
VL53L4CD
Ranging accuracy
DS13812 - Rev 3
The ranging accuracy is a direct evaluation of the measurement error, including offset errors and output noise.
At least 90% of the ranging values are within the declared ranges. This quality indicator includes measure-tomeasure and part-to-part dispersion.
Table 15. Typical ranging accuracy with 33 ms timing budget
Target reflectance level, full
FoV
Distance (mm) Indoor (no infrared)
White target (88%)
Gray target (17%)
1-100
101-200
>200
1-100
101-200
>200
± 7 mm
± 8 mm
± 3%
± 6 mm
± 8 mm
± 4%
Outdoor overcast
± 8 mm
± 9 mm
± 8%
± 7 mm
± 9 mm
± 8% page 19/36
5.5
VL53L4CD
Ranging drift with temperature
Ranging drift with temperature
When the temperature increases, the ranging value may be affected.
This value is an offset and not a gain, and it does not depend on the target distance.
The device embeds a feature that allows to compensate the temperature variation effect.
In order to get the most accurate performances, perform a manual temperature update when temperature varies.
This operation is done using a dedicated driver function. Refer to the VL53L4CD Ultra Lite Driver user manual
(UM2931).
DS13812 - Rev 3 page 20/36
6
VL53L4CD
Outline drawings
Outline drawings
ST delivers any of the two alternative dual source cap assemblies as detailed in the drawings below. Both versions are transparent for the customer, since the pad and substrate design are identical for both versions and have no impact on customer PCB design. Ranging performances, reflow, and technical parameters are identical for all module designs presented in the figures below.
Figure 17. Outline drawing (page 1/4)
DS13812 - Rev 3 page 21/36
Figure 18. Outline drawing (page 2/4)
VL53L4CD
Outline drawings
DS13812 - Rev 3 page 22/36
Figure 19. Outline drawing (page 3/4)
VL53L4CD
Outline drawings
DS13812 - Rev 3 page 23/36
Figure 20. Outline drawing with liner (page 4/4)
VL53L4CD
Outline drawings
DS13812 - Rev 3 page 24/36
7
VL53L4CD
Field of view (FoV) and field of illumination (FoI)
Field of view (FoV) and field of illumination (FoI)
The Rx (or collector) exclusion zone includes all module assembly tolerances and is used to define the cover window dimensions. The cover window opening must be equal to or wider than the exclusion zone.
The detection volume represents the applicative or system FoV in which a target is detected, and a distance measured. It is determined by the Rx lens or the Rx aperture, and is narrower than the exclusion zone.
Figure 21. System FoV and exclusion zone description (not to scale)
Note:
Note:
Setting
Detection volume (°)
Collector exclusion cone (°)
Table 16. FoV angles
Target at 100 mm (white 88%)
22°
25°
Target at 1000 mm (white 88%)
18°
25°
Detection volume depends on the environment and sensor configuration as well as target distance, reflectance, ambient light level, sensor timing budget, distance mode, and tuning parameters.
The detection volume of
Table 16. FoV angles has been measured with a white 88% reflectance perpendicular
target in full FoV, located at 100 mm and 1000 mm from the sensor, without ambient light (dark conditions), using the default driver configuration.
The VCSEL FoI is shown in the figure below. The X-axis is 16° and the Y-axis is 16° (1/e²).
Figure 22. VL53L4CD FoI
DS13812 - Rev 3 page 25/36
VL53L4CD
Laser safety considerations
8
Laser safety considerations
Caution:
The VL53L4CD contains a laser emitter and corresponding drive circuitry. The laser output is designed to remain within Class 1 laser safety limits under all reasonably foreseeable conditions including single faults in compliance with IEC 60825-1:2014 (third edition).
The laser output remains within Class 1 limits as long as STMicroelectronic’s recommended device settings are used and the operating conditions specified are respected (particularly the maximum timing budget, as described in the user manual .
The laser output power must not be increased by any means and no optics should be used with the intention of focusing the laser beam.
Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.
Figure 23. Class 1 laser product label
DS13812 - Rev 3 page 26/36
VL53L4CD
Packaging and labeling
9
Packaging and labeling
9.1
9.2
9.3
Product marking
A two line product marking is applied on the backside of the module (i.e. on the substrate). The first line is the silicon product code, and the second line, the internal tracking code.
Inner box labeling
•
•
•
•
•
•
The labeling follows the ST standard packing acceptance specification.
The following information will be on the inner box label:
Assembly site
Sales type
Quantity
Trace code
Marking
Bulk ID number
Packing
At customer level, it is recommended to mount the VL53L4CD in a clean environment to avoid foreign material deposition.
To help avoid any foreign material contamination at product assembly level the modules is shipped in a tape and reel format. The tape is described in
Figure 24. Tape outline drawing
.
The packaging is vacuum sealed and includes a desiccant.
DS13812 - Rev 3 page 27/36
9.4
Tape outline drawing
Figure 24. Tape outline drawing
VL53L4CD
Tape outline drawing
DS13812 - Rev 3 page 28/36
9.5
Note:
VL53L4CD
Pb-free solder reflow process
Pb-free solder reflow process
Table 17. Recommended solder profile and Figure 25. Solder profile
show the recommended and maximum values for the solder profile.
Customers have to tune the reflow profile depending on the PCB, solder paste and material used. We expect customers to follow the recommended reflow profile, which is specifically tuned for package.
For any reason, if a customer must perform a reflow profile which is different from the recommended one
(especially peak >240°C), this new profile must be qualified by the customer at their own risk. In any case, the profile must be within the “maximum” profile limit described in the following table.
Temperature mentioned in the following table are measured at the top of the package.
Parameters
Minimum temperature (TS min)
Maximum temperature (TS max)
Time ts (TS min to TS max)
Temperature (TL)
Time (tL)
Ramp up
Temperature (Tp-10)
Time (tp-10)
Ramp up
Peak temperature (Tp)
Time to peak
Ramp down (peak to Tl)
Table 17. Recommended solder profile
Recommended
130
200
90-110
217
55-65
2
-
240
30
-4
Maximum
150
200
60-120
217
55-65
3
250
10
3
260 max
300
-6
Figure 25. Solder profile
Unit
°C
°C/s
°C s
°C/s s
°C s
°C/s
°C s
Note:
Note:
Note:
The component should be limited to a maximum of three passes through this solder profile.
As the VL53L4CD package is not sealed, only a dry reflow process should be used (such as convection reflow).
Vapor phase reflow is not suitable for this type of optical component.
The VL53L4CD is an optical component and as such, it should be treated carefully. This would typically include using a ‘no wash’ assembly process.
DS13812 - Rev 3 page 29/36
9.6
9.6.1
9.6.2
9.6.3
9.6.4
9.7
VL53L4CD
Handling and storage precautions
Handling and storage precautions
Shock precaution
Sensor modules house numerous internal components that are susceptible to shock damage. If a unit is subject to excessive shock, is dropped on the floor, or a tray/reel of units is dropped on the floor, it must be rejected, even if no apparent damage is visible.
Part handling
Handling must be done with non-marring ESD safe carbon, plastic, or teflon tweezers. Ranging modules are susceptible to damage or contamination. The customer is advised to use a clean assembly process after removing the tape from the parts, and until a protective cover glass is mounted.
Compression force
A maximum compressive load of 25 N should be applied on the module.
Moisture sensitivity level
Moisture sensitivity is level 3 (MSL) as described in IPC/JEDEC JSTD-020-C.
Storage temperature conditions
Parameter
Temperature (storage)
Table 18. Recommended storage conditions
Min.
-40
Typ.
23
Max.
85
Unit
°C
DS13812 - Rev 3 page 30/36
10
VL53L4CD
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS13812 - Rev 3 page 31/36
VL53L4CD
Ordering information
11
Ordering information
Order codes
VL53L4CDV0DH/1
Table 19. Order codes
Package
Optical LGA12 with liner
Packing
Tape and reel
Minimum order quantity
4500 pcs
DS13812 - Rev 3 page 32/36
VL53L4CD
Revision history
Date
15-Oct-2021
29-Oct-2021
03-Jan-2022
2
3
Table 20. Document revision history
Version
1
Changes
Initial release
Correct the Active Ranging values in Section 4.4 Current consumption
Update
Figure 16. Ranging accuracy vs. distance
Modify the FoV range from 1200 mm to 1300 mm in
DS13812 - Rev 3 page 33/36
VL53L4CD
Contents
Contents
DS13812 - Rev 3 page 34/36
VL53L4CD
Contents
DS13812 - Rev 3 page 35/36
VL53L4CD
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
DS13812 - Rev 3 page 36/36
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