STMicroelectronics TDA7561 Datasheet
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TDA7561
Multifunction quad power amplifier with built-in diagnostics features
Datasheet
production data
Features
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■
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■
■
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Multipower BCD technology
DMOS power output
High output power capability 4 x 25 W / 4
@
14.4 V, 1 kHz, 10 % THD, 4 x 35 W EIAJ
Max. output power 4 x 60 W / 2
Full I
2
C bus driving:
– Standby
– Independent front/rear soft play/mute
– Selectable gain 26 dB - 12 dB (for low noise line output function)
– I
2
C bus digital diagnostics
Full fault protection
DC offset detection
Four independent short circuit protection
Clipping detector
ESD protection
'!0'03
Flexiwatt25
(vertical)
Flexiwatt25
(horizontal)
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Thanks to the DMOS output stage the TDA7561 has a very low distortion allowing a clear powerful sound.
This device is equipped with a full diagnostics array that communicates the status of each speaker through the I
2
C bus.The possibility to control the configuration and behaviour of the device by means of the I
2
C bus makes TDA7561 a very flexible machine.
Description
The TDA7561 is a BCD technology quad bridge type of car radio amplifier in Flexiwatt25 package specially intended for car radio applications.
Table 1.
Device summary
Order code
TDA7561
TDA7561H
Package
Flexiwatt25 (vertical)
Flexiwatt25 (horizontal)
Packing
Tube
Tube
September 2013
This is information on a product in full production.
Doc ID 8326 Rev 6 1/27 www.st.com
1
Contents
Contents
TDA7561
Block diagram and test/application diagram . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Diagnostics functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
I2C programming/reading sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/27 Doc ID 8326 Rev 6
TDA7561
List of tables
List of tables
Doc ID 8326 Rev 6 3/27
List of figures
List of figures
TDA7561
Output power vs. supply voltage, R
L
= 2
Output power vs. supply voltage, R
L
L
L
= 4
= 2
= 4
= 2
= 4
Power dissipation and efficiency vs. output power (4
, SINE). . . . . . . . . . . . . . . . . . . . . . 11
Power dissipation vs. average output power (audio program simulation, 4
) . . . . . . . . . . 11
Power dissipation vs. average output power (audio program simulation, 2
Restart timing without diagnostic enable (permanent) - Each 1 mS time,
a sampling of the fault is done . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2
C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2
C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4/27 Doc ID 8326 Rev 6
TDA7561
1
Block diagram and test/application diagram
Block diagram and test/application diagram
Figure 1.
Block diagram
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Figure 2.
Test and application diagram
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Doc ID 8326 Rev 6 5/27
Pins description
6/27
Figure 3.
Pins connection diagram (top view)
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Doc ID 8326 Rev 6
TDA7561
'!0'03
TDA7561 Electrical specifications
3.1 Absolute maximum ratings
Table 2.
Symbol
V op
V
S
V peak
V
CK
V
DATA
I
O
I
O
P tot
T stg
, T j
Absolute maximum ratings
Parameter
Operating supply voltage
DC supply voltage
Peak supply voltage (for t = 50 ms)
CK pin voltage
Data pin voltage
Output peak current (not repetitive t = 100 ms)
Output peak current (repetitive f > 10 Hz)
Power dissipation T case
= 70 °C
Storage and junction temperature
Value
8
6
6
6
18
28
50
85
-55 to 150
Unit
A
A
V
V
V
V
V
W
°C
Table 3.
Symbol
Thermal data
Parameter
R th j-case
Thermal resistance junction-to-case Max.
Value
1
Unit
°C/W
Table 4.
Symbol
Refer to the test circuit, V
S
= 14.4 V; R
L
= 4
; f = 1 kHz; T amb
= 25 °C; unless otherwise specified.
Electrical characteristics
Parameter Test condition Min. Typ.
Max.
Unit
Power amplifier
V
S
I d
Supply voltage range
Total quiescent drain current
P
O
Output power
-
-
EIAJ (V
S
= 13.7 V)
THD = 10%
THD = 1%
R
L
= 2
; EIAJ (V
S
= 13.7 V)
R
L
= 2
; THD 10%
R
L
= 2
; THD 1%
R
L
= 2
; Max. power
22
-
50
8
-
32
32
-
-
-
150
35
25
20
55
38
30
60
-
-
-
18
300
-
-
-
-
W
W
W
V mA
W
W
W
W
Doc ID 8326 Rev 6 7/27
Electrical specifications TDA7561
Table 4.
Symbol
Electrical characteristics (continued)
Parameter Test condition
THD
C
T
R
IN
G
V1
G
V1
G
V2
G
V2
E
IN1
E
IN2
Total harmonic distortion
Cross talk
Input impedance
Voltage gain 1
Voltage gain match 1
Voltage gain 2
Voltage gain match 2
Output noise voltage 1
Output noise voltage 2
-
-
P
O
= 1 W to 10 W
G
V
= 12 dB; V
O
= 0.1 to 5 V
RMS f = 1 kHz to 10 kHz, R g
= 600
-
-
-
Rg = 600
, 20 Hz to 22 kHz
Rg = 600
; G
V
= 12 dB
20 Hz to 22 kHz
SVR
BW
A
SB
I
SB
A
M
V
OS
V
AM
T
ON
T
OFF
CD
LK
CD
CD
SAT
THD
Supply voltage rejection
Power bandwidth
Standby attenuation
Standby current
Mute attenuation
Offset voltage
Min. supply mute threshold
Turn-on delay
Turn-off delay
Clip det. high leakage current
Clip det. sat. voltage
Clip det. THD level
-
-
-
f = 100 Hz to 10 kHz;
Vr = 1 Vpk; R g
= 600
Mute & play
-
D2/D1 (IB1) 0 to 1
D2/D1 (IB1) 1 to 0
CD off
CD on; I
CD
= 1 mA
V
S
> 10 V
Turn on diagnostics 1 (Power amplifier mode)
Pgnd
Pvs
Pnop
Lsc
Short to GND det. (below this limit, the Output is considered in short circuit to GND)
Power amplifier in standby condition
Short to Vs det. (above this limit, the output is considered in short circuit to V
S
)
-
Normal operation thresholds.
(Within these limits, the Output is considered without faults).
-
Shorted load det.
Lop Open load det.
-
-
Lnop Normal load det.
-
-
50
-
Vs -1.2
1.8
-
130
1.5
20
20
0
150
1
-
110
25
100
0
7.5
-
-
-
-
-
100
90
-
80
-100
7
Min. Typ.
Max.
80
25
-1
11
-
-
50
-1
-
0.04
0.02
60
100
26
-
12
-
35
0.1
0.05
-
130
27
1
13
1
80
12
60
-
-
-
-
-
-
20
-
1.2
Vs -1.8
0.5
70
40
40
15
300
2
-
-
100
-
100
8
Unit
%
% dB k
dB dB dB dB
µV
µV dB
V
V
V
ms ms
µA mV
% kHz dB
µA dB mV
V
8/27 Doc ID 8326 Rev 6
TDA7561 Electrical specifications
Table 4.
Symbol
Electrical characteristics (continued)
Parameter Test condition Min. Typ.
Max.
Turn-on diagnostics 2 (Line driver mode)
Pgnd
Pvs
Pnop
Lsc
Short to GND det. (below this limit, the Output is considered in short circuit to GND)
Power amplifier in standby
Short to Vs det. (above this limit, the output is considered in short circuit to V
S
)
-
Normal operation thresholds
(within these limits, the output is considered without faults).
-
Shorted load det.
Lop Open load det.
-
-
Lnop Normal load det.
-
Permanent diagnostics 2 (Power amplifier mode or line driver mode)
Vs -1.2
1.8
-
-
400
4.5
Pgnd
Pvs
Pnop
L
V
SC
O
Short to GND det. (below this limit, the Output is considered in short circuit to GND)
Power amplifier in mute or play, one or more short circuits protection activated
Short to Vs det. (above this limit, the output is considered in short circuit to V
S
)
-
Normal operation thresholds.
(within these limits, the output is considered without faults)
-
Shorted load det.
Offset detection
Power amplifier mode
Line driver mode
Power amplifier in play, AC Input signals = 0
-
-
-
Vs -1.2
1.8
1.5
I
2
C bus interface f
SCL
V
IL
V
IH
Clock frequency
Input low voltage
Input high voltage -
-
-
-
-
2.3
-
-
-
-
-
-
-
-
-
-
-
2
400
-
-
1.2
1.5
-
200
0.5
1.5
-
1.5
-
-
Vs -1.8
1.2
-
Vs -1.8
2.5
Unit
V
V
V
V
V
V
V
kHz
V
V
Doc ID 8326 Rev 6 9/27
Electrical specifications TDA7561
Figure 4.
Quiescent current vs. supply voltage
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Figure 5.
Output power vs. supply voltage,
R
L
= 2
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0O MAX
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4($
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Figure 6.
Output power vs. supply voltage,
R
L
= 4
0O 7
6S6
Figure 7.
Distortion vs output power,
R
L
= 2
4( $
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F+( Z
0O MAX
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Figure 8.
Distortion vs output power,
R
L
= 4
4($
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Figure 9.
Distortion vs. frequency, R
L
= 2
4( $
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2,/ HM
6S 6
2, /HM
0O 7
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FK (Z
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'!0'03
10/27
'!0'03
Doc ID 8326 Rev 6
TDA7561 Electrical specifications
Figure 10.
Distortion vs. frequency, R
L
= 4
Figure 11.
Crosstalk vs. frequency
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6S 6
2,/HM
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F(Z
Figure 12.
Supply voltage rejection vs. frequency
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Figure 13.
Power dissipation and efficiency vs. output power (4
, SINE)
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H
6S6
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F+(Z3).%
0TOT
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6R IPPLE 6 PK
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'!0'03 '!0'03
Figure 14.
Power dissipation vs. average output power (audio program simulation, 4
)
Figure 15.
Power dissipation vs. average output power (audio program simulation, 2
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Doc ID 8326 Rev 6
0O7
'!0'03
11/27
Diagnostics functional description
4 Diagnostics functional description
TDA7561
●
●
●
●
It is activated at the turn-on (standby out) under I
2
C bus request. Detectable output faults are:
Short to GND
Short to Vs
Short across the speaker
Open speaker
To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (
) is internally generated, sent through the speaker(s) and sunk back.The
Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested (after a I
2
C reading).
If the "standby out" and "diag. enable" commands are both given through a single programming step, the pulse takes place first (power stage still in stand-by mode, low, outputs = high impedance).
Afterwards, when the Amplifier is biased, the permanent diagnostic takes place. The previous Turn-on state is kept until a short appears at the outputs.
Figure 16.
Turn-on diagnostic: working principle
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and
show SVR and output waveforms at the turn-on (stand-by out) with and without turn-on diagnostic.
Figure 17.
SVR and output behaviour (case 1: without turn-on diagnostic)
6SVR
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ACQUISITIONTIMEM34YP
12/27
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PERMITTEDTIME
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Doc ID 8326 Rev 6
T
'!0'03
TDA7561 Diagnostics functional description
Figure 18.
SVR and output pin behaviour (case 2: with turn-on diagnostic)
6 S VR
/ U T
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ACQUISITIONTIMEM34YP
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ACQUISITIONTIMEM34YP
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The information related to the outputs status is read and memorized at the end of the current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for short to GND / Vs the fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:
Figure 19.
Short circuit detection thresholds
3#TO'.$ X .ORMAL/PERATION X 3#TO6S
6 6 6 6
3
6 6
3
6 6
3
'!0'03
Concerning short across the speaker / open speaker, the threshold varies from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 26 dB gain are as follows:
Figure 20.
Load detection thresholds - high gain setting
3#ACROSS,OAD X .ORMAL/PERATION X /PEN,OAD
6 7 7 7 7 )NFINITE
'!0'03
If the line-driver mode (Gv = 12 dB and line driver mode diagnostic = 1) is selected, the same thresholds will change as follows:
Figure 21.
Load detection threshold - low gain setting
3#ACROSS,OAD X .ORMAL/PERATION X /PEN,OAD
7 7 7 7 7 INFINITE
'!0'03
Doc ID 8326 Rev 6 13/27
Diagnostics functional description TDA7561
14/27
Detectable conventional faults are:
●
●
●
Short to GND
Short to Vs
Short across the speaker
The following additional features are provided:
● Output offset detection
The TDA7561 has 2 operating statuses:
1.
Restart mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s)
interested is shut down. A check of the output status is made every 1 ms ( Figure 22
).
Restart takes place when the overload is removed.
2. Diagnostic mode. It is enabled via I
2
C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs.
Once activated, the diagnostics procedure develops as follows ( Figure 23 ):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started.
– After a diagnostic cycle, the audio channel interested by the fault is switched to restart mode. The relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I
2
C reading. This is to ensure continuous diagnostics throughout the car-radio operating time.
– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over half a second is recommended).
Figure 22.
Restart timing without diagnostic enable (permanent) - Each 1 mS time, a sampling of the fault is done
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M3 M3 M3
M3
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CIRCUIT PROTECTIONINTERVENTION
IESHORT CIRCUI TT O'.$
T
3HORT CIRCUI TREMOVED
Figure 23.
Restart timing with diagnostic enable (permanent)
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/VERCURRENT ANDSHORT
CIRCUITPROTECTI ON IN TERVENTI ON
IES HORTC IRCUI TTO'.$
'!0'03
T
3HO RTCIRCUIT REMOVED
'!0'03
Doc ID 8326 Rev 6
TDA7561
4.3
Diagnostics functional description
Output DC offset detection
Any DC output offset exceeding ±2 V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
●
●
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):
Start = Last reading operation or setting IB1 - D5 - (offset enable) to 1
Stop = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.
Doc ID 8326 Rev 6 15/27
Multiple faults TDA7561
When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I
2
C reading and faults removal, provided that the diagnostic is enabled.
This is true for both kinds of diagnostic (turn on and permanent).
The table below shows all the couples of possible double-fault. It should be taken into account that a short circuit with the 4 ohm speaker unconnected is considered as double fault.
Table 5.
S. GND (so)
S. GND (sk)
S. Vs
S. Across L.
Open L.
Double fault table for turn-on diagnostic
S. GND (so) S. GND (sk) S. Vs
S. GND
/
/
/
/
S. GND
S. GND
/
/
/
S. Vs + S.
GND
S. Vs
S. Vs
/
/
S. Across L.
S. GND
S. GND
S. Vs
S. Across L.
/
Open L.
S. GND
Open L.
(*)
S. Vs
N.A.
Open L.
(*)
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, so = CH+, sk = CH-.
In permanent diagnostic the table is the same, with only a difference concerning Open
Load
(*)
, which is not among the recognizable faults. Should an Open Load be present during the device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle
(i.e. at the successive Car Radio Turn on).
All the results coming from I
2
C bus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out.
To guarantee always resident functions, every kind of diagnostic cycles (Turn-on,
Permanent, Offset) will be reactivate after any I
2
C reading operation. So, when the microprocessor reads the I
2
C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. The device is in turn-on state, with a short to GND, then the short is removed and micro reads I
2
C. The short to GND is still present in bytes, because it is the result of the previous cycle. If another I
2
C reading operation occurs, the bytes do not show the short). In general to observe a change in diagnostic bytes, two I
2
C reading operations are necessary.
16/27 Doc ID 8326 Rev 6
TDA7561
6 I
2
C bus
I2C bus
6.1 I
2
C programming/reading sequence
●
●
●
A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection):
●
Turn-on: (Standby out + Diag enable) --- 500 ms (min) --- Muting out
Turn-off: Muting in --- 20 ms --- (Diag disable + Standby in)
Car radio installation: Diag enable (write) --- 200 ms --- I
2
C read (repeat until All faults disappear).
Offset test: Device in Play (no signal) -- Offset enable - 30 ms - I
2
C reading (repeat I
2
C reading until high-offset message disappears).
6.2 I
2
C bus interface
Data transmission from microprocessor to the TDA7561 and viceversa takes place through the 2 wires I
2
C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
6.2.2
As shown by
Figure 24 , the data on the SDA line must be stable during the high period of
the clock.
The High and Low state of the data line can only change when the clock signal on the SCL line is Low.
Start and stop conditions
As shown by
a start condition is a High to Low transition of the SDA line while SCL is HIGH.
The stop condition is a Low to High transition of the SDA line while SCL is High.
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first.
Doc ID 8326 Rev 6 17/27
I2C bus TDA7561
6.2.4 Acknowledge
The transmitter puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 26 ). The receive the acknowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.
Transmitter:
– master (µP) when it writes an address to the TDA7561
– slave (TDA7561) when the µP reads a data byte from TDA7561
Receiver:
– slave (TDA7561) when the µP writes an address to the TDA7561
– master (µP) when it reads a data byte from TDA7561
Figure 24.
Data validity on the I
2
C bus
3$!
3#,
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Figure 25.
Timing diagram on the I
2
C bus
3#,
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) #"53
3$!
34!24
Figure 26.
Acknowledge on the I
2
C bus
3#,
34/0
'!0'03
3$!
-3"
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18/27 Doc ID 8326 Rev 6
TDA7561 Software specifications
All the functions of the TDA7561 are activated by I
2
C interface.
The bit 0 of the "Address byte" defines if the next bytes are write instruction (from µP to
TDA7561) or read instruction (from TDA7561 to µP).
Chip address
D0
X D8 Hex
D7
1 1 0 1 1 0
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
Table 6.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
IB1
X
Diagnostic enable (D6 = 1)
Diagnostic defeat (D6 = 0)
Offset detection enable (D5 = 1)
Offset detection defeat (D5 = 0)
Front channel
Gain = 26dB (D4 = 0)
Gain = 12dB (D4 = 1)
Rear channel
Gain = 26dB (D3 = 0)
Gain = 12dB (D3 = 1)
Mute front channels (D2 = 0)
Unmute front channels (D2 = 1)
Mute rear channels (D1 = 0)
Unmute rear channels (D1 = 1)
X
Instruction decoding bit
0
Doc ID 8326 Rev 6 19/27
Software specifications TDA7561
Table 7.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
IB2
Instruction decoding bit
X
X
X
X
Used for testing
Used for testing
Standby on - Amplifier not working - (D4 = 0)
Standby off - Amplifier working - (D4 = 1)
Power amplifier mode diagnostic (D3 = 0)
Line driver mode diagnostic (D3 = 1)
If R/W = 1, the TDA7561 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.
Table 8.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
DB1
Instruction decoding bit
Thermal warning active (D7 = 1)
Diag. cycle not activated or not terminated (D6 = 0)
Diag. cycle terminated (D6 = 1)
X
Channel LFTurn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel LF
Normal load (D3 = 0)
Short load (D3 = 1)
Channel LFTurn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel LFNo short to Vcc (D1 = 0)Short to Vcc (D1 = 1)
Channel LFNo short to GND (D1 = 0)Short to GND (D1 = 1)
20/27 Doc ID 8326 Rev 6
TDA7561
Table 9.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
DB2
Instruction decoding bit
Offset detection not activated (D7 = 0)
Offset detection activated (D7 = 1)
X
X
Channel LRTurn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel LRNormal load (D3 = 0)
Short load (D3 = 1)
Channel LRTurn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel LR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel LR
No short to GND (D1 = 0)
Short to GND (D1 = 1)
Table 10.
DB3
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Instruction decoding bit
Standby status (= IB1 - D4)
Diagnostic status (= IB1 - D6)
X
Channel RFTurn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel RFNormal load (D3 = 0)
Short load (D3 = 1)
Channel RF
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel RFNo short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
Channel RFNo short to GND (D1 = 0)
Short to GND (D1 = 1)
Software specifications
Doc ID 8326 Rev 6 21/27
Software specifications
Table 11.
DB4
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Instruction decoding bit
X
X
X
Channel RR
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
Channel RR
Normal load (D3 = 0)
Short load (D3 = 1)
Channel RR
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.:No output offset (D2 = 0)
Output offset detection (D2 = 1)
Channel RRNo short to Vcc (D1 = 0) Short to Vcc (D1 = 1)
Channel RRNo short to GND (D1 = 0) Short to GND (D1 = 1)
TDA7561
22/27 Doc ID 8326 Rev 6
TDA7561
8 Examples of bytes sequence
Examples of bytes sequence
1 - Turn-on diagnostic - Write operation
Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP
2 - Turn-on diagnostic - Read operation
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP
The delay from 1 to 2 can be selected by software, starting from 1 ms
3a - Turn-on of the power amplifier with 26 dB gain, mute on, diagnostic defeat.
Start Address byte with D0 = 0 ACK IB1
X000000X
ACK IB2
XXX1X0XX
ACK STOP
3b - Turn-off of the power amplifier
Start Address byte with D0 = 0 ACK IB1
X0XXXXXX
ACK IB2
XXX0XXXX
ACK STOP
4 - Offset detection procedure enable
Start Address byte with D0 = 0 ACK IB1
XX1XX11X
ACK IB2
XXX1X0XX
ACK STOP
5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4).
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP
●
●
The purpose of this test is to check if a DC offset (2V typ.) is present on the outputs, produced by input capacitor with anomalous leakage current or humidity between pins.
The delay from 4 to 5 can be selected by software, starting from 1 ms.
Doc ID 8326 Rev 6 23/27
Package information TDA7561
24/27
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Figure 27. Flexivatt25 (vertical) mechanical data and package dimensions
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Doc ID 8326 Rev 6
TDA7561 Package information
Figure 28. Flexivatt25 (horizontal) mechanical data and package dimensions
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Doc ID 8326 Rev 6 25/27
Revision history TDA7561
Table 12.
Document revision history
Date Revision
December 2002
17-May-2012
16-Sep-2103
4
5
6
Changes
-
Document reformatted.
Added
Table 1: Device summary on page 1
.
Added
Figure 28: Flexivatt25 (horizontal) mechanical data and package dimensions on page 25 .
Updated Disclaimer.
26/27 Doc ID 8326 Rev 6
TDA7561
Please Read Carefully:
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Doc ID 8326 Rev 6 27/27
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