SO-8
L4949ED-E
L4949EP-E
Automotive multifunction very low drop voltage regulator
Datasheet
-
production data
Description
The L4949ED-E and L4949EP-E are monolithic integrated 5V voltage regulators with a very low dropout output and additional functions as power- on reset and input voltage sense. They are designed for supplying the microcomputer controlled systems especially in automotive applications.
SO-20W (12+4+4)
Features
AEC-Q100 qualified
ECOPACK
®
: lead free and RoHS compliant
Operating DC supply voltage range 5 V - 28 V
Transient supply voltage up to 40 V
Extremely low quiescent current in standby
High precision standby output voltage 5V±1%
Output current capability up to 100 mA
Very low dropout voltage less than 0.5 V
Reset circuit sensing the output voltage
Programmable reset pulse delay with external capacitor
Voltage sense comparator
Thermal shutdown and short circuit protections
Package
SO-8
SO-20W
Table 1. Device summary
Order codes
Tube
-
L4949EP-E
Tape and Reel
L4949EDTR-E
L4949EPTR-E
September 2018
This is information on a product in full production.
DS6614 Rev 4
1/19
www.st.com
1
2
Contents
Contents
3
4
5
L4949ED-E, L4949EP-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
Supply voltage transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.4
Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5
Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6
Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1
ECOPACK
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2
SO-8 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3
SO-20 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
DS6614 Rev 4
L4949ED-E, L4949EP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9.
SO-8 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 10.
SO-20 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 11.
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DS6614 Rev 4
3/19
3
List of figures
List of figures
L4949ED-E, L4949EP-E
Figure 1.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2.
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3.
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4.
Foldback characteristic of V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5.
Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6.
Quiescent current vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7.
Block circuit of reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8.
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9.
SO-8 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10.
SO20 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4/19
DS6614 Rev 4
L4949ED-E, L4949EP-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
Note: The block diagram illustrates only a major internal device functionality and it is not intended to mimic any details of hardware design
Figure 2. Configuration diagram (top view)
SO-8
DS6614 Rev 4
SO-20
5/19
18
Block diagram and pin description L4949ED-E, L4949EP-E
SO-8
Pin N°
SO-20
1 19
2
3
20
1
4
5
6
2
4, 5, 6, 7, 14,
15, 16, 17
10
7 11
8
-
12
3, 8, 9, 13, 18
Table 2. Pin definitions and functions
Symbol Function
V
S
S
I
V
Z
C
T
GND
RES
S
O
V
OUT
NC
Input supply voltage. Block to GND via an external
capacitor (see Figure 3 ).
Sense input pin to supervise input voltage. Connect via an external voltage divider connected to V
S
and to GND.
Preregulator output voltage. For details, see
Section 3.4:
Preregulator
.
Reset pulse delay adjustment. Connecting this pin via a capacitor to GND
Ground reference
Reset output. It is pulled down when the output voltage goes below V
RT
.
Sense output. This open collector pin must be connected to
V
OUT
via an external resistor. It is pulled down whenever the S
I
voltage becomes lower than an internal voltage.
Output voltage. Block to GND via an external capacitor (see
Figure 3
)
Not connected pins
6/19
DS6614 Rev 4
L4949ED-E, L4949EP-E Electrical specifications
2.1
Note:
Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol Parameter
V
SDC
DC operating supply voltage
V
STR
Transient supply voltage (T < 1s)
I
O
V
O
V
RES
, V
SO
I
RES
, I
SO
V
CT
V
SIDC
Reset delay voltage
Sense input voltage
V
Z
I
Z
T
J
T stg
Preregulator output voltage
Preregulator output current
Junction temperature
Storage temperature range
28
40
20
20
5
7
28
7
5
-40 to +150
-55 to +150
The circuit is ESD protected according to MIL-STD-883C.
V
V
V mA
°C
°C
V
V mA
V
V
Table 4. Thermal data
R th j-amb
Thermal Resistance Junction-ambient (max)
R th j-pins
TJSD
Thermal Resistance Junction-pins (max)
Thermal Shutdown Junction temperature
200
165
50
15
°C/W
°C/W
°C
DS6614 Rev 4
7/19
18
Electrical specifications L4949ED-E, L4949EP-E
V
S
= 14 V; -40 °C < T j
< 125 °C unless otherwise specified
Table 5. Electrical characteristics
Symbol Parameter
V
V
V
V
O
O
O
DP
Output voltage
Output voltage
T
J
= 25 °C; I
O
= 1 mA 4.95
6 V < V
IN
< 28 V, 1 mA < I
O
< 50 mA 4.90
V
IN
= 40 V;
T < 1 s; 5 mA < I
O
< 100 mA
I
O
I
O
= 10 mA
= 50 mA
I
O
= 100 mA
I
V
IO
LIM
V
OLO
Input to output voltage difference in undervoltage condition
V
IN
= 4 V, I
O
= 35 mA
I outh
(1)
Max output leakage
V
OL
Line regulation
Load regulation
V
IN
= 25 V, V
6 V < V
IN
O
= 5.5 V
< 28 V; I
O
= 1 mA
1 mA < I
O
< 100 mA
V
O
= 4.5 V
V
O
= 4.5 V; T
V
O
= 0 V
(2)
J
= 25 °C
20
105
120
I
QSE
Quiescent current I
O
= 0.3 mA; T
J
< 100 °C
I
Q
Quiescent I
O
= 100 mA
1.
With this test we guarantee that with no output current the output voltage will not exceed 5.5V
2.
Foldback characteristic
5
5
0.1
0.2
0.3
50
200
100
200
5.05
5.10
0.25
0.4
0.5
0.4
300
5
80
20
30
400
400
V
V
V
V
V
V
µA mV mV mA mA mA
µA mA
Table 6. Reset
Symbol Parameter
V
RT
V
RTH t
RD
V
RL
V
I
RH
CTth
V
CTth, hy
Reset output low voltage
Reset output high leakage current
Delay comparator threshold
Delay comparator threshold hysteresis
C
T
= 100 nF; T
R
100 µs
R
RES
= 10 K
to V
O
V
S
1.5V
V
RES
= 5 V
VO -
0.5V
V
50 100 200 mV
55 100 180 ms
0.4 V
1 µA
2 V
100 mV
8/19
DS6614 Rev 4
L4949ED-E, L4949EP-E
Table 7. Sense
Symbol Parameter
V st
V sth
Sense low threshold
V
SL
I
SH
I
SI
Sense output low voltage
Sense output leakage
Sense input current
V
SI
1.16 V; V
S
R
SO
3 V
= 10 K
to V
O
V
SO
= 5 V; V
SI
1.5 V
V
SI
= 0
Table 8. Preregulator
Symbol Parameter
V
Z
I
Z
Preregulator output voltage
Preregulator output current
I
Z
= 10 µA
Electrical specifications
1.16 1.23 1.35 V
20 100 200 mV
-20 -8
0.4 V
1
-3
µA
µA
4.5 5 6
10
V
µA
DS6614 Rev 4
9/19
18
Application information
Figure 3. Application circuit
L4949ED-E, L4949EP-E
Note:
3.1
For stability: C
S
1µF, C
O
4.7µF, ESR < 10
at 10KHz. Recommended for application: C
S
= C
O
= 10 µF to 100 µF
Supply voltage transient
High supply voltage transients can cause a reset output signal disturbance. For supply voltages greater than 8V the circuit shows a high immunity of the reset output against supply transients of more than 100V/µs. For supply voltages less than 8V supply transients of more than 0.4V/µs can cause a reset signal disturbance.
To improve the transient behaviour for supply voltages less than 8V a capacitor at pin V
Z can be used.
This capacitor (C3
1 µF) reduces also the output noise.
10/19
The L4949ED-E and L4949EP-E are monolithic integrated voltage regulator, based on the
STM modular voltage regulator approach. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. Nevertheless, it is suitable also in other applications where the
DS6614 Rev 4
L4949ED-E, L4949EP-E Application information present functions are required. The modular approach of this device allows to get easily also other features and functions when required.
The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating element.
Figure 4. Foldback characteristic of V
O
With this structure very low dropout voltage at currents up to 100mA is obtained. The dropout operation of the standby regulator is maintained down to 3V input supply voltage.
The output voltage is regulated up to the transient input supply voltage of 40V. With this feature no functional interruption due to overvoltage pulses is generated. The typical curve showing the standby output voltage as a function of the input supply voltage is shown in
Figure 5 . The current consumption of the device (quiescent current) is less than 300 µA.
To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled, the quiescent current as a function of the supply input voltage is shown in
Figure 6 .
DS6614 Rev 4
11/19
18
Application information L4949ED-E, L4949EP-E
Figure 5. Output voltage vs input voltage
Figure 6. Quiescent current vs supply voltage
3.4 Preregulator
To improve the transient immunity a preregulator stabilizes the internal supply voltage to
5 V. This internal voltage is present at Pin 3 (V
Z
). This voltage should not be used as an output because the output capability is very small (
10 µA).
This output may be used as an option when a better transient behaviour for supply voltages less than 8 V is required (see also application note).
In this case a capacitor (100 nF - 1 µF) must be connected between pin V
Z
and GND. If this feature is not used pin V
Z
must be left open.
12/19
DS6614 Rev 4
L4949ED-E, L4949EP-E Application information
The block circuit diagram of the reset circuit is shown in
Figure 7 . The reset circuit
supervises the output voltage.
The reset threshold of 4.5 V is defined with the internal reference voltage and standby output divider.
The reset pulse delay time t
RD
, is defined with the charge time of an external capacitor C
T
: t
RD
=
C
T
2V
-------------------
2
A
The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor CT and is proportional to the value of CT.
The reaction time of the reset circuit increases the noise immunity. Standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time.
The nominal reset delay time is generated for standby output voltage drops longer than approximately 50ms.
The typical reset output waveforms are shown in
Figure 8 .
The sense comparator compares an input signal with an internal voltage reference of typical
1.23V. The use of an external voltage divider makes this comparator very flexible in the application.
It can be used to supervise the input voltage either before or after the protection diode and to give additional informations to the microprocessor like low voltage warnings.
DS6614 Rev 4
13/19
18
Application information
Figure 7. Block circuit of reset circuit
L4949ED-E, L4949EP-E
Figure 8. Waveforms
14/19
DS6614 Rev 4
L4949ED-E, L4949EP-E
4
Package and packing information
Package and packing information
4.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
4.2 SO-8 TP package information
Table 9. SO-8 TP mechanical data mm
Dim.
A a1 0.1 a2 a3 0.65 b 0.35 b1 0.19
C 0.25
1.75
0.25
1.65
0.85
0.48
0.25
0.5
D
(1)
4.8 5.0
E 5.8 6.2 e 1.27 e3 3.81
F
(1)
3.8 4.0
L 0.4
M
1.27
0.6
1.
D and F do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm
(.006inch).
DS6614 Rev 4
15/19
18
Package and packing information
Figure 9. SO-8 TP package dimensions
L4949ED-E, L4949EP-E
4.3 SO-20 TP package information
Table 10. SO-20 TP mechanical data mm
Dim.
A 2.35
A1 0.1
B 0.33
C 0.23
D 12.6
2.65
0.3
0.51
0.32
13
E 7.4 7.6 e 1.27
H 10 10.65
16/19
DS6614 Rev 4
L4949ED-E, L4949EP-E Package and packing information
Table 10. SO-20 TP mechanical data (continued) mm
Dim. h 0.25
L 0.4
K 0 (min.)8 (max.)
0.75
1.27
Figure 10. SO20 TP package dimensions
DS6614 Rev 4
17/19
18
Revision history L4949ED-E, L4949EP-E
Date
24-Nov-2009
20-Sep-2013
28-Feb-2018
24-Sep-2018
Table 11. Document revision history
Revision Description of changes
1
2
3
4
Initial release.
Updated disclaimer.
Removed tube version for SO-8 package.
Updated : Features
18/19
DS6614 Rev 4
L4949ED-E, L4949EP-E
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ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS6614 Rev 4 19/19
19
