STMicroelectronics SRK1000A Datasheet
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SRK1000 /
SRK1000A /SRK1000B
Datasheet
Adaptive synchronous rectification controller for flyback converter
SOT23-6L
Product status link
SRK1000 / SRK1000A /SRK1000B
Product summary
Order code
Package
Packing
SRK1000
SRK1000ATR
SRK1000BTR
SOT23-6L
Tape and reel
Product label
Features
• Secondary side synchronous rectification controller optimized for flyback converter.
• Suitable for QR and mixed CCM/DCM fixed frequency operation.
• Wide V cc
operating voltage range 3.75 to 32 V.
• CC regulation operation down to 2 V output supported.
• Very low quiescent current in low consumption mode (160 μA).
• High-voltage sensing input for SR MOSFET drain-source voltage (100 V AMR).
• Operating frequency up to 300 kHz.
• High-current gate-drive output for N-MOSFET.
• Fast turn-on with minimum delay time and adaptive turn-off logic.
• Programmable min. T
ON
and fixed min. T
OFF
(3 options: SRK1000, SRK1000A,
SRK1000B).
• Low consumption mode entry by primary side burst-mode detection or by detection of SR MOSFET conduction lower than programmed min T
ON
.
• SOT23-6L package.
Application
• Battery chargers / quick chargers
• Adapters
• USB power delivery (profile 3)
Description
SRK1000 / SRK1000A /SRK1000B are controllers intended for secondary side synchronous rectification (SR) in flyback converters, suitable for operation in QR and mixed CCM/DCM fixed frequency circuits.
They provide a high-current gate-drive output, capable of driving N-channel Power
MOSFETs.
The control scheme of this IC is such that the SR MOSFET is switched on as soon as current starts flowing through its body diode and it is then switched off as current approaches zero.
The fast turn-on, with minimum delay, and the innovative adaptive turn-off logic allow maximizing the conduction time of the SR MOSFET and eliminating the effect of parasitic inductance in the circuit.
The device enters low consumption mode when it detects primary controller burstmode operation, or when the SR MOSFET conduction becomes lower than the programmed minimum T
ON
. In this way, converter efficiency improves at light load where synchronous rectification is no longer beneficial.
After the converter restarts switching or the IC detects that the current conduction in the rectifiers has increased 20% above the min T
ON
programmed value, the IC exits low consumption mode and resumes switching operation.
DS12787 - Rev 5 - November 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
SRK1000 / SRK1000A /SRK1000B
Block diagram
Block diagram
DVS
TON
GD
Figure 1. Internal block diagram
HV CLAMP COMPARATORS
ON ZCD
ADAPTIVE
CONTROL
CONTROL LOGIC
DRIVER
POWER
MANAGEMENT &
SWITCH OVER
TIMER
VAUX
VCC
GND
DS12787 - Rev 5 page 2/26
2
Pin description
SRK1000 / SRK1000A /SRK1000B
Pin description
Figure 2. Pin pin configuration
DS12787 - Rev 5
Table 1. Pin description (top view)
No. Name Function
1
2
3
4
VCC
GND
GD
TON
Supply voltage of the device. A bypass capacitor to GND, located as close to IC's pins as possible, helps to get a clean supply voltage for the internal control circuitry and acts as an effective energy buffer for the pulsed gate drive current.
Return of the device bias current and return of the gate drive current. Route this pin close to the source terminal of synchronous rectifier MOSFET.
Gate driver output. Totem pole output stage is able to drive power MOSFET with high peak current levels. To avoid excessive gate voltages in case the device is supplied with a high VCC, the high level voltage of this pin is clamped to about 11.6 V (typ. value). The pin has to be connected directly to the SR MOSFET gate terminal.
Programming pin for blanking time after turn-on. A resistor connected from this pin to GND, supplied by an internal current source, sets a voltage V
TON
; depending on this voltage level, the user can choose the blanking time after turn-on, suitable to mask ZCD comparator output and avoid premature turn-off due to parasitic voltage oscillation on DVS pin. In tracking with V
TON
, the thresholds to enter/exit automatic sleep mode are derived.
A capacitor larger than 60 pF (100 pF typ.) between this pin and GND sets the internal timer mode for SR
MOSFET turn-off in mixed CCM/DCM operation. If no capacitor is used, timer mode is set for turn-off in QR or
DCM operation.
5 VAUX
Auxiliary supply voltage of the device. When VCC voltage is lower than UVLO voltage threshold (V
CC_SO_On
), the bypass capacitor on VCC pin (coupled to application V
OUT through a diode) is supplied by VAUX pin, if this is connected to an auxiliary winding or to an external capacitor sourced by a DVS voltage rectifier.
If the functionality is not used, VAUX pin has to be connected to VCC pin.
6 DVS
Drain voltage sensing. This pin has to be connected to the drain terminal of the synchronous rectifier MOSFET through a series resistor of at least of 300 Ω.
page 3/26
27
3
SRK1000 / SRK1000A /SRK1000B
Maximum ratings and thermal data
Maximum ratings and thermal data
The absolute maximum rating is the maximum stress that can be applied to a device without causing permanent damage. However, extended exposure to maximum ratings may affect long-term device reliability.
Symbol
VCC
VTON
VAUX
DVS
Pin
1
4
5
6
Table 2. Absolute maximum ratings
Parameter
DC supply voltage
TON pin voltage rating
Auxiliary DC supply voltage
Drain sense voltage referred to GND
Value
-0.3 to 36
-0.3 to 3.6
-0.3 to 100
-3 to 100
Unit
V
V
V
V
Table 3. Thermal data
Symbol
R th j-amb
R th j-case
P tot
T j
T stg
Power dissipation at T amb
Storage temperature
Parameter
Junction-to-ambient thermal resistance
Junction-to-case thermal resistance
= 50°C
Junction temperature operating range
Value
200
60
0.5
-40 to 150
-55 to 150
1. With pin 2 soldered to a dissipating copper area of 10 mm 2 , 35 µm thickness (PCB material FR4 1.6 mm thickness)
Unit
°C/W
°C/W
W
°C
°C
DS12787 - Rev 5 page 4/26
4
SRK1000 / SRK1000A /SRK1000B
Typical application schematics
Typical application schematics
Figure 3. QR flyback charger with CV-CC regulation
Figure 4. QR flyback adapter (CV regulation)
DS12787 - Rev 5 page 5/26
SRK1000 / SRK1000A /SRK1000B
Typical application schematics
Figure 5. Fixed frequency CCM flyback adapter (CV regulation)
DS12787 - Rev 5
27 page 6/26
SRK1000 / SRK1000A /SRK1000B
Electrical characteristics
5
Electrical characteristics
DS12787 - Rev 5
Table 4. Electrical characteristics
(T j
= -25°C to 125°C, V
CC
= 12 V, C
GD
= 4.7 nF; unless otherwise specified, typical values refer to T j
= 25°C)
Symbol Parameter Test condition Min. Typ. Max. Unit
Supply section
V
AUX
V
CC
V
CC_On
VAUX operating voltage
Operating voltage range
Turn-on supply voltage
After turn-on
V
CC_SO_On
Turn-on supply voltage for VAUX switch activation
Voltage falling
V
CC_Off
Turn-off supply voltage Voltage falling
V
V
CC_AGD_en
CC_AGD_dis
V
CC voltage above which adaptive drive is enabled
V
CC voltage below which adaptive drive is disabled
On V
CC
On V
CC
rising edge
I q_run
Current consumption in run mode
After turn-on (excluding SR MOS gate driving) @ 100 kHz
I
CC
Operating supply current @ 300 kHz
T
T
I q ant_timer timer_step
Quiescent current
Anticipation time referred to DVS rising edge to force turn off of SR MOSFET
Timer step every 4 switching cycles (in FF operation)
Burst- mode operation, DVS pin not switching, Tj = -25°C to 85°C
R on
VAUX switch resistance
T
D_On
Turn-on delay
Drain-source sensing input and synch functions
V
DS
V
TH_A
DVS operating voltage
Cycle comparator threshold
V
ZCD_OFF_MIN
Minimum ZCD comparator threshold
T diode_off
Body diode residual conduction time after turnoff
DVS switching
Low level on DVS pin = -1 V
With 100pF on TON pin, during switching period increase
T
ON_MAX
T
ON_MIN
I
TON
Max turn-on duration
Sourced current
Blanking time after turn-on and after turn-off
Minimum turn-on time programmable by R the range [33 kΩ - 250 kΩ]
TON in
R
TON_MIN
= 33 kΩ
R
TON_MAX
= 250 kΩ
In run mode
T
OFF_MIN
Fixed blanking time after turn-off (with DVS voltage continuously above V
TH_A
)
SRK1000
SRK1000A
SRK1000B
3.75
3.75 3.95 4.15
7.4
6.5
600
17
40
-20
56
45 60
0.28 0.4
0.52
2.1
3.0
3.9
8
90
32
90
0.35 0.5
0.65
1.4
2 2.6
2.1
3 3.9
V
V
4.18 4.3
4.42
V
3.3
3.5
3.7
V
V
V
µA mA
160 210 µA
Ω
V
70 100 130 mV mV
230 330 430 ns
55 85 105 ns
180 280 380 ns ns
µs
µs
µA
µs page 7/26
DS12787 - Rev 5
SRK1000 / SRK1000A /SRK1000B
Electrical characteristics
T
T
ON_sleep_out
I
Symbol
ON_sleep_in
T source_pk
I sink_pk t t stop r_1 r_2 t f
V
GDclamp
V
GD_ad-step
V
GDL_UVLO
Parameter
Output sink peak current
See
See
Test condition
Low consumption mode
Minimum operating current conduction time to enter sleep-mode:
T
ON_sleep_in
= T
ON_MIN
+ 300 ns
R
TON_MIN
= 33 kΩ
R
TON_MAX
= 250 kΩ
Restart current conduction time from sleepmode:
T
ON_sleep_out
= 1.2 T
ON_MIN
+ 300 ns
R
R
TON_MIN
TON_MAX
Switching stop time interval detection to enter low consumption mode (primary controller burstmode)
Gate drivers
= 33 kΩ
= 250 kΩ
Output source peak current
Rise Time (see
Rise Time (see
Drive clamp voltage
Adaptive driving step voltage
UVLO saturation
1. Parameters tracking each other.
2. Parameter guaranteed by design.
3. Parameters tracking each other.
)
V
CC
= 20V, C
GD
= 4.7 nF
V
CC
= 20V, C
GD
= 10 nF
V
CC
= 20V, C
GD
= 4.7 nF
V
CC
= 20V, C
GD
= 10 nF
V
CC
= 20V, C
GD
= 4.7 nF
V
CC
= 20V, C
GD
= 10 nF
V
CC
V
CC
V
CC
= 0 to V
_On, I sink
= 5 mA
Min. Typ. Max. Unit
0.49 0.7
0.91
2.31 3.3
4.29
µs
0.55 0.78
1
2.73 3.9
5.07
µs
80 120 160 µs
0.6
1
45
75
1.3
A
A ns
140 ns
140
60 ns
120
10.6 11.6 12.6
V
400
1 mV
V
Figure 6. Rise and fall time definition page 8/26
6
SRK1000 / SRK1000A /SRK1000B
Operation description
Operation description
The SRK1000/A/B (see
) are controllers specifically designed for synchronous rectification in flyback converters operating in QR or mixed CCM/DCM fixed frequency. This IC basically turns on the SR MOSFET with a minimum delay when the rectified current starts flowing through the body diode, and turns off the SR MOSFET when current approaches zero, using an adaptive mechanism that leads the body diode residual conduction time after turn-off to the target value T diode_off
(refer to
: for the various parameter values).
The adaptive turn-off method presents some advantages, compared to a standard one based on a comparator with fixed threshold. The first advantage is that the adaptive method automatically compensates stray inductances
L
S
in series to rectified current path: this parasitic (mainly the SR MOSFET package inductances in series to drain and source terminals) normally produces an offset on the sensed voltage across MOSFET R
DS_ON
that anticipates by T
X
= L
S
/R
DS_ON
the turn-off in case of standard comparator.
The second aspect to consider is that a standard comparator with fixed threshold turns off at a current level
I
OFF
that depends on R
DS_ON
of the chosen SR MOSFET. Referring to the image in Figure 7 and considering a
fixed comparator threshold V
TH
= -5 mV, the turn-off current in the rectifier can be calculated. In an application with an SR MOSFET having channel resistance R
DS_ON
= 2.5 mΩ and package stray inductance L
S
= 2.5 nH, where the current slope is di/dt = -3 A/μs (for example starting from a peak current of 15 A with 5 μs transformer demagnetization), the turn-off current is:
I
OFF
= - V
TH
/R
DS_ON
- T
X di/dt = 5 A, for comparator turn-off.
I
OFF_AD
= - T diode_off
di/dt = 0.9 A, for adaptive turn-off.
Furthermore, the adaptive turn-off method has a better behavior also in applications with CC regulation, where the standard comparator with fixed threshold anticipates more and more the turn-off during load impedance decreasing (since current slope continues to decrease too), while adaptive method fixes T diode_off
.
The SRK1000/A/B controllers start operation when the VCC pin voltage surpasses the turnon threshold V
CC_On
; then it stops operation when the V
CC
voltage drops below the turn-off threshold V
CC_Off
.
In order to guarantee SR switching even with low V
CC
supply voltage, in the case of chargers operating in CC regulation, the device is provided with the VAUX pin. When the V
CC voltage decreases below the threshold
V
CC_SO_On
(> V
CC_Off
), an internal switch is turned on allowing the VCC pin capacitor to be charged up to the turn-on threshold V
CC_On
by a current drawn through the VAUX pin connected, for example, to the rectified SR
MOSFET drain voltage or to another auxiliary voltage of the flyback transformer.
For the maximum flexibility in different applications and to overcome noise and ringing problems that may arise after SR MOSFET turn-on, the SRK1000/A/B allow the user to program the blanking time after turn-on through a resistor connected between the TON pin and GND. The blanking time after turn-off is instead internally fixed to
T
OFF_MIN
.
Figure 7. Comparison between adaptive turn-off and comparator based turn-off
DS12787 - Rev 5 page 9/26
6.1
6.2
6.3
SRK1000 / SRK1000A /SRK1000B
Drain voltage sensing
Drain voltage sensing
The drain voltage of the SR MOSFET is sensed through the DVS pin: this is a high-voltage pin and needs to be properly routed to the MOSFET drain, through a resistor of at least 300 Ω (in order to limit dynamic current injection in any condition).
The DVS signal is used to detect when current flows through the MOSFET body diode and for the internal timings.
Turn-on
After the flyback converter primary switch has been turned off, the voltage across the transformer reverses and the SR MOSFET drain voltage quickly decreases and goes negative (-V
F
), allowing the rectifier current to flow.
Consequently, triggered on the falling edge of the DVS signal (when it decreases below the cycle comparator threshold V
TH_A
), the controller turns on the SR MOSFET, with a very short delay T
D_On
. After turn-on, the sensed
DVS signal passes from the (negative) body diode forward voltage to the drop across the MOSFET channel resistance (R
DS_ON
).
This drop is generally affected by some amount of noise, associated with the flyback transformer leakage inductance, and this could trigger a premature turn-off of the SR MOSFET.
Minimum TON programming
In order to avoid premature turn-off of the SR MOSFET due to ringing and oscillations, the IC allows the user to program a blanking time after turn-on. The circuit bases on an internal timing capacitance and an external resistor
R
TON
connected from the TON pin to ground.
The blanking time settlement is done according to the following expression:
TON_ MIN = 12 10 − 12 R TON
(with R
TON
expressed in ohm and T
ON_MIN
in seconds, starting when the DVS signal goes below V
TH_A
). This blanking time of course sets a minimum turn-on time of the SR MOSFET as well: hence, when by reducing the load the SR MOSFET conduction time would become shorter than the programmed blanking time, the IC must
).
(1)
DS12787 - Rev 5 page 10/26
6.4
SRK1000 / SRK1000A /SRK1000B
Adaptive turn-off and timer
Adaptive turn-off and timer
The SR MOSFET can be turned off through two coexisting mechanisms (whichever triggers first); the first based on an adaptive algorithm, the second on the internal timer.
The adaptive turn-off consists of a ZCD_OFF comparator, where the DVS signal is compared to an adapting threshold. This threshold is adapted in such a way that, at steady state, the measured residual conduction time of the SR MOSFET body diode after turn-off meets the target value T diode_off
(as shown in Figure 8 ). The residual
conduction time of the body diode is measured between the falling edge of the driving signal and the rising edge of the DVS signal (first time surpassing the threshold V
TH_A
).
Figure 8. ZCD_OFF threshold adapting for body diode target conduction
The internal timer basically turns off the SR MOSFET with a fixed anticipation time T ant_timer
with respect to the first rising edge of the DVS signal. The IC has two different timer operating modes, selectable by the user, optimized for fixed frequency mixed CCM/DCM converters or for QR/DCM applications. The selection of the proper timer mode is done through a 100 pF capacitor across the TON pin: if it is present, mixed CCM/DCM operation is assumed; if the capacitor is not present, QR/DCM operation is assumed.
Here below the various operating modes are described.
Fixed frequency mixed DCM/CCM operation:
In fixed frequency operation, the SR MOSFET turn-off is triggered by ZCD_OFF adaptive mechanism at load levels where DCM operation occurs, while it is triggered by timer at higher loads, where CCM operation occurs.
The latter consists in turning off the SR MOSFET with a fixed anticipation time T ant_timer
with respect to the first rising edge of the DVS signal, basing on a switching period T
SW
estimate, (over few previous cycles) as illustrated
Turn-off by timer may take over also during low-to-high load transients, where the ZCD_OFF comparator threshold is in the adapting phase (close to the zero crossing and could not turn-off per time), preventing undesired current inversions.
Most of the flyback controllers available on the market, in order to help optimize the EMI filter, use operating frequency modulation. For correct operation of the SRK1000/A/B timer, the maximum rate of change of modulated frequency must be limited, so that the switching period increase from current to next cycle results much shorter than the timer anticipation T ant_timer
(14 ns maximum). In fact, the timer anticipation adapting during switching period increase is limited to T timer_step every 4 cycles and with a switching period increase longer than 14 ns from one cycle to the next, the timer turn-off would progressively anticipate (increasing the body diode conduction).
DS12787 - Rev 5 page 11/26
SRK1000 / SRK1000A /SRK1000B
Adaptive turn-off and timer
Figure 9. Timer anticipation for fixed frequency CCM operation (100 pF mounted on TON pin)
QR operation (with valley skipping):
In QR flyback application the circuit works at variable frequency and, after transformer demagnetization, a resonance occurs due to primary inductance and total parasitic capacitance across primary switch. In this case, at steady state, SR MOSFET turn-off is triggered by ZCD_OFF adaptive mechanism.
During load transitions or during CC regulation operation (where output voltage may decrease), turn-off by adaptive ZCD_OFF comparator would be too late (since the threshold needs to adapt to the new slope of current flowing into the SR MOSFET), while turn-off by internal timer prevents current inversion.
The timer for fixed frequency CCM is not suitable in QR operation (that inherently operates at variable frequency).
In this case, the timer operating mode consists in turning off the SR MOSFET with a fixed anticipation time
T ant_timer
with respect to the first rising edge of the DVS signal, based on the duration of the previous demagnetization time of transformer T dem
.
Looking at the image in Figure 10
, during the first two switching cycles (steady state operation) the turn-off is triggered by the ZCD_OFF comparator. This is because the DVS signal reaches the adapted ZCD_OFF threshold before the timer OFF event (since target diode T diode_off
is larger than timer anticipation T ant_timer
). In the third switching cycle, as a consequence of the transient, the turn-off is instead triggered by the timer, since current slope has decreased and the ZCD_OFF threshold would be reached too late. In the following cycle (not shown in the figure) the timer settles the anticipation to the duration of the demagnetization period of the third cycle.
Figure 10. Timer anticipation for QR operating circuit (no capacitor mounted on TON pin)
DS12787 - Rev 5
Fixed frequency DCM operation:
In fixed frequency circuits designed to operate always in DCM in all line and load conditions, the SRK1000/A/B operate basically like in the case of QR operation: the turn-off is accomplished by adaptive mechanism in steady state operation, while timer turn-off is invoked to protect against current inversion during load transitions and in
CC regulation. In this case, the timer mode can be either the one for FF CCM or the one for QR application; the preferred one is the latter, as it is less expensive (no capacitor on the TON pin is required).
page 12/26
6.5
SRK1000 / SRK1000A /SRK1000B
Minimum TOFF
Minimum TOFF
In flyback applications operating in DCM and QR with valley skipping, a resonance takes place across transformer windings after demagnetization, whose period T
RES
depends on the transformer primary inductance and on the total capacitance across primary switch.
In order to avoid this ringing affecting SRK1000/A/B internal timings, an internally fixed blanking time (T
OFF_MIN
) after turn-off is provided.
, the circuit provides a blanking time from the falling edge of the driving signal to the time instant occurring after the DVS pin voltage, (V
DS
) is permanently higher than V
TH_A
for T
OFF_MIN
.
The device allows for three different choices of blanking after turn-off, according to the selected option (SRK1000,
SRK1000A and SRK1000B): for correct operation, the user must select the device option with T
OFF_min
> T
RES
(the ringing period).
Figure 11. Blanking time after turn-off
Furthermore, referring to
Figure 12 , an internal comparator referenced to a voltage V
R
higher than 2 V
OUT
senses the DVS pin voltage (where V
R and V
DS
are conveniently scaled). When the V
DS
voltage gets higher than V
R
, the comparator triggers and the blanking time is terminated. This helps during constant voltage regulation operation, at high input voltage levels (where typically the conduction time of the primary MOSFET is short), avoiding that the blanking time determined by T
OFF_min
might delay the SR MOSFET turn-on. The internal threshold V
R
is fixed to 2.83 V
CC
(where V
CC
equals V
OUT
or V
OUT-VF
, depending on whether VAUX functionality is used or not; see
Section 6.8 VAUX pin operation in CC regulation ).
Figure 12. Comparator for blanking time termination
DS12787 - Rev 5 page 13/26
27
6.6
6.7
6.8
SRK1000 / SRK1000A /SRK1000B
Start-up phase
Start-up phase
At converter startup, after the VCC pin voltage has surpassed the turn-on threshold V
CC_On
, the SRK1000/A/B enter the pinstrap phase (lasting 5 switching cycles), where it checks whether a 100 pF capacitor is present on the TON pin or not and internally stores this information as long as V
CC voltage stays above the turn-off threshold
V
CC_Off
. After pinstrap, the SRK1000/A/B enter sleep-mode state and, when it detects that the demagnetization time is longer than the programmed sleep-mode exiting threshold (see
ZCD comparator threshold starting from the minimum level V
ZCD_OFF_MIN
).
Low consumption mode operation: sleep mode and burst mode
By progressively reducing the load, SR MOSFET conduction time (the transformer demagnetization time) decreases as well: when the conduction time approaches the programmed minimum T
ON
, the IC stops switching, reduces its consumption and enters automatic sleep-mode state. The SR MOSFET conduction time to enter sleep mode (measured between the falling and the rising edge of the DVS signal across V
TH_A
) is:
TON _ sleep in = TON_MIN + 300 ns
The IC resumes operation when the load is increased and the conduction time of the SR MOSFET body diode becomes a fixed amount longer than the programmed minimum T
ON
:
(2)
TON _ sleep out = 1.2 T ON_MIN + 300 ns (3)
Both T
ON_sleep_in
and T
ON_sleep_out
are measured from the time instant when the DVS signal falls below V
TH_A and the time instant when it rises above V
TH_A
the first time. The device, once the condition is detected, only takes one cycle to enter/exit sleep-mode operation.
The controller enters low consumption mode also when it detects primary controller burstmode operation, that is, when a switching stop occurs for more than T stop
(i.e. V
DS
is sensed higher than V
TH_A
for more than T stop
).
On converter operation resuming, the SRK1000/A/B sleep-out transition takes place after the first negative going edge of the DVS voltage (falling below the threshold V
TH_A
): in this first cycle, the gate driving is skipped; in the next cycle, the driving signal width equals the programmed minimum T
ON
.
It may happen that the SRK1000/A/B enter sleep mode first and then (after further load reduction) it detects primary controller burst-mode operation: in this case, when primary side switching operation restarts, the
SRK1000/A/B resume SR MOSFET driving after it detects the body diode conduction time is larger than the sleep out value T
ON_sleep_out
for one cycle.
VAUX pin operation in CC regulation
In charger applications operating in CC regulation, the output voltage V
OUT
(which is also used to supply the
SRK1000/A/B) may considerably decrease while output current is kept constant at progressively reduced load impedance. For example, a 10 W charger, set at +5 V output in CV regulation, may be required to operate down to 2 V output while it is regulating the output current to somewhat more than 2 A in CC regulation.
In order to guarantee SR MOSFET switching even with low V
CC
supply voltage, the SRK1000/A/B are provided with the VAUX pin. Referring to the schematic in
CC
voltage decreases below the threshold
V
CC_SO_On
(> V
CC_Off
), an internal switch is turned on allowing the capacitor C2 placed on the VCC pin to be charged up to the turn-on threshold V
CC_On
by a current drawn through the VAUX pin.
DS12787 - Rev 5 page 14/26
SRK1000 / SRK1000A /SRK1000B
VAUX pin operation in CC regulation
Figure 13. VAUX supply for CC regulation operation (from rectified SR MOSFET drain)
or to another auxiliary voltage of the flyback transformer as shown in
.
In either case, a (Schottky) decoupling diode (D2) is necessary to avoid the VAUX pin charging the output capacitor. An external resistor R ext
may be used in series to the VAUX pin in order to dissipate externally some power amount that, without that resistor, would be totally dissipated inside the SRK1000/A/B.
Figure 14. VAUX supply for CC regulation operation from auxiliary winding
DS12787 - Rev 5
Considering the circuit in Figure 13
, the following exemplification is provided to calculate the value of R ext
resistor and power dissipation, in the case of a +5 V charger with operation down to 2 V in CC regulation and transformer secondary-to-primary reflected voltage of 75V: page 15/26
DS12787 - Rev 5
SRK1000 / SRK1000A /SRK1000B
VAUX pin operation in CC regulation
•
•
•
• a) Measure or estimate the IC current consumption during CC regulation operation as below:
– I
CC
= I q_run
+V
CC_avg
C iss
F sw
= 0.7 mA + 4.1 V 5 nF 50 kHz = 1.725 mA where I q
is the IC quiescent current, V
CC_avg
is the average voltage across the VCC pin (mean value between V
CC_On and V frequency.
CC_SO_On
), C iss
is the SR MOSFET input capacitance and F sw
is the operating b) Calculate the maximum and minimum voltage available at the VAUX pin:
– V
AUX_min
= V o.CC
+V in.min
(NS/NP) - V
F
= 2 V + 75 V (1/15) - 0.35 V = 6.65 V
V
AUX_max
= V o.CC
+V in.max
(NS/NP) - V
F
= 2 V + 375 V (1/15) - 0.35 V = 26.65 v where V o.CC
is the output voltage in CC regulation, V in.min
/ V in.maxis
the converter minimum/maximum input DC voltage, N
S
/N
P
is the transformer turn ratio, and VF is the voltage drop of D1.
c) Calculate the power dissipation of the SRK1000/A/B, including device consumption and driving:
– P d_CC
= V
CC_avg
I
CC
= 4.1 V 1.725 mA = 7.072 mW where V
CC_avg
is the mean value between V
CC_On
and V
CC_SO_On
.
d) Calculate the maximum external resistance in series to the VAUX pin:
– R ext_MAX
= (V
AUX_min
-V
CC_On
) /I
CC
-R on
= (6.65 V - 4.3 V) / 1.725 mA - 40 Ω = 1.322 kΩ
=> R ext
= 1.2kΩ Rtot = Rext + Ron = 1.2 kΩ +40 Ω = 1.24 kΩ where R on
is the resistance of the internal VAUX switch.
•
• e) Calculate the maximum and minimum current from the VAUX pin:
– I
AUX_min
= (V
AUX_min
- V
CC_On
) / R tot
= (6.65 V - 4.3 V) / 1.24 kΩ = 1.89 mA
I
AUX_max
= (V
AUX_max
- V
CC_On
) / R tot
= (26.65 V - 4.3 V) / 1.24 kΩ = 18.02 mA f) Calculate the maximum power dissipation from VAUX at maximum input voltage (V in.max
):
– P d_AUX
= V
AUX_max
I
CC
= 26.65 V 1.725 mA = 45.971 mW
• g) Calculate the maximum power dissipation on external resistance and inside SRK1000/A/B:
– P d_Rext
= (P d_AUX
- P d_CC
) R ext
/ R tot
= (45.971 mW -7.072 mW) 1.2 kΩ / 1.24 kΩ = 37.64 mW
P d_SRK
= P d_AUX
- P d_Rext
= 45.971 mW - 37.64 mW = 8.33 mW
The
and mains turn-off).
Figure 15. VAUX pin operation page 16/26
6.9
6.10
SRK1000 / SRK1000A /SRK1000B
Operation in CC regulation and short-circuit
Operation in CC regulation and short-circuit
During CC regulation operation in QR applications, the demagnetization time progressively increases while reducing the load impedance and the output voltage consequently reduces. Therefore, the conduction duty cycle of SR MOSFET driving increases: the SRK1000/A/B fix the maximum driving pulse width level to T
ON_MAX and after this time interval has elapsed, it turns off the SR MOSFET. This means that, for the rest of the demagnetization time after T
ON_MAX
, the rectified current continues to flow through the body diode.
If CC regulation is extended down to short-circuit condition, (i.e. the output current is regulated also during short-circuit and the primary controller does not enter hiccup protection), some care must be taken to avoid temperature increase of the SR MOSFET (i.e. a proper thermal design or the usage of an external Schottky diode).
Adaptive gate drive
The IC is provided with a low-noise, high-current gate-drive output, capable of directly driving N-channel Power
MOSFETs.
The high-level voltage provided by the driver is in fact clamped at V
GDclamp
(11.6 V typ.) through an accurate circuitry; this avoids excessive voltage levels on the gate in case the device is supplied with a high V
CC
, thus minimizing the gate charge provided in each switching cycle.
Furthermore, the gate driver has a pull-down capability that ensures the SR MOSFET cannotbe spuriously turned on even at low V
CC
: in fact, the driver has a 1 V (typ.) saturation level at V
CC
below the turn-on threshold.
In order to optimize efficiency at low load levels (where driving losses may be relevant with respect to conduction losses), the high-level of driver output is adapted, decreasing with decreasing demagnetization time. The adaptive gate drive changes the driving high-level V
HIGH
n 16 steps of 400 mV, corresponding to 16 steps of detected demagnetization time T
D
of the transformer, as described by the following relationships:
TD = 300 ns + T ON_min n + 6 /6 (4)
•
• where V
GD_ad_step
is the voltage step and n (= 1 to 16) is the step number.
The voltage step increase/decrease is done after the demagnetization time interval T
D
has been detected increasing/decreasing by one step for 32 cycles consecutively.
The driver voltage level V
HIGH
is of course limited by the supply voltage on the VCC pin and, in any case, when
V
CC
voltage supply is detected lower than a threshold, the driver high- level modulation is disabled. A comparator with hysteresis enables adaptive drive when V
CC
supply increases above V
CC_AGD_en
and disables it as V
CC goes below V
CC_AGD_dis
.
This means that, if the V
CC supply is low (but higher than V
CC_AGD_dis
), the driver high-level V
HIGH
is the minimum between the value of above formula and a value equal to:
-V
CC
supply → if VAUX function is used (and VAUX pin voltage is larger than V
CC
- 1.2 V).
or to V
CC
-1.2 V → if VAUX function is not used; in which case the VAUX pin has to be connected to the V
CC pin.
The adaptive gate drive is disabled also when the circuit enters burst-mode operation: at resuming operation from burst mode, the gate drive always starts from the highest voltage level; then it continues progressively adapting it according to the sensed demagnetization period.
In the case of sleep mode, the behavior is different: when the load (after entering sleep mode) increases and the
SRK1000/A/B resume switching operation, the gate drive starts from lower level and then it progressively adapts with step V
GD_ad_step
according to the sensed demagnetization period.
It is worth noting that, generally speaking, an SR MOSFET is always switched on after current starts flowing through its body diode, when the drain-source voltage is already low (equal to V
F
); therefore, there is no Miller effect nor switching losses at MOSFET turn-on. This is true also at turn-off, since rectifier current, after SR
MOSFET is switched off, continues flowing into the body diode. Consequently, the required gate charge the driver must provide each cycle for ON-OFF switching is rather lower than in the case of hard switching and can be easily found/estimated from the MOSFET datasheet in order to calculate the driver power dissipation.
DS12787 - Rev 5 page 17/26
7
SRK1000 / SRK1000A /SRK1000B
Layout guidelines
Layout guidelines
The GND pin is the return of the bias current of the device and return for gate drive current: it should be routed in the shortest way possible to the common point where the source terminal of the SR MOSFET and output capacitor negative terminal are connected. When laying out the PCB, care must be taken to keep the source terminal of the SR MOSFET as close to output capacitor negative terminal as possible.
DVS connection to SR MOSFET drain terminal is not critical (since adaptive turn-off algorithm automatically compensates for stray inductances in the SR MOSFET current path); nevertheless, it should be preferred to sense the MOSFET voltage as close to its drain terminal as possible.
The usage of bypass capacitors between the VCC pin and GND pin is recommended. They should be low-ESR, low-ESL type and located as close to the IC pins as possible.
Sometimes, a series resistor (in the tens ohm) between the converter's output voltage and the VCC pin, forming an RC filter along with the bypass capacitor, is useful to obtain a cleaner V
CC
voltage.
Since theTON pin sourced current is relatively low, this pin may be affected by current injections coming from close tracks with high dV/dt (i.e. drain sense signals); therefore, the TON pin should be kept away from SR
MOSFET drain tracks, with a proper layout.
In case of large noise, a capacitor can be used on TON pin for filtering; since it is also used for internal timer setting according to user selected operation (quasi-resonant or fixed frequency), the allowed capacitance C
ON
is as follows: max 22pF min 100pF and time constant R
ON
C
ON
< 100 μs
➡
➡ for quasi-resonant operation for fixed frequency operation
DS12787 - Rev 5 page 18/26
8
8.1
SRK1000 / SRK1000A /SRK1000B
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
SOT23-6L package information
Table 5. SOT23-6L mechanical data
Symbol
Min
Milimeters
Typ Max
A
A1
A2 b c
D
E e
H
L
θ (degrees)
0.90
0.00
0.90
0.30
0.14
0.30
0°
2.90
1.60
0.95
2.8
1.45
0.15
1.30
0.50
0.20
0.60
8°
1. Values in inches are converted from mm and rounded to 4 decimal digits.
Min
0.035
0.000
0.035
0.012
0.006
0.012
0°
Typ
0.114
0.063
0.037
0.110
Max
0.057
0.006
0.051
0.020
0.009
0.022
8°
DS12787 - Rev 5 page 19/26
SRK1000 / SRK1000A /SRK1000B
SOT23-6L package information
Figure 16. SOT23-6L package outline top and side view
DS12787 - Rev 5 page 20/26
27
SRK1000 / SRK1000A /SRK1000B
SOT23-6L package information
Figure 17. SOT23-6L package outline bottom view
DS12787 - Rev 5 page 21/26
27
SRK1000 / SRK1000A /SRK1000B
Revision history
Date
16-Oct-2018
11-Jan-2019
23-Jul-2019
04-May-2020
19-Nov-2021
3
4
5
Table 6. Document revision history
Version
1
2
Changes
Initial release.
Updated
.
Change made to Electrical characteristics table and text added to
SRK1000 changed to SRK1000/A/B throughout document.
Table Electrical characteristics updated
DS12787 - Rev 5 page 22/26
SRK1000 / SRK1000A /SRK1000B
Contents
Contents
DS12787 - Rev 5 page 23/26
SRK1000 / SRK1000A /SRK1000B
List of tables
List of tables
DS12787 - Rev 5 page 24/26
SRK1000 / SRK1000A /SRK1000B
List of figures
List of figures
DS12787 - Rev 5 page 25/26
SRK1000 / SRK1000A /SRK1000B
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS12787 - Rev 5 page 26/26
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