STMicroelectronics STGIK50CH65T Datasheet

STGIK50CH65T
Datasheet
SLLIMM high power IPM, 3-phase inverter, 50 A, 650 V short-circuit rugged IGBT
Features
1
22
30
23
30
23
1
22
SDIPHP-30L
•
•
•
•
•
•
•
•
•
•
•
•
•
IPM 650 V, 50 A 3-phase inverter bridge including control ICs for gates driving
3.3 V, 5 V TTL/CMOS inputs with hysteresis
Under-voltage lockout of gate drivers
Built-in bootstrap diodes
Short-circuit protection
Shutdown input/fault output
Separate open emitter outputs
Comparator for fault protection
Short-circuit rugged
Very fast, soft recovery diodes
Fully isolated package
Isolation rating of 2500 Vrms/min
100 kΩ NTC for temperature monitoring
Applications
•
•
•
HVAC
GPI
Servo motor
Description
This new IPM (intelligent power module) is part of the high power SLLIMM (small
low-loss intelligent molded module) family and provides a compact, high-performance
AC motor drive in a simple, rugged design. It combines driver control with improved
short-circuit rugged 650 V trench gate field-stop IGBTs, resulting ideal for 3-phase
inverters motor drives.
Product status link
STGIK50CH65T
Product summary
Order code
STGIK50CH65T
Marking
GIK50CH65T
Package
SDIPHP-30L
Packing
Tube
DS13811 - Rev 1 - September 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
STGIK50CH65T
Internal schematic and pin description
1
Internal schematic and pin description
Figure 1. Internal schematic diagram and pin configuration
OUTu (1)
VBOOTu (2)
VCCHu (3)
Boot-Di
High-side IC
HINu (4)
(30) NC
(29) P
OUTv (5)
VBOOTv (6)
Boot-Di
VCCHv (7)
High-side IC
HINv (8)
OUTw (9)
VBOOTw (10)
(28) U
(27) V
(26) W
Boot-Di
VCCHw (11)
HINw (12)
High-side IC
DBC substrate
NC (13)
NTC
T (14)
LINu (15)
LINv (16)
LINw (17)
FO
CFO
CIN
GND
VCCL
(18)
(19)
(20)
(21)
(22)
(25) NU
Low-side IC
(24) NV
(23) NW
GADG170920211009GT
DS13811 - Rev 1
page 2/21
STGIK50CH65T
Internal schematic and pin description
Table 1. Pin description
Pin
Note:
DS13811 - Rev 1
Symbol
Description
1
OUTu
2
VBOOTu
High-side reference output for U phase
3
VCCHu
4
HINu
High-side logic input for U phase
5
OUTv
High-side reference output for V phase
6
VBOOTv
7
VCCHv
8
HINv
High-side logic input for V phase
9
OUTw
High-side voltage power supply for
10
VBOOTw
11
VCCHw
12
HINw
13
NC
Not connected (cut pin)
14
T
NTC thermistor output
15
LINu
Low-side logic input for U phase
16
LINv
Low-side logic input for V phase
17
LINw
Low-side logic input for W phase
18
FO
19
CFO
Capacitor for fault output setting
20
CIN
Comparator input
21
GND
Ground
22
VCCL
Low-side voltage power supply
23
NW
Negative DC input for W phase
24
NV
Negative DC input for V phase
25
NU
Negative DC input for U phase
26
W
W phase output
27
V
V phase output
28
U
U phase output
29
P
Positive DC input
30
NC
Bootstrap voltage for U phase
High-side voltage power supply for U phase
Bootstrap voltage for V phase
High-side voltage power supply for V phase
Bootstrap voltage for W phase
High-side voltage power supply for W phase
High-side logic input for W phase
Shutdown/fault output
Not connected
It is required the external connection between the following couple of pins:
•
OUTu (1) and U (28)
•
OUTv (5) and V (27)
•
OUTw (9) and W (26).
page 3/21
STGIK50CH65T
Absolute maximum ratings
2
Absolute maximum ratings
TJ = 25 °C unless otherwise noted.
Table 2. Inverter parts
Symbol
Value
Unit
Supply voltage between P -NU, -NV, -NW
500
V
Supply voltage (surge) between P -NU, -NV, -NW
550
V
Collector-emitter voltage each IGBT
650
V
IC
Continuous collector current each IGBT
50
A
ICP
Peak collector current each IGBT (less than 1 ms)
100
A
Total power dissipation at TC = 25 °C each IGBT
150
W
Self-protection supply voltage limit, VCC = 13.5 – 16.5 V, TJ = 150 °C,
non-repetitive, less than 2µs
400
V
VPN
VPN(surge)
VCES
PTOT
VPN(SP)
Parameter
Table 3. Control parts
Symbol
Min.
Max.
Unit
Supply voltage applied between VCCHx-GND, VCCL-GND
- 0.5
25
V
VBOOT
Bootstrap voltage
- 0.5
25
V
VOUT
Output voltage applied between OUTx and GND
- 0.5
650
V
VCIN
Comparator input voltage
- 0.5
VCCL+0.3
V
VINH
Logic input voltage applied between HINx and GND
- 0.5
VCCHx+0.3
V
VINL
Logic input voltage applied between LINx and GND
- 0.5
VCCL+0.3
V
VFO
Fault output voltage
- 0.5
VCCL+0.3
V
IFO
Fault output sink current
1
mA
-1
1
V/μs
Min.
Max.
Unit
-
650
V
VCC
ΔVCC/Δt
Parameter
Change rate of VCC supply voltage time
Table 4. Bootstrap diode
Symbol
VR-BS
Parameter
Bootstrap diode reverse voltage
Table 5. Total system
Symbol
VISO
TJ
TC
DS13811 - Rev 1
Parameter
Isolation withstand voltage applied between each pin and heat sink plate
(AC voltage, t = 60 s)
Value
Unit
2500
Vrms
IGBT and FRD operating junction temperature range
-40 to 175
Driver IC and bootstrap diode operating junction temperature range
-40 to 150
Module case operating temperature range
-40 to 125
°C
°C
page 4/21
STGIK50CH65T
Absolute maximum ratings
Table 6. Thermal data
Symbol
RthJC
DS13811 - Rev 1
Parameter
Value
Thermal resistance, junction-to-case single IGBT
1
Thermal resistance, junction-to-case single diode
2
Unit
°C/W
page 5/21
STGIK50CH65T
Electrical characteristics
3
Electrical characteristics
TJ = 25 °C unless otherwise specified.
3.1
Inverter parts
Table 7. Inverter parts
Symbol
ICES
Parameter
Collector cut-off current
Test conditions
VCE = 650 V, VCC = Vboot = 15 V
VCC = Vboot = 15 V, VIN(1) = 5 V,
VCE(sat)
Collector-emitter saturation
voltage
IC = 50 A
VCC = Vboot = 15 V, VIN(1) = 5 V,
IC = 50 A, TJ = 175 °C
VF
Diode forward voltage
VIN(1) = 0 V, IC = 50 A
(1)
VIN
= 0 V, IC = 50 A, TJ = 175 °C
Min.
Typ.
-
25
-
1.8
Max.
Unit
µA
2.3
V
-
2.2
-
2.0
-
2.25
2.5
V
1. Applied between HINx, LINx and GND for x = U, V, W.
DS13811 - Rev 1
page 6/21
STGIK50CH65T
Inverter parts
Table 8. Inductive load switching time and energy
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Turn-on time
-
860
-
ns
Crossover time on
-
386
-
ns
Turn-off time
-
1464
-
ns
-
137
-
ns
-
370
-
ns
High-side
(1)
ton
(1)
tc(on)
toff(1)
(1)
tc(off)
Crossover time off
VDD = 300 V, VCC = Vboot = 15 V,
VIN
(2)
= 0 to 5 V, IC = 50 A
trr(1)
Reverse recovery time
Eon
Turn-on switching energy
-
2.70
-
mJ
Eoff
Turn-off switching energy
-
1.12
-
mJ
Err
Reverse recovery energy
-
0.244
-
mJ
Turn-on time
-
605
-
ns
Crossover time on
-
266
-
ns
Turn-off time
-
962
-
ns
Low-side
(1)
ton
tc(on)(1)
toff(1)
Crossover time off
VDD = 300 V, VCC = Vboot = 15 V,
-
110
-
ns
trr(1)
Reverse recovery time
VIN(2) = 0 to 5 V, IC = 50 A
-
405
-
ns
Eon
Turn-on switching energy
-
2.16
-
mJ
Eoff
Turn-off switching energy
-
0.85
-
mJ
Err
Reverse recovery energy
-
0.192
-
mJ
tc(off)(1)
1. ton and toff include the propagation delay time of the internal drive. tc(on) and tc(off) are the switching times of the IGBT itself
under the internally given gate driving conditions.
2. Applied between HINx, LINx and GND for x = U, V, W.
DS13811 - Rev 1
page 7/21
STGIK50CH65T
Inverter parts
Figure 2. Switching time test circuit
IC
OUT
VBOOT
H-side
VBOOT
VCCH
VCC
HIN
GND
L
VBus
VCCL
5V
Input
VFO
LIN
RFF
L-side
0V
CBus
FO
CIN
Vce
GND
GADG200920211533GT
Figure 3. Switching time definition
100% IC
100% IC
t rr
IC
VCE
VIN
VIN
t ON
VIN(ON)
VCE
IC
t C(ON)
10% IC
90% IC 10% VCE
(a) turn-on
t OFF
VIN(OFF)
t C(OFF)
10% VCE
10% IC
(b) turn-off
AM09223V1
DS13811 - Rev 1
page 8/21
STGIK50CH65T
Control/protection parts
3.2
Control/protection parts
Unless specifically noted, TC = -40 °C to 125 °C, VPN = 300 V, VVCCxH = VVCCL = 15 V, RFF = 10 kΩ, CFF = 0 μF,
and VFO = 5 V. The shipping test is performed at TA = 25 °C and 125 °C for the electrical characteristics shown
below (except for the parameters specified by design and not tested in production).
Table 9. Control/protection parts
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VVCCHx_H
VCCHx pin operating voltage
9.2
10.2
11.3
V
VVCCHx_L
VCCHx pin operating stop voltage
8.7
9.7
10.8
V
VVCCHx_HYS
VCCHx pin hysteresis
0.5
V
VVCCL_H
VCCL pin operating voltage
11.2
12.6
13.3
V
VVCCL_L
VCCL pin operating stop voltage
10.7
12.1
12.8
V
VVCCL_HYS
VCCL pin hysteresis
0.5
V
VVBOOTx-OUTx_H
VBOOTx-OUTx operating voltage
11.0
12.1
12.8
V
VVBOOTx-OUTx_L
VBOOTx-OUTx operating stop voltage
10.5
11.6
12.3
V
VVBOOTx-OUTx _HYS
VBOOTx-OUTx hysteresis
IVCCHx
VCCHx pin input current
IVCCL
VCCL pin input current
0.5
V
VHINx = 0 V, each pin
1.1
2.0
mA
VHINx = 5 V, each pin
1.1
2.0
mA
VLINx = 0 V
1.9
3.2
mA
VLINx = 5 V
1.9
3.2
mA
0.09
0.30
mA
0.11
0.30
mA
2.0
2.5
V
VVBOOTx-OUTx = 15 V,
VINxH = 0 V,
IVBOOTx-OUTx
in 1-phase operation
VBOOTx-OUTx input current
VVBOOTx-OUTx = 15 V,
VINxH = 5 V,
in 1-phase operation
Input signal
VHINx_H
HINx pin high-level input threshold
voltage
VHINx_L
HINx pin low-level input threshold
voltage
1.5
V
HINx pin hysteresis
0.5
V
VLINx_H
LINx high-level input threshold voltage
2.0
VLINx_L
LINx pin low-level input threshold
voltage
VHINx_HYS
VLINx_HYS
DS13811 - Rev 1
1.0
1.0
LINx pin hysteresis
2.5
V
1.5
V
0.5
V
IHINx
HINx pin input Current
VHINx = 5 V, each pin
0.25
0.50
mA
ILINx
LINx pin input Current
VLINx = 5 V, each pin
0.25
0.50
mA
tHINx_MIN(ON)(1)
HINx pin minimum response pulse
width (On)
0.34
0.50
μs
tHINx_MIN(OFF)(2)
HINx pin minimum response pulse
width (Off)
0.36
0.50
μs
page 9/21
STGIK50CH65T
Control/protection parts
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tLINx_MIN(ON)(2)
LINx pin minimum response pulse
width (On)
-
0.26
0.50
μs
tLINx_MIN(OFF)(2)
LINx pin minimum response pulse
width (Off)
-
0.27
0.50
μs
2.0
2.5
V
Fault signal output and shutdown signal input
VFO_H
FO pin shutdown release voltage
VFO_L
FO pin shutdown threshold voltage
VFO_HYS
1.0
FO pin shutdown hysteresis
1.5
V
0.5
V
V
VFO_H
FO pin output voltage in normal
operation
VFO = 5 V, RFF = 10 kΩ,
VCIN = 0 V
4.8
5.0
VFO_L
VFO pin error signal output voltage
VFO = 5 V, RFF = 10 kΩ,
VCIN = 1 V
-
0.05
0.50
V
CCFO = 0 μF
0.012
0.030
0.060
ms
CCFO = 0.001 μF
0.20
0.32
0.44
ms
CCFO = 0.01 μF
2.0
3.2
4.4
ms
CCFO = 0.1 μF
20
32
44
ms
CCFO = 1 μF
200
320
440
ms
tFO(1)(2)
FO pin CIN hold time
Protection
VCIN _H
CIN pin overcurrent detection voltage
0.46
0.50
0.54
V
VCIN _L
CIN pin overcurrent release voltage
0.32
0.38
0.44
V
VCIN _HYS
CIN pin overcurrent hysteresis
0.12
tCIN _DELAY
CIN pin detection delay time
0.3
ICIN
CIN pin input current
VCIN = 0.5 V
V
0.5
μs
2.5
μA
1. Specified By Design – Not tested in production.
2. For a relation between tFO and CCFO, see Figure 5. The shipping test is performed with the condition at CCFO = 0.01 μF
only.
Figure 4. Total bootstrap current vs fsw
IVBOOTx-OUTx
(mA)
2.4
GADG200920211651GT
Figure 5. tFO - CCFO characteristics
tFO
(ms)
GADG200920211703GT
VCC = 15 V
TJ = 125 °C
δ = 50%
10 2
1.8
1.2
10 1
0.6
0.0
0
DS13811 - Rev 1
4
8
12
16
fsw (kHz)
10 0
10 -2
10 -1
CCFO (μF)
page 10/21
STGIK50CH65T
Control/protection parts
Figure 6. CIN test circuit and time definition
LIN
VFO
CIN
U
1V
50%
RFF
0
FO
t
R
VCC
1V
L-side
VFO
VCCL
V
0
t
CIN
0V
NU
GND
tCIN_DELAY
U
NV
NW
15 V
50%
0
t
GADG200920211621GT
DS13811 - Rev 1
page 11/21
STGIK50CH65T
Bootstrap diode
4
Bootstrap diode
Table 10. Bootstrap diode
Symbol
Parameter
VF_BS
Bootstrap diode forward voltage
RS_BS
Bootstrap diode series resistor
Test conditions
IF_BS = 10 mA
Min.
Typ.
Max.
Unit
0.4
0.9
1.4
V
12
20
28
Ω
Figure 7. Bootstrap diode static characteristics
VF
(V)
GADG210920210925GT
TJ = 25 °C
1.5
1.0
TJ = 150 °C
0.5
0.0
0
DS13811 - Rev 1
10
20
30
40
IF (mA)
page 12/21
STGIK50CH65T
NTC thermistor
5
NTC thermistor
Table 11. NTC thermistor
Symbol
Parameter
R25
Min.
TA = 25 °C
Resistance
B25/85
Test condition
B-constant (25−85 °C)
T
Operating temperature range
Figure 8. NTC resistance vs temperature
R
(kΩ)
GADG210920210944GT
Typ.
Max.
Unit
100
kΩ
4395
K
-40
175
°C
Figure 9. NTC resistance vs temperature zoom
R
(kΩ)
GADG210920210939GTzoom
Max.
5000
Max.
Typ.
11
4000
Typ.
3000
8
2000
Min.
5
1000
Min.
0
-50
DS13811 - Rev 1
-25
0
25
50
75
100
T (°C)
2
75
85
95
105
115
T (°C)
page 13/21
DS13811 - Rev 1
CCFO
VCC CVCC C3 DZ1
CFF
RFF
VFO
SGN_GND
SGN_GND
VCCL (22)
GND (21)
CIN (20)
CFO (19)
FO (18)
LINw (17)
C1
R1
C1
LINv (16)
R1
T (14)
NC (13)
LINu (15)
C2
R2
VT_PU
HINw (12)
VCCHw (11)
VBOOTw (10)
OUTw (9)
R1
C1
C1
C4
HINv (8)
VCCHv (7)
VBOOTv (6)
OUTv (5)
H-side
LINw
LINv
LINu
VT
HINw
DZ2 CBOOT
C4
HINu (4)
VCCHu (3)
H-side
R1
C1
DZ2 CBOOT
OUTu (1)
VBOOTu (2)
H-side
R1
C1
C4
NTC
PWR_GND
IGBT6
IGBT5
IGBT4
IGBT3
IGBT2
IGBT1
D6
D5
D4
D3
D2
D1
CCF
RCF
(23) NW
(24) NV
(25) NU
(26) W
(27) V
(28) U
(30) NC
(29) P
PWR_GND
Rshunt
to MCU/op-amp
M
C5
CBus
VBus
6
HINv
HINu
R1
DZ2 CBOOT
Application circuit example
STGIK50CH65T
Application circuit example
Figure 10. Application circuit example
L-side
MICROCONTROLLER
Application designers are free to use a different scheme according to the device specifications.
page 14/21
STGIK50CH65T
Guidelines
6.1
Guidelines
1.
2.
3.
External connections between the pins OUTu‐U, OUTv‐V and OUTw‐w are required.
Input signals HIN, LIN are active‐high logic. A 20 kΩ (typ.) pull‐down resistor is built‐in for each input pin. To
prevent input signal oscillation, the wiring of each input should be as short as possible and the use of RC
filters (R1, C1) on each input signal is suggested. The filters should be done with a time constant of about
100 ns and placed as close as possible to the IPM input pins.
The use of a bypass capacitor CVCC (aluminum or tantalum) can help reduce the transient circuit demand
on the power supply. Also, to reduce high frequency switching noise distributed on the power lines, it is
suggested to place a decoupling capacitor C3 (100 to 220 nF, with low ESR and low ESL), as close as
possible to each VCC pin and in parallel with the bypass capacitor.
4.
The use of RC filter (RCF, CCF) for preventing protection circuit malfunction is suggested. The time constant
(RCF x CCF) should be set to 1 μs and the filter must be placed as close as possible to the CIN pin.
5.
The FO is an input/output pin. It should be pulled up to a power supply (i.e., MCU bias at 3.3 - 5 V) by a
resistor value able to match the VFO_L and VFO_H threshold voltages mainly. In case of 3.3 or 5 V pull up
voltage, the suggested resistor value is from 5.6 kΩ to 68 kΩ.The RC filter on FO could have also impact on
the re-starting time after a fault event so it must be placed as close as possible to the FO pin.
A decoupling capacitor C2 between 1 nF and 10 nF can be used to increase the noise immunity of the signal
on the NTC thermistor. Its effectiveness is improved if the capacitor is placed close to the MCU.
The decoupling capacitor C4 (100 to 220 nF with low ESR and low ESL) in parallel with each CBOOT is
useful to filter high frequency disturbances. Both CBOOT and C4 (if present) should be placed as close as
possible to each U, V, W and respective VBOOT pins.
6.
7.
8.
To prevent overvoltage on the VCC pins, a Zener diode (DZ1) can be used. Similarly, on the VBOOT pins, a
Zener diode (DZ2) can be placed in parallel with each CBOOT.
9.
The use of the decoupling capacitor C5 (100 to 220 nF, with low ESR and low ESL) in parallel with the
electrolytic capacitor CBus is useful to prevent surge destruction. Both capacitors C5 and CBus should be
placed as close as possible to the IPM (C5 has priority over CBus).
10. When the application requires a galvanic isolation between low and high voltage, use of high speed (high
CMR) opto-coupler is recommended.
11. Low inductance shunt resistors should be used for phase leg current sensing.
12. In order to avoid malfunction, the wiring between N pins, the shunt resistor and PWR_GND should be as
short as possible.
13. The connection of SGN_GND to PWR_GND at only one point (close to the shunt resistor terminal) can help
to reduce the impact of power ground fluctuation.
14. Parallel connection of switches or legs on the same or multiple IPMs is not suggested.
These guidelines ensure the device specifications for application designs. For further details, please refer to the
relevant application note.
Table 12. Recommended operating conditions
Symbol
VPN
Test conditions
Min.
Typ.
Max.
Unit
300
400
V
Supply voltage
Applied between P-Nu, NV, Nw
VCCHx
Control supply voltage
Applied between VCCHx-GND
13.5
15
16.5
V
VCCL
Control supply voltage
Applied between VCCL-GND
13.5
15
16.5
V
VBS
High-side bias voltage
13
15
18.5
V
tdead
Blanking time to prevent arm-short For each input signal
fPWM
PWM input signal
TC
DS13811 - Rev 1
Parameter
Case operation temperature
Applied between VBOOTi-OUTi
for i = U, V, W
-40 °C < TC < 100 °C
-40 °C < TJ < 125 °C
1.5
µs
20
kHz
125
°C
page 15/21
STGIK50CH65T
Electrical characteristics (curves)
7
Electrical characteristics (curves)
Figure 12. VCE(sat) vs collector current
Figure 11. Output characteristics
IC
(A)
GADG210920211037OC25
VCE(sat)
(V)
GADG210920211038VCEC
TJ = 175 °C
80
2.4
60
TJ = 25°C
1.6
VCC = 15 V
40
0.8
20
0
0.0
0.6
1.2
1.8
VCE (V)
Figure 13. IC vs case temperature
IC
(A)
GADG210920211039CCT
50
0.0
0
VCC = 15 V
20
VF
(V)
80
IC (A)
GADG210920211040DVF
TJ = 175 °C
TJ ≤ 175 °C
40
60
Figure 14. Diode VF vs forward current
2.8
VCC ≥ 15 V,
40
2.1
TJ = 25°C
30
1.4
20
0.7
10
0
0
25
50
75
100
125
150
TC (°C)
Figure 15. Eon switching energy vs collector current
GADG210920211041SLCon
Eon
(mJ) VDD = 300 V, VCC = VBOOT = 15 V
10
8
6
0.0
0
Eon (LS) @ 175 °C
3
80
IF (A)
Eoff (HS) @ 175 °C
Eoff (LS) @ 175 °C
Eon (HS) @ 25 °C
2
Eoff (HS) @ 25 °C
1
2
DS13811 - Rev 1
60
GADG210920211042SLCoff
Eoff
(mJ) VDD = 300 V, VCC = VBOOT = 15 V
4
Eon (HS) @ 175 °C
40
Figure 16. Eoff switching energy vs collector current
4
0
0
20
Eoff (LS) @ 25 °C
Eon (LS) @ 25 °C
20
40
60
80
IC (A)
0
0
20
40
60
80
IC (A)
page 16/21
STGIK50CH65T
Electrical characteristics (curves)
Figure 17. Normalized thermal impedance for IGBT
K
GADG210920211047ZTH_IGBT
Figure 18. Normalized thermal impedance for FRD
K
10 -1
10 -1
10 -2
10 -2
Single pulse
ZthJC = K*RthJC
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0
DS13811 - Rev 1
GADG210920211047ZTH_FRD
Single pulse
ZthJC = K*RthJC
t (s)
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0
t (s)
page 17/21
STGIK50CH65T
Package information
8
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
8.1
SDIPHP-30L package information
Figure 19. SDIPHP-30L package outline and mechanical data (dimensions are in mm)
3.10
(R0.5) (x2)
BOTTOM VIEW
0.10
(0 ~5
)
(1.55)
1.00 +- 0.15
0.05 (x8)
2.35 +- 0.15
0.05 (x8)
D
(x2)
C
C2.65
3.60
QR Code
1.00 +- 0.15
0.05 (x21)
0.1
0.50 +- 0.15
0.05 (x21)
52.50
0.30
5.60
0.20
2.05
0.20
22
HEAT SINK SIDE
0.1
0.15
3.30
1
0.50
2
3.25
0.15
4.25
15.50
0.20
46.00
3.60
0.30
31.00
0.20
23
15.50
0.4
35.4
(13.5)
(2.71)
(17.7)
(12.79)
35.90
0.70
(4.67)
(17.7)
(2)
30
1.75
1.55
12.70
( 3.3)
(6.3)
0.70
( 3.5)
(7.3)
Detail "D"
Section "C-C"
E
F
1.6
( 3.7)
(1.0)
Detail "E"
4.32
4.32
0.50
(x5)
1.78
0.50
(x16)
G
Detail "F"
1.73
(0.6)
(0.5)
(1.0)
2.04
0.30
(3.23)
(3.23)
(2.01)
1.4 MAX
Detail "G"
Max 0.30
Residual of Tie Bar
3.70 (x2)
(9.21)
3.95
0.30
7.62
0.5
(x4) 6.6
0.5
3.3
0.5
(x2)
TOP VIEW
DM00727478_1
DS13811 - Rev 1
page 18/21
STGIK50CH65T
Revision history
Table 13. Document revision history
DS13811 - Rev 1
Date
Revision
23-Sep-2021
1
Changes
First release.
page 19/21
STGIK50CH65T
Contents
Contents
1
Internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
Inverter parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2
Control/protection parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
Bootstrap diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
5
NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
6
Application circuit example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
6.1
Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
8
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
8.1
SDIPHP-30L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
DS13811 - Rev 1
page 20/21
STGIK50CH65T
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS13811 - Rev 1
page 21/21
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