74LCX162541
Low voltage CMOS 16-bit bus buffer (3-state) with 5V tolerant inputs and outputs
Features
■
■
■
■
■
■
■
■
■
■
■
5V tolerant inputs and outputs
High speed:
– t
PD
= 4.4ns (Max) at V
CC
= 3V
Power down protection on inputs and outputs
Symmetrical output impedance:
– |I
OH
| = I
OL
= 12mA (Min) at V
CC
= 3V
PCI bus levels guaranteed at 12mA
Balanced propagation delays:
– t
PLH
≅
t
PHL
26
Ω
serie resistor in outputs
Operating voltage range:
– V
CC
(Opr) = 2.0V to 3.6V
Pin and function compatible with
74 series 162541
Latch-up performance exceeds 500mA
(JESD 17)
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
Description
TSSOP48
The 74LCX162541 is a low voltage CMOS 16 bit bus buffer (non-inverted) fabricated with submicron silicon gate and double-layer metal wiring
C
2
MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs.
This is composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffers section, the 3 state control gate operates as a two input AND such that if either nG1 and nG2 are high, all outputs are in the high impedence state.
This device is designed to be used with 3 state memory address drivers, etc.
The device circuits is including 26
Ω
series resistance in the outputs. These resistors permit to reduce line noise in high speed applications.
All inputs and outputs are equipped with Obsolete Product(s) - Obsolete Product(s) them 2KV ESD immunity and transient excess voltage.
Order codes
Part number
74LCX162541TTR
Package
TSSOP48
Packaging
Tape and reel
February 2007 Rev 3 1/15 www.st.com
15
7
8
5
6
9
1
2
Contents
Contents
3
4
74LCX162541
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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74LCX162541
1
Logic symbols and I/O equivalent circuit
Logic symbols and I/O equivalent circuit
Figure 1.
IEC logic symbols
Figure 2.
Input and output equivalent circuit
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Pin settings
Figure 3.
Pin connection (top through view)
74LCX162541
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74LCX162541 Logic states
Table 1. Pin description
Pin N°
1, 48
2, 3, 5, 6,
8, 9, 11, 12
13, 14, 16, 17,
19, 20, 22, 23
24, 25
36, 35, 33, 32,
30, 29, 27, 26
47, 46, 44, 43,
41, 40, 38, 37
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42
Symbol
1G1, 1G2
1Y1 to 1Y8
2Y1 to 2Y8
2G1, 2G2
2A1 to 2A8
1A1 to 1A8
GND
V
CC
Name and function
Output enable inputs
Data outputs
Data outputs
Output enable inputs
Data outputs
Data outputs
Ground (0V)
Positive supply voltage
Table 2. Truth table
G1
H
X
L
L
Inputs
G2
X
H
L
L
An
X
X
H
L
Output
Yn
Z
Z
H
L
Note: X : Do not care
Z : High impedance Obsolete Product(s) - Obsolete Product(s)
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Maximum rating 74LCX162541
Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the STMicroelectronics sure program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol Parameter
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T stg
T
L
Supply voltage
DC input voltage
DC output voltage (OFF state)
DC output voltage (high or low state)
(1)
DC input diode current
DC output diode current
(2)
DC output current
DC supply current per supply pin
DC ground current per supply pin
Storage temperature
Lead temperature (10 sec)
1.
I
O
absolute maximum rating must be observed
2.
V
O
< GND
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
-50
-50
±
50
±
100
±
100
-65 to +150
300 mA mA mA mA mA
°C
°C
Unit
V
V
V
V
4.1 Recommended operating conditions
Table 4. Recommended operating conditions
Symbol Parameter
V
CC Supply voltage
(1)
Value
2.0 to 3.6
Unit
V
Input voltage 0 to 5.5
V
I
Obsolete Product(s) - Obsolete Product(s)
V
O
0 to 5.5
Output voltage (high or low state) 0 to V
CC
V
V
V
±
12 I
OH
, I
OL
High or low level output current (V
CC
= 3.0 to 3.6V) mA
±
8 I
OH
, I
OL
High or low level output current (V
CC
= 2.7V) mA
T op dt/dv
Operating temperature -40 to 85
Input rise and fall time
(2) 0 to 10
°C ns/V
1.
Truth table guaranteed: 1.5V to 3.6V
2.
V
IN
from 0.8V to 2V at V
CC
= 3.0V
6/15
74LCX162541 Electrical characteristics
Table 5. DC specification
Symbol
V
IH
V
IL
V
OH
V
OL
I
I
I off
I
OZ
I
CC
∆
I
CC
Parameter
V
CC
(V)
Test condition Value
-40 to 85 °C
Min Max
High level input voltage
Low level input voltage
2.7 to 3.6
High level output voltage
Low level output voltage
2.7 to 3.6
2.7
3.0
2.7 to 3.6
2.7
3.0
I
O
= -100
µ
A
I
O
= -8 mA
I
O
= -6 mA
I
O
= -12 mA
I
O
= 100
µ
A
I
O
= 8 mA
I
O
= 6 mA
I
O
= 12 mA
V
I
= 0 to 5.5V
I
Input leakage current 2.7 to 3.6
Power OFF leakage current
High impedance output leakage current
0
2.7 to 3.6
Quiescent supply current
CC
incr. per Input
V
V
V
I
I
or V
= V
O
O
IH
= 5.5V
or V
= 0 to V
IL
CC
2.7 to 3.6
2.7 to 3.6
V
I
= V
CC
or GND
V
I
or V
O
= 3.6 to 5.5V
V
IH
= V
CC
- 0.6V
2.0
V
CC
-0.2
2.0
2.4
2.0
0.55
±
0.8
0.2
0.6
0.8
±
±
5
10
5
20
20
500
Unit
V
V
V
V
µ
A
µ
A
µ
A
µ
A
µ
A
Table 6. Dynamic switching characteristics
Obsolete Product(s) - Obsolete Product(s)
Symbol Parameter
Test condition Value
Unit
V
CC
T
A
= 25 °C
(V)
Min Typ Max
V
OLP
V
OLV
Dynamic low level quiet output
(1)
3.3
V
IL
C
L
= 50pF
= 0V, V
IH
= 3.3V
0.8
-0.8
1.
Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
V
7/15
Electrical characteristics 74LCX162541
Table 7. AC electrical characteristics
Symbol Parameter t
PLH
t
PHL
Propagation delay time
V
CC
(V)
2.7
Test Condition
C
L
(pF)
50
R
L
(
Ω
)
500 t s
= t r
(ns)
2.5
Value
-40 to 85 °C
Min
1.5
Max
5.6
Unit ns
3.0 to 3.6
2.7
1.5
1.5
4.4
6.3
t
PZL
t
PZH
Output enable time
50 500 2.5
ns
3.0 to 3.6
2.7
1.5
1.5
5.9
6.3
t
PLZ
t
PHZ
Output disable time
50 500 2.5
ns
3.0 to 3.6
1.5
5.9
t
OSLH t
OSHL
Output to output skew time
(1) (2)
3.0 to 3.6
50 500 2.5
1.0
ns
1.
Skew is defined as the absolute value of the difference between the actual propagation delay for any two
= | t
PLHm
- t
PLHn
|, t outputs of the same device switching in the same direction, either HIGH or LOW (t
OSLH
OSHL
= | t
PHLm
- t
PHLn
|)
2.
Parameter guaranteed by design
Table 8. Capacitive characteristics
Symbol Parameter
V
CC
(V)
Test Condition Value
T
A
= 25 °C
Min Typ Max
C
IN
C
OUT
C
PD
Input capacitance
Output capacitance
4
10
Power dissipation capacitance
(1)
3.3
f
IN
= 10MHz
V
IN
= 0 or V
CC
50
1.
C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/16 (per circuit)
Unit pF pF pF
Obsolete Product(s) - Obsolete Product(s)
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Test circuit 74LCX162541
Figure 4.
Test circuit
Figure 5.
Test circuit
Test t
PLH
, t
PHL t
PZL
, t
PLZ t
PZH
, t
PHZ
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500
Ω
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
Ω
)
Switch
Open
6V
GND
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Waveforms
7 Waveforms
Figure 6.
Propagation delays (f = 1MHz; 50% duty cycle)
74LCX162541
Figure 7.
Output enable and disable time (f = 1MHz; 50% duty cycle)
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74LCX162541
8 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data
DIM.
E
E1 c
D
A
A1
A2 b e
K
L
74LCX162541
MIN.
0.05
0.17
0.09
12.4
6.0
0°
0.45
TSSOP48 MECHANICAL DATA
mm.
TYP MIN.
MAX.
1.2
0.15
0.002
0.9
0.27
0.20
12.6
0.0067
0.0035
0.488
8.1 BSC
6.2
0.236
0.5 BSC
8°
0.75
0°
0.018
inch
TYP.
0.035
0.318 BSC
0.0197 BSC
MAX.
0.047
0.006
0.011
0.0079
0.496
0.244
8°
0.030
A A2
A1 b e
D c
K
L
E
E1
Obsolete Product(s) - Obsolete Product(s)
PIN 1 IDENTIFICATION
1
7065588D
12/15
74LCX162541 Package mechanical data
DIM.
T
Ao
Bo
Ko
Po
P
A
C
D
N
8.7
13.1
1.5
3.9
11.9
MIN.
12.8
20.2
60
Tape & Reel TSSOP48 MECHANICAL DATA
mm.
TYP MIN.
inch
TYP.
MAX.
330
13.2
0.504
0.795
2.362
30.4
8.9
13.3
1.7
4.1
12.1
0.343
0.516
0.059
0.153
0.468
MAX.
12.992
0.519
1.197
0.350
0.524
0.067
0.161
0.476
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Revision history
Table 9. Revision history
Date Revision
15-Sep-2004 2
06-Feb-2007 3
Changes
Ordering Codes Revision - pag. 1.
Document reformatted, temperature ranges updated
74LCX162541
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74LCX162541
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