STB6N65M2, STD6N65M2
Datasheet
N-channel 650 V, 1.2 Ω typ., 4 A MDmesh™ M2 Power MOSFETs in D²PAK and
DPAK packages
TAB
2
D 2 PAK
1
3
TAB
DPAK
1
2
3
D(2, TAB)
G(1)
S(3)
AM01475V1
Features
Order code V
DS
R
DS(on) max.
STB6N65M2
650 V 1.35 Ω
STD6N65M2
• Extremely low gate charge
• Excellent output capacitance (C
OSS
) profile
• 100% avalanche tested
• Zener-protected
I
D
4 A
Package
D²PAK
DPAK
Applications
• Switching applications
Description
These devices are N-channel Power MOSFETs developed using the MDmesh™ M2 technology. Thanks to their strip layout and improved vertical structure, these devices exhibit low on-resistance and optimized switching characteristics, rendering them suitable for the most demanding high-efficiency converters.
Product status
STB6N65M2
STD6N65M2
Product summary
Order code STB6N65M2
Marking
Package
6N65M2
D²PAK
Packing
Order code
Marking
Package
Packing
Tape and reel
STD6N65M2
6N65M2
DPAK
Tape and reel
DS10516 - Rev 2 - December 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STB6N65M2, STD6N65M2
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
Parameter
Gate-source voltage
I
D
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
I
DM
(1)
P
TOT
dv/dt (2)
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
dv/dt (3)
T j
T stg
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Operating junction temperature range
Storage temperature range
1. Pulse width limited by T jmax
.
2. I
SD
≤ 4 A, di/dt ≤ 400 A/μs; V
DS peak
< V
(BR)DSS
, V
DD
= 400 V.
3. V
DS
≤ 520 V.
Value
±25
4
2.5
16
60
15
50
-55 to 150
Table 2. Thermal data
Symbol Parameter
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on 1 inch² FR-4, 2 Oz copper board.
D²PAK
Value
2.08
30
DPAK
50
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by T j
max)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
0.5
100
Unit
°C/W
°C/W
Unit
V
A
A
A
W
V/ns
V/ns
°C
Unit
A mJ
DS10516 - Rev 2 page 2/22
2
STB6N65M2, STD6N65M2
Electrical characteristics
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
Table 4. On/off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
I
D
= 1 mA, V
Test conditions
GS
= 0 V
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
DS
= 650 V, V
GS
= 0 V
V
DS
= 650 V, V
GS
= 0 V, T
C
= 125 °C
(1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 2 A
Min.
Typ.
Max.
Unit
650 V
2 3
1.2
1
100
±10
4
1.35
µA
µA
µA
V
Ω
Table 5. Dynamic
Symbol
C iss
C oss
C rss
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
= 0 V
Min.
-
Typ.
226
12.8
0.65
Max.
-
Unit pF
C oss eq.
(1)
Rg
Q g
Q gs
Q gd
Equivalent output capacitance
Gate input resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
GS
= 0 V,
V
DS
= 0 to 520 V f = 1 MHz, I
D
=0 A
V
V
DD
GS
= 520 V, I
D
= 4 A,
= 0 to 10 V(see
Figure 13. Test circuit for gate charge behavior
)
-
-
-
114
6.5
9.8
1.7
4
-
-
pF
Ω nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss to 80% V
DSS
.
when V
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 325 V, I
D
= 2 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 12. Test circuit for resistive load switching times
and
Figure 17. Switching time waveform )
Min.
Typ.
Max.
Unit
19
7
ns
6.5
20
DS10516 - Rev 2 page 3/22
STB6N65M2, STD6N65M2
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
I
I t rr
Q t rr rr
RRM
Q rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
Test conditions
I
SD
= 4 A, V
GS
= 0 V
I
SD
= 4 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 14. Test circuit for inductive load switching and diode recovery times )
I
SD
= 4 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 14. Test circuit for inductive load switching and diode recovery times
)
Min.
Typ.
Max.
Unit
4
A
16
1.6
V
-
260
1.2
9.2
ns
μC
A
-
400
1.84
ns
μC
9.1
A
DS10516 - Rev 2 page 4/22
STB6N65M2, STD6N65M2
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GIPG100720141541SA
10 1
10
10
0
-1
10 -2
10 -1
Operation
Limited
in
by
max
10 -0 10 1
Tj=150°C
Tc=25°C
Single pulse
10 2 V
DS
(V)
10µs
100µs
1ms
10ms
I D (A)
7
Figure 3. Output characterisics
GIPG100720140942SA
V GS =7, 8, 9, 10V
6V
6
5
5V
4
3
2
1
0
0 5 10 15 20
4V
V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V GS
(V)
12
V
DS
10
8
6
4
2
0
0 2 4
V DD =520V
I D =4A
6 8
GIPG100720141638SA
V
DS
(V)
10
250
200
150
100
50
0
Q g
(nC)
500
450
400
350
300
Figure 2. Thermal impedance
3
2
5
4
1
0
0
Figure 4. Transfer characteristics
GIPG100720141603SA
I D
(A)
7
V DS =18V
6
2 4 6 8 10 V
GS
(V)
Figure 6. Static drain-source on-resistance
GIPG100720141645SA
R DS(on)
( Ω )
V
GS
=10V
1.26
1.22
1.18
1.14
0 1 2 3 4 I D (A)
DS10516 - Rev 2 page 5/22
STB6N65M2, STD6N65M2
Electrical characteristics (curves)
Figure 7. Capacitance variations
GIPG100720141652SA
C
(pF)
1000
Ciss
100
Coss
10
1
0.1
0.1
1 10
Crss
100 V DS (V)
Figure 9. Normalized on-resistance vs temperature
GIPG110720140859SA
R
DS(on)
(norm)
2.2
V GS =10V
1.8
1.4
1
0.6
0.2
-75 -25 25 75 125 T J (°C)
Figure 8. Normalized gate threshold voltage vs temperature
V GS(th)
(norm)
GIPG100720141751SA
I
D
=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T
J
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
GIPG110720140905SA
V (BR)DSS
(norm)
I
D
=1mA
1.08
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T
J
(°C)
Figure 11. Source-drain diode forward characteristics
GIPG110720140910SA
V
SD
(V)
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.5
1
T
J
=150°C
1.5
2 2.5
T J =-50°C
T J =25°C
3 3.5
I
SD
(A)
DS10516 - Rev 2 page 6/22
STB6N65M2, STD6N65M2
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V D
I
DM
I D
V DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS10516 - Rev 2 page 7/22
4
STB6N65M2, STD6N65M2
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS10516 - Rev 2 page 8/22
4.1
STB6N65M2, STD6N65M2
D²PAK (TO-263) type A package information
D²PAK (TO-263) type A package information
Figure 18. D²PAK (TO-263) type A package outline
DS10516 - Rev 2
0079457_25 page 9/22
DS10516 - Rev 2
Dim.
e1
H
J1
L
L1
L2
R
V2
D
D1
D2
E
E1
E2 e
A
A1 b b2 c c2
STB6N65M2, STD6N65M2
D²PAK (TO-263) type A package information
Table 8. D²PAK (TO-263) type A package mechanical data mm
Typ.
1.14
0.45
1.23
8.95
7.50
Min.
4.40
0.03
0.70
1.10
10.00
8.30
6.85
7.75
1.30
8.50
7.05
2.54
4.88
15.00
2.49
2.29
1.27
1.30
0.40
0°
5.28
15.85
2.69
2.79
1.40
1.75
8°
1.70
0.60
1.36
9.35
8.00
Max.
4.60
0.23
0.93
1.50
10.40
8.70
7.25
page 10/22
4.2
STB6N65M2, STD6N65M2
DPAK (TO-252) type A package information
DPAK (TO-252) type A package information
Figure 19. DPAK (TO-252) type A package outline
DS10516 - Rev 2
0068772_A_26 page 11/22
DS10516 - Rev 2
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
(L1)
STB6N65M2, STD6N65M2
DPAK (TO-252) type A package information
Table 9. DPAK (TO-252) type A mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
4.60
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
4.70
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
4.80
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 12/22
4.3
STB6N65M2, STD6N65M2
DPAK (TO-252) type C package information
DPAK (TO-252) type C package information
Figure 20. DPAK (TO-252) type C package outline
DS10516 - Rev 2
0068772_C_26 page 13/22
DS10516 - Rev 2
Dim.
L
L1
L2
L3
L4
L6
θ1
θ2
V2 c2
D
D1
E
E1 e
H
A
A1
A2 b b4 c
STB6N65M2, STD6N65M2
DPAK (TO-252) type C package information
Table 10. DPAK (TO-252) type C mechanical data
0.72
5.13
0.47
0.47
6.00
Min.
2.20
0.90
0.00
5.25
6.50
4.70
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
6.70
2.386
10.40
1.70
1.25
0.85
5.46
0.60
0.60
6.20
Max.
2.38
1.10
0.10
1.00
9°
9°
8° page 14/22
4.4
STB6N65M2, STD6N65M2
DPAK (TO-252) type E package information
DPAK (TO-252) type E package information
Figure 21. DPAK (TO-252) type E package outline
DS10516 - Rev 2
0068772_type-E_rev.26
page 15/22
DS10516 - Rev 2
STB6N65M2, STD6N65M2
DPAK (TO-252) type E package information
Dim.
D
D1
E
E1 e e1
H
L
L1
L2
L4
A
A2 b b4 c c2
Table 11. DPAK (TO-252) type E mechanical data
Min.
2.18
mm
Typ.
5.97
5.21
6.35
4.32
0.65
4.95
0.46
0.46
2.286
4.572
9.94
1.50
0.89
2.74
Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)
10.34
1.78
1.27
1.02
Max.
2.39
0.13
0.884
5.46
0.61
0.60
6.22
6.73
FP_0068772_26 page 16/22
4.5
D²PAK and DPAK packing information
Figure 23. Tape outline
STB6N65M2, STD6N65M2
D²PAK and DPAK packing information
DS10516 - Rev 2 page 17/22
DS10516 - Rev 2
A
STB6N65M2, STD6N65M2
D²PAK and DPAK packing information
D
B
Full radius
Figure 24. Reel outline
T
40mm min. access hole at slot location
Tape slot in core for tape start
2.5mm min.width
C
N
G measured at hub
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
D
D1
Min.
1.65
11.4
4.8
3.9
11.9
1.9
50
0.25
23.7
10.5
15.7
1.5
1.59
Tape
Table 12. D²PAK tape and reel mechanical data
Reel mm
Dim.
Max.
10.7
15.9
1.6
1.61
1.85
11.6
5.0
4.1
12.1
2.1
C
D
A
B
G
N
T
Base quantity
Bulk quantity
Min.
1.5
12.8
20.2
24.4
100
0.35
24.3
mm
AM06038v1
Max.
330
13.2
26.4
30.4
1000
1000 page 18/22
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
STB6N65M2, STD6N65M2
D²PAK and DPAK packing information
Tape
Table 13. DPAK tape and reel mechanical data
Reel mm
Min.
6.8
10.4
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
1.85
7.6
2.75
4.1
8.1
2.1
Max.
7
10.6
12.1
1.6
0.35
16.3
Dim.
N
T
D
G
A
B
C
Base qty.
Bulk qty.
Min.
1.5
12.8
20.2
16.4
50 mm
Max.
330
13.2
18.4
22.4
2500
2500
DS10516 - Rev 2 page 19/22
STB6N65M2, STD6N65M2
Revision history
Date
04-Aug-2014
05-Dec-2018
Version
1
2
Table 14. Document revision history
Changes
First release.
Removed maturity status indication from cover page. The document status is production data.
Updated
Section 4 Package information .
Minor text changes.
DS10516 - Rev 2 page 20/22
STB6N65M2, STD6N65M2
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3
DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4
DPAK (TO-252) type E package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.5
D²PAK and DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
DS10516 - Rev 2 page 21/22
STB6N65M2, STD6N65M2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS10516 - Rev 2 page 22/22
