STMicroelectronics STD25NF10T4 Datasheet
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STD25NF10T4
Datasheet
N-channel 100 V, 33 mΩ typ., 25 A, STripFET™ II Power MOSFET in a DPAK package
G(1)
TAB
DPAK
1
2 3
D(2, TAB)
S(3)
Features
Type
STD25NF10T4
V
DS
100 V
• Exceptional dv/dt capability
• 100% avalanche tested
• Low gate charge
Applications
• Switching applications
R
DS(on) max.
38 mΩ
I
D
25 A
AM01475v1_noZen
Description
This Power MOSFET series has been developed using STMicroelectronics' unique
STripFET™ process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements.
Product status link
STD25NF10T4
Product summary
Order code STD25NF10T4
Marking
Package
Packing
D25NF10
DPAK
Tape and reel
DS2063 - Rev 5 - August 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD25NF10T4
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
DGR
V
GS
Drain-source voltage
Gate-source voltage (R
GS
= 20 kΩ)
Gate-source voltage
Parameter
I
D
I
DM
P
TOT
E
AS
T stg
T j
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Single-pulse avalanche energy
Peak diode recovery voltage slope
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. Starting T
J
= 25 °C, I
D
= 12.5 A, V
DD
= 50 V
3. I
SD
≤ 25 A, di/dt ≤ 300 A/μs, V
DS
≤ V
(BR)DSS
, T
J
≤ T
JMAX
Table 2. Thermal data
Symbol Parameter
R thj-case
R thj-pcb
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on an FR-4 board of 1 inch², 2 oz Cu.
21
100
100
480
13
Value
100
100
±20
25
-55 to 175
A
A
W mJ
V/ns
Unit
V
V
V
A
°C
Value
1.5
50
Unit
°C/W
°C/W
DS2063 - Rev 5 page 2/18
2
STD25NF10T4
Electrical characteristics
Electrical characteristics
T
CASE
= 25 °C unless otherwise specified
Table 3. On/off states
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 250 μA
V
GS
= 0 V, V
DS
= 100 V
Zero gate voltage drain current
Gate body leakage current
V
GS
= 0 V, V
DS
= 100 V,
T
C
= 125 °C
V
DS
= 0 V, V
GS
= ±20 V
Gate threshold voltage V
DD
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 12.5 A
1. Defined by design, not subject to production test.
Min.
100
Typ.
Max.
1
Unit
V
µA
2 3
33
10
±100
4
38
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 4. Dynamic
V
V
DS
GS
Test conditions
= 25 V, f = 1 MHz,
= 0 V
V
DD
= 80 V, I
D
= 25 A,
V
GS
= 0 to 10 V
(see
Figure 12. Test circuit for gate charge behavior
)
-
-
-
Min.
-
-
-
Typ.
1550
220
95
55
12
20
-
-
-
Max.
-
-
-
Unit pF pF pF nC nC nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 50 V, I
D
= 12.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 11. Test circuit for resistive load switching times and
Figure 16. Switching time waveform
)
Min.
-
-
-
-
Typ.
17
60
60
15
Max.
-
-
-
-
Unit ns ns ns ns
Symbol
I
SD
I
SDM
V
SD
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Table 6. Source-drain diode
Test conditions
I
SD
= 25 A, V
GS
= 0 V
Min.
-
-
-
Typ.
Max.
25
100
1.5
Unit
A
A
V
DS2063 - Rev 5 page 3/18
STD25NF10T4
Electrical characteristics
Symbol t rr
Q rr
I
RRM
Parameter
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Test conditions
I
SD
= 25 A, di/dt = 100 A/µs,
V
DD
= 50 V, T
J
= 150 °C
(see
Figure 16. Switching time waveform
)
Min.
-
-
-
Typ.
88
317
7.2
Max.
Unit ns nC
A
DS2063 - Rev 5 page 4/18
STD25NF10T4
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characteristics Figure 4. Transfer characteristics
DS2063 - Rev 5 page 5/18
Figure 5. Gate charge vs gate-source voltage
V
DS
I
D
= 80 V
= 25 A
Figure 7. Source-drain diode forward characteristics
STD25NF10T4
Electrical characteristics (curves)
Figure 6. Static drain-source on-resistance
35
34
33
32
31
Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage vs temperature
Figure 10. Normalized on-resistance vs temperature
-100
DS2063 - Rev 5
-100 page 6/18
STD25NF10T4
Test circuits
3
Test circuits
Figure 11. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 13. Test circuit for inductive load switching and diode recovery times
Figure 12. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 14. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
AM01470v1
Figure 15. Unclamped inductive waveform
V (BR)DSS
V D
I
DM
I D
V DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 16. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS2063 - Rev 5 page 7/18
4
STD25NF10T4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS2063 - Rev 5 page 8/18
4.1
STD25NF10T4
DPAK (TO-252) type A package information
DPAK (TO-252) type A package information
Figure 17. DPAK (TO-252) type A package outline
DS2063 - Rev 5
0068772_A_25 page 9/18
DS2063 - Rev 5
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
(L1)
STD25NF10T4
DPAK (TO-252) type A package information
Table 7. DPAK (TO-252) type A mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
4.60
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
4.70
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
4.80
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 10/18
4.2
STD25NF10T4
DPAK (TO-252) type C2 package information
DPAK (TO-252) type C2 package information
Figure 18. DPAK (TO-252) type C2 package outline
DS2063 - Rev 5
0068772_C2_25 page 11/18
DS2063 - Rev 5
Dim.
L
L1
L2
L3
L4
L6
θ1
θ2
V2 c2
D
D1
E
E1 e
H
A
A1
A2 b b4 c
STD25NF10T4
DPAK (TO-252) type C2 package information
Table 8. DPAK (TO-252) type C2 mechanical data
0.72
5.13
0.47
0.47
6.00
Min.
2.20
0.90
0.00
5.10
6.50
5.20
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
1.00
9°
9°
8°
0.85
5.46
0.60
0.60
6.20
Max.
2.38
1.10
0.10
5.60
6.70
5.50
2.386
10.40
1.70
1.25
page 12/18
DS2063 - Rev 5
STD25NF10T4
DPAK (TO-252) type C2 package information
Figure 19. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25 page 13/18
4.3
DPAK (TO-252) packing information
Figure 20. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD25NF10T4
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS2063 - Rev 5 page 14/18
DS2063 - Rev 5
Dim.
D1
E
F
K0
P0
A0
B0
B1
D
P1
P2
R
T
W
A
D
B
Figure 21. DPAK (TO-252) reel outline
STD25NF10T4
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
AM06038v1
2.55
3.9
7.9
1.9
40
0.25
15.7
1.5
1.5
1.65
7.4
Table 9. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
C
D
A
B
G
N
T
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 15/18
Revision history
Date
21-Jun-2004
03-Jul-2006
09-Aug-2018 5
Table 10. Document revision history
Version
3
4
Changes
Preliminary version
New template, no content change
Updated information on cover page.
Updated Section 4 Package information
.
Minor text changes
STD25NF10T4
DS2063 - Rev 5 page 16/18
STD25NF10T4
Contents
Contents
DS2063 - Rev 5 page 17/18
STD25NF10T4
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS2063 - Rev 5 page 18/18
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