STF36N60M6
Datasheet
N-channel 600 V, 85 mΩ typ., 30 A MDmesh™ M6
Power MOSFET in a TO-220FP package
1
2
3
Features
Order code
STF36N60M6
V
DS
600 V
R
DS(on)
max.
99 mΩ
• Reduced switching losses
• Lower R
DS(on)
per area vs previous generation
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
I
D
30 A
TO-220FP
D(2)
G(1)
S(3)
Product status link
STF36N60M6
Device summary
Order code
Marking
Package
Packing
STF36N60M6
36N60M6
TO-220FP
Tube
AM15572v1_no_tab
Applications
• Switching applications
• LLC converters
• Boost PFC converters
Description
The new MDmesh™ M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs.
STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent R
DS(on)
per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency.
DS12609 - Rev 1 - July 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STF36N60M6
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
(1)
I
D
(1)
I
DM
(2)
P
TOT dv/dt
(3)
dv/dt
(4)
Gate-source voltage
Parameter
Drain current (continuous) at T
C
Drain current (continuous) at T
C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
= 25 °C
= 100 °C
Peak diode recovery voltage slope
V
ISO
MOSFET dv/dt ruggedness
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T
C
= 25 °C)
Storage temperature range T stg
T j
Operating junction temperature range
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. I
SD
≤ 30 A, di/dt ≤ 400 A/μs; V
DS(peak)
< V
(BR)DSS
, V
DD
= 400
4. V
DS
≤ 480 V
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
30
19
102
40
15
50
2.5
-55 to 150
Value
3.1
62.5
Value
5
750
Unit
°C/W
°C/W
Unit
A mJ
Unit
V
A
A
A
W
V/ns
V/ns kV
°C
DS12609 - Rev 1 page 2/13
2
STF36N60M6
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V, T
C
= 125 °C
(1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 15 A
Min.
Typ.
Max.
Unit
600 V
3.25
4
85
1
100
±5
4.75
99
µA
µA
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
= 0 V
V
DD
= 480 V, I
D
= 30 A, V
GS
= 0 to 10 V
(see Figure 14. Test circuit for gate charge behavior )
Min.
-
-
-
-
-
-
-
-
Typ.
1960
93
6
332
1.6
44.3
10.1
25
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V to 80% V
DSS
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
V
GS
= 300 V, I
D
= 15 A, R
G
= 4.7 Ω,
= 10 V (see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
15.2
ns
5.3
ns
-
50.2
7.3
-
ns ns
Symbol
I
SD
Parameter
Source-drain current
Table 7. Source-drain diode
Test conditions Min.
Typ.
Max.
Unit
30 A
DS12609 - Rev 1 page 3/13
STF36N60M6
Electrical characteristics
Symbol
I
SDM
(1)
V
SD
(2)
t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Parameter
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
I
V
T
GS
SD
SD j
= 30 A, di/dt = 100 A/µs, V
= 30 A, di/dt = 100 A/µs, V
DD
= 60 V,
= 150 °C (see
Figure 15. Test circuit for inductive load switching and diode recovery times )
DD
= 60 V
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 μs, duty cycle 1.5%.
Test conditions
= 0 V, I
SD
= 30 A
-
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
102 A
1.6
340
5.3
31
430
7.7
36
V ns
µC
A ns
µC
A
DS12609 - Rev 1 page 4/13
STF36N60M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
GIPG050620181503SOA
Operation in this area is limited by R
DS(on)
10 2
10 1
10 0
10 -1
10 -1 10 0
T
J
≤150 °C
T
C
V
=25 °C
GS
=10 V single pulse
10 1 10 2 t p
=10 µs t p
=100 µs t p
=1 ms t p
=10 ms
V
DS
(V)
I
D
(A)
100
Figure 3. Output characteristics
GADG220320170910OCH
V
GS
= 9, 10V
80
V
GS
= 8V
60
40
V
GS
= 7V
V
GS
= 6V
20
0
V
GS
= 5V
0 2 4 6 8 10 12 14 16 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
10 V
DS
GADG030220171159QVG V
DS
(V)
V
DD
= 480 V
I
D
= 30 A
600
500
8 400
6
4
2
0
0 10 20 30 40 50
300
200
100
0
Q g
(nC)
Figure 2. Thermal impedance
GC20521 K
δ =0.5
0.2
10 -1
0.1
10 -2
0.05
0.02
0.01
Single pulse
10 -3
10 -4 10 -3 10 -2 10 -1
Z th
= K*R thJ-c
δ =t p
/ Ƭ t p
Ƭ
10 -0 t p
(s)
60
40
20
0
3
I
D
(A)
100
Figure 4. Transfer characteristics
GADG220320170910TCH
V
DS
= 18V
80
4 5 6 7 8 9 V
GS
(V)
Figure 6. Static drain-source on-resistance
GADG010220171211RID
R
DS(on) mΩ
91 V
GS
=10 V
89
87
85
83
81
79
0 5 10 15 20 25 30 I
D
(A)
DS12609 - Rev 1 page 5/13
STF36N60M6
Electrical characteristics (curves)
Figure 7. Capacitance variations
C
(pF)
GADG220320170921CVR
10 4
C
ISS
10 3
10 2
10 1
10 0
10 -1 10 0 f= 1MHz
10 1 10 2
C
OSS
C
RSS
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
GIPG300920151317RON
V
GS
= 10 V
2.2
1.8
1.4
1.0
0.6
0.2
-75 -25 25 75 125 T
J
(°C)
Figure 11. Output capacitance stored energy
E
OSS
(µJ)
GADG010220171214EOS
16
12
8
4
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
1.1
GIPG300920151316VTH
I
D
= 250 µA
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T
J
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
GIPG300920151318BDV
I
D
= 1 mA
1.08
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T
J
(°C)
Figure 12. Source-drain diode forward characteristics
V
SD
(V)
1.1
GADG010220171212SDF
T
J
= -50 °C
1.0
0.9
T
J
= 25 °C
0.8
0.7
0.6
0.5
0 5
T
J
= 150 °C
10 15 20 25 30 I
SD
(A)
DS12609 - Rev 1 page 6/13
STF36N60M6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V (BR)DSS
V D
I
DM
I D
V DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS12609 - Rev 1 page 7/13
4
STF36N60M6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS12609 - Rev 1 page 8/13
4.1
TO-220 type A package information
Figure 19. TO-220FP package outline
STF36N60M6
TO-220FP package information
DS12609 - Rev 1
7012510_Rev_12_B page 9/13
DS12609 - Rev 1
Dim.
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
D
E
A
B
F
F1
Table 8. TO-220FP package mechanical data mm
Typ.
Min.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
28.6
9.8
2.9
15.9
9
3
STF36N60M6
TO-220FP package information
Max.
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
30.6
10.6
3.6
16.4
9.3
3.2
page 10/13
Revision history
Date
02-Jul-2018
Revision
1
Table 9. Document revision history
Changes
First release.
STF36N60M6
DS12609 - Rev 1 page 11/13
STF36N60M6
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
DS12609 - Rev 1 page 12/13
STF36N60M6
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12609 - Rev 1 page 13/13
