STF4LN80K5
Nchannel 800 V, 2.1 Ω typ., 3 A MDmesh™ K5
Power MOSFET in a TO-220FP package
Datasheet - production data
TO-220FP
Figure 1: Internal schematic diagram
Features
Order code V
DS
R
DS(on)
max.
STF4LN80K5 800 V 2.6 Ω
Industry’s lowest R
DS(on)
* area
Industry’s best FoM (figure of merit)
Ultra low-gate charge
100% avalanche tested
Zener-protected
I
D
3 A
Applications
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency.
Order code
STF4LN80K5
Table 1: Device summary
Marking Package
4LN80K5 TO-220FP
Packing
Tube
May 2016 DocID027806 Rev 2
This is information on a product in full production.
1/13 www.st.com
Contents
Contents
STF4LN80K5
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
TO-220FP package information ...................................................... 10
5 Revision history ............................................................................ 12
2/13 DocID027806 Rev 2
STF4LN80K5
1
Electrical ratings
Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
I
D
(1)
I
D
(1)
I
D
(2)
P
TOT
V iso
dv/dt (3) dv/dt (4)
T j
T stg
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current pulsed
Total dissipation at T
C
= 25 °C
Insulation withstand voltage (RMS) from all three leads to external heat sink. (t = 1 s; T
C
= 25 °C)
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Operating junction temperature range
Storage temperature range
Notes:
(1)
Limited by maximum junction temperature.
(2)
Pulse width limited by safe operating area
(3)
I
SD
≤ 3 A, di/dt≤100 A/μs; V
DS peak ≤ V
(BR)DSS
, V
DD
= 400 V.
(4)
V
DS
≤ 640 V
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by Tjmax)
Single pulse avalanche energy
(starting Tj = 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
± 30
3
1.9
12
20
2500
15
50
- 55 to 150
Value
6.25
62.5
Value
0.8
160
V/ns
°C
Unit
°C/W
°C/W mJ
Unit
V
A
A
A
W
V
Unit
A
DocID027806 Rev 2 3/13
Electrical characteristics
2 Electrical characteristics
T
C
= 25 °C unless otherwise specified
Symbol Parameter
Table 5: On/off-state
Test conditions
V
(BR)DSS
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 800 V
I
DSS
Zero gate voltage drain current V
GS
= 0 V, V
DS
T
C
= 125 °C (1)
= 800 V
I
GSS
Gate body leakage current
V
GS(th)
Gate threshold voltage
V
V
DS
DS
= 0 V, V
= V
GS
, I
D
GS
= ± 20 V
= 100 µA
R
DS(on)
Static drain-source on-resistance V
GS
= 10 V, I
D
= 1 A
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
C oss
C rss
C
o(tr)
(1)
C
o(er)
(2)
R g
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent capacitance time related
Equivalent capacitance energy related
V
V
V
V
DS
GS
DS
GS
= 100 V, f = 1 MHz,
= 0 V
= 0 to 640 V,
= 0 V
Intrinsic gate resistance f = 1 MHz ,I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 640 V, I
V
GS
= 10 V,
D
= 2.5 A
see Figure 15: "Test circuit for gate charge behavior"
STF4LN80K5
Min. Typ. Max. Unit
800
1
V
µA
50 µA
3 4
2.1
± 10 µA
5
2.6
V
Ω
Min. Typ. Max. Unit
-
-
122
11
-
- pF pF
-
-
-
-
-
-
-
0.3
23
9
18
3.7
1
2.2
-
-
-
-
-
-
- pF pF pF
Notes:
(1)
Time related is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
(2)
Energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss
when
V
DS
increases from 0 to 80% V
DSS
.
Ω nC nC nC
4/13 DocID027806 Rev 2
STF4LN80K5
Symbol Parameter t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time t f
Fall time
Symbol Parameter
Table 8: Source-drain diode
Test conditions
I
SD
Source-drain current
I
SDM
(1)
Source-drain current (pulsed)
V
SD
(2)
Forward on voltage I
SD
= 2.5 A, V
GS
= 0 V
I t
Q rr rr
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
V
DD
= 2.5 A, di/dt = 100 A/µs,
= 60 V, see Figure 16: "Test circuit for inductive load switching and diode recovery times"
t rr
Q rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 2.5 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C,
see Figure 16: "Test circuit for inductive load switching and diode recovery times"
Electrical characteristics
Table 7: Switching times
Test conditions
V
DD
= 400 V, I
D
= 1.25 A, R
G
= 4.7 Ω
V
GS
= 10 V, see Figure 14: "Test circuit for resistive load switching times" and
Figure 19: "Switching time waveform"
Min. Typ. Max. Unit
-
-
-
-
7
9
31
25
-
-
-
- ns ns ns ns
Min. Typ. Max. Unit
-
-
-
-
-
-
-
-
-
230
1.04
9
368
1.53
8
3
12
1.5
A
A
V ns
µC
A ns
µC
A
Notes:
(1)
Pulse width limited by safe operating area
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Symbol
Table 9: Gate-source Zener diode
Parameter Test conditions Min Typ. Max Unit
V
(BR)GSO
Gate-source breakdown voltage I
GS
= ± 1 mA, I
D
= 0 A 30 - - V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
DocID027806 Rev 2 5/13
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STF4LN80K5
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/13 DocID027806 Rev 2
STF4LN80K5
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Normalized V
(BR)DSS
vs temperature
Figure 12: Maximum avalanche energy vs starting T
J
Figure 13: Source-drain diode forward characteristics
DocID027806 Rev 2 7/13
Test circuits
3 Test circuits
Figure 14: Test circuit for resistive load switching times
STF4LN80K5
Figure 15: Test circuit for gate charge behavior
V
DD
RL
Figure 16: Test circuit for inductive load switching and diode recovery times
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform
8/13 DocID027806 Rev 2
STF4LN80K5
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DocID027806 Rev 2 9/13
Package information
4.1 TO-220FP package information
Figure 20: TO-220FP package outline
STF4LN80K5
10/13 DocID027806 Rev 2
STF4LN80K5
Dim.
G1
H
L2
L3
L4
L5
L6
L7
Dia
F
F1
F2
G
A
B
D
E
Table 10: TO-220FP package mechanical data mm
Min. Typ.
Package information
Max.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
28.6
9.8
2.9
15.9
9
3
30.6
10.6
3.6
16.4
9.3
3.2
DocID027806 Rev 2 11/13
Revision history
5
STF4LN80K5
Revision history
Date
Table 11: Document revision history
Revision Changes
04-Jun-2015
18-May-2016
1
2
First release.
Document status promoted from preliminary data to production data.
Updated Figure 1: "Internal schematic diagram" .
Updated Section 1: "Electrical ratings",
Section 2: "Electrical characteristics".
Added Section 2.1: "Electrical characteristics (curves)".
Updated Section 3: "Test circuits" .
Minor text changes.
12/13 DocID027806 Rev 2
STF4LN80K5
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DocID027806 Rev 2 13/13
