STD16N65M5
Datasheet
N-channel 650 V, 0.230 Ω typ., 12 A MDmesh™ M5 Power MOSFET in a DPAK package
G(1)
TAB
DPAK
1
2 3
D(2, TAB)
S(3)
Features
Order codes
STD16N65M5
V
DS
at T jmax.
710 V
• Extremely low R
DS(on)
• Low gate charge and input capacitance
• Excellent switching performance
• 100% avalanche tested
R
DS(on)
max.
0.279 Ω
I
D
12 A
Applications
• Switching applications
AM01475v1_noZen
Description
This device is an N-channel Power MOSFET based on the MDmesh™ M5 innovative vertical process technology combined with the well-known PowerMESH™ horizontal layout. The resulting product offers extremely low on-resistance, making it particularly suitable for applications requiring high power and superior efficiency.
Product status link
STD16N65M5
Product summary
Order code
Marking
Package
Packing
STD16N65M5
16N65M5
DPAK
Tape and reel
DS7011 - Rev 3 - November 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STD16N65M5
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
(1)
P
TOT dv/dt
(2)
T j
T stg
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
Operating junction temperature range
Storage temperature range
Parameter
1. Pulse width limited by safe operating area.
2. I
SD
≤ 12 A, di/dt ≤ 400 A/μs, V
DD
= 400 V, V
DS(peak)
< V
(BR)DSS
.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on 1inch² FR-4 board, 2 oz Cu.
Parameter
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive (pulse width limited by T j
Max)
Single pulse avalanche energy (starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
12
7.3
48
90
15
-55 to 150
Unit
V
A
A
A
W
V/ns
°C
Value
1.38
50
Unit
°C/W
°C/W
Value
4
200
Unit
A mJ
DS7011 - Rev 3 page 2/19
2
STD16N65M5
Electrical characteristics
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
Table 4. On/off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
I
Test conditions
D
= 1 mA, V
GS
= 0 V
I
DSS
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 650 V,
V
GS
= 0 V, V
DS
= 650 V,
T
C
= 125 °C (1)
V
R
I
GSS
GS(th)
DS(on)
Gate body leakage current
Gate threshold voltage
Static drain-source on resistance
V
V
V
DS
DS
GS
= 0 V, V
GS
= V
GS
, I
D
= 10 V, I
1. Defined by design, not subject to production test.
D
= ±25 V
= 250 µA
= 6 A
Min.
650
3
Typ.
Max.
4
0.230
1
100
100
5
0.279
Table 5. Dynamic
Symbol
C iss
C oss
C
C
C rss o(tr) o(er)
Rg
Q g
Q gs
Q gd
(1)
(2)
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent capacitance time related
Equivalent capacitance energy related
Gate input resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
V
V
V
DS
GS
DS
DD to 10 V
(see
Test conditions
= 100 V, f = 1 MHz,
= 0 V
= 0 to 520 V, V
GS f = 1 MHz open drain
= 520 V, I
D
= 12 A, V
GS
Figure 15. Test circuit for gate charge behavior
)
= 0 V
= 0
Min.
-
-
-
-
-
Typ.
1250
30
3
100
30
2
31
8
12
Max.
-
-
-
-
-
Unit pF pF pF nC
1. C o(tr)
time related is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
2. C o(er)
energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss increases from 0 to 80% V
DSS
.
when V
DS
Ω
Unit
V
µA
µA nA
V
Ω
DS7011 - Rev 3 page 3/19
DS7011 - Rev 3
STD16N65M5
Electrical characteristics
Symbol t d(v) t r(v) t f(i) t c(off)
Parameter
Voltage delay time
Voltage rise time
Current fall time
Crossing time
Table 6. Switching times
Test conditions
V
DD
= 400 V, I
D
= 8 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 16. Test circuit for inductive load switching and diode recovery times
and
Figure 19. Switching time waveform
)
Min.
-
Typ.
25
7
6
8
Max.
-
Unit ns
Table 7. Source drain diode
Symbol
I
SD
Parameter
Source-drain current
Test conditions
I
SDM
(1)
Source-drain current
(pulsed)
Forward on voltage V
SD
I t rr
Q rr
RRM t rr
Q rr
(2)
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 12 A, V
GS
= 0 V
I
SD
= 12 A, di/dt = 100 A/µs
V
DD
= 100 V (see Figure 16. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 12 A, di/dt = 100 A/µs
V
DD
= 100 V (see Figure 16. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
Min.
-
-
-
-
300
3.5
23
350
4
24
Typ.
Max.
12
48
1.5
Unit
A ns
µC
A
V ns
µC
A page 4/19
STD16N65M5
Electrical characteristics curves
2.1
Electrical characteristics curves
Figure 1. Safe operating area
AM08609v1
I D
(A)
10
1
Op er ati ite on
in d by m
th is ax are a
R
DS is
(o n)
Lim
10µs
100µs
1ms
10ms
0.1
0.01
0.1 1 10
Tj=150°C
Tc=25°C
S ingle puls e
100 V DS (V)
I
D
(A)
Figure 3. Output characterisics
AM03178v1
V
GS
=10V
7.5V
20
7V
15
6.5V
10
6V
5
5.5V
0
0 2 4 6 8 10 12 14 16 18 V DS (V)
Figure 5. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm)
AM03187v1
I D =1mA
1.07
1.05
1.03
1.01
0.99
0.97
0.95
0.93
-50 -25 0 25 50 75 100 T
J
(°C)
K
Figure 2. Thermal impedance
GC20460
10 0
10 -1
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
I
D
(A)
Figure 4. Transfer characteristics
AM03179v1
V DS =10V
20
15
10
5
0
3 4 5 6 7 8 9 V GS (V)
Figure 6. Static drain-source on resistance
AM03181v1
R DS (on)
(Ω)
0.245
V GS =10V
0.240
0.235
0.230
0.225
0.220
0.215
0.210
0 2 4 6 8 10 12 I
D
(A)
DS7011 - Rev 3 page 5/19
STD16N65M5
Electrical characteristics curves
Figure 7. Output capacitance stored energy
AM03312v1
E os s
(µJ )
7
6
5
4
3
2
1
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 9. Gate charge vs gate-source voltage
V GS
AM03182v1
V
DD
=520V
I
D
10
8
6
4
2
0
0 10 25 30 35 Q g
3
200
100
Figure 11. Normalized gate threshold voltage vs temperature
AM03184v1
V
GS (th)
(norm)
1.10
I D =250µA
1.00
0.90
0.80
0.70
-50 0 50 100 T
J
(°C)
C
(pF)
10000
1000
100
10
1
0.1
Figure 8. Capacitance variations
AM03183v1
1 10
Cis s
Cos s
Crs s
100 V
DS
(V)
Figure 10. Normalized on resistance vs temperature
AM03185v1
R
DS (on)
(norm)
2.1
V
GS
=10V
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-50 0 50 100 T
J
(°C)
Figure 12. Source-drain diode forward characteristics
AM03186v1
V
S D
(V)
1.0 T
J
=-25°C
0.9
0.8
T
J
=25°C
0.7 T J =150°C
0.6
0.5
0.4
0 5 10 I
S D
(A)
DS7011 - Rev 3 page 6/19
Figure 13. Switching energy vs gate resistance
AM10359v1
E
( µ J )
100
Eon
80
60
40
20
0
0 10 20 30
# Eon including reverse recovery of a SiC diode.
Eoff
40 R G (Ω)
STD16N65M5
Electrical characteristics curves
DS7011 - Rev 3 page 7/19
STD16N65M5
Test circuits
3
Test circuits
Figure 14. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
AM01468v1
Figure 16. Test circuit for inductive load switching and diode recovery times
Figure 15. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 17. Unclamped inductive load test circuit
G
A
D
S
D.U.T.
B
25 Ω
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
Figure 18. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD V
DD
AM01470v1
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
Id
Figure 19. Switching time waveform
Concept waveform for Inductive Load Turn-off
90%Vds 90%Id
Vgs
90%Vgs
Vds
10%Vds 10%Id
AM05540v2
AM01471v1
DS7011 - Rev 3 page 8/19
4
STD16N65M5
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS7011 - Rev 3 page 9/19
4.1
STD16N65M5
DPAK (TO-252) type A2 package information
DPAK (TO-252) type A2 package information
Figure 20. DPAK (TO-252) type A2 package outline
DS7011 - Rev 3
0068772_type-A2_rev25 page 10/19
DS7011 - Rev 3
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
L1
STD16N65M5
DPAK (TO-252) type A2 package information
Table 8. DPAK (TO-252) type A2 mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
5.10
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
5.20
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
5.30
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 11/19
4.2
STD16N65M5
DPAK (TO-252) type C2 package information
DPAK (TO-252) type C2 package information
Figure 21. DPAK (TO-252) type C2 package outline
DS7011 - Rev 3
0068772_C2_25 page 12/19
DS7011 - Rev 3
Dim.
L
L1
L2
L3
L4
L6
θ1
θ2
V2 c2
D
D1
E
E1 e
H
A
A1
A2 b b4 c
STD16N65M5
DPAK (TO-252) type C2 package information
Table 9. DPAK (TO-252) type C2 mechanical data
0.72
5.13
0.47
0.47
6.00
Min.
2.20
0.90
0.00
5.10
6.50
5.20
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
1.00
9°
9°
8°
0.85
5.46
0.60
0.60
6.20
Max.
2.38
1.10
0.10
5.60
6.70
5.50
2.386
10.40
1.70
1.25
page 13/19
DS7011 - Rev 3
STD16N65M5
DPAK (TO-252) type C2 package information
Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25 page 14/19
4.3
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD16N65M5
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS7011 - Rev 3 page 15/19
DS7011 - Rev 3
A
D
B
Figure 24. DPAK (TO-252) reel outline
STD16N65M5
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
AM06038v1
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 16/19
STD16N65M5
Revision history
Date
09-Nov-2010
14-Oct-2011
20-Nov-2018
Version
1
2
3
Table 11. Document revision history
Changes
First release.
Modified Section 2.1: Electrical characteristics (curves) :
– Figure 6, Figure 7, Figure 8, Figure 9, Figure 13 and Figure 14
– Added Figure 15
Updated R
DS(on)
value in coverpage and in Table 4
Updated values in Table 6
Updated Section 4: Package mechanical data and Section 5:
Packaging mechanical data .
Minor text changes.
Removed maturity status indication from cover page. The document status is production data.
The part number STB16N65M5 has been moved to a separate datasheet.
Updated Section 4 Package information
.
Minor text changes.
DS7011 - Rev 3 page 17/19
STD16N65M5
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4.1
DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2
DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
DS7011 - Rev 3 page 18/19
STD16N65M5
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS7011 - Rev 3 page 19/19
