STGIPS10K60T
SLLIMM™ small low-loss intelligent molded module
IPM, 3-phase inverter, 10 A, 600 V short-circuit rugged IGBT
Datasheet
-
production data
Applications
•
3-phase inverters for motor drives
•
Home appliances, such as washing machines, refrigerators, air conditioners and sewing machines
SDIP-25L
Description
This intelligent power module provides a compact, high performance AC motor drive in a simple, rugged design. Combining ST proprietary control ICs with the most advanced short-circuitrugged IGBT system technology, this device is ideal for 3-phase inverters in applications such as home appliances and air conditioners. SLLIMM™ is a trademark of STMicroelectronics.
Features
•
IPM 10 A, 600 V 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes
•
Short-circuit rugged IGBTs
•
V
CE(sat)
negative temperature coefficient
•
3.3 V, 5 V, 15 V CMOS/TTL inputs comparators with hysteresis and pull-down / pull-up resistors
•
Undervoltage lockout
•
Internal bootstrap diode
•
Interlocking function
•
Shut down function
•
DBC substrate leading to low thermal resistance
•
Isolation rating of 2500 V rms
/min
•
4.7 k
Ω
NTC for temperature control
•
UL recognized: UL1557 file E81734
Order code
STGIPS10K60T
Table 1. Device summary
Marking Package
GIPS10K60T SDIP-25L
Packing
Tube
April 2015
This is information on a product in full production.
DocID018533 Rev 5 1/19 www.st.com
1
2
Contents
Contents
3
4
5
6
STGIPS10K60T
Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.1
NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2
Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1
SDIP-25L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19 DocID018533 Rev 5
STGIPS10K60T
1
Internal block diagram and pin configuration
Internal block diagram and pin configuration
Figure 1. Internal block diagram
AM09320v2
DocID018533 Rev 5 3/19
19
Pin n°
21
22
23
24
25
18
19
20
12
13
14
15
16
17
6
7
8
9
10
11
3
4
5
1
2
Internal block diagram and pin configuration
Symbol
P
N
V
V
P
N
U
U
P
LIN
V
HIN
V
OUT
W
V boot W
LIN
W
HIN
W
SD
T1
N
W
W
OUT
U
V boot U
LIN
U
HIN
U
V
CC
OUT
V
V boot V
GND
Table 2. Pin description
Description
High side reference output for U phase
Bootstrap voltage for U phase
Low side logic input for U phase
High side logic input for U phase
Low voltage power supply
High side reference output for V phase
Bootstrap voltage for V phase
Ground
Low side logic input for V phase
High side logic input for V phase
High side reference output for W phase
Bootstrap voltage for W phase
Low side logic input for W phase
High side logic input for W phase
Shut down logic input (active low)
NTC thermistor terminal
Negative DC input for W phase
W phase output
Positive DC input
Negative DC input for V phase
V phase output
Positive DC input
Negative DC input for U phase
U phase output
Positive DC input
Figure 2. Pin layout (bottom view)
STGIPS10K60T
0$5.,1*$5($
4/19 DocID018533 Rev 5
STGIPS10K60T
2 Electrical ratings
2.1
Electrical ratings
Absolute maximum ratings
Symbol
Table 3. Inverter part
Parameter
V
V
PN
PN(surge)
V
± I
CES
C
(2)
Supply voltage applied between P - N
U
, N
V
, N
W
Supply voltage (surge) applied between P - N
U
,
N
V
, N
W
Each IGBT collector emitter voltage (V
IN
(1)
= 0)
Each IGBT continuous collector current at
T
C
= 25°C
± I
CP
(3)
P t
TOT scw
Each IGBT pulsed collector current
Each IGBT total dissipation at T
C
= 25°C
Short-circuit withstand time, V
CE
= 0.5 V
(BR)CES
T j
= 125 °C, V
CC
= V boot
= 15 V, V
IN (1)
= 5 V
1.
Applied between HIN i
, LIN i and
G
ND for i = U, V, W.
2.
Calculated according to the iterative formula:
Value
450
500
600
10
20
33
5
I
C
(
T
C
)
=
R thj – c
×
V
T
CE sat
) ( max
–
)
(
T
T
C j max
)
,
I
C
(
T
C
) )
3.
Pulse width limited by max junction temperature.
Symbol
Table 4. Control part
Parameter
V
OUT
Output voltage applied between OUT
U
, OUT
V
,
OUT
W
- GND
Low voltage power supply V
CC
V boot
V
IN
Bootstrap voltage
Logic input voltage applied between HIN, LIN and
GND
V
SD
SD voltage dV
OUT
/dt Allowed output slew rate
Min.
V boot
- 21
- 0.3
- 0.3
- 0.3
- 0.3
Max.
V boot
+ 0.3
21
620
15
15
50
Unit
V
V
V/ns
V
V
V
Unit
V
V
V
A
A
W
µs
Symbol
V
ISO
T
C
T
J
Table 5. Total system
Parameter
Isolation withstand voltage applied between each pin and heatsink plate (AC voltage, t = 60 sec.)
Module case operation temperature
Power chips operating junction temperature
Value
2500
-40 to 125
-40 to 150
Unit
V
°C
°C
DocID018533 Rev 5 5/19
19
Electrical ratings
2.2 Thermal data
Symbol
R thJC
Table 6. Thermal data
Parameter
Thermal resistance junction-case single IGBT max.
Thermal resistance junction-case single diode max.
Value
3.8
5.5
STGIPS10K60T
Unit
°C/W
°C/W
6/19 DocID018533 Rev 5
STGIPS10K60T
3 Electrical characteristics
Note:
Electrical characteristics
T
J
= 25 °C unless otherwise specified.
Table 7. Inverter part
Symbol Parameter Test conditions
Min.
V
CE(sat)
I
CES
V
F
Collector-emitter saturation voltage
Collector-cut off current
(V
IN
(1) = 0 “logic state”)
Diode forward voltage
V
V
CC
IN
= V
(1) boot
= 5 V,
= 15 V,
I
C
= 5 A
V
V
CC
IN
= V
(1) boot
= 5 V,
= 15 V,
I
C
= 5 A, T j
= 125 °C
V
CE
= 550 V
V
CC
= V boot
= 15 V
(V
IN
(1) = 0 “logic state”)
, I
C
=
5 A
Inductive load switching time and energy
-
-
-
t on t c(on) t off t c(off)
Turn-on time
Crossover time (on)
Turn-off time
Crossover time (off)
V
DD
= 300 V,
V
V
CC
IN
= V
(1) boot
= 0 ÷
= 15 V,
5 V,
I
C
= 5 A (see Figure 4 )
-
-
-
t rr
E on
E off
Reverse recovery time
Turn-on switching losses
Turn-off switching losses -
-
-
1.
Applied between HIN i
, LIN i
and GND for i = U, V, W (LIN inputs are active-low).
Value
Typ.
2.1
1.8
320
70
430
135
130
65
75
Max.
2.5
150
1.9
-
-
-
-
-
-
-
Unit
V
µA
V ns
µJ t
ON
and t
OFF
include the propagation delay time of the internal drive. t
C(ON)
and t the switching time of IGBT itself under the internally given gate driving condition.
C(OFF)
are
DocID018533 Rev 5 7/19
19
Electrical characteristics STGIPS10K60T
Figure 3. Switching time test circuit
INPUT
BUS
+5V
VCC
RSD
/Lin
/SD
Hin
Vcc
DT
GND
BOOT
HVG
OUT
LVG
CP+
VBOOT>VCC
V
0
1
Figure 4. Switching time definition
100% I
C
100% I
C t rr
CE
I
C
I
C
L
IC
VCE
V
CE
AM17167v1
Note:
V
IN
V
IN(ON) t
ON t
C(ON)
10% I
C
90% I
C
10% V
CE
V
IN t
OFF
V
IN(OFF)
10% V
CE t
C(OFF)
10% I
C
(a) turn-on (b) turn-off
AM09223V1
Figure 4 "Switching time definition" refers to HIN inputs (active high). For LIN inputs (active low), V
IN
polarity must be inverted for turn-on and turn-off.
8/19 DocID018533 Rev 5
STGIPS10K60T
3.1 Control part
Electrical characteristics
Symbol
Table 8. Low voltage power supply (V
CC
= 15 V unless otherwise specified)
Parameter Test conditions Min.
Typ.
Max.
Unit
V cc_hys
V cc_thON
V cc_thOFF
V cc
UV hysteresis
V cc
UV turn ON threshold
V cc
UV turn OFF threshold
1.2
11.5
10
1.5
12
10.5
1.8
12.5
11
V
V
V
I qccu
I qcc
Undervoltage quiescent supply current
Quiescent current
V
CC
= 10 V
SD = 5 V; LIN = 5 V;
H
IN
= 0
V cc
= 15 V
SD = 5 V; LIN = 5 V
H
IN
= 0
450
3.5
µA mA
Symbol
I
LINl
I
LINh
I
SDh
I
SDl
Dt
V il
V ih
I
HINh
I
HINl
Symbol
Table 9. Bootstrapped voltage (V
CC
= 15 V unless otherwise specified)
Parameter Test conditions
V
BS_hys
V
BS
UV hysteresis
V
BS_thON
V
BS
UV turn ON threshold
V
BS_thOFF
V
BS
UV turn OFF threshold
I
R
I
QBSU
QBS
DS(on)
Undervoltage V current
BS
quiescent
V
BS
< 9 V
SD = 5 V; LIN and
HIN = 5 V
V
BS
quiescent current
V
BS
= 15 V
SD = 5 V; LIN and
HIN = 5 V
Bootstrap driver on resistance LVG ON
Min.
1.2
11.1
9.8
Typ.
1.5
11.5
10
70
200
120
Max.
1.8
12.1
10.6
110
300
Table 10. Logic inputs (V
CC
= 15 V unless otherwise specified)
Parameter Test conditions Min.
Typ.
Low logic level voltage
High logic level voltage
HIN logic “1” input bias current HIN = 15 V
HIN logic “0” input bias current HIN = 0 V
LIN logic “1” input bias current LIN = 0 V
LIN logic “0” input bias current LIN = 15 V
SD logic “0” input bias current SD = 15 V
SD logic “1” input bias current SD = 0 V
Dead time
see Figure 9
0.8
1.9
110
3
30
175
6
120
600
Max.
1.1
2.25
260
1
20
1
300
3
Unit
V
V
V
µA
µA
W
Unit
V
V
µA
µA
µA
µA
µA
µA ns
DocID018533 Rev 5 9/19
19
Electrical characteristics STGIPS10K60T
Symbol
Table 11. Shut down characteristics (V
CC
= 15 V unless otherwise specified)
Parameter Test conditions Min.
Typ.
Max.
t sd
Shut down to high / low side driver propagation delay
V
OUT
= 0, V boot
= V
CC
,
V
IN
= 0 to 3.3 V
50 125 200
Unit ns
Condition
Shutdown enable half-bridge tri-state
Interlocking half-bridge tri-state
0 ‘’logic state” half-bridge tri-state
1 “logic state” low side direct driving
1 “logic state” high side direct driving
H
H
SD
L
H
H
Table 12. Truth table
Logic input (V
I
)
LIN HIN
X X
L
H
L
H
L
H
H
L
LVG
L
L
L
H
L
Output
Note: X: don’t care
Figure 5. Maximum I
C(RMS)
current vs. switching frequency
(1)
AM03801v1
I
C (RMS)
(A)
V
PN
= 300 V, Modulation index = 0.8,
PF = 0.6, T j
= 150 °C, f
SINE
= 60 Hz
12
Figure 6. Maximum I
C(RMS)
current vs. f
SINE
(1)
I
C (RMS)
(A)
8
V
PN
= 300 V, Modulation index = 0.8,
PF = 0.6, T j
= 150 °C, T c
= 100 °C
AM03802v1
7
10
T
C
= 80°C fsw = 12 kHz
6
8 fsw = 16 kHz
T
C
= 100°C
5 fsw = 20 kHz
6
4 6 8 10 12 14 16 f sw (kHz)
1.
Simulated curves refer to typical IGBT parameters and maximum R thJC
.
4
1 10 f
SINE
(Hz)
HVG
L
L
L
L
H
10/19 DocID018533 Rev 5
STGIPS10K60T
3.1.1
Electrical characteristics
NTC thermistor
Symbol
R
25
R
125
B
T
Table 13. NTC thermistor
Parameter Test conditions
Resistance
Resistance
B-constant
Operating temperature
T = 25 °C
T = 125 °C
T = 25 °C to 85 °C
Min.
Typ. Max. Unit.
-40
4.7
160
3950 k
Ω
Ω
K
150 °C
Equation 1: resistance variation vs. temperature
R T = R
25
⋅ e
B
1
---
T
–
1
----------
298
Where T are temperatures in Kelvins
Figure 7. NTC resistance vs. temperature
AM17168v1
NTC [kΩ]
180
160
140
120
100
80
60
MAX.
CENTER
40
20
MIN.
0
-40 -20 0 20 40 60 80 100 120 140 (°C)
Figure 8. NTC resistance vs. temperature (zoom)
AM17169v1
NTC [kΩ]
1.8
1.6
1.4
1.2
1.0
0.8
0.6
MAX.
CENTER
0.4
MIN.
0.2
0.0
50 60 70 80 90 100 110 120 130 140 (°C)
DocID018533 Rev 5 11/19
19
Electrical characteristics
3.2 Waveforms definitions
STGIPS10K60T
Figure 9. Dead time and interlocking waveforms definitions
LIN
CONTROL SIGNAL EDGES
OVERLAPPED:
INTERLOCKING + DEAD TIME
HIN
LVG
HVG gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
L L
OCKING
DT LH gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
G
L L
OCKING
DT HL
CONTROL SIGNALS EDGES
SYNCHRONOUS (*):
DEAD TIME
LIN
HIN
LVG
HVG gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
DT
LH
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
BUT INSIDE THE DEAD TIME:
DEAD TIME
LIN
HIN
LVG
HVG gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
DT
LH gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
DT
HL
DT
HL gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
OUTSIDE THE DEAD TIME:
DIRECT DRIVING
LIN
HIN
LVG
HVG gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
DT
LH
(*) HIN and LIN can be connected together and driven by just one control signal gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
DT
HL
12/19 DocID018533 Rev 5
STGIPS10K60T
4 Applications information
Figure 10. Typical application circuit
Applications information
DocID018533 Rev 5
AM09321v2
13/19
19
Applications information
4.1
STGIPS10K60T
Recommendations
•
Input signal HIN is active high logic. A 85 k
Ω
(typ.) pull down resistor is built-in for each high side input. If an external RC filter is used, for noise immunity, pay attention to the variation of the input signal level.
•
Input signal /LIN is active low logic. A 720 k
Ω
(typ.) pull-up resistor, connected to an internal 5 V regulator through a diode, is built-in for each low side input.
•
To prevent the input signals oscillation, the wiring of each input should be as short as possible.
•
By integrating an application specific type HVIC inside the module, direct coupling to
MCU terminals without any opto-coupler is possible.
•
Each capacitor should be located as nearby the pins of IPM as possible.
•
Low inductance shunt resistors should be used for phase leg current sensing.
•
Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance.
•
The SD signal should be pulled up to 5 V / 3.3 V with an external resistor.
Table 14. Recommended operating conditions
Symbol f t
V
V
V
PN
CC dead
PWM
T
BS
C
Value
Parameter Conditions
Supply voltage
Pwm input signal
Applied between P-Nu, Nv, Nw
Control supply voltage Applied between V
CC
-GND
High side bias voltage
Applied between V
BOOTi
-OUT i
for i = U, V, W
Blanking time to prevent arm-short
For each input signal
-40°C < T c
< 100°C
-40°C < T j
< 125°C
Case operation temperature
Min.
Typ.
Max.
300 400
13.5
15 18
13
1
18
20
100
Unit
V
V
V
µs kHz
°C
For further details, refer to AN3338.
14/19 DocID018533 Rev 5
STGIPS10K60T
5 Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.
5.1 SDIP-25L package information
Figure 11. SDIP-25L package outline
DocID018533 Rev 5
B
15/19
19
Package information
Dim.
F
F1
R
T
V
D1
E
E1
C3 e e1 e2 e3
D
B
B1
B2
C
C1
C2
A
A1
A2
A3
STGIPS10K60T
0.85
0.35
1.55
0.45
0°
Table 15. SDIP-25L mechanical data mm
Min.
43.90
1.15
1.40
38.90
21.50
11.25
24.83
5.00
6.50
11.20
2.90
2.15
3.40
4.50
6.30
Typ.
5.55
11.20
1.40
1.00
0.50
1.75
0.55
3.00
2.35
3.60
4.70
6.50
33.30
44.40
1.35
1.60
39.40
22.00
11.85
25.23
5.40
7.00
11.70
Max.
44.90
1.55
1.80
39.90
22.50
12.45
25.63
6.00
7.50
12.20
3.10
2.55
3.80
4.90
6.70
1.15
0.65
1.95
0.65
6°
16/19 DocID018533 Rev 5
STGIPS10K60T
5.2 Packing information
Figure 12. SDIP-25L packing information
Package information
DocID018533 Rev 5 17/19
19
Revision history
6 Revision history
Date
07-Mar-2011
14-Sep-2011
28-Aug-2012
30-Apr-2013
14-Apr-2015
STGIPS10K60T
Table 16. Document revision history
Revision Changes
1
2
3
4
5
Initial release.
Modified Section 3.1.1 on page 11 .
Modified: Min. and Max. value Table 4 on page 5
.
Updated: Table 15 on page 15 ,
Figure 11 on page 15 and
Figure 12 on page 17
.
Added: Figure 13 on page 18 .
Modified:
– description pin 15
Table 2 on page 4 ,
V
SD
parameter Table 4 on page 5
.
–
Figure 3 on page 8 and
Figure 7 on page 11 .
Added:
–
Figure 8 on page 11 .
Text edits and formatting changes throughout document
Updated Figure 2: Pin layout (bottom view)
Updated Section 5: Package information
18/19 DocID018533 Rev 5
STGIPS10K60T
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DocID018533 Rev 5 19/19
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