STMicroelectronics STWA75N65DM6 Datasheet
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STWA75N65DM6
Datasheet
N-channel 650 V, 33 mΩ typ., 75 A MDmesh DM6 Power MOSFET in a TO-247 long leads package
G(1)
TO-247 long leads
D(2, TAB)
S(3)
AM01476v1_tab
Features
Order code
STWA75N65DM6
V
DS
650 V
R
DS(on)
max.
36 mΩ
• Fast-recovery body diode
• Lower R
DS(on)
per area vs previous generation
• Low gate charge, input capacitance and resistance
• 100% avalanche tested
• Extremely high dv/dt ruggedness
• Zener-protected
I
D
75 A
Applications
• Switching applications
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation,
DM6 combines very low recovery charge (Q rr
), recovery time (t rr
) and excellent improvement in R
DS(on)
per area with one of the most effective switching behaviors available in the market for the most demanding high-efficiency bridge topologies and
ZVS phase-shift converters.
Product status link
STWA75N65DM6
Product summary
Order code
Marking
Package
Packing
STWA75N65DM6
75N65DM6
TO-247 long leads
Tube
DS13828 - Rev 1 - September 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STWA75N65DM6
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
I
GS
D
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed) I
DM
P
TOT dv/dt
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope di/dt
T
STG
T
J
Peak diode recovery current slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 75 A, V
DS (peak)
< V
(BR)DSS
, V
DD
= 400 V.
3. V
DS
≤ 520 V.
Symbol
R thJC
R thJA
Table 2. Thermal data
Parameter
Thermal resistance, junction-to-case
Thermal resistance, junction-to-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (t p
limited by T
J
max)
Single pulse avalanche energy (starting T
J
= 25 °C, I
D
= I
AR
; V
DD
= 50 V)
Value
±25
75
47
280
480
100
1000
100
-55 to 150
Unit
V
A
A
W
V/ns
A/μs
V/ns
°C
°C
Value
0.26
50
Unit
°C/W
°C/W
Value
9
1.9
Unit
A
J
DS13828 - Rev 1 page 2/12
2
STWA75N65DM6
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V
(BR)DSS
I
DSS
Parameter
I
GSS
V
GS(th)
R
DS(on)
1. Specified by design - not tested in production.
Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 650 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 650 V, T
C
Gate-body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 μA
Static drain-source on resistance V
GS
= 10 V, I
D
= 37.5 A
Min.
Typ.
Max.
Unit
650 V
5
100
μA
3.25
4
33
±5
4.75
36
μA
V mΩ
Table 5. Dynamic characteristics
Symbol
C iss
C oss
C rss
C oss eq
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
V
= 100 V, f = 1 MHz, V
= 0 to 520 V, V f = 1 MHz, I
V
DS
DS
DD
= 520 V, I
10 V (see
D
Test conditions
= 0 A
D
GS
GS
= 0 V
= 77 A, V
GS
= 0 V
= 0 to
Figure 14. Test circuit for gate
Min.
-
-
-
-
-
-
-
-
Typ.
5700
280
3
960
1.5
118
38
47
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq
is defined as a constant equivalent capacitance giving the same charging time as C oss to 80% V
DSS
.
when V
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 325 V, I
D
= 38.5 A,
R
G
= 4.7 Ω , V
GS
= 10 V
(see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
40 ns
32 ns
-
125
10 -
ns ns
DS13828 - Rev 1 page 3/12
STWA75N65DM6
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
V
SD
t rr
Q rr
I
RRM t rr
I
Q rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width is limited by safe operating area.
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
I
V
GS
SD
= 0 V, I
Test conditions
SD
= 75 A
= 77 A, di/dt = 100 A/μs, V
DD
(see
= 60 V
Figure 15. Test circuit for inductive load switching and diode recovery times
I
SD
= 77 A, di/dt = 100 A/μs,
V
DD
= 60 V, T
J
= 150 °C
(see
Figure 15. Test circuit for inductive load switching and diode recovery times )
-
-
-
-
-
Min.
Typ.
Max.
Unit
75 A
-
280
1.6
A
V
149
0.92
10.4
280
4.12
ns
µC
A ns
µC
24 A
DS13828 - Rev 1 page 4/12
STWA75N65DM6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GADG210920210955SOA
I
DM
10 2
10 1
this
area
DS(on)
by R
R
DS(on)
max.
t p
=1 µs t p
=10 µs
10 0 t p
=100 µs
V
(BR)DSS t p
=1ms
10 -1
10 -2
10 -1 10 0
T
C
T
J
= 25 °C
≤ 150 °C single pulse
10 1 10 2 t p
=10 ms
V
DS
(V)
100
50
0
0
Figure 3. Typical output characteristics
I
D
(A)
250
GADG200920210949OCH
V
GS
=9, 10 V
V
GS
=8 V
200
150
V
GS
=7 V
4 8 12 16
V
GS
=6 V
20 V
DS
(V)
Figure 5. Typical gate charge characteristics
V
DS
(V)
600
V
DD
= 520 V
I
D
= 77 A
Q g
GADG200920210950QVG V
GS
(V)
12
500
400
300
200
Q gs
Q gd
V
GS
10
8
6
4
100
V
DS
0
0 20 40 60 80 100 120
2
Q
0 g
(nC)
Figure 2. Maximum transient thermal impedance
Z thJC
(°C/W)
GADG200920210949ZTH
10 -1 duty=0.5
0.3
0.2
0.4
10 -2
0.1
0.05
R thJC
= 0.26 °C/W duty = t on
/ T t on
Single pulse
T
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
Figure 4. Typical transfer characteristics
I
D
(A)
250
V
DS
=20 V
GADG200920210949TCH
200
150
100
50
0
4 5 6 7 8 9 V
GS
(V)
Figure 6. Typical drain-source on-resistance
R
DS(on)
(mΩ)
35
V
GS
= 10 V
GADG200920210951RID
34
33
32
31
30
0 10 20 30 40 50 60 70 I
D
(A)
DS13828 - Rev 1 page 5/12
STWA75N65DM6
Electrical characteristics (curves)
Figure 7. Typical capacitance characteristics
C
(pF)
GADG200920210950CVR
10 4 C iss
10 3
C oss
10 2 f = 1 MHz
C rss
10 1
10 0
10 -1 10 0 10 1 10 2
V
DS
(V)
Figure 9. Normalized gate threshold vs temperature
V
GS(th)
(norm.)
1.1
GADG210920211257VTH
I
D
=250 µA
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 8. Typical output capacitance stored energy
E
OSS
(µJ)
50
GADG200920210953EOS
40
30
20
10
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 10. Normalized on-resistance vs. temperature
R
DS(on)
(norm.)
2.5
V
DS
=10 V
GADG200920210952RON
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T j
(°C)
Figure 11. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
1.10
I
D
=1 mA
GADG200920210952BDV
1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
Figure 12. Typical reverse diode forward characteristics
V
SD
(V)
1.2
1.1
1.0
0.9
GADG200920210953SDF
T
J
= -50 °C
T
J
= 25 °C
0.8
0.7
T
J
= 150 °C
0.6
0.5
0 10 20 30 40 50 60 70 I
SD
(A)
DS13828 - Rev 1 page 6/12
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
I
DM
V
D
I
D
V
DD
V
DD
AM01472v1
STWA75N65DM6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
100 Ω D.U.T.
V
G
AM01469v10
Figure 16. Unclamped inductive load test circuit
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
G
25 Ω
A
D
S
D.U.T.
B
+
_
R
A A fast diode
B
B
G
G
100 µH
D
D.U.T.
3.3
µF +
1000
µF
S
V
DD
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r
90% t d(off) t off t f
90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS13828 - Rev 1 page 7/12
4
4.1
STWA75N65DM6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
TO-247 package information
Figure 19. TO-247 long leads package outline
DS13828 - Rev 1
8463846_3 page 8/12
DS13828 - Rev 1
Dim.
E3 e
L
L1
P
Q
S aaa b3 c
D
E
E2
A
A1
A2 b b2
0.59
20.90
15.70
4.90
2.40
5.34
19.80
3.50
5.60
6.05
21.00
15.80
5.00
2.50
5.44
19.92
3.60
6.15
0.04
STWA75N65DM6
TO-247 long leads package information
Table 8. TO-247 long leads package mechanical data
Min.
4.90
2.31
1.90
1.16
mm
Typ.
5.00
2.41
2.00
Max.
2.60
5.54
20.10
4.30
3.70
6.00
6.25
0.10
2.25
0.66
21.10
15.90
5.10
5.10
2.51
2.10
1.26
3.25
page 9/12
Revision history
Date
24-Sep-2021
Revision
1
Table 9. Document revision history
Changes
First release.
STWA75N65DM6
DS13828 - Rev 1 page 10/12
STWA75N65DM6
Contents
Contents
DS13828 - Rev 1 page 11/12
STWA75N65DM6
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DS13828 - Rev 1 page 12/12
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