STL92N10F7AG
Automotive-grade N-channel 100 V, 0.008 Ω typ.,16 A
STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Features
Order code
STL92N10F7AG
VDS
RDS(on)
max
100 V 0.0095 Ω
ID
PTOT
16 A
5W
• Designed for automotive applications and
AEC-Q101 qualified
1
2
3
4
• Among the lowest RDS(on) on the market
• Excellent figure of merit (FoM)
PowerFLAT™5x6
• Low Crss/Ciss ratio for EMI immunity
• High avalanche ruggedness
• Wettable flank package
Figure 1. Internal schematic diagram
D(5, 6, 7, 8)
8
7
Applications
5
6
• Switching applications
Description
G(4)
1
S(1, 2, 3)
2
3
4
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low onstate resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Top View
AM15540v2
Table 1. Device summary
Order code
Marking
Package
Packaging
STL92N10F7AG
92N10F7
PowerFLATTM 5x6
Tape and reel
October 2015
This is information on a product in full production.
DocID027022 Rev 2
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www.st.com
Contents
STL92N10F7AG
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
2/16
.............................................. 8
4.1
PowerFLAT™ 5x6 WF type R package information . . . . . . . . . . . . . . . . . 10
4.2
PowerFLAT™ 5x6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STL92N10F7AG
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
100
V
VGS
Gate-source voltage
± 20
V
Drain current (continuous) at TC = 25 °C
70
A
ID(1)
Drain current (continuous) at TC = 100 °C
50
A
ID
(2)
Drain current (continuous) at Tpcb = 25 °C
16
A
ID
(2)
Drain current (continuous) at Tpcb = 100 °C
11
A
(2)(3)
Drain current (pulsed)
64
A
PTOT(1)
Total dissipation at TC = 25 °C
100
W
PTOT(2)
Total dissipation at Tpcb = 25 °C
5
W
-55 to 175 °C
°C
Value
Unit
ID
IDM
(1)
Tstg
Tj
Storage temperature
Operating junction temperature
1. This value is rated according to Rthj-c
2. This value is rated according to Rthj-pcb
3. Pulse width limited by safe operating area.
Table 3. Thermal data
Symbol
1.
Parameter
Rthj-pcb(1)
Thermal resistance junction-pcb max
31
°C/W
Rthj-case
Thermal resistance junction-case max
1.5
°C/W
When mounted on FR-4 board of 1 inch2, 2 oz Cu.
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Electrical characteristics
2
STL92N10F7AG
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4. On /off states
Symbol
V(BR)DSS
Parameter
Drain-source
breakdown voltage
Test conditions
ID = 250 µA, VGS = 0
IDSS
VDS = 100 V
Zero gate voltage
drain current (VGS = 0) VDS = 100 V, TC=125 °C
IGSS
Gate-body leakage
current (VDS = 0)
Min.
Typ.
100
Gate threshold voltage VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source
on-resistance
2.5
VGS = 10 V, ID = 8 A
Unit
V
VGS = ±20 V
VGS(th)
Max.
3.5
1
µA
100
µA
±100
nA
4.5
V
0.008 0.0095
Ω
Table 5. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
Test conditions
VDS = 50 V, f = 1 MHz,
VGS = 0
VDD = 50 V, ID = 16 A,
VGS = 10 V
(see Figure 14)
Min.
Typ.
Max.
Unit
-
3100
-
pF
-
700
-
pF
-
45
-
pF
-
45
-
nC
-
18
-
nC
-
13
-
nC
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
4/16
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
VDD = 50 V, ID = 8 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 15 and Figure 18)
Fall time
DocID027022 Rev 2
Min.
Typ.
Max.
Unit
-
19
-
ns
-
32
-
ns
-
36
-
ns
-
13
-
ns
STL92N10F7AG
Electrical characteristics
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
Source-drain current
-
16
A
ISDM
(1)
Source-drain current (pulsed)
-
64
A
VSD
(2)
Forward on voltage
-
1.1
V
ISD
ISD = 16 A, VGS = 0
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 16 A, di/dt = 100 A/µs
VDD = 80 V, Tj=150 °C
(see Figure 18)
-
70
ns
-
125
nC
-
3.6
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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Electrical characteristics
2.1
STL92N10F7AG
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
AM18087v1
ID
(A)
AM18088v1
K
δ=0.5
)
on
10
S(
pe
ra
ite tion
d
by in t
m his
ax a
R rea
is
0.2
m
0.05
0.02
0.01
100µs
Li
O
D
10
0.1
-1
10 -2
1
pcb
Single pulse
1ms
Tj=175°C
Tpcb=25°C
Single pulse
0.1
0.1
1
10ms
VDS(V)
10
Figure 4. Output characteristics
10 -3
10 -1
10 -2
10 0
10 1
tp(s)
Figure 5. Transfer characteristics
AM18089v1
ID (A)
10 -3
10 -4
VGS=10V
AM18090v1
ID
(A)
VDS=9V
300
300
9V
250
250
8V
200
200
7V
150
150
100
100
6V
50
50
5V
0
0
0
4
2
6
VDS(V)
8
Figure 6. Gate charge vs gate-source voltage
AM18091v1
VGS
(V)
VDD=50V
ID=16A
12
2
4
6
8
10 VGS(V)
Figure 7. Static drain-source on-resistance
AM18092v1
RDS(on)
(mΩ)
VGS=10V
10.00
10
8.00
8
6.00
6
4.00
4
2.00
2
0.00
0
0
6/16
10
20
30
40
50
Qg(nC)
DocID027022 Rev 2
0
5
10
15
20
ID(A)
STL92N10F7AG
Electrical characteristics
Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage vs
temperature
AM18093v1
C
(pF)
3500
AM18094v1
VGS(th)
(norm)
ID=250µA
1.2
Ciss
3000
1
2500
0.8
2000
0.6
1500
0.4
1000
0.2
500
Coss
Crss
VDS(V)
0
0
20
40
80
60
Figure 10. Normalized on-resistance vs
temperature
AM18095v1
RDS(on)
0
-55
-5
45
95
145 TJ(°C)
Figure 11. Normalized V(BR)DSS vs temperature
AM18096v1
V(BR)DSS
(norm)
(norm)
ID=16A
VGS=10V
2
1.04
ID=1mA
1.03
1.02
1.5
1.01
1
1
0.99
0.98
0.5
0.97
0
-55
-5
45
95
145 TJ(°C)
0.96
-55
-5
45
95
145 TJ(°C)
Figure 12. Source-drain diode forward
characteristics
AM18097v1
VSD (V)
TJ=-55°C
0.9
TJ=25°C
0.8
0.7
TJ=175°C
0.6
0.5
5
10
15
20
25
30
ISD(A)
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Test circuits
3
STL92N10F7AG
Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
IG=CONST
VDD
VGS
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
Figure 15. Test circuit for inductive load
switching and diode recovery times
A
A
AM01469v1
Figure 16. Unclamped inductive load test circuit
L
A
D
G
FAST
DIODE
D.U.T.
S
3.3
μF
B
B
B
VD
L=100μH
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
VDD
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/16
0
DocID027022 Rev 2
10%
AM01473v1
STL92N10F7AG
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID027022 Rev 2
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Package mechanical data
4.1
STL92N10F7AG
PowerFLAT™ 5x6 WF type R package information
Figure 19. PowerFLAT™ 5x6 WF type R package outline
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10/16
DocID027022 Rev 2
STL92N10F7AG
Package mechanical data
Table 8. PowerFLAT™ 5x6 WF type R mechanical data
mm
Dim.
Min.
Typ.
Max.
A
0.80
1.00
A1
0.02
0.05
A2
0.25
b
0.30
D
5.00
5.20
5.40
E
6.20
6.40
6.60
D2
4.15
4.45
E2
3.50
3.70
e
L
0.50
1.27
0.70
L1
0.90
0.275
K
1.275
1.575
E3
2.35
2.55
E4
0.40
0.60
E5
0.08
0.28
DocID027022 Rev 2
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Package mechanical data
STL92N10F7AG
Figure 20. PowerFLAT™ 5x6 recommended footprint
B)22735,17B5
12/16
DocID027022 Rev 2
STL92N10F7AG
PowerFLAT™ 5x6 packing information
Figure 21. PowerFLAT™ 5x6 type WF tape(a)
Do
P2
2.0 0.05(I)
+0.1
1.50 0.0
Po
4.0 0.1(II)
E1
1.75 0.1
F(5.50±0.0.05)(III)
Y
D1
1.50MIN
R0.30
MAX
W(12.00±0.1)
T
0.30 0.05
Bo (5.35±0.05)
4.2
Package mechanical data
Y
Ko (1.20±0.1)
P1(8.00±0.1)
Ao(6.70±0.1)
SECTION Y-Y
(I)
(II)
(III)
Measured from centreline of sprocket hole
to centreline of pocket.
Cumulative tolerance of 10 sprocket
holes is ± 0.20 .
Measured from centreline of sprocket
hole to centreline of pocket.
Base and bulk quantity 3000 pcs
8234350_TapeWF_rev_C
Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape
Pin 1
identification
a. All dimensions are in millimeters.
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Package mechanical data
STL92N10F7AG
Figure 23. PowerFLAT™ 5x6 reel
R0.60
W3
11.9/15.4
PART NO.
1.90
2.50
R25.00
ØN
178(±2.0)
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING ELECTROSTATIC
SENSITIVE DEVICES
W2
18.4 (max)
A
330 (+0/-4.0)
4.00
2.50
77
ESD LOGO
W1
12.4 (+2/-0)
06
PS
ØA
128
2.20
R1.10
Ø21.2
All dimensions are in millimeters
13.00
CORE DETAIL
8234350_Reel_rev_C
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STL92N10F7AG
5
Revision history
Revision history
Table 9. Document revision history
Date
Revision
16-Oct-2014
1
First release.
2
Updated: Section 4.1: PowerFLAT™ 5x6 WF type R package
information
Datasheet promoted from preliminary data to production data
Minor text changes
12-Oct-2015
Changes
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STL92N10F7AG
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