STMicroelectronics STP7N95K3 Datasheet
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STF7N95K3
STP7N95K3, STW7N95K3
N-channel 950 V, 1.1
Ω
, 7.2 A, TO-220, TO-220FP, TO-247
Zener-protected SuperMESH3™ Power MOSFET
Features
Type
STF7N95K3
STP7N95K3
STW7N95K3
V
DSS
R
DS(on) max
I
D
Pw
950 V < 1.35
Ω
7.2 A 35 W
950 V < 1.35
Ω
7.2 A 150 W
950 V < 1.35
Ω
7.2 A 150 W
■
■
■
■
■
100% avalanche tested
Extremely large avalanche performance
Gate charge minimized
Very low intrinsic capacitances
Zener-protected
Application
■ Switching applications
Description
The new SuperMESH3™ series is obtained through the combination of a further fine tuning of
ST's well established strip-based PowerMESH™ layout with a new optimized vertical structure. In addition to pushing on-resistance significantly down, special attention has been taken to ensure a very good dynamic performances coupled with a very large avalanche capability for the most demanding application.
TO-220
1
2
3
TO-247
1
2
3
1
2
3
TO-220FP
Figure 1.
Internal schematic diagram
Table 1.
Device summary
Order codes
STF7N95K3
STP7N95K3
STW7N95K3
Marking
7N95K3
7N95K3
7N95K3
Package
TO-220FP
TO-220
TO-247
Packaging
Tube
Tube
Tube
January 2009 Rev 1 1/15 www.st.com
15
Contents
Contents
STF7N95K3, STP7N95K3, STW7N95K3
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2/15
STF7N95K3, STP7N95K3, STW7N95K3 Electrical ratings
Table 2.
Absolute maximum ratings
Value
Symbol Parameter
V
GS
I
D
I
D
I
DM
(2)
P
TOT
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
I
AR
Total dissipation at T
C
= 25 °C
Max current during repetitive or single pulse avalanche (pulse width limited by T
JMAX
)
Single pulse avalanche energy
(3)
E
AS dv/dt
(4)
Derating factor
Peak diode recovery voltage slope
V
ISO
T j
T stg
Insulation withstand voltage (RMS) from all three leads to external heat sink
(t=1 s;T
C
=25 °C)
Operating junction temperature
Storage temperature
1.
Limited by package
2.
Pulse width limited by safe operating area
3.
Starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V
4.
I
SD
≤
7.2 A, di/dt = 100 A/µs, V
Peak
< V
(BR)DSS
TO-220, TO-247 TO-220FP
± 30
7.2
4.5
28.8
150
1.12
9
220
6
-55 to 150
7.2
(1)
4.5
(1)
28.8
(1)
35
0.24
2000
Unit
A mJ
W/°C
V/ns
V
°C
Table 3.
Symbol
R thj-case
Rt hj-amb
T l
Thermal data
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Maximum lead temperature for soldering purpose
TO-220 TO-247 TO-220FP Unit
0.83
3.57
°C/W
62.5
50
300
62.5
°C/W
°C
A
A
V
A
W
3/15
Electrical characteristics STF7N95K3, STP7N95K3, STW7N95K3
(Tcase = 25 °C unless otherwise specified)
Table 4.
Symbol
On /off states
Parameter Test conditions
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
I
D
= 1 mA, V
GS
= 0
Zero gate voltage drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
V
V
V
DS
DS
GS
= Max rating
= Max rating, T
= ± 20 V
C
=125 °C
Gate threshold voltage V
DS
= V
GS
, I
D
= 100 µA
Static drain-source on resistance
V
GS
= 10 V, I
D
= 3.6 A
Min.
Typ.
Max. Unit
950
3 4
1.1
1
50
10
5
1.35
µA
V
Ω
V
µA
µA
Table 5.
Symbol
Dynamic
Parameter Test conditions Min.
Typ.
Max.
Unit g fs
(1)
C
C
C iss oss rss
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
V
DS
DS
GS
= 15 V, I
= 0
D
= 3.6 A
= 100 V, f = 1 MHz,
5
1031
79
0.9
S pF pF pF
C
C o(tr)
(2) o(er)
(3)
Equivalent capacitance time related
Equivalent capacitance energy related
V
V
DS
DS
= 0 to 760 V, V
= 0 to 760 V, V
GS
GS
= 0
= 0
60
36 pF pF
R
G
Gate input resistance f=1 MHz Gate DC Bias=0 Test signal level = 20 mV open drain
2.4
Ω
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
V
GS
= 760 V, I
= 10 V
(see
D
= 7.2 A, 34
6
20
1.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
2.
C oss eq.
time related is defined as a constant equivalent capacitance giving the same charging time as C oss when V
DS
increases from 0 to 80% V
DSS
3.
C oss eq.
energy related is defined as a constant equivalent capacitance giving the same stored energy as
C oss
when V
DS
increases from 0 to 80% V
DSS nC nC nC
4/15
STF7N95K3, STP7N95K3, STW7N95K3 Electrical characteristics
Table 6.
Symbol t d(on) t r t d(off) t f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
V
DD
= 475 V, I
D
= 3.6 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(see
Min. Typ.
Max Unit
14
9
36
23 ns ns ns ns
Table 7.
Symbol
Source drain diode
Parameter Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
I
SD
SD
V
= 7.2 A, V
GS
= 0
= 7.2 A, di/dt = 100A/µs
DD
= 60 V (see
t rr
Q rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 7.2 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
)
1.
Pulse width limited by safe operating area
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Min.
Typ. Max. Unit
7.2
28.8
1.6
450
6
28
550
8
28 ns
µC
A ns
µC
A
A
A
V
Table 8.
Symbol
Gate-source Zener diode
Parameter Test conditions Min.
Typ. Max. Unit
BV
GSO
(1)
Gate-source breakdown voltage
Igs=± 1mA (open drain) 30
1.
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components
V
5/15
Electrical characteristics STF7N95K3, STP7N95K3, STW7N95K3
Figure 2.
Safe operating area for TO-220
I
D
(A)
100
Figure 3.
Tj=150°C
Tc=25°C
S ingle p u l s e
AM01576v1
Thermal impedance for TO-220
10
1
0.1
0.1
1 10 100 V
D S
(V)
Figure 4.
Safe operating area for TO-220FP Figure 5.
Thermal impedance for TO-220FP a tion in thi s a re a
i s
D
S
(on) a x R
Oper
Limited
AM01577v1
I
D
(A)
10 µs
100 µs
1m s
10m s
10
1
0.1
0.01
0.1
s a re
D a
i s
S
(on) a tion in thi a x R
Oper
Limited
1
10 µs
100
1m s
µs
10
Tj=150°C
Tc=25°C
S ingle p u l s e
100 V
D S
(V)
10m s
Figure 6.
Safe operating area for TO-247 Figure 7.
Thermal impedance for TO-247
AM0157 8 v1
I
D
(A)
6/15
10
1
0.1
0.1
a
Oper
Limited s a re a
i s
D
S
(on) a x R
1 10
10 µs
100 µs
1m s
Tj=150°C
Tc=25°C
S ingle p u l s e
100 V
D S
(V)
10m s
STF7N95K3, STP7N95K3, STW7N95K3 Electrical characteristics
Figure 8.
Output characteristics Figure 9.
Transfer characteristics
I
D
(A)
12
10
8
6
4
2
0
0 5 10
V
G S
=10V
15 20
AM01579v1
7V
6V
25 V
D S
(V)
5V
5
4
3
2
1
0
0
I
D
(A)
9
8
7
6
2
V
D S
=15V
4 6 8
AM015 8 0v1
10 V
G S
(V)
Figure 10. Normalized B
VDSS
vs temperature Figure 11. Static drain-source on resistance
AM015 8 1v1 AM015 8 6v1
BV
D SS
(norm)
1.10
R
D S (on)
( Ω )
1.4
I
D
= 3 .6 A
V
G S
=10 V
1.00
1.
3
0.90
1.2
0.
8 0 1.1
0.70
-50 0 50 100 T
J
(°C)
1.0
1.5
2 2.5
3 3 .5
4 4.5
5 I
D
(A)
Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations
AM015 83 v1 AM015 8 4v1
V
G S
(V)
12
10
2
0
0
8
6
4
10
V
DD
=760 V
V
G S
=10 V
I
D
=7.2 A
20 3 0
3 00
200
100
40
0
Q g
(nC)
700
600
500
400
C
(pF)
1000
100
10
1
0.1
0.1
1 10
Ci ss
100 V
D S
(V)
Co ss
Cr ss
7/15
Electrical characteristics STF7N95K3, STP7N95K3, STW7N95K3
Figure 14. Output capacitance stored energy Figure 15. Normalized on resistance vs temperature
AM0 3 244v1 AM015 8 2v1
E
Co ss
( µ J)
R
D S (on)
(norm)
14 3 .0
12
2.5
10
2.0
8
6
1.5
1.0
4
2
0
0 200 400 600 8 00 V
D S
(V)
0.5
0
-50 0 50 100 T
J
(°C)
Figure 16. Source-drain diode forward characteristics
V
S D
(V)
AM015 8 7v1
T
J
=-50°C
Figure 17. Normalized gate threshold voltage vs temperature
AM015 8 5v1
V
G S (th)
(norm)
1.2
0.9
1.1
1.0
T
J
=25°C
0.
8
0.7
0.6
0.5
1 2 3 4 5 6
T
J
=150°C
7 8 I
S D
(A)
0.9
0.
8
0.7
0.6
0.5
0.4
-50 0 50 100 150 T
J
(°C)
Figure 18. Maximum avalanche energy vs temperature
AM015 88 v1
E
A S
(mJ)
I
D
=9 A
220
200
1 8 0
160
140
120
100
8 0
60
40
20
0
0 20 40 60 8 0 100 120 140 T
J
(°C)
8/15
STF7N95K3, STP7N95K3, STW7N95K3
3 Test circuits
Test circuits
Figure 19. Switching times test circuit for resistive load
Figure 20. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
D
R
G
R
L
2200
µ
F
3 .
3
µ
F
V
G S
D.U.T.
V
DD
V i
=20V=V
GMAX
2200
µ F
I
G
=CON S T
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 21. Test circuit for inductive load switching and diode recovery times
Figure 22. Unclamped inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 µ H
3 .
3
µ F
1000
µ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
µ F
3 .
3
µ F
V
DD
P w
AM01470v1
Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform
AM01471v1
V
D
V
(BR)D SS t on td on t r t off td off t f
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
9/15
Package mechanical data
4 Package mechanical data
STF7N95K3, STP7N95K3, STW7N95K3
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
10/15
STF7N95K3, STP7N95K3, STW7N95K3
TO-220 mechanical data
Package mechanical data
Dim
L
L1
L20
L 3 0
∅
P
Q e1
F
H1
J1
D
D1
E e
A b b 1 c
Min
4.40
0.61
1.14
0.4
9
15.25
10
2.40
4.
9 5
1.2
3
6.20
2.40
1 3
3 .50
3 .75
2.65
mm
Typ
1.27
16.40
2 8 .
9 0
Max
4.60
0.
88
1.70
0.70
15.75
10.40
2.70
5.15
1.
3 2
6.60
2.72
14
3 .
93
3 .
8 5
2.
9 5
Min
0.17
3
0.024
0.044
0.01
9
0.6
0.
393
0.0
9 4
0.1
9 4
0.04
8
0.244
0.0
9 4
0.511
0.1
3 7
0.147
0.104
inch
Typ
0.050
0.645
1.1
3 7
Max
0.1
8 1
0.0
3 4
0.066
0.027
0.62
0.40
9
0.106
0.202
0.051
0.256
0.107
0.551
0.154
0.151
0.116
11/15
Package mechanical data STF7N95K3, STP7N95K3, STW7N95K3
Dim.
L 5
L 6
L 7
D i a
H
L 2
L 3
L 4
F
F 1
F 2
G
G 1
D
E
A
B
M i n .
0 .
7 5
1 .
1 5
1 .
1 5
4 .
9 5
2 .
4
4 .
4
2 .
5
2 .
5
0 .
4 5
1 0
2 8 .
6
9 .
8
2 .
9
1 5 .
9
9
3
TO-220FP mechanical data mm
T y p .
L7
1 6
E
M a x .
1 .
7 0
1 .
5
5 .
2
2 .
7
4 .
6
2 .
7
2 .
7 5
0 .
7
1
1 0 .
4
3 0 .
6
1 0 .
6
3 .
6
1 6 .
4
9 .
3
3 .
2
A
B
H
Di a
L6
L2
L 3
L5
D
F1 F2
F
G1
G
L4
7012510_Rev_J
12/15
STF7N95K3, STP7N95K3, STW7N95K3
Dim.
c
D
E e
L
A
A1 b b 1 b 2
L1
L2
øP
øR
S
Min.
4.
8 5
2.20
1.0
2.0
3 .0
0.40
1 9 .
8 5
15.45
14.20
3 .70
3 .55
4.50
TO-247 Mechanical data
mm.
Typ
5.45
1 8 .50
5.50
Package mechanical data
Max.
5.15
2.60
1.40
2.40
3 .40
0.
8 0
20.15
15.75
14.
8 0
4.
3 0
3 .65
5.50
13/15
Revision history
Table 9.
Date
27-Jan-2009
Document revision history
Revision
1 First release
STF7N95K3, STP7N95K3, STW7N95K3
Changes
14/15
STF7N95K3, STP7N95K3, STW7N95K3
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