STMicroelectronics Dual P-channel 20V - 0.090 Ω - 3A SO-8 STripFET™ Power MOSFET Datasheet
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STS3DPF20V
DUAL P-CHANNEL 20V - 0.090
Ω
- 3A SO-8
STripFET™ POWER MOSFET
TYPE V
DSS
R
DS(on)
I
D
■
■
STS3DPF20L 20 V <0.11
Ω
TYPICAL R
DS
(on) = 0.090
Ω
@ 4.5 V
TYPICAL R
DS
(on) = 0.1
Ω
@ 2.7 V
■
3 A
STANDARD OUTLINE FOR EASY
AUTOMATED SURFACE MOUNT ASSEMBLY
■
ULTRA LOW THRESHOLD
GATE DRIVE (2.7 V)
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■
BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
■
MOBILE PHONE APPLICATIONS
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
Drain-source Voltage (V
Parameter
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k
Ω
)
Value
20
20
Unit
V
V
V
GS
Gate- source Voltage ± 12 V
I
D
I
DM
(
•)
Drain Current (continuous) at T
C
= 25°C Single Operation
Drain Current (continuous) at T
C
= 100°C Single Operation
Drain Current (pulsed)
3
1.9
12
A
A
A
P tot
Total Dissipation at T
C
= 25°C Dual Operation
Total Dissipation at T
C
= 25°C Single Operation
(
•)
Pulse width limited by safe operating area.
1.6
2
W
W
Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
.
June 2002 1/8
STS3DPF20V
THERMAL DATA
Rthj-amb (*)Thermal Resistance Junction-ambient
T j
T stg
Thermal Operating Junction-ambient
Storage Temperature
(*) When Mounted on 0.5 in 2 pad of 2 oz.copper
Single Operation
Dual Operating
62.5
78
-55 to150
-55 to 150
°C/W
°C/W
°C
°C
ELECTRICAL CHARACTERISTICS (T
CASE
= 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min.
Typ.
Max.
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 µA, V
GS
= 0 20
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating T
C
= 125°C
V
GS
= ± 12 V
1
10
±100
ON (*)
Symbol
V
GS(th)
R
DS(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
V
DS
Test Conditions
= V
GS
I
D
= 250 µA
V
GS
= 4.5 V
V
GS
= 2.7 V
I
D
= 1.5 A
I
D
= 1.5 A
Unit
V
µA
µA nA
Min.
0.6
Typ.
Max.
0.090
0.100
0.110
0.135
Unit
V
Ω
Ω
DYNAMIC
Symbol g fs (*)
C iss
C oss
C rss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
V
DS
= 15 V I
D
= 2 A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
7.5
500
140
30
Max.
Unit
S pF pF pF
2/8
STS3DPF20V
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions t d(on) t r
Turn-on Delay Time
Rise Time
V
DD
R
G
= 10 V
= 4.7
Ω
V
I
D
GS
= 1.5 A
= 4.5 V
(Resistive Load, Figure 1)
Q g
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 10V I
D
= 3A V
GS
=5V
(See test circuit, Figure 2)
Min.
SWITCHING OFF
Symbol t d(off) t f
Parameter
Turn-off Delay Time
Fall Time
Test Conditions
V
DD
= 10 V
R
G
= 4.7
Ω,
I
V
D
GS
= 1.5 A
= 4.5 V
(Resistive Load, Figure 1)
Min.
SOURCE DRAIN DIODE
Symbol Parameter
I
I
SD
SDM
(
•
)
V
SD
(*)
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage t rr
Q rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
(*) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(
•)
Pulse width limited by safe operating area.
Test Conditions
I
SD
= 3 A V
GS
= 0
I
SD
= 3 A
V
DD
= 15 V di/dt = 100A/µs
T j
= 150°C
(See test circuit, Figure 3)
Min.
Typ.
38
39
Max.
Unit ns ns
6.2
1
1.4
8.5
nC nC nC
Typ.
54
12
Max.
Unit ns ns
Typ.
Max.
3
12
1.2
20
13
1.3
Unit
A
A
V ns nC
A
Safe Operating Area
Thermal Impedance
3/8
STS3DPF20V
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/8
Normalized Gate Threshold Voltage vs Temperature
STS3DPF20V
Normalized on Resistance vs Temperature
.
Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature
.
5/8
STS3DPF20V
Fig. 1: Switching Times Test Circuits For Resistive
Load
Fig. 2: Gate Charge test Circuit
Fig. 3: Test Circuit For Diode Recovery Behaviour
6/8
DIM.
a3 b b1
A a1 a2
C c1
D
E
L
M
S e e3
F
STS3DPF20V
MIN.
0.1
0.65
0.35
0.19
0.25
4.8
5.8
3.8
0.4
SO-8 MECHANICAL DATA
mm
TYP.
MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
45 (typ.)
MIN.
0.003
0.025
0.013
0.007
0.010
5.0
6.2
0.188
0.228
1.27
3.81
4.0
1.27
0.6
8 (max.)
0.14
0.015
inch
TYP.
0.050
0.150
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
0.196
0.244
0.157
0.050
0.023
0016023
7/8
STS3DPF20V
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not Obsolete Product(s) - Obsolete Product(s)
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2002 STMicroelectronics - All Rights Reserved
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