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STS2DNF30L
Dual n-channel 30 V, 0.09
Ω, 3 A SO-8
STripFET™ Power MOSFET
Features
Type
STS2DNF30L
V
DSS
30V
R
DS(on) max
<0.11
Ω
I
D
3A
■
■
Standard outline for easy automated surface mount assembly
Low threshold gate drive
Application
■
Switching applications
Description
This Power MOSFET is the latest development of
STMicroelectronics unique "single feature size" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
S0-8
Figure 1.
Internal schematic diagram
Table 1.
Device summary
Order code
STS2DNF30L
Marking
2DF30L
Package
SO-8
Packaging
Tape and reel
November 2009 Doc ID 7200 Rev 7 1/12
www.st.com
12
Contents
Contents
STS2DNF30L
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2/12 Doc ID 7200 Rev 7
STS2DNF30L Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
Drain-source voltage (v
Gate- source voltage gs
= 0)
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
C
C
= 25°C
= 100°C
P
TOT
Total dissipation at T
C
= 25°C dual operation
Total dissipation at T
C
= 25°C single operation
Storage temperature T stg
T j
Max. operating junction temperature
1.
Pulse width limited by safe operating area
Table 3.
Symbol
R thj-a
T
J
T stg
Thermal data
Parameter
Thermal resistance junction-ambient max single operation
Thermal resistance junction-ambient max dual operation
Maximum operating junction ambient
Storage temperature
Value
30
±18
3
1.9
9
1.6
2
-55 to 150
150
Unit
A
A
W
W
V
V
A
°C
°C
Value
62.5
78
150
-55 to 175
Unit
°C/W
°C
°C
Doc ID 7200 Rev 7 3/12
Electrical characteristics STS2DNF30L
4/12
(T
CASE
=25°C unless otherwise specified)
Table 4.
Symbol
On/off states
Parameter
V
(BR)DSS
Drain-source
Breakdown voltage
Test conditions
I
D
= 250 µA, V
GS
= 0
I
DSS
Zero gate voltage
Drain current (V
GS
= 0)
V
DS
= Max rating
V
DS
=Max rating,
T
C
=125°C
V
I
GSS
GS(th)
R
DS(on)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
Static drain-source on resistance
V
GS
= ±18V
V
DS
= V
GS
, I
D
= 250µA
V
GS
= 10V, I
D
= 1A
V
GS
= 5V, I
D
= 1A
Table 5.
Symbol
Dynamic
Parameter Test conditions
g fs
(1)
Forward transconductance
V
DS
>I
D(on) xR
DS(on)max
I
D
=2.5A
C iss
C oss
Input capacitance
Output capacitance
V
DS
= 25V, f = 1 MHz,
V
GS
= 0
C rss
Reverse transfer capacitance
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
V
DD
GS
1.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5.
= 24V, I
D
= 10V
= 2A,
Min.
Typ.
Max.
Unit
30
1
10
V
µA
µA
1 1.7
0.09
0.13
±100 nA
2.5
0.11
0.15
V
Ω
Ω
Min.
Typ.
Max.
Unit
-
-
-
-
-
11
4.5
1.7
0.9
2.5
121
45
-
-
-
pF nC nC nC
S pF pF
Table 6.
Symbol
Switching times
Parameter
t d(on) t r
Turn-on delay time
Rise time t d(off) t f
Turn-off delay time
Fall time
Test conditions
V
DD
=15 V, I
D
=1A,
R
G
=4.7
Ω, V
GS
= 4.5V
V
DD
=15 V, I
D
=1A,
R
G
=4.7
Ω, V
GS
= 4.5V
Min.
Typ.
Max.
Unit
-
19
20
ns ns
-
12
8
ns ns
Doc ID 7200 Rev 7
STS2DNF30L Electrical characteristics
Table 7.
Symbol
Source drain diode
Parameter Test conditions
I
SD
I
SDM
(1)
V
SD
(2)
I t
Q rr rr
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1.
Pulse width limited by safe operating area.
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 2A, V
GS
= 0
I
SD
= 2A, V
DD
= 30V di/dt = 100A/µs,
T j
= 150°C
Min.
Typ.
Max Unit
-
-
3
12
1.3
A
A
V
-
19
8.1
0.85
ns nC
A
Doc ID 7200 Rev 7 5/12
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STS2DNF30L
Figure 4.
Output characteristics Figure 5.
Transfer characteristics
Figure 6.
Transconductance Figure 7.
Static drain-source on resistance
6/12 Doc ID 7200 Rev 7
STS2DNF30L Electrical characteristics
Figure 8.
Gate charge vs. gate-source voltage Figure 9.
Capacitance variations
Figure 10. Normalized gate threshold voltage vs. temperature
Figure 11. Normalized on resistance vs. temperature
Figure 12. Source-drain diode forward characteristics
Doc ID 7200 Rev 7 7/12
Test circuits
3 Test circuits
Figure 13.
Switching times test circuit for resistive load
Figure 14.
Gate charge test circuit
STS2DNF30L
Figure 15.
Test circuit for inductive load switching and diode recovery times
Figure 16.
Unclamped inductive load test circuit
Figure 17.
Unclamped inductive waveform Figure 18.
Switching time waveform
8/12 Doc ID 7200 Rev 7
STS2DNF30L
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
Doc ID 7200 Rev 7 9/12
Package mechanical data
DIM.
c1
D
E b b1
C e e3
A a1 a2 a3
F
L
M
S
STS2DNF30L
MIN.
0.1
0.65
0.35
0.19
0.25
4.8
5.8
3.8
0.4
SO-8 MECHANICAL DATA
mm.
TYP MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
5.0
6.2
MIN.
0.003
0.025
0.013
0.007
0.010
45 (typ.)
0.188
0.228
1.27
3.81
4.0
1.27
0.6
8 (max.)
0.14
0.015
inch
TYP.
0.050
0.150
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
0.196
0.244
0.157
0.050
0.023
10/12 Doc ID 7200 Rev 7
STS2DNF30L
Table 8.
Date
Document revision history
21-Jun-2004
10-Nov-2006
31-Jan-2007
03-May-2007
03-Nov-2009
Revision
3
4
5
6
7
Changes
Complete document.
The document has been reformatted.
Typo mistake on
R
DS(on)
Max value has been changed.
Updated marking in
Revision history
Doc ID 7200 Rev 7 11/12
STS2DNF30L
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12/12 Doc ID 7200 Rev 7
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