STF27N60M2-EP
Nchannel 600 V, 0.150 Ω typ., 20 A MDmesh™ M2 EP
Power MOSFET in TO-220FP package
Datasheet - production data
TO-220FP
Figure 1: Internal schematic diagram
D(2)
G(1)
S(3)
AM15572v1_no_tab
Features
Order code V
DS
R
DS(on)
max I
D
STF27N60M2-EP 600 V 0.163 Ω 20 A
Extremely low gate charge
Excellent output capacitance (C
OSS
) profile
Very low turn-off switching losses
100% avalanche tested
Zener-protected
Applications
Switching applications
Tailored for very high frequency converters
(f > 150 kHz)
Description
These devices are N-channel Power MOSFETs developed using MDmesh™ M2 EP enhanced performance technology. Thanks to their strip layout and an improved vertical structure, these devices exhibit low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering them suitable for the most demanding very high frequency converters.
Order code
STF27N60M2-EP
Table 1: Device summary
Marking
27N60M2EP
Package
TO-220FP
Packing
Tube
January 2016 DocID028863 Rev 1
This is information on a product in full production.
1/13 www.st.com
Contents
Contents
STF27N60M2-EP
1 Electrical ratings ............................................................................... 3
2 Electrical characteristics ................................................................. 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ...................................................................................... 8
4 Package information ........................................................................ 9
4.1
TO-220FP package information ...................................................... 10
5 Revision history .............................................................................. 12
2/13 DocID028863 Rev 1
STF27N60M2-EP
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
I
D
(1)
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
I
D
(1)
Drain current (continuous) at T
I
DM
(2)
Drain current (pulsed)
C
= 100 °C
P
TOT
Total dissipation at T
C
= 25 °C
dv/dt
(3)
Peak diode recovery voltage slope
dv/dt
(4)
MOSFET dv/dt ruggedness
V
ISO
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T c
= 25 °C)
T stg
T j
Storage temperature
Operating junction temperature
Electrical ratings
Value
± 25
20
13
80
30
15
50
2.5
Unit
V
A
A
A
W
V/ns
V/ns kV
- 55 to 150 °C
Notes:
(1)
Limited by maximum junction temperature
(2)
Pulse width limited by safe operating area.
(3)
I
SD
≤ 20 A, di/dt ≤ 400 A/µs; V
DS(peak)
< V
(BR)DSS
, V
DD
= 400 V.
(4)
V
DS
≤ 480 V
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Symbol
I
E
AR
AS
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetetive or not repetetive
(pulse width limited by T jmax
)
Single pulse avalanche energy (starting T j
= 25 °C, I
D
= I
AR
; V
DD
= 50 V)
Value
4.2
62.5
Unit
°C/W
°C/W
Value Unit
3.6 A
260 mJ
DocID028863 Rev 1 3/13
Electrical characteristics
2 Electrical characteristics
T
C
= 25 °C unless otherwise specified
Symbol Parameter
Table 5: On/off states
Test conditions
V
(BR)DSS
I
DSS
I
GSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T
C
= 125 °C
Gate-body leakage current V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source onresistance
V
GS
= 10 V, I
D
= 10 A
Symbol Parameter
Table 6: Dynamic
Test conditions
C
C
C
R oss
Q
Q
Q iss rss
G g gs gd
C
oss eq.
(1)
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 100 V, f = 1 MHz, V
GS
= 0 V
V
DS
= 0 to 480 V, V
GS
= 0 V f = 1 MHz, I
D
= 0 A
V
DD
= 480 V, I
D
= 20 A, V
GS
= 10 V
(see Figure 15: "Test circuit for gate charge behavior" )
-
-
-
-
STF27N60M2-EP
Min. Typ. Max. Unit
600 V
1 µA
100 µA
3
±10 µA
4 V
0.150 0.163 Ω
2
Min. Typ. Max. Unit
- 1320 - pF
- 70 - pF
-
-
1
146
4
33
5.2
16
-
-
-
-
-
- pF pF
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
Symbol Parameter
Table 7: Switching times
Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f
Turn-on delay time
Rise time
Turn-offdelay time
Fall time
V
DD
= 300 V, I
D
= 10 A, R
G
= 4.7 Ω,
V
GS
= 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19:
"Switching time waveform" )
- 13.4
-
-
8.1
- 55.6
6.3
-
-
-
- ns ns ns ns
Ω nC nC nC
4/13 DocID028863 Rev 1
STF27N60M2-EP
Symbol
I
SDM
V
I
I
I
SD
Q rr rr
(1)
(2)
RRM t t
SD
Q rr rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 8: Source-drain diode
Test conditions
V
GS
= 0 V, I
SD
= 20 A
I
SD
= 20 A, di/dt = 100 A/µs, V
DD
= 60 V
(see Figure 19: "Switching time waveform" )
I
SD
= 20 A, di/dt = 100 A/µs, V
DD
= 60 V,
T j
= 150 °C (see Figure 19: "Switching time waveform" )
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
- 271
- 3.44
- 25.4
- 352
- 4.82
- 27.4
20
80
1.6
A
A
V ns
µC
A ns
µC
A
Notes:
(1)
Pulse width is limited by safe operating area
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID028863 Rev 1 5/13
Electrical characteristics
2.1 Electrical characteristics (curves)
I
D
(A)
Figure 2: Safe operating area
GIPG140120161308 RV
10
Operation in this area is
Limited by R
DS(on)
1
Single pulse,Tc =25°C
Tj≤150°C,V
GS =10 V tp = 10 µs tp = 100µs tp = 1 ms tp = 10 ms
0.1
0.1
1 10 100 VDS[V]
Figure 4: Output characteristics
STF27N60M2-EP
Figure 3: Thermal impedance
Figure 5: Transfer characteristics
6/13
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
DocID028863 Rev 1
STF27N60M2-EP
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Output capacitance stored energy
Figure 10: Normalized V(BR)DSS vs temperature
Figure 11: Normalized gate threshold voltage vs temperature
Figure 12: Normalized on-resistance vs temperature
Figure 13: Source-drain diode forward characteristics
DocID028863 Rev 1 7/13
Test circuits
3 Test circuits
Figure 14: Test circuit for resistive load switching times
STF27N60M2-EP
Figure 15: Test circuit for gate charge behavior
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
8/13
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
DocID028863 Rev 1
STF27N60M2-EP
4 Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
DocID028863 Rev 1 9/13
Package information
4.1 TO-220FP package information
Figure 20: TO-220FP package outline
STF27N60M2-EP
10/13 DocID028863 Rev 1
STF27N60M2-EP
Dim.
L4
L5
L6
L7
G1
H
L2
L3
Dia
F
F1
F2
G
A
B
D
E
Table 9: TO-220FP package mechanical data mm
Typ. Min.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
28.6
9.8
2.9
15.9
9
3
Package information
Max.
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
30.6
10.6
3.6
16.4
9.3
3.2
DocID028863 Rev 1 11/13
Revision history
5
STF27N60M2-EP
Revision history
Date
14-Jan-2016
Table 10: Document revision history
Revision
1
Changes
First release.
12/13 DocID028863 Rev 1
STF27N60M2-EP
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